Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 07:28:37.815922 lava-dispatcher, installed at version: 2024.01
2 07:28:37.816744 start: 0 validate
3 07:28:37.817232 Start time: 2024-10-10 07:28:37.817198+00:00 (UTC)
4 07:28:37.817848 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 07:28:37.818443 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 07:28:37.873880 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 07:28:37.874511 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241010%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 07:28:37.906695 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 07:28:37.907426 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241010%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 07:28:37.942667 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 07:28:37.943175 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 07:28:37.986380 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 07:28:37.986873 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241010%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 07:28:38.024192 validate duration: 0.21
16 07:28:38.025384 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 07:28:38.025785 start: 1.1 download-retry (timeout 00:10:00) [common]
18 07:28:38.026139 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 07:28:38.026791 Not decompressing ramdisk as can be used compressed.
20 07:28:38.027319 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 07:28:38.027638 saving as /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/ramdisk/initrd.cpio.gz
22 07:28:38.027961 total size: 5628169 (5 MB)
23 07:28:38.063573 progress 0 % (0 MB)
24 07:28:38.071453 progress 5 % (0 MB)
25 07:28:38.078058 progress 10 % (0 MB)
26 07:28:38.082165 progress 15 % (0 MB)
27 07:28:38.086936 progress 20 % (1 MB)
28 07:28:38.092768 progress 25 % (1 MB)
29 07:28:38.097674 progress 30 % (1 MB)
30 07:28:38.102310 progress 35 % (1 MB)
31 07:28:38.106045 progress 40 % (2 MB)
32 07:28:38.110218 progress 45 % (2 MB)
33 07:28:38.113893 progress 50 % (2 MB)
34 07:28:38.118018 progress 55 % (2 MB)
35 07:28:38.122750 progress 60 % (3 MB)
36 07:28:38.126617 progress 65 % (3 MB)
37 07:28:38.130715 progress 70 % (3 MB)
38 07:28:38.134512 progress 75 % (4 MB)
39 07:28:38.138635 progress 80 % (4 MB)
40 07:28:38.142312 progress 85 % (4 MB)
41 07:28:38.146468 progress 90 % (4 MB)
42 07:28:38.150703 progress 95 % (5 MB)
43 07:28:38.154033 progress 100 % (5 MB)
44 07:28:38.154697 5 MB downloaded in 0.13 s (42.36 MB/s)
45 07:28:38.155225 end: 1.1.1 http-download (duration 00:00:00) [common]
47 07:28:38.156167 end: 1.1 download-retry (duration 00:00:00) [common]
48 07:28:38.156468 start: 1.2 download-retry (timeout 00:10:00) [common]
49 07:28:38.156740 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 07:28:38.157216 downloading http://storage.kernelci.org/next/master/next-20241010/arm64/defconfig/gcc-12/kernel/Image
51 07:28:38.157468 saving as /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/kernel/Image
52 07:28:38.157677 total size: 45715968 (43 MB)
53 07:28:38.157887 No compression specified
54 07:28:38.194715 progress 0 % (0 MB)
55 07:28:38.224593 progress 5 % (2 MB)
56 07:28:38.254741 progress 10 % (4 MB)
57 07:28:38.284385 progress 15 % (6 MB)
58 07:28:38.314031 progress 20 % (8 MB)
59 07:28:38.342609 progress 25 % (10 MB)
60 07:28:38.371970 progress 30 % (13 MB)
61 07:28:38.401370 progress 35 % (15 MB)
62 07:28:38.430858 progress 40 % (17 MB)
63 07:28:38.459475 progress 45 % (19 MB)
64 07:28:38.488720 progress 50 % (21 MB)
65 07:28:38.518802 progress 55 % (24 MB)
66 07:28:38.549139 progress 60 % (26 MB)
67 07:28:38.578152 progress 65 % (28 MB)
68 07:28:38.607608 progress 70 % (30 MB)
69 07:28:38.637280 progress 75 % (32 MB)
70 07:28:38.667602 progress 80 % (34 MB)
71 07:28:38.697271 progress 85 % (37 MB)
72 07:28:38.727138 progress 90 % (39 MB)
73 07:28:38.757187 progress 95 % (41 MB)
74 07:28:38.786060 progress 100 % (43 MB)
75 07:28:38.786636 43 MB downloaded in 0.63 s (69.32 MB/s)
76 07:28:38.787118 end: 1.2.1 http-download (duration 00:00:01) [common]
78 07:28:38.787934 end: 1.2 download-retry (duration 00:00:01) [common]
79 07:28:38.788235 start: 1.3 download-retry (timeout 00:09:59) [common]
80 07:28:38.788497 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 07:28:38.788969 downloading http://storage.kernelci.org/next/master/next-20241010/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 07:28:38.789210 saving as /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 07:28:38.789416 total size: 53209 (0 MB)
84 07:28:38.789624 No compression specified
85 07:28:38.829738 progress 61 % (0 MB)
86 07:28:38.831200 progress 100 % (0 MB)
87 07:28:38.832193 0 MB downloaded in 0.04 s (1.19 MB/s)
88 07:28:38.832705 end: 1.3.1 http-download (duration 00:00:00) [common]
90 07:28:38.833549 end: 1.3 download-retry (duration 00:00:00) [common]
91 07:28:38.833815 start: 1.4 download-retry (timeout 00:09:59) [common]
92 07:28:38.834079 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 07:28:38.834546 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 07:28:38.834793 saving as /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/nfsrootfs/full.rootfs.tar
95 07:28:38.834997 total size: 120894716 (115 MB)
96 07:28:38.835207 Using unxz to decompress xz
97 07:28:38.869060 progress 0 % (0 MB)
98 07:28:39.671166 progress 5 % (5 MB)
99 07:28:40.521238 progress 10 % (11 MB)
100 07:28:41.323036 progress 15 % (17 MB)
101 07:28:42.066914 progress 20 % (23 MB)
102 07:28:42.661216 progress 25 % (28 MB)
103 07:28:43.514383 progress 30 % (34 MB)
104 07:28:44.333293 progress 35 % (40 MB)
105 07:28:44.753444 progress 40 % (46 MB)
106 07:28:45.135378 progress 45 % (51 MB)
107 07:28:45.872863 progress 50 % (57 MB)
108 07:28:46.761182 progress 55 % (63 MB)
109 07:28:47.555917 progress 60 % (69 MB)
110 07:28:48.323166 progress 65 % (74 MB)
111 07:28:49.116827 progress 70 % (80 MB)
112 07:28:49.966733 progress 75 % (86 MB)
113 07:28:50.815479 progress 80 % (92 MB)
114 07:28:51.628049 progress 85 % (98 MB)
115 07:28:52.512502 progress 90 % (103 MB)
116 07:28:53.316199 progress 95 % (109 MB)
117 07:28:54.160994 progress 100 % (115 MB)
118 07:28:54.173557 115 MB downloaded in 15.34 s (7.52 MB/s)
119 07:28:54.175583 end: 1.4.1 http-download (duration 00:00:15) [common]
121 07:28:54.179969 end: 1.4 download-retry (duration 00:00:15) [common]
122 07:28:54.180636 start: 1.5 download-retry (timeout 00:09:44) [common]
123 07:28:54.181200 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 07:28:54.182226 downloading http://storage.kernelci.org/next/master/next-20241010/arm64/defconfig/gcc-12/modules.tar.xz
125 07:28:54.182741 saving as /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/modules/modules.tar
126 07:28:54.183184 total size: 11612824 (11 MB)
127 07:28:54.186453 Using unxz to decompress xz
128 07:28:54.244204 progress 0 % (0 MB)
129 07:28:54.315310 progress 5 % (0 MB)
130 07:28:54.393460 progress 10 % (1 MB)
131 07:28:54.477752 progress 15 % (1 MB)
132 07:28:54.555012 progress 20 % (2 MB)
133 07:28:54.632343 progress 25 % (2 MB)
134 07:28:54.711509 progress 30 % (3 MB)
135 07:28:54.787895 progress 35 % (3 MB)
136 07:28:54.864274 progress 40 % (4 MB)
137 07:28:54.949586 progress 45 % (5 MB)
138 07:28:55.031483 progress 50 % (5 MB)
139 07:28:55.110453 progress 55 % (6 MB)
140 07:28:55.191715 progress 60 % (6 MB)
141 07:28:55.280847 progress 65 % (7 MB)
142 07:28:55.363889 progress 70 % (7 MB)
143 07:28:55.439854 progress 75 % (8 MB)
144 07:28:55.525525 progress 80 % (8 MB)
145 07:28:55.609605 progress 85 % (9 MB)
146 07:28:55.678908 progress 90 % (9 MB)
147 07:28:55.779688 progress 95 % (10 MB)
148 07:28:55.878200 progress 100 % (11 MB)
149 07:28:55.890801 11 MB downloaded in 1.71 s (6.49 MB/s)
150 07:28:55.891462 end: 1.5.1 http-download (duration 00:00:02) [common]
152 07:28:55.892665 end: 1.5 download-retry (duration 00:00:02) [common]
153 07:28:55.893211 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 07:28:55.893726 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 07:29:14.177861 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/831631/extract-nfsrootfs-a0racj1c
156 07:29:14.178469 end: 1.6.1 extract-nfsrootfs (duration 00:00:18) [common]
157 07:29:14.178753 start: 1.6.2 lava-overlay (timeout 00:09:24) [common]
158 07:29:14.179368 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n
159 07:29:14.179799 makedir: /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin
160 07:29:14.180170 makedir: /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/tests
161 07:29:14.180510 makedir: /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/results
162 07:29:14.180845 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-add-keys
163 07:29:14.181402 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-add-sources
164 07:29:14.181946 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-background-process-start
165 07:29:14.182481 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-background-process-stop
166 07:29:14.183294 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-common-functions
167 07:29:14.183844 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-echo-ipv4
168 07:29:14.184401 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-install-packages
169 07:29:14.184888 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-installed-packages
170 07:29:14.185363 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-os-build
171 07:29:14.185866 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-probe-channel
172 07:29:14.186361 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-probe-ip
173 07:29:14.186838 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-target-ip
174 07:29:14.187313 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-target-mac
175 07:29:14.187787 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-target-storage
176 07:29:14.188321 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-test-case
177 07:29:14.188810 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-test-event
178 07:29:14.189305 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-test-feedback
179 07:29:14.189803 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-test-raise
180 07:29:14.190276 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-test-reference
181 07:29:14.190752 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-test-runner
182 07:29:14.191228 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-test-set
183 07:29:14.191695 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-test-shell
184 07:29:14.192207 Updating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-add-keys (debian)
185 07:29:14.192755 Updating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-add-sources (debian)
186 07:29:14.193280 Updating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-install-packages (debian)
187 07:29:14.193805 Updating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-installed-packages (debian)
188 07:29:14.194308 Updating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/bin/lava-os-build (debian)
189 07:29:14.194742 Creating /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/environment
190 07:29:14.195112 LAVA metadata
191 07:29:14.195366 - LAVA_JOB_ID=831631
192 07:29:14.195579 - LAVA_DISPATCHER_IP=192.168.6.2
193 07:29:14.195944 start: 1.6.2.1 ssh-authorize (timeout 00:09:24) [common]
194 07:29:14.196982 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 07:29:14.197302 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:24) [common]
196 07:29:14.197507 skipped lava-vland-overlay
197 07:29:14.197746 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 07:29:14.197997 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:24) [common]
199 07:29:14.198213 skipped lava-multinode-overlay
200 07:29:14.198453 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 07:29:14.198701 start: 1.6.2.4 test-definition (timeout 00:09:24) [common]
202 07:29:14.198950 Loading test definitions
203 07:29:14.199226 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:24) [common]
204 07:29:14.199444 Using /lava-831631 at stage 0
205 07:29:14.200582 uuid=831631_1.6.2.4.1 testdef=None
206 07:29:14.200894 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 07:29:14.201157 start: 1.6.2.4.2 test-overlay (timeout 00:09:24) [common]
208 07:29:14.202731 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 07:29:14.203520 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:24) [common]
211 07:29:14.205473 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 07:29:14.206303 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:24) [common]
214 07:29:14.208173 runner path: /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/0/tests/0_timesync-off test_uuid 831631_1.6.2.4.1
215 07:29:14.208747 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 07:29:14.209554 start: 1.6.2.4.5 git-repo-action (timeout 00:09:24) [common]
218 07:29:14.209796 Using /lava-831631 at stage 0
219 07:29:14.210160 Fetching tests from https://github.com/kernelci/test-definitions.git
220 07:29:14.210446 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/0/tests/1_kselftest-kvm'
221 07:29:17.879004 Running '/usr/bin/git checkout kernelci.org
222 07:29:18.336244 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/0/tests/1_kselftest-kvm/automated/linux/kselftest/kselftest.yaml
223 07:29:18.339039 uuid=831631_1.6.2.4.5 testdef=None
224 07:29:18.339734 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 07:29:18.341408 start: 1.6.2.4.6 test-overlay (timeout 00:09:20) [common]
227 07:29:18.347615 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 07:29:18.349477 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:20) [common]
230 07:29:18.357712 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 07:29:18.359617 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:20) [common]
233 07:29:18.367592 runner path: /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/0/tests/1_kselftest-kvm test_uuid 831631_1.6.2.4.5
234 07:29:18.368236 BOARD='meson-sm1-s905d3-libretech-cc'
235 07:29:18.368690 BRANCH='next'
236 07:29:18.369122 SKIPFILE='/dev/null'
237 07:29:18.369556 SKIP_INSTALL='True'
238 07:29:18.369985 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241010/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 07:29:18.370428 TST_CASENAME=''
240 07:29:18.370859 TST_CMDFILES='kvm'
241 07:29:18.372005 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 07:29:18.373700 Creating lava-test-runner.conf files
244 07:29:18.374142 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/831631/lava-overlay-x5j7aq4n/lava-831631/0 for stage 0
245 07:29:18.374858 - 0_timesync-off
246 07:29:18.375353 - 1_kselftest-kvm
247 07:29:18.376062 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 07:29:18.376657 start: 1.6.2.5 compress-overlay (timeout 00:09:20) [common]
249 07:29:41.843501 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 07:29:41.843950 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:56) [common]
251 07:29:41.844239 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 07:29:41.844511 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 07:29:41.844774 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:56) [common]
254 07:29:42.491190 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 07:29:42.491778 start: 1.6.4 extract-modules (timeout 00:08:56) [common]
256 07:29:42.492166 extracting modules file /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/831631/extract-nfsrootfs-a0racj1c
257 07:29:44.217194 extracting modules file /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/831631/extract-overlay-ramdisk-nysvavpj/ramdisk
258 07:29:45.667456 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 07:29:45.667944 start: 1.6.5 apply-overlay-tftp (timeout 00:08:52) [common]
260 07:29:45.668253 [common] Applying overlay to NFS
261 07:29:45.668470 [common] Applying overlay /var/lib/lava/dispatcher/tmp/831631/compress-overlay-0mmgquoo/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/831631/extract-nfsrootfs-a0racj1c
262 07:29:48.409510 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 07:29:48.409973 start: 1.6.6 prepare-kernel (timeout 00:08:50) [common]
264 07:29:48.410245 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:50) [common]
265 07:29:48.410476 Converting downloaded kernel to a uImage
266 07:29:48.410786 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/kernel/Image /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/kernel/uImage
267 07:29:48.919623 output: Image Name:
268 07:29:48.920081 output: Created: Thu Oct 10 07:29:48 2024
269 07:29:48.920297 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 07:29:48.920501 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
271 07:29:48.920702 output: Load Address: 01080000
272 07:29:48.920902 output: Entry Point: 01080000
273 07:29:48.921100 output:
274 07:29:48.921435 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 07:29:48.921702 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 07:29:48.921970 start: 1.6.7 configure-preseed-file (timeout 00:08:49) [common]
277 07:29:48.922226 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 07:29:48.922483 start: 1.6.8 compress-ramdisk (timeout 00:08:49) [common]
279 07:29:48.922737 Building ramdisk /var/lib/lava/dispatcher/tmp/831631/extract-overlay-ramdisk-nysvavpj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/831631/extract-overlay-ramdisk-nysvavpj/ramdisk
280 07:29:51.336267 >> 167133 blocks
281 07:30:00.442092 Adding RAMdisk u-boot header.
282 07:30:00.442825 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/831631/extract-overlay-ramdisk-nysvavpj/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/831631/extract-overlay-ramdisk-nysvavpj/ramdisk.cpio.gz.uboot
283 07:30:00.688659 output: Image Name:
284 07:30:00.689057 output: Created: Thu Oct 10 07:30:00 2024
285 07:30:00.689270 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 07:30:00.689614 output: Data Size: 23449731 Bytes = 22900.13 KiB = 22.36 MiB
287 07:30:00.690077 output: Load Address: 00000000
288 07:30:00.690519 output: Entry Point: 00000000
289 07:30:00.690961 output:
290 07:30:00.692037 rename /var/lib/lava/dispatcher/tmp/831631/extract-overlay-ramdisk-nysvavpj/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/ramdisk/ramdisk.cpio.gz.uboot
291 07:30:00.692817 end: 1.6.8 compress-ramdisk (duration 00:00:12) [common]
292 07:30:00.693411 end: 1.6 prepare-tftp-overlay (duration 00:01:05) [common]
293 07:30:00.693987 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:37) [common]
294 07:30:00.694482 No LXC device requested
295 07:30:00.695033 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 07:30:00.695592 start: 1.8 deploy-device-env (timeout 00:08:37) [common]
297 07:30:00.696172 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 07:30:00.696631 Checking files for TFTP limit of 4294967296 bytes.
299 07:30:00.699633 end: 1 tftp-deploy (duration 00:01:23) [common]
300 07:30:00.700314 start: 2 uboot-action (timeout 00:05:00) [common]
301 07:30:00.700916 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 07:30:00.701471 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 07:30:00.702029 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 07:30:00.702610 Using kernel file from prepare-kernel: 831631/tftp-deploy-tpuz2i5_/kernel/uImage
305 07:30:00.703298 substitutions:
306 07:30:00.703745 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 07:30:00.704226 - {DTB_ADDR}: 0x01070000
308 07:30:00.704671 - {DTB}: 831631/tftp-deploy-tpuz2i5_/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 07:30:00.705112 - {INITRD}: 831631/tftp-deploy-tpuz2i5_/ramdisk/ramdisk.cpio.gz.uboot
310 07:30:00.705547 - {KERNEL_ADDR}: 0x01080000
311 07:30:00.705979 - {KERNEL}: 831631/tftp-deploy-tpuz2i5_/kernel/uImage
312 07:30:00.706418 - {LAVA_MAC}: None
313 07:30:00.706899 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/831631/extract-nfsrootfs-a0racj1c
314 07:30:00.707335 - {NFS_SERVER_IP}: 192.168.6.2
315 07:30:00.707763 - {PRESEED_CONFIG}: None
316 07:30:00.708225 - {PRESEED_LOCAL}: None
317 07:30:00.708659 - {RAMDISK_ADDR}: 0x08000000
318 07:30:00.709085 - {RAMDISK}: 831631/tftp-deploy-tpuz2i5_/ramdisk/ramdisk.cpio.gz.uboot
319 07:30:00.709512 - {ROOT_PART}: None
320 07:30:00.709939 - {ROOT}: None
321 07:30:00.710364 - {SERVER_IP}: 192.168.6.2
322 07:30:00.710786 - {TEE_ADDR}: 0x83000000
323 07:30:00.711209 - {TEE}: None
324 07:30:00.711633 Parsed boot commands:
325 07:30:00.712065 - setenv autoload no
326 07:30:00.712492 - setenv initrd_high 0xffffffff
327 07:30:00.712914 - setenv fdt_high 0xffffffff
328 07:30:00.713341 - dhcp
329 07:30:00.713766 - setenv serverip 192.168.6.2
330 07:30:00.714191 - tftpboot 0x01080000 831631/tftp-deploy-tpuz2i5_/kernel/uImage
331 07:30:00.714617 - tftpboot 0x08000000 831631/tftp-deploy-tpuz2i5_/ramdisk/ramdisk.cpio.gz.uboot
332 07:30:00.715042 - tftpboot 0x01070000 831631/tftp-deploy-tpuz2i5_/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 07:30:00.715470 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/831631/extract-nfsrootfs-a0racj1c,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 07:30:00.715908 - bootm 0x01080000 0x08000000 0x01070000
335 07:30:00.716482 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 07:30:00.718113 start: 2.3 connect-device (timeout 00:05:00) [common]
338 07:30:00.718573 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 07:30:00.734414 Setting prompt string to ['lava-test: # ']
340 07:30:00.736076 end: 2.3 connect-device (duration 00:00:00) [common]
341 07:30:00.736843 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 07:30:00.737686 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 07:30:00.738381 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 07:30:00.739638 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 07:30:00.775234 >> OK - accepted request
346 07:30:00.777120 Returned 0 in 0 seconds
347 07:30:00.878288 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 07:30:00.880064 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 07:30:00.880679 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 07:30:00.881231 Setting prompt string to ['Hit any key to stop autoboot']
352 07:30:00.881721 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 07:30:00.883431 Trying 192.168.56.21...
354 07:30:00.883957 Connected to conserv1.
355 07:30:00.884435 Escape character is '^]'.
356 07:30:00.884889
357 07:30:00.885354 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 07:30:00.885815
359 07:30:08.446026 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 07:30:08.446812 bl2_stage_init 0x01
361 07:30:08.447393 bl2_stage_init 0x81
362 07:30:08.451589 hw id: 0x0000 - pwm id 0x01
363 07:30:08.452231 bl2_stage_init 0xc1
364 07:30:08.456922 bl2_stage_init 0x02
365 07:30:08.457515
366 07:30:08.458072 L0:00000000
367 07:30:08.458624 L1:00000703
368 07:30:08.459170 L2:00008067
369 07:30:08.459706 L3:15000000
370 07:30:08.462433 S1:00000000
371 07:30:08.463021 B2:20282000
372 07:30:08.463556 B1:a0f83180
373 07:30:08.464119
374 07:30:08.464658 TE: 71644
375 07:30:08.465174
376 07:30:08.468055 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 07:30:08.473630
378 07:30:08.474207 Board ID = 1
379 07:30:08.474731 Set cpu clk to 24M
380 07:30:08.475257 Set clk81 to 24M
381 07:30:08.479231 Use GP1_pll as DSU clk.
382 07:30:08.479786 DSU clk: 1200 Mhz
383 07:30:08.480344 CPU clk: 1200 MHz
384 07:30:08.484836 Set clk81 to 166.6M
385 07:30:08.490497 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 07:30:08.491060 board id: 1
387 07:30:08.497930 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 07:30:08.508617 fw parse done
389 07:30:08.514603 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 07:30:08.557218 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 07:30:08.568166 PIEI prepare done
392 07:30:08.568748 fastboot data load
393 07:30:08.569273 fastboot data verify
394 07:30:08.573781 verify result: 266
395 07:30:08.579342 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 07:30:08.579904 LPDDR4 probe
397 07:30:08.580484 ddr clk to 1584MHz
398 07:30:08.587256 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 07:30:08.624575
400 07:30:08.625236 dmc_version 0001
401 07:30:08.631172 Check phy result
402 07:30:08.637163 INFO : End of CA training
403 07:30:08.637746 INFO : End of initialization
404 07:30:08.642872 INFO : Training has run successfully!
405 07:30:08.643445 Check phy result
406 07:30:08.648362 INFO : End of initialization
407 07:30:08.648930 INFO : End of read enable training
408 07:30:08.653891 INFO : End of fine write leveling
409 07:30:08.659551 INFO : End of Write leveling coarse delay
410 07:30:08.660140 INFO : Training has run successfully!
411 07:30:08.660672 Check phy result
412 07:30:08.665141 INFO : End of initialization
413 07:30:08.665694 INFO : End of read dq deskew training
414 07:30:08.670691 INFO : End of MPR read delay center optimization
415 07:30:08.676383 INFO : End of write delay center optimization
416 07:30:08.682209 INFO : End of read delay center optimization
417 07:30:08.682764 INFO : End of max read latency training
418 07:30:08.687517 INFO : Training has run successfully!
419 07:30:08.688113 1D training succeed
420 07:30:08.696707 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 07:30:08.743400 Check phy result
422 07:30:08.744068 INFO : End of initialization
423 07:30:08.766213 INFO : End of 2D read delay Voltage center optimization
424 07:30:08.785805 INFO : End of 2D read delay Voltage center optimization
425 07:30:08.837731 INFO : End of 2D write delay Voltage center optimization
426 07:30:08.886936 INFO : End of 2D write delay Voltage center optimization
427 07:30:08.892450 INFO : Training has run successfully!
428 07:30:08.893038
429 07:30:08.893579 channel==0
430 07:30:08.898016 RxClkDly_Margin_A0==78 ps 8
431 07:30:08.898573 TxDqDly_Margin_A0==98 ps 10
432 07:30:08.901432 RxClkDly_Margin_A1==88 ps 9
433 07:30:08.901984 TxDqDly_Margin_A1==98 ps 10
434 07:30:08.906988 TrainedVREFDQ_A0==74
435 07:30:08.907543 TrainedVREFDQ_A1==75
436 07:30:08.908112 VrefDac_Margin_A0==24
437 07:30:08.912561 DeviceVref_Margin_A0==40
438 07:30:08.913164 VrefDac_Margin_A1==23
439 07:30:08.918189 DeviceVref_Margin_A1==39
440 07:30:08.918766
441 07:30:08.919305
442 07:30:08.919816 channel==1
443 07:30:08.920373 RxClkDly_Margin_A0==78 ps 8
444 07:30:08.923845 TxDqDly_Margin_A0==98 ps 10
445 07:30:08.924445 RxClkDly_Margin_A1==78 ps 8
446 07:30:08.929405 TxDqDly_Margin_A1==88 ps 9
447 07:30:08.929974 TrainedVREFDQ_A0==78
448 07:30:08.930496 TrainedVREFDQ_A1==77
449 07:30:08.934937 VrefDac_Margin_A0==22
450 07:30:08.935491 DeviceVref_Margin_A0==36
451 07:30:08.940523 VrefDac_Margin_A1==22
452 07:30:08.941075 DeviceVref_Margin_A1==37
453 07:30:08.941593
454 07:30:08.946159 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 07:30:08.946709
456 07:30:08.974133 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 07:30:08.979861 2D training succeed
458 07:30:08.985488 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 07:30:08.986062 auto size-- 65535DDR cs0 size: 2048MB
460 07:30:08.991010 DDR cs1 size: 2048MB
461 07:30:08.991566 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 07:30:08.996742 cs0 DataBus test pass
463 07:30:08.997298 cs1 DataBus test pass
464 07:30:08.997825 cs0 AddrBus test pass
465 07:30:09.002293 cs1 AddrBus test pass
466 07:30:09.002840
467 07:30:09.003357 100bdlr_step_size ps== 478
468 07:30:09.003877 result report
469 07:30:09.007833 boot times 0Enable ddr reg access
470 07:30:09.015410 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 07:30:09.029215 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 07:30:09.684132 bl2z: ptr: 05129330, size: 00001e40
473 07:30:09.691304 0.0;M3 CHK:0;cm4_sp_mode 0
474 07:30:09.691927 MVN_1=0x00000000
475 07:30:09.692516 MVN_2=0x00000000
476 07:30:09.702836 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 07:30:09.703441 OPS=0x04
478 07:30:09.704013 ring efuse init
479 07:30:09.708422 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 07:30:09.709009 [0.017310 Inits done]
481 07:30:09.709541 secure task start!
482 07:30:09.716186 high task start!
483 07:30:09.716787 low task start!
484 07:30:09.717327 run into bl31
485 07:30:09.724686 NOTICE: BL31: v1.3(release):4fc40b1
486 07:30:09.732461 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 07:30:09.733046 NOTICE: BL31: G12A normal boot!
488 07:30:09.748117 NOTICE: BL31: BL33 decompress pass
489 07:30:09.753679 ERROR: Error initializing runtime service opteed_fast
490 07:30:12.492948 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 07:30:12.493606 bl2_stage_init 0x01
492 07:30:12.494080 bl2_stage_init 0x81
493 07:30:12.498600 hw id: 0x0000 - pwm id 0x01
494 07:30:12.499143 bl2_stage_init 0xc1
495 07:30:12.504173 bl2_stage_init 0x02
496 07:30:12.504895
497 07:30:12.505392 L0:00000000
498 07:30:12.505832 L1:00000703
499 07:30:12.506260 L2:00008067
500 07:30:12.506685 L3:15000000
501 07:30:12.507435 S1:00000000
502 07:30:12.511246 B2:20282000
503 07:30:12.511766 B1:a0f83180
504 07:30:12.512265
505 07:30:12.512710 TE: 68648
506 07:30:12.513148
507 07:30:12.516215 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 07:30:12.516722
509 07:30:12.517163 Board ID = 1
510 07:30:12.521757 Set cpu clk to 24M
511 07:30:12.522279 Set clk81 to 24M
512 07:30:12.522715 Use GP1_pll as DSU clk.
513 07:30:12.527469 DSU clk: 1200 Mhz
514 07:30:12.527970 CPU clk: 1200 MHz
515 07:30:12.528439 Set clk81 to 166.6M
516 07:30:12.538592 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 07:30:12.539101 board id: 1
518 07:30:12.544803 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 07:30:12.555780 fw parse done
520 07:30:12.560861 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 07:30:12.603875 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 07:30:12.616029 PIEI prepare done
523 07:30:12.616568 fastboot data load
524 07:30:12.617007 fastboot data verify
525 07:30:12.621654 verify result: 266
526 07:30:12.627223 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 07:30:12.627722 LPDDR4 probe
528 07:30:12.628189 ddr clk to 1584MHz
529 07:30:12.635212 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 07:30:12.671998
531 07:30:12.672537 dmc_version 0001
532 07:30:12.679161 Check phy result
533 07:30:12.685944 INFO : End of CA training
534 07:30:12.686465 INFO : End of initialization
535 07:30:12.691614 INFO : Training has run successfully!
536 07:30:12.692156 Check phy result
537 07:30:12.697178 INFO : End of initialization
538 07:30:12.697697 INFO : End of read enable training
539 07:30:12.700449 INFO : End of fine write leveling
540 07:30:12.706036 INFO : End of Write leveling coarse delay
541 07:30:12.711609 INFO : Training has run successfully!
542 07:30:12.712144 Check phy result
543 07:30:12.712604 INFO : End of initialization
544 07:30:12.717218 INFO : End of read dq deskew training
545 07:30:12.722788 INFO : End of MPR read delay center optimization
546 07:30:12.723301 INFO : End of write delay center optimization
547 07:30:12.728402 INFO : End of read delay center optimization
548 07:30:12.734042 INFO : End of max read latency training
549 07:30:12.734554 INFO : Training has run successfully!
550 07:30:12.739606 1D training succeed
551 07:30:12.745554 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 07:30:12.794327 Check phy result
553 07:30:12.794928 INFO : End of initialization
554 07:30:12.820547 INFO : End of 2D read delay Voltage center optimization
555 07:30:12.845361 INFO : End of 2D read delay Voltage center optimization
556 07:30:12.902002 INFO : End of 2D write delay Voltage center optimization
557 07:30:12.955912 INFO : End of 2D write delay Voltage center optimization
558 07:30:12.961657 INFO : Training has run successfully!
559 07:30:12.962244
560 07:30:12.962688 channel==0
561 07:30:12.967296 RxClkDly_Margin_A0==78 ps 8
562 07:30:12.967837 TxDqDly_Margin_A0==98 ps 10
563 07:30:12.972837 RxClkDly_Margin_A1==88 ps 9
564 07:30:12.973362 TxDqDly_Margin_A1==88 ps 9
565 07:30:12.973826 TrainedVREFDQ_A0==74
566 07:30:12.978483 TrainedVREFDQ_A1==74
567 07:30:12.979013 VrefDac_Margin_A0==23
568 07:30:12.979466 DeviceVref_Margin_A0==40
569 07:30:12.984033 VrefDac_Margin_A1==22
570 07:30:12.984558 DeviceVref_Margin_A1==40
571 07:30:12.985033
572 07:30:12.985484
573 07:30:12.985942 channel==1
574 07:30:12.989677 RxClkDly_Margin_A0==78 ps 8
575 07:30:12.990198 TxDqDly_Margin_A0==98 ps 10
576 07:30:12.995289 RxClkDly_Margin_A1==78 ps 8
577 07:30:12.995819 TxDqDly_Margin_A1==88 ps 9
578 07:30:13.000820 TrainedVREFDQ_A0==78
579 07:30:13.001344 TrainedVREFDQ_A1==75
580 07:30:13.001795 VrefDac_Margin_A0==22
581 07:30:13.006441 DeviceVref_Margin_A0==36
582 07:30:13.006995 VrefDac_Margin_A1==22
583 07:30:13.012076 DeviceVref_Margin_A1==39
584 07:30:13.012646
585 07:30:13.013126 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 07:30:13.013571
587 07:30:13.045660 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
588 07:30:13.046299 2D training succeed
589 07:30:13.051384 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 07:30:13.057301 auto size-- 65535DDR cs0 size: 2048MB
591 07:30:13.057817 DDR cs1 size: 2048MB
592 07:30:13.062552 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 07:30:13.063058 cs0 DataBus test pass
594 07:30:13.068240 cs1 DataBus test pass
595 07:30:13.068753 cs0 AddrBus test pass
596 07:30:13.069207 cs1 AddrBus test pass
597 07:30:13.069652
598 07:30:13.073780 100bdlr_step_size ps== 478
599 07:30:13.074296 result report
600 07:30:13.079347 boot times 0Enable ddr reg access
601 07:30:13.084431 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 07:30:13.097347 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 07:30:13.756726 bl2z: ptr: 05129330, size: 00001e40
604 07:30:13.765216 0.0;M3 CHK:0;cm4_sp_mode 0
605 07:30:13.765778 MVN_1=0x00000000
606 07:30:13.766240 MVN_2=0x00000000
607 07:30:13.776719 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 07:30:13.777269 OPS=0x04
609 07:30:13.777726 ring efuse init
610 07:30:13.779952 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 07:30:13.785711 [0.017354 Inits done]
612 07:30:13.786251 secure task start!
613 07:30:13.786707 high task start!
614 07:30:13.787154 low task start!
615 07:30:13.788881 run into bl31
616 07:30:13.798595 NOTICE: BL31: v1.3(release):4fc40b1
617 07:30:13.805345 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 07:30:13.805888 NOTICE: BL31: G12A normal boot!
619 07:30:13.822022 NOTICE: BL31: BL33 decompress pass
620 07:30:13.827460 ERROR: Error initializing runtime service opteed_fast
621 07:30:15.192928 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 07:30:15.193568 bl2_stage_init 0x01
623 07:30:15.194035 bl2_stage_init 0x81
624 07:30:15.198600 hw id: 0x0000 - pwm id 0x01
625 07:30:15.199116 bl2_stage_init 0xc1
626 07:30:15.204233 bl2_stage_init 0x02
627 07:30:15.204739
628 07:30:15.205197 L0:00000000
629 07:30:15.205642 L1:00000703
630 07:30:15.206081 L2:00008067
631 07:30:15.206519 L3:15000000
632 07:30:15.209779 S1:00000000
633 07:30:15.210285 B2:20282000
634 07:30:15.210738 B1:a0f83180
635 07:30:15.211183
636 07:30:15.211624 TE: 68376
637 07:30:15.212112
638 07:30:15.215443 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 07:30:15.215945
640 07:30:15.220994 Board ID = 1
641 07:30:15.221498 Set cpu clk to 24M
642 07:30:15.221949 Set clk81 to 24M
643 07:30:15.226575 Use GP1_pll as DSU clk.
644 07:30:15.227074 DSU clk: 1200 Mhz
645 07:30:15.227519 CPU clk: 1200 MHz
646 07:30:15.232205 Set clk81 to 166.6M
647 07:30:15.237764 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 07:30:15.238273 board id: 1
649 07:30:15.245023 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 07:30:15.255624 fw parse done
651 07:30:15.261599 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 07:30:15.304211 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 07:30:15.315134 PIEI prepare done
654 07:30:15.315643 fastboot data load
655 07:30:15.316144 fastboot data verify
656 07:30:15.320774 verify result: 266
657 07:30:15.326364 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 07:30:15.326866 LPDDR4 probe
659 07:30:15.327312 ddr clk to 1584MHz
660 07:30:15.334279 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 07:30:15.371546
662 07:30:15.372097 dmc_version 0001
663 07:30:15.378266 Check phy result
664 07:30:15.384189 INFO : End of CA training
665 07:30:15.384697 INFO : End of initialization
666 07:30:15.389745 INFO : Training has run successfully!
667 07:30:15.390247 Check phy result
668 07:30:15.395389 INFO : End of initialization
669 07:30:15.395890 INFO : End of read enable training
670 07:30:15.400954 INFO : End of fine write leveling
671 07:30:15.406555 INFO : End of Write leveling coarse delay
672 07:30:15.407059 INFO : Training has run successfully!
673 07:30:15.407512 Check phy result
674 07:30:15.412200 INFO : End of initialization
675 07:30:15.412705 INFO : End of read dq deskew training
676 07:30:15.417787 INFO : End of MPR read delay center optimization
677 07:30:15.423373 INFO : End of write delay center optimization
678 07:30:15.428977 INFO : End of read delay center optimization
679 07:30:15.429481 INFO : End of max read latency training
680 07:30:15.434556 INFO : Training has run successfully!
681 07:30:15.435051 1D training succeed
682 07:30:15.443697 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 07:30:15.491335 Check phy result
684 07:30:15.491854 INFO : End of initialization
685 07:30:15.513706 INFO : End of 2D read delay Voltage center optimization
686 07:30:15.532846 INFO : End of 2D read delay Voltage center optimization
687 07:30:15.584759 INFO : End of 2D write delay Voltage center optimization
688 07:30:15.633955 INFO : End of 2D write delay Voltage center optimization
689 07:30:15.639489 INFO : Training has run successfully!
690 07:30:15.640023
691 07:30:15.640485 channel==0
692 07:30:15.645834 RxClkDly_Margin_A0==78 ps 8
693 07:30:15.646361 TxDqDly_Margin_A0==98 ps 10
694 07:30:15.648478 RxClkDly_Margin_A1==69 ps 7
695 07:30:15.649006 TxDqDly_Margin_A1==88 ps 9
696 07:30:15.654004 TrainedVREFDQ_A0==74
697 07:30:15.654539 TrainedVREFDQ_A1==75
698 07:30:15.655023 VrefDac_Margin_A0==25
699 07:30:15.659710 DeviceVref_Margin_A0==40
700 07:30:15.660260 VrefDac_Margin_A1==23
701 07:30:15.665241 DeviceVref_Margin_A1==39
702 07:30:15.665750
703 07:30:15.666213
704 07:30:15.666667 channel==1
705 07:30:15.667109 RxClkDly_Margin_A0==78 ps 8
706 07:30:15.669507 TxDqDly_Margin_A0==88 ps 9
707 07:30:15.674017 RxClkDly_Margin_A1==78 ps 8
708 07:30:15.674470 TxDqDly_Margin_A1==78 ps 8
709 07:30:15.674894 TrainedVREFDQ_A0==75
710 07:30:15.679558 TrainedVREFDQ_A1==75
711 07:30:15.680033 VrefDac_Margin_A0==22
712 07:30:15.685167 DeviceVref_Margin_A0==39
713 07:30:15.685605 VrefDac_Margin_A1==22
714 07:30:15.686015 DeviceVref_Margin_A1==38
715 07:30:15.686416
716 07:30:15.690782 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 07:30:15.691220
718 07:30:15.724428 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 07:30:15.724905 2D training succeed
720 07:30:15.729953 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 07:30:15.735547 auto size-- 65535DDR cs0 size: 2048MB
722 07:30:15.736021 DDR cs1 size: 2048MB
723 07:30:15.741161 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 07:30:15.741608 cs0 DataBus test pass
725 07:30:15.742022 cs1 DataBus test pass
726 07:30:15.746768 cs0 AddrBus test pass
727 07:30:15.747219 cs1 AddrBus test pass
728 07:30:15.747625
729 07:30:15.752314 100bdlr_step_size ps== 478
730 07:30:15.752775 result report
731 07:30:15.753185 boot times 0Enable ddr reg access
732 07:30:15.762078 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 07:30:15.775068 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 07:30:16.430904 bl2z: ptr: 05129330, size: 00001e40
735 07:30:16.436833 0.0;M3 CHK:0;cm4_sp_mode 0
736 07:30:16.437317 MVN_1=0x00000000
737 07:30:16.437741 MVN_2=0x00000000
738 07:30:16.448416 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 07:30:16.448889 OPS=0x04
740 07:30:16.449304 ring efuse init
741 07:30:16.454048 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 07:30:16.454501 [0.017319 Inits done]
743 07:30:16.454912 secure task start!
744 07:30:16.462187 high task start!
745 07:30:16.462669 low task start!
746 07:30:16.463083 run into bl31
747 07:30:16.470678 NOTICE: BL31: v1.3(release):4fc40b1
748 07:30:16.478629 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 07:30:16.479088 NOTICE: BL31: G12A normal boot!
750 07:30:16.494133 NOTICE: BL31: BL33 decompress pass
751 07:30:16.499884 ERROR: Error initializing runtime service opteed_fast
752 07:30:17.295424
753 07:30:17.296031
754 07:30:17.300765 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 07:30:17.301220
756 07:30:17.304331 Model: Libre Computer AML-S905D3-CC Solitude
757 07:30:17.451448 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 07:30:17.466801 DRAM: 2 GiB (effective 3.8 GiB)
759 07:30:17.567585 Core: 406 devices, 33 uclasses, devicetree: separate
760 07:30:17.573688 WDT: Not starting watchdog@f0d0
761 07:30:17.598649 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 07:30:17.610830 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 07:30:17.615835 ** Bad device specification mmc 0 **
764 07:30:17.626038 Card did not respond to voltage select! : -110
765 07:30:17.633670 ** Bad device specification mmc 0 **
766 07:30:17.634229 Couldn't find partition mmc 0
767 07:30:17.641849 Card did not respond to voltage select! : -110
768 07:30:17.647358 ** Bad device specification mmc 0 **
769 07:30:17.647890 Couldn't find partition mmc 0
770 07:30:17.652533 Error: could not access storage.
771 07:30:17.949864 Net: eth0: ethernet@ff3f0000
772 07:30:17.950566 starting USB...
773 07:30:18.193402 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 07:30:18.193849 Starting the controller
775 07:30:18.200446 USB XHCI 1.10
776 07:30:19.756885 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 07:30:19.765220 scanning usb for storage devices... 0 Storage Device(s) found
779 07:30:19.816817 Hit any key to stop autoboot: 1
780 07:30:19.817693 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 07:30:19.818413 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 07:30:19.818956 Setting prompt string to ['=>']
783 07:30:19.819504 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 07:30:19.831302 0
785 07:30:19.832266 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 07:30:19.933523 => setenv autoload no
788 07:30:19.934400 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 07:30:19.939631 setenv autoload no
791 07:30:20.040598 => setenv initrd_high 0xffffffff
792 07:30:20.042638 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 07:30:20.045810 setenv initrd_high 0xffffffff
795 07:30:20.148444 => setenv fdt_high 0xffffffff
796 07:30:20.149052 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 07:30:20.153449 setenv fdt_high 0xffffffff
799 07:30:20.254963 => dhcp
800 07:30:20.255970 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
801 07:30:20.259354 dhcp
802 07:30:21.165967 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
803 07:30:21.166573 Speed: 1000, full duplex
804 07:30:21.167036 BOOTP broadcast 1
805 07:30:21.414145 BOOTP broadcast 2
806 07:30:21.915286 BOOTP broadcast 3
807 07:30:22.916436 BOOTP broadcast 4
808 07:30:24.916532 BOOTP broadcast 5
809 07:30:24.929149 DHCP client bound to address 192.168.6.12 (3762 ms)
811 07:30:25.030688 => setenv serverip 192.168.6.2
812 07:30:25.031596 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
813 07:30:25.035846 setenv serverip 192.168.6.2
815 07:30:25.137381 => tftpboot 0x01080000 831631/tftp-deploy-tpuz2i5_/kernel/uImage
816 07:30:25.138294 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
817 07:30:25.144874 tftpboot 0x01080000 831631/tftp-deploy-tpuz2i5_/kernel/uImage
818 07:30:25.145373 Speed: 1000, full duplex
819 07:30:25.145829 Using ethernet@ff3f0000 device
820 07:30:25.150389 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
821 07:30:25.155950 Filename '831631/tftp-deploy-tpuz2i5_/kernel/uImage'.
822 07:30:25.159891 Load address: 0x1080000
823 07:30:29.475263 Loading: *################################################## 43.6 MiB
824 07:30:29.475660 10.1 MiB/s
825 07:30:29.475891 done
826 07:30:29.479606 Bytes transferred = 45716032 (2b99240 hex)
828 07:30:29.581243 => tftpboot 0x08000000 831631/tftp-deploy-tpuz2i5_/ramdisk/ramdisk.cpio.gz.uboot
829 07:30:29.581765 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:31)
830 07:30:29.588497 tftpboot 0x08000000 831631/tftp-deploy-tpuz2i5_/ramdisk/ramdisk.cpio.gz.uboot
831 07:30:29.588783 Speed: 1000, full duplex
832 07:30:29.589009 Using ethernet@ff3f0000 device
833 07:30:29.594004 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
834 07:30:29.603753 Filename '831631/tftp-deploy-tpuz2i5_/ramdisk/ramdisk.cpio.gz.uboot'.
835 07:30:29.604063 Load address: 0x8000000
836 07:30:30.884605 Loading: *################################## UDP wrong checksum 000000ff 000080ba
837 07:30:30.923655 # UDP wrong checksum 000000ff 00001dad
838 07:30:31.424637 ############## UDP wrong checksum 00000005 000081dd
839 07:30:36.426353 T UDP wrong checksum 00000005 000081dd
840 07:30:45.250059 T UDP wrong checksum 000000ff 0000cda0
841 07:30:45.258430 UDP wrong checksum 000000ff 00005293
842 07:30:46.428364 T UDP wrong checksum 00000005 000081dd
843 07:30:50.486033 UDP wrong checksum 000000ff 0000b3bf
844 07:30:50.516170 UDP wrong checksum 000000ff 000048b2
845 07:30:56.525820 T T UDP wrong checksum 000000ff 00005cdb
846 07:30:56.532532 UDP wrong checksum 000000ff 0000efcd
847 07:31:06.432504 T T UDP wrong checksum 00000005 000081dd
848 07:31:15.707363 T UDP wrong checksum 000000ff 0000b6ec
849 07:31:15.737253 UDP wrong checksum 000000ff 00004edf
850 07:31:19.067533 T UDP wrong checksum 000000ff 00004d5e
851 07:31:19.097255 UDP wrong checksum 000000ff 0000e750
852 07:31:26.437210 T
853 07:31:26.437782 Retry count exceeded; starting again
855 07:31:26.438768 end: 2.4.3 bootloader-commands (duration 00:01:07) [common]
858 07:31:26.440936 end: 2.4 uboot-commands (duration 00:01:26) [common]
860 07:31:26.442450 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
862 07:31:26.443583 end: 2 uboot-action (duration 00:01:26) [common]
864 07:31:26.444832 Cleaning after the job
865 07:31:26.445164 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/ramdisk
866 07:31:26.446524 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/kernel
867 07:31:26.490294 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/dtb
868 07:31:26.491182 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/nfsrootfs
869 07:31:26.528569 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831631/tftp-deploy-tpuz2i5_/modules
870 07:31:26.549816 start: 4.1 power-off (timeout 00:00:30) [common]
871 07:31:26.550508 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
872 07:31:26.583993 >> OK - accepted request
873 07:31:26.585760 Returned 0 in 0 seconds
874 07:31:26.686594 end: 4.1 power-off (duration 00:00:00) [common]
876 07:31:26.687639 start: 4.2 read-feedback (timeout 00:10:00) [common]
877 07:31:26.688316 Listened to connection for namespace 'common' for up to 1s
878 07:31:27.688732 Finalising connection for namespace 'common'
879 07:31:27.689507 Disconnecting from shell: Finalise
880 07:31:27.689929 =>
881 07:31:27.790609 end: 4.2 read-feedback (duration 00:00:01) [common]
882 07:31:27.791043 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/831631
883 07:31:31.329831 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/831631
884 07:31:31.330440 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.