Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 08:35:11.310541 lava-dispatcher, installed at version: 2024.01
2 08:35:11.311330 start: 0 validate
3 08:35:11.311803 Start time: 2024-10-11 08:35:11.311774+00:00 (UTC)
4 08:35:11.312366 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:35:11.312905 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 08:35:11.346942 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:35:11.347505 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241011%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 08:35:11.377045 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:35:11.377653 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241011%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 08:35:11.407419 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:35:11.407931 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241011%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
12 08:35:11.449865 validate duration: 0.14
14 08:35:11.450674 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:35:11.450994 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:35:11.451280 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:35:11.451844 Not decompressing ramdisk as can be used compressed.
18 08:35:11.452297 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 08:35:11.452530 saving as /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/ramdisk/rootfs.cpio.gz
20 08:35:11.452772 total size: 8181887 (7 MB)
21 08:35:11.486975 progress 0 % (0 MB)
22 08:35:11.493181 progress 5 % (0 MB)
23 08:35:11.498361 progress 10 % (0 MB)
24 08:35:11.503947 progress 15 % (1 MB)
25 08:35:11.509174 progress 20 % (1 MB)
26 08:35:11.514648 progress 25 % (1 MB)
27 08:35:11.519713 progress 30 % (2 MB)
28 08:35:11.525166 progress 35 % (2 MB)
29 08:35:11.530296 progress 40 % (3 MB)
30 08:35:11.535765 progress 45 % (3 MB)
31 08:35:11.540891 progress 50 % (3 MB)
32 08:35:11.546299 progress 55 % (4 MB)
33 08:35:11.551360 progress 60 % (4 MB)
34 08:35:11.556879 progress 65 % (5 MB)
35 08:35:11.561965 progress 70 % (5 MB)
36 08:35:11.567388 progress 75 % (5 MB)
37 08:35:11.572426 progress 80 % (6 MB)
38 08:35:11.577555 progress 85 % (6 MB)
39 08:35:11.582307 progress 90 % (7 MB)
40 08:35:11.587365 progress 95 % (7 MB)
41 08:35:11.592182 progress 100 % (7 MB)
42 08:35:11.592829 7 MB downloaded in 0.14 s (55.72 MB/s)
43 08:35:11.593377 end: 1.1.1 http-download (duration 00:00:00) [common]
45 08:35:11.594318 end: 1.1 download-retry (duration 00:00:00) [common]
46 08:35:11.594637 start: 1.2 download-retry (timeout 00:10:00) [common]
47 08:35:11.594919 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 08:35:11.595407 downloading http://storage.kernelci.org/next/master/next-20241011/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/kernel/Image
49 08:35:11.595658 saving as /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/kernel/Image
50 08:35:11.595875 total size: 46066176 (43 MB)
51 08:35:11.596127 No compression specified
52 08:35:11.628835 progress 0 % (0 MB)
53 08:35:11.657555 progress 5 % (2 MB)
54 08:35:11.685727 progress 10 % (4 MB)
55 08:35:11.713225 progress 15 % (6 MB)
56 08:35:11.741058 progress 20 % (8 MB)
57 08:35:11.768592 progress 25 % (11 MB)
58 08:35:11.796247 progress 30 % (13 MB)
59 08:35:11.824100 progress 35 % (15 MB)
60 08:35:11.851526 progress 40 % (17 MB)
61 08:35:11.879351 progress 45 % (19 MB)
62 08:35:11.906580 progress 50 % (21 MB)
63 08:35:11.934118 progress 55 % (24 MB)
64 08:35:11.961353 progress 60 % (26 MB)
65 08:35:11.988634 progress 65 % (28 MB)
66 08:35:12.017077 progress 70 % (30 MB)
67 08:35:12.044937 progress 75 % (32 MB)
68 08:35:12.073478 progress 80 % (35 MB)
69 08:35:12.101460 progress 85 % (37 MB)
70 08:35:12.129113 progress 90 % (39 MB)
71 08:35:12.157330 progress 95 % (41 MB)
72 08:35:12.183790 progress 100 % (43 MB)
73 08:35:12.184572 43 MB downloaded in 0.59 s (74.63 MB/s)
74 08:35:12.185071 end: 1.2.1 http-download (duration 00:00:01) [common]
76 08:35:12.185895 end: 1.2 download-retry (duration 00:00:01) [common]
77 08:35:12.186177 start: 1.3 download-retry (timeout 00:09:59) [common]
78 08:35:12.186441 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 08:35:12.186928 downloading http://storage.kernelci.org/next/master/next-20241011/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 08:35:12.187210 saving as /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/dtb/meson-g12b-a311d-libretech-cc.dtb
81 08:35:12.187418 total size: 54703 (0 MB)
82 08:35:12.187630 No compression specified
83 08:35:12.221242 progress 59 % (0 MB)
84 08:35:12.222125 progress 100 % (0 MB)
85 08:35:12.222708 0 MB downloaded in 0.04 s (1.48 MB/s)
86 08:35:12.223174 end: 1.3.1 http-download (duration 00:00:00) [common]
88 08:35:12.224005 end: 1.3 download-retry (duration 00:00:00) [common]
89 08:35:12.224289 start: 1.4 download-retry (timeout 00:09:59) [common]
90 08:35:12.224554 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 08:35:12.225002 downloading http://storage.kernelci.org/next/master/next-20241011/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/modules.tar.xz
92 08:35:12.225245 saving as /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/modules/modules.tar
93 08:35:12.225450 total size: 11606984 (11 MB)
94 08:35:12.225660 Using unxz to decompress xz
95 08:35:12.261817 progress 0 % (0 MB)
96 08:35:12.330288 progress 5 % (0 MB)
97 08:35:12.405804 progress 10 % (1 MB)
98 08:35:12.488451 progress 15 % (1 MB)
99 08:35:12.566247 progress 20 % (2 MB)
100 08:35:12.643458 progress 25 % (2 MB)
101 08:35:12.724684 progress 30 % (3 MB)
102 08:35:12.798412 progress 35 % (3 MB)
103 08:35:12.896113 progress 40 % (4 MB)
104 08:35:13.001535 progress 45 % (5 MB)
105 08:35:13.101159 progress 50 % (5 MB)
106 08:35:13.197574 progress 55 % (6 MB)
107 08:35:13.297179 progress 60 % (6 MB)
108 08:35:13.401782 progress 65 % (7 MB)
109 08:35:13.496115 progress 70 % (7 MB)
110 08:35:13.586723 progress 75 % (8 MB)
111 08:35:13.687911 progress 80 % (8 MB)
112 08:35:13.787760 progress 85 % (9 MB)
113 08:35:13.872361 progress 90 % (9 MB)
114 08:35:13.978826 progress 95 % (10 MB)
115 08:35:14.084999 progress 100 % (11 MB)
116 08:35:14.098879 11 MB downloaded in 1.87 s (5.91 MB/s)
117 08:35:14.099529 end: 1.4.1 http-download (duration 00:00:02) [common]
119 08:35:14.100476 end: 1.4 download-retry (duration 00:00:02) [common]
120 08:35:14.100780 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 08:35:14.101075 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 08:35:14.101350 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 08:35:14.101630 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 08:35:14.102209 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8
125 08:35:14.102731 makedir: /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin
126 08:35:14.103116 makedir: /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/tests
127 08:35:14.103477 makedir: /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/results
128 08:35:14.103842 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-add-keys
129 08:35:14.104466 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-add-sources
130 08:35:14.105039 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-background-process-start
131 08:35:14.105611 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-background-process-stop
132 08:35:14.106209 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-common-functions
133 08:35:14.106770 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-echo-ipv4
134 08:35:14.107367 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-install-packages
135 08:35:14.108095 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-installed-packages
136 08:35:14.108670 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-os-build
137 08:35:14.109221 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-probe-channel
138 08:35:14.109769 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-probe-ip
139 08:35:14.110316 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-target-ip
140 08:35:14.110856 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-target-mac
141 08:35:14.111393 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-target-storage
142 08:35:14.111961 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-test-case
143 08:35:14.112549 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-test-event
144 08:35:14.113125 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-test-feedback
145 08:35:14.113675 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-test-raise
146 08:35:14.114217 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-test-reference
147 08:35:14.114916 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-test-runner
148 08:35:14.115483 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-test-set
149 08:35:14.116056 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-test-shell
150 08:35:14.116635 Updating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-install-packages (oe)
151 08:35:14.117239 Updating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/bin/lava-installed-packages (oe)
152 08:35:14.117748 Creating /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/environment
153 08:35:14.118191 LAVA metadata
154 08:35:14.118478 - LAVA_JOB_ID=838547
155 08:35:14.118717 - LAVA_DISPATCHER_IP=192.168.6.2
156 08:35:14.119113 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 08:35:14.120376 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 08:35:14.120737 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 08:35:14.120969 skipped lava-vland-overlay
160 08:35:14.121240 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 08:35:14.121527 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 08:35:14.121770 skipped lava-multinode-overlay
163 08:35:14.122040 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 08:35:14.122317 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 08:35:14.122577 Loading test definitions
166 08:35:14.122878 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 08:35:14.123122 Using /lava-838547 at stage 0
168 08:35:14.124508 uuid=838547_1.5.2.4.1 testdef=None
169 08:35:14.124860 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 08:35:14.125157 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 08:35:14.127130 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 08:35:14.128017 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 08:35:14.130500 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 08:35:14.131428 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 08:35:14.133872 runner path: /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/0/tests/0_dmesg test_uuid 838547_1.5.2.4.1
178 08:35:14.134522 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 08:35:14.135347 Creating lava-test-runner.conf files
181 08:35:14.135573 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/838547/lava-overlay-ofjrdfr8/lava-838547/0 for stage 0
182 08:35:14.135952 - 0_dmesg
183 08:35:14.136384 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 08:35:14.136700 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 08:35:14.162548 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 08:35:14.163007 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 08:35:14.163303 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 08:35:14.163600 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 08:35:14.163895 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 08:35:15.139185 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 08:35:15.140358 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 08:35:15.140668 extracting modules file /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/modules/modules.tar to /var/lib/lava/dispatcher/tmp/838547/extract-overlay-ramdisk-dqohg1b7/ramdisk
193 08:35:16.518816 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 08:35:16.519307 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 08:35:16.519581 [common] Applying overlay /var/lib/lava/dispatcher/tmp/838547/compress-overlay-0_dg9cuf/overlay-1.5.2.5.tar.gz to ramdisk
196 08:35:16.519794 [common] Applying overlay /var/lib/lava/dispatcher/tmp/838547/compress-overlay-0_dg9cuf/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/838547/extract-overlay-ramdisk-dqohg1b7/ramdisk
197 08:35:16.550719 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 08:35:16.551165 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 08:35:16.551436 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 08:35:16.551663 Converting downloaded kernel to a uImage
201 08:35:16.551968 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/kernel/Image /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/kernel/uImage
202 08:35:17.031820 output: Image Name:
203 08:35:17.032274 output: Created: Fri Oct 11 08:35:16 2024
204 08:35:17.032487 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 08:35:17.032693 output: Data Size: 46066176 Bytes = 44986.50 KiB = 43.93 MiB
206 08:35:17.032894 output: Load Address: 01080000
207 08:35:17.033090 output: Entry Point: 01080000
208 08:35:17.033285 output:
209 08:35:17.033616 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 08:35:17.033884 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 08:35:17.034154 start: 1.5.7 configure-preseed-file (timeout 00:09:54) [common]
212 08:35:17.034401 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 08:35:17.034651 start: 1.5.8 compress-ramdisk (timeout 00:09:54) [common]
214 08:35:17.034912 Building ramdisk /var/lib/lava/dispatcher/tmp/838547/extract-overlay-ramdisk-dqohg1b7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/838547/extract-overlay-ramdisk-dqohg1b7/ramdisk
215 08:35:19.539576 >> 181857 blocks
216 08:35:28.113614 Adding RAMdisk u-boot header.
217 08:35:28.114349 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/838547/extract-overlay-ramdisk-dqohg1b7/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/838547/extract-overlay-ramdisk-dqohg1b7/ramdisk.cpio.gz.uboot
218 08:35:28.381187 output: Image Name:
219 08:35:28.381600 output: Created: Fri Oct 11 08:35:28 2024
220 08:35:28.381806 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 08:35:28.382008 output: Data Size: 26063706 Bytes = 25452.84 KiB = 24.86 MiB
222 08:35:28.382205 output: Load Address: 00000000
223 08:35:28.382401 output: Entry Point: 00000000
224 08:35:28.382593 output:
225 08:35:28.383312 rename /var/lib/lava/dispatcher/tmp/838547/extract-overlay-ramdisk-dqohg1b7/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/ramdisk/ramdisk.cpio.gz.uboot
226 08:35:28.383741 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 08:35:28.384082 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 08:35:28.384628 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 08:35:28.385074 No LXC device requested
230 08:35:28.385564 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 08:35:28.386057 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 08:35:28.386537 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 08:35:28.386939 Checking files for TFTP limit of 4294967296 bytes.
234 08:35:28.389602 end: 1 tftp-deploy (duration 00:00:17) [common]
235 08:35:28.390178 start: 2 uboot-action (timeout 00:05:00) [common]
236 08:35:28.390696 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 08:35:28.391188 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 08:35:28.391680 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 08:35:28.392232 Using kernel file from prepare-kernel: 838547/tftp-deploy-jj604rnd/kernel/uImage
240 08:35:28.392855 substitutions:
241 08:35:28.393262 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 08:35:28.393659 - {DTB_ADDR}: 0x01070000
243 08:35:28.394054 - {DTB}: 838547/tftp-deploy-jj604rnd/dtb/meson-g12b-a311d-libretech-cc.dtb
244 08:35:28.394448 - {INITRD}: 838547/tftp-deploy-jj604rnd/ramdisk/ramdisk.cpio.gz.uboot
245 08:35:28.394838 - {KERNEL_ADDR}: 0x01080000
246 08:35:28.395226 - {KERNEL}: 838547/tftp-deploy-jj604rnd/kernel/uImage
247 08:35:28.395613 - {LAVA_MAC}: None
248 08:35:28.396054 - {PRESEED_CONFIG}: None
249 08:35:28.396451 - {PRESEED_LOCAL}: None
250 08:35:28.396838 - {RAMDISK_ADDR}: 0x08000000
251 08:35:28.397220 - {RAMDISK}: 838547/tftp-deploy-jj604rnd/ramdisk/ramdisk.cpio.gz.uboot
252 08:35:28.397607 - {ROOT_PART}: None
253 08:35:28.397992 - {ROOT}: None
254 08:35:28.398373 - {SERVER_IP}: 192.168.6.2
255 08:35:28.398759 - {TEE_ADDR}: 0x83000000
256 08:35:28.399141 - {TEE}: None
257 08:35:28.399523 Parsed boot commands:
258 08:35:28.399893 - setenv autoload no
259 08:35:28.400301 - setenv initrd_high 0xffffffff
260 08:35:28.400684 - setenv fdt_high 0xffffffff
261 08:35:28.401065 - dhcp
262 08:35:28.401447 - setenv serverip 192.168.6.2
263 08:35:28.401829 - tftpboot 0x01080000 838547/tftp-deploy-jj604rnd/kernel/uImage
264 08:35:28.402211 - tftpboot 0x08000000 838547/tftp-deploy-jj604rnd/ramdisk/ramdisk.cpio.gz.uboot
265 08:35:28.402590 - tftpboot 0x01070000 838547/tftp-deploy-jj604rnd/dtb/meson-g12b-a311d-libretech-cc.dtb
266 08:35:28.402970 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 08:35:28.403357 - bootm 0x01080000 0x08000000 0x01070000
268 08:35:28.403843 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 08:35:28.405329 start: 2.3 connect-device (timeout 00:05:00) [common]
271 08:35:28.405760 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 08:35:28.420343 Setting prompt string to ['lava-test: # ']
273 08:35:28.421821 end: 2.3 connect-device (duration 00:00:00) [common]
274 08:35:28.422423 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 08:35:28.422966 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 08:35:28.423665 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 08:35:28.424461 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 08:35:28.457536 >> OK - accepted request
279 08:35:28.459781 Returned 0 in 0 seconds
280 08:35:28.560885 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 08:35:28.562460 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 08:35:28.563025 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 08:35:28.563518 Setting prompt string to ['Hit any key to stop autoboot']
285 08:35:28.563970 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 08:35:28.565618 Trying 192.168.56.21...
287 08:35:28.566089 Connected to conserv1.
288 08:35:28.566491 Escape character is '^]'.
289 08:35:28.566907
290 08:35:28.567324 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 08:35:28.567759
292 08:35:39.703361 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
293 08:35:39.703780 bl2_stage_init 0x01
294 08:35:39.704050 bl2_stage_init 0x81
295 08:35:39.708874 hw id: 0x0000 - pwm id 0x01
296 08:35:39.709174 bl2_stage_init 0xc1
297 08:35:39.709403 bl2_stage_init 0x02
298 08:35:39.709617
299 08:35:39.714256 L0:00000000
300 08:35:39.714521 L1:20000703
301 08:35:39.714737 L2:00008067
302 08:35:39.714939 L3:14000000
303 08:35:39.717322 B2:00402000
304 08:35:39.717575 B1:e0f83180
305 08:35:39.717782
306 08:35:39.717985 TE: 58124
307 08:35:39.718187
308 08:35:39.728646 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
309 08:35:39.728916
310 08:35:39.729125 Board ID = 1
311 08:35:39.729329 Set A53 clk to 24M
312 08:35:39.729531 Set A73 clk to 24M
313 08:35:39.734089 Set clk81 to 24M
314 08:35:39.734357 A53 clk: 1200 MHz
315 08:35:39.734565 A73 clk: 1200 MHz
316 08:35:39.737814 CLK81: 166.6M
317 08:35:39.738066 smccc: 00012a92
318 08:35:39.743532 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
319 08:35:39.743779 board id: 1
320 08:35:39.752620 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 08:35:39.764192 fw parse done
322 08:35:39.769248 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 08:35:39.812005 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 08:35:39.824002 PIEI prepare done
325 08:35:39.824354 fastboot data load
326 08:35:39.824573 fastboot data verify
327 08:35:39.829358 verify result: 266
328 08:35:39.835121 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
329 08:35:39.835451 LPDDR4 probe
330 08:35:39.835670 ddr clk to 1584MHz
331 08:35:39.842101 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 08:35:39.879285
333 08:35:39.879657 dmc_version 0001
334 08:35:39.885890 Check phy result
335 08:35:39.892772 INFO : End of CA training
336 08:35:39.893034 INFO : End of initialization
337 08:35:39.898407 INFO : Training has run successfully!
338 08:35:39.898666 Check phy result
339 08:35:39.903940 INFO : End of initialization
340 08:35:39.904218 INFO : End of read enable training
341 08:35:39.907210 INFO : End of fine write leveling
342 08:35:39.912740 INFO : End of Write leveling coarse delay
343 08:35:39.918421 INFO : Training has run successfully!
344 08:35:39.918697 Check phy result
345 08:35:39.918910 INFO : End of initialization
346 08:35:39.923968 INFO : End of read dq deskew training
347 08:35:39.929592 INFO : End of MPR read delay center optimization
348 08:35:39.929852 INFO : End of write delay center optimization
349 08:35:39.935176 INFO : End of read delay center optimization
350 08:35:39.940787 INFO : End of max read latency training
351 08:35:39.941046 INFO : Training has run successfully!
352 08:35:39.946397 1D training succeed
353 08:35:39.952343 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 08:35:39.999894 Check phy result
355 08:35:40.000249 INFO : End of initialization
356 08:35:40.020738 INFO : End of 2D read delay Voltage center optimization
357 08:35:40.040203 INFO : End of 2D read delay Voltage center optimization
358 08:35:40.092233 INFO : End of 2D write delay Voltage center optimization
359 08:35:40.142513 INFO : End of 2D write delay Voltage center optimization
360 08:35:40.148133 INFO : Training has run successfully!
361 08:35:40.148471
362 08:35:40.148713 channel==0
363 08:35:40.153728 RxClkDly_Margin_A0==88 ps 9
364 08:35:40.154052 TxDqDly_Margin_A0==98 ps 10
365 08:35:40.157026 RxClkDly_Margin_A1==88 ps 9
366 08:35:40.157328 TxDqDly_Margin_A1==88 ps 9
367 08:35:40.162560 TrainedVREFDQ_A0==74
368 08:35:40.162876 TrainedVREFDQ_A1==74
369 08:35:40.163115 VrefDac_Margin_A0==25
370 08:35:40.168211 DeviceVref_Margin_A0==40
371 08:35:40.168506 VrefDac_Margin_A1==25
372 08:35:40.173799 DeviceVref_Margin_A1==40
373 08:35:40.174119
374 08:35:40.174331
375 08:35:40.174536 channel==1
376 08:35:40.174736 RxClkDly_Margin_A0==88 ps 9
377 08:35:40.177103 TxDqDly_Margin_A0==98 ps 10
378 08:35:40.182647 RxClkDly_Margin_A1==88 ps 9
379 08:35:40.182955 TxDqDly_Margin_A1==88 ps 9
380 08:35:40.183169 TrainedVREFDQ_A0==77
381 08:35:40.188253 TrainedVREFDQ_A1==77
382 08:35:40.188542 VrefDac_Margin_A0==23
383 08:35:40.194003 DeviceVref_Margin_A0==37
384 08:35:40.194302 VrefDac_Margin_A1==24
385 08:35:40.194515 DeviceVref_Margin_A1==37
386 08:35:40.194725
387 08:35:40.202790 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 08:35:40.203137
389 08:35:40.230765 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000019 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
390 08:35:40.231193 2D training succeed
391 08:35:40.241994 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 08:35:40.242366 auto size-- 65535DDR cs0 size: 2048MB
393 08:35:40.242592 DDR cs1 size: 2048MB
394 08:35:40.247588 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 08:35:40.247917 cs0 DataBus test pass
396 08:35:40.253223 cs1 DataBus test pass
397 08:35:40.253557 cs0 AddrBus test pass
398 08:35:40.258899 cs1 AddrBus test pass
399 08:35:40.259246
400 08:35:40.259465 100bdlr_step_size ps== 420
401 08:35:40.259682 result report
402 08:35:40.264402 boot times 0Enable ddr reg access
403 08:35:40.269889 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 08:35:40.283279 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
405 08:35:40.857237 0.0;M3 CHK:0;cm4_sp_mode 0
406 08:35:40.857670 MVN_1=0x00000000
407 08:35:40.862715 MVN_2=0x00000000
408 08:35:40.868513 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
409 08:35:40.868804 OPS=0x10
410 08:35:40.869016 ring efuse init
411 08:35:40.869231 chipver efuse init
412 08:35:40.876685 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
413 08:35:40.876975 [0.018961 Inits done]
414 08:35:40.883307 secure task start!
415 08:35:40.883783 high task start!
416 08:35:40.884170 low task start!
417 08:35:40.884542 run into bl31
418 08:35:40.890984 NOTICE: BL31: v1.3(release):4fc40b1
419 08:35:40.897762 NOTICE: BL31: Built : 15:58:17, May 22 2019
420 08:35:40.898109 NOTICE: BL31: G12A normal boot!
421 08:35:40.924138 NOTICE: BL31: BL33 decompress pass
422 08:35:40.928868 ERROR: Error initializing runtime service opteed_fast
423 08:35:42.162650
424 08:35:42.163079
425 08:35:42.170561 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
426 08:35:42.170960
427 08:35:42.171285 Model: Libre Computer AML-A311D-CC Alta
428 08:35:42.379518 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
429 08:35:42.401966 DRAM: 2 GiB (effective 3.8 GiB)
430 08:35:42.545885 Core: 408 devices, 31 uclasses, devicetree: separate
431 08:35:42.551652 WDT: Not starting watchdog@f0d0
432 08:35:42.584021 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
433 08:35:42.596403 Loading Environment from FAT... Card did not respond to voltage select! : -110
434 08:35:42.600408 ** Bad device specification mmc 0 **
435 08:35:42.611708 Card did not respond to voltage select! : -110
436 08:35:42.618380 ** Bad device specification mmc 0 **
437 08:35:42.618660 Couldn't find partition mmc 0
438 08:35:42.627759 Card did not respond to voltage select! : -110
439 08:35:42.633172 ** Bad device specification mmc 0 **
440 08:35:42.633561 Couldn't find partition mmc 0
441 08:35:42.637286 Error: could not access storage.
442 08:35:43.903514 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
443 08:35:43.904226 bl2_stage_init 0x01
444 08:35:43.904721 bl2_stage_init 0x81
445 08:35:43.909016 hw id: 0x0000 - pwm id 0x01
446 08:35:43.909510 bl2_stage_init 0xc1
447 08:35:43.909965 bl2_stage_init 0x02
448 08:35:43.910413
449 08:35:43.914571 L0:00000000
450 08:35:43.915060 L1:20000703
451 08:35:43.915508 L2:00008067
452 08:35:43.915949 L3:14000000
453 08:35:43.920209 B2:00402000
454 08:35:43.920695 B1:e0f83180
455 08:35:43.921143
456 08:35:43.921589 TE: 58167
457 08:35:43.922036
458 08:35:43.925761 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
459 08:35:43.926252
460 08:35:43.926700 Board ID = 1
461 08:35:43.931503 Set A53 clk to 24M
462 08:35:43.932019 Set A73 clk to 24M
463 08:35:43.932478 Set clk81 to 24M
464 08:35:43.936998 A53 clk: 1200 MHz
465 08:35:43.937480 A73 clk: 1200 MHz
466 08:35:43.937930 CLK81: 166.6M
467 08:35:43.938371 smccc: 00012abd
468 08:35:43.943363 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
469 08:35:43.948183 board id: 1
470 08:35:43.953473 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
471 08:35:43.964686 fw parse done
472 08:35:43.969747 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
473 08:35:44.013097 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
474 08:35:44.024216 PIEI prepare done
475 08:35:44.024708 fastboot data load
476 08:35:44.025159 fastboot data verify
477 08:35:44.029953 verify result: 266
478 08:35:44.035574 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
479 08:35:44.036123 LPDDR4 probe
480 08:35:44.036576 ddr clk to 1584MHz
481 08:35:44.042963 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
482 08:35:44.079813
483 08:35:44.080387 dmc_version 0001
484 08:35:44.086513 Check phy result
485 08:35:44.093342 INFO : End of CA training
486 08:35:44.093881 INFO : End of initialization
487 08:35:44.098937 INFO : Training has run successfully!
488 08:35:44.099466 Check phy result
489 08:35:44.104603 INFO : End of initialization
490 08:35:44.105105 INFO : End of read enable training
491 08:35:44.110069 INFO : End of fine write leveling
492 08:35:44.115682 INFO : End of Write leveling coarse delay
493 08:35:44.116216 INFO : Training has run successfully!
494 08:35:44.116668 Check phy result
495 08:35:44.121327 INFO : End of initialization
496 08:35:44.121825 INFO : End of read dq deskew training
497 08:35:44.126889 INFO : End of MPR read delay center optimization
498 08:35:44.132621 INFO : End of write delay center optimization
499 08:35:44.138103 INFO : End of read delay center optimization
500 08:35:44.138610 INFO : End of max read latency training
501 08:35:44.143680 INFO : Training has run successfully!
502 08:35:44.144233 1D training succeed
503 08:35:44.152836 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
504 08:35:44.200340 Check phy result
505 08:35:44.200897 INFO : End of initialization
506 08:35:44.221275 INFO : End of 2D read delay Voltage center optimization
507 08:35:44.241519 INFO : End of 2D read delay Voltage center optimization
508 08:35:44.294542 INFO : End of 2D write delay Voltage center optimization
509 08:35:44.343917 INFO : End of 2D write delay Voltage center optimization
510 08:35:44.349435 INFO : Training has run successfully!
511 08:35:44.349950
512 08:35:44.350404 channel==0
513 08:35:44.355003 RxClkDly_Margin_A0==88 ps 9
514 08:35:44.355525 TxDqDly_Margin_A0==98 ps 10
515 08:35:44.360673 RxClkDly_Margin_A1==88 ps 9
516 08:35:44.361182 TxDqDly_Margin_A1==98 ps 10
517 08:35:44.361638 TrainedVREFDQ_A0==74
518 08:35:44.366187 TrainedVREFDQ_A1==74
519 08:35:44.366696 VrefDac_Margin_A0==25
520 08:35:44.367145 DeviceVref_Margin_A0==40
521 08:35:44.371827 VrefDac_Margin_A1==25
522 08:35:44.372410 DeviceVref_Margin_A1==40
523 08:35:44.372880
524 08:35:44.373326
525 08:35:44.377451 channel==1
526 08:35:44.377981 RxClkDly_Margin_A0==98 ps 10
527 08:35:44.378427 TxDqDly_Margin_A0==98 ps 10
528 08:35:44.383041 RxClkDly_Margin_A1==98 ps 10
529 08:35:44.383549 TxDqDly_Margin_A1==88 ps 9
530 08:35:44.388639 TrainedVREFDQ_A0==77
531 08:35:44.389167 TrainedVREFDQ_A1==77
532 08:35:44.389629 VrefDac_Margin_A0==22
533 08:35:44.394202 DeviceVref_Margin_A0==37
534 08:35:44.394722 VrefDac_Margin_A1==24
535 08:35:44.399825 DeviceVref_Margin_A1==37
536 08:35:44.400368
537 08:35:44.400819 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
538 08:35:44.405408
539 08:35:44.433345 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000018 00000019 00000019 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
540 08:35:44.433945 2D training succeed
541 08:35:44.439017 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
542 08:35:44.444667 auto size-- 65535DDR cs0 size: 2048MB
543 08:35:44.445197 DDR cs1 size: 2048MB
544 08:35:44.450203 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
545 08:35:44.450732 cs0 DataBus test pass
546 08:35:44.455836 cs1 DataBus test pass
547 08:35:44.456444 cs0 AddrBus test pass
548 08:35:44.456905 cs1 AddrBus test pass
549 08:35:44.457383
550 08:35:44.461573 100bdlr_step_size ps== 420
551 08:35:44.462114 result report
552 08:35:44.466940 boot times 0Enable ddr reg access
553 08:35:44.471977 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
554 08:35:44.488603 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
555 08:35:45.059727 0.0;M3 CHK:0;cm4_sp_mode 0
556 08:35:45.060462 MVN_1=0x00000000
557 08:35:45.065140 MVN_2=0x00000000
558 08:35:45.070959 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
559 08:35:45.071583 OPS=0x10
560 08:35:45.072105 ring efuse init
561 08:35:45.072612 chipver efuse init
562 08:35:45.077056 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
563 08:35:45.082181 [0.018960 Inits done]
564 08:35:45.082803 secure task start!
565 08:35:45.083271 high task start!
566 08:35:45.086814 low task start!
567 08:35:45.087377 run into bl31
568 08:35:45.093418 NOTICE: BL31: v1.3(release):4fc40b1
569 08:35:45.101246 NOTICE: BL31: Built : 15:58:17, May 22 2019
570 08:35:45.101864 NOTICE: BL31: G12A normal boot!
571 08:35:45.126540 NOTICE: BL31: BL33 decompress pass
572 08:35:45.132271 ERROR: Error initializing runtime service opteed_fast
573 08:35:46.365081
574 08:35:46.365508
575 08:35:46.373571 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
576 08:35:46.374157
577 08:35:46.374627 Model: Libre Computer AML-A311D-CC Alta
578 08:35:46.582137 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
579 08:35:46.605416 DRAM: 2 GiB (effective 3.8 GiB)
580 08:35:46.748566 Core: 408 devices, 31 uclasses, devicetree: separate
581 08:35:46.754218 WDT: Not starting watchdog@f0d0
582 08:35:46.786561 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
583 08:35:46.799035 Loading Environment from FAT... Card did not respond to voltage select! : -110
584 08:35:46.803813 ** Bad device specification mmc 0 **
585 08:35:46.814221 Card did not respond to voltage select! : -110
586 08:35:46.822035 ** Bad device specification mmc 0 **
587 08:35:46.822672 Couldn't find partition mmc 0
588 08:35:46.830335 Card did not respond to voltage select! : -110
589 08:35:46.835753 ** Bad device specification mmc 0 **
590 08:35:46.836305 Couldn't find partition mmc 0
591 08:35:46.840848 Error: could not access storage.
592 08:35:47.183380 Net: eth0: ethernet@ff3f0000
593 08:35:47.184049 starting USB...
594 08:35:47.435375 Bus usb@ff500000: Register 3000140 NbrPorts 3
595 08:35:47.436089 Starting the controller
596 08:35:47.442226 USB XHCI 1.10
597 08:35:49.152493 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
598 08:35:49.153077 bl2_stage_init 0x01
599 08:35:49.153540 bl2_stage_init 0x81
600 08:35:49.157775 hw id: 0x0000 - pwm id 0x01
601 08:35:49.158059 bl2_stage_init 0xc1
602 08:35:49.158302 bl2_stage_init 0x02
603 08:35:49.158532
604 08:35:49.163398 L0:00000000
605 08:35:49.163783 L1:20000703
606 08:35:49.164132 L2:00008067
607 08:35:49.164474 L3:14000000
608 08:35:49.169297 B2:00402000
609 08:35:49.169675 B1:e0f83180
610 08:35:49.169980
611 08:35:49.170319 TE: 58167
612 08:35:49.170675
613 08:35:49.174955 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
614 08:35:49.175242
615 08:35:49.175483 Board ID = 1
616 08:35:49.180865 Set A53 clk to 24M
617 08:35:49.181147 Set A73 clk to 24M
618 08:35:49.181385 Set clk81 to 24M
619 08:35:49.185603 A53 clk: 1200 MHz
620 08:35:49.185870 A73 clk: 1200 MHz
621 08:35:49.186104 CLK81: 166.6M
622 08:35:49.186335 smccc: 00012abd
623 08:35:49.191213 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
624 08:35:49.196938 board id: 1
625 08:35:49.202865 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
626 08:35:49.213414 fw parse done
627 08:35:49.219621 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
628 08:35:49.261998 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
629 08:35:49.272904 PIEI prepare done
630 08:35:49.273177 fastboot data load
631 08:35:49.273414 fastboot data verify
632 08:35:49.278459 verify result: 266
633 08:35:49.284156 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
634 08:35:49.284428 LPDDR4 probe
635 08:35:49.284662 ddr clk to 1584MHz
636 08:35:49.292056 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
637 08:35:49.329311
638 08:35:49.329726 dmc_version 0001
639 08:35:49.336103 Check phy result
640 08:35:49.341953 INFO : End of CA training
641 08:35:49.342334 INFO : End of initialization
642 08:35:49.347473 INFO : Training has run successfully!
643 08:35:49.347748 Check phy result
644 08:35:49.353196 INFO : End of initialization
645 08:35:49.353470 INFO : End of read enable training
646 08:35:49.358673 INFO : End of fine write leveling
647 08:35:49.364250 INFO : End of Write leveling coarse delay
648 08:35:49.364520 INFO : Training has run successfully!
649 08:35:49.364758 Check phy result
650 08:35:49.369926 INFO : End of initialization
651 08:35:49.370191 INFO : End of read dq deskew training
652 08:35:49.375484 INFO : End of MPR read delay center optimization
653 08:35:49.381027 INFO : End of write delay center optimization
654 08:35:49.386623 INFO : End of read delay center optimization
655 08:35:49.386927 INFO : End of max read latency training
656 08:35:49.392330 INFO : Training has run successfully!
657 08:35:49.392844 1D training succeed
658 08:35:49.401466 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
659 08:35:49.449148 Check phy result
660 08:35:49.449452 INFO : End of initialization
661 08:35:49.471544 INFO : End of 2D read delay Voltage center optimization
662 08:35:49.491631 INFO : End of 2D read delay Voltage center optimization
663 08:35:49.543610 INFO : End of 2D write delay Voltage center optimization
664 08:35:49.592773 INFO : End of 2D write delay Voltage center optimization
665 08:35:49.598307 INFO : Training has run successfully!
666 08:35:49.598719
667 08:35:49.599064 channel==0
668 08:35:49.604019 RxClkDly_Margin_A0==88 ps 9
669 08:35:49.604393 TxDqDly_Margin_A0==98 ps 10
670 08:35:49.607359 RxClkDly_Margin_A1==88 ps 9
671 08:35:49.607739 TxDqDly_Margin_A1==98 ps 10
672 08:35:49.612977 TrainedVREFDQ_A0==74
673 08:35:49.613384 TrainedVREFDQ_A1==74
674 08:35:49.613694 VrefDac_Margin_A0==24
675 08:35:49.618588 DeviceVref_Margin_A0==40
676 08:35:49.618977 VrefDac_Margin_A1==24
677 08:35:49.624200 DeviceVref_Margin_A1==40
678 08:35:49.624569
679 08:35:49.624937
680 08:35:49.625246 channel==1
681 08:35:49.625606 RxClkDly_Margin_A0==98 ps 10
682 08:35:49.629739 TxDqDly_Margin_A0==88 ps 9
683 08:35:49.630111 RxClkDly_Margin_A1==88 ps 9
684 08:35:49.635393 TxDqDly_Margin_A1==88 ps 9
685 08:35:49.635849 TrainedVREFDQ_A0==76
686 08:35:49.636150 TrainedVREFDQ_A1==77
687 08:35:49.641035 VrefDac_Margin_A0==22
688 08:35:49.641455 DeviceVref_Margin_A0==38
689 08:35:49.646508 VrefDac_Margin_A1==24
690 08:35:49.646774 DeviceVref_Margin_A1==37
691 08:35:49.647011
692 08:35:49.652154 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
693 08:35:49.652417
694 08:35:49.680155 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
695 08:35:49.685748 2D training succeed
696 08:35:49.691345 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
697 08:35:49.691716 auto size-- 65535DDR cs0 size: 2048MB
698 08:35:49.696954 DDR cs1 size: 2048MB
699 08:35:49.697333 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
700 08:35:49.702485 cs0 DataBus test pass
701 08:35:49.702856 cs1 DataBus test pass
702 08:35:49.703194 cs0 AddrBus test pass
703 08:35:49.708275 cs1 AddrBus test pass
704 08:35:49.709095
705 08:35:49.709732 100bdlr_step_size ps== 420
706 08:35:49.710047 result report
707 08:35:49.713768 boot times 0Enable ddr reg access
708 08:35:49.721193 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
709 08:35:49.734680 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
710 08:35:50.306606 0.0;M3 CHK:0;cm4_sp_mode 0
711 08:35:50.307179 MVN_1=0x00000000
712 08:35:50.312233 MVN_2=0x00000000
713 08:35:50.317866 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
714 08:35:50.318139 OPS=0x10
715 08:35:50.318351 ring efuse init
716 08:35:50.318552 chipver efuse init
717 08:35:50.325985 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
718 08:35:50.326266 [0.018961 Inits done]
719 08:35:50.332987 secure task start!
720 08:35:50.333229 high task start!
721 08:35:50.333429 low task start!
722 08:35:50.333624 run into bl31
723 08:35:50.340379 NOTICE: BL31: v1.3(release):4fc40b1
724 08:35:50.348126 NOTICE: BL31: Built : 15:58:17, May 22 2019
725 08:35:50.348421 NOTICE: BL31: G12A normal boot!
726 08:35:50.373601 NOTICE: BL31: BL33 decompress pass
727 08:35:50.378337 ERROR: Error initializing runtime service opteed_fast
728 08:35:51.612246
729 08:35:51.613011
730 08:35:51.619795 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
731 08:35:51.620266
732 08:35:51.620599 Model: Libre Computer AML-A311D-CC Alta
733 08:35:51.829073 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
734 08:35:51.852315 DRAM: 2 GiB (effective 3.8 GiB)
735 08:35:51.995409 Core: 408 devices, 31 uclasses, devicetree: separate
736 08:35:52.000527 WDT: Not starting watchdog@f0d0
737 08:35:52.033535 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
738 08:35:52.045944 Loading Environment from FAT... Card did not respond to voltage select! : -110
739 08:35:52.050966 ** Bad device specification mmc 0 **
740 08:35:52.061289 Card did not respond to voltage select! : -110
741 08:35:52.069022 ** Bad device specification mmc 0 **
742 08:35:52.069376 Couldn't find partition mmc 0
743 08:35:52.077311 Card did not respond to voltage select! : -110
744 08:35:52.082772 ** Bad device specification mmc 0 **
745 08:35:52.083138 Couldn't find partition mmc 0
746 08:35:52.087839 Error: could not access storage.
747 08:35:52.430267 Net: eth0: ethernet@ff3f0000
748 08:35:52.430689 starting USB...
749 08:35:52.682380 Bus usb@ff500000: Register 3000140 NbrPorts 3
750 08:35:52.682795 Starting the controller
751 08:35:52.689104 USB XHCI 1.10
752 08:35:54.852597 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
753 08:35:54.853025 bl2_stage_init 0x01
754 08:35:54.853250 bl2_stage_init 0x81
755 08:35:54.858154 hw id: 0x0000 - pwm id 0x01
756 08:35:54.858468 bl2_stage_init 0xc1
757 08:35:54.858692 bl2_stage_init 0x02
758 08:35:54.858901
759 08:35:54.864152 L0:00000000
760 08:35:54.865725 L1:20000703
761 08:35:54.866003 L2:00008067
762 08:35:54.866221 L3:14000000
763 08:35:54.866787 B2:00402000
764 08:35:54.867054 B1:e0f83180
765 08:35:54.867271
766 08:35:54.867482 TE: 58167
767 08:35:54.867690
768 08:35:54.877861 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
769 08:35:54.878180
770 08:35:54.878399 Board ID = 1
771 08:35:54.878608 Set A53 clk to 24M
772 08:35:54.878815 Set A73 clk to 24M
773 08:35:54.883528 Set clk81 to 24M
774 08:35:54.883845 A53 clk: 1200 MHz
775 08:35:54.884103 A73 clk: 1200 MHz
776 08:35:54.887320 CLK81: 166.6M
777 08:35:54.887592 smccc: 00012abe
778 08:35:54.892456 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
779 08:35:54.898123 board id: 1
780 08:35:54.903436 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
781 08:35:54.913744 fw parse done
782 08:35:54.918856 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
783 08:35:54.962343 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
784 08:35:54.973344 PIEI prepare done
785 08:35:54.973648 fastboot data load
786 08:35:54.973864 fastboot data verify
787 08:35:54.979008 verify result: 266
788 08:35:54.984542 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
789 08:35:54.984840 LPDDR4 probe
790 08:35:54.985055 ddr clk to 1584MHz
791 08:35:54.992410 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
792 08:35:55.030215
793 08:35:55.030552 dmc_version 0001
794 08:35:55.036217 Check phy result
795 08:35:55.042295 INFO : End of CA training
796 08:35:55.042583 INFO : End of initialization
797 08:35:55.048056 INFO : Training has run successfully!
798 08:35:55.048345 Check phy result
799 08:35:55.053527 INFO : End of initialization
800 08:35:55.053801 INFO : End of read enable training
801 08:35:55.059092 INFO : End of fine write leveling
802 08:35:55.064686 INFO : End of Write leveling coarse delay
803 08:35:55.064974 INFO : Training has run successfully!
804 08:35:55.065188 Check phy result
805 08:35:55.070302 INFO : End of initialization
806 08:35:55.070581 INFO : End of read dq deskew training
807 08:35:55.076034 INFO : End of MPR read delay center optimization
808 08:35:55.081509 INFO : End of write delay center optimization
809 08:35:55.087063 INFO : End of read delay center optimization
810 08:35:55.087353 INFO : End of max read latency training
811 08:35:55.092746 INFO : Training has run successfully!
812 08:35:55.093028 1D training succeed
813 08:35:55.101879 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
814 08:35:55.149483 Check phy result
815 08:35:55.149839 INFO : End of initialization
816 08:35:55.171137 INFO : End of 2D read delay Voltage center optimization
817 08:35:55.191057 INFO : End of 2D read delay Voltage center optimization
818 08:35:55.243375 INFO : End of 2D write delay Voltage center optimization
819 08:35:55.292371 INFO : End of 2D write delay Voltage center optimization
820 08:35:55.297919 INFO : Training has run successfully!
821 08:35:55.298270
822 08:35:55.298501 channel==0
823 08:35:55.303509 RxClkDly_Margin_A0==88 ps 9
824 08:35:55.303827 TxDqDly_Margin_A0==98 ps 10
825 08:35:55.309114 RxClkDly_Margin_A1==88 ps 9
826 08:35:55.309422 TxDqDly_Margin_A1==98 ps 10
827 08:35:55.309641 TrainedVREFDQ_A0==74
828 08:35:55.314731 TrainedVREFDQ_A1==74
829 08:35:55.315035 VrefDac_Margin_A0==25
830 08:35:55.315253 DeviceVref_Margin_A0==40
831 08:35:55.321777 VrefDac_Margin_A1==25
832 08:35:55.322100 DeviceVref_Margin_A1==40
833 08:35:55.322318
834 08:35:55.322531
835 08:35:55.325870 channel==1
836 08:35:55.326174 RxClkDly_Margin_A0==98 ps 10
837 08:35:55.326389 TxDqDly_Margin_A0==88 ps 9
838 08:35:55.331496 RxClkDly_Margin_A1==88 ps 9
839 08:35:55.331816 TxDqDly_Margin_A1==88 ps 9
840 08:35:55.337080 TrainedVREFDQ_A0==74
841 08:35:55.337393 TrainedVREFDQ_A1==77
842 08:35:55.337612 VrefDac_Margin_A0==22
843 08:35:55.342697 DeviceVref_Margin_A0==40
844 08:35:55.343015 VrefDac_Margin_A1==24
845 08:35:55.348356 DeviceVref_Margin_A1==37
846 08:35:55.348683
847 08:35:55.348910 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
848 08:35:55.349126
849 08:35:55.381953 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
850 08:35:55.382645 2D training succeed
851 08:35:55.387472 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
852 08:35:55.393029 auto size-- 65535DDR cs0 size: 2048MB
853 08:35:55.393517 DDR cs1 size: 2048MB
854 08:35:55.399121 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
855 08:35:55.399587 cs0 DataBus test pass
856 08:35:55.404256 cs1 DataBus test pass
857 08:35:55.404735 cs0 AddrBus test pass
858 08:35:55.405173 cs1 AddrBus test pass
859 08:35:55.405600
860 08:35:55.409835 100bdlr_step_size ps== 420
861 08:35:55.410307 result report
862 08:35:55.415449 boot times 0Enable ddr reg access
863 08:35:55.421187 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
864 08:35:55.433269 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
865 08:35:56.006288 0.0;M3 CHK:0;cm4_sp_mode 0
866 08:35:56.006987 MVN_1=0x00000000
867 08:35:56.011728 MVN_2=0x00000000
868 08:35:56.017535 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
869 08:35:56.018154 OPS=0x10
870 08:35:56.018662 ring efuse init
871 08:35:56.019155 chipver efuse init
872 08:35:56.023153 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
873 08:35:56.028708 [0.018961 Inits done]
874 08:35:56.029308 secure task start!
875 08:35:56.029770 high task start!
876 08:35:56.032326 low task start!
877 08:35:56.032884 run into bl31
878 08:35:56.039955 NOTICE: BL31: v1.3(release):4fc40b1
879 08:35:56.047775 NOTICE: BL31: Built : 15:58:17, May 22 2019
880 08:35:56.048402 NOTICE: BL31: G12A normal boot!
881 08:35:56.073284 NOTICE: BL31: BL33 decompress pass
882 08:35:56.078760 ERROR: Error initializing runtime service opteed_fast
883 08:35:57.311631
884 08:35:57.312094
885 08:35:57.320067 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
886 08:35:57.320561
887 08:35:57.320898 Model: Libre Computer AML-A311D-CC Alta
888 08:35:57.528521 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
889 08:35:57.551953 DRAM: 2 GiB (effective 3.8 GiB)
890 08:35:57.694870 Core: 408 devices, 31 uclasses, devicetree: separate
891 08:35:57.700706 WDT: Not starting watchdog@f0d0
892 08:35:57.733028 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
893 08:35:57.745457 Loading Environment from FAT... Card did not respond to voltage select! : -110
894 08:35:57.750445 ** Bad device specification mmc 0 **
895 08:35:57.760743 Card did not respond to voltage select! : -110
896 08:35:57.768461 ** Bad device specification mmc 0 **
897 08:35:57.768797 Couldn't find partition mmc 0
898 08:35:57.776749 Card did not respond to voltage select! : -110
899 08:35:57.782248 ** Bad device specification mmc 0 **
900 08:35:57.782576 Couldn't find partition mmc 0
901 08:35:57.786743 Error: could not access storage.
902 08:35:58.129886 Net: eth0: ethernet@ff3f0000
903 08:35:58.130316 starting USB...
904 08:35:58.381604 Bus usb@ff500000: Register 3000140 NbrPorts 3
905 08:35:58.382203 Starting the controller
906 08:35:58.388552 USB XHCI 1.10
907 08:36:00.252292 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
908 08:36:00.252969 bl2_stage_init 0x01
909 08:36:00.253439 bl2_stage_init 0x81
910 08:36:00.257980 hw id: 0x0000 - pwm id 0x01
911 08:36:00.258535 bl2_stage_init 0xc1
912 08:36:00.259004 bl2_stage_init 0x02
913 08:36:00.259460
914 08:36:00.263450 L0:00000000
915 08:36:00.264020 L1:20000703
916 08:36:00.264497 L2:00008067
917 08:36:00.264946 L3:14000000
918 08:36:00.269079 B2:00402000
919 08:36:00.269610 B1:e0f83180
920 08:36:00.270065
921 08:36:00.270515 TE: 58167
922 08:36:00.270960
923 08:36:00.274628 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
924 08:36:00.275183
925 08:36:00.275647 Board ID = 1
926 08:36:00.280279 Set A53 clk to 24M
927 08:36:00.280807 Set A73 clk to 24M
928 08:36:00.281259 Set clk81 to 24M
929 08:36:00.285948 A53 clk: 1200 MHz
930 08:36:00.286472 A73 clk: 1200 MHz
931 08:36:00.286922 CLK81: 166.6M
932 08:36:00.287361 smccc: 00012abe
933 08:36:00.291440 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
934 08:36:00.297070 board id: 1
935 08:36:00.303039 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
936 08:36:00.313654 fw parse done
937 08:36:00.319454 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
938 08:36:00.362003 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
939 08:36:00.372938 PIEI prepare done
940 08:36:00.373456 fastboot data load
941 08:36:00.373895 fastboot data verify
942 08:36:00.378608 verify result: 266
943 08:36:00.384257 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
944 08:36:00.384764 LPDDR4 probe
945 08:36:00.385197 ddr clk to 1584MHz
946 08:36:00.392046 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
947 08:36:00.429568
948 08:36:00.430221 dmc_version 0001
949 08:36:00.436084 Check phy result
950 08:36:00.442028 INFO : End of CA training
951 08:36:00.442551 INFO : End of initialization
952 08:36:00.447716 INFO : Training has run successfully!
953 08:36:00.448303 Check phy result
954 08:36:00.453281 INFO : End of initialization
955 08:36:00.453817 INFO : End of read enable training
956 08:36:00.458900 INFO : End of fine write leveling
957 08:36:00.464430 INFO : End of Write leveling coarse delay
958 08:36:00.464953 INFO : Training has run successfully!
959 08:36:00.465408 Check phy result
960 08:36:00.469997 INFO : End of initialization
961 08:36:00.470519 INFO : End of read dq deskew training
962 08:36:00.475635 INFO : End of MPR read delay center optimization
963 08:36:00.481190 INFO : End of write delay center optimization
964 08:36:00.486885 INFO : End of read delay center optimization
965 08:36:00.487434 INFO : End of max read latency training
966 08:36:00.492435 INFO : Training has run successfully!
967 08:36:00.492980 1D training succeed
968 08:36:00.501534 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
969 08:36:00.549245 Check phy result
970 08:36:00.549830 INFO : End of initialization
971 08:36:00.571033 INFO : End of 2D read delay Voltage center optimization
972 08:36:00.591217 INFO : End of 2D read delay Voltage center optimization
973 08:36:00.643285 INFO : End of 2D write delay Voltage center optimization
974 08:36:00.692657 INFO : End of 2D write delay Voltage center optimization
975 08:36:00.698197 INFO : Training has run successfully!
976 08:36:00.698728
977 08:36:00.699184 channel==0
978 08:36:00.703824 RxClkDly_Margin_A0==88 ps 9
979 08:36:00.704382 TxDqDly_Margin_A0==98 ps 10
980 08:36:00.709388 RxClkDly_Margin_A1==88 ps 9
981 08:36:00.709914 TxDqDly_Margin_A1==98 ps 10
982 08:36:00.710369 TrainedVREFDQ_A0==74
983 08:36:00.714996 TrainedVREFDQ_A1==74
984 08:36:00.715523 VrefDac_Margin_A0==25
985 08:36:00.715976 DeviceVref_Margin_A0==40
986 08:36:00.720597 VrefDac_Margin_A1==25
987 08:36:00.721120 DeviceVref_Margin_A1==40
988 08:36:00.721570
989 08:36:00.722022
990 08:36:00.726200 channel==1
991 08:36:00.726732 RxClkDly_Margin_A0==98 ps 10
992 08:36:00.727181 TxDqDly_Margin_A0==98 ps 10
993 08:36:00.731967 RxClkDly_Margin_A1==88 ps 9
994 08:36:00.732534 TxDqDly_Margin_A1==88 ps 9
995 08:36:00.737392 TrainedVREFDQ_A0==77
996 08:36:00.737939 TrainedVREFDQ_A1==77
997 08:36:00.738398 VrefDac_Margin_A0==22
998 08:36:00.743005 DeviceVref_Margin_A0==37
999 08:36:00.743530 VrefDac_Margin_A1==24
1000 08:36:00.748606 DeviceVref_Margin_A1==37
1001 08:36:00.749137
1002 08:36:00.749589 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1003 08:36:00.750041
1004 08:36:00.782137 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
1005 08:36:00.782777 2D training succeed
1006 08:36:00.787843 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1007 08:36:00.793397 auto size-- 65535DDR cs0 size: 2048MB
1008 08:36:00.794028 DDR cs1 size: 2048MB
1009 08:36:00.798990 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1010 08:36:00.799582 cs0 DataBus test pass
1011 08:36:00.804685 cs1 DataBus test pass
1012 08:36:00.805346 cs0 AddrBus test pass
1013 08:36:00.805873 cs1 AddrBus test pass
1014 08:36:00.806353
1015 08:36:00.810218 100bdlr_step_size ps== 420
1016 08:36:00.810833 result report
1017 08:36:00.815802 boot times 0Enable ddr reg access
1018 08:36:00.821164 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1019 08:36:00.834599 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1020 08:36:01.407605 0.0;M3 CHK:0;cm4_sp_mode 0
1021 08:36:01.408349 MVN_1=0x00000000
1022 08:36:01.413141 MVN_2=0x00000000
1023 08:36:01.418950 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1024 08:36:01.419496 OPS=0x10
1025 08:36:01.419963 ring efuse init
1026 08:36:01.420464 chipver efuse init
1027 08:36:01.424477 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1028 08:36:01.430076 [0.018961 Inits done]
1029 08:36:01.430610 secure task start!
1030 08:36:01.431065 high task start!
1031 08:36:01.434669 low task start!
1032 08:36:01.435210 run into bl31
1033 08:36:01.441326 NOTICE: BL31: v1.3(release):4fc40b1
1034 08:36:01.449131 NOTICE: BL31: Built : 15:58:17, May 22 2019
1035 08:36:01.449686 NOTICE: BL31: G12A normal boot!
1036 08:36:01.474495 NOTICE: BL31: BL33 decompress pass
1037 08:36:01.480152 ERROR: Error initializing runtime service opteed_fast
1038 08:36:02.712994
1039 08:36:02.713666
1040 08:36:02.721436 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1041 08:36:02.721994
1042 08:36:02.722460 Model: Libre Computer AML-A311D-CC Alta
1043 08:36:02.929643 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1044 08:36:02.953092 DRAM: 2 GiB (effective 3.8 GiB)
1045 08:36:03.096258 Core: 408 devices, 31 uclasses, devicetree: separate
1046 08:36:03.102074 WDT: Not starting watchdog@f0d0
1047 08:36:03.134325 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1048 08:36:03.146804 Loading Environment from FAT... Card did not respond to voltage select! : -110
1049 08:36:03.151743 ** Bad device specification mmc 0 **
1050 08:36:03.162121 Card did not respond to voltage select! : -110
1051 08:36:03.169741 ** Bad device specification mmc 0 **
1052 08:36:03.170284 Couldn't find partition mmc 0
1053 08:36:03.178171 Card did not respond to voltage select! : -110
1054 08:36:03.183634 ** Bad device specification mmc 0 **
1055 08:36:03.184225 Couldn't find partition mmc 0
1056 08:36:03.188693 Error: could not access storage.
1057 08:36:03.533121 Net: eth0: ethernet@ff3f0000
1058 08:36:03.533534 starting USB...
1059 08:36:03.784161 Bus usb@ff500000: Register 3000140 NbrPorts 3
1060 08:36:03.784796 Starting the controller
1061 08:36:03.791077 USB XHCI 1.10
1062 08:36:05.345114 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1063 08:36:05.353507 scanning usb for storage devices... 0 Storage Device(s) found
1065 08:36:05.404553 Hit any key to stop autoboot: 1
1066 08:36:05.405704 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1067 08:36:05.406344 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1068 08:36:05.406908 Setting prompt string to ['=>']
1069 08:36:05.407442 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1070 08:36:05.420954 0
1071 08:36:05.421934 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1072 08:36:05.422455 Sending with 10 millisecond of delay
1074 08:36:06.557889 => setenv autoload no
1075 08:36:06.568546 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1076 08:36:06.575613 setenv autoload no
1077 08:36:06.576278 Sending with 10 millisecond of delay
1079 08:36:08.374134 => setenv initrd_high 0xffffffff
1080 08:36:08.384956 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1081 08:36:08.385873 setenv initrd_high 0xffffffff
1082 08:36:08.386654 Sending with 10 millisecond of delay
1084 08:36:10.003159 => setenv fdt_high 0xffffffff
1085 08:36:10.013716 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1086 08:36:10.014233 setenv fdt_high 0xffffffff
1087 08:36:10.014694 Sending with 10 millisecond of delay
1089 08:36:10.306081 => dhcp
1090 08:36:10.316656 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1091 08:36:10.317164 dhcp
1092 08:36:10.317400 Speed: 1000, full duplex
1093 08:36:10.317611 BOOTP broadcast 1
1094 08:36:10.564326 BOOTP broadcast 2
1095 08:36:11.064719 BOOTP broadcast 3
1096 08:36:11.077537 DHCP client bound to address 192.168.6.33 (761 ms)
1097 08:36:11.078449 Sending with 10 millisecond of delay
1099 08:36:12.755470 => setenv serverip 192.168.6.2
1100 08:36:12.766364 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1101 08:36:12.767287 setenv serverip 192.168.6.2
1102 08:36:12.768082 Sending with 10 millisecond of delay
1104 08:36:16.496934 => tftpboot 0x01080000 838547/tftp-deploy-jj604rnd/kernel/uImage
1105 08:36:16.507534 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1106 08:36:16.508147 tftpboot 0x01080000 838547/tftp-deploy-jj604rnd/kernel/uImage
1107 08:36:16.508398 Speed: 1000, full duplex
1108 08:36:16.508610 Using ethernet@ff3f0000 device
1109 08:36:16.510023 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1110 08:36:16.515495 Filename '838547/tftp-deploy-jj604rnd/kernel/uImage'.
1111 08:36:16.518673 Load address: 0x1080000
1112 08:36:20.390013 Loading: *################################################## 43.9 MiB
1113 08:36:20.390435 11.3 MiB/s
1114 08:36:20.390650 done
1115 08:36:20.394584 Bytes transferred = 46066240 (2beea40 hex)
1116 08:36:20.395692 Sending with 10 millisecond of delay
1118 08:36:25.082202 => tftpboot 0x08000000 838547/tftp-deploy-jj604rnd/ramdisk/ramdisk.cpio.gz.uboot
1119 08:36:25.092784 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:03)
1120 08:36:25.093325 tftpboot 0x08000000 838547/tftp-deploy-jj604rnd/ramdisk/ramdisk.cpio.gz.uboot
1121 08:36:25.093564 Speed: 1000, full duplex
1122 08:36:25.093776 Using ethernet@ff3f0000 device
1123 08:36:25.095176 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1124 08:36:25.103818 Filename '838547/tftp-deploy-jj604rnd/ramdisk/ramdisk.cpio.gz.uboot'.
1125 08:36:25.104160 Load address: 0x8000000
1126 08:36:27.795410 Loading: *################################################## 24.9 MiB
1127 08:36:27.795840 9.2 MiB/s
1128 08:36:27.796130 done
1129 08:36:27.799716 Bytes transferred = 26063770 (18db39a hex)
1130 08:36:27.800356 Sending with 10 millisecond of delay
1132 08:36:32.968871 => tftpboot 0x01070000 838547/tftp-deploy-jj604rnd/dtb/meson-g12b-a311d-libretech-cc.dtb
1133 08:36:32.979670 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:03:55)
1134 08:36:32.980513 tftpboot 0x01070000 838547/tftp-deploy-jj604rnd/dtb/meson-g12b-a311d-libretech-cc.dtb
1135 08:36:32.980961 Speed: 1000, full duplex
1136 08:36:32.981370 Using ethernet@ff3f0000 device
1137 08:36:32.984565 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1138 08:36:32.992281 Filename '838547/tftp-deploy-jj604rnd/dtb/meson-g12b-a311d-libretech-cc.dtb'.
1139 08:36:32.997232 Load address: 0x1070000
1140 08:36:33.018028 Loading: *################################################## 53.4 KiB
1141 08:36:33.029288 1.9 MiB/s
1142 08:36:33.029749 done
1143 08:36:33.030161 Bytes transferred = 54703 (d5af hex)
1144 08:36:33.030832 Sending with 10 millisecond of delay
1146 08:36:40.671007 => setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
1147 08:36:40.681857 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:03:48)
1148 08:36:40.682728 setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
1149 08:36:40.683504 Sending with 10 millisecond of delay
1151 08:36:43.024394 => bootm 0x01080000 0x08000000 0x01070000
1152 08:36:43.035250 Setting prompt string to ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1153 08:36:43.035816 bootloader-commands: Wait for prompt ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:03:45)
1154 08:36:43.036965 bootm 0x01080000 0x08000000 0x01070000
1155 08:36:43.037456 ## Booting kernel from Legacy Image at 01080000 ...
1156 08:36:43.040727 Image Name:
1157 08:36:43.045935 Image Type: AArch64 Linux Kernel Image (uncompressed)
1158 08:36:43.046457 Data Size: 46066176 Bytes = 43.9 MiB
1159 08:36:43.051337 Load Address: 01080000
1160 08:36:43.051800 Entry Point: 01080000
1161 08:36:43.248495 Verifying Checksum ... OK
1162 08:36:43.249114 ## Loading init Ramdisk from Legacy Image at 08000000 ...
1163 08:36:43.253414 Image Name:
1164 08:36:43.258941 Image Type: AArch64 Linux RAMDisk Image (uncompressed)
1165 08:36:43.259421 Data Size: 26063706 Bytes = 24.9 MiB
1166 08:36:43.264448 Load Address: 00000000
1167 08:36:43.264919 Entry Point: 00000000
1168 08:36:43.377726 Verifying Checksum ... OK
1169 08:36:43.378357 ## Flattened Device Tree blob at 01070000
1170 08:36:43.383108 Booting using the fdt blob at 0x1070000
1171 08:36:43.383591 Working FDT set to 1070000
1172 08:36:43.387559 Loading Kernel Image
1173 08:36:43.552544 Loading Ramdisk to 7e724000, end 7ffff35a ... OK
1174 08:36:43.560771 Loading Device Tree to 000000007e713000, end 000000007e7235ae ... OK
1175 08:36:43.561268 Working FDT set to 7e713000
1176 08:36:43.561732
1177 08:36:43.562682 end: 2.4.3 bootloader-commands (duration 00:00:38) [common]
1178 08:36:43.563312 start: 2.4.4 auto-login-action (timeout 00:03:45) [common]
1179 08:36:43.563817 Setting prompt string to ['Linux version [0-9]']
1180 08:36:43.564376 Setting prompt string to ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1181 08:36:43.564891 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:05:00)
1182 08:36:43.565996 Starting kernel ...
1183 08:36:43.566471
1185 08:40:28.564050 end: 2.4.4 auto-login-action (duration 00:03:45) [common]
1188 08:40:28.565084 end: 2.4 uboot-commands (duration 00:05:00) [common]
1190 08:40:28.565804 uboot-action failed: 1 of 1 attempts. 'auto-login-action timed out after 225 seconds'
1192 08:40:28.566410 end: 2 uboot-action (duration 00:05:00) [common]
1194 08:40:28.567206 Cleaning after the job
1195 08:40:28.567504 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/ramdisk
1196 08:40:28.570662 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/kernel
1197 08:40:28.580535 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/dtb
1198 08:40:28.581419 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/838547/tftp-deploy-jj604rnd/modules
1199 08:40:28.586832 start: 4.1 power-off (timeout 00:00:30) [common]
1200 08:40:28.589088 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1201 08:40:28.627269 >> OK - accepted request
1202 08:40:28.629135 Returned 0 in 0 seconds
1203 08:40:28.730215 end: 4.1 power-off (duration 00:00:00) [common]
1205 08:40:28.731842 start: 4.2 read-feedback (timeout 00:10:00) [common]
1206 08:40:28.732987 Listened to connection for namespace 'common' for up to 1s
1207 08:40:29.732906 Finalising connection for namespace 'common'
1208 08:40:29.733628 Disconnecting from shell: Finalise
1209 08:40:29.734141
1210 08:40:29.835133 end: 4.2 read-feedback (duration 00:00:01) [common]
1211 08:40:29.835822 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/838547
1212 08:40:30.159770 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/838547
1213 08:40:30.160397 JobError: Your job cannot terminate cleanly.