Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:56:31.880807 lava-dispatcher, installed at version: 2024.01
2 08:56:31.881574 start: 0 validate
3 08:56:31.882050 Start time: 2024-10-11 08:56:31.882021+00:00 (UTC)
4 08:56:31.882565 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:56:31.883102 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:56:31.921905 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:56:31.922493 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241011%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fkernel%2FImage exists
8 08:56:31.953975 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:56:31.954627 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241011%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 08:56:31.986219 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:56:31.986723 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:56:32.017452 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:56:32.018211 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241011%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fmodules.tar.xz exists
14 08:56:32.053031 validate duration: 0.17
16 08:56:32.053882 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:56:32.054214 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:56:32.054535 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:56:32.055112 Not decompressing ramdisk as can be used compressed.
20 08:56:32.055561 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 08:56:32.055844 saving as /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/ramdisk/initrd.cpio.gz
22 08:56:32.056147 total size: 5628182 (5 MB)
23 08:56:32.093732 progress 0 % (0 MB)
24 08:56:32.097851 progress 5 % (0 MB)
25 08:56:32.101940 progress 10 % (0 MB)
26 08:56:32.105635 progress 15 % (0 MB)
27 08:56:32.109720 progress 20 % (1 MB)
28 08:56:32.113331 progress 25 % (1 MB)
29 08:56:32.117240 progress 30 % (1 MB)
30 08:56:32.121238 progress 35 % (1 MB)
31 08:56:32.124840 progress 40 % (2 MB)
32 08:56:32.128879 progress 45 % (2 MB)
33 08:56:32.132471 progress 50 % (2 MB)
34 08:56:32.136379 progress 55 % (2 MB)
35 08:56:32.140262 progress 60 % (3 MB)
36 08:56:32.143721 progress 65 % (3 MB)
37 08:56:32.147596 progress 70 % (3 MB)
38 08:56:32.151134 progress 75 % (4 MB)
39 08:56:32.155204 progress 80 % (4 MB)
40 08:56:32.158722 progress 85 % (4 MB)
41 08:56:32.162622 progress 90 % (4 MB)
42 08:56:32.166431 progress 95 % (5 MB)
43 08:56:32.169684 progress 100 % (5 MB)
44 08:56:32.170343 5 MB downloaded in 0.11 s (47.01 MB/s)
45 08:56:32.170911 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:56:32.171829 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:56:32.172168 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:56:32.172471 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:56:32.172975 downloading http://storage.kernelci.org/next/master/next-20241011/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/kernel/Image
51 08:56:32.173230 saving as /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/kernel/Image
52 08:56:32.173455 total size: 39557632 (37 MB)
53 08:56:32.173679 No compression specified
54 08:56:32.207392 progress 0 % (0 MB)
55 08:56:32.231199 progress 5 % (1 MB)
56 08:56:32.254827 progress 10 % (3 MB)
57 08:56:32.279140 progress 15 % (5 MB)
58 08:56:32.302731 progress 20 % (7 MB)
59 08:56:32.326540 progress 25 % (9 MB)
60 08:56:32.350590 progress 30 % (11 MB)
61 08:56:32.374068 progress 35 % (13 MB)
62 08:56:32.397614 progress 40 % (15 MB)
63 08:56:32.421604 progress 45 % (17 MB)
64 08:56:32.445437 progress 50 % (18 MB)
65 08:56:32.468861 progress 55 % (20 MB)
66 08:56:32.492935 progress 60 % (22 MB)
67 08:56:32.516864 progress 65 % (24 MB)
68 08:56:32.541587 progress 70 % (26 MB)
69 08:56:32.566126 progress 75 % (28 MB)
70 08:56:32.589673 progress 80 % (30 MB)
71 08:56:32.613753 progress 85 % (32 MB)
72 08:56:32.637662 progress 90 % (33 MB)
73 08:56:32.660994 progress 95 % (35 MB)
74 08:56:32.684662 progress 100 % (37 MB)
75 08:56:32.685206 37 MB downloaded in 0.51 s (73.72 MB/s)
76 08:56:32.685698 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:56:32.686545 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:56:32.686837 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:56:32.687112 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:56:32.687586 downloading http://storage.kernelci.org/next/master/next-20241011/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 08:56:32.687859 saving as /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/dtb/meson-g12b-a311d-libretech-cc.dtb
83 08:56:32.688102 total size: 54703 (0 MB)
84 08:56:32.688328 No compression specified
85 08:56:32.728902 progress 59 % (0 MB)
86 08:56:32.729762 progress 100 % (0 MB)
87 08:56:32.730342 0 MB downloaded in 0.04 s (1.24 MB/s)
88 08:56:32.730817 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:56:32.731655 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:56:32.731934 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:56:32.732255 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:56:32.732722 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 08:56:32.732970 saving as /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/nfsrootfs/full.rootfs.tar
95 08:56:32.733186 total size: 107552908 (102 MB)
96 08:56:32.733405 Using unxz to decompress xz
97 08:56:32.770656 progress 0 % (0 MB)
98 08:56:33.408654 progress 5 % (5 MB)
99 08:56:34.123369 progress 10 % (10 MB)
100 08:56:34.835861 progress 15 % (15 MB)
101 08:56:35.581996 progress 20 % (20 MB)
102 08:56:36.147794 progress 25 % (25 MB)
103 08:56:36.765343 progress 30 % (30 MB)
104 08:56:37.494807 progress 35 % (35 MB)
105 08:56:37.846475 progress 40 % (41 MB)
106 08:56:38.269292 progress 45 % (46 MB)
107 08:56:38.957395 progress 50 % (51 MB)
108 08:56:39.638601 progress 55 % (56 MB)
109 08:56:40.392358 progress 60 % (61 MB)
110 08:56:41.142234 progress 65 % (66 MB)
111 08:56:42.007349 progress 70 % (71 MB)
112 08:56:42.906219 progress 75 % (76 MB)
113 08:56:43.704612 progress 80 % (82 MB)
114 08:56:44.436220 progress 85 % (87 MB)
115 08:56:45.148226 progress 90 % (92 MB)
116 08:56:45.849427 progress 95 % (97 MB)
117 08:56:46.578512 progress 100 % (102 MB)
118 08:56:46.590264 102 MB downloaded in 13.86 s (7.40 MB/s)
119 08:56:46.591177 end: 1.4.1 http-download (duration 00:00:14) [common]
121 08:56:46.592866 end: 1.4 download-retry (duration 00:00:14) [common]
122 08:56:46.593400 start: 1.5 download-retry (timeout 00:09:45) [common]
123 08:56:46.593925 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 08:56:46.594720 downloading http://storage.kernelci.org/next/master/next-20241011/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/modules.tar.xz
125 08:56:46.595176 saving as /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/modules/modules.tar
126 08:56:46.595588 total size: 11767688 (11 MB)
127 08:56:46.596033 Using unxz to decompress xz
128 08:56:46.642267 progress 0 % (0 MB)
129 08:56:46.708092 progress 5 % (0 MB)
130 08:56:46.787649 progress 10 % (1 MB)
131 08:56:46.875393 progress 15 % (1 MB)
132 08:56:46.970549 progress 20 % (2 MB)
133 08:56:47.051975 progress 25 % (2 MB)
134 08:56:47.131192 progress 30 % (3 MB)
135 08:56:47.215572 progress 35 % (3 MB)
136 08:56:47.296390 progress 40 % (4 MB)
137 08:56:47.374588 progress 45 % (5 MB)
138 08:56:47.460119 progress 50 % (5 MB)
139 08:56:47.543931 progress 55 % (6 MB)
140 08:56:47.626364 progress 60 % (6 MB)
141 08:56:47.701115 progress 65 % (7 MB)
142 08:56:47.782119 progress 70 % (7 MB)
143 08:56:47.860601 progress 75 % (8 MB)
144 08:56:47.937114 progress 80 % (9 MB)
145 08:56:48.023152 progress 85 % (9 MB)
146 08:56:48.107069 progress 90 % (10 MB)
147 08:56:48.187320 progress 95 % (10 MB)
148 08:56:48.267731 progress 100 % (11 MB)
149 08:56:48.278251 11 MB downloaded in 1.68 s (6.67 MB/s)
150 08:56:48.278822 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:56:48.279653 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:56:48.279923 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 08:56:48.280529 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 08:56:58.309809 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/838605/extract-nfsrootfs-8a7g_qw1
156 08:56:58.310430 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 08:56:58.310721 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 08:56:58.311608 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21
159 08:56:58.312169 makedir: /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin
160 08:56:58.312550 makedir: /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/tests
161 08:56:58.312872 makedir: /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/results
162 08:56:58.313208 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-add-keys
163 08:56:58.313741 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-add-sources
164 08:56:58.314262 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-background-process-start
165 08:56:58.314775 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-background-process-stop
166 08:56:58.315389 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-common-functions
167 08:56:58.315913 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-echo-ipv4
168 08:56:58.316479 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-install-packages
169 08:56:58.316986 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-installed-packages
170 08:56:58.317478 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-os-build
171 08:56:58.318000 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-probe-channel
172 08:56:58.318495 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-probe-ip
173 08:56:58.319025 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-target-ip
174 08:56:58.319578 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-target-mac
175 08:56:58.320095 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-target-storage
176 08:56:58.320615 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-test-case
177 08:56:58.321105 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-test-event
178 08:56:58.321586 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-test-feedback
179 08:56:58.322064 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-test-raise
180 08:56:58.322543 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-test-reference
181 08:56:58.323051 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-test-runner
182 08:56:58.323563 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-test-set
183 08:56:58.324069 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-test-shell
184 08:56:58.324583 Updating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-install-packages (oe)
185 08:56:58.325123 Updating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/bin/lava-installed-packages (oe)
186 08:56:58.325567 Creating /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/environment
187 08:56:58.325939 LAVA metadata
188 08:56:58.326200 - LAVA_JOB_ID=838605
189 08:56:58.326412 - LAVA_DISPATCHER_IP=192.168.6.2
190 08:56:58.326788 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 08:56:58.327756 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 08:56:58.328097 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 08:56:58.328315 skipped lava-vland-overlay
194 08:56:58.328560 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 08:56:58.328816 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 08:56:58.329037 skipped lava-multinode-overlay
197 08:56:58.329280 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 08:56:58.329536 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 08:56:58.329787 Loading test definitions
200 08:56:58.330063 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 08:56:58.330287 Using /lava-838605 at stage 0
202 08:56:58.331520 uuid=838605_1.6.2.4.1 testdef=None
203 08:56:58.331840 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 08:56:58.332134 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 08:56:58.333969 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 08:56:58.334757 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 08:56:58.337098 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 08:56:58.337928 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 08:56:58.340103 runner path: /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/0/tests/0_dmesg test_uuid 838605_1.6.2.4.1
212 08:56:58.340677 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 08:56:58.341433 Creating lava-test-runner.conf files
215 08:56:58.341633 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/838605/lava-overlay-5s1pis21/lava-838605/0 for stage 0
216 08:56:58.341966 - 0_dmesg
217 08:56:58.342304 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 08:56:58.342578 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 08:56:58.365472 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 08:56:58.365915 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 08:56:58.366209 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 08:56:58.366512 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 08:56:58.366856 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 08:56:59.030831 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 08:56:59.031284 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 08:56:59.031534 extracting modules file /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/modules/modules.tar to /var/lib/lava/dispatcher/tmp/838605/extract-nfsrootfs-8a7g_qw1
227 08:57:00.395898 extracting modules file /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/modules/modules.tar to /var/lib/lava/dispatcher/tmp/838605/extract-overlay-ramdisk-r54kaqfj/ramdisk
228 08:57:01.790783 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 08:57:01.791261 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 08:57:01.791539 [common] Applying overlay to NFS
231 08:57:01.791753 [common] Applying overlay /var/lib/lava/dispatcher/tmp/838605/compress-overlay-pdt1b0ba/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/838605/extract-nfsrootfs-8a7g_qw1
232 08:57:01.820734 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 08:57:01.821134 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 08:57:01.821406 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 08:57:01.821636 Converting downloaded kernel to a uImage
236 08:57:01.821951 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/kernel/Image /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/kernel/uImage
237 08:57:02.235179 output: Image Name:
238 08:57:02.235681 output: Created: Fri Oct 11 08:57:01 2024
239 08:57:02.235964 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 08:57:02.236286 output: Data Size: 39557632 Bytes = 38630.50 KiB = 37.73 MiB
241 08:57:02.236556 output: Load Address: 01080000
242 08:57:02.236817 output: Entry Point: 01080000
243 08:57:02.237082 output:
244 08:57:02.237483 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 08:57:02.237858 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 08:57:02.238199 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 08:57:02.238552 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 08:57:02.238887 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 08:57:02.239220 Building ramdisk /var/lib/lava/dispatcher/tmp/838605/extract-overlay-ramdisk-r54kaqfj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/838605/extract-overlay-ramdisk-r54kaqfj/ramdisk
250 08:57:04.557723 >> 173853 blocks
251 08:57:12.182076 Adding RAMdisk u-boot header.
252 08:57:12.182790 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/838605/extract-overlay-ramdisk-r54kaqfj/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/838605/extract-overlay-ramdisk-r54kaqfj/ramdisk.cpio.gz.uboot
253 08:57:12.438945 output: Image Name:
254 08:57:12.439444 output: Created: Fri Oct 11 08:57:12 2024
255 08:57:12.439708 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 08:57:12.439959 output: Data Size: 24160329 Bytes = 23594.07 KiB = 23.04 MiB
257 08:57:12.440557 output: Load Address: 00000000
258 08:57:12.441086 output: Entry Point: 00000000
259 08:57:12.441596 output:
260 08:57:12.442831 rename /var/lib/lava/dispatcher/tmp/838605/extract-overlay-ramdisk-r54kaqfj/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/ramdisk/ramdisk.cpio.gz.uboot
261 08:57:12.443734 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 08:57:12.444484 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 08:57:12.445161 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 08:57:12.445731 No LXC device requested
265 08:57:12.446381 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 08:57:12.447030 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 08:57:12.447665 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 08:57:12.448247 Checking files for TFTP limit of 4294967296 bytes.
269 08:57:12.451693 end: 1 tftp-deploy (duration 00:00:40) [common]
270 08:57:12.452506 start: 2 uboot-action (timeout 00:05:00) [common]
271 08:57:12.453188 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 08:57:12.453829 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 08:57:12.454482 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 08:57:12.455159 Using kernel file from prepare-kernel: 838605/tftp-deploy-jutmyzck/kernel/uImage
275 08:57:12.455963 substitutions:
276 08:57:12.456532 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 08:57:12.457049 - {DTB_ADDR}: 0x01070000
278 08:57:12.457560 - {DTB}: 838605/tftp-deploy-jutmyzck/dtb/meson-g12b-a311d-libretech-cc.dtb
279 08:57:12.458071 - {INITRD}: 838605/tftp-deploy-jutmyzck/ramdisk/ramdisk.cpio.gz.uboot
280 08:57:12.458590 - {KERNEL_ADDR}: 0x01080000
281 08:57:12.459095 - {KERNEL}: 838605/tftp-deploy-jutmyzck/kernel/uImage
282 08:57:12.459588 - {LAVA_MAC}: None
283 08:57:12.460172 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/838605/extract-nfsrootfs-8a7g_qw1
284 08:57:12.460685 - {NFS_SERVER_IP}: 192.168.6.2
285 08:57:12.461188 - {PRESEED_CONFIG}: None
286 08:57:12.461692 - {PRESEED_LOCAL}: None
287 08:57:12.462192 - {RAMDISK_ADDR}: 0x08000000
288 08:57:12.462691 - {RAMDISK}: 838605/tftp-deploy-jutmyzck/ramdisk/ramdisk.cpio.gz.uboot
289 08:57:12.463193 - {ROOT_PART}: None
290 08:57:12.463693 - {ROOT}: None
291 08:57:12.464226 - {SERVER_IP}: 192.168.6.2
292 08:57:12.464739 - {TEE_ADDR}: 0x83000000
293 08:57:12.465243 - {TEE}: None
294 08:57:12.465752 Parsed boot commands:
295 08:57:12.466243 - setenv autoload no
296 08:57:12.466749 - setenv initrd_high 0xffffffff
297 08:57:12.467262 - setenv fdt_high 0xffffffff
298 08:57:12.467768 - dhcp
299 08:57:12.468300 - setenv serverip 192.168.6.2
300 08:57:12.468816 - tftpboot 0x01080000 838605/tftp-deploy-jutmyzck/kernel/uImage
301 08:57:12.469323 - tftpboot 0x08000000 838605/tftp-deploy-jutmyzck/ramdisk/ramdisk.cpio.gz.uboot
302 08:57:12.469831 - tftpboot 0x01070000 838605/tftp-deploy-jutmyzck/dtb/meson-g12b-a311d-libretech-cc.dtb
303 08:57:12.470339 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/838605/extract-nfsrootfs-8a7g_qw1,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 08:57:12.470855 - bootm 0x01080000 0x08000000 0x01070000
305 08:57:12.471505 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 08:57:12.473443 start: 2.3 connect-device (timeout 00:05:00) [common]
308 08:57:12.473971 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 08:57:12.490132 Setting prompt string to ['lava-test: # ']
310 08:57:12.492024 end: 2.3 connect-device (duration 00:00:00) [common]
311 08:57:12.492827 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 08:57:12.493560 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 08:57:12.494228 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 08:57:12.495657 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 08:57:12.530662 >> OK - accepted request
316 08:57:12.533080 Returned 0 in 0 seconds
317 08:57:12.634011 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 08:57:12.635671 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 08:57:12.636293 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 08:57:12.636805 Setting prompt string to ['Hit any key to stop autoboot']
322 08:57:12.637266 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 08:57:12.638801 Trying 192.168.56.21...
324 08:57:12.639277 Connected to conserv1.
325 08:57:12.639696 Escape character is '^]'.
326 08:57:12.640159
327 08:57:12.640590 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 08:57:12.641022
329 08:57:24.469047 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 08:57:24.469653 bl2_stage_init 0x01
331 08:57:24.470064 bl2_stage_init 0x81
332 08:57:24.474496 hw id: 0x0000 - pwm id 0x01
333 08:57:24.474960 bl2_stage_init 0xc1
334 08:57:24.475359 bl2_stage_init 0x02
335 08:57:24.475749
336 08:57:24.480134 L0:00000000
337 08:57:24.480564 L1:20000703
338 08:57:24.480956 L2:00008067
339 08:57:24.481344 L3:14000000
340 08:57:24.485726 B2:00402000
341 08:57:24.486155 B1:e0f83180
342 08:57:24.486557
343 08:57:24.486948 TE: 58159
344 08:57:24.487340
345 08:57:24.491364 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 08:57:24.491791
347 08:57:24.492212 Board ID = 1
348 08:57:24.496936 Set A53 clk to 24M
349 08:57:24.497360 Set A73 clk to 24M
350 08:57:24.497748 Set clk81 to 24M
351 08:57:24.502505 A53 clk: 1200 MHz
352 08:57:24.502929 A73 clk: 1200 MHz
353 08:57:24.503320 CLK81: 166.6M
354 08:57:24.503701 smccc: 00012ab5
355 08:57:24.508246 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 08:57:24.513706 board id: 1
357 08:57:24.519587 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 08:57:24.530251 fw parse done
359 08:57:24.536218 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 08:57:24.578860 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 08:57:24.589781 PIEI prepare done
362 08:57:24.590228 fastboot data load
363 08:57:24.590625 fastboot data verify
364 08:57:24.595493 verify result: 266
365 08:57:24.601060 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 08:57:24.601498 LPDDR4 probe
367 08:57:24.601884 ddr clk to 1584MHz
368 08:57:24.609012 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 08:57:24.646274
370 08:57:24.646729 dmc_version 0001
371 08:57:24.653048 Check phy result
372 08:57:24.658819 INFO : End of CA training
373 08:57:24.659240 INFO : End of initialization
374 08:57:24.664454 INFO : Training has run successfully!
375 08:57:24.664887 Check phy result
376 08:57:24.670034 INFO : End of initialization
377 08:57:24.670451 INFO : End of read enable training
378 08:57:24.675616 INFO : End of fine write leveling
379 08:57:24.681188 INFO : End of Write leveling coarse delay
380 08:57:24.681609 INFO : Training has run successfully!
381 08:57:24.681996 Check phy result
382 08:57:24.686799 INFO : End of initialization
383 08:57:24.687234 INFO : End of read dq deskew training
384 08:57:24.692399 INFO : End of MPR read delay center optimization
385 08:57:24.698180 INFO : End of write delay center optimization
386 08:57:24.704071 INFO : End of read delay center optimization
387 08:57:24.704794 INFO : End of max read latency training
388 08:57:24.709273 INFO : Training has run successfully!
389 08:57:24.709762 1D training succeed
390 08:57:24.717541 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 08:57:24.765138 Check phy result
392 08:57:24.765681 INFO : End of initialization
393 08:57:24.788676 INFO : End of 2D read delay Voltage center optimization
394 08:57:24.808972 INFO : End of 2D read delay Voltage center optimization
395 08:57:24.860979 INFO : End of 2D write delay Voltage center optimization
396 08:57:24.910338 INFO : End of 2D write delay Voltage center optimization
397 08:57:24.915903 INFO : Training has run successfully!
398 08:57:24.916416
399 08:57:24.916834 channel==0
400 08:57:24.921555 RxClkDly_Margin_A0==88 ps 9
401 08:57:24.922187 TxDqDly_Margin_A0==98 ps 10
402 08:57:24.924965 RxClkDly_Margin_A1==88 ps 9
403 08:57:24.925580 TxDqDly_Margin_A1==98 ps 10
404 08:57:24.930506 TrainedVREFDQ_A0==74
405 08:57:24.931113 TrainedVREFDQ_A1==74
406 08:57:24.931667 VrefDac_Margin_A0==25
407 08:57:24.936084 DeviceVref_Margin_A0==40
408 08:57:24.936576 VrefDac_Margin_A1==24
409 08:57:24.941610 DeviceVref_Margin_A1==40
410 08:57:24.942119
411 08:57:24.942531
412 08:57:24.942943 channel==1
413 08:57:24.943337 RxClkDly_Margin_A0==98 ps 10
414 08:57:24.945049 TxDqDly_Margin_A0==88 ps 9
415 08:57:24.950564 RxClkDly_Margin_A1==88 ps 9
416 08:57:24.951043 TxDqDly_Margin_A1==88 ps 9
417 08:57:24.951448 TrainedVREFDQ_A0==77
418 08:57:24.956103 TrainedVREFDQ_A1==77
419 08:57:24.956555 VrefDac_Margin_A0==22
420 08:57:24.961669 DeviceVref_Margin_A0==37
421 08:57:24.962111 VrefDac_Margin_A1==24
422 08:57:24.962510 DeviceVref_Margin_A1==37
423 08:57:24.962914
424 08:57:24.967300 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 08:57:24.967758
426 08:57:25.000979 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 08:57:25.001847 2D training succeed
428 08:57:25.006482 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 08:57:25.012120 auto size-- 65535DDR cs0 size: 2048MB
430 08:57:25.012676 DDR cs1 size: 2048MB
431 08:57:25.017545 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 08:57:25.018036 cs0 DataBus test pass
433 08:57:25.018488 cs1 DataBus test pass
434 08:57:25.023168 cs0 AddrBus test pass
435 08:57:25.023625 cs1 AddrBus test pass
436 08:57:25.024086
437 08:57:25.028759 100bdlr_step_size ps== 420
438 08:57:25.029208 result report
439 08:57:25.029615 boot times 0Enable ddr reg access
440 08:57:25.038673 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 08:57:25.052111 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 08:57:25.625895 0.0;M3 CHK:0;cm4_sp_mode 0
443 08:57:25.626492 MVN_1=0x00000000
444 08:57:25.631295 MVN_2=0x00000000
445 08:57:25.637054 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 08:57:25.637509 OPS=0x10
447 08:57:25.637927 ring efuse init
448 08:57:25.638346 chipver efuse init
449 08:57:25.645352 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 08:57:25.645820 [0.018961 Inits done]
451 08:57:25.646229 secure task start!
452 08:57:25.652859 high task start!
453 08:57:25.653308 low task start!
454 08:57:25.653715 run into bl31
455 08:57:25.659452 NOTICE: BL31: v1.3(release):4fc40b1
456 08:57:25.667273 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 08:57:25.667728 NOTICE: BL31: G12A normal boot!
458 08:57:25.692756 NOTICE: BL31: BL33 decompress pass
459 08:57:25.698380 ERROR: Error initializing runtime service opteed_fast
460 08:57:26.931450
461 08:57:26.932091
462 08:57:26.939791 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 08:57:26.940293
464 08:57:26.940710 Model: Libre Computer AML-A311D-CC Alta
465 08:57:27.148277 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 08:57:27.171555 DRAM: 2 GiB (effective 3.8 GiB)
467 08:57:27.314610 Core: 408 devices, 31 uclasses, devicetree: separate
468 08:57:27.320444 WDT: Not starting watchdog@f0d0
469 08:57:27.352686 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 08:57:27.365189 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 08:57:27.370170 ** Bad device specification mmc 0 **
472 08:57:27.380478 Card did not respond to voltage select! : -110
473 08:57:27.388222 ** Bad device specification mmc 0 **
474 08:57:27.388762 Couldn't find partition mmc 0
475 08:57:27.396455 Card did not respond to voltage select! : -110
476 08:57:27.401966 ** Bad device specification mmc 0 **
477 08:57:27.402481 Couldn't find partition mmc 0
478 08:57:27.407050 Error: could not access storage.
479 08:57:28.669688 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 08:57:28.670326 bl2_stage_init 0x81
481 08:57:28.675309 hw id: 0x0000 - pwm id 0x01
482 08:57:28.675821 bl2_stage_init 0xc1
483 08:57:28.676289 bl2_stage_init 0x02
484 08:57:28.676703
485 08:57:28.680882 L0:00000000
486 08:57:28.681389 L1:20000703
487 08:57:28.681802 L2:00008067
488 08:57:28.682206 L3:14000000
489 08:57:28.682602 B2:00402000
490 08:57:28.683688 B1:e0f83180
491 08:57:28.684192
492 08:57:28.684610 TE: 58150
493 08:57:28.685016
494 08:57:28.694832 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 08:57:28.695371
496 08:57:28.695791 Board ID = 1
497 08:57:28.696230 Set A53 clk to 24M
498 08:57:28.696636 Set A73 clk to 24M
499 08:57:28.700488 Set clk81 to 24M
500 08:57:28.700984 A53 clk: 1200 MHz
501 08:57:28.701399 A73 clk: 1200 MHz
502 08:57:28.706063 CLK81: 166.6M
503 08:57:28.706539 smccc: 00012aac
504 08:57:28.711664 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 08:57:28.712185 board id: 1
506 08:57:28.720383 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 08:57:28.730924 fw parse done
508 08:57:28.736884 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 08:57:28.779515 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 08:57:28.790439 PIEI prepare done
511 08:57:28.790961 fastboot data load
512 08:57:28.791219 fastboot data verify
513 08:57:28.796081 verify result: 266
514 08:57:28.801602 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 08:57:28.801936 LPDDR4 probe
516 08:57:28.802151 ddr clk to 1584MHz
517 08:57:28.809594 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 08:57:28.846873
519 08:57:28.847447 dmc_version 0001
520 08:57:28.853573 Check phy result
521 08:57:28.859443 INFO : End of CA training
522 08:57:28.859977 INFO : End of initialization
523 08:57:28.865252 INFO : Training has run successfully!
524 08:57:28.865756 Check phy result
525 08:57:28.870727 INFO : End of initialization
526 08:57:28.871243 INFO : End of read enable training
527 08:57:28.876296 INFO : End of fine write leveling
528 08:57:28.881913 INFO : End of Write leveling coarse delay
529 08:57:28.882438 INFO : Training has run successfully!
530 08:57:28.882861 Check phy result
531 08:57:28.887548 INFO : End of initialization
532 08:57:28.888160 INFO : End of read dq deskew training
533 08:57:28.893082 INFO : End of MPR read delay center optimization
534 08:57:28.898711 INFO : End of write delay center optimization
535 08:57:28.904308 INFO : End of read delay center optimization
536 08:57:28.904805 INFO : End of max read latency training
537 08:57:28.909839 INFO : Training has run successfully!
538 08:57:28.910357 1D training succeed
539 08:57:28.925088 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 08:57:28.966632 Check phy result
541 08:57:28.967214 INFO : End of initialization
542 08:57:28.989291 INFO : End of 2D read delay Voltage center optimization
543 08:57:29.009489 INFO : End of 2D read delay Voltage center optimization
544 08:57:29.061557 INFO : End of 2D write delay Voltage center optimization
545 08:57:29.110920 INFO : End of 2D write delay Voltage center optimization
546 08:57:29.116447 INFO : Training has run successfully!
547 08:57:29.116938
548 08:57:29.117381 channel==0
549 08:57:29.122264 RxClkDly_Margin_A0==88 ps 9
550 08:57:29.122762 TxDqDly_Margin_A0==98 ps 10
551 08:57:29.127670 RxClkDly_Margin_A1==88 ps 9
552 08:57:29.128193 TxDqDly_Margin_A1==98 ps 10
553 08:57:29.128619 TrainedVREFDQ_A0==74
554 08:57:29.133446 TrainedVREFDQ_A1==74
555 08:57:29.133968 VrefDac_Margin_A0==25
556 08:57:29.134383 DeviceVref_Margin_A0==40
557 08:57:29.138939 VrefDac_Margin_A1==25
558 08:57:29.139453 DeviceVref_Margin_A1==40
559 08:57:29.139866
560 08:57:29.140322
561 08:57:29.144534 channel==1
562 08:57:29.144982 RxClkDly_Margin_A0==98 ps 10
563 08:57:29.145391 TxDqDly_Margin_A0==98 ps 10
564 08:57:29.150120 RxClkDly_Margin_A1==88 ps 9
565 08:57:29.150609 TxDqDly_Margin_A1==88 ps 9
566 08:57:29.155674 TrainedVREFDQ_A0==77
567 08:57:29.156173 TrainedVREFDQ_A1==77
568 08:57:29.156616 VrefDac_Margin_A0==22
569 08:57:29.161326 DeviceVref_Margin_A0==37
570 08:57:29.161792 VrefDac_Margin_A1==24
571 08:57:29.166958 DeviceVref_Margin_A1==37
572 08:57:29.167461
573 08:57:29.167874 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 08:57:29.168324
575 08:57:29.200527 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
576 08:57:29.201103 2D training succeed
577 08:57:29.206082 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 08:57:29.211745 auto size-- 65535DDR cs0 size: 2048MB
579 08:57:29.212288 DDR cs1 size: 2048MB
580 08:57:29.217280 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 08:57:29.217761 cs0 DataBus test pass
582 08:57:29.222971 cs1 DataBus test pass
583 08:57:29.223471 cs0 AddrBus test pass
584 08:57:29.223883 cs1 AddrBus test pass
585 08:57:29.224322
586 08:57:29.228519 100bdlr_step_size ps== 420
587 08:57:29.229000 result report
588 08:57:29.234054 boot times 0Enable ddr reg access
589 08:57:29.239642 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 08:57:29.253049 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 08:57:29.826157 0.0;M3 CHK:0;cm4_sp_mode 0
592 08:57:29.826815 MVN_1=0x00000000
593 08:57:29.831751 MVN_2=0x00000000
594 08:57:29.837308 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 08:57:29.837706 OPS=0x10
596 08:57:29.837922 ring efuse init
597 08:57:29.838231 chipver efuse init
598 08:57:29.845598 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 08:57:29.845989 [0.018961 Inits done]
600 08:57:29.846195 secure task start!
601 08:57:29.853045 high task start!
602 08:57:29.853410 low task start!
603 08:57:29.853617 run into bl31
604 08:57:29.859563 NOTICE: BL31: v1.3(release):4fc40b1
605 08:57:29.867509 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 08:57:29.867918 NOTICE: BL31: G12A normal boot!
607 08:57:29.892888 NOTICE: BL31: BL33 decompress pass
608 08:57:29.898531 ERROR: Error initializing runtime service opteed_fast
609 08:57:31.131345
610 08:57:31.131812
611 08:57:31.139800 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 08:57:31.140186
613 08:57:31.140443 Model: Libre Computer AML-A311D-CC Alta
614 08:57:31.348577 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 08:57:31.372869 DRAM: 2 GiB (effective 3.8 GiB)
616 08:57:31.514819 Core: 408 devices, 31 uclasses, devicetree: separate
617 08:57:31.520472 WDT: Not starting watchdog@f0d0
618 08:57:31.553004 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 08:57:31.565292 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 08:57:31.569396 ** Bad device specification mmc 0 **
621 08:57:31.580616 Card did not respond to voltage select! : -110
622 08:57:31.587087 ** Bad device specification mmc 0 **
623 08:57:31.587596 Couldn't find partition mmc 0
624 08:57:31.596431 Card did not respond to voltage select! : -110
625 08:57:31.601902 ** Bad device specification mmc 0 **
626 08:57:31.602413 Couldn't find partition mmc 0
627 08:57:31.606142 Error: could not access storage.
628 08:57:31.949572 Net: eth0: ethernet@ff3f0000
629 08:57:31.950191 starting USB...
630 08:57:32.201422 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 08:57:32.202031 Starting the controller
632 08:57:32.208351 USB XHCI 1.10
633 08:57:33.918459 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 08:57:33.919105 bl2_stage_init 0x01
635 08:57:33.919584 bl2_stage_init 0x81
636 08:57:33.923866 hw id: 0x0000 - pwm id 0x01
637 08:57:33.924322 bl2_stage_init 0xc1
638 08:57:33.924750 bl2_stage_init 0x02
639 08:57:33.925103
640 08:57:33.929510 L0:00000000
641 08:57:33.929813 L1:20000703
642 08:57:33.930246 L2:00008067
643 08:57:33.930670 L3:14000000
644 08:57:33.932383 B2:00402000
645 08:57:33.932833 B1:e0f83180
646 08:57:33.933260
647 08:57:33.933619 TE: 58167
648 08:57:33.933834
649 08:57:33.943577 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 08:57:33.944133
651 08:57:33.944821 Board ID = 1
652 08:57:33.945249 Set A53 clk to 24M
653 08:57:33.945656 Set A73 clk to 24M
654 08:57:33.949193 Set clk81 to 24M
655 08:57:33.949649 A53 clk: 1200 MHz
656 08:57:33.949992 A73 clk: 1200 MHz
657 08:57:33.954895 CLK81: 166.6M
658 08:57:33.955358 smccc: 00012abd
659 08:57:33.960357 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 08:57:33.960616 board id: 1
661 08:57:33.968969 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 08:57:33.979742 fw parse done
663 08:57:33.984726 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 08:57:34.028259 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 08:57:34.039154 PIEI prepare done
666 08:57:34.039485 fastboot data load
667 08:57:34.039722 fastboot data verify
668 08:57:34.044852 verify result: 266
669 08:57:34.050397 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 08:57:34.050733 LPDDR4 probe
671 08:57:34.050966 ddr clk to 1584MHz
672 08:57:34.058393 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 08:57:34.095776
674 08:57:34.096154 dmc_version 0001
675 08:57:34.106678 Check phy result
676 08:57:34.106998 INFO : End of CA training
677 08:57:34.112247 INFO : End of initialization
678 08:57:34.112695 INFO : Training has run successfully!
679 08:57:34.117873 Check phy result
680 08:57:34.118320 INFO : End of initialization
681 08:57:34.123417 INFO : End of read enable training
682 08:57:34.123730 INFO : End of fine write leveling
683 08:57:34.129035 INFO : End of Write leveling coarse delay
684 08:57:34.129356 INFO : Training has run successfully!
685 08:57:34.134646 Check phy result
686 08:57:34.134961 INFO : End of initialization
687 08:57:34.138028 INFO : End of read dq deskew training
688 08:57:34.143539 INFO : End of MPR read delay center optimization
689 08:57:34.149171 INFO : End of write delay center optimization
690 08:57:34.149482 INFO : End of read delay center optimization
691 08:57:34.154784 INFO : End of max read latency training
692 08:57:34.160341 INFO : Training has run successfully!
693 08:57:34.160646 1D training succeed
694 08:57:34.167777 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 08:57:34.215409 Check phy result
696 08:57:34.215759 INFO : End of initialization
697 08:57:34.237046 INFO : End of 2D read delay Voltage center optimization
698 08:57:34.257140 INFO : End of 2D read delay Voltage center optimization
699 08:57:34.309033 INFO : End of 2D write delay Voltage center optimization
700 08:57:34.358196 INFO : End of 2D write delay Voltage center optimization
701 08:57:34.363762 INFO : Training has run successfully!
702 08:57:34.364385
703 08:57:34.364822 channel==0
704 08:57:34.369412 RxClkDly_Margin_A0==88 ps 9
705 08:57:34.369917 TxDqDly_Margin_A0==98 ps 10
706 08:57:34.372708 RxClkDly_Margin_A1==88 ps 9
707 08:57:34.373193 TxDqDly_Margin_A1==98 ps 10
708 08:57:34.378213 TrainedVREFDQ_A0==74
709 08:57:34.378719 TrainedVREFDQ_A1==74
710 08:57:34.383863 VrefDac_Margin_A0==25
711 08:57:34.384374 DeviceVref_Margin_A0==40
712 08:57:34.384802 VrefDac_Margin_A1==25
713 08:57:34.389419 DeviceVref_Margin_A1==40
714 08:57:34.389937
715 08:57:34.390392
716 08:57:34.390812 channel==1
717 08:57:34.391215 RxClkDly_Margin_A0==88 ps 9
718 08:57:34.394976 TxDqDly_Margin_A0==88 ps 9
719 08:57:34.395445 RxClkDly_Margin_A1==98 ps 10
720 08:57:34.400787 TxDqDly_Margin_A1==88 ps 9
721 08:57:34.401291 TrainedVREFDQ_A0==76
722 08:57:34.401722 TrainedVREFDQ_A1==77
723 08:57:34.406203 VrefDac_Margin_A0==22
724 08:57:34.406683 DeviceVref_Margin_A0==38
725 08:57:34.411881 VrefDac_Margin_A1==22
726 08:57:34.412369 DeviceVref_Margin_A1==37
727 08:57:34.412787
728 08:57:34.417402 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 08:57:34.417861
730 08:57:34.445395 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
731 08:57:34.450987 2D training succeed
732 08:57:34.456577 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 08:57:34.457046 auto size-- 65535DDR cs0 size: 2048MB
734 08:57:34.462192 DDR cs1 size: 2048MB
735 08:57:34.462648 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 08:57:34.467753 cs0 DataBus test pass
737 08:57:34.468239 cs1 DataBus test pass
738 08:57:34.468826 cs0 AddrBus test pass
739 08:57:34.473399 cs1 AddrBus test pass
740 08:57:34.473854
741 08:57:34.474268 100bdlr_step_size ps== 420
742 08:57:34.474682 result report
743 08:57:34.478985 boot times 0Enable ddr reg access
744 08:57:34.486635 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 08:57:34.500091 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 08:57:35.072281 0.0;M3 CHK:0;cm4_sp_mode 0
747 08:57:35.072930 MVN_1=0x00000000
748 08:57:35.077613 MVN_2=0x00000000
749 08:57:35.083356 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 08:57:35.083913 OPS=0x10
751 08:57:35.084376 ring efuse init
752 08:57:35.084770 chipver efuse init
753 08:57:35.091786 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 08:57:35.092303 [0.018961 Inits done]
755 08:57:35.092701 secure task start!
756 08:57:35.099277 high task start!
757 08:57:35.099723 low task start!
758 08:57:35.100151 run into bl31
759 08:57:35.106085 NOTICE: BL31: v1.3(release):4fc40b1
760 08:57:35.112988 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 08:57:35.113441 NOTICE: BL31: G12A normal boot!
762 08:57:35.139104 NOTICE: BL31: BL33 decompress pass
763 08:57:35.144883 ERROR: Error initializing runtime service opteed_fast
764 08:57:36.377554
765 08:57:36.378179
766 08:57:36.385963 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 08:57:36.386525
768 08:57:36.386955 Model: Libre Computer AML-A311D-CC Alta
769 08:57:36.594334 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 08:57:36.617746 DRAM: 2 GiB (effective 3.8 GiB)
771 08:57:36.760688 Core: 408 devices, 31 uclasses, devicetree: separate
772 08:57:36.766713 WDT: Not starting watchdog@f0d0
773 08:57:36.798940 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 08:57:36.811382 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 08:57:36.816321 ** Bad device specification mmc 0 **
776 08:57:36.826661 Card did not respond to voltage select! : -110
777 08:57:36.834300 ** Bad device specification mmc 0 **
778 08:57:36.834839 Couldn't find partition mmc 0
779 08:57:36.842591 Card did not respond to voltage select! : -110
780 08:57:36.848112 ** Bad device specification mmc 0 **
781 08:57:36.848644 Couldn't find partition mmc 0
782 08:57:36.853220 Error: could not access storage.
783 08:57:37.195827 Net: eth0: ethernet@ff3f0000
784 08:57:37.196573 starting USB...
785 08:57:37.447585 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 08:57:37.448366 Starting the controller
787 08:57:37.454554 USB XHCI 1.10
788 08:57:39.579451 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 08:57:39.580162 bl2_stage_init 0x01
790 08:57:39.580641 bl2_stage_init 0x81
791 08:57:39.585079 hw id: 0x0000 - pwm id 0x01
792 08:57:39.585627 bl2_stage_init 0xc1
793 08:57:39.586093 bl2_stage_init 0x02
794 08:57:39.586540
795 08:57:39.590770 L0:00000000
796 08:57:39.591286 L1:20000703
797 08:57:39.591733 L2:00008067
798 08:57:39.592216 L3:14000000
799 08:57:39.596493 B2:00402000
800 08:57:39.596990 B1:e0f83180
801 08:57:39.597440
802 08:57:39.597882 TE: 58159
803 08:57:39.598331
804 08:57:39.601878 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 08:57:39.602388
806 08:57:39.602842 Board ID = 1
807 08:57:39.607391 Set A53 clk to 24M
808 08:57:39.607886 Set A73 clk to 24M
809 08:57:39.608392 Set clk81 to 24M
810 08:57:39.613267 A53 clk: 1200 MHz
811 08:57:39.613773 A73 clk: 1200 MHz
812 08:57:39.614229 CLK81: 166.6M
813 08:57:39.614668 smccc: 00012ab5
814 08:57:39.618733 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 08:57:39.624290 board id: 1
816 08:57:39.630136 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 08:57:39.640764 fw parse done
818 08:57:39.646870 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 08:57:39.689309 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 08:57:39.700248 PIEI prepare done
821 08:57:39.700759 fastboot data load
822 08:57:39.701215 fastboot data verify
823 08:57:39.705851 verify result: 266
824 08:57:39.711465 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 08:57:39.711970 LPDDR4 probe
826 08:57:39.712469 ddr clk to 1584MHz
827 08:57:39.719434 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 08:57:39.756717
829 08:57:39.757238 dmc_version 0001
830 08:57:39.763378 Check phy result
831 08:57:39.769263 INFO : End of CA training
832 08:57:39.769750 INFO : End of initialization
833 08:57:39.774906 INFO : Training has run successfully!
834 08:57:39.775422 Check phy result
835 08:57:39.780514 INFO : End of initialization
836 08:57:39.781007 INFO : End of read enable training
837 08:57:39.786062 INFO : End of fine write leveling
838 08:57:39.791653 INFO : End of Write leveling coarse delay
839 08:57:39.792186 INFO : Training has run successfully!
840 08:57:39.792653 Check phy result
841 08:57:39.797273 INFO : End of initialization
842 08:57:39.797759 INFO : End of read dq deskew training
843 08:57:39.802875 INFO : End of MPR read delay center optimization
844 08:57:39.808500 INFO : End of write delay center optimization
845 08:57:39.814186 INFO : End of read delay center optimization
846 08:57:39.814666 INFO : End of max read latency training
847 08:57:39.819694 INFO : Training has run successfully!
848 08:57:39.820222 1D training succeed
849 08:57:39.827842 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 08:57:39.875538 Check phy result
851 08:57:39.876222 INFO : End of initialization
852 08:57:39.898984 INFO : End of 2D read delay Voltage center optimization
853 08:57:39.919246 INFO : End of 2D read delay Voltage center optimization
854 08:57:39.971285 INFO : End of 2D write delay Voltage center optimization
855 08:57:40.020660 INFO : End of 2D write delay Voltage center optimization
856 08:57:40.026165 INFO : Training has run successfully!
857 08:57:40.026683
858 08:57:40.027136 channel==0
859 08:57:40.031753 RxClkDly_Margin_A0==88 ps 9
860 08:57:40.032294 TxDqDly_Margin_A0==98 ps 10
861 08:57:40.037362 RxClkDly_Margin_A1==88 ps 9
862 08:57:40.037841 TxDqDly_Margin_A1==98 ps 10
863 08:57:40.038293 TrainedVREFDQ_A0==74
864 08:57:40.042965 TrainedVREFDQ_A1==74
865 08:57:40.043475 VrefDac_Margin_A0==25
866 08:57:40.043924 DeviceVref_Margin_A0==40
867 08:57:40.048591 VrefDac_Margin_A1==25
868 08:57:40.049080 DeviceVref_Margin_A1==40
869 08:57:40.049524
870 08:57:40.049964
871 08:57:40.054167 channel==1
872 08:57:40.054648 RxClkDly_Margin_A0==98 ps 10
873 08:57:40.055092 TxDqDly_Margin_A0==88 ps 9
874 08:57:40.059767 RxClkDly_Margin_A1==88 ps 9
875 08:57:40.060287 TxDqDly_Margin_A1==88 ps 9
876 08:57:40.065380 TrainedVREFDQ_A0==76
877 08:57:40.065889 TrainedVREFDQ_A1==77
878 08:57:40.066344 VrefDac_Margin_A0==22
879 08:57:40.070953 DeviceVref_Margin_A0==38
880 08:57:40.071434 VrefDac_Margin_A1==24
881 08:57:40.076597 DeviceVref_Margin_A1==37
882 08:57:40.077085
883 08:57:40.077548 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 08:57:40.078012
885 08:57:40.110126 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
886 08:57:40.110539 2D training succeed
887 08:57:40.115700 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 08:57:40.121340 auto size-- 65535DDR cs0 size: 2048MB
889 08:57:40.121855 DDR cs1 size: 2048MB
890 08:57:40.126945 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 08:57:40.127422 cs0 DataBus test pass
892 08:57:40.132573 cs1 DataBus test pass
893 08:57:40.133065 cs0 AddrBus test pass
894 08:57:40.133503 cs1 AddrBus test pass
895 08:57:40.133931
896 08:57:40.138174 100bdlr_step_size ps== 420
897 08:57:40.138667 result report
898 08:57:40.143747 boot times 0Enable ddr reg access
899 08:57:40.149013 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 08:57:40.161623 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 08:57:40.736193 0.0;M3 CHK:0;cm4_sp_mode 0
902 08:57:40.736602 MVN_1=0x00000000
903 08:57:40.741736 MVN_2=0x00000000
904 08:57:40.747413 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 08:57:40.748154 OPS=0x10
906 08:57:40.749752 ring efuse init
907 08:57:40.749958 chipver efuse init
908 08:57:40.753067 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 08:57:40.758652 [0.018961 Inits done]
910 08:57:40.759017 secure task start!
911 08:57:40.759265 high task start!
912 08:57:40.763202 low task start!
913 08:57:40.763509 run into bl31
914 08:57:40.769881 NOTICE: BL31: v1.3(release):4fc40b1
915 08:57:40.777684 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 08:57:40.778024 NOTICE: BL31: G12A normal boot!
917 08:57:40.803036 NOTICE: BL31: BL33 decompress pass
918 08:57:40.808735 ERROR: Error initializing runtime service opteed_fast
919 08:57:42.041648
920 08:57:42.042258
921 08:57:42.050105 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 08:57:42.050688
923 08:57:42.051126 Model: Libre Computer AML-A311D-CC Alta
924 08:57:42.258467 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 08:57:42.281843 DRAM: 2 GiB (effective 3.8 GiB)
926 08:57:42.424791 Core: 408 devices, 31 uclasses, devicetree: separate
927 08:57:42.430691 WDT: Not starting watchdog@f0d0
928 08:57:42.462953 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 08:57:42.475357 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 08:57:42.480539 ** Bad device specification mmc 0 **
931 08:57:42.490608 Card did not respond to voltage select! : -110
932 08:57:42.498308 ** Bad device specification mmc 0 **
933 08:57:42.498603 Couldn't find partition mmc 0
934 08:57:42.506663 Card did not respond to voltage select! : -110
935 08:57:42.512162 ** Bad device specification mmc 0 **
936 08:57:42.512437 Couldn't find partition mmc 0
937 08:57:42.516384 Error: could not access storage.
938 08:57:42.859884 Net: eth0: ethernet@ff3f0000
939 08:57:42.860546 starting USB...
940 08:57:43.113339 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 08:57:43.113985 Starting the controller
942 08:57:43.119684 USB XHCI 1.10
943 08:57:44.673539 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 08:57:44.680961 scanning usb for storage devices... 0 Storage Device(s) found
946 08:57:44.732828 Hit any key to stop autoboot: 1
947 08:57:44.734050 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 08:57:44.734749 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 08:57:44.735285 Setting prompt string to ['=>']
950 08:57:44.735839 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 08:57:44.748387 0
952 08:57:44.749447 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 08:57:44.750197 Sending with 10 millisecond of delay
955 08:57:45.885662 => setenv autoload no
956 08:57:45.896551 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 08:57:45.901889 setenv autoload no
958 08:57:45.902672 Sending with 10 millisecond of delay
960 08:57:47.701867 => setenv initrd_high 0xffffffff
961 08:57:47.712531 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 08:57:47.713233 setenv initrd_high 0xffffffff
963 08:57:47.713828 Sending with 10 millisecond of delay
965 08:57:49.333496 => setenv fdt_high 0xffffffff
966 08:57:49.344316 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 08:57:49.345182 setenv fdt_high 0xffffffff
968 08:57:49.345879 Sending with 10 millisecond of delay
970 08:57:49.638107 => dhcp
971 08:57:49.648960 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 08:57:49.649967 dhcp
973 08:57:49.650456 Speed: 1000, full duplex
974 08:57:49.650957 BOOTP broadcast 1
975 08:57:49.672122 DHCP client bound to address 192.168.6.33 (23 ms)
976 08:57:49.672961 Sending with 10 millisecond of delay
978 08:57:51.350784 => setenv serverip 192.168.6.2
979 08:57:51.362070 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 08:57:51.364323 setenv serverip 192.168.6.2
981 08:57:51.366066 Sending with 10 millisecond of delay
983 08:57:55.092793 => tftpboot 0x01080000 838605/tftp-deploy-jutmyzck/kernel/uImage
984 08:57:55.103595 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
985 08:57:55.104528 tftpboot 0x01080000 838605/tftp-deploy-jutmyzck/kernel/uImage
986 08:57:55.104996 Speed: 1000, full duplex
987 08:57:55.105407 Using ethernet@ff3f0000 device
988 08:57:55.106434 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
989 08:57:55.111680 Filename '838605/tftp-deploy-jutmyzck/kernel/uImage'.
990 08:57:55.115546 Load address: 0x1080000
991 08:57:58.660513 Loading: *################################################## 37.7 MiB
992 08:57:58.661141 10.6 MiB/s
993 08:57:58.661565 done
994 08:57:58.663938 Bytes transferred = 39557696 (25b9a40 hex)
995 08:57:58.664759 Sending with 10 millisecond of delay
997 08:58:03.355192 => tftpboot 0x08000000 838605/tftp-deploy-jutmyzck/ramdisk/ramdisk.cpio.gz.uboot
998 08:58:03.365985 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
999 08:58:03.366807 tftpboot 0x08000000 838605/tftp-deploy-jutmyzck/ramdisk/ramdisk.cpio.gz.uboot
1000 08:58:03.367251 Speed: 1000, full duplex
1001 08:58:03.367653 Using ethernet@ff3f0000 device
1002 08:58:03.368848 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1003 08:58:03.379644 Filename '838605/tftp-deploy-jutmyzck/ramdisk/ramdisk.cpio.gz.uboot'.
1004 08:58:03.380194 Load address: 0x8000000
1005 08:58:05.481398 Loading: *################################################# UDP wrong checksum 00000005 00005a03
1006 08:58:10.481969 T UDP wrong checksum 00000005 00005a03
1007 08:58:14.384358 UDP wrong checksum 000000ff 00003e87
1008 08:58:14.404202 UDP wrong checksum 000000ff 0000db79
1009 08:58:20.483936 T UDP wrong checksum 00000005 00005a03
1010 08:58:40.490481 T T T T T UDP wrong checksum 00000005 00005a03
1011 08:58:50.885368 T T UDP wrong checksum 000000ff 00000d79
1012 08:58:50.902216 UDP wrong checksum 000000ff 0000976b
1013 08:59:00.495690 T
1014 08:59:00.496346 Retry count exceeded; starting again
1016 08:59:00.497738 end: 2.4.3 bootloader-commands (duration 00:01:16) [common]
1019 08:59:00.499553 end: 2.4 uboot-commands (duration 00:01:48) [common]
1021 08:59:00.500950 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1023 08:59:00.502002 end: 2 uboot-action (duration 00:01:48) [common]
1025 08:59:00.503529 Cleaning after the job
1026 08:59:00.504106 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/ramdisk
1027 08:59:00.505374 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/kernel
1028 08:59:00.546504 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/dtb
1029 08:59:00.547786 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/nfsrootfs
1030 08:59:00.702098 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/838605/tftp-deploy-jutmyzck/modules
1031 08:59:00.723147 start: 4.1 power-off (timeout 00:00:30) [common]
1032 08:59:00.723797 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1033 08:59:00.757587 >> OK - accepted request
1034 08:59:00.759659 Returned 0 in 0 seconds
1035 08:59:00.860518 end: 4.1 power-off (duration 00:00:00) [common]
1037 08:59:00.861687 start: 4.2 read-feedback (timeout 00:10:00) [common]
1038 08:59:00.862346 Listened to connection for namespace 'common' for up to 1s
1039 08:59:01.862374 Finalising connection for namespace 'common'
1040 08:59:01.862763 Disconnecting from shell: Finalise
1041 08:59:01.863049 =>
1042 08:59:01.963743 end: 4.2 read-feedback (duration 00:00:01) [common]
1043 08:59:01.964370 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/838605
1044 08:59:03.799250 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/838605
1045 08:59:03.800121 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.