Boot log: meson-sm1-s905d3-libretech-cc

    1 22:35:36.991616  lava-dispatcher, installed at version: 2024.01
    2 22:35:36.992429  start: 0 validate
    3 22:35:36.992876  Start time: 2024-10-15 22:35:36.992845+00:00 (UTC)
    4 22:35:36.993420  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 22:35:36.993950  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
    6 22:35:37.033990  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 22:35:37.034571  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241015%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
    8 22:35:37.067431  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 22:35:37.068133  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241015%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 22:35:39.118822  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 22:35:39.119301  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241015%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
   12 22:35:39.164610  validate duration: 2.17
   14 22:35:39.166179  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 22:35:39.166845  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 22:35:39.167434  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 22:35:39.168463  Not decompressing ramdisk as can be used compressed.
   18 22:35:39.169208  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
   19 22:35:39.169704  saving as /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/ramdisk/rootfs.cpio.gz
   20 22:35:39.170206  total size: 8181887 (7 MB)
   21 22:35:39.213988  progress   0 % (0 MB)
   22 22:35:39.220348  progress   5 % (0 MB)
   23 22:35:39.226107  progress  10 % (0 MB)
   24 22:35:39.232451  progress  15 % (1 MB)
   25 22:35:39.238282  progress  20 % (1 MB)
   26 22:35:39.244383  progress  25 % (1 MB)
   27 22:35:39.250027  progress  30 % (2 MB)
   28 22:35:39.256151  progress  35 % (2 MB)
   29 22:35:39.261769  progress  40 % (3 MB)
   30 22:35:39.267799  progress  45 % (3 MB)
   31 22:35:39.275126  progress  50 % (3 MB)
   32 22:35:39.281363  progress  55 % (4 MB)
   33 22:35:39.286656  progress  60 % (4 MB)
   34 22:35:39.292321  progress  65 % (5 MB)
   35 22:35:39.297705  progress  70 % (5 MB)
   36 22:35:39.303443  progress  75 % (5 MB)
   37 22:35:39.308804  progress  80 % (6 MB)
   38 22:35:39.314598  progress  85 % (6 MB)
   39 22:35:39.319863  progress  90 % (7 MB)
   40 22:35:39.325397  progress  95 % (7 MB)
   41 22:35:39.330398  progress 100 % (7 MB)
   42 22:35:39.331092  7 MB downloaded in 0.16 s (48.50 MB/s)
   43 22:35:39.331656  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 22:35:39.332603  end: 1.1 download-retry (duration 00:00:00) [common]
   46 22:35:39.332902  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 22:35:39.333176  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 22:35:39.333731  downloading http://storage.kernelci.org/next/master/next-20241015/arm64/defconfig+debug/gcc-12/kernel/Image
   49 22:35:39.334010  saving as /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/kernel/Image
   50 22:35:39.334220  total size: 170398208 (162 MB)
   51 22:35:39.334433  No compression specified
   52 22:35:39.366267  progress   0 % (0 MB)
   53 22:35:39.473926  progress   5 % (8 MB)
   54 22:35:39.579663  progress  10 % (16 MB)
   55 22:35:39.685882  progress  15 % (24 MB)
   56 22:35:39.792150  progress  20 % (32 MB)
   57 22:35:39.898515  progress  25 % (40 MB)
   58 22:35:40.004997  progress  30 % (48 MB)
   59 22:35:40.111111  progress  35 % (56 MB)
   60 22:35:40.217869  progress  40 % (65 MB)
   61 22:35:40.324792  progress  45 % (73 MB)
   62 22:35:40.430817  progress  50 % (81 MB)
   63 22:35:40.536812  progress  55 % (89 MB)
   64 22:35:40.642584  progress  60 % (97 MB)
   65 22:35:40.748488  progress  65 % (105 MB)
   66 22:35:40.854760  progress  70 % (113 MB)
   67 22:35:40.960728  progress  75 % (121 MB)
   68 22:35:41.066898  progress  80 % (130 MB)
   69 22:35:41.172869  progress  85 % (138 MB)
   70 22:35:41.278950  progress  90 % (146 MB)
   71 22:35:41.384970  progress  95 % (154 MB)
   72 22:35:41.490457  progress 100 % (162 MB)
   73 22:35:41.491030  162 MB downloaded in 2.16 s (75.35 MB/s)
   74 22:35:41.491516  end: 1.2.1 http-download (duration 00:00:02) [common]
   76 22:35:41.492379  end: 1.2 download-retry (duration 00:00:02) [common]
   77 22:35:41.492664  start: 1.3 download-retry (timeout 00:09:58) [common]
   78 22:35:41.492932  start: 1.3.1 http-download (timeout 00:09:58) [common]
   79 22:35:41.493405  downloading http://storage.kernelci.org/next/master/next-20241015/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   80 22:35:41.493678  saving as /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/dtb/meson-sm1-s905d3-libretech-cc.dtb
   81 22:35:41.493888  total size: 53209 (0 MB)
   82 22:35:41.494095  No compression specified
   83 22:35:41.532943  progress  61 % (0 MB)
   84 22:35:41.533794  progress 100 % (0 MB)
   85 22:35:41.534326  0 MB downloaded in 0.04 s (1.26 MB/s)
   86 22:35:41.534805  end: 1.3.1 http-download (duration 00:00:00) [common]
   88 22:35:41.535622  end: 1.3 download-retry (duration 00:00:00) [common]
   89 22:35:41.535879  start: 1.4 download-retry (timeout 00:09:58) [common]
   90 22:35:41.536190  start: 1.4.1 http-download (timeout 00:09:58) [common]
   91 22:35:41.536687  downloading http://storage.kernelci.org/next/master/next-20241015/arm64/defconfig+debug/gcc-12/modules.tar.xz
   92 22:35:41.536928  saving as /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/modules/modules.tar
   93 22:35:41.537134  total size: 27688688 (26 MB)
   94 22:35:41.537344  Using unxz to decompress xz
   95 22:35:41.574069  progress   0 % (0 MB)
   96 22:35:41.767631  progress   5 % (1 MB)
   97 22:35:41.968949  progress  10 % (2 MB)
   98 22:35:42.174266  progress  15 % (3 MB)
   99 22:35:42.366969  progress  20 % (5 MB)
  100 22:35:42.578573  progress  25 % (6 MB)
  101 22:35:42.782839  progress  30 % (7 MB)
  102 22:35:42.983916  progress  35 % (9 MB)
  103 22:35:43.190686  progress  40 % (10 MB)
  104 22:35:43.414459  progress  45 % (11 MB)
  105 22:35:43.616509  progress  50 % (13 MB)
  106 22:35:43.818834  progress  55 % (14 MB)
  107 22:35:44.019213  progress  60 % (15 MB)
  108 22:35:44.232766  progress  65 % (17 MB)
  109 22:35:44.430753  progress  70 % (18 MB)
  110 22:35:44.644946  progress  75 % (19 MB)
  111 22:35:44.854789  progress  80 % (21 MB)
  112 22:35:45.064057  progress  85 % (22 MB)
  113 22:35:45.253543  progress  90 % (23 MB)
  114 22:35:45.487056  progress  95 % (25 MB)
  115 22:35:45.730707  progress 100 % (26 MB)
  116 22:35:45.746959  26 MB downloaded in 4.21 s (6.27 MB/s)
  117 22:35:45.747724  end: 1.4.1 http-download (duration 00:00:04) [common]
  119 22:35:45.749609  end: 1.4 download-retry (duration 00:00:04) [common]
  120 22:35:45.750202  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  121 22:35:45.750792  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  122 22:35:45.751348  end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
  123 22:35:45.751913  start: 1.5.2 lava-overlay (timeout 00:09:53) [common]
  124 22:35:45.753032  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r
  125 22:35:45.754012  makedir: /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin
  126 22:35:45.754762  makedir: /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/tests
  127 22:35:45.755496  makedir: /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/results
  128 22:35:45.756209  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-add-keys
  129 22:35:45.757290  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-add-sources
  130 22:35:45.758358  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-background-process-start
  131 22:35:45.759468  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-background-process-stop
  132 22:35:45.760636  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-common-functions
  133 22:35:45.761690  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-echo-ipv4
  134 22:35:45.762732  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-install-packages
  135 22:35:45.763766  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-installed-packages
  136 22:35:45.764845  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-os-build
  137 22:35:45.765895  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-probe-channel
  138 22:35:45.766972  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-probe-ip
  139 22:35:45.768210  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-target-ip
  140 22:35:45.769278  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-target-mac
  141 22:35:45.770300  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-target-storage
  142 22:35:45.771367  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-test-case
  143 22:35:45.772441  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-test-event
  144 22:35:45.773457  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-test-feedback
  145 22:35:45.774482  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-test-raise
  146 22:35:45.775520  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-test-reference
  147 22:35:45.776629  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-test-runner
  148 22:35:45.777670  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-test-set
  149 22:35:45.778722  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-test-shell
  150 22:35:45.779794  Updating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-install-packages (oe)
  151 22:35:45.780940  Updating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/bin/lava-installed-packages (oe)
  152 22:35:45.781895  Creating /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/environment
  153 22:35:45.782728  LAVA metadata
  154 22:35:45.783269  - LAVA_JOB_ID=848139
  155 22:35:45.783758  - LAVA_DISPATCHER_IP=192.168.6.2
  156 22:35:45.784550  start: 1.5.2.1 ssh-authorize (timeout 00:09:53) [common]
  157 22:35:45.786599  end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
  158 22:35:45.787275  start: 1.5.2.2 lava-vland-overlay (timeout 00:09:53) [common]
  159 22:35:45.787750  skipped lava-vland-overlay
  160 22:35:45.788333  end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
  161 22:35:45.788861  start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:53) [common]
  162 22:35:45.789299  skipped lava-multinode-overlay
  163 22:35:45.789802  end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  164 22:35:45.790318  start: 1.5.2.4 test-definition (timeout 00:09:53) [common]
  165 22:35:45.790811  Loading test definitions
  166 22:35:45.791373  start: 1.5.2.4.1 inline-repo-action (timeout 00:09:53) [common]
  167 22:35:45.791823  Using /lava-848139 at stage 0
  168 22:35:45.794164  uuid=848139_1.5.2.4.1 testdef=None
  169 22:35:45.794757  end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
  170 22:35:45.795294  start: 1.5.2.4.2 test-overlay (timeout 00:09:53) [common]
  171 22:35:45.797576  end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
  173 22:35:45.798421  start: 1.5.2.4.3 test-install-overlay (timeout 00:09:53) [common]
  174 22:35:45.800818  end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
  176 22:35:45.801685  start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:53) [common]
  177 22:35:45.804019  runner path: /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/0/tests/0_dmesg test_uuid 848139_1.5.2.4.1
  178 22:35:45.804633  end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  180 22:35:45.805435  Creating lava-test-runner.conf files
  181 22:35:45.805654  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/848139/lava-overlay-z3bknw8r/lava-848139/0 for stage 0
  182 22:35:45.806042  - 0_dmesg
  183 22:35:45.806438  end: 1.5.2.4 test-definition (duration 00:00:00) [common]
  184 22:35:45.806747  start: 1.5.2.5 compress-overlay (timeout 00:09:53) [common]
  185 22:35:45.831020  end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
  186 22:35:45.831450  start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:53) [common]
  187 22:35:45.831743  end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  188 22:35:45.832050  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  189 22:35:45.832341  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:53) [common]
  190 22:35:46.773278  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  191 22:35:46.773838  start: 1.5.4 extract-modules (timeout 00:09:52) [common]
  192 22:35:46.774332  extracting modules file /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/modules/modules.tar to /var/lib/lava/dispatcher/tmp/848139/extract-overlay-ramdisk-6wr1wlo3/ramdisk
  193 22:35:48.497658  end: 1.5.4 extract-modules (duration 00:00:02) [common]
  194 22:35:48.498115  start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
  195 22:35:48.498407  [common] Applying overlay /var/lib/lava/dispatcher/tmp/848139/compress-overlay-guquqbe8/overlay-1.5.2.5.tar.gz to ramdisk
  196 22:35:48.498650  [common] Applying overlay /var/lib/lava/dispatcher/tmp/848139/compress-overlay-guquqbe8/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/848139/extract-overlay-ramdisk-6wr1wlo3/ramdisk
  197 22:35:48.529260  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  198 22:35:48.529656  start: 1.5.6 prepare-kernel (timeout 00:09:51) [common]
  199 22:35:48.529924  start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:51) [common]
  200 22:35:48.530147  Converting downloaded kernel to a uImage
  201 22:35:48.530443  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/kernel/Image /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/kernel/uImage
  202 22:35:50.297543  output: Image Name:   
  203 22:35:50.297992  output: Created:      Tue Oct 15 22:35:48 2024
  204 22:35:50.298209  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  205 22:35:50.298417  output: Data Size:    170398208 Bytes = 166404.50 KiB = 162.50 MiB
  206 22:35:50.298622  output: Load Address: 01080000
  207 22:35:50.298820  output: Entry Point:  01080000
  208 22:35:50.299017  output: 
  209 22:35:50.299353  end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
  210 22:35:50.299620  end: 1.5.6 prepare-kernel (duration 00:00:02) [common]
  211 22:35:50.299889  start: 1.5.7 configure-preseed-file (timeout 00:09:49) [common]
  212 22:35:50.300201  end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
  213 22:35:50.300468  start: 1.5.8 compress-ramdisk (timeout 00:09:49) [common]
  214 22:35:50.300728  Building ramdisk /var/lib/lava/dispatcher/tmp/848139/extract-overlay-ramdisk-6wr1wlo3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/848139/extract-overlay-ramdisk-6wr1wlo3/ramdisk
  215 22:35:56.093430  >> 441959 blocks

  216 22:36:15.560857  Adding RAMdisk u-boot header.
  217 22:36:15.561328  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/848139/extract-overlay-ramdisk-6wr1wlo3/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/848139/extract-overlay-ramdisk-6wr1wlo3/ramdisk.cpio.gz.uboot
  218 22:36:16.122826  output: Image Name:   
  219 22:36:16.123243  output: Created:      Tue Oct 15 22:36:15 2024
  220 22:36:16.123481  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  221 22:36:16.123725  output: Data Size:    53672276 Bytes = 52414.33 KiB = 51.19 MiB
  222 22:36:16.123951  output: Load Address: 00000000
  223 22:36:16.124234  output: Entry Point:  00000000
  224 22:36:16.124465  output: 
  225 22:36:16.125236  rename /var/lib/lava/dispatcher/tmp/848139/extract-overlay-ramdisk-6wr1wlo3/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/ramdisk/ramdisk.cpio.gz.uboot
  226 22:36:16.125701  end: 1.5.8 compress-ramdisk (duration 00:00:26) [common]
  227 22:36:16.126044  end: 1.5 prepare-tftp-overlay (duration 00:00:30) [common]
  228 22:36:16.126391  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:23) [common]
  229 22:36:16.126664  No LXC device requested
  230 22:36:16.126964  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  231 22:36:16.127276  start: 1.7 deploy-device-env (timeout 00:09:23) [common]
  232 22:36:16.127572  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  233 22:36:16.127819  Checking files for TFTP limit of 4294967296 bytes.
  234 22:36:16.129449  end: 1 tftp-deploy (duration 00:00:37) [common]
  235 22:36:16.129811  start: 2 uboot-action (timeout 00:05:00) [common]
  236 22:36:16.130134  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  237 22:36:16.130433  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  238 22:36:16.130708  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  239 22:36:16.131004  Using kernel file from prepare-kernel: 848139/tftp-deploy-epc41yph/kernel/uImage
  240 22:36:16.131345  substitutions:
  241 22:36:16.131574  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  242 22:36:16.131792  - {DTB_ADDR}: 0x01070000
  243 22:36:16.132032  - {DTB}: 848139/tftp-deploy-epc41yph/dtb/meson-sm1-s905d3-libretech-cc.dtb
  244 22:36:16.132259  - {INITRD}: 848139/tftp-deploy-epc41yph/ramdisk/ramdisk.cpio.gz.uboot
  245 22:36:16.132485  - {KERNEL_ADDR}: 0x01080000
  246 22:36:16.132713  - {KERNEL}: 848139/tftp-deploy-epc41yph/kernel/uImage
  247 22:36:16.132936  - {LAVA_MAC}: None
  248 22:36:16.133177  - {PRESEED_CONFIG}: None
  249 22:36:16.133388  - {PRESEED_LOCAL}: None
  250 22:36:16.133595  - {RAMDISK_ADDR}: 0x08000000
  251 22:36:16.133811  - {RAMDISK}: 848139/tftp-deploy-epc41yph/ramdisk/ramdisk.cpio.gz.uboot
  252 22:36:16.134047  - {ROOT_PART}: None
  253 22:36:16.134276  - {ROOT}: None
  254 22:36:16.134495  - {SERVER_IP}: 192.168.6.2
  255 22:36:16.134727  - {TEE_ADDR}: 0x83000000
  256 22:36:16.134950  - {TEE}: None
  257 22:36:16.135169  Parsed boot commands:
  258 22:36:16.135388  - setenv autoload no
  259 22:36:16.135607  - setenv initrd_high 0xffffffff
  260 22:36:16.135822  - setenv fdt_high 0xffffffff
  261 22:36:16.136069  - dhcp
  262 22:36:16.136296  - setenv serverip 192.168.6.2
  263 22:36:16.136520  - tftpboot 0x01080000 848139/tftp-deploy-epc41yph/kernel/uImage
  264 22:36:16.136736  - tftpboot 0x08000000 848139/tftp-deploy-epc41yph/ramdisk/ramdisk.cpio.gz.uboot
  265 22:36:16.136938  - tftpboot 0x01070000 848139/tftp-deploy-epc41yph/dtb/meson-sm1-s905d3-libretech-cc.dtb
  266 22:36:16.137142  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  267 22:36:16.137350  - bootm 0x01080000 0x08000000 0x01070000
  268 22:36:16.137646  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  270 22:36:16.138571  start: 2.3 connect-device (timeout 00:05:00) [common]
  271 22:36:16.138861  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  272 22:36:16.150667  Setting prompt string to ['lava-test: # ']
  273 22:36:16.152364  end: 2.3 connect-device (duration 00:00:00) [common]
  274 22:36:16.152966  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  275 22:36:16.153524  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  276 22:36:16.154040  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  277 22:36:16.155181  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  278 22:36:16.193205  >> OK - accepted request

  279 22:36:16.195209  Returned 0 in 0 seconds
  280 22:36:16.296395  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  282 22:36:16.298145  end: 2.4.1 reset-device (duration 00:00:00) [common]
  283 22:36:16.298751  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  284 22:36:16.299301  Setting prompt string to ['Hit any key to stop autoboot']
  285 22:36:16.299795  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  286 22:36:16.301588  Trying 192.168.56.21...
  287 22:36:16.302112  Connected to conserv1.
  288 22:36:16.302568  Escape character is '^]'.
  289 22:36:16.303030  
  290 22:36:16.303495  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  291 22:36:16.303958  
  292 22:36:24.447904  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  293 22:36:24.448367  bl2_stage_init 0x01
  294 22:36:24.448606  bl2_stage_init 0x81
  295 22:36:24.453410  hw id: 0x0000 - pwm id 0x01
  296 22:36:24.453823  bl2_stage_init 0xc1
  297 22:36:24.459054  bl2_stage_init 0x02
  298 22:36:24.459448  
  299 22:36:24.459768  L0:00000000
  300 22:36:24.460135  L1:00000703
  301 22:36:24.460714  L2:00008067
  302 22:36:24.461181  L3:15000000
  303 22:36:24.464707  S1:00000000
  304 22:36:24.465221  B2:20282000
  305 22:36:24.465676  B1:a0f83180
  306 22:36:24.466123  
  307 22:36:24.466569  TE: 69035
  308 22:36:24.467012  
  309 22:36:24.470295  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  310 22:36:24.470815  
  311 22:36:24.475899  Board ID = 1
  312 22:36:24.476490  Set cpu clk to 24M
  313 22:36:24.476956  Set clk81 to 24M
  314 22:36:24.481510  Use GP1_pll as DSU clk.
  315 22:36:24.482041  DSU clk: 1200 Mhz
  316 22:36:24.482498  CPU clk: 1200 MHz
  317 22:36:24.487130  Set clk81 to 166.6M
  318 22:36:24.492694  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  319 22:36:24.493235  board id: 1
  320 22:36:24.499969  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  321 22:36:24.510824  fw parse done
  322 22:36:24.516780  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  323 22:36:24.559857  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  324 22:36:24.571154  PIEI prepare done
  325 22:36:24.571695  fastboot data load
  326 22:36:24.572204  fastboot data verify
  327 22:36:24.576633  verify result: 266
  328 22:36:24.582254  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  329 22:36:24.582800  LPDDR4 probe
  330 22:36:24.583272  ddr clk to 1584MHz
  331 22:36:24.590295  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  332 22:36:24.628013  
  333 22:36:24.628572  dmc_version 0001
  334 22:36:24.634987  Check phy result
  335 22:36:24.641002  INFO : End of CA training
  336 22:36:24.641527  INFO : End of initialization
  337 22:36:24.646609  INFO : Training has run successfully!
  338 22:36:24.647130  Check phy result
  339 22:36:24.652245  INFO : End of initialization
  340 22:36:24.652770  INFO : End of read enable training
  341 22:36:24.657764  INFO : End of fine write leveling
  342 22:36:24.669098  INFO : End of Write leveling coarse delay
  343 22:36:24.669641  INFO : Training has run successfully!
  344 22:36:24.670104  Check phy result
  345 22:36:24.670556  INFO : End of initialization
  346 22:36:24.671001  INFO : End of read dq deskew training
  347 22:36:24.674595  INFO : End of MPR read delay center optimization
  348 22:36:24.680236  INFO : End of write delay center optimization
  349 22:36:24.685776  INFO : End of read delay center optimization
  350 22:36:24.686307  INFO : End of max read latency training
  351 22:36:24.691375  INFO : Training has run successfully!
  352 22:36:24.691908  1D training succeed
  353 22:36:24.700530  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  354 22:36:24.748865  Check phy result
  355 22:36:24.749427  INFO : End of initialization
  356 22:36:24.776342  INFO : End of 2D read delay Voltage center optimization
  357 22:36:24.800406  INFO : End of 2D read delay Voltage center optimization
  358 22:36:24.857068  INFO : End of 2D write delay Voltage center optimization
  359 22:36:24.911211  INFO : End of 2D write delay Voltage center optimization
  360 22:36:24.916688  INFO : Training has run successfully!
  361 22:36:24.917243  
  362 22:36:24.917723  channel==0
  363 22:36:24.922321  RxClkDly_Margin_A0==78 ps 8
  364 22:36:24.922866  TxDqDly_Margin_A0==98 ps 10
  365 22:36:24.927895  RxClkDly_Margin_A1==78 ps 8
  366 22:36:24.928469  TxDqDly_Margin_A1==98 ps 10
  367 22:36:24.928937  TrainedVREFDQ_A0==74
  368 22:36:24.933461  TrainedVREFDQ_A1==74
  369 22:36:24.934000  VrefDac_Margin_A0==23
  370 22:36:24.934468  DeviceVref_Margin_A0==40
  371 22:36:24.939133  VrefDac_Margin_A1==23
  372 22:36:24.939664  DeviceVref_Margin_A1==40
  373 22:36:24.940165  
  374 22:36:24.940631  
  375 22:36:24.944669  channel==1
  376 22:36:24.945236  RxClkDly_Margin_A0==78 ps 8
  377 22:36:24.945708  TxDqDly_Margin_A0==98 ps 10
  378 22:36:24.950331  RxClkDly_Margin_A1==88 ps 9
  379 22:36:24.950864  TxDqDly_Margin_A1==88 ps 9
  380 22:36:24.955896  TrainedVREFDQ_A0==75
  381 22:36:24.956454  TrainedVREFDQ_A1==77
  382 22:36:24.956923  VrefDac_Margin_A0==23
  383 22:36:24.961492  DeviceVref_Margin_A0==39
  384 22:36:24.962029  VrefDac_Margin_A1==22
  385 22:36:24.967151  DeviceVref_Margin_A1==37
  386 22:36:24.967674  
  387 22:36:24.968181   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  388 22:36:24.968639  
  389 22:36:25.000669  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
  390 22:36:25.001279  2D training succeed
  391 22:36:25.006354  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  392 22:36:25.011893  auto size-- 65535DDR cs0 size: 2048MB
  393 22:36:25.012450  DDR cs1 size: 2048MB
  394 22:36:25.017481  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  395 22:36:25.018010  cs0 DataBus test pass
  396 22:36:25.023199  cs1 DataBus test pass
  397 22:36:25.023722  cs0 AddrBus test pass
  398 22:36:25.024217  cs1 AddrBus test pass
  399 22:36:25.024673  
  400 22:36:25.028687  100bdlr_step_size ps== 471
  401 22:36:25.029229  result report
  402 22:36:25.034265  boot times 0Enable ddr reg access
  403 22:36:25.039529  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  404 22:36:25.053408  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  405 22:36:25.712753  bl2z: ptr: 05129330, size: 00001e40
  406 22:36:25.720502  0.0;M3 CHK:0;cm4_sp_mode 0
  407 22:36:25.721012  MVN_1=0x00000000
  408 22:36:25.721442  MVN_2=0x00000000
  409 22:36:25.732061  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  410 22:36:25.732700  OPS=0x04
  411 22:36:25.733260  ring efuse init
  412 22:36:25.734931  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  413 22:36:25.740636  [0.017354 Inits done]
  414 22:36:25.741110  secure task start!
  415 22:36:25.741529  high task start!
  416 22:36:25.741936  low task start!
  417 22:36:25.744938  run into bl31
  418 22:36:25.753549  NOTICE:  BL31: v1.3(release):4fc40b1
  419 22:36:25.761367  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  420 22:36:25.761873  NOTICE:  BL31: G12A normal boot!
  421 22:36:25.776971  NOTICE:  BL31: BL33 decompress pass
  422 22:36:25.782623  ERROR:   Error initializing runtime service opteed_fast
  423 22:36:28.497892  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  424 22:36:28.498518  bl2_stage_init 0x01
  425 22:36:28.498947  bl2_stage_init 0x81
  426 22:36:28.514663  hw id: 0x0000 - pwm id 0x01
  427 22:36:28.515168  bl2_stage_init 0xc1
  428 22:36:28.515566  bl2_stage_init 0x02
  429 22:36:28.515956  
  430 22:36:28.516402  L0:00000000
  431 22:36:28.516789  L1:00000703
  432 22:36:28.517171  L2:00008067
  433 22:36:28.517553  L3:15000000
  434 22:36:28.517931  S1:00000000
  435 22:36:28.518311  B2:20282000
  436 22:36:28.518691  B1:a0f83180
  437 22:36:28.519071  
  438 22:36:28.519451  TE: 69038
  439 22:36:28.519831  
  440 22:36:28.520545  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  441 22:36:28.520954  
  442 22:36:28.525661  Board ID = 1
  443 22:36:28.526115  Set cpu clk to 24M
  444 22:36:28.526501  Set clk81 to 24M
  445 22:36:28.531194  Use GP1_pll as DSU clk.
  446 22:36:28.531668  DSU clk: 1200 Mhz
  447 22:36:28.532097  CPU clk: 1200 MHz
  448 22:36:28.536862  Set clk81 to 166.6M
  449 22:36:28.542483  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  450 22:36:28.542924  board id: 1
  451 22:36:28.549921  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  452 22:36:28.560666  fw parse done
  453 22:36:28.566550  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  454 22:36:28.609034  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  455 22:36:28.619936  PIEI prepare done
  456 22:36:28.620441  fastboot data load
  457 22:36:28.620841  fastboot data verify
  458 22:36:28.625591  verify result: 266
  459 22:36:28.631140  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  460 22:36:28.631576  LPDDR4 probe
  461 22:36:28.631965  ddr clk to 1584MHz
  462 22:36:28.639119  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  463 22:36:28.676456  
  464 22:36:28.676967  dmc_version 0001
  465 22:36:28.683025  Check phy result
  466 22:36:28.689096  INFO : End of CA training
  467 22:36:28.689530  INFO : End of initialization
  468 22:36:28.700337  INFO : Training has run successfully!
  469 22:36:28.700777  Check phy result
  470 22:36:28.701188  INFO : End of initialization
  471 22:36:28.701595  INFO : End of read enable training
  472 22:36:28.705800  INFO : End of fine write leveling
  473 22:36:28.711389  INFO : End of Write leveling coarse delay
  474 22:36:28.711830  INFO : Training has run successfully!
  475 22:36:28.712275  Check phy result
  476 22:36:28.716962  INFO : End of initialization
  477 22:36:28.717394  INFO : End of read dq deskew training
  478 22:36:28.722595  INFO : End of MPR read delay center optimization
  479 22:36:28.728210  INFO : End of write delay center optimization
  480 22:36:28.733804  INFO : End of read delay center optimization
  481 22:36:28.734282  INFO : End of max read latency training
  482 22:36:28.739361  INFO : Training has run successfully!
  483 22:36:28.739807  1D training succeed
  484 22:36:28.748563  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  485 22:36:28.796216  Check phy result
  486 22:36:28.796722  INFO : End of initialization
  487 22:36:28.818503  INFO : End of 2D read delay Voltage center optimization
  488 22:36:28.837701  INFO : End of 2D read delay Voltage center optimization
  489 22:36:28.889609  INFO : End of 2D write delay Voltage center optimization
  490 22:36:28.938855  INFO : End of 2D write delay Voltage center optimization
  491 22:36:28.944269  INFO : Training has run successfully!
  492 22:36:28.944856  
  493 22:36:28.945393  channel==0
  494 22:36:28.949839  RxClkDly_Margin_A0==78 ps 8
  495 22:36:28.950401  TxDqDly_Margin_A0==98 ps 10
  496 22:36:28.955449  RxClkDly_Margin_A1==88 ps 9
  497 22:36:28.956049  TxDqDly_Margin_A1==98 ps 10
  498 22:36:28.956595  TrainedVREFDQ_A0==74
  499 22:36:28.961092  TrainedVREFDQ_A1==75
  500 22:36:28.961665  VrefDac_Margin_A0==22
  501 22:36:28.962191  DeviceVref_Margin_A0==40
  502 22:36:28.966608  VrefDac_Margin_A1==23
  503 22:36:28.967164  DeviceVref_Margin_A1==39
  504 22:36:28.967702  
  505 22:36:28.968277  
  506 22:36:28.972308  channel==1
  507 22:36:28.972867  RxClkDly_Margin_A0==78 ps 8
  508 22:36:28.973405  TxDqDly_Margin_A0==98 ps 10
  509 22:36:28.977846  RxClkDly_Margin_A1==78 ps 8
  510 22:36:28.978408  TxDqDly_Margin_A1==88 ps 9
  511 22:36:28.983437  TrainedVREFDQ_A0==78
  512 22:36:28.984031  TrainedVREFDQ_A1==75
  513 22:36:28.984577  VrefDac_Margin_A0==22
  514 22:36:28.989040  DeviceVref_Margin_A0==36
  515 22:36:28.989593  VrefDac_Margin_A1==22
  516 22:36:28.994640  DeviceVref_Margin_A1==39
  517 22:36:28.995202  
  518 22:36:28.995740   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  519 22:36:28.996298  
  520 22:36:29.028289  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  521 22:36:29.028896  2D training succeed
  522 22:36:29.033860  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  523 22:36:29.039442  auto size-- 65535DDR cs0 size: 2048MB
  524 22:36:29.039905  DDR cs1 size: 2048MB
  525 22:36:29.045036  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  526 22:36:29.045502  cs0 DataBus test pass
  527 22:36:29.056395  cs1 DataBus test pass
  528 22:36:29.056927  cs0 AddrBus test pass
  529 22:36:29.057345  cs1 AddrBus test pass
  530 22:36:29.057748  
  531 22:36:29.058150  100bdlr_step_size ps== 478
  532 22:36:29.058560  result report
  533 22:36:29.061827  boot times 0Enable ddr reg access
  534 22:36:29.067083  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  535 22:36:29.080482  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  536 22:36:29.735711  bl2z: ptr: 05129330, size: 00001e40
  537 22:36:29.743711  0.0;M3 CHK:0;cm4_sp_mode 0
  538 22:36:29.744213  MVN_1=0x00000000
  539 22:36:29.744618  MVN_2=0x00000000
  540 22:36:29.755165  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  541 22:36:29.755615  OPS=0x04
  542 22:36:29.756050  ring efuse init
  543 22:36:29.760810  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  544 22:36:29.761259  [0.017310 Inits done]
  545 22:36:29.761664  secure task start!
  546 22:36:29.768528  high task start!
  547 22:36:29.768966  low task start!
  548 22:36:29.769367  run into bl31
  549 22:36:29.777146  NOTICE:  BL31: v1.3(release):4fc40b1
  550 22:36:29.784937  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  551 22:36:29.785382  NOTICE:  BL31: G12A normal boot!
  552 22:36:29.800387  NOTICE:  BL31: BL33 decompress pass
  553 22:36:29.805204  ERROR:   Error initializing runtime service opteed_fast
  554 22:36:31.200159  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  555 22:36:31.200688  bl2_stage_init 0x01
  556 22:36:31.201098  bl2_stage_init 0x81
  557 22:36:31.205721  hw id: 0x0000 - pwm id 0x01
  558 22:36:31.206158  bl2_stage_init 0xc1
  559 22:36:31.210436  bl2_stage_init 0x02
  560 22:36:31.210863  
  561 22:36:31.211269  L0:00000000
  562 22:36:31.211665  L1:00000703
  563 22:36:31.212102  L2:00008067
  564 22:36:31.216068  L3:15000000
  565 22:36:31.216496  S1:00000000
  566 22:36:31.216897  B2:20282000
  567 22:36:31.217287  B1:a0f83180
  568 22:36:31.217676  
  569 22:36:31.218067  TE: 71080
  570 22:36:31.218455  
  571 22:36:31.227211  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  572 22:36:31.227646  
  573 22:36:31.228076  Board ID = 1
  574 22:36:31.228475  Set cpu clk to 24M
  575 22:36:31.228867  Set clk81 to 24M
  576 22:36:31.232890  Use GP1_pll as DSU clk.
  577 22:36:31.233321  DSU clk: 1200 Mhz
  578 22:36:31.233718  CPU clk: 1200 MHz
  579 22:36:31.238412  Set clk81 to 166.6M
  580 22:36:31.244065  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  581 22:36:31.244498  board id: 1
  582 22:36:31.251681  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  583 22:36:31.263083  fw parse done
  584 22:36:31.269053  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  585 22:36:31.312020  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  586 22:36:31.323269  PIEI prepare done
  587 22:36:31.323724  fastboot data load
  588 22:36:31.324174  fastboot data verify
  589 22:36:31.328856  verify result: 266
  590 22:36:31.342656  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  591 22:36:31.343096  LPDDR4 probe
  592 22:36:31.343497  ddr clk to 1584MHz
  593 22:36:31.343889  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  594 22:36:31.380223  
  595 22:36:31.380663  dmc_version 0001
  596 22:36:31.387222  Check phy result
  597 22:36:31.393181  INFO : End of CA training
  598 22:36:31.393616  INFO : End of initialization
  599 22:36:31.398781  INFO : Training has run successfully!
  600 22:36:31.399214  Check phy result
  601 22:36:31.404368  INFO : End of initialization
  602 22:36:31.404799  INFO : End of read enable training
  603 22:36:31.410095  INFO : End of fine write leveling
  604 22:36:31.415549  INFO : End of Write leveling coarse delay
  605 22:36:31.415977  INFO : Training has run successfully!
  606 22:36:31.416420  Check phy result
  607 22:36:31.421177  INFO : End of initialization
  608 22:36:31.421604  INFO : End of read dq deskew training
  609 22:36:31.426787  INFO : End of MPR read delay center optimization
  610 22:36:31.432388  INFO : End of write delay center optimization
  611 22:36:31.437961  INFO : End of read delay center optimization
  612 22:36:31.438391  INFO : End of max read latency training
  613 22:36:31.443578  INFO : Training has run successfully!
  614 22:36:31.444033  1D training succeed
  615 22:36:31.452795  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  616 22:36:31.501076  Check phy result
  617 22:36:31.501514  INFO : End of initialization
  618 22:36:31.528402  INFO : End of 2D read delay Voltage center optimization
  619 22:36:31.551749  INFO : End of 2D read delay Voltage center optimization
  620 22:36:31.609323  INFO : End of 2D write delay Voltage center optimization
  621 22:36:31.663339  INFO : End of 2D write delay Voltage center optimization
  622 22:36:31.668892  INFO : Training has run successfully!
  623 22:36:31.669327  
  624 22:36:31.669735  channel==0
  625 22:36:31.674497  RxClkDly_Margin_A0==78 ps 8
  626 22:36:31.674929  TxDqDly_Margin_A0==98 ps 10
  627 22:36:31.680131  RxClkDly_Margin_A1==88 ps 9
  628 22:36:31.680559  TxDqDly_Margin_A1==98 ps 10
  629 22:36:31.680962  TrainedVREFDQ_A0==75
  630 22:36:31.685710  TrainedVREFDQ_A1==75
  631 22:36:31.686141  VrefDac_Margin_A0==22
  632 22:36:31.686537  DeviceVref_Margin_A0==39
  633 22:36:31.691319  VrefDac_Margin_A1==23
  634 22:36:31.691745  DeviceVref_Margin_A1==39
  635 22:36:31.692178  
  636 22:36:31.692575  
  637 22:36:31.696896  channel==1
  638 22:36:31.697320  RxClkDly_Margin_A0==78 ps 8
  639 22:36:31.697717  TxDqDly_Margin_A0==98 ps 10
  640 22:36:31.702523  RxClkDly_Margin_A1==88 ps 9
  641 22:36:31.702946  TxDqDly_Margin_A1==88 ps 9
  642 22:36:31.708179  TrainedVREFDQ_A0==78
  643 22:36:31.708612  TrainedVREFDQ_A1==78
  644 22:36:31.709009  VrefDac_Margin_A0==23
  645 22:36:31.713702  DeviceVref_Margin_A0==36
  646 22:36:31.714132  VrefDac_Margin_A1==23
  647 22:36:31.719294  DeviceVref_Margin_A1==36
  648 22:36:31.719721  
  649 22:36:31.720152   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  650 22:36:31.720547  
  651 22:36:31.752915  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000017 00000019 00000016 00000018 00000015 00000015 00000017 00000019 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
  652 22:36:31.753376  2D training succeed
  653 22:36:31.758528  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  654 22:36:31.764184  auto size-- 65535DDR cs0 size: 2048MB
  655 22:36:31.764617  DDR cs1 size: 2048MB
  656 22:36:31.769690  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  657 22:36:31.770116  cs0 DataBus test pass
  658 22:36:31.775307  cs1 DataBus test pass
  659 22:36:31.775729  cs0 AddrBus test pass
  660 22:36:31.776183  cs1 AddrBus test pass
  661 22:36:31.776581  
  662 22:36:31.780894  100bdlr_step_size ps== 478
  663 22:36:31.781329  result report
  664 22:36:31.786520  boot times 0Enable ddr reg access
  665 22:36:31.790988  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  666 22:36:31.805754  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  667 22:36:32.464978  bl2z: ptr: 05129330, size: 00001e40
  668 22:36:32.471732  0.0;M3 CHK:0;cm4_sp_mode 0
  669 22:36:32.472369  MVN_1=0x00000000
  670 22:36:32.472786  MVN_2=0x00000000
  671 22:36:32.483254  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  672 22:36:32.483706  OPS=0x04
  673 22:36:32.484146  ring efuse init
  674 22:36:32.488836  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  675 22:36:32.489283  [0.017354 Inits done]
  676 22:36:32.489686  secure task start!
  677 22:36:32.496309  high task start!
  678 22:36:32.496738  low task start!
  679 22:36:32.497135  run into bl31
  680 22:36:32.504866  NOTICE:  BL31: v1.3(release):4fc40b1
  681 22:36:32.512648  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  682 22:36:32.513083  NOTICE:  BL31: G12A normal boot!
  683 22:36:32.528267  NOTICE:  BL31: BL33 decompress pass
  684 22:36:32.533861  ERROR:   Error initializing runtime service opteed_fast
  685 22:36:33.329484  
  686 22:36:33.330030  
  687 22:36:33.334788  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  688 22:36:33.335258  
  689 22:36:33.338296  Model: Libre Computer AML-S905D3-CC Solitude
  690 22:36:33.485247  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  691 22:36:33.500647  DRAM:  2 GiB (effective 3.8 GiB)
  692 22:36:33.601777  Core:  406 devices, 33 uclasses, devicetree: separate
  693 22:36:33.607634  WDT:   Not starting watchdog@f0d0
  694 22:36:33.632742  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  695 22:36:33.645004  Loading Environment from FAT... Card did not respond to voltage select! : -110
  696 22:36:33.649950  ** Bad device specification mmc 0 **
  697 22:36:33.659930  Card did not respond to voltage select! : -110
  698 22:36:33.667724  ** Bad device specification mmc 0 **
  699 22:36:33.668197  Couldn't find partition mmc 0
  700 22:36:33.675916  Card did not respond to voltage select! : -110
  701 22:36:33.681599  ** Bad device specification mmc 0 **
  702 22:36:33.682030  Couldn't find partition mmc 0
  703 22:36:33.686665  Error: could not access storage.
  704 22:36:33.984079  Net:   eth0: ethernet@ff3f0000
  705 22:36:33.984605  starting USB...
  706 22:36:34.228655  Bus usb@ff500000: Register 3000140 NbrPorts 3
  707 22:36:34.229182  Starting the controller
  708 22:36:34.235744  USB XHCI 1.10
  709 22:36:35.789810  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  710 22:36:35.798166         scanning usb for storage devices... 0 Storage Device(s) found
  712 22:36:35.849638  Hit any key to stop autoboot:  1 
  713 22:36:35.850475  end: 2.4.2 bootloader-interrupt (duration 00:00:20) [common]
  714 22:36:35.851058  start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
  715 22:36:35.851531  Setting prompt string to ['=>']
  716 22:36:35.852039  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
  717 22:36:35.863401   0 
  718 22:36:35.864286  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  720 22:36:35.965510  => setenv autoload no
  721 22:36:35.966249  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  722 22:36:35.971065  setenv autoload no
  724 22:36:36.072537  => setenv initrd_high 0xffffffff
  725 22:36:36.073165  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  726 22:36:36.077734  setenv initrd_high 0xffffffff
  728 22:36:36.179113  => setenv fdt_high 0xffffffff
  729 22:36:36.179740  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  730 22:36:36.184351  setenv fdt_high 0xffffffff
  732 22:36:36.285771  => dhcp
  733 22:36:36.286393  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  734 22:36:36.290024  dhcp
  735 22:36:37.146670  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  736 22:36:37.147264  Speed: 1000, full duplex
  737 22:36:37.147691  BOOTP broadcast 1
  738 22:36:37.395154  BOOTP broadcast 2
  739 22:36:37.896350  BOOTP broadcast 3
  740 22:36:38.897331  BOOTP broadcast 4
  741 22:36:40.897343  BOOTP broadcast 5
  742 22:36:40.911160  DHCP client bound to address 192.168.6.11 (3763 ms)
  744 22:36:41.012664  => setenv serverip 192.168.6.2
  745 22:36:41.013298  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
  746 22:36:41.018191  setenv serverip 192.168.6.2
  748 22:36:41.119602  => tftpboot 0x01080000 848139/tftp-deploy-epc41yph/kernel/uImage
  749 22:36:41.120272  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
  750 22:36:41.126905  tftpboot 0x01080000 848139/tftp-deploy-epc41yph/kernel/uImage
  751 22:36:41.127363  Speed: 1000, full duplex
  752 22:36:41.127772  Using ethernet@ff3f0000 device
  753 22:36:41.132608  TFTP from server 192.168.6.2; our IP address is 192.168.6.11
  754 22:36:41.138050  Filename '848139/tftp-deploy-epc41yph/kernel/uImage'.
  755 22:36:41.141765  Load address: 0x1080000
  756 22:36:45.407503  Loading: * UDP wrong checksum 000000ff 0000b1d1
  757 22:36:45.437520   UDP wrong checksum 000000ff 00003fc4
  758 22:37:30.659276  T T T T T T T T T  UDP wrong checksum 000000ff 00008395
  759 22:37:30.689572   UDP wrong checksum 000000ff 00000d88
  760 22:37:36.198604  T 
  761 22:37:36.199027  Retry count exceeded; starting again
  763 22:37:36.200059  end: 2.4.3 bootloader-commands (duration 00:01:00) [common]
  766 22:37:36.201182  end: 2.4 uboot-commands (duration 00:01:20) [common]
  768 22:37:36.201882  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  770 22:37:36.202437  end: 2 uboot-action (duration 00:01:20) [common]
  772 22:37:36.203252  Cleaning after the job
  773 22:37:36.203577  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/ramdisk
  774 22:37:36.220240  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/kernel
  775 22:37:36.270980  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/dtb
  776 22:37:36.271880  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/848139/tftp-deploy-epc41yph/modules
  777 22:37:36.329765  start: 4.1 power-off (timeout 00:00:30) [common]
  778 22:37:36.330481  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  779 22:37:36.362836  >> OK - accepted request

  780 22:37:36.365145  Returned 0 in 0 seconds
  781 22:37:36.465911  end: 4.1 power-off (duration 00:00:00) [common]
  783 22:37:36.466867  start: 4.2 read-feedback (timeout 00:10:00) [common]
  784 22:37:36.467509  Listened to connection for namespace 'common' for up to 1s
  785 22:37:37.468435  Finalising connection for namespace 'common'
  786 22:37:37.468941  Disconnecting from shell: Finalise
  787 22:37:37.469234  => 
  788 22:37:37.569896  end: 4.2 read-feedback (duration 00:00:01) [common]
  789 22:37:37.570341  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/848139
  790 22:37:37.969325  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/848139
  791 22:37:37.969947  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.