Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:22:27.258240 lava-dispatcher, installed at version: 2024.01
2 08:22:27.259017 start: 0 validate
3 08:22:27.259488 Start time: 2024-10-16 08:22:27.259458+00:00 (UTC)
4 08:22:27.260040 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:22:27.260580 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:22:27.303382 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:22:27.303955 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241016%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 08:22:27.336274 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:22:27.336885 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241016%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 08:22:27.368048 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:22:27.368543 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:22:27.400026 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:22:27.400501 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241016%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
14 08:22:27.441403 validate duration: 0.18
16 08:22:27.442902 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:22:27.443533 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:22:27.444138 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:22:27.445166 Not decompressing ramdisk as can be used compressed.
20 08:22:27.445990 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 08:22:27.446510 saving as /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/ramdisk/initrd.cpio.gz
22 08:22:27.447023 total size: 5628182 (5 MB)
23 08:22:27.491112 progress 0 % (0 MB)
24 08:22:27.499210 progress 5 % (0 MB)
25 08:22:27.507162 progress 10 % (0 MB)
26 08:22:27.514401 progress 15 % (0 MB)
27 08:22:27.522079 progress 20 % (1 MB)
28 08:22:27.526585 progress 25 % (1 MB)
29 08:22:27.530745 progress 30 % (1 MB)
30 08:22:27.534825 progress 35 % (1 MB)
31 08:22:27.538430 progress 40 % (2 MB)
32 08:22:27.542511 progress 45 % (2 MB)
33 08:22:27.546128 progress 50 % (2 MB)
34 08:22:27.550128 progress 55 % (2 MB)
35 08:22:27.554158 progress 60 % (3 MB)
36 08:22:27.557800 progress 65 % (3 MB)
37 08:22:27.561782 progress 70 % (3 MB)
38 08:22:27.565364 progress 75 % (4 MB)
39 08:22:27.569370 progress 80 % (4 MB)
40 08:22:27.572980 progress 85 % (4 MB)
41 08:22:27.576950 progress 90 % (4 MB)
42 08:22:27.580734 progress 95 % (5 MB)
43 08:22:27.583968 progress 100 % (5 MB)
44 08:22:27.584630 5 MB downloaded in 0.14 s (39.01 MB/s)
45 08:22:27.585182 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:22:27.586071 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:22:27.586364 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:22:27.586636 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:22:27.587124 downloading http://storage.kernelci.org/next/master/next-20241016/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/kernel/Image
51 08:22:27.587398 saving as /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/kernel/Image
52 08:22:27.587612 total size: 46066176 (43 MB)
53 08:22:27.587823 No compression specified
54 08:22:27.629627 progress 0 % (0 MB)
55 08:22:27.659110 progress 5 % (2 MB)
56 08:22:27.687246 progress 10 % (4 MB)
57 08:22:27.715323 progress 15 % (6 MB)
58 08:22:27.743680 progress 20 % (8 MB)
59 08:22:27.771750 progress 25 % (11 MB)
60 08:22:27.800216 progress 30 % (13 MB)
61 08:22:27.830619 progress 35 % (15 MB)
62 08:22:27.859921 progress 40 % (17 MB)
63 08:22:27.887579 progress 45 % (19 MB)
64 08:22:27.915783 progress 50 % (21 MB)
65 08:22:27.944006 progress 55 % (24 MB)
66 08:22:27.971580 progress 60 % (26 MB)
67 08:22:27.999543 progress 65 % (28 MB)
68 08:22:28.027597 progress 70 % (30 MB)
69 08:22:28.055180 progress 75 % (32 MB)
70 08:22:28.082878 progress 80 % (35 MB)
71 08:22:28.111082 progress 85 % (37 MB)
72 08:22:28.139235 progress 90 % (39 MB)
73 08:22:28.167114 progress 95 % (41 MB)
74 08:22:28.194361 progress 100 % (43 MB)
75 08:22:28.195096 43 MB downloaded in 0.61 s (72.32 MB/s)
76 08:22:28.195572 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:22:28.196422 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:22:28.196698 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:22:28.196965 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:22:28.197449 downloading http://storage.kernelci.org/next/master/next-20241016/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 08:22:28.197738 saving as /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 08:22:28.197946 total size: 53209 (0 MB)
84 08:22:28.198154 No compression specified
85 08:22:28.239814 progress 61 % (0 MB)
86 08:22:28.240709 progress 100 % (0 MB)
87 08:22:28.241263 0 MB downloaded in 0.04 s (1.17 MB/s)
88 08:22:28.241718 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:22:28.242527 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:22:28.242788 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:22:28.243050 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:22:28.243517 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 08:22:28.243777 saving as /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/nfsrootfs/full.rootfs.tar
95 08:22:28.243998 total size: 107552908 (102 MB)
96 08:22:28.244216 Using unxz to decompress xz
97 08:22:28.283276 progress 0 % (0 MB)
98 08:22:28.935050 progress 5 % (5 MB)
99 08:22:29.668740 progress 10 % (10 MB)
100 08:22:30.390817 progress 15 % (15 MB)
101 08:22:31.166882 progress 20 % (20 MB)
102 08:22:31.744021 progress 25 % (25 MB)
103 08:22:32.365878 progress 30 % (30 MB)
104 08:22:33.108213 progress 35 % (35 MB)
105 08:22:33.456571 progress 40 % (41 MB)
106 08:22:33.889889 progress 45 % (46 MB)
107 08:22:34.592843 progress 50 % (51 MB)
108 08:22:35.282738 progress 55 % (56 MB)
109 08:22:36.048754 progress 60 % (61 MB)
110 08:22:36.836363 progress 65 % (66 MB)
111 08:22:37.565603 progress 70 % (71 MB)
112 08:22:38.372982 progress 75 % (76 MB)
113 08:22:39.054114 progress 80 % (82 MB)
114 08:22:39.762872 progress 85 % (87 MB)
115 08:22:40.541307 progress 90 % (92 MB)
116 08:22:41.272574 progress 95 % (97 MB)
117 08:22:42.024140 progress 100 % (102 MB)
118 08:22:42.037900 102 MB downloaded in 13.79 s (7.44 MB/s)
119 08:22:42.038497 end: 1.4.1 http-download (duration 00:00:14) [common]
121 08:22:42.039325 end: 1.4 download-retry (duration 00:00:14) [common]
122 08:22:42.039586 start: 1.5 download-retry (timeout 00:09:45) [common]
123 08:22:42.039844 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 08:22:42.040617 downloading http://storage.kernelci.org/next/master/next-20241016/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/modules.tar.xz
125 08:22:42.041137 saving as /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/modules/modules.tar
126 08:22:42.041582 total size: 11608308 (11 MB)
127 08:22:42.042033 Using unxz to decompress xz
128 08:22:42.094986 progress 0 % (0 MB)
129 08:22:42.169121 progress 5 % (0 MB)
130 08:22:42.248477 progress 10 % (1 MB)
131 08:22:42.332923 progress 15 % (1 MB)
132 08:22:42.412017 progress 20 % (2 MB)
133 08:22:42.490143 progress 25 % (2 MB)
134 08:22:42.573200 progress 30 % (3 MB)
135 08:22:42.649061 progress 35 % (3 MB)
136 08:22:42.731050 progress 40 % (4 MB)
137 08:22:42.818538 progress 45 % (5 MB)
138 08:22:42.901542 progress 50 % (5 MB)
139 08:22:42.981719 progress 55 % (6 MB)
140 08:22:43.064758 progress 60 % (6 MB)
141 08:22:43.153224 progress 65 % (7 MB)
142 08:22:43.234434 progress 70 % (7 MB)
143 08:22:43.319368 progress 75 % (8 MB)
144 08:22:43.408157 progress 80 % (8 MB)
145 08:22:43.490501 progress 85 % (9 MB)
146 08:22:43.561883 progress 90 % (9 MB)
147 08:22:43.662218 progress 95 % (10 MB)
148 08:22:43.760662 progress 100 % (11 MB)
149 08:22:43.772921 11 MB downloaded in 1.73 s (6.39 MB/s)
150 08:22:43.773541 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:22:43.774370 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:22:43.774639 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 08:22:43.774907 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 08:22:53.487313 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/851012/extract-nfsrootfs-6lnpdw5j
156 08:22:53.487913 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 08:22:53.488229 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 08:22:53.488854 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4
159 08:22:53.489274 makedir: /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin
160 08:22:53.489595 makedir: /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/tests
161 08:22:53.489900 makedir: /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/results
162 08:22:53.490231 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-add-keys
163 08:22:53.490758 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-add-sources
164 08:22:53.491253 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-background-process-start
165 08:22:53.491734 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-background-process-stop
166 08:22:53.492293 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-common-functions
167 08:22:53.492792 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-echo-ipv4
168 08:22:53.493273 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-install-packages
169 08:22:53.493765 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-installed-packages
170 08:22:53.494237 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-os-build
171 08:22:53.494711 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-probe-channel
172 08:22:53.495185 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-probe-ip
173 08:22:53.495672 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-target-ip
174 08:22:53.496192 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-target-mac
175 08:22:53.496695 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-target-storage
176 08:22:53.497199 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-test-case
177 08:22:53.497685 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-test-event
178 08:22:53.498158 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-test-feedback
179 08:22:53.498633 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-test-raise
180 08:22:53.499125 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-test-reference
181 08:22:53.499627 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-test-runner
182 08:22:53.500208 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-test-set
183 08:22:53.500709 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-test-shell
184 08:22:53.501193 Updating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-install-packages (oe)
185 08:22:53.501715 Updating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/bin/lava-installed-packages (oe)
186 08:22:53.502151 Creating /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/environment
187 08:22:53.502518 LAVA metadata
188 08:22:53.502779 - LAVA_JOB_ID=851012
189 08:22:53.502995 - LAVA_DISPATCHER_IP=192.168.6.2
190 08:22:53.503356 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 08:22:53.504324 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 08:22:53.504640 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 08:22:53.504852 skipped lava-vland-overlay
194 08:22:53.505098 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 08:22:53.505353 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 08:22:53.505572 skipped lava-multinode-overlay
197 08:22:53.505815 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 08:22:53.506067 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 08:22:53.506312 Loading test definitions
200 08:22:53.506591 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 08:22:53.506813 Using /lava-851012 at stage 0
202 08:22:53.508012 uuid=851012_1.6.2.4.1 testdef=None
203 08:22:53.508318 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 08:22:53.508582 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 08:22:53.510362 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 08:22:53.511145 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 08:22:53.513413 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 08:22:53.514236 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 08:22:53.516397 runner path: /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/0/tests/0_dmesg test_uuid 851012_1.6.2.4.1
212 08:22:53.516960 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 08:22:53.517723 Creating lava-test-runner.conf files
215 08:22:53.517926 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/851012/lava-overlay-oyg2f3d4/lava-851012/0 for stage 0
216 08:22:53.518265 - 0_dmesg
217 08:22:53.518608 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 08:22:53.518887 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 08:22:53.540375 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 08:22:53.540761 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 08:22:53.541023 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 08:22:53.541288 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 08:22:53.541548 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 08:22:54.160884 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 08:22:54.161429 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 08:22:54.161748 extracting modules file /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/851012/extract-nfsrootfs-6lnpdw5j
227 08:22:55.623672 extracting modules file /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/851012/extract-overlay-ramdisk-a463_gep/ramdisk
228 08:22:57.112522 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 08:22:57.112984 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 08:22:57.113261 [common] Applying overlay to NFS
231 08:22:57.113473 [common] Applying overlay /var/lib/lava/dispatcher/tmp/851012/compress-overlay-2fdjchki/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/851012/extract-nfsrootfs-6lnpdw5j
232 08:22:57.142940 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 08:22:57.143323 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 08:22:57.143591 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 08:22:57.143821 Converting downloaded kernel to a uImage
236 08:22:57.144160 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/kernel/Image /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/kernel/uImage
237 08:22:57.596142 output: Image Name:
238 08:22:57.596558 output: Created: Wed Oct 16 08:22:57 2024
239 08:22:57.596764 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 08:22:57.596966 output: Data Size: 46066176 Bytes = 44986.50 KiB = 43.93 MiB
241 08:22:57.597167 output: Load Address: 01080000
242 08:22:57.597365 output: Entry Point: 01080000
243 08:22:57.597560 output:
244 08:22:57.597894 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 08:22:57.598160 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 08:22:57.598425 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 08:22:57.598677 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 08:22:57.598933 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 08:22:57.599199 Building ramdisk /var/lib/lava/dispatcher/tmp/851012/extract-overlay-ramdisk-a463_gep/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/851012/extract-overlay-ramdisk-a463_gep/ramdisk
250 08:22:59.788624 >> 166948 blocks
251 08:23:07.560742 Adding RAMdisk u-boot header.
252 08:23:07.561436 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/851012/extract-overlay-ramdisk-a463_gep/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/851012/extract-overlay-ramdisk-a463_gep/ramdisk.cpio.gz.uboot
253 08:23:07.842815 output: Image Name:
254 08:23:07.843366 output: Created: Wed Oct 16 08:23:07 2024
255 08:23:07.843641 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 08:23:07.843893 output: Data Size: 23443647 Bytes = 22894.19 KiB = 22.36 MiB
257 08:23:07.844424 output: Load Address: 00000000
258 08:23:07.844955 output: Entry Point: 00000000
259 08:23:07.845489 output:
260 08:23:07.846830 rename /var/lib/lava/dispatcher/tmp/851012/extract-overlay-ramdisk-a463_gep/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/ramdisk/ramdisk.cpio.gz.uboot
261 08:23:07.847814 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 08:23:07.848621 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 08:23:07.849326 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 08:23:07.849934 No LXC device requested
265 08:23:07.850601 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 08:23:07.851275 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 08:23:07.851919 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 08:23:07.852614 Checking files for TFTP limit of 4294967296 bytes.
269 08:23:07.856244 end: 1 tftp-deploy (duration 00:00:40) [common]
270 08:23:07.857103 start: 2 uboot-action (timeout 00:05:00) [common]
271 08:23:07.857812 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 08:23:07.858457 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 08:23:07.859123 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 08:23:07.859830 Using kernel file from prepare-kernel: 851012/tftp-deploy-crcur1c8/kernel/uImage
275 08:23:07.860691 substitutions:
276 08:23:07.861236 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 08:23:07.861759 - {DTB_ADDR}: 0x01070000
278 08:23:07.862272 - {DTB}: 851012/tftp-deploy-crcur1c8/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 08:23:07.862795 - {INITRD}: 851012/tftp-deploy-crcur1c8/ramdisk/ramdisk.cpio.gz.uboot
280 08:23:07.863305 - {KERNEL_ADDR}: 0x01080000
281 08:23:07.863820 - {KERNEL}: 851012/tftp-deploy-crcur1c8/kernel/uImage
282 08:23:07.864369 - {LAVA_MAC}: None
283 08:23:07.864941 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/851012/extract-nfsrootfs-6lnpdw5j
284 08:23:07.865466 - {NFS_SERVER_IP}: 192.168.6.2
285 08:23:07.865972 - {PRESEED_CONFIG}: None
286 08:23:07.866476 - {PRESEED_LOCAL}: None
287 08:23:07.866981 - {RAMDISK_ADDR}: 0x08000000
288 08:23:07.867469 - {RAMDISK}: 851012/tftp-deploy-crcur1c8/ramdisk/ramdisk.cpio.gz.uboot
289 08:23:07.868009 - {ROOT_PART}: None
290 08:23:07.868521 - {ROOT}: None
291 08:23:07.869028 - {SERVER_IP}: 192.168.6.2
292 08:23:07.869528 - {TEE_ADDR}: 0x83000000
293 08:23:07.870018 - {TEE}: None
294 08:23:07.870522 Parsed boot commands:
295 08:23:07.871017 - setenv autoload no
296 08:23:07.871524 - setenv initrd_high 0xffffffff
297 08:23:07.872047 - setenv fdt_high 0xffffffff
298 08:23:07.872557 - dhcp
299 08:23:07.873067 - setenv serverip 192.168.6.2
300 08:23:07.873573 - tftpboot 0x01080000 851012/tftp-deploy-crcur1c8/kernel/uImage
301 08:23:07.874077 - tftpboot 0x08000000 851012/tftp-deploy-crcur1c8/ramdisk/ramdisk.cpio.gz.uboot
302 08:23:07.874595 - tftpboot 0x01070000 851012/tftp-deploy-crcur1c8/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 08:23:07.875095 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/851012/extract-nfsrootfs-6lnpdw5j,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 08:23:07.875617 - bootm 0x01080000 0x08000000 0x01070000
305 08:23:07.876322 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 08:23:07.878268 start: 2.3 connect-device (timeout 00:05:00) [common]
308 08:23:07.878813 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 08:23:07.896411 Setting prompt string to ['lava-test: # ']
310 08:23:07.898411 end: 2.3 connect-device (duration 00:00:00) [common]
311 08:23:07.899239 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 08:23:07.900191 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 08:23:07.901248 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 08:23:07.902812 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 08:23:07.949227 >> OK - accepted request
316 08:23:07.951193 Returned 0 in 0 seconds
317 08:23:08.052267 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 08:23:08.053375 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 08:23:08.053703 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 08:23:08.053983 Setting prompt string to ['Hit any key to stop autoboot']
322 08:23:08.054231 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 08:23:08.055205 Trying 192.168.56.21...
324 08:23:08.055512 Connected to conserv1.
325 08:23:08.055775 Escape character is '^]'.
326 08:23:08.056058
327 08:23:08.056315 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 08:23:08.056538
329 08:23:14.678724 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 08:23:14.679345 bl2_stage_init 0x01
331 08:23:14.679755 bl2_stage_init 0x81
332 08:23:14.684268 hw id: 0x0000 - pwm id 0x01
333 08:23:14.684766 bl2_stage_init 0xc1
334 08:23:14.689605 bl2_stage_init 0x02
335 08:23:14.690113
336 08:23:14.690561 L0:00000000
337 08:23:14.690980 L1:00000703
338 08:23:14.691383 L2:00008067
339 08:23:14.691819 L3:15000000
340 08:23:14.695074 S1:00000000
341 08:23:14.695638 B2:20282000
342 08:23:14.696128 B1:a0f83180
343 08:23:14.696749
344 08:23:14.697241 TE: 69800
345 08:23:14.697711
346 08:23:14.700608 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 08:23:14.706203
348 08:23:14.706717 Board ID = 1
349 08:23:14.707165 Set cpu clk to 24M
350 08:23:14.707600 Set clk81 to 24M
351 08:23:14.711888 Use GP1_pll as DSU clk.
352 08:23:14.712422 DSU clk: 1200 Mhz
353 08:23:14.712861 CPU clk: 1200 MHz
354 08:23:14.717488 Set clk81 to 166.6M
355 08:23:14.723116 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 08:23:14.723651 board id: 1
357 08:23:14.730749 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 08:23:14.741467 fw parse done
359 08:23:14.747582 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 08:23:14.790627 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 08:23:14.801831 PIEI prepare done
362 08:23:14.802386 fastboot data load
363 08:23:14.802835 fastboot data verify
364 08:23:14.807344 verify result: 266
365 08:23:14.812868 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 08:23:14.813387 LPDDR4 probe
367 08:23:14.813824 ddr clk to 1584MHz
368 08:23:14.820824 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 08:23:14.858642
370 08:23:14.859204 dmc_version 0001
371 08:23:14.865778 Check phy result
372 08:23:14.871548 INFO : End of CA training
373 08:23:14.872094 INFO : End of initialization
374 08:23:14.877256 INFO : Training has run successfully!
375 08:23:14.877760 Check phy result
376 08:23:14.882881 INFO : End of initialization
377 08:23:14.883392 INFO : End of read enable training
378 08:23:14.888478 INFO : End of fine write leveling
379 08:23:14.893986 INFO : End of Write leveling coarse delay
380 08:23:14.894529 INFO : Training has run successfully!
381 08:23:14.894985 Check phy result
382 08:23:14.899740 INFO : End of initialization
383 08:23:14.900305 INFO : End of read dq deskew training
384 08:23:14.905283 INFO : End of MPR read delay center optimization
385 08:23:14.910860 INFO : End of write delay center optimization
386 08:23:14.916414 INFO : End of read delay center optimization
387 08:23:14.916982 INFO : End of max read latency training
388 08:23:14.922049 INFO : Training has run successfully!
389 08:23:14.922580 1D training succeed
390 08:23:14.931207 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 08:23:14.979519 Check phy result
392 08:23:14.980145 INFO : End of initialization
393 08:23:15.006972 INFO : End of 2D read delay Voltage center optimization
394 08:23:15.031079 INFO : End of 2D read delay Voltage center optimization
395 08:23:15.087773 INFO : End of 2D write delay Voltage center optimization
396 08:23:15.141814 INFO : End of 2D write delay Voltage center optimization
397 08:23:15.147314 INFO : Training has run successfully!
398 08:23:15.147879
399 08:23:15.148449 channel==0
400 08:23:15.152915 RxClkDly_Margin_A0==78 ps 8
401 08:23:15.153486 TxDqDly_Margin_A0==88 ps 9
402 08:23:15.156290 RxClkDly_Margin_A1==88 ps 9
403 08:23:15.156816 TxDqDly_Margin_A1==98 ps 10
404 08:23:15.161989 TrainedVREFDQ_A0==75
405 08:23:15.162534 TrainedVREFDQ_A1==74
406 08:23:15.162974 VrefDac_Margin_A0==23
407 08:23:15.167509 DeviceVref_Margin_A0==39
408 08:23:15.170255 VrefDac_Margin_A1==23
409 08:23:15.170787 DeviceVref_Margin_A1==40
410 08:23:15.171339
411 08:23:15.171814
412 08:23:15.172293 channel==1
413 08:23:15.176709 RxClkDly_Margin_A0==78 ps 8
414 08:23:15.177290 TxDqDly_Margin_A0==88 ps 9
415 08:23:15.181268 RxClkDly_Margin_A1==78 ps 8
416 08:23:15.181904 TxDqDly_Margin_A1==88 ps 9
417 08:23:15.187873 TrainedVREFDQ_A0==75
418 08:23:15.188532 TrainedVREFDQ_A1==78
419 08:23:15.189000 VrefDac_Margin_A0==22
420 08:23:15.198533 DeviceVref_Margin_A0==38
421 08:23:15.199140 VrefDac_Margin_A1==22
422 08:23:15.199632 DeviceVref_Margin_A1==36
423 08:23:15.200105
424 08:23:15.200579 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 08:23:15.201078
426 08:23:15.231555 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 08:23:15.232431 2D training succeed
428 08:23:15.237080 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 08:23:15.242622 auto size-- 65535DDR cs0 size: 2048MB
430 08:23:15.243294 DDR cs1 size: 2048MB
431 08:23:15.248218 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 08:23:15.248864 cs0 DataBus test pass
433 08:23:15.253818 cs1 DataBus test pass
434 08:23:15.254437 cs0 AddrBus test pass
435 08:23:15.254948 cs1 AddrBus test pass
436 08:23:15.255456
437 08:23:15.259462 100bdlr_step_size ps== 478
438 08:23:15.260146 result report
439 08:23:15.265022 boot times 0Enable ddr reg access
440 08:23:15.269992 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 08:23:15.284244 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 08:23:15.943196 bl2z: ptr: 05129330, size: 00001e40
443 08:23:15.951545 0.0;M3 CHK:0;cm4_sp_mode 0
444 08:23:15.952124 MVN_1=0x00000000
445 08:23:15.952536 MVN_2=0x00000000
446 08:23:15.963035 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 08:23:15.963525 OPS=0x04
448 08:23:15.963927 ring efuse init
449 08:23:15.965919 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 08:23:15.972018 [0.017354 Inits done]
451 08:23:15.972485 secure task start!
452 08:23:15.972876 high task start!
453 08:23:15.973264 low task start!
454 08:23:15.976338 run into bl31
455 08:23:15.984942 NOTICE: BL31: v1.3(release):4fc40b1
456 08:23:15.992732 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 08:23:15.993213 NOTICE: BL31: G12A normal boot!
458 08:23:16.008286 NOTICE: BL31: BL33 decompress pass
459 08:23:16.013987 ERROR: Error initializing runtime service opteed_fast
460 08:23:18.718349 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 08:23:18.718994 bl2_stage_init 0x01
462 08:23:18.719463 bl2_stage_init 0x81
463 08:23:18.723801 hw id: 0x0000 - pwm id 0x01
464 08:23:18.724215 bl2_stage_init 0xc1
465 08:23:18.729436 bl2_stage_init 0x02
466 08:23:18.729936
467 08:23:18.730339 L0:00000000
468 08:23:18.730727 L1:00000703
469 08:23:18.731117 L2:00008067
470 08:23:18.731500 L3:15000000
471 08:23:18.735005 S1:00000000
472 08:23:18.735460 B2:20282000
473 08:23:18.735851 B1:a0f83180
474 08:23:18.736274
475 08:23:18.736662 TE: 69407
476 08:23:18.737053
477 08:23:18.746434 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 08:23:18.746901
479 08:23:18.747288 Board ID = 1
480 08:23:18.747667 Set cpu clk to 24M
481 08:23:18.748082 Set clk81 to 24M
482 08:23:18.751880 Use GP1_pll as DSU clk.
483 08:23:18.752357 DSU clk: 1200 Mhz
484 08:23:18.752748 CPU clk: 1200 MHz
485 08:23:18.757371 Set clk81 to 166.6M
486 08:23:18.762970 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 08:23:18.763421 board id: 1
488 08:23:18.770342 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 08:23:18.780868 fw parse done
490 08:23:18.786843 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 08:23:18.829480 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 08:23:18.840461 PIEI prepare done
493 08:23:18.840918 fastboot data load
494 08:23:18.841308 fastboot data verify
495 08:23:18.846045 verify result: 266
496 08:23:18.851653 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 08:23:18.852147 LPDDR4 probe
498 08:23:18.852538 ddr clk to 1584MHz
499 08:23:18.859564 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 08:23:18.896847
501 08:23:18.897325 dmc_version 0001
502 08:23:18.909571 Check phy result
503 08:23:18.910040 INFO : End of CA training
504 08:23:18.910433 INFO : End of initialization
505 08:23:18.915140 INFO : Training has run successfully!
506 08:23:18.915615 Check phy result
507 08:23:18.920689 INFO : End of initialization
508 08:23:18.921161 INFO : End of read enable training
509 08:23:18.926372 INFO : End of fine write leveling
510 08:23:18.931889 INFO : End of Write leveling coarse delay
511 08:23:18.932400 INFO : Training has run successfully!
512 08:23:18.932809 Check phy result
513 08:23:18.937569 INFO : End of initialization
514 08:23:18.938043 INFO : End of read dq deskew training
515 08:23:18.943060 INFO : End of MPR read delay center optimization
516 08:23:18.948697 INFO : End of write delay center optimization
517 08:23:18.954376 INFO : End of read delay center optimization
518 08:23:18.954838 INFO : End of max read latency training
519 08:23:18.959877 INFO : Training has run successfully!
520 08:23:18.960380 1D training succeed
521 08:23:18.969020 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 08:23:19.016637 Check phy result
523 08:23:19.017156 INFO : End of initialization
524 08:23:19.038993 INFO : End of 2D read delay Voltage center optimization
525 08:23:19.058136 INFO : End of 2D read delay Voltage center optimization
526 08:23:19.110026 INFO : End of 2D write delay Voltage center optimization
527 08:23:19.159200 INFO : End of 2D write delay Voltage center optimization
528 08:23:19.164786 INFO : Training has run successfully!
529 08:23:19.165254
530 08:23:19.165664 channel==0
531 08:23:19.170398 RxClkDly_Margin_A0==78 ps 8
532 08:23:19.170874 TxDqDly_Margin_A0==98 ps 10
533 08:23:19.173699 RxClkDly_Margin_A1==88 ps 9
534 08:23:19.174155 TxDqDly_Margin_A1==88 ps 9
535 08:23:19.179416 TrainedVREFDQ_A0==74
536 08:23:19.179881 TrainedVREFDQ_A1==74
537 08:23:19.180324 VrefDac_Margin_A0==24
538 08:23:19.184931 DeviceVref_Margin_A0==40
539 08:23:19.185389 VrefDac_Margin_A1==22
540 08:23:19.190494 DeviceVref_Margin_A1==40
541 08:23:19.190959
542 08:23:19.191365
543 08:23:19.191763 channel==1
544 08:23:19.192193 RxClkDly_Margin_A0==78 ps 8
545 08:23:19.196110 TxDqDly_Margin_A0==88 ps 9
546 08:23:19.196573 RxClkDly_Margin_A1==78 ps 8
547 08:23:19.201699 TxDqDly_Margin_A1==98 ps 10
548 08:23:19.202162 TrainedVREFDQ_A0==75
549 08:23:19.202566 TrainedVREFDQ_A1==78
550 08:23:19.207425 VrefDac_Margin_A0==23
551 08:23:19.207891 DeviceVref_Margin_A0==39
552 08:23:19.212893 VrefDac_Margin_A1==22
553 08:23:19.213365 DeviceVref_Margin_A1==36
554 08:23:19.213772
555 08:23:19.218880 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 08:23:19.219353
557 08:23:19.246463 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000019 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 08:23:19.252136 2D training succeed
559 08:23:19.257690 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 08:23:19.258157 auto size-- 65535DDR cs0 size: 2048MB
561 08:23:19.263405 DDR cs1 size: 2048MB
562 08:23:19.263874 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 08:23:19.268924 cs0 DataBus test pass
564 08:23:19.269405 cs1 DataBus test pass
565 08:23:19.269813 cs0 AddrBus test pass
566 08:23:19.274493 cs1 AddrBus test pass
567 08:23:19.274968
568 08:23:19.275375 100bdlr_step_size ps== 478
569 08:23:19.275778 result report
570 08:23:19.280099 boot times 0Enable ddr reg access
571 08:23:19.287544 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 08:23:19.301417 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 08:23:19.955786 bl2z: ptr: 05129330, size: 00001e40
574 08:23:19.961745 0.0;M3 CHK:0;cm4_sp_mode 0
575 08:23:19.962260 MVN_1=0x00000000
576 08:23:19.962686 MVN_2=0x00000000
577 08:23:19.973243 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 08:23:19.973766 OPS=0x04
579 08:23:19.974194 ring efuse init
580 08:23:19.978877 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 08:23:19.979369 [0.017319 Inits done]
582 08:23:19.979788 secure task start!
583 08:23:19.986072 high task start!
584 08:23:19.986553 low task start!
585 08:23:19.986974 run into bl31
586 08:23:19.995226 NOTICE: BL31: v1.3(release):4fc40b1
587 08:23:20.002549 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 08:23:20.003056 NOTICE: BL31: G12A normal boot!
589 08:23:20.017864 NOTICE: BL31: BL33 decompress pass
590 08:23:20.023510 ERROR: Error initializing runtime service opteed_fast
591 08:23:21.422575 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 08:23:21.423203 bl2_stage_init 0x01
593 08:23:21.423612 bl2_stage_init 0x81
594 08:23:21.428423 hw id: 0x0000 - pwm id 0x01
595 08:23:21.428905 bl2_stage_init 0xc1
596 08:23:21.429318 bl2_stage_init 0x02
597 08:23:21.429730
598 08:23:21.431949 L0:00000000
599 08:23:21.432455 L1:00000703
600 08:23:21.432874 L2:00008067
601 08:23:21.433272 L3:15000000
602 08:23:21.433668 S1:00000000
603 08:23:21.438499 B2:20282000
604 08:23:21.438955 B1:a0f83180
605 08:23:21.439361
606 08:23:21.439801 TE: 70947
607 08:23:21.440302
608 08:23:21.443184 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 08:23:21.443675
610 08:23:21.448833 Board ID = 1
611 08:23:21.449457 Set cpu clk to 24M
612 08:23:21.449919 Set clk81 to 24M
613 08:23:21.454662 Use GP1_pll as DSU clk.
614 08:23:21.455207 DSU clk: 1200 Mhz
615 08:23:21.455699 CPU clk: 1200 MHz
616 08:23:21.456223 Set clk81 to 166.6M
617 08:23:21.465691 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 08:23:21.466302 board id: 1
619 08:23:21.472065 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 08:23:21.482828 fw parse done
621 08:23:21.488614 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 08:23:21.531432 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 08:23:21.542318 PIEI prepare done
624 08:23:21.542913 fastboot data load
625 08:23:21.543386 fastboot data verify
626 08:23:21.547868 verify result: 266
627 08:23:21.553447 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 08:23:21.553987 LPDDR4 probe
629 08:23:21.554451 ddr clk to 1584MHz
630 08:23:21.561459 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 08:23:21.598713
632 08:23:21.599314 dmc_version 0001
633 08:23:21.606689 Check phy result
634 08:23:21.611316 INFO : End of CA training
635 08:23:21.611856 INFO : End of initialization
636 08:23:21.616880 INFO : Training has run successfully!
637 08:23:21.617419 Check phy result
638 08:23:21.622529 INFO : End of initialization
639 08:23:21.623104 INFO : End of read enable training
640 08:23:21.627598 INFO : End of fine write leveling
641 08:23:21.631416 INFO : End of Write leveling coarse delay
642 08:23:21.637026 INFO : Training has run successfully!
643 08:23:21.637570 Check phy result
644 08:23:21.638030 INFO : End of initialization
645 08:23:21.642601 INFO : End of read dq deskew training
646 08:23:21.648397 INFO : End of MPR read delay center optimization
647 08:23:21.648938 INFO : End of write delay center optimization
648 08:23:21.653826 INFO : End of read delay center optimization
649 08:23:21.659445 INFO : End of max read latency training
650 08:23:21.659972 INFO : Training has run successfully!
651 08:23:21.665064 1D training succeed
652 08:23:21.670959 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 08:23:21.718577 Check phy result
654 08:23:21.719274 INFO : End of initialization
655 08:23:21.741100 INFO : End of 2D read delay Voltage center optimization
656 08:23:21.760391 INFO : End of 2D read delay Voltage center optimization
657 08:23:21.813752 INFO : End of 2D write delay Voltage center optimization
658 08:23:21.861209 INFO : End of 2D write delay Voltage center optimization
659 08:23:21.866682 INFO : Training has run successfully!
660 08:23:21.867230
661 08:23:21.867691 channel==0
662 08:23:21.872382 RxClkDly_Margin_A0==78 ps 8
663 08:23:21.873088 TxDqDly_Margin_A0==98 ps 10
664 08:23:21.878370 RxClkDly_Margin_A1==88 ps 9
665 08:23:21.879056 TxDqDly_Margin_A1==98 ps 10
666 08:23:21.879622 TrainedVREFDQ_A0==74
667 08:23:21.883508 TrainedVREFDQ_A1==75
668 08:23:21.884112 VrefDac_Margin_A0==24
669 08:23:21.884689 DeviceVref_Margin_A0==40
670 08:23:21.889068 VrefDac_Margin_A1==23
671 08:23:21.889607 DeviceVref_Margin_A1==39
672 08:23:21.890066
673 08:23:21.890512
674 08:23:21.894683 channel==1
675 08:23:21.895247 RxClkDly_Margin_A0==78 ps 8
676 08:23:21.895820 TxDqDly_Margin_A0==98 ps 10
677 08:23:21.900223 RxClkDly_Margin_A1==78 ps 8
678 08:23:21.900780 TxDqDly_Margin_A1==88 ps 9
679 08:23:21.907509 TrainedVREFDQ_A0==78
680 08:23:21.908106 TrainedVREFDQ_A1==75
681 08:23:21.908573 VrefDac_Margin_A0==22
682 08:23:21.911478 DeviceVref_Margin_A0==36
683 08:23:21.912150 VrefDac_Margin_A1==22
684 08:23:21.917061 DeviceVref_Margin_A1==39
685 08:23:21.917661
686 08:23:21.918165 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 08:23:21.918667
688 08:23:21.952205 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
689 08:23:21.952915 2D training succeed
690 08:23:21.956201 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 08:23:21.961833 auto size-- 65535DDR cs0 size: 2048MB
692 08:23:21.962404 DDR cs1 size: 2048MB
693 08:23:21.967294 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 08:23:21.967831 cs0 DataBus test pass
695 08:23:21.973432 cs1 DataBus test pass
696 08:23:21.973972 cs0 AddrBus test pass
697 08:23:21.974423 cs1 AddrBus test pass
698 08:23:21.974884
699 08:23:21.978519 100bdlr_step_size ps== 478
700 08:23:21.979060 result report
701 08:23:21.984201 boot times 0Enable ddr reg access
702 08:23:21.989374 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 08:23:22.003188 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 08:23:22.657993 bl2z: ptr: 05129330, size: 00001e40
705 08:23:22.665110 0.0;M3 CHK:0;cm4_sp_mode 0
706 08:23:22.665719 MVN_1=0x00000000
707 08:23:22.666226 MVN_2=0x00000000
708 08:23:22.678751 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 08:23:22.679419 OPS=0x04
710 08:23:22.680180 ring efuse init
711 08:23:22.690320 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 08:23:22.691038 [0.017319 Inits done]
713 08:23:22.691537 secure task start!
714 08:23:22.692184 high task start!
715 08:23:22.692760 low task start!
716 08:23:22.693233 run into bl31
717 08:23:22.698688 NOTICE: BL31: v1.3(release):4fc40b1
718 08:23:22.706358 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 08:23:22.706906 NOTICE: BL31: G12A normal boot!
720 08:23:22.721945 NOTICE: BL31: BL33 decompress pass
721 08:23:22.727541 ERROR: Error initializing runtime service opteed_fast
722 08:23:23.523065
723 08:23:23.523729
724 08:23:23.528382 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 08:23:23.528874
726 08:23:23.532201 Model: Libre Computer AML-S905D3-CC Solitude
727 08:23:23.678910 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 08:23:23.694401 DRAM: 2 GiB (effective 3.8 GiB)
729 08:23:23.800353 Core: 406 devices, 33 uclasses, devicetree: separate
730 08:23:23.802131 WDT: Not starting watchdog@f0d0
731 08:23:23.826304 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 08:23:23.838488 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 08:23:23.843591 ** Bad device specification mmc 0 **
734 08:23:23.855553 Card did not respond to voltage select! : -110
735 08:23:23.861129 ** Bad device specification mmc 0 **
736 08:23:23.861633 Couldn't find partition mmc 0
737 08:23:23.869487 Card did not respond to voltage select! : -110
738 08:23:23.875005 ** Bad device specification mmc 0 **
739 08:23:23.875510 Couldn't find partition mmc 0
740 08:23:23.880026 Error: could not access storage.
741 08:23:24.176408 Net: eth0: ethernet@ff3f0000
742 08:23:24.177071 starting USB...
743 08:23:24.421215 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 08:23:24.421896 Starting the controller
745 08:23:24.428045 USB XHCI 1.10
746 08:23:25.982385 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 08:23:25.989594 scanning usb for storage devices... 0 Storage Device(s) found
749 08:23:26.041190 Hit any key to stop autoboot: 1
750 08:23:26.042114 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
751 08:23:26.042763 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
752 08:23:26.043288 Setting prompt string to ['=>']
753 08:23:26.043814 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
754 08:23:26.056585 0
755 08:23:26.057621 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 08:23:26.158956 => setenv autoload no
758 08:23:26.159713 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
759 08:23:26.165045 setenv autoload no
761 08:23:26.266728 => setenv initrd_high 0xffffffff
762 08:23:26.267789 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
763 08:23:26.271893 setenv initrd_high 0xffffffff
765 08:23:26.373588 => setenv fdt_high 0xffffffff
766 08:23:26.374449 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 08:23:26.378774 setenv fdt_high 0xffffffff
769 08:23:26.480548 => dhcp
770 08:23:26.481366 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 08:23:26.485389 dhcp
772 08:23:27.441506 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 08:23:27.442120 Speed: 1000, full duplex
774 08:23:27.442521 BOOTP broadcast 1
775 08:23:27.691542 BOOTP broadcast 2
776 08:23:27.735934 DHCP client bound to address 192.168.6.19 (293 ms)
778 08:23:27.837426 => setenv serverip 192.168.6.2
779 08:23:27.838183 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
780 08:23:27.842780 setenv serverip 192.168.6.2
782 08:23:27.944176 => tftpboot 0x01080000 851012/tftp-deploy-crcur1c8/kernel/uImage
783 08:23:27.944879 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
784 08:23:27.951662 tftpboot 0x01080000 851012/tftp-deploy-crcur1c8/kernel/uImage
785 08:23:27.952163 Speed: 1000, full duplex
786 08:23:27.952564 Using ethernet@ff3f0000 device
787 08:23:27.957138 TFTP from server 192.168.6.2; our IP address is 192.168.6.19
788 08:23:27.962736 Filename '851012/tftp-deploy-crcur1c8/kernel/uImage'.
789 08:23:27.966565 Load address: 0x1080000
790 08:24:23.046434 Loading: *T T T T T T T T T T
791 08:24:23.047037 Retry count exceeded; starting again
793 08:24:23.048413 end: 2.4.3 bootloader-commands (duration 00:00:57) [common]
796 08:24:23.050174 end: 2.4 uboot-commands (duration 00:01:15) [common]
798 08:24:23.051502 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
800 08:24:23.052619 end: 2 uboot-action (duration 00:01:15) [common]
802 08:24:23.054135 Cleaning after the job
803 08:24:23.054677 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/ramdisk
804 08:24:23.068274 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/kernel
805 08:24:23.093451 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/dtb
806 08:24:23.094685 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/nfsrootfs
807 08:24:23.253199 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/851012/tftp-deploy-crcur1c8/modules
808 08:24:23.274303 start: 4.1 power-off (timeout 00:00:30) [common]
809 08:24:23.274967 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
810 08:24:23.309369 >> OK - accepted request
811 08:24:23.311253 Returned 0 in 0 seconds
812 08:24:23.412051 end: 4.1 power-off (duration 00:00:00) [common]
814 08:24:23.413072 start: 4.2 read-feedback (timeout 00:10:00) [common]
815 08:24:23.413742 Listened to connection for namespace 'common' for up to 1s
816 08:24:24.414652 Finalising connection for namespace 'common'
817 08:24:24.415116 Disconnecting from shell: Finalise
818 08:24:24.415374 =>
819 08:24:24.516114 end: 4.2 read-feedback (duration 00:00:01) [common]
820 08:24:24.516785 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/851012
821 08:24:26.271311 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/851012
822 08:24:26.271902 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.