Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:33:17.720228 lava-dispatcher, installed at version: 2024.01
2 09:33:17.721079 start: 0 validate
3 09:33:17.721593 Start time: 2024-10-22 09:33:17.721562+00:00 (UTC)
4 09:33:17.722147 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:33:17.722737 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:33:17.764599 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:33:17.765170 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241022%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 09:33:17.793088 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:33:17.793737 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241022%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:33:17.826820 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:33:17.827571 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:33:17.863496 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:33:17.864258 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241022%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 09:33:17.901038 validate duration: 0.18
16 09:33:17.901893 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:33:17.902216 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:33:17.902531 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:33:17.903128 Not decompressing ramdisk as can be used compressed.
20 09:33:17.903851 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 09:33:17.904225 saving as /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/ramdisk/initrd.cpio.gz
22 09:33:17.904549 total size: 5628182 (5 MB)
23 09:33:17.940052 progress 0 % (0 MB)
24 09:33:17.944787 progress 5 % (0 MB)
25 09:33:17.949244 progress 10 % (0 MB)
26 09:33:17.953244 progress 15 % (0 MB)
27 09:33:17.957638 progress 20 % (1 MB)
28 09:33:17.961464 progress 25 % (1 MB)
29 09:33:17.965625 progress 30 % (1 MB)
30 09:33:17.969856 progress 35 % (1 MB)
31 09:33:17.973553 progress 40 % (2 MB)
32 09:33:17.977753 progress 45 % (2 MB)
33 09:33:17.981464 progress 50 % (2 MB)
34 09:33:17.985695 progress 55 % (2 MB)
35 09:33:17.992016 progress 60 % (3 MB)
36 09:33:17.995771 progress 65 % (3 MB)
37 09:33:17.999960 progress 70 % (3 MB)
38 09:33:18.003698 progress 75 % (4 MB)
39 09:33:18.007791 progress 80 % (4 MB)
40 09:33:18.011542 progress 85 % (4 MB)
41 09:33:18.015690 progress 90 % (4 MB)
42 09:33:18.019573 progress 95 % (5 MB)
43 09:33:18.023017 progress 100 % (5 MB)
44 09:33:18.023723 5 MB downloaded in 0.12 s (45.04 MB/s)
45 09:33:18.024332 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:33:18.025257 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:33:18.025564 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:33:18.025848 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:33:18.026343 downloading http://storage.kernelci.org/next/master/next-20241022/arm64/defconfig+debug/gcc-12/kernel/Image
51 09:33:18.026629 saving as /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/kernel/Image
52 09:33:18.026859 total size: 170547712 (162 MB)
53 09:33:18.027090 No compression specified
54 09:33:18.060388 progress 0 % (0 MB)
55 09:33:18.168618 progress 5 % (8 MB)
56 09:33:18.275459 progress 10 % (16 MB)
57 09:33:18.379598 progress 15 % (24 MB)
58 09:33:18.484558 progress 20 % (32 MB)
59 09:33:18.597321 progress 25 % (40 MB)
60 09:33:18.704222 progress 30 % (48 MB)
61 09:33:18.813451 progress 35 % (56 MB)
62 09:33:18.918332 progress 40 % (65 MB)
63 09:33:19.026737 progress 45 % (73 MB)
64 09:33:19.131624 progress 50 % (81 MB)
65 09:33:19.236239 progress 55 % (89 MB)
66 09:33:19.351888 progress 60 % (97 MB)
67 09:33:19.457462 progress 65 % (105 MB)
68 09:33:19.562299 progress 70 % (113 MB)
69 09:33:19.667291 progress 75 % (122 MB)
70 09:33:19.771203 progress 80 % (130 MB)
71 09:33:19.875275 progress 85 % (138 MB)
72 09:33:19.981801 progress 90 % (146 MB)
73 09:33:20.092422 progress 95 % (154 MB)
74 09:33:20.199452 progress 100 % (162 MB)
75 09:33:20.200221 162 MB downloaded in 2.17 s (74.84 MB/s)
76 09:33:20.200724 end: 1.2.1 http-download (duration 00:00:02) [common]
78 09:33:20.201575 end: 1.2 download-retry (duration 00:00:02) [common]
79 09:33:20.201866 start: 1.3 download-retry (timeout 00:09:58) [common]
80 09:33:20.202149 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 09:33:20.202630 downloading http://storage.kernelci.org/next/master/next-20241022/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 09:33:20.202912 saving as /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/dtb/meson-g12b-a311d-libretech-cc.dtb
83 09:33:20.203134 total size: 54703 (0 MB)
84 09:33:20.203351 No compression specified
85 09:33:20.240602 progress 59 % (0 MB)
86 09:33:20.241534 progress 100 % (0 MB)
87 09:33:20.242169 0 MB downloaded in 0.04 s (1.34 MB/s)
88 09:33:20.242712 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:33:20.243611 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:33:20.243903 start: 1.4 download-retry (timeout 00:09:58) [common]
92 09:33:20.244286 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 09:33:20.244795 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 09:33:20.245062 saving as /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/nfsrootfs/full.rootfs.tar
95 09:33:20.245292 total size: 107552908 (102 MB)
96 09:33:20.245527 Using unxz to decompress xz
97 09:33:20.278192 progress 0 % (0 MB)
98 09:33:20.927095 progress 5 % (5 MB)
99 09:33:21.654395 progress 10 % (10 MB)
100 09:33:22.384323 progress 15 % (15 MB)
101 09:33:23.148254 progress 20 % (20 MB)
102 09:33:23.727358 progress 25 % (25 MB)
103 09:33:24.348908 progress 30 % (30 MB)
104 09:33:25.101511 progress 35 % (35 MB)
105 09:33:25.452633 progress 40 % (41 MB)
106 09:33:25.877932 progress 45 % (46 MB)
107 09:33:26.588206 progress 50 % (51 MB)
108 09:33:27.290466 progress 55 % (56 MB)
109 09:33:28.044160 progress 60 % (61 MB)
110 09:33:28.802937 progress 65 % (66 MB)
111 09:33:29.555997 progress 70 % (71 MB)
112 09:33:30.343429 progress 75 % (76 MB)
113 09:33:31.028360 progress 80 % (82 MB)
114 09:33:31.751862 progress 85 % (87 MB)
115 09:33:32.516508 progress 90 % (92 MB)
116 09:33:33.304399 progress 95 % (97 MB)
117 09:33:34.083351 progress 100 % (102 MB)
118 09:33:34.097753 102 MB downloaded in 13.85 s (7.40 MB/s)
119 09:33:34.098803 end: 1.4.1 http-download (duration 00:00:14) [common]
121 09:33:34.100724 end: 1.4 download-retry (duration 00:00:14) [common]
122 09:33:34.101327 start: 1.5 download-retry (timeout 00:09:44) [common]
123 09:33:34.101936 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 09:33:34.102853 downloading http://storage.kernelci.org/next/master/next-20241022/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 09:33:34.103353 saving as /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/modules/modules.tar
126 09:33:34.103797 total size: 27770028 (26 MB)
127 09:33:34.104298 Using unxz to decompress xz
128 09:33:34.149100 progress 0 % (0 MB)
129 09:33:34.345965 progress 5 % (1 MB)
130 09:33:34.551715 progress 10 % (2 MB)
131 09:33:34.762615 progress 15 % (4 MB)
132 09:33:34.961691 progress 20 % (5 MB)
133 09:33:35.169113 progress 25 % (6 MB)
134 09:33:35.376508 progress 30 % (7 MB)
135 09:33:35.578125 progress 35 % (9 MB)
136 09:33:35.782108 progress 40 % (10 MB)
137 09:33:36.002599 progress 45 % (11 MB)
138 09:33:36.205511 progress 50 % (13 MB)
139 09:33:36.426543 progress 55 % (14 MB)
140 09:33:36.633637 progress 60 % (15 MB)
141 09:33:36.845645 progress 65 % (17 MB)
142 09:33:37.048146 progress 70 % (18 MB)
143 09:33:37.266788 progress 75 % (19 MB)
144 09:33:37.488232 progress 80 % (21 MB)
145 09:33:37.702841 progress 85 % (22 MB)
146 09:33:37.889139 progress 90 % (23 MB)
147 09:33:38.134232 progress 95 % (25 MB)
148 09:33:38.376830 progress 100 % (26 MB)
149 09:33:38.402582 26 MB downloaded in 4.30 s (6.16 MB/s)
150 09:33:38.403310 end: 1.5.1 http-download (duration 00:00:04) [common]
152 09:33:38.404325 end: 1.5 download-retry (duration 00:00:04) [common]
153 09:33:38.404851 start: 1.6 prepare-tftp-overlay (timeout 00:09:39) [common]
154 09:33:38.405367 start: 1.6.1 extract-nfsrootfs (timeout 00:09:39) [common]
155 09:33:48.313912 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/880399/extract-nfsrootfs-iju8xpqq
156 09:33:48.314637 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 09:33:48.314987 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 09:33:48.315753 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz
159 09:33:48.316349 makedir: /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin
160 09:33:48.316760 makedir: /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/tests
161 09:33:48.317148 makedir: /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/results
162 09:33:48.317562 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-add-keys
163 09:33:48.318220 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-add-sources
164 09:33:48.318856 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-background-process-start
165 09:33:48.319561 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-background-process-stop
166 09:33:48.320265 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-common-functions
167 09:33:48.320876 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-echo-ipv4
168 09:33:48.321460 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-install-packages
169 09:33:48.322066 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-installed-packages
170 09:33:48.322659 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-os-build
171 09:33:48.323247 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-probe-channel
172 09:33:48.323830 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-probe-ip
173 09:33:48.324487 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-target-ip
174 09:33:48.325086 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-target-mac
175 09:33:48.325676 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-target-storage
176 09:33:48.326277 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-test-case
177 09:33:48.326859 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-test-event
178 09:33:48.327430 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-test-feedback
179 09:33:48.328048 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-test-raise
180 09:33:48.328654 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-test-reference
181 09:33:48.329259 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-test-runner
182 09:33:48.329887 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-test-set
183 09:33:48.330489 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-test-shell
184 09:33:48.331079 Updating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-install-packages (oe)
185 09:33:48.331730 Updating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/bin/lava-installed-packages (oe)
186 09:33:48.332302 Creating /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/environment
187 09:33:48.332780 LAVA metadata
188 09:33:48.333096 - LAVA_JOB_ID=880399
189 09:33:48.333365 - LAVA_DISPATCHER_IP=192.168.6.2
190 09:33:48.333818 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 09:33:48.334989 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 09:33:48.335374 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 09:33:48.335634 skipped lava-vland-overlay
194 09:33:48.335930 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 09:33:48.336317 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 09:33:48.336592 skipped lava-multinode-overlay
197 09:33:48.336898 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 09:33:48.337211 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 09:33:48.337527 Loading test definitions
200 09:33:48.337882 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 09:33:48.338162 Using /lava-880399 at stage 0
202 09:33:48.339673 uuid=880399_1.6.2.4.1 testdef=None
203 09:33:48.340099 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 09:33:48.340446 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 09:33:48.342716 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 09:33:48.343705 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 09:33:48.346487 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 09:33:48.347520 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 09:33:48.350299 runner path: /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/0/tests/0_dmesg test_uuid 880399_1.6.2.4.1
212 09:33:48.351025 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 09:33:48.351970 Creating lava-test-runner.conf files
215 09:33:48.352253 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/880399/lava-overlay-43b741fz/lava-880399/0 for stage 0
216 09:33:48.352674 - 0_dmesg
217 09:33:48.353101 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 09:33:48.353443 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 09:33:48.380129 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 09:33:48.380659 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 09:33:48.380981 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 09:33:48.381313 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 09:33:48.381638 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 09:33:49.060491 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 09:33:49.060986 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 09:33:49.061245 extracting modules file /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/880399/extract-nfsrootfs-iju8xpqq
227 09:33:50.808228 extracting modules file /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/880399/extract-overlay-ramdisk-99i5sgs7/ramdisk
228 09:33:52.687088 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 09:33:52.687568 start: 1.6.5 apply-overlay-tftp (timeout 00:09:25) [common]
230 09:33:52.687847 [common] Applying overlay to NFS
231 09:33:52.688086 [common] Applying overlay /var/lib/lava/dispatcher/tmp/880399/compress-overlay-f44mdzdn/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/880399/extract-nfsrootfs-iju8xpqq
232 09:33:52.717604 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 09:33:52.718039 start: 1.6.6 prepare-kernel (timeout 00:09:25) [common]
234 09:33:52.718314 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:25) [common]
235 09:33:52.718545 Converting downloaded kernel to a uImage
236 09:33:52.718863 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/kernel/Image /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/kernel/uImage
237 09:33:55.385454 output: Image Name:
238 09:33:55.385880 output: Created: Tue Oct 22 09:33:52 2024
239 09:33:55.386088 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 09:33:55.386291 output: Data Size: 170547712 Bytes = 166550.50 KiB = 162.65 MiB
241 09:33:55.386488 output: Load Address: 01080000
242 09:33:55.386683 output: Entry Point: 01080000
243 09:33:55.386875 output:
244 09:33:55.387200 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:03) [common]
245 09:33:55.387459 end: 1.6.6 prepare-kernel (duration 00:00:03) [common]
246 09:33:55.387719 start: 1.6.7 configure-preseed-file (timeout 00:09:23) [common]
247 09:33:55.387966 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 09:33:55.388282 start: 1.6.8 compress-ramdisk (timeout 00:09:23) [common]
249 09:33:55.388551 Building ramdisk /var/lib/lava/dispatcher/tmp/880399/extract-overlay-ramdisk-99i5sgs7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/880399/extract-overlay-ramdisk-99i5sgs7/ramdisk
250 09:34:00.903929 >> 428449 blocks
251 09:34:18.954892 Adding RAMdisk u-boot header.
252 09:34:18.955603 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/880399/extract-overlay-ramdisk-99i5sgs7/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/880399/extract-overlay-ramdisk-99i5sgs7/ramdisk.cpio.gz.uboot
253 09:34:19.481453 output: Image Name:
254 09:34:19.481876 output: Created: Tue Oct 22 09:34:18 2024
255 09:34:19.482089 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 09:34:19.482297 output: Data Size: 51143336 Bytes = 49944.66 KiB = 48.77 MiB
257 09:34:19.482498 output: Load Address: 00000000
258 09:34:19.482697 output: Entry Point: 00000000
259 09:34:19.482895 output:
260 09:34:19.484276 rename /var/lib/lava/dispatcher/tmp/880399/extract-overlay-ramdisk-99i5sgs7/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/ramdisk/ramdisk.cpio.gz.uboot
261 09:34:19.485105 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 09:34:19.485705 end: 1.6 prepare-tftp-overlay (duration 00:00:41) [common]
263 09:34:19.486282 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:58) [common]
264 09:34:19.486798 No LXC device requested
265 09:34:19.487347 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 09:34:19.487907 start: 1.8 deploy-device-env (timeout 00:08:58) [common]
267 09:34:19.488515 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 09:34:19.489302 Checking files for TFTP limit of 4294967296 bytes.
269 09:34:19.492267 end: 1 tftp-deploy (duration 00:01:02) [common]
270 09:34:19.492908 start: 2 uboot-action (timeout 00:05:00) [common]
271 09:34:19.493483 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 09:34:19.494026 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 09:34:19.494926 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 09:34:19.495522 Using kernel file from prepare-kernel: 880399/tftp-deploy-53kyvg1r/kernel/uImage
275 09:34:19.496240 substitutions:
276 09:34:19.496695 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 09:34:19.497147 - {DTB_ADDR}: 0x01070000
278 09:34:19.497585 - {DTB}: 880399/tftp-deploy-53kyvg1r/dtb/meson-g12b-a311d-libretech-cc.dtb
279 09:34:19.498023 - {INITRD}: 880399/tftp-deploy-53kyvg1r/ramdisk/ramdisk.cpio.gz.uboot
280 09:34:19.498459 - {KERNEL_ADDR}: 0x01080000
281 09:34:19.498889 - {KERNEL}: 880399/tftp-deploy-53kyvg1r/kernel/uImage
282 09:34:19.499323 - {LAVA_MAC}: None
283 09:34:19.500128 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/880399/extract-nfsrootfs-iju8xpqq
284 09:34:19.500615 - {NFS_SERVER_IP}: 192.168.6.2
285 09:34:19.501052 - {PRESEED_CONFIG}: None
286 09:34:19.501487 - {PRESEED_LOCAL}: None
287 09:34:19.501917 - {RAMDISK_ADDR}: 0x08000000
288 09:34:19.502348 - {RAMDISK}: 880399/tftp-deploy-53kyvg1r/ramdisk/ramdisk.cpio.gz.uboot
289 09:34:19.502782 - {ROOT_PART}: None
290 09:34:19.503215 - {ROOT}: None
291 09:34:19.503650 - {SERVER_IP}: 192.168.6.2
292 09:34:19.504126 - {TEE_ADDR}: 0x83000000
293 09:34:19.504594 - {TEE}: None
294 09:34:19.505026 Parsed boot commands:
295 09:34:19.505448 - setenv autoload no
296 09:34:19.508066 - setenv initrd_high 0xffffffff
297 09:34:19.508673 - setenv fdt_high 0xffffffff
298 09:34:19.509153 - dhcp
299 09:34:19.509621 - setenv serverip 192.168.6.2
300 09:34:19.510084 - tftpboot 0x01080000 880399/tftp-deploy-53kyvg1r/kernel/uImage
301 09:34:19.510543 - tftpboot 0x08000000 880399/tftp-deploy-53kyvg1r/ramdisk/ramdisk.cpio.gz.uboot
302 09:34:19.511000 - tftpboot 0x01070000 880399/tftp-deploy-53kyvg1r/dtb/meson-g12b-a311d-libretech-cc.dtb
303 09:34:19.511458 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/880399/extract-nfsrootfs-iju8xpqq,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 09:34:19.511921 - bootm 0x01080000 0x08000000 0x01070000
305 09:34:19.512690 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 09:34:19.514459 start: 2.3 connect-device (timeout 00:05:00) [common]
308 09:34:19.514967 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 09:34:19.530794 Setting prompt string to ['lava-test: # ']
310 09:34:19.532612 end: 2.3 connect-device (duration 00:00:00) [common]
311 09:34:19.533418 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 09:34:19.534124 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 09:34:19.534780 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 09:34:19.536166 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 09:34:19.576598 >> OK - accepted request
316 09:34:19.578628 Returned 0 in 0 seconds
317 09:34:19.679511 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 09:34:19.680837 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 09:34:19.681267 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 09:34:19.681576 Setting prompt string to ['Hit any key to stop autoboot']
322 09:34:19.681840 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 09:34:19.682976 Trying 192.168.56.21...
324 09:34:19.683355 Connected to conserv1.
325 09:34:19.683632 Escape character is '^]'.
326 09:34:19.683884
327 09:34:19.684190 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 09:34:19.684465
329 09:34:31.436364 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 09:34:31.436993 bl2_stage_init 0x01
331 09:34:31.437443 bl2_stage_init 0x81
332 09:34:31.441942 hw id: 0x0000 - pwm id 0x01
333 09:34:31.442422 bl2_stage_init 0xc1
334 09:34:31.442860 bl2_stage_init 0x02
335 09:34:31.443289
336 09:34:31.447544 L0:00000000
337 09:34:31.448039 L1:20000703
338 09:34:31.448474 L2:00008067
339 09:34:31.448898 L3:14000000
340 09:34:31.452948 B2:00402000
341 09:34:31.453404 B1:e0f83180
342 09:34:31.453849
343 09:34:31.454280 TE: 58124
344 09:34:31.454712
345 09:34:31.458728 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 09:34:31.459191
347 09:34:31.459624 Board ID = 1
348 09:34:31.464289 Set A53 clk to 24M
349 09:34:31.464744 Set A73 clk to 24M
350 09:34:31.465169 Set clk81 to 24M
351 09:34:31.469822 A53 clk: 1200 MHz
352 09:34:31.470276 A73 clk: 1200 MHz
353 09:34:31.470702 CLK81: 166.6M
354 09:34:31.471120 smccc: 00012a91
355 09:34:31.475381 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 09:34:31.480929 board id: 1
357 09:34:31.485922 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 09:34:31.497527 fw parse done
359 09:34:31.503478 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 09:34:31.545289 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 09:34:31.556988 PIEI prepare done
362 09:34:31.557442 fastboot data load
363 09:34:31.557878 fastboot data verify
364 09:34:31.562621 verify result: 266
365 09:34:31.568302 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 09:34:31.568762 LPDDR4 probe
367 09:34:31.569192 ddr clk to 1584MHz
368 09:34:31.576218 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 09:34:31.613468
370 09:34:31.613972 dmc_version 0001
371 09:34:31.620172 Check phy result
372 09:34:31.625988 INFO : End of CA training
373 09:34:31.626445 INFO : End of initialization
374 09:34:31.631612 INFO : Training has run successfully!
375 09:34:31.632122 Check phy result
376 09:34:31.637211 INFO : End of initialization
377 09:34:31.637667 INFO : End of read enable training
378 09:34:31.642821 INFO : End of fine write leveling
379 09:34:31.648405 INFO : End of Write leveling coarse delay
380 09:34:31.648859 INFO : Training has run successfully!
381 09:34:31.649291 Check phy result
382 09:34:31.653957 INFO : End of initialization
383 09:34:31.654426 INFO : End of read dq deskew training
384 09:34:31.659603 INFO : End of MPR read delay center optimization
385 09:34:31.665264 INFO : End of write delay center optimization
386 09:34:31.670757 INFO : End of read delay center optimization
387 09:34:31.671210 INFO : End of max read latency training
388 09:34:31.676331 INFO : Training has run successfully!
389 09:34:31.676791 1D training succeed
390 09:34:31.685558 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 09:34:31.733151 Check phy result
392 09:34:31.733657 INFO : End of initialization
393 09:34:31.754906 INFO : End of 2D read delay Voltage center optimization
394 09:34:31.777243 INFO : End of 2D read delay Voltage center optimization
395 09:34:31.827333 INFO : End of 2D write delay Voltage center optimization
396 09:34:31.876649 INFO : End of 2D write delay Voltage center optimization
397 09:34:31.882315 INFO : Training has run successfully!
398 09:34:31.882767
399 09:34:31.883200 channel==0
400 09:34:31.887831 RxClkDly_Margin_A0==88 ps 9
401 09:34:31.888332 TxDqDly_Margin_A0==98 ps 10
402 09:34:31.891027 RxClkDly_Margin_A1==88 ps 9
403 09:34:31.891483 TxDqDly_Margin_A1==88 ps 9
404 09:34:31.896644 TrainedVREFDQ_A0==74
405 09:34:31.897104 TrainedVREFDQ_A1==74
406 09:34:31.897539 VrefDac_Margin_A0==25
407 09:34:31.902406 DeviceVref_Margin_A0==40
408 09:34:31.902898 VrefDac_Margin_A1==25
409 09:34:31.907816 DeviceVref_Margin_A1==40
410 09:34:31.908291
411 09:34:31.908723
412 09:34:31.909152 channel==1
413 09:34:31.909571 RxClkDly_Margin_A0==98 ps 10
414 09:34:31.913487 TxDqDly_Margin_A0==88 ps 9
415 09:34:31.913952 RxClkDly_Margin_A1==88 ps 9
416 09:34:31.918976 TxDqDly_Margin_A1==88 ps 9
417 09:34:31.919432 TrainedVREFDQ_A0==77
418 09:34:31.919866 TrainedVREFDQ_A1==77
419 09:34:31.924733 VrefDac_Margin_A0==22
420 09:34:31.925189 DeviceVref_Margin_A0==37
421 09:34:31.930357 VrefDac_Margin_A1==24
422 09:34:31.930808 DeviceVref_Margin_A1==37
423 09:34:31.931235
424 09:34:31.935878 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 09:34:31.936361
426 09:34:31.963740 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 09:34:31.969525 2D training succeed
428 09:34:31.974936 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 09:34:31.975393 auto size-- 65535DDR cs0 size: 2048MB
430 09:34:31.980439 DDR cs1 size: 2048MB
431 09:34:31.980891 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 09:34:31.986147 cs0 DataBus test pass
433 09:34:31.986596 cs1 DataBus test pass
434 09:34:31.987027 cs0 AddrBus test pass
435 09:34:31.991762 cs1 AddrBus test pass
436 09:34:31.992252
437 09:34:31.992686 100bdlr_step_size ps== 420
438 09:34:31.993122 result report
439 09:34:31.997347 boot times 0Enable ddr reg access
440 09:34:32.004871 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 09:34:32.018273 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 09:34:32.592062 0.0;M3 CHK:0;cm4_sp_mode 0
443 09:34:32.592683 MVN_1=0x00000000
444 09:34:32.597513 MVN_2=0x00000000
445 09:34:32.603324 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 09:34:32.603833 OPS=0x10
447 09:34:32.604334 ring efuse init
448 09:34:32.604782 chipver efuse init
449 09:34:32.608892 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 09:34:32.614520 [0.018961 Inits done]
451 09:34:32.614977 secure task start!
452 09:34:32.615411 high task start!
453 09:34:32.619048 low task start!
454 09:34:32.619502 run into bl31
455 09:34:32.625735 NOTICE: BL31: v1.3(release):4fc40b1
456 09:34:32.632583 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 09:34:32.633059 NOTICE: BL31: G12A normal boot!
458 09:34:32.658868 NOTICE: BL31: BL33 decompress pass
459 09:34:32.664540 ERROR: Error initializing runtime service opteed_fast
460 09:34:33.897605
461 09:34:33.898239
462 09:34:33.905821 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 09:34:33.906318
464 09:34:33.906772 Model: Libre Computer AML-A311D-CC Alta
465 09:34:34.114228 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 09:34:34.136656 DRAM: 2 GiB (effective 3.8 GiB)
467 09:34:34.280587 Core: 408 devices, 31 uclasses, devicetree: separate
468 09:34:34.286526 WDT: Not starting watchdog@f0d0
469 09:34:34.318818 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 09:34:34.331187 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 09:34:34.336166 ** Bad device specification mmc 0 **
472 09:34:34.346480 Card did not respond to voltage select! : -110
473 09:34:34.354172 ** Bad device specification mmc 0 **
474 09:34:34.354657 Couldn't find partition mmc 0
475 09:34:34.362558 Card did not respond to voltage select! : -110
476 09:34:34.368061 ** Bad device specification mmc 0 **
477 09:34:34.368546 Couldn't find partition mmc 0
478 09:34:34.373056 Error: could not access storage.
479 09:34:35.636464 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 09:34:35.637083 bl2_stage_init 0x01
481 09:34:35.637549 bl2_stage_init 0x81
482 09:34:35.641977 hw id: 0x0000 - pwm id 0x01
483 09:34:35.642456 bl2_stage_init 0xc1
484 09:34:35.642906 bl2_stage_init 0x02
485 09:34:35.643349
486 09:34:35.647607 L0:00000000
487 09:34:35.648114 L1:20000703
488 09:34:35.648561 L2:00008067
489 09:34:35.649001 L3:14000000
490 09:34:35.653094 B2:00402000
491 09:34:35.653564 B1:e0f83180
492 09:34:35.654002
493 09:34:35.654439 TE: 58124
494 09:34:35.654877
495 09:34:35.658697 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 09:34:35.659174
497 09:34:35.659625 Board ID = 1
498 09:34:35.664335 Set A53 clk to 24M
499 09:34:35.664803 Set A73 clk to 24M
500 09:34:35.665243 Set clk81 to 24M
501 09:34:35.669866 A53 clk: 1200 MHz
502 09:34:35.670329 A73 clk: 1200 MHz
503 09:34:35.670767 CLK81: 166.6M
504 09:34:35.671204 smccc: 00012a92
505 09:34:35.675576 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 09:34:35.681098 board id: 1
507 09:34:35.686038 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 09:34:35.697670 fw parse done
509 09:34:35.703657 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 09:34:35.745366 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 09:34:35.757116 PIEI prepare done
512 09:34:35.757603 fastboot data load
513 09:34:35.758053 fastboot data verify
514 09:34:35.762847 verify result: 266
515 09:34:35.768455 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 09:34:35.768931 LPDDR4 probe
517 09:34:35.769373 ddr clk to 1584MHz
518 09:34:35.775449 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 09:34:35.813087
520 09:34:35.813572 dmc_version 0001
521 09:34:35.819528 Check phy result
522 09:34:35.826234 INFO : End of CA training
523 09:34:35.826734 INFO : End of initialization
524 09:34:35.831761 INFO : Training has run successfully!
525 09:34:35.832264 Check phy result
526 09:34:35.837505 INFO : End of initialization
527 09:34:35.837984 INFO : End of read enable training
528 09:34:35.840715 INFO : End of fine write leveling
529 09:34:35.846193 INFO : End of Write leveling coarse delay
530 09:34:35.851804 INFO : Training has run successfully!
531 09:34:35.852308 Check phy result
532 09:34:35.852753 INFO : End of initialization
533 09:34:35.857453 INFO : End of read dq deskew training
534 09:34:35.863067 INFO : End of MPR read delay center optimization
535 09:34:35.863536 INFO : End of write delay center optimization
536 09:34:35.868747 INFO : End of read delay center optimization
537 09:34:35.874189 INFO : End of max read latency training
538 09:34:35.874671 INFO : Training has run successfully!
539 09:34:35.879798 1D training succeed
540 09:34:35.884868 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 09:34:35.932414 Check phy result
542 09:34:35.932963 INFO : End of initialization
543 09:34:35.954181 INFO : End of 2D read delay Voltage center optimization
544 09:34:35.975207 INFO : End of 2D read delay Voltage center optimization
545 09:34:36.026432 INFO : End of 2D write delay Voltage center optimization
546 09:34:36.076819 INFO : End of 2D write delay Voltage center optimization
547 09:34:36.082315 INFO : Training has run successfully!
548 09:34:36.082792
549 09:34:36.083241 channel==0
550 09:34:36.087903 RxClkDly_Margin_A0==88 ps 9
551 09:34:36.088423 TxDqDly_Margin_A0==98 ps 10
552 09:34:36.093517 RxClkDly_Margin_A1==88 ps 9
553 09:34:36.093990 TxDqDly_Margin_A1==98 ps 10
554 09:34:36.094442 TrainedVREFDQ_A0==74
555 09:34:36.099169 TrainedVREFDQ_A1==74
556 09:34:36.099657 VrefDac_Margin_A0==25
557 09:34:36.100143 DeviceVref_Margin_A0==40
558 09:34:36.104787 VrefDac_Margin_A1==26
559 09:34:36.105256 DeviceVref_Margin_A1==40
560 09:34:36.105699
561 09:34:36.106136
562 09:34:36.110262 channel==1
563 09:34:36.110728 RxClkDly_Margin_A0==98 ps 10
564 09:34:36.111168 TxDqDly_Margin_A0==98 ps 10
565 09:34:36.115896 RxClkDly_Margin_A1==98 ps 10
566 09:34:36.116406 TxDqDly_Margin_A1==98 ps 10
567 09:34:36.121573 TrainedVREFDQ_A0==77
568 09:34:36.122167 TrainedVREFDQ_A1==78
569 09:34:36.122668 VrefDac_Margin_A0==22
570 09:34:36.127195 DeviceVref_Margin_A0==37
571 09:34:36.127747 VrefDac_Margin_A1==22
572 09:34:36.132842 DeviceVref_Margin_A1==36
573 09:34:36.133608
574 09:34:36.134200 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 09:34:36.138379
576 09:34:36.166401 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 09:34:36.167149 2D training succeed
578 09:34:36.171954 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 09:34:36.177594 auto size-- 65535DDR cs0 size: 2048MB
580 09:34:36.178448 DDR cs1 size: 2048MB
581 09:34:36.183189 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 09:34:36.183761 cs0 DataBus test pass
583 09:34:36.188787 cs1 DataBus test pass
584 09:34:36.189355 cs0 AddrBus test pass
585 09:34:36.189863 cs1 AddrBus test pass
586 09:34:36.190360
587 09:34:36.194342 100bdlr_step_size ps== 420
588 09:34:36.194913 result report
589 09:34:36.199968 boot times 0Enable ddr reg access
590 09:34:36.205399 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 09:34:36.218020 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 09:34:36.792676 0.0;M3 CHK:0;cm4_sp_mode 0
593 09:34:36.793278 MVN_1=0x00000000
594 09:34:36.798142 MVN_2=0x00000000
595 09:34:36.803918 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 09:34:36.804390 OPS=0x10
597 09:34:36.804807 ring efuse init
598 09:34:36.805205 chipver efuse init
599 09:34:36.809577 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 09:34:36.815056 [0.018960 Inits done]
601 09:34:36.815482 secure task start!
602 09:34:36.815873 high task start!
603 09:34:36.819501 low task start!
604 09:34:36.819914 run into bl31
605 09:34:36.826292 NOTICE: BL31: v1.3(release):4fc40b1
606 09:34:36.833732 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 09:34:36.834151 NOTICE: BL31: G12A normal boot!
608 09:34:36.859542 NOTICE: BL31: BL33 decompress pass
609 09:34:36.865032 ERROR: Error initializing runtime service opteed_fast
610 09:34:38.098121
611 09:34:38.098484
612 09:34:38.105744 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 09:34:38.106045
614 09:34:38.106280 Model: Libre Computer AML-A311D-CC Alta
615 09:34:38.314821 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 09:34:38.337757 DRAM: 2 GiB (effective 3.8 GiB)
617 09:34:38.481394 Core: 408 devices, 31 uclasses, devicetree: separate
618 09:34:38.487295 WDT: Not starting watchdog@f0d0
619 09:34:38.519575 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 09:34:38.532235 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 09:34:38.536864 ** Bad device specification mmc 0 **
622 09:34:38.547339 Card did not respond to voltage select! : -110
623 09:34:38.554108 ** Bad device specification mmc 0 **
624 09:34:38.554550 Couldn't find partition mmc 0
625 09:34:38.563172 Card did not respond to voltage select! : -110
626 09:34:38.568892 ** Bad device specification mmc 0 **
627 09:34:38.569321 Couldn't find partition mmc 0
628 09:34:38.572932 Error: could not access storage.
629 09:34:38.916854 Net: eth0: ethernet@ff3f0000
630 09:34:38.917456 starting USB...
631 09:34:39.169471 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 09:34:39.169962 Starting the controller
633 09:34:39.175412 USB XHCI 1.10
634 09:34:40.886904 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 09:34:40.887540 bl2_stage_init 0x01
636 09:34:40.887963 bl2_stage_init 0x81
637 09:34:40.892529 hw id: 0x0000 - pwm id 0x01
638 09:34:40.892973 bl2_stage_init 0xc1
639 09:34:40.893381 bl2_stage_init 0x02
640 09:34:40.893784
641 09:34:40.897887 L0:00000000
642 09:34:40.898324 L1:20000703
643 09:34:40.898724 L2:00008067
644 09:34:40.899124 L3:14000000
645 09:34:40.903489 B2:00402000
646 09:34:40.903920 B1:e0f83180
647 09:34:40.904358
648 09:34:40.904758 TE: 58124
649 09:34:40.905153
650 09:34:40.909125 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 09:34:40.909563
652 09:34:40.909967 Board ID = 1
653 09:34:40.914628 Set A53 clk to 24M
654 09:34:40.915068 Set A73 clk to 24M
655 09:34:40.915470 Set clk81 to 24M
656 09:34:40.920183 A53 clk: 1200 MHz
657 09:34:40.920620 A73 clk: 1200 MHz
658 09:34:40.921021 CLK81: 166.6M
659 09:34:40.921412 smccc: 00012a92
660 09:34:40.926003 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 09:34:40.931361 board id: 1
662 09:34:40.936807 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 09:34:40.947915 fw parse done
664 09:34:40.953205 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 09:34:40.996253 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 09:34:41.007411 PIEI prepare done
667 09:34:41.007872 fastboot data load
668 09:34:41.008324 fastboot data verify
669 09:34:41.013160 verify result: 266
670 09:34:41.018816 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 09:34:41.019249 LPDDR4 probe
672 09:34:41.019655 ddr clk to 1584MHz
673 09:34:41.026479 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 09:34:41.063814
675 09:34:41.064312 dmc_version 0001
676 09:34:41.069680 Check phy result
677 09:34:41.076472 INFO : End of CA training
678 09:34:41.076906 INFO : End of initialization
679 09:34:41.082074 INFO : Training has run successfully!
680 09:34:41.082511 Check phy result
681 09:34:41.087707 INFO : End of initialization
682 09:34:41.088163 INFO : End of read enable training
683 09:34:41.093269 INFO : End of fine write leveling
684 09:34:41.098782 INFO : End of Write leveling coarse delay
685 09:34:41.099209 INFO : Training has run successfully!
686 09:34:41.099610 Check phy result
687 09:34:41.104420 INFO : End of initialization
688 09:34:41.104850 INFO : End of read dq deskew training
689 09:34:41.110018 INFO : End of MPR read delay center optimization
690 09:34:41.115684 INFO : End of write delay center optimization
691 09:34:41.121277 INFO : End of read delay center optimization
692 09:34:41.121712 INFO : End of max read latency training
693 09:34:41.127031 INFO : Training has run successfully!
694 09:34:41.127488 1D training succeed
695 09:34:41.135309 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 09:34:41.183255 Check phy result
697 09:34:41.183766 INFO : End of initialization
698 09:34:41.205046 INFO : End of 2D read delay Voltage center optimization
699 09:34:41.225655 INFO : End of 2D read delay Voltage center optimization
700 09:34:41.276824 INFO : End of 2D write delay Voltage center optimization
701 09:34:41.327323 INFO : End of 2D write delay Voltage center optimization
702 09:34:41.332687 INFO : Training has run successfully!
703 09:34:41.333120
704 09:34:41.333528 channel==0
705 09:34:41.338313 RxClkDly_Margin_A0==88 ps 9
706 09:34:41.338738 TxDqDly_Margin_A0==98 ps 10
707 09:34:41.343911 RxClkDly_Margin_A1==88 ps 9
708 09:34:41.344361 TxDqDly_Margin_A1==88 ps 9
709 09:34:41.344767 TrainedVREFDQ_A0==74
710 09:34:41.349582 TrainedVREFDQ_A1==74
711 09:34:41.350009 VrefDac_Margin_A0==25
712 09:34:41.350410 DeviceVref_Margin_A0==40
713 09:34:41.355119 VrefDac_Margin_A1==25
714 09:34:41.355547 DeviceVref_Margin_A1==40
715 09:34:41.355943
716 09:34:41.356382
717 09:34:41.356781 channel==1
718 09:34:41.360940 RxClkDly_Margin_A0==98 ps 10
719 09:34:41.361368 TxDqDly_Margin_A0==98 ps 10
720 09:34:41.366247 RxClkDly_Margin_A1==98 ps 10
721 09:34:41.366670 TxDqDly_Margin_A1==88 ps 9
722 09:34:41.371812 TrainedVREFDQ_A0==77
723 09:34:41.372261 TrainedVREFDQ_A1==77
724 09:34:41.372667 VrefDac_Margin_A0==22
725 09:34:41.377707 DeviceVref_Margin_A0==37
726 09:34:41.378145 VrefDac_Margin_A1==24
727 09:34:41.383204 DeviceVref_Margin_A1==37
728 09:34:41.383648
729 09:34:41.384077 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 09:34:41.384482
731 09:34:41.416638 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 09:34:41.417181 2D training succeed
733 09:34:41.422523 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 09:34:41.427767 auto size-- 65535DDR cs0 size: 2048MB
735 09:34:41.428239 DDR cs1 size: 2048MB
736 09:34:41.433328 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 09:34:41.433757 cs0 DataBus test pass
738 09:34:41.438899 cs1 DataBus test pass
739 09:34:41.439328 cs0 AddrBus test pass
740 09:34:41.439731 cs1 AddrBus test pass
741 09:34:41.440159
742 09:34:41.444547 100bdlr_step_size ps== 420
743 09:34:41.445016 result report
744 09:34:41.450219 boot times 0Enable ddr reg access
745 09:34:41.454785 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 09:34:41.468664 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 09:34:42.042726 0.0;M3 CHK:0;cm4_sp_mode 0
748 09:34:42.043399 MVN_1=0x00000000
749 09:34:42.048205 MVN_2=0x00000000
750 09:34:42.053826 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 09:34:42.054133 OPS=0x10
752 09:34:42.054361 ring efuse init
753 09:34:42.054572 chipver efuse init
754 09:34:42.059594 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 09:34:42.065225 [0.018961 Inits done]
756 09:34:42.065536 secure task start!
757 09:34:42.065750 high task start!
758 09:34:42.068860 low task start!
759 09:34:42.069175 run into bl31
760 09:34:42.076348 NOTICE: BL31: v1.3(release):4fc40b1
761 09:34:42.083607 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 09:34:42.083940 NOTICE: BL31: G12A normal boot!
763 09:34:42.109575 NOTICE: BL31: BL33 decompress pass
764 09:34:42.114545 ERROR: Error initializing runtime service opteed_fast
765 09:34:43.348179
766 09:34:43.348679
767 09:34:43.356226 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 09:34:43.356519
769 09:34:43.356747 Model: Libre Computer AML-A311D-CC Alta
770 09:34:43.565051 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 09:34:43.588183 DRAM: 2 GiB (effective 3.8 GiB)
772 09:34:43.731261 Core: 408 devices, 31 uclasses, devicetree: separate
773 09:34:43.736274 WDT: Not starting watchdog@f0d0
774 09:34:43.769498 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 09:34:43.781878 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 09:34:43.785913 ** Bad device specification mmc 0 **
777 09:34:43.797200 Card did not respond to voltage select! : -110
778 09:34:43.804653 ** Bad device specification mmc 0 **
779 09:34:43.804946 Couldn't find partition mmc 0
780 09:34:43.813252 Card did not respond to voltage select! : -110
781 09:34:43.818736 ** Bad device specification mmc 0 **
782 09:34:43.819021 Couldn't find partition mmc 0
783 09:34:43.822905 Error: could not access storage.
784 09:34:44.166870 Net: eth0: ethernet@ff3f0000
785 09:34:44.167286 starting USB...
786 09:34:44.419068 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 09:34:44.419443 Starting the controller
788 09:34:44.425891 USB XHCI 1.10
789 09:34:46.588663 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 09:34:46.589437 bl2_stage_init 0x01
791 09:34:46.590120 bl2_stage_init 0x81
792 09:34:46.593965 hw id: 0x0000 - pwm id 0x01
793 09:34:46.594554 bl2_stage_init 0xc1
794 09:34:46.595072 bl2_stage_init 0x02
795 09:34:46.595585
796 09:34:46.599499 L0:00000000
797 09:34:46.600089 L1:20000703
798 09:34:46.600604 L2:00008067
799 09:34:46.601101 L3:14000000
800 09:34:46.602449 B2:00402000
801 09:34:46.603004 B1:e0f83180
802 09:34:46.603509
803 09:34:46.604050 TE: 58167
804 09:34:46.604560
805 09:34:46.613794 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 09:34:46.614583
807 09:34:46.615196 Board ID = 1
808 09:34:46.615788 Set A53 clk to 24M
809 09:34:46.616399 Set A73 clk to 24M
810 09:34:46.619324 Set clk81 to 24M
811 09:34:46.620104 A53 clk: 1200 MHz
812 09:34:46.620706 A73 clk: 1200 MHz
813 09:34:46.622672 CLK81: 166.6M
814 09:34:46.623242 smccc: 00012abe
815 09:34:46.628055 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 09:34:46.633656 board id: 1
817 09:34:46.637920 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 09:34:46.649599 fw parse done
819 09:34:46.654695 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 09:34:46.698272 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 09:34:46.709182 PIEI prepare done
822 09:34:46.709874 fastboot data load
823 09:34:46.710549 fastboot data verify
824 09:34:46.714810 verify result: 266
825 09:34:46.720308 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 09:34:46.720881 LPDDR4 probe
827 09:34:46.721399 ddr clk to 1584MHz
828 09:34:46.727542 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 09:34:46.764800
830 09:34:46.765368 dmc_version 0001
831 09:34:46.772306 Check phy result
832 09:34:46.778133 INFO : End of CA training
833 09:34:46.778699 INFO : End of initialization
834 09:34:46.783610 INFO : Training has run successfully!
835 09:34:46.784205 Check phy result
836 09:34:46.789304 INFO : End of initialization
837 09:34:46.789862 INFO : End of read enable training
838 09:34:46.794843 INFO : End of fine write leveling
839 09:34:46.800450 INFO : End of Write leveling coarse delay
840 09:34:46.801016 INFO : Training has run successfully!
841 09:34:46.801525 Check phy result
842 09:34:46.806059 INFO : End of initialization
843 09:34:46.806617 INFO : End of read dq deskew training
844 09:34:46.811674 INFO : End of MPR read delay center optimization
845 09:34:46.817260 INFO : End of write delay center optimization
846 09:34:46.822859 INFO : End of read delay center optimization
847 09:34:46.823421 INFO : End of max read latency training
848 09:34:46.828416 INFO : Training has run successfully!
849 09:34:46.828977 1D training succeed
850 09:34:46.837012 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 09:34:46.884590 Check phy result
852 09:34:46.885160 INFO : End of initialization
853 09:34:46.906709 INFO : End of 2D read delay Voltage center optimization
854 09:34:46.926293 INFO : End of 2D read delay Voltage center optimization
855 09:34:46.979740 INFO : End of 2D write delay Voltage center optimization
856 09:34:47.028796 INFO : End of 2D write delay Voltage center optimization
857 09:34:47.034386 INFO : Training has run successfully!
858 09:34:47.034946
859 09:34:47.035482 channel==0
860 09:34:47.039739 RxClkDly_Margin_A0==88 ps 9
861 09:34:47.040328 TxDqDly_Margin_A0==98 ps 10
862 09:34:47.043254 RxClkDly_Margin_A1==88 ps 9
863 09:34:47.043798 TxDqDly_Margin_A1==98 ps 10
864 09:34:47.049071 TrainedVREFDQ_A0==74
865 09:34:47.049625 TrainedVREFDQ_A1==74
866 09:34:47.050108 VrefDac_Margin_A0==25
867 09:34:47.054605 DeviceVref_Margin_A0==40
868 09:34:47.055361 VrefDac_Margin_A1==24
869 09:34:47.060015 DeviceVref_Margin_A1==40
870 09:34:47.060759
871 09:34:47.061385
872 09:34:47.061995 channel==1
873 09:34:47.062784 RxClkDly_Margin_A0==98 ps 10
874 09:34:47.064055 TxDqDly_Margin_A0==98 ps 10
875 09:34:47.069175 RxClkDly_Margin_A1==88 ps 9
876 09:34:47.069727 TxDqDly_Margin_A1==88 ps 9
877 09:34:47.070209 TrainedVREFDQ_A0==77
878 09:34:47.074829 TrainedVREFDQ_A1==77
879 09:34:47.075378 VrefDac_Margin_A0==22
880 09:34:47.080498 DeviceVref_Margin_A0==37
881 09:34:47.081037 VrefDac_Margin_A1==24
882 09:34:47.081512 DeviceVref_Margin_A1==37
883 09:34:47.081967
884 09:34:47.089384 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 09:34:47.089928
886 09:34:47.115125 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
887 09:34:47.120677 2D training succeed
888 09:34:47.126280 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 09:34:47.126573 auto size-- 65535DDR cs0 size: 2048MB
890 09:34:47.131875 DDR cs1 size: 2048MB
891 09:34:47.132182 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 09:34:47.137456 cs0 DataBus test pass
893 09:34:47.137729 cs1 DataBus test pass
894 09:34:47.143022 cs0 AddrBus test pass
895 09:34:47.143300 cs1 AddrBus test pass
896 09:34:47.143510
897 09:34:47.143713 100bdlr_step_size ps== 420
898 09:34:47.148655 result report
899 09:34:47.148925 boot times 0Enable ddr reg access
900 09:34:47.156078 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 09:34:47.169537 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 09:34:47.743469 0.0;M3 CHK:0;cm4_sp_mode 0
903 09:34:47.743861 MVN_1=0x00000000
904 09:34:47.749032 MVN_2=0x00000000
905 09:34:47.754732 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 09:34:47.755035 OPS=0x10
907 09:34:47.755260 ring efuse init
908 09:34:47.755481 chipver efuse init
909 09:34:47.760350 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 09:34:47.765951 [0.018960 Inits done]
911 09:34:47.766238 secure task start!
912 09:34:47.766449 high task start!
913 09:34:47.770594 low task start!
914 09:34:47.770867 run into bl31
915 09:34:47.777258 NOTICE: BL31: v1.3(release):4fc40b1
916 09:34:47.784557 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 09:34:47.784847 NOTICE: BL31: G12A normal boot!
918 09:34:47.810290 NOTICE: BL31: BL33 decompress pass
919 09:34:47.815911 ERROR: Error initializing runtime service opteed_fast
920 09:34:49.048911
921 09:34:49.049339
922 09:34:49.056446 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 09:34:49.056799
924 09:34:49.057015 Model: Libre Computer AML-A311D-CC Alta
925 09:34:49.265194 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 09:34:49.288248 DRAM: 2 GiB (effective 3.8 GiB)
927 09:34:49.432148 Core: 408 devices, 31 uclasses, devicetree: separate
928 09:34:49.437171 WDT: Not starting watchdog@f0d0
929 09:34:49.470328 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 09:34:49.482659 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 09:34:49.486668 ** Bad device specification mmc 0 **
932 09:34:49.497996 Card did not respond to voltage select! : -110
933 09:34:49.505012 ** Bad device specification mmc 0 **
934 09:34:49.505300 Couldn't find partition mmc 0
935 09:34:49.513915 Card did not respond to voltage select! : -110
936 09:34:49.519442 ** Bad device specification mmc 0 **
937 09:34:49.519724 Couldn't find partition mmc 0
938 09:34:49.524279 Error: could not access storage.
939 09:34:49.866123 Net: eth0: ethernet@ff3f0000
940 09:34:49.866522 starting USB...
941 09:34:50.118803 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 09:34:50.119201 Starting the controller
943 09:34:50.125045 USB XHCI 1.10
944 09:34:51.679956 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 09:34:51.687327 scanning usb for storage devices... 0 Storage Device(s) found
947 09:34:51.738962 Hit any key to stop autoboot: 1
948 09:34:51.739938 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 09:34:51.740671 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 09:34:51.741211 Setting prompt string to ['=>']
951 09:34:51.741752 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 09:34:51.744740 0
953 09:34:51.745709 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 09:34:51.746277 Sending with 10 millisecond of delay
956 09:34:52.881072 => setenv autoload no
957 09:34:52.891906 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 09:34:52.897366 setenv autoload no
959 09:34:52.898150 Sending with 10 millisecond of delay
961 09:34:54.695008 => setenv initrd_high 0xffffffff
962 09:34:54.705820 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 09:34:54.706703 setenv initrd_high 0xffffffff
964 09:34:54.707459 Sending with 10 millisecond of delay
966 09:34:56.323825 => setenv fdt_high 0xffffffff
967 09:34:56.334711 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 09:34:56.335629 setenv fdt_high 0xffffffff
969 09:34:56.336435 Sending with 10 millisecond of delay
971 09:34:56.628330 => dhcp
972 09:34:56.639118 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 09:34:56.640066 dhcp
974 09:34:56.640554 Speed: 1000, full duplex
975 09:34:56.641013 BOOTP broadcast 1
976 09:34:56.651692 DHCP client bound to address 192.168.6.27 (12 ms)
977 09:34:56.652511 Sending with 10 millisecond of delay
979 09:34:58.329648 => setenv serverip 192.168.6.2
980 09:34:58.340854 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 09:34:58.341487 setenv serverip 192.168.6.2
982 09:34:58.342045 Sending with 10 millisecond of delay
984 09:35:02.066232 => tftpboot 0x01080000 880399/tftp-deploy-53kyvg1r/kernel/uImage
985 09:35:02.077022 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
986 09:35:02.077883 tftpboot 0x01080000 880399/tftp-deploy-53kyvg1r/kernel/uImage
987 09:35:02.078332 Speed: 1000, full duplex
988 09:35:02.078743 Using ethernet@ff3f0000 device
989 09:35:02.080679 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 09:35:02.085460 Filename '880399/tftp-deploy-53kyvg1r/kernel/uImage'.
991 09:35:02.088962 Load address: 0x1080000
992 09:35:06.321041 Loading: *###################
993 09:35:06.321634 TFTP error: trying to overwrite reserved memory...
995 09:35:06.323034 end: 2.4.3 bootloader-commands (duration 00:00:15) [common]
998 09:35:06.324952 end: 2.4 uboot-commands (duration 00:00:47) [common]
1000 09:35:06.326421 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
1002 09:35:06.327535 end: 2 uboot-action (duration 00:00:47) [common]
1004 09:35:06.329075 Cleaning after the job
1005 09:35:06.329619 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/ramdisk
1006 09:35:06.356405 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/kernel
1007 09:35:06.415810 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/dtb
1008 09:35:06.416687 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/nfsrootfs
1009 09:35:06.597229 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880399/tftp-deploy-53kyvg1r/modules
1010 09:35:06.662967 start: 4.1 power-off (timeout 00:00:30) [common]
1011 09:35:06.663670 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1012 09:35:06.697346 >> OK - accepted request
1013 09:35:06.699470 Returned 0 in 0 seconds
1014 09:35:06.800359 end: 4.1 power-off (duration 00:00:00) [common]
1016 09:35:06.801626 start: 4.2 read-feedback (timeout 00:10:00) [common]
1017 09:35:06.802444 Listened to connection for namespace 'common' for up to 1s
1018 09:35:07.803034 Finalising connection for namespace 'common'
1019 09:35:07.804078 Disconnecting from shell: Finalise
1020 09:35:07.804767 =>
1021 09:35:07.906177 end: 4.2 read-feedback (duration 00:00:01) [common]
1022 09:35:07.907139 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/880399
1023 09:35:09.903681 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/880399
1024 09:35:09.904345 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.