Boot log: fvp
- Warnings: 3
- Kernel Warnings: 0
- Errors: 0
- Boot result: PASS
- Kernel Errors: 0
1 10:47:00.116045 lava-dispatcher, installed at version: 2024.01
2 10:47:00.116266 start: 0 validate
3 10:47:00.116381 Start time: 2024-10-30 10:47:00.116376+00:00 (UTC)
4 10:47:00.117373 Validating that https://storage.kernelci.org/images/fvp/fvp-1.0.0/bl1.bin exists
5 10:47:00.852049 Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/rootfs.ext4.xz exists
6 10:47:01.300633 Validating that http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/modules.tar.xz exists
7 10:47:01.476047 Validating that https://storage.kernelci.org/images/fvp/fvp-1.0.0/fip.bin exists
8 10:47:01.651426 Validating that http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/kernel/Image exists
9 10:47:01.826617 Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz exists
10 10:47:02.002015 Validating that https://storage.kernelci.org/images/fvp/fvp-1.0.0/startup.nsh exists
11 10:47:02.176933 Validating that https://storage.kernelci.org/images/fvp/fvp-1.0.0/edk2-flash.img exists
12 10:47:02.352081 validate duration: 2.24
14 10:47:02.352630 start: 1 fvp-deploy (timeout 00:05:00) [common]
15 10:47:02.352807 start: 1.1 lava-overlay (timeout 00:05:00) [common]
16 10:47:02.354097 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7
17 10:47:02.355374 makedir: /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin
18 10:47:02.356058 makedir: /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/tests
19 10:47:02.356730 makedir: /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/results
20 10:47:02.356926 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-add-keys
21 10:47:02.357182 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-add-sources
22 10:47:02.357428 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-background-process-start
23 10:47:02.357671 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-background-process-stop
24 10:47:02.357934 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-common-functions
25 10:47:02.358176 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-echo-ipv4
26 10:47:02.358416 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-install-packages
27 10:47:02.358653 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-installed-packages
28 10:47:02.358890 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-os-build
29 10:47:02.359126 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-probe-channel
30 10:47:02.359362 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-probe-ip
31 10:47:02.359601 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-target-ip
32 10:47:02.359839 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-target-mac
33 10:47:02.360073 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-target-storage
34 10:47:02.360322 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-test-case
35 10:47:02.360570 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-test-event
36 10:47:02.360817 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-test-feedback
37 10:47:02.361060 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-test-raise
38 10:47:02.361299 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-test-reference
39 10:47:02.361539 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-test-runner
40 10:47:02.361784 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-test-set
41 10:47:02.362053 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/bin/lava-test-shell
42 10:47:02.362275 Creating /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/environment
43 10:47:02.362462 LAVA metadata
44 10:47:02.362603 - LAVA_JOB_ID=913179
45 10:47:02.362736 - LAVA_DISPATCHER_IP=172.25.0.2
46 10:47:02.362945 start: 1.1.1 lava-vland-overlay (timeout 00:05:00) [common]
47 10:47:02.363104 skipped lava-vland-overlay
48 10:47:02.363271 end: 1.1.1 lava-vland-overlay (duration 00:00:00) [common]
49 10:47:02.363437 start: 1.1.2 lava-multinode-overlay (timeout 00:05:00) [common]
50 10:47:02.363563 skipped lava-multinode-overlay
51 10:47:02.363726 end: 1.1.2 lava-multinode-overlay (duration 00:00:00) [common]
52 10:47:02.363886 start: 1.1.3 test-definition (timeout 00:05:00) [common]
53 10:47:02.364040 Loading test definitions
54 10:47:02.364220 start: 1.1.3.1 inline-repo-action (timeout 00:05:00) [common]
55 10:47:02.364355 Using /lava-913179 at stage 0
56 10:47:02.366841 uuid=913179_1.1.3.1 testdef=None
57 10:47:02.367013 end: 1.1.3.1 inline-repo-action (duration 00:00:00) [common]
58 10:47:02.367182 start: 1.1.3.2 test-overlay (timeout 00:05:00) [common]
59 10:47:02.367964 end: 1.1.3.2 test-overlay (duration 00:00:00) [common]
61 10:47:02.368416 start: 1.1.3.3 test-install-overlay (timeout 00:05:00) [common]
62 10:47:02.369428 end: 1.1.3.3 test-install-overlay (duration 00:00:00) [common]
64 10:47:02.369917 start: 1.1.3.4 test-runscript-overlay (timeout 00:05:00) [common]
65 10:47:02.370912 runner path: /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/0/tests/0_timesync-off test_uuid 913179_1.1.3.1
66 10:47:02.371203 end: 1.1.3.4 test-runscript-overlay (duration 00:00:00) [common]
68 10:47:02.371673 start: 1.1.3.5 git-repo-action (timeout 00:05:00) [common]
69 10:47:02.371818 Using /lava-913179 at stage 0
70 10:47:02.372016 Fetching tests from https://github.com/kernelci/test-definitions.git
71 10:47:02.372179 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/0/tests/1_kselftest-arm64_fvp'
72 10:47:05.875790 Running '/usr/bin/git checkout kernelci.org
73 10:47:06.057809 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/0/tests/1_kselftest-arm64_fvp/automated/linux/kselftest/kselftest.yaml
74 10:47:06.058626 uuid=913179_1.1.3.5 testdef=None
75 10:47:06.058824 end: 1.1.3.5 git-repo-action (duration 00:00:04) [common]
77 10:47:06.059255 start: 1.1.3.6 test-overlay (timeout 00:04:56) [common]
78 10:47:06.060670 end: 1.1.3.6 test-overlay (duration 00:00:00) [common]
80 10:47:06.061104 start: 1.1.3.7 test-install-overlay (timeout 00:04:56) [common]
81 10:47:06.063079 end: 1.1.3.7 test-install-overlay (duration 00:00:00) [common]
83 10:47:06.063542 start: 1.1.3.8 test-runscript-overlay (timeout 00:04:56) [common]
84 10:47:06.065458 runner path: /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/0/tests/1_kselftest-arm64_fvp test_uuid 913179_1.1.3.5
85 10:47:06.065611 BOARD='fvp'
86 10:47:06.065723 BRANCH='next'
87 10:47:06.065827 SKIPFILE='/dev/null'
88 10:47:06.065946 SKIP_INSTALL='True'
89 10:47:06.066053 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/kselftest.tar.xz'
90 10:47:06.066160 TST_CASENAME=''
91 10:47:06.066264 TST_CMDFILES='arm64'
92 10:47:06.066534 end: 1.1.3.8 test-runscript-overlay (duration 00:00:00) [common]
94 10:47:06.066966 Creating lava-test-runner.conf files
95 10:47:06.067077 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/913179/lava-overlay-c_ld_ed7/lava-913179/0 for stage 0
96 10:47:06.067236 - 0_timesync-off
97 10:47:06.067358 - 1_kselftest-arm64_fvp
98 10:47:06.067529 end: 1.1.3 test-definition (duration 00:00:04) [common]
99 10:47:06.067678 start: 1.1.4 compress-overlay (timeout 00:04:56) [common]
100 10:47:14.623221 end: 1.1.4 compress-overlay (duration 00:00:09) [common]
101 10:47:14.623380 start: 1.1.5 persistent-nfs-overlay (timeout 00:04:48) [common]
102 10:47:14.623459 end: 1.1.5 persistent-nfs-overlay (duration 00:00:00) [common]
103 10:47:14.623536 end: 1.1 lava-overlay (duration 00:00:12) [common]
104 10:47:14.623611 start: 1.2 download-retry (timeout 00:04:48) [common]
105 10:47:14.623690 start: 1.2.1 http-download (timeout 00:04:48) [common]
106 10:47:14.624569 downloading https://storage.kernelci.org/images/fvp/fvp-1.0.0/bl1.bin
107 10:47:14.624633 saving as /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/bl1/bl1.bin
108 10:47:14.624690 total size: 30061 (0 MB)
109 10:47:14.624749 No compression specified
110 10:47:14.973893 progress 100 % (0 MB)
111 10:47:14.974350 0 MB downloaded in 0.35 s (0.08 MB/s)
112 10:47:14.974659 end: 1.2.1 http-download (duration 00:00:00) [common]
114 10:47:14.975100 end: 1.2 download-retry (duration 00:00:00) [common]
115 10:47:14.975246 start: 1.3 download-retry (timeout 00:04:47) [common]
116 10:47:14.975411 start: 1.3.1 http-download (timeout 00:04:47) [common]
117 10:47:14.976662 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/rootfs.ext4.xz
118 10:47:14.976795 saving as /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/diskfile/rootfs.ext4
119 10:47:14.976904 total size: 126412724 (120 MB)
120 10:47:14.977056 Using unxz to decompress xz
121 10:47:15.329700 progress 0 % (0 MB)
122 10:47:16.743539 progress 5 % (6 MB)
123 10:47:17.681917 progress 10 % (12 MB)
124 10:47:18.230582 progress 15 % (18 MB)
125 10:47:19.126485 progress 20 % (24 MB)
126 10:47:19.568173 progress 25 % (30 MB)
127 10:47:20.070930 progress 30 % (36 MB)
128 10:47:20.531330 progress 35 % (42 MB)
129 10:47:20.979398 progress 40 % (48 MB)
130 10:47:21.432042 progress 45 % (54 MB)
131 10:47:21.894165 progress 50 % (60 MB)
132 10:47:22.572352 progress 55 % (66 MB)
133 10:47:23.541548 progress 60 % (72 MB)
134 10:47:25.118466 progress 65 % (78 MB)
135 10:47:26.554669 progress 70 % (84 MB)
136 10:47:28.054590 progress 75 % (90 MB)
137 10:47:29.469552 progress 80 % (96 MB)
138 10:47:30.891180 progress 85 % (102 MB)
139 10:47:32.296601 progress 90 % (108 MB)
140 10:47:33.672836 progress 95 % (114 MB)
141 10:47:34.978800 progress 100 % (120 MB)
142 10:47:35.015190 120 MB downloaded in 20.04 s (6.02 MB/s)
143 10:47:35.015537 end: 1.3.1 http-download (duration 00:00:20) [common]
145 10:47:35.015961 start: 1.3.2 download-retry (timeout 00:04:27) [common]
146 10:47:35.016104 start: 1.3.2.1 http-download (timeout 00:04:27) [common]
147 10:47:35.017337 downloading http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/modules.tar.xz
148 10:47:35.017459 saving as /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/diskfile.modules/modules.tar
149 10:47:35.017563 total size: 11588888 (11 MB)
150 10:47:35.017669 Using unxz to decompress xz
151 10:47:35.194132 progress 0 % (0 MB)
152 10:47:35.255060 progress 5 % (0 MB)
153 10:47:35.382374 progress 10 % (1 MB)
154 10:47:35.541484 progress 15 % (1 MB)
155 10:47:35.577282 progress 20 % (2 MB)
156 10:47:35.728187 progress 25 % (2 MB)
157 10:47:35.766471 progress 30 % (3 MB)
158 10:47:35.917200 progress 35 % (3 MB)
159 10:47:36.082123 progress 40 % (4 MB)
160 10:47:36.149543 progress 45 % (5 MB)
161 10:47:36.260428 progress 50 % (5 MB)
162 10:47:36.417493 progress 55 % (6 MB)
163 10:47:36.451439 progress 60 % (6 MB)
164 10:47:36.613640 progress 65 % (7 MB)
165 10:47:36.674601 progress 70 % (7 MB)
166 10:47:36.791350 progress 75 % (8 MB)
167 10:47:36.942956 progress 80 % (8 MB)
168 10:47:37.015147 progress 85 % (9 MB)
169 10:47:37.125295 progress 90 % (9 MB)
170 10:47:37.166589 progress 95 % (10 MB)
171 10:47:37.330078 progress 100 % (11 MB)
172 10:47:37.342263 11 MB downloaded in 2.32 s (4.75 MB/s)
173 10:47:37.342514 end: 1.3.2.1 http-download (duration 00:00:02) [common]
175 10:47:37.342931 end: 1.3.2 download-retry (duration 00:00:02) [common]
176 10:47:37.343071 start: 1.3.3 append-overlays (timeout 00:04:25) [common]
177 10:47:37.343208 Modifying '/var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/diskfile/rootfs.ext4'
178 10:47:49.582421 Overlays:
179 10:47:49.583339 - diskfile.lava: '/var/lib/lava/dispatcher/tmp/913179/compress-overlay-yb092xb2/overlay-1.1.4.tar.gz' to '/'
180 10:48:02.563728 - diskfile.modules: '/var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/diskfile.modules/modules.tar' to '/usr'
181 10:48:10.267036 end: 1.3.3 append-overlays (duration 00:00:33) [common]
182 10:48:10.267303 end: 1.3 download-retry (duration 00:00:55) [common]
183 10:48:10.267393 start: 1.4 download-retry (timeout 00:03:52) [common]
184 10:48:10.267473 start: 1.4.1 http-download (timeout 00:03:52) [common]
185 10:48:10.268435 downloading https://storage.kernelci.org/images/fvp/fvp-1.0.0/fip.bin
186 10:48:10.268501 saving as /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/fip_uefi/fip.bin
187 10:48:10.268560 total size: 2728862 (2 MB)
188 10:48:10.268621 No compression specified
189 10:48:10.616145 progress 1 % (0 MB)
190 10:48:10.791655 progress 6 % (0 MB)
191 10:48:10.965435 progress 12 % (0 MB)
192 10:48:11.136535 progress 18 % (0 MB)
193 10:48:11.140232 progress 24 % (0 MB)
194 10:48:11.145420 progress 30 % (0 MB)
195 10:48:11.309041 progress 36 % (0 MB)
196 10:48:11.311867 progress 42 % (1 MB)
197 10:48:11.314009 progress 48 % (1 MB)
198 10:48:11.316576 progress 54 % (1 MB)
199 10:48:11.318111 progress 60 % (1 MB)
200 10:48:11.320866 progress 66 % (1 MB)
201 10:48:11.482041 progress 72 % (1 MB)
202 10:48:11.484096 progress 78 % (2 MB)
203 10:48:11.485664 progress 84 % (2 MB)
204 10:48:11.487246 progress 90 % (2 MB)
205 10:48:11.488801 progress 96 % (2 MB)
206 10:48:11.490171 2 MB downloaded in 1.22 s (2.13 MB/s)
207 10:48:11.490531 end: 1.4.1 http-download (duration 00:00:01) [common]
209 10:48:11.491163 end: 1.4 download-retry (duration 00:00:01) [common]
210 10:48:11.491377 start: 1.5 download-retry (timeout 00:03:51) [common]
211 10:48:11.491570 start: 1.5.1 http-download (timeout 00:03:51) [common]
212 10:48:11.493237 downloading http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/kernel/Image
213 10:48:11.493427 saving as /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/kernel/Image
214 10:48:11.493602 total size: 45906432 (43 MB)
215 10:48:11.493768 No compression specified
216 10:48:11.668736 progress 0 % (0 MB)
217 10:48:12.018863 progress 5 % (2 MB)
218 10:48:12.371575 progress 10 % (4 MB)
219 10:48:12.719542 progress 15 % (6 MB)
220 10:48:13.066299 progress 20 % (8 MB)
221 10:48:13.408307 progress 25 % (10 MB)
222 10:48:13.756643 progress 30 % (13 MB)
223 10:48:14.096969 progress 35 % (15 MB)
224 10:48:14.288860 progress 40 % (17 MB)
225 10:48:14.626050 progress 45 % (19 MB)
226 10:48:14.818321 progress 50 % (21 MB)
227 10:48:15.150818 progress 55 % (24 MB)
228 10:48:15.338593 progress 60 % (26 MB)
229 10:48:15.668505 progress 65 % (28 MB)
230 10:48:15.851167 progress 70 % (30 MB)
231 10:48:16.181812 progress 75 % (32 MB)
232 10:48:16.362085 progress 80 % (35 MB)
233 10:48:16.542347 progress 85 % (37 MB)
234 10:48:16.723059 progress 90 % (39 MB)
235 10:48:17.047035 progress 95 % (41 MB)
236 10:48:17.225927 progress 100 % (43 MB)
237 10:48:17.226372 43 MB downloaded in 5.73 s (7.64 MB/s)
238 10:48:17.226615 end: 1.5.1 http-download (duration 00:00:06) [common]
240 10:48:17.227037 end: 1.5 download-retry (duration 00:00:06) [common]
241 10:48:17.227179 start: 1.6 download-retry (timeout 00:03:45) [common]
242 10:48:17.227322 start: 1.6.1 http-download (timeout 00:03:45) [common]
243 10:48:17.228494 Not decompressing ramdisk as can be used compressed.
244 10:48:17.228644 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
245 10:48:17.228756 saving as /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/ramdisk/initrd.cpio.gz
246 10:48:17.228859 total size: 5628169 (5 MB)
247 10:48:17.403485 progress 0 % (0 MB)
248 10:48:17.405758 progress 5 % (0 MB)
249 10:48:17.408252 progress 10 % (0 MB)
250 10:48:17.410494 progress 15 % (0 MB)
251 10:48:17.412988 progress 20 % (1 MB)
252 10:48:17.415168 progress 25 % (1 MB)
253 10:48:17.417665 progress 30 % (1 MB)
254 10:48:17.420206 progress 35 % (1 MB)
255 10:48:17.579082 progress 40 % (2 MB)
256 10:48:17.581572 progress 45 % (2 MB)
257 10:48:17.583810 progress 50 % (2 MB)
258 10:48:17.586315 progress 55 % (2 MB)
259 10:48:17.588810 progress 60 % (3 MB)
260 10:48:17.590980 progress 65 % (3 MB)
261 10:48:17.593528 progress 70 % (3 MB)
262 10:48:17.751493 progress 75 % (4 MB)
263 10:48:17.753976 progress 80 % (4 MB)
264 10:48:17.756489 progress 85 % (4 MB)
265 10:48:17.759039 progress 90 % (4 MB)
266 10:48:17.761462 progress 95 % (5 MB)
267 10:48:17.763728 progress 100 % (5 MB)
268 10:48:17.764073 5 MB downloaded in 0.54 s (10.03 MB/s)
269 10:48:17.764306 end: 1.6.1 http-download (duration 00:00:01) [common]
271 10:48:17.764728 end: 1.6 download-retry (duration 00:00:01) [common]
272 10:48:17.764868 start: 1.7 download-retry (timeout 00:03:45) [common]
273 10:48:17.765008 start: 1.7.1 http-download (timeout 00:03:45) [common]
274 10:48:17.766220 downloading https://storage.kernelci.org/images/fvp/fvp-1.0.0/startup.nsh
275 10:48:17.766346 saving as /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/startup_nsh/startup.nsh
276 10:48:17.766453 total size: 130 (0 MB)
277 10:48:17.766559 No compression specified
278 10:48:17.941336 progress 100 % (0 MB)
279 10:48:17.941614 0 MB downloaded in 0.18 s (0.00 MB/s)
280 10:48:17.941862 end: 1.7.1 http-download (duration 00:00:00) [common]
282 10:48:17.942369 end: 1.7 download-retry (duration 00:00:00) [common]
283 10:48:17.942523 start: 1.8 download-retry (timeout 00:03:44) [common]
284 10:48:17.942673 start: 1.8.1 http-download (timeout 00:03:44) [common]
285 10:48:17.943935 downloading https://storage.kernelci.org/images/fvp/fvp-1.0.0/edk2-flash.img
286 10:48:17.944070 saving as /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/uefi_cfg/edk2-flash.img
287 10:48:17.944183 total size: 99075 (0 MB)
288 10:48:17.944304 No compression specified
289 10:48:18.119363 progress 33 % (0 MB)
290 10:48:18.119853 progress 66 % (0 MB)
291 10:48:18.120289 progress 99 % (0 MB)
292 10:48:18.120745 0 MB downloaded in 0.18 s (0.54 MB/s)
293 10:48:18.120973 end: 1.8.1 http-download (duration 00:00:00) [common]
295 10:48:18.121453 end: 1.8 download-retry (duration 00:00:00) [common]
296 10:48:18.121649 end: 1 fvp-deploy (duration 00:01:16) [common]
297 10:48:18.121814 start: 2 boot-fvp (timeout 00:20:00) [common]
298 10:48:18.121990 start: 2.1 boot-fvp-main (timeout 00:20:00) [common]
299 10:48:18.122153 start: 2.1.1 check-fvp-version (timeout 00:20:00) [common]
300 10:48:18.122298 Pulling image shrinkwraptool/base-slim:latest
301 10:48:18.122427 Calling: 'docker' 'pull' 'shrinkwraptool/base-slim:latest'
302 10:48:19.315396 >> latest: Pulling from shrinkwraptool/base-slim
303 10:48:19.388159 >> Digest: sha256:e061e042dda10e788ebc440cbaf2c3dcf4cbbb5deb1090540a9c8487e0736ba8
304 10:48:19.388380 >> Status: Image is up to date for shrinkwraptool/base-slim:latest
305 10:48:19.413027 >> docker.io/shrinkwraptool/base-slim:latest
306 10:48:19.414988 Returned 0 in 1 seconds
307 10:48:19.515313 docker run --rm shrinkwraptool/base-slim:latest /tools/Base_RevC_AEMvA_pkg/models/Linux64_GCC-9.3/FVP_Base_RevC-2xAEMvA --version
308 10:48:30.133494 output:
309 10:48:30.133706 output: Fast Models [11.24.11 (Nov 29 2023)]
310 10:48:30.133798 output: Copyright 2000-2023 ARM Limited.
311 10:48:30.133890 output: All Rights Reserved.
312 10:48:30.133972 output:
313 10:48:30.134054 output:
314 10:48:30.134136 output: Info: /OSCI/SystemC: Simulation stopped by user.
315 10:48:30.134222 output:
317 10:48:30.134685 end: 2.1.1 check-fvp-version (duration 00:00:12) [common]
318 10:48:30.134817 start: 2.1.2 run-fvp (timeout 00:19:48) [common]
319 10:48:30.134925 Download action namespace keys are: dict_keys(['bl1', 'diskfile', 'diskfile.modules', 'fip_uefi', 'kernel', 'ramdisk', 'startup_nsh', 'uefi_cfg', 'file'])
320 10:48:30.135097 Empty value for action='download-action' label='file' key='file'
321 10:48:30.135193 'license_variable' or 'ubl_license' not set, model may not function.
322 10:48:30.136660 FVP model arguments:
323 10:48:30.136789 /tools/Base_RevC_AEMvA_pkg/models/Linux64_GCC-9.3/FVP_Base_RevC-2xAEMvA
--plugin /tools/Base_RevC_AEMvA_pkg/plugins/Linux64_GCC-9.3/ScalableVectorExtension.so \
-C SVE.ScalableVectorExtension.has_sme2=0 \
-C SVE.ScalableVectorExtension.has_sme=1 \
-C SVE.ScalableVectorExtension.has_sve2=1 \
-C bp.secure_memory=0 \
-C cluster0.NUM_CORES=4 \
-C cluster1.NUM_CORES=4 \
-C cache_state_modelled=0 \
-C bp.ve_sysregs.mmbSiteDefault=0 \
-C bp.pl011_uart0.untimed_fifos=1 \
-C bp.smsc_91c111.enabled=true \
-C bp.pl011_uart0.untimed_fifos=1 \
-C bp.secureflashloader.fname='/lava-913179-2.1.2/bl1.bin' \
-C bp.flashloader0.fname='/lava-913179-2.1.2/fip.bin' \
-C bp.flashloader1.fname='/lava-913179-2.1.2/edk2-flash.img' \
--data 'cluster0.cpu0=/lava-913179-2.1.2/initrd.cpio.gz@0x84000000' \
-C bp.hostbridge.interfaceName='tap01' \
-C bp.dram_metadata.is_enabled=1 \
-C semihosting-enable=true \
-C cluster0.cpu0.semihosting-cwd='/lava-913179-2.1.2' \
-C cluster0.has_large_system_ext=1 \
-C cluster1.has_large_system_ext=1 \
-C cluster0.has_16k_granule=1 \
-C cluster1.has_16k_granule=1 \
-C cluster0.has_branch_target_exception=1 \
-C cluster1.has_branch_target_exception=1 \
-C cluster0.has_rndr=1 \
-C cluster1.has_rndr=1 \
-C cluster0.memory_tagging_support_level=3 \
-C cluster1.memory_tagging_support_level=3 \
-C cluster0.has_arm_v8-1=1 \
-C cluster0.has_arm_v8-2=1 \
-C cluster0.has_arm_v8-3=1 \
-C cluster0.has_arm_v8-4=1 \
-C cluster0.has_arm_v8-5=1 \
-C cluster0.has_arm_v8-6=1 \
-C cluster0.has_arm_v8-7=1 \
-C cluster1.has_arm_v8-1=1 \
-C cluster1.has_arm_v8-2=1 \
-C cluster1.has_arm_v8-3=1 \
-C cluster1.has_arm_v8-4=1 \
-C cluster1.has_arm_v8-5=1 \
-C cluster1.has_arm_v8-6=1 \
-C cluster1.has_arm_v8-7=1 \
-C bp.virtioblockdevice.image_path=/lava-913179-2.1.2/rootfs.ext4 \
-C bp.hostbridge.userNetPorts=8022=22 \
-C bp.hostbridge.userNetworking=1
324 10:48:30.137006 Boot command: lava-outerr docker run --rm --interactive --tty --hostname lava --name lava-913179-2.1.2 --volume /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/bl1/bl1.bin:/lava-913179-2.1.2/bl1.bin --volume /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/diskfile/rootfs.ext4:/lava-913179-2.1.2/rootfs.ext4 --volume /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/diskfile.modules/modules.tar:/lava-913179-2.1.2/modules.tar --volume /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/fip_uefi/fip.bin:/lava-913179-2.1.2/fip.bin --volume /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/kernel/Image:/lava-913179-2.1.2/Image --volume /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/ramdisk/initrd.cpio.gz:/lava-913179-2.1.2/initrd.cpio.gz --volume /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/startup_nsh/startup.nsh:/lava-913179-2.1.2/startup.nsh --volume /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/uefi_cfg/edk2-flash.img:/lava-913179-2.1.2/edk2-flash.img --volume /var/lib/lava/dispatcher/tmp/913179/run-fvp-r2qezoyy/script.sh:/root/script.sh shrinkwraptool/base-slim:latest sh /root/script.sh
325 10:48:30.142049 Setting prompt string to ['terminal_0: Listening for serial connection on port (?P<PORT>\\d+)']
326 10:48:30.142342 run-fvp: Wait for prompt ['terminal_0: Listening for serial connection on port (?P<PORT>\\d+)'] (timeout 00:20:00)
327 10:48:33.777262 Starting the FVP model
328 10:48:33.875967 terminal_0: Listening for serial connection on port 5000
329 10:48:33.876168 terminal_1: Listening for serial connection on port 5001
330 10:48:33.876258 terminal_2: Listening for serial connection on port 5002
331 10:48:33.876546 Connection group(0) terminal_0: Listening for serial connection on port 5000
332 10:48:33.876827 Found FVP port 5000
333 10:48:33.876993 end: 2.1.2 run-fvp (duration 00:00:04) [common]
334 10:48:33.877110 start: 2.1.3 fvp-serial-connect (timeout 00:19:44) [common]
335 10:48:33.877214 Connect command: lava-outerr docker exec --interactive --tty lava-913179-2.1.2 telnet localhost 5000
336 10:48:33.881567 end: 2.1.3 fvp-serial-connect (duration 00:00:00) [common]
337 10:48:33.881913 start: 2.1.4 read-feedback (timeout 00:19:44) [common]
338 10:48:33.882050 end: 2.1.4 read-feedback (duration 00:00:00) [common]
339 10:48:33.882182 end: 2.1 boot-fvp-main (duration 00:00:16) [common]
340 10:48:33.882270 start: 2.2 read-feedback (timeout 00:19:44) [common]
341 10:48:33.882363 end: 2.2 read-feedback (duration 00:00:00) [common]
342 10:48:33.882463 start: 2.3 auto-login-action (timeout 00:19:44) [common]
343 10:48:33.882587 Setting prompt string to ['Linux version [0-9]']
344 10:48:33.882787 auto-login-action: Wait for prompt ['Linux version [0-9]'] (timeout 00:20:00)
345 10:48:33.989126 Trying 127.0.0.1...
346 10:48:33.989570 Connected to localhost.
347 10:48:33.989661 Escape character is '^]'.
348 10:48:35.204221 NOTICE: Booting Trusted Firmware
349 10:48:35.204521 NOTICE: BL1: v2.7(release):v2.7.0
350 10:48:35.204660 NOTICE: BL1: Built : 20:46:02, Jan 9 2023
351 10:48:35.204820 INFO: BL1: RAM 0x4035000 - 0x403c000
352 10:48:35.246208 INFO: Loading image id=31 at address 0x4001010
353 10:48:35.246626 INFO: Image id=31 loaded: 0x4001010 - 0x400120c
354 10:48:35.246718 INFO: FCONF: Config file with image ID:31 loaded at address = 0x4001010
355 10:48:35.246802 INFO: Loading image id=24 at address 0x4001300
356 10:48:35.246884 INFO: Image id=24 loaded: 0x4001300 - 0x40015e4
357 10:48:35.246961 INFO: FCONF: Config file with image ID:24 loaded at address = 0x4001300
358 10:48:35.247037 INFO: BL1: Loading BL2
359 10:48:35.247117 INFO: Loading image id=1 at address 0x4022000
360 10:48:35.247193 INFO: Image id=1 loaded: 0x4022000 - 0x40297c1
361 10:48:35.247270 NOTICE: BL1: Booting BL2
362 10:48:35.247347 INFO: Entry point address = 0x4022000
363 10:48:35.247423 INFO: SPSR = 0x3c5
364 10:48:35.247498 INFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0x4001010
365 10:48:35.247573 INFO: FCONF: Reading firmware configuration information for: dyn_cfg
366 10:48:35.247649 INFO: FCONF: Reading TB_FW firmware configuration file from: 0x4001300
367 10:48:35.247726 NOTICE: BL2: v2.7(release):v2.7.0
368 10:48:35.247802 NOTICE: BL2: Built : 20:46:05, Jan 9 2023
369 10:48:35.247884 INFO: BL2: Doing platform setup
370 10:48:35.247959 INFO: Configuring TrustZone Controller
371 10:48:35.248034 INFO: Total 8 regions set.
372 10:48:35.248109 INFO: BL2: Loading image id 3
373 10:48:35.248185 INFO: Loading image id=3 at address 0x4003000
374 10:48:35.248259 INFO: Image id=3 loaded: 0x4003000 - 0x401319d
375 10:48:35.248333 INFO: BL2: Loading image id 23
376 10:48:35.248408 INFO: Loading image id=23 at address 0x7f00000
377 10:48:35.248483 INFO: Image id=23 loaded: 0x7f00000 - 0x7f02358
378 10:48:35.248557 INFO: BL2: Loading image id 25
379 10:48:35.248631 INFO: Loading image id=25 at address 0x4001300
380 10:48:35.248706 INFO: Image id=25 loaded: 0x4001300 - 0x4001348
381 10:48:35.248780 INFO: BL2: Loading image id 5
382 10:48:35.248854 INFO: Loading image id=5 at address 0x88000000
383 10:48:35.262977 INFO: Image id=5 loaded: 0x88000000 - 0x88280000
384 10:48:35.269589 INFO: BL2: Loading image id 27
385 10:48:35.270029 INFO: Loading image id=27 at address 0x80000000
386 10:48:35.270223 INFO: Image id=27 loaded: 0x80000000 - 0x80000048
387 10:48:35.271237 NOTICE: BL1: Booting BL31
388 10:48:35.271393 INFO: Entry point address = 0x4003000
389 10:48:35.271509 INFO: SPSR = 0x3cd
390 10:48:35.272420 INFO: BL31 FCONF: FW_CONFIG address = 4001010
391 10:48:35.272576 INFO: FCONF: Reading FW_CONFIG firmware configuration file from: 0x4001010
392 10:48:35.272687 INFO: FCONF: Reading firmware configuration information for: dyn_cfg
393 10:48:35.276365 INFO: FCONF: Reading HW_CONFIG firmware configuration file from: 0x7f00000
394 10:48:35.276516 INFO: FCONF: Reading firmware configuration information for: cpu_timer
395 10:48:35.277491 INFO: FCONF: Reading firmware configuration information for: uart_config
396 10:48:35.283707 INFO: FCONF: Reading firmware configuration information for: topology
397 10:48:35.284387 INFO: FCONF: Reading firmware configuration information for: gicv3_config
398 10:48:35.286435 NOTICE: BL31: v2.7(release):v2.7.0
399 10:48:35.286598 NOTICE: BL31: Built : 20:46:10, Jan 9 2023
400 10:48:35.286715 INFO: GICv3 with legacy support detected.
401 10:48:35.287053 INFO: ARM GICv3 driver initialized in EL3
402 10:48:35.287197 INFO: Maximum SPI INTID supported: 255
403 10:48:35.288121 INFO: BL31: Initializing runtime services
404 10:48:35.288709 INFO: BL31: Preparing for EL3 exit to normal world
405 10:48:35.289044 INFO: Entry point address = 0x88000000
406 10:48:35.289164 INFO: SPSR = 0x3c9
407 10:48:36.574680 [2J[04D[=3h[2J[09DPress ESCAPE for boot options ...........[2J[45DUEFI Interactive Shell v2.2
408 10:48:36.575576 EDK II
409 10:48:36.576140 UEFI v2.70 (EDK II, 0x00010000)
410 10:48:36.579479 [1m[33m[40mMapping table[0m[37m[40m
411 10:48:36.582467 [1m[33m[40m FS1:[0m[37m[40m [1m[37m[40mAlias(s):[0m[37m[40mF6:
412 10:48:36.582859 VenHw(C5B9C74A-6D72-4719-99AB-C59F199091EB)
413 10:48:36.585151 [1m[33m[40m FS0:[0m[37m[40m [1m[37m[40mAlias(s):[0m[37m[40mF0:
414 10:48:36.585253 Fv(87940482-FC81-41C3-87E6-399CF85AC8A0)
415 10:48:36.587576 [1m[33m[40m BLK1:[0m[37m[40m [1m[37m[40mAlias(s):[0m[37m[40m
416 10:48:36.587677 VenHw(93E34C7E-B50E-11DF-9223-2443DFD72085,00)
417 10:48:36.589640 [1m[33m[40m BLK2:[0m[37m[40m [1m[37m[40mAlias(s):[0m[37m[40m
418 10:48:36.589949 VenHw(93E34C7E-B50E-11DF-9223-2443DFD72085,01)
419 10:48:36.591910 [1m[33m[40m BLK3:[0m[37m[40m [1m[37m[40mAlias(s):[0m[37m[40m
420 10:48:36.592057 VenHw(93E34C7E-B50E-11DF-9223-2443DFD72085,02)
421 10:48:36.594197 [1m[33m[40m BLK4:[0m[37m[40m [1m[37m[40mAlias(s):[0m[37m[40m
422 10:48:36.594355 VenHw(93E34C7E-B50E-11DF-9223-2443DFD72085,03)
423 10:48:36.596560 [1m[33m[40m BLK0:[0m[37m[40m [1m[37m[40mAlias(s):[0m[37m[40m
424 10:48:36.596708 VenHw(09831032-6FA3-4484-AF4F-0A000A8D3A82)
425 10:48:46.770761 Press [1m[37m[40mESC[0m[37m[40m in 5 seconds to skip [1m[33m[40mstartup.nsh[0m[37m[40m or any other key to continue.[72DPress [1m[37m[40mESC[0m[37m[40m in 4 seconds to skip [1m[33m[40mstartup.nsh[0m[37m[40m or any other key to continue.[72DPress [1m[37m[40mESC[0m[37m[40m in 3 seconds to skip [1m[33m[40mstartup.nsh[0m[37m[40m or any other key to continue.[72DPress [1m[37m[40mESC[0m[37m[40m in 2 seconds to skip [1m[33m[40mstartup.nsh[0m[37m[40m or any other key to continue.[72DPress [1m[37m[40mESC[0m[37m[40m in 1 seconds to skip [1m[33m[40mstartup.nsh[0m[37m[40m or any other key to continue.
426 10:48:48.472469 EFI stub: Booting Linux Kernel...
427 10:48:48.472844 EFI stub: EFI_RNG_PROTOCOL unavailable
428 10:48:48.927513 EFI stub: Generating empty DTB
429 10:48:48.927730 EFI stub: Exiting boot services...
430 10:48:49.001628 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd0f0]
431 10:48:49.002341 start: 2.3.1 login-action (timeout 00:19:29) [common]
432 10:48:49.002474 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
433 10:48:49.002584 Setting prompt string to []
434 10:48:49.002694 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
435 10:48:49.002797 Using line separator: #'\n'#
436 10:48:49.002886 No login prompt set.
437 10:48:49.002984 Parsing kernel messages
438 10:48:49.003068 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
439 10:48:49.003223 [login-action] Waiting for messages, (timeout 00:19:29)
440 10:48:49.003326 Waiting using forced prompt support (timeout 00:09:45)
441 10:48:49.004063 [ 0.000000] Linux version 6.12.0-rc5-next-20241030 (KernelCI@build-j357129-arm64-gcc-12-defconfig-z772r) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Oct 30 10:38:14 UTC 2024
442 10:48:49.004173 [ 0.000000] KASLR enabled
443 10:48:49.004260 [ 0.000000] earlycon: pl11 at MMIO 0x000000001c090000 (options '')
444 10:48:49.004344 [ 0.000000] printk: legacy bootconsole [pl11] enabled
445 10:48:49.004936 [ 0.000000] efi: EFI v2.7 by EDK II
446 10:48:49.005038 [ 0.000000] efi: ACPI 2.0=0xf5e30018 MEMATTR=0xfa8c3698 MEMRESERVE=0xf5f8bf18
447 10:48:49.144068 [ 0.000000] ACPI: Early table checksum verification disabled
448 10:48:49.145015 [ 0.000000] ACPI: RSDP 0x00000000F5E30018 000024 (v02 ARMLTD)
449 10:48:49.145538 [ 0.000000] ACPI: XSDT 0x00000000F5E3FE98 000074 (v01 ARMLTD ARMLFACP 00010000 01000013)
450 10:48:49.146114 [ 0.000000] ACPI: FACP 0x00000000F5E3FA98 000114 (v06 ARMLTD ARMLFACP 00010000 ARMH 00010000)
451 10:48:49.147264 [ 0.000000] ACPI: DSDT 0x00000000F5E3F818 000189 (v01 ARMLTD ARM-VEXP 00000001 INTL 20220331)
452 10:48:49.147571 [ 0.000000] ACPI: GTDT 0x00000000F5E3FC18 0000E8 (v03 ARMLTD ARMLGTDT 00010000 ARMH 00010000)
453 10:48:49.147875 [ 0.000000] ACPI: APIC 0x00000000F5E3E998 0002E8 (v05 ARMLTD ARMLAPIC 00010000 ARMH 00010000)
454 10:48:49.147974 [ 0.000000] ACPI: SPCR 0x00000000F5E3FF98 000050 (v02 ARMLTD ARMLSPCR 00010000 ARMH 00010000)
455 10:48:49.148472 [ 0.000000] ACPI: SSDT 0x00000000F5E3FD98 000094 (v02 ARMLTD SERIAL 00000001 INTL 20220331)
456 10:48:49.148773 [ 0.000000] ACPI: DBG2 0x00000000F5E3ED98 00005D (v00 ARMLTD ARMLDBG2 00010000 ARMH 00010000)
457 10:48:49.149081 [ 0.000000] ACPI: SSDT 0x00000000F5E3F518 000094 (v02 ARMLTD SERIAL 00000001 INTL 20220331)
458 10:48:49.149181 [ 0.000000] ACPI: IORT 0x00000000F5E3F618 0000DC (v00 ARMLTD ARMLIORT 00010000 ARMH 00010000)
459 10:48:49.149873 [ 0.000000] ACPI: MCFG 0x00000000F5E3F798 00003C (v01 ARMLTD ARMLMCFG 00010000 ARMH 00010000)
460 10:48:49.149972 [ 0.000000] ACPI: SSDT 0x00000000F5E3EE98 000306 (v02 ARMLTD FVP-REVC 00000001 INTL 20220331)
461 10:48:49.150820 [ 0.000000] ACPI: SPCR: console: pl011,mmio32,0x1c090000,115200
462 10:48:49.150920 [ 0.000000] ACPI: Use ACPI SPCR as default console: Yes
463 10:48:49.151981 [ 0.000000] NUMA: Faking a node at [mem 0x0000000080000000-0x00000008ffffffff]
464 10:48:49.152571 [ 0.000000] NODE_DATA(0) allocated [mem 0x8ff80e9c0-0x8ff810fff]
465 10:48:49.163871 [ 0.000000] Zone ranges:
466 10:48:49.164079 [ 0.000000] DMA [mem 0x0000000080000000-0x00000000ffffffff]
467 10:48:49.164168 [ 0.000000] DMA32 empty
468 10:48:49.164499 [ 0.000000] Normal [mem 0x0000000100000000-0x00000008ffffffff]
469 10:48:49.164596 [ 0.000000] Movable zone start for each node
470 10:48:49.164680 [ 0.000000] Early memory node ranges
471 10:48:49.164764 [ 0.000000] node 0: [mem 0x0000000080000000-0x00000000f59effff]
472 10:48:49.165069 [ 0.000000] node 0: [mem 0x00000000f59f0000-0x00000000f5a5ffff]
473 10:48:49.165163 [ 0.000000] node 0: [mem 0x00000000f5a60000-0x00000000f5b56fff]
474 10:48:49.165252 [ 0.000000] node 0: [mem 0x00000000f5b57000-0x00000000f5e2ffff]
475 10:48:49.165334 [ 0.000000] node 0: [mem 0x00000000f5e30000-0x00000000f5e3ffff]
476 10:48:49.165418 [ 0.000000] node 0: [mem 0x00000000f5e40000-0x00000000f5f7ffff]
477 10:48:49.165519 [ 0.000000] node 0: [mem 0x00000000f5f80000-0x00000000faf4ffff]
478 10:48:49.165604 [ 0.000000] node 0: [mem 0x00000000faf50000-0x00000000faf8ffff]
479 10:48:49.165688 [ 0.000000] node 0: [mem 0x00000000faf90000-0x00000000faf9ffff]
480 10:48:49.165769 [ 0.000000] node 0: [mem 0x00000000fafa0000-0x00000000fafeffff]
481 10:48:49.166098 [ 0.000000] node 0: [mem 0x00000000faff0000-0x00000000feffffff]
482 10:48:49.166194 [ 0.000000] node 0: [mem 0x0000000880000000-0x00000008ffffffff]
483 10:48:49.166283 [ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000008ffffffff]
484 10:48:49.394961 [ 0.000000] On node 0, zone Normal: 4096 pages in unavailable ranges
485 10:48:49.395429 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fd000000 on node -1
486 10:48:49.396432 [ 0.000000] psci: probing for conduit method from ACPI.
487 10:48:49.399918 [ 0.000000] psci: PSCIv1.1 detected in firmware.
488 10:48:49.400071 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
489 10:48:49.400408 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
490 10:48:49.401538 [ 0.000000] psci: SMC Calling Convention v1.2
491 10:48:49.412286 [ 0.000000] percpu: Embedded 25 pages/cpu s61784 r8192 d32424 u102400
492 10:48:49.412751 [ 0.000000] pcpu-alloc: s61784 r8192 d32424 u102400 alloc=25*4096
493 10:48:49.413282 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 [0] 6 [0] 7
494 10:48:49.414989 [ 0.000000] Detected PIPT I-cache on CPU0
495 10:48:49.416675 [ 0.000000] CPU features: detected: Address authentication (IMP DEF algorithm)
496 10:48:49.417275 [ 0.000000] CPU features: detected: GIC system register CPU interface
497 10:48:49.417374 [ 0.000000] CPU features: detected: HCRX_EL2 register
498 10:48:49.417707 [ 0.000000] CPU features: detected: Virtualization Host Extensions
499 10:48:49.417808 [ 0.000000] CPU features: detected: Memory Tagging Extension
500 10:48:49.417922 [ 0.000000] CPU features: detected: Asymmetric MTE Tag Check Fault
501 10:48:49.420093 [ 0.000000] alternatives: applying boot alternatives
502 10:48:49.431971 [ 0.000000] Kernel command line: Image console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9 root=/dev/vda1 rw rootwait ip=dhcp
503 10:48:49.434686 [ 0.000000] Unknown kernel command line parameters "Image user_debug=31", will be passed to user space.
504 10:48:49.436889 [ 0.000000] random: crng init done
505 10:48:49.437019 [ 0.000000] printk: log buffer data + meta data: 131072 + 458752 = 589824 bytes
506 10:48:49.830782 [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
507 10:48:50.031864 [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
508 10:48:50.033370 [ 0.000000] Fallback order for Node 0: 0
509 10:48:50.033506 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1044480
510 10:48:50.033827 [ 0.000000] Policy zone: Normal
511 10:48:50.033949 [ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
512 10:48:50.034509 [ 0.000000] software IO TLB: area num 8.
513 10:49:03.125544 [ 0.000000] software IO TLB: mapped [mem 0x00000000f68c3000-0x00000000fa8c3000] (64MB)
514 10:49:03.283327 [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
515 10:49:03.303987 [ 0.000000] rcu: Preemptible hierarchical RCU implementation.
516 10:49:03.304194 [ 0.000000] rcu: RCU event tracing is enabled.
517 10:49:03.304288 [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=8.
518 10:49:03.304656 [ 0.000000] Trampoline variant of Tasks RCU enabled.
519 10:49:03.304752 [ 0.000000] Tracing variant of Tasks RCU enabled.
520 10:49:03.305084 [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
521 10:49:03.305179 [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
522 10:49:03.307934 [ 0.000000] RCU Tasks: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=8.
523 10:49:03.308095 [ 0.000000] RCU Tasks Trace: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=8.
524 10:49:03.308438 [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
525 10:49:03.330941 [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
526 10:49:03.331155 [ 0.000000] GICv3: 224 SPIs implemented
527 10:49:03.331249 [ 0.000000] GICv3: 0 Extended SPIs implemented
528 10:49:03.332559 [ 0.000000] Root IRQ handler: gic_handle_irq
529 10:49:03.333095 [ 0.000000] GICv3: GICv3 features: 16 PPIs
530 10:49:03.333650 [ 0.000000] GICv3: GICD_CTRL.DS=0, SCR_EL3.FIQ=0
531 10:49:03.334277 [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000002f100000
532 10:49:03.343927 [ 0.000000] ITS [mem 0x2f020000-0x2f03ffff]
533 10:49:03.357361 [ 0.000000] ITS@0x000000002f020000: allocated 8192 Devices @880070000 (indirect, esz 8, psz 64K, shr 1)
534 10:49:03.364026 [ 0.000000] ITS@0x000000002f020000: allocated 8192 Virtual CPUs @880080000 (indirect, esz 8, psz 64K, shr 1)
535 10:49:03.370774 [ 0.000000] ITS@0x000000002f020000: allocated 8192 Interrupt Collections @880090000 (flat, esz 8, psz 64K, shr 1)
536 10:49:03.374170 [ 0.000000] GICv3: using LPI property table @0x00000008800a0000
537 10:49:03.428864 [ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x00000008800b0000
538 10:49:03.434507 [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
539 10:49:03.440118 [ 0.000000] ACPI GTDT: found 1 memory-mapped timer block(s).
540 10:49:03.443724 [ 0.000000] arch_timer: cp15 and mmio timer(s) running at 100.00MHz (phys/phys).
541 10:49:03.444190 [ 0.000000] clocksource: arch_sys_counter: mask: 0x1ffffffffffffff max_cycles: 0x171024e7e0, max_idle_ns: 440795205315 ns
542 10:49:03.444566 [ 0.000003] sched_clock: 57 bits at 100MHz, resolution 10ns, wraps every 4398046511100ns
543 10:49:03.455304 [ 0.001298] Console: colour dummy device 80x25
544 10:49:03.461540 [ 0.001817] ACPI: Core revision 20240827
545 10:49:03.465387 [ 0.002516] Calibrating delay loop (skipped), value calculated using timer frequency.. 200.00 BogoMIPS (lpj=400000)
546 10:49:03.465950 [ 0.002659] pid_max: default: 32768 minimum: 301
547 10:49:03.468691 [ 0.003193] LSM: initializing lsm=capability
548 10:49:03.487219 [ 0.003904] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
549 10:49:03.494171 [ 0.004029] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
550 10:49:03.545555 [ 0.007779] ACPI PPTT: No PPTT table found, CPU and cache topology may be inaccurate
551 10:49:03.547359 [ 0.007932] cacheinfo: Unable to detect cache hierarchy for CPU 0
552 10:49:03.635387 [ 0.041518] rcu: Hierarchical SRCU implementation.
553 10:49:03.635870 [ 0.041586] rcu: Max phase no-delay instances is 1000.
554 10:49:03.652751 [ 0.042590] Timer migration: 1 hierarchy levels; 8 children per group; 1 crossnode level
555 10:49:03.663316 [ 0.043308] fsl-mc MSI: ITS@0x2f020000 domain created
556 10:49:03.665564 [ 0.043489] Remapping and enabling EFI services.
557 10:49:03.700590 [ 0.046085] smp: Bringing up secondary CPUs ...
558 10:49:04.519581 [ 0.048686] Detected PIPT I-cache on CPU1
559 10:49:04.521969 [ 0.048859] GICv3: CPU1: found redistributor 100 region 0:0x000000002f120000
560 10:49:04.523801 [ 0.048920] GICv3: CPU1: using allocated LPI pending table @0x00000008800c0000
561 10:49:04.523994 [ 0.049030] CPU1: Booted secondary processor 0x0000000100 [0x410fd0f0]
562 10:49:04.524090 [ 0.064748] Detected PIPT I-cache on CPU2
563 10:49:04.524450 [ 0.064925] GICv3: CPU2: found redistributor 200 region 0:0x000000002f140000
564 10:49:04.524552 [ 0.064986] GICv3: CPU2: using allocated LPI pending table @0x00000008800d0000
565 10:49:04.524644 [ 0.065097] CPU2: Booted secondary processor 0x0000000200 [0x410fd0f0]
566 10:49:04.524727 [ 0.080531] Detected PIPT I-cache on CPU3
567 10:49:04.524808 [ 0.080713] GICv3: CPU3: found redistributor 300 region 0:0x000000002f160000
568 10:49:04.524892 [ 0.080774] GICv3: CPU3: using allocated LPI pending table @0x00000008800e0000
569 10:49:04.525002 [ 0.080884] CPU3: Booted secondary processor 0x0000000300 [0x410fd0f0]
570 10:49:04.525087 [ 0.097103] Detected PIPT I-cache on CPU4
571 10:49:04.525167 [ 0.097288] GICv3: CPU4: found redistributor 10000 region 0:0x000000002f180000
572 10:49:04.525249 [ 0.097351] GICv3: CPU4: using allocated LPI pending table @0x00000008800f0000
573 10:49:04.525355 [ 0.097460] CPU4: Booted secondary processor 0x0000010000 [0x410fd0f0]
574 10:49:04.525444 [ 0.112869] Detected PIPT I-cache on CPU5
575 10:49:04.525524 [ 0.113059] GICv3: CPU5: found redistributor 10100 region 0:0x000000002f1a0000
576 10:49:04.525606 [ 0.113122] GICv3: CPU5: using allocated LPI pending table @0x0000000880100000
577 10:49:04.525687 [ 0.113231] CPU5: Booted secondary processor 0x0000010100 [0x410fd0f0]
578 10:49:04.525766 [ 0.129448] Detected PIPT I-cache on CPU6
579 10:49:04.525855 [ 0.129641] GICv3: CPU6: found redistributor 10200 region 0:0x000000002f1c0000
580 10:49:04.525961 [ 0.129705] GICv3: CPU6: using allocated LPI pending table @0x0000000880110000
581 10:49:04.526044 [ 0.129814] CPU6: Booted secondary processor 0x0000010200 [0x410fd0f0]
582 10:49:04.526128 [ 0.141181] Detected PIPT I-cache on CPU7
583 10:49:04.526212 [ 0.141379] GICv3: CPU7: found redistributor 10300 region 0:0x000000002f1e0000
584 10:49:04.526291 [ 0.141443] GICv3: CPU7: using allocated LPI pending table @0x0000000880120000
585 10:49:04.526371 [ 0.141552] CPU7: Booted secondary processor 0x0000010300 [0x410fd0f0]
586 10:49:04.526448 [ 0.142272] smp: Brought up 1 node, 8 CPUs
587 10:49:04.526544 [ 0.143575] SMP: Total of 8 processors activated.
588 10:49:04.526628 [ 0.143648] CPU: All CPU(s) started at EL2
589 10:49:04.527169 [ 0.143714] CPU features: detected: Branch Target Identification
590 10:49:04.527273 [ 0.143796] CPU features: detected: 32-bit EL0 Support
591 10:49:04.527876 [ 0.143866] CPU features: detected: 32-bit EL1 Support
592 10:49:04.527980 [ 0.143943] CPU features: detected: ARMv8.4 Translation Table Level
593 10:49:04.528066 [ 0.144026] CPU features: detected: Data cache clean to the PoU not required for I/D coherence
594 10:49:04.528402 [ 0.144124] CPU features: detected: Common not Private translations
595 10:49:04.528498 [ 0.144208] CPU features: detected: CRC32 instructions
596 10:49:04.528625 [ 0.144284] CPU features: detected: Data independent timing control (DIT)
597 10:49:04.529012 [ 0.144371] CPU features: detected: E0PD
598 10:49:04.529109 [ 0.144440] CPU features: detected: Enhanced Counter Virtualization
599 10:49:04.529194 [ 0.144518] CPU features: detected: Enhanced Privileged Access Never
600 10:49:04.529527 [ 0.144610] CPU features: detected: Enhanced Virtualization Traps
601 10:49:04.529661 [ 0.144694] CPU features: detected: Fine Grained Traps
602 10:49:04.529761 [ 0.144783] CPU features: detected: Generic authentication (IMP DEF algorithm)
603 10:49:04.530107 [ 0.144873] CPU features: detected: RCpc load-acquire (LDAPR)
604 10:49:04.531859 [ 0.144997] CPU features: detected: LSE atomic instructions
605 10:49:04.532409 [ 0.145079] CPU features: detected: Privileged Access Never
606 10:49:04.532558 [ 0.145158] CPU features: detected: RAS Extension Support
607 10:49:04.532899 [ 0.145236] CPU features: detected: Random Number Generator
608 10:49:04.533237 [ 0.145315] CPU features: detected: Speculation barrier (SB)
609 10:49:04.533595 [ 0.145395] CPU features: detected: Stage-2 Force Write-Back
610 10:49:04.538209 [ 0.145479] CPU features: detected: TLB range maintenance instructions
611 10:49:04.538836 [ 0.145564] CPU features: detected: WFx with timeout
612 10:49:04.538989 [ 0.145640] CPU features: detected: Scalable Matrix Extension
613 10:49:04.539423 [ 0.145726] CPU features: detected: Scalable Vector Extension
614 10:49:04.694670 [ 0.146144] alternatives: applying system-wide alternatives
615 10:49:04.875594 [ 0.161185] CPU features: detected: Hardware dirty bit management on CPU0-7
616 10:49:04.876087 [ 0.161289] SVE: maximum available vector length 64 bytes per vector
617 10:49:04.876195 [ 0.161375] SVE: default vector length 64 bytes per vector
618 10:49:04.879416 [ 0.161492] SME: minimum available vector length 16 bytes per vector
619 10:49:04.879593 [ 0.161573] SME: maximum available vector length 64 bytes per vector
620 10:49:04.879684 [ 0.161655] SME: default vector length 32 bytes per vector
621 10:49:04.902916 [ 0.164445] Memory: 3939488K/4177920K available (17344K kernel code, 4894K rwdata, 11940K rodata, 10496K init, 744K bss, 198892K reserved, 32768K cma-reserved)
622 10:49:04.990445 [ 0.167119] devtmpfs: initialized
623 10:49:05.186574 [ 0.186638] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
624 10:49:05.187549 [ 0.186775] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
625 10:49:05.201237 [ 0.192485] 2G module region forced by RANDOMIZE_MODULE_REGION_FULL
626 10:49:05.201720 [ 0.192562] 0 pages in range for non-PLT usage
627 10:49:05.215744 [ 0.192594] 512864 pages in range for PLT usage
628 10:49:05.215956 [ 0.193256] pinctrl core: initialized pinctrl subsystem
629 10:49:05.324432 [ 0.199909] DMI not present or invalid.
630 10:49:05.485193 [ 0.227012] NET: Registered PF_NETLINK/PF_ROUTE protocol family
631 10:49:05.543284 [ 0.232780] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
632 10:49:05.557206 [ 0.233659] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
633 10:49:05.568969 [ 0.235241] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
634 10:49:05.571119 [ 0.235482] audit: initializing netlink subsys (disabled)
635 10:49:05.598444 [ 0.236023] audit: type=2000 audit(0.220:1): state=initialized audit_enabled=0 res=1
636 10:49:05.646047 [ 0.240719] thermal_sys: Registered thermal governor 'step_wise'
637 10:49:05.654464 [ 0.240750] thermal_sys: Registered thermal governor 'power_allocator'
638 10:49:05.654673 [ 0.241126] cpuidle: using governor menu
639 10:49:05.674569 [ 0.242951] hw-breakpoint: found 16 breakpoint and 16 watchpoint registers.
640 10:49:05.701309 [ 0.243774] ASID allocator initialised with 65536 entries
641 10:49:05.785085 [ 0.255317] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
642 10:49:05.810524 [ 0.257818] Serial: AMBA PL011 UART driver
643 10:49:05.896987 [ 0.263442] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
644 10:49:05.897201 [ 0.263531] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
645 10:49:05.897289 [ 0.263633] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
646 10:49:05.897630 [ 0.263721] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
647 10:49:05.897725 [ 0.263822] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
648 10:49:05.897806 [ 0.263910] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
649 10:49:05.898148 [ 0.264011] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
650 10:49:05.898245 [ 0.264099] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
651 10:49:06.039632 [ 0.274538] ACPI: Added _OSI(Module Device)
652 10:49:06.040118 [ 0.274616] ACPI: Added _OSI(Processor Device)
653 10:49:06.040234 [ 0.274695] ACPI: Added _OSI(3.0 _SCP Extensions)
654 10:49:06.040329 [ 0.274776] ACPI: Added _OSI(Processor Aggregator Device)
655 10:49:06.067435 [ 0.280097] ACPI: 4 ACPI AML tables successfully acquired and loaded
656 10:49:06.151624 [ 0.286361] ACPI: Interpreter enabled
657 10:49:06.152105 [ 0.286422] ACPI: Using GIC for interrupt routing
658 10:49:06.154415 [ 0.286664] ACPI: MCFG table detected, 1 entries
659 10:49:06.354151 [ 0.315582] ACPI: CPU0 has been hot-added
660 10:49:06.360841 [ 0.316509] ACPI: CPU1 has been hot-added
661 10:49:06.366750 [ 0.317420] ACPI: CPU2 has been hot-added
662 10:49:06.375174 [ 0.318348] ACPI: CPU3 has been hot-added
663 10:49:06.380771 [ 0.319261] ACPI: CPU4 has been hot-added
664 10:49:06.390253 [ 0.320237] ACPI: CPU5 has been hot-added
665 10:49:06.395835 [ 0.321164] ACPI: CPU6 has been hot-added
666 10:49:06.404233 [ 0.322082] ACPI: CPU7 has been hot-added
667 10:49:06.466202 [ 0.327259] ARMHB000:00: ttyAMA0 at MMIO 0x1c090000 (irq = 20, base_baud = 0) is a SBSA
668 10:49:06.470649 [ 0.327418] printk: legacy console [ttyAMA0] enabled
669 10:49:06.471112 [ 0.327418] printk: legacy console [ttyAMA0] enabled
670 10:49:06.471679 [ 0.327585] printk: legacy bootconsole [pl11] disabled
671 10:49:06.471760 [ 0.327585] printk: legacy bootconsole [pl11] disabled
672 10:49:06.612286 [ 0.336189] ARMHB000:01: ttyAMA1 at MMIO 0x1c0b0000 (irq = 21, base_baud = 0) is a SBSA
673 10:49:06.653823 [ 0.339655] ACPI: PCI: Interrupt link LNKA configured for IRQ 168
674 10:49:06.655375 [ 0.340098] ACPI: PCI: Interrupt link LNKB configured for IRQ 169
675 10:49:06.657046 [ 0.340538] ACPI: PCI: Interrupt link LNKC configured for IRQ 170
676 10:49:06.658135 [ 0.340983] ACPI: PCI: Interrupt link LNKD configured for IRQ 171
677 10:49:06.660478 [ 0.341641] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
678 10:49:06.661583 [ 0.341803] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI HPX-Type3]
679 10:49:06.679503 [ 0.343509] acpi PNP0A08:00: _OSC: platform does not support [LTR]
680 10:49:06.692063 [ 0.346452] acpi PNP0A08:00: _OSC: OS now controls [PME AER PCIeCapability]
681 10:49:06.701550 [ 0.348810] acpi PNP0A08:00: [Firmware Bug]: ECAM area [mem 0x40000000-0x4fffffff] not reserved in ACPI namespace
682 10:49:06.702601 [ 0.349038] acpi PNP0A08:00: ECAM at [mem 0x40000000-0x4fffffff] for [bus 00-ff]
683 10:49:06.706030 [ 0.349521] ACPI: Remapped I/O 0x000000005f800000 to [io 0x0000-0x7fffff window]
684 10:49:06.721326 [ 0.350436] PCI host bridge to bus 0000:00
685 10:49:06.721905 [ 0.350562] pci_bus 0000:00: root bus resource [mem 0x50000000-0x57ffffff window]
686 10:49:06.722063 [ 0.350697] pci_bus 0000:00: root bus resource [mem 0x4000000000-0x40ffffffff window]
687 10:49:06.722530 [ 0.350836] pci_bus 0000:00: root bus resource [io 0x0000-0x7fffff window]
688 10:49:06.722681 [ 0.350966] pci_bus 0000:00: root bus resource [bus 00-ff]
689 10:49:06.725924 [ 0.351162] pci 0000:00:00.0: [13b5:00ba] type 00 class 0x060001 PCIe Root Complex Integrated Endpoint
690 10:49:06.746973 [ 0.351331] pci 0000:00:00.0: BAR 0 [mem 0x5080e000-0x5080efff]
691 10:49:06.752461 [ 0.351504] pci 0000:00:00.0: enabling Extended Tags
692 10:49:06.757574 [ 0.351737] pci 0000:00:00.0: PME# supported from D3hot
693 10:49:06.768833 [ 0.352854] pci 0000:00:01.0: [13b5:0def] type 01 class 0x060400 PCIe Root Port
694 10:49:06.770470 [ 0.353015] pci 0000:00:01.0: BAR 0 [mem 0x5080d000-0x5080dfff]
695 10:49:06.771584 [ 0.353161] pci 0000:00:01.0: PCI bridge to [bus 01]
696 10:49:06.772763 [ 0.353278] pci 0000:00:01.0: bridge window [mem 0x50700000-0x507fffff]
697 10:49:06.773816 [ 0.353427] pci 0000:00:01.0: enabling Extended Tags
698 10:49:06.776798 [ 0.353664] pci 0000:00:01.0: PME# supported from D3hot
699 10:49:06.795421 [ 0.354859] pci 0000:00:02.0: [13b5:0def] type 01 class 0x060400 PCIe Root Port
700 10:49:06.799028 [ 0.355019] pci 0000:00:02.0: BAR 0 [mem 0x50808000-0x50808fff pref]
701 10:49:06.799830 [ 0.355169] pci 0000:00:02.0: PCI bridge to [bus 02]
702 10:49:06.799943 [ 0.355286] pci 0000:00:02.0: bridge window [mem 0x50600000-0x506fffff]
703 10:49:06.800943 [ 0.355434] pci 0000:00:02.0: enabling Extended Tags
704 10:49:06.805496 [ 0.355672] pci 0000:00:02.0: PME# supported from D3hot
705 10:49:06.813383 [ 0.356815] pci 0000:00:03.0: [13b5:0def] type 01 class 0x060400 PCIe Root Port
706 10:49:06.815001 [ 0.356976] pci 0000:00:03.0: BAR 0 [mem 0x50809000-0x50809fff pref]
707 10:49:06.816709 [ 0.357126] pci 0000:00:03.0: PCI bridge to [bus 03-07]
708 10:49:06.816917 [ 0.357247] pci 0000:00:03.0: bridge window [mem 0x50300000-0x505fffff]
709 10:49:06.817790 [ 0.357385] pci 0000:00:03.0: bridge window [mem 0x50000000-0x501fffff 64bit pref]
710 10:49:06.818181 [ 0.357530] pci 0000:00:03.0: enabling Extended Tags
711 10:49:06.820690 [ 0.357767] pci 0000:00:03.0: PME# supported from D3hot
712 10:49:06.841464 [ 0.358952] pci 0000:00:04.0: [13b5:0def] type 01 class 0x060400 PCIe Root Port
713 10:49:06.844201 [ 0.359113] pci 0000:00:04.0: BAR 0 [mem 0x5080a000-0x5080afff pref]
714 10:49:06.845254 [ 0.359263] pci 0000:00:04.0: PCI bridge to [bus 08]
715 10:49:06.845643 [ 0.359380] pci 0000:00:04.0: bridge window [mem 0x50200000-0x502fffff]
716 10:49:06.846363 [ 0.359528] pci 0000:00:04.0: enabling Extended Tags
717 10:49:06.850420 [ 0.359766] pci 0000:00:04.0: PME# supported from D3hot
718 10:49:06.858312 [ 0.361018] pci 0000:00:1e.0: [13b5:ff80] type 00 class 0xff0000 PCIe Root Complex Integrated Endpoint
719 10:49:06.860490 [ 0.361195] pci 0000:00:1e.0: BAR 0 [mem 0x4000040000-0x400007ffff 64bit]
720 10:49:06.861566 [ 0.361341] pci 0000:00:1e.0: BAR 2 [mem 0x4000088000-0x400008ffff 64bit]
721 10:49:06.862717 [ 0.361487] pci 0000:00:1e.0: BAR 4 [mem 0x4000091000-0x4000091fff 64bit]
722 10:49:06.863830 [ 0.361637] pci 0000:00:1e.0: enabling Extended Tags
723 10:49:06.866693 [ 0.361887] pci 0000:00:1e.0: PME# supported from D3hot
724 10:49:06.885785 [ 0.363041] pci 0000:00:1e.1: [13b5:ff80] type 00 class 0xff0000 PCIe Root Complex Integrated Endpoint
725 10:49:06.888528 [ 0.363218] pci 0000:00:1e.1: BAR 0 [mem 0x4000000000-0x400003ffff 64bit]
726 10:49:06.889794 [ 0.363364] pci 0000:00:1e.1: BAR 2 [mem 0x4000080000-0x4000087fff 64bit]
727 10:49:06.890941 [ 0.363508] pci 0000:00:1e.1: BAR 4 [mem 0x4000090000-0x4000090fff 64bit]
728 10:49:06.892454 [ 0.363660] pci 0000:00:1e.1: enabling Extended Tags
729 10:49:06.897027 [ 0.363911] pci 0000:00:1e.1: PME# supported from D3hot
730 10:49:06.905980 [ 0.365067] pci 0000:00:1f.0: [0abc:aced] type 00 class 0x010601 PCIe Root Complex Integrated Endpoint
731 10:49:06.907550 [ 0.365240] pci 0000:00:1f.0: BAR 0 [mem 0x50806000-0x50807fff]
732 10:49:06.908672 [ 0.365371] pci 0000:00:1f.0: BAR 1 [mem 0x50804000-0x50805fff]
733 10:49:06.909178 [ 0.365503] pci 0000:00:1f.0: BAR 2 [mem 0x5080c000-0x5080cfff]
734 10:49:06.910367 [ 0.365634] pci 0000:00:1f.0: BAR 3 [mem 0x50802000-0x50803fff]
735 10:49:06.910895 [ 0.365765] pci 0000:00:1f.0: BAR 4 [mem 0x5080b000-0x5080bfff]
736 10:49:06.912058 [ 0.365896] pci 0000:00:1f.0: BAR 5 [mem 0x50800000-0x50801fff]
737 10:49:06.918300 [ 0.366038] pci 0000:00:1f.0: enabling Extended Tags
738 10:49:06.925731 [ 0.366279] pci 0000:00:1f.0: PME# supported from D3hot
739 10:49:06.939175 [ 0.367758] pci 0000:01:00.0: [0abc:aced] type 00 class 0x010601 PCIe Endpoint
740 10:49:06.940799 [ 0.367917] pci 0000:01:00.0: BAR 0 [mem 0x50706000-0x50707fff]
741 10:49:06.941575 [ 0.368048] pci 0000:01:00.0: BAR 1 [mem 0x50704000-0x50705fff]
742 10:49:06.943058 [ 0.368180] pci 0000:01:00.0: BAR 2 [mem 0x50709000-0x50709fff]
743 10:49:06.943837 [ 0.368311] pci 0000:01:00.0: BAR 3 [mem 0x50702000-0x50703fff]
744 10:49:06.945040 [ 0.368442] pci 0000:01:00.0: BAR 4 [mem 0x50708000-0x50708fff]
745 10:49:06.945885 [ 0.368574] pci 0000:01:00.0: BAR 5 [mem 0x50700000-0x50701fff]
746 10:49:06.947044 [ 0.368716] pci 0000:01:00.0: enabling Extended Tags
747 10:49:06.948759 [ 0.368956] pci 0000:01:00.0: PME# supported from D3hot
748 10:49:06.970715 [ 0.370502] pci 0000:02:00.0: [13b5:ff80] type 00 class 0xff0000 PCIe Endpoint
749 10:49:06.973452 [ 0.370665] pci 0000:02:00.0: BAR 0 [mem 0x50600000-0x5063ffff 64bit]
750 10:49:06.974798 [ 0.370807] pci 0000:02:00.0: BAR 2 [mem 0x50680000-0x50687fff 64bit]
751 10:49:06.975970 [ 0.370949] pci 0000:02:00.0: BAR 4 [mem 0x50690000-0x50690fff 64bit]
752 10:49:06.976808 [ 0.371096] pci 0000:02:00.0: enabling Extended Tags
753 10:49:06.978542 [ 0.371346] pci 0000:02:00.0: PME# supported from D3hot
754 10:49:06.988780 [ 0.372508] pci 0000:02:00.4: [13b5:ff80] type 00 class 0xff0000 PCIe Endpoint
755 10:49:06.990590 [ 0.372672] pci 0000:02:00.4: BAR 0 [mem 0x50640000-0x5067ffff 64bit]
756 10:49:06.991671 [ 0.372813] pci 0000:02:00.4: BAR 2 [mem 0x50688000-0x5068ffff 64bit]
757 10:49:06.992821 [ 0.372955] pci 0000:02:00.4: BAR 4 [mem 0x50691000-0x50691fff 64bit]
758 10:49:06.993234 [ 0.373100] pci 0000:02:00.4: enabling Extended Tags
759 10:49:06.995464 [ 0.373352] pci 0000:02:00.4: PME# supported from D3hot
760 10:49:07.015755 [ 0.374942] pci 0000:03:00.0: [13b5:0def] type 01 class 0x060400 PCIe Switch Upstream Port
761 10:49:07.017815 [ 0.375110] pci 0000:03:00.0: BAR 0 [mem 0x50100000-0x50100fff pref]
762 10:49:07.018885 [ 0.375259] pci 0000:03:00.0: PCI bridge to [bus 04-07]
763 10:49:07.019312 [ 0.375380] pci 0000:03:00.0: bridge window [mem 0x50300000-0x505fffff]
764 10:49:07.020026 [ 0.375518] pci 0000:03:00.0: bridge window [mem 0x50000000-0x500fffff 64bit pref]
765 10:49:07.020377 [ 0.375667] pci 0000:03:00.0: enabling Extended Tags
766 10:49:07.023446 [ 0.375905] pci 0000:03:00.0: PME# supported from D3hot
767 10:49:07.035223 [ 0.377451] pci 0000:04:00.0: [13b5:0def] type 01 class 0x060400 PCIe Switch Downstream Port
768 10:49:07.037261 [ 0.377619] pci 0000:04:00.0: BAR 0 [mem 0x50002000-0x50002fff pref]
769 10:49:07.038429 [ 0.377769] pci 0000:04:00.0: PCI bridge to [bus 05]
770 10:49:07.038782 [ 0.377886] pci 0000:04:00.0: bridge window [mem 0x50500000-0x505fffff]
771 10:49:07.039533 [ 0.378038] pci 0000:04:00.0: enabling Extended Tags
772 10:49:07.048098 [ 0.378276] pci 0000:04:00.0: PME# supported from D3hot
773 10:49:07.057621 [ 0.379444] pci 0000:04:01.0: [13b5:0def] type 01 class 0x060400 PCIe Switch Downstream Port
774 10:49:07.061179 [ 0.379613] pci 0000:04:01.0: BAR 0 [mem 0x50001000-0x50001fff pref]
775 10:49:07.063155 [ 0.379762] pci 0000:04:01.0: PCI bridge to [bus 06]
776 10:49:07.064847 [ 0.379879] pci 0000:04:01.0: bridge window [mem 0x50400000-0x504fffff]
777 10:49:07.065923 [ 0.380032] pci 0000:04:01.0: enabling Extended Tags
778 10:49:07.068795 [ 0.380270] pci 0000:04:01.0: PME# supported from D3hot
779 10:49:07.076733 [ 0.381426] pci 0000:04:02.0: [13b5:0def] type 01 class 0x060400 PCIe Switch Downstream Port
780 10:49:07.078901 [ 0.381595] pci 0000:04:02.0: BAR 0 [mem 0x50000000-0x50000fff pref]
781 10:49:07.080213 [ 0.381744] pci 0000:04:02.0: PCI bridge to [bus 07]
782 10:49:07.080340 [ 0.381861] pci 0000:04:02.0: bridge window [mem 0x50300000-0x503fffff]
783 10:49:07.081087 [ 0.382014] pci 0000:04:02.0: enabling Extended Tags
784 10:49:07.089100 [ 0.382250] pci 0000:04:02.0: PME# supported from D3hot
785 10:49:07.105329 [ 0.383893] pci 0000:05:00.0: [0abc:aced] type 00 class 0x010601 PCIe Endpoint
786 10:49:07.107486 [ 0.384052] pci 0000:05:00.0: BAR 0 [mem 0x50506000-0x50507fff]
787 10:49:07.107946 [ 0.384183] pci 0000:05:00.0: BAR 1 [mem 0x50504000-0x50505fff]
788 10:49:07.109349 [ 0.384315] pci 0000:05:00.0: BAR 2 [mem 0x50509000-0x50509fff]
789 10:49:07.109704 [ 0.384445] pci 0000:05:00.0: BAR 3 [mem 0x50502000-0x50503fff]
790 10:49:07.111029 [ 0.384578] pci 0000:05:00.0: BAR 4 [mem 0x50508000-0x50508fff]
791 10:49:07.111937 [ 0.384709] pci 0000:05:00.0: BAR 5 [mem 0x50500000-0x50501fff]
792 10:49:07.112470 [ 0.384851] pci 0000:05:00.0: enabling Extended Tags
793 10:49:07.115308 [ 0.385092] pci 0000:05:00.0: PME# supported from D3hot
794 10:49:07.140628 [ 0.386694] pci 0000:06:00.0: [13b5:ff80] type 00 class 0xff0000 PCIe Endpoint
795 10:49:07.142703 [ 0.386857] pci 0000:06:00.0: BAR 0 [mem 0x50400000-0x5043ffff 64bit]
796 10:49:07.144362 [ 0.386999] pci 0000:06:00.0: BAR 2 [mem 0x50480000-0x50487fff 64bit]
797 10:49:07.145459 [ 0.387141] pci 0000:06:00.0: BAR 4 [mem 0x50490000-0x50490fff 64bit]
798 10:49:07.146572 [ 0.387288] pci 0000:06:00.0: enabling Extended Tags
799 10:49:07.148922 [ 0.387538] pci 0000:06:00.0: PME# supported from D3hot
800 10:49:07.159589 [ 0.388750] pci 0000:06:00.7: [13b5:ff80] type 00 class 0xff0000 PCIe Endpoint
801 10:49:07.162340 [ 0.388914] pci 0000:06:00.7: BAR 0 [mem 0x50440000-0x5047ffff 64bit]
802 10:49:07.163377 [ 0.389056] pci 0000:06:00.7: BAR 2 [mem 0x50488000-0x5048ffff 64bit]
803 10:49:07.164505 [ 0.389197] pci 0000:06:00.7: BAR 4 [mem 0x50491000-0x50491fff 64bit]
804 10:49:07.165639 [ 0.389344] pci 0000:06:00.7: enabling Extended Tags
805 10:49:07.168554 [ 0.389595] pci 0000:06:00.7: PME# supported from D3hot
806 10:49:07.189820 [ 0.391218] pci 0000:07:00.0: [13b5:ff80] type 00 class 0xff0000 PCIe Endpoint
807 10:49:07.191940 [ 0.391381] pci 0000:07:00.0: BAR 0 [mem 0x50300000-0x5033ffff 64bit]
808 10:49:07.193017 [ 0.391523] pci 0000:07:00.0: BAR 2 [mem 0x50380000-0x50387fff 64bit]
809 10:49:07.194972 [ 0.391664] pci 0000:07:00.0: BAR 4 [mem 0x50390000-0x50390fff 64bit]
810 10:49:07.195825 [ 0.391811] pci 0000:07:00.0: enabling Extended Tags
811 10:49:07.199346 [ 0.392062] pci 0000:07:00.0: PME# supported from D3hot
812 10:49:07.207236 [ 0.393214] pci 0000:07:00.3: [13b5:ff80] type 00 class 0xff0000 PCIe Endpoint
813 10:49:07.208802 [ 0.393378] pci 0000:07:00.3: BAR 0 [mem 0x50340000-0x5037ffff 64bit]
814 10:49:07.210494 [ 0.393519] pci 0000:07:00.3: BAR 2 [mem 0x50388000-0x5038ffff 64bit]
815 10:49:07.211602 [ 0.393661] pci 0000:07:00.3: BAR 4 [mem 0x50391000-0x50391fff 64bit]
816 10:49:07.212736 [ 0.393808] pci 0000:07:00.3: enabling Extended Tags
817 10:49:07.215090 [ 0.394057] pci 0000:07:00.3: PME# supported from D3hot
818 10:49:07.241381 [ 0.395892] pci 0000:08:00.0: [13b5:ff80] type 00 class 0xff0000 PCIe Endpoint
819 10:49:07.243425 [ 0.396056] pci 0000:08:00.0: BAR 0 [mem 0x50200000-0x5023ffff 64bit]
820 10:49:07.244521 [ 0.396198] pci 0000:08:00.0: BAR 2 [mem 0x50280000-0x50287fff 64bit]
821 10:49:07.245640 [ 0.396339] pci 0000:08:00.0: BAR 4 [mem 0x50290000-0x50290fff 64bit]
822 10:49:07.246786 [ 0.396486] pci 0000:08:00.0: enabling Extended Tags
823 10:49:07.249081 [ 0.396737] pci 0000:08:00.0: PME# supported from D3hot
824 10:49:07.257520 [ 0.397889] pci 0000:08:00.1: [13b5:ff80] type 00 class 0xff0000 PCIe Endpoint
825 10:49:07.259697 [ 0.398052] pci 0000:08:00.1: BAR 0 [mem 0x50240000-0x5027ffff 64bit]
826 10:49:07.265803 [ 0.398194] pci 0000:08:00.1: BAR 2 [mem 0x50288000-0x5028ffff 64bit]
827 10:49:07.268050 [ 0.398336] pci 0000:08:00.1: BAR 4 [mem 0x50291000-0x50291fff 64bit]
828 10:49:07.268624 [ 0.398482] pci 0000:08:00.1: enabling Extended Tags
829 10:49:07.274303 [ 0.398759] pci 0000:08:00.1: PME# supported from D3hot
830 10:49:07.289349 [ 0.400351] pci 0000:00:01.0: bridge window [mem 0x50000000-0x500fffff]: assigned
831 10:49:07.289825 [ 0.400490] pci 0000:00:02.0: bridge window [mem 0x50100000-0x501fffff]: assigned
832 10:49:07.290328 [ 0.400629] pci 0000:00:03.0: bridge window [mem 0x50200000-0x506fffff]: assigned
833 10:49:07.290428 [ 0.400769] pci 0000:00:04.0: bridge window [mem 0x50700000-0x507fffff]: assigned
834 10:49:07.290884 [ 0.400914] pci 0000:00:1e.0: BAR 0 [mem 0x4000000000-0x400003ffff 64bit]: assigned
835 10:49:07.292715 [ 0.401073] pci 0000:00:1e.1: BAR 0 [mem 0x4000040000-0x400007ffff 64bit]: assigned
836 10:49:07.294019 [ 0.401233] pci 0000:00:1e.0: BAR 2 [mem 0x4000080000-0x4000087fff 64bit]: assigned
837 10:49:07.295455 [ 0.401393] pci 0000:00:1e.1: BAR 2 [mem 0x4000088000-0x400008ffff 64bit]: assigned
838 10:49:07.296823 [ 0.401548] pci 0000:00:1f.0: BAR 0 [mem 0x50800000-0x50801fff]: assigned
839 10:49:07.297938 [ 0.401687] pci 0000:00:1f.0: BAR 1 [mem 0x50802000-0x50803fff]: assigned
840 10:49:07.298871 [ 0.401826] pci 0000:00:1f.0: BAR 3 [mem 0x50804000-0x50805fff]: assigned
841 10:49:07.299464 [ 0.401966] pci 0000:00:1f.0: BAR 5 [mem 0x50806000-0x50807fff]: assigned
842 10:49:07.300833 [ 0.402105] pci 0000:00:01.0: BAR 0 [mem 0x50808000-0x50808fff]: assigned
843 10:49:07.307338 [ 0.402248] pci 0000:00:02.0: BAR 0 [mem 0x50809000-0x50809fff pref]: assigned
844 10:49:07.309044 [ 0.402395] pci 0000:00:03.0: BAR 0 [mem 0x5080a000-0x5080afff pref]: assigned
845 10:49:07.311953 [ 0.402542] pci 0000:00:04.0: BAR 0 [mem 0x5080b000-0x5080bfff pref]: assigned
846 10:49:07.313582 [ 0.402717] pci 0000:00:1e.0: BAR 4 [mem 0x4000090000-0x4000090fff 64bit]: assigned
847 10:49:07.315233 [ 0.402878] pci 0000:00:1e.1: BAR 4 [mem 0x4000091000-0x4000091fff 64bit]: assigned
848 10:49:07.316385 [ 0.403035] pci 0000:00:1f.0: BAR 2 [mem 0x5080c000-0x5080cfff]: assigned
849 10:49:07.316934 [ 0.403176] pci 0000:00:1f.0: BAR 4 [mem 0x5080d000-0x5080dfff]: assigned
850 10:49:07.319325 [ 0.403358] pci 0000:01:00.0: BAR 0 [mem 0x50000000-0x50001fff]: assigned
851 10:49:07.320059 [ 0.403495] pci 0000:01:00.0: BAR 1 [mem 0x50002000-0x50003fff]: assigned
852 10:49:07.321205 [ 0.403633] pci 0000:01:00.0: BAR 3 [mem 0x50004000-0x50005fff]: assigned
853 10:49:07.321532 [ 0.403770] pci 0000:01:00.0: BAR 5 [mem 0x50006000-0x50007fff]: assigned
854 10:49:07.324670 [ 0.403910] pci 0000:01:00.0: BAR 2 [mem 0x50008000-0x50008fff]: assigned
855 10:49:07.325123 [ 0.404049] pci 0000:01:00.0: BAR 4 [mem 0x50009000-0x50009fff]: assigned
856 10:49:07.326085 [ 0.404189] pci 0000:00:01.0: PCI bridge to [bus 01]
857 10:49:07.326634 [ 0.404299] pci 0000:00:01.0: bridge window [mem 0x50000000-0x500fffff]
858 10:49:07.328392 [ 0.404476] pci 0000:02:00.0: BAR 0 [mem 0x50100000-0x5013ffff 64bit]: assigned
859 10:49:07.329574 [ 0.404630] pci 0000:02:00.4: BAR 0 [mem 0x50140000-0x5017ffff 64bit]: assigned
860 10:49:07.330916 [ 0.404786] pci 0000:02:00.0: BAR 2 [mem 0x50180000-0x50187fff 64bit]: assigned
861 10:49:07.331984 [ 0.404941] pci 0000:02:00.4: BAR 2 [mem 0x50188000-0x5018ffff 64bit]: assigned
862 10:49:07.332905 [ 0.405097] pci 0000:02:00.0: BAR 4 [mem 0x50190000-0x50190fff 64bit]: assigned
863 10:49:07.334014 [ 0.405253] pci 0000:02:00.4: BAR 4 [mem 0x50191000-0x50191fff 64bit]: assigned
864 10:49:07.335127 [ 0.405406] pci 0000:00:02.0: PCI bridge to [bus 02]
865 10:49:07.335690 [ 0.405517] pci 0000:00:02.0: bridge window [mem 0x50100000-0x501fffff]
866 10:49:07.337411 [ 0.405672] pci 0000:03:00.0: bridge window [mem 0x50200000-0x505fffff]: assigned
867 10:49:07.337504 [ 0.405812] pci 0000:03:00.0: BAR 0 [mem 0x50600000-0x50600fff pref]: assigned
868 10:49:07.338522 [ 0.405987] pci 0000:04:00.0: bridge window [mem 0x50200000-0x502fffff]: assigned
869 10:49:07.339070 [ 0.406126] pci 0000:04:01.0: bridge window [mem 0x50300000-0x503fffff]: assigned
870 10:49:07.343670 [ 0.406265] pci 0000:04:02.0: bridge window [mem 0x50400000-0x504fffff]: assigned
871 10:49:07.344383 [ 0.406405] pci 0000:04:00.0: BAR 0 [mem 0x50500000-0x50500fff pref]: assigned
872 10:49:07.345936 [ 0.406549] pci 0000:04:01.0: BAR 0 [mem 0x50501000-0x50501fff pref]: assigned
873 10:49:07.349320 [ 0.406721] pci 0000:04:02.0: BAR 0 [mem 0x50502000-0x50502fff pref]: assigned
874 10:49:07.350380 [ 0.406891] pci 0000:05:00.0: BAR 0 [mem 0x50200000-0x50201fff]: assigned
875 10:49:07.351495 [ 0.407027] pci 0000:05:00.0: BAR 1 [mem 0x50202000-0x50203fff]: assigned
876 10:49:07.352283 [ 0.407167] pci 0000:05:00.0: BAR 3 [mem 0x50204000-0x50205fff]: assigned
877 10:49:07.352628 [ 0.407306] pci 0000:05:00.0: BAR 5 [mem 0x50206000-0x50207fff]: assigned
878 10:49:07.353773 [ 0.407444] pci 0000:05:00.0: BAR 2 [mem 0x50208000-0x50208fff]: assigned
879 10:49:07.354586 [ 0.407583] pci 0000:05:00.0: BAR 4 [mem 0x50209000-0x50209fff]: assigned
880 10:49:07.354950 [ 0.407724] pci 0000:04:00.0: PCI bridge to [bus 05]
881 10:49:07.355459 [ 0.407834] pci 0000:04:00.0: bridge window [mem 0x50200000-0x502fffff]
882 10:49:07.357812 [ 0.408010] pci 0000:06:00.0: BAR 0 [mem 0x50300000-0x5033ffff 64bit]: assigned
883 10:49:07.360050 [ 0.408165] pci 0000:06:00.7: BAR 0 [mem 0x50340000-0x5037ffff 64bit]: assigned
884 10:49:07.361129 [ 0.408321] pci 0000:06:00.0: BAR 2 [mem 0x50380000-0x50387fff 64bit]: assigned
885 10:49:07.362248 [ 0.408476] pci 0000:06:00.7: BAR 2 [mem 0x50388000-0x5038ffff 64bit]: assigned
886 10:49:07.363387 [ 0.408632] pci 0000:06:00.0: BAR 4 [mem 0x50390000-0x50390fff 64bit]: assigned
887 10:49:07.364757 [ 0.408788] pci 0000:06:00.7: BAR 4 [mem 0x50391000-0x50391fff 64bit]: assigned
888 10:49:07.365648 [ 0.408942] pci 0000:04:01.0: PCI bridge to [bus 06]
889 10:49:07.366443 [ 0.409053] pci 0000:04:01.0: bridge window [mem 0x50300000-0x503fffff]
890 10:49:07.367372 [ 0.409229] pci 0000:07:00.0: BAR 0 [mem 0x50400000-0x5043ffff 64bit]: assigned
891 10:49:07.369102 [ 0.409384] pci 0000:07:00.3: BAR 0 [mem 0x50440000-0x5047ffff 64bit]: assigned
892 10:49:07.370212 [ 0.409539] pci 0000:07:00.0: BAR 2 [mem 0x50480000-0x50487fff 64bit]: assigned
893 10:49:07.371371 [ 0.409695] pci 0000:07:00.3: BAR 2 [mem 0x50488000-0x5048ffff 64bit]: assigned
894 10:49:07.372492 [ 0.409851] pci 0000:07:00.0: BAR 4 [mem 0x50490000-0x50490fff 64bit]: assigned
895 10:49:07.373629 [ 0.410007] pci 0000:07:00.3: BAR 4 [mem 0x50491000-0x50491fff 64bit]: assigned
896 10:49:07.374819 [ 0.410160] pci 0000:04:02.0: PCI bridge to [bus 07]
897 10:49:07.380426 [ 0.410271] pci 0000:04:02.0: bridge window [mem 0x50400000-0x504fffff]
898 10:49:07.382770 [ 0.410410] pci 0000:03:00.0: PCI bridge to [bus 04-07]
899 10:49:07.383511 [ 0.410524] pci 0000:03:00.0: bridge window [mem 0x50200000-0x505fffff]
900 10:49:07.386745 [ 0.410663] pci 0000:00:03.0: PCI bridge to [bus 03-07]
901 10:49:07.388065 [ 0.410804] pci 0000:00:03.0: bridge window [mem 0x50200000-0x506fffff]
902 10:49:07.389792 [ 0.410980] pci 0000:08:00.0: BAR 0 [mem 0x50700000-0x5073ffff 64bit]: assigned
903 10:49:07.390907 [ 0.411135] pci 0000:08:00.1: BAR 0 [mem 0x50740000-0x5077ffff 64bit]: assigned
904 10:49:07.392055 [ 0.411290] pci 0000:08:00.0: BAR 2 [mem 0x50780000-0x50787fff 64bit]: assigned
905 10:49:07.393214 [ 0.411445] pci 0000:08:00.1: BAR 2 [mem 0x50788000-0x5078ffff 64bit]: assigned
906 10:49:07.394337 [ 0.411601] pci 0000:08:00.0: BAR 4 [mem 0x50790000-0x50790fff 64bit]: assigned
907 10:49:07.395261 [ 0.411757] pci 0000:08:00.1: BAR 4 [mem 0x50791000-0x50791fff 64bit]: assigned
908 10:49:07.396402 [ 0.411910] pci 0000:00:04.0: PCI bridge to [bus 08]
909 10:49:07.398734 [ 0.412021] pci 0000:00:04.0: bridge window [mem 0x50700000-0x507fffff]
910 10:49:07.400406 [ 0.412164] pci_bus 0000:00: resource 4 [mem 0x50000000-0x57ffffff window]
911 10:49:07.401182 [ 0.412298] pci_bus 0000:00: resource 5 [mem 0x4000000000-0x40ffffffff window]
912 10:49:07.401291 [ 0.412435] pci_bus 0000:00: resource 6 [io 0x0000-0x7fffff window]
913 10:49:07.401408 [ 0.412561] pci_bus 0000:01: resource 1 [mem 0x50000000-0x500fffff]
914 10:49:07.401537 [ 0.412690] pci_bus 0000:02: resource 1 [mem 0x50100000-0x501fffff]
915 10:49:07.401632 [ 0.412818] pci_bus 0000:03: resource 1 [mem 0x50200000-0x506fffff]
916 10:49:07.402331 [ 0.412946] pci_bus 0000:04: resource 1 [mem 0x50200000-0x505fffff]
917 10:49:07.402427 [ 0.413074] pci_bus 0000:05: resource 1 [mem 0x50200000-0x502fffff]
918 10:49:07.402760 [ 0.413202] pci_bus 0000:06: resource 1 [mem 0x50300000-0x503fffff]
919 10:49:07.402857 [ 0.413331] pci_bus 0000:07: resource 1 [mem 0x50400000-0x504fffff]
920 10:49:07.403240 [ 0.413459] pci_bus 0000:08: resource 1 [mem 0x50700000-0x507fffff]
921 10:49:07.498074 [ 0.421293] iommu: Default domain type: Translated
922 10:49:07.498272 [ 0.421372] iommu: DMA domain TLB invalidation policy: strict mode
923 10:49:07.576161 [ 0.424105] SCSI subsystem initialized
924 10:49:07.594555 [ 0.424720] libata version 3.00 loaded.
925 10:49:07.605138 [ 0.425592] ACPI: bus type USB registered
926 10:49:07.608990 [ 0.426007] usbcore: registered new interface driver usbfs
927 10:49:07.611198 [ 0.426245] usbcore: registered new interface driver hub
928 10:49:07.620788 [ 0.426483] usbcore: registered new device driver usb
929 10:49:07.642569 [ 0.428593] pps_core: LinuxPPS API ver. 1 registered
930 10:49:07.642782 [ 0.428670] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
931 10:49:07.643512 [ 0.428825] PTP clock support registered
932 10:49:07.648610 [ 0.429316] EDAC MC: Ver: 3.0.0
933 10:49:07.683191 [ 0.431217] scmi_core: SCMI protocol bus registered
934 10:49:07.699832 [ 0.432179] efivars: Registered efivars operations
935 10:49:07.758780 [ 0.435941] FPGA manager framework
936 10:49:07.767734 [ 0.436478] Advanced Linux Sound Architecture Driver Initialized.
937 10:49:07.829710 [ 0.442678] vgaarb: loaded
938 10:49:07.889386 [ 0.444392] clocksource: Switched to clocksource arch_sys_counter
939 10:49:07.917591 [ 0.445617] VFS: Disk quotas dquot_6.6.0
940 10:49:07.919499 [ 0.445762] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
941 10:49:08.003684 [ 0.447417] pnp: PnP ACPI init
942 10:49:08.014845 [ 0.448470] pnp: PnP ACPI: found 0 devices
943 10:49:08.699530 [ 0.486022] NET: Registered PF_INET protocol family
944 10:49:08.762287 [ 0.486457] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
945 10:49:08.811223 [ 0.537914] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
946 10:49:08.812180 [ 0.538429] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
947 10:49:08.812731 [ 0.538589] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
948 10:49:08.819495 [ 0.541403] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
949 10:49:08.830619 [ 0.546478] TCP: Hash tables configured (established 32768 bind 32768)
950 10:49:08.847338 [ 0.546796] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
951 10:49:08.848926 [ 0.547455] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
952 10:49:08.856780 [ 0.548536] NET: Registered PF_UNIX/PF_LOCAL protocol family
953 10:49:08.896962 [ 0.550094] RPC: Registered named UNIX socket transport module.
954 10:49:08.897441 [ 0.550177] RPC: Registered udp transport module.
955 10:49:08.897544 [ 0.550252] RPC: Registered tcp transport module.
956 10:49:08.897649 [ 0.550326] RPC: Registered tcp-with-tls transport module.
957 10:49:08.898244 [ 0.550407] RPC: Registered tcp NFSv4.1 backchannel transport module.
958 10:49:08.900277 [ 0.551590] PCI: CLS 0 bytes, default 64
959 10:49:09.036574 [ 0.586512] kvm [1]: nv: 554 coarse grained trap handlers
960 10:49:09.045375 [ 0.590762] kvm [1]: nv: 669 fine grained trap handlers
961 10:49:09.052624 [ 0.594524] kvm [1]: IPA Size Limit: 40 bits
962 10:49:09.062190 [ 0.594646] kvm [1]: GICv3: no GICV resource entry
963 10:49:09.062725 [ 0.594723] kvm [1]: disabling GICv2 emulation
964 10:49:09.066681 [ 0.594862] kvm [1]: GIC system register CPU interface enabled
965 10:49:09.069400 [ 0.594973] kvm [1]: vgic interrupt IRQ9
966 10:49:09.073916 [ 0.595164] kvm [1]: VHE mode initialized successfully
967 10:49:09.173542 [ 0.603012] Initialise system trusted keyrings
968 10:49:09.191310 [ 0.603580] workingset: timestamp_bits=42 max_order=20 bucket_order=0
969 10:49:09.203559 [ 0.605306] squashfs: version 4.0 (2009/01/31) Phillip Lougher
970 10:49:09.224641 [ 0.606530] NFS: Registering the id_resolver key type
971 10:49:09.225636 [ 0.606669] Key type id_resolver registered
972 10:49:09.225789 [ 0.606743] Key type id_legacy registered
973 10:49:09.227332 [ 0.606890] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
974 10:49:09.227490 [ 0.606996] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
975 10:49:09.238677 [ 0.607623] 9p: Installing v9fs 9p2000 file system support
976 10:49:09.700890 [ 1.311526] Key type asymmetric registered
977 10:49:09.701138 [ 1.311602] Asymmetric key parser 'x509' registered
978 10:49:09.704891 [ 1.311862] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
979 10:49:09.705231 [ 1.311960] io scheduler mq-deadline registered
980 10:49:09.705319 [ 1.312039] io scheduler kyber registered
981 10:49:09.707417 [ 1.312235] io scheduler bfq registered
982 10:49:10.052303 [ 1.346825] ledtrig-cpu: registered to indicate activity on CPUs
983 10:49:10.289363 [ 1.366566] ACPI GTDT: found 1 SBSA generic Watchdog(s).
984 10:49:10.939572 [ 1.454828] virtio-mmio LNRO0005:00: Failed to enable 64-bit or 32-bit DMA. Trying to continue, but this might not work.
985 10:49:11.295349 [ 1.483944] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
986 10:49:11.433864 [ 1.500947] msm_serial: driver initialized
987 10:49:11.446208 [ 1.502276] SuperH (H)SCI(F) driver initialized
988 10:49:11.449945 [ 1.502737] STM32 USART driver initialized
989 10:49:11.523319 [ 1.512206] arm-smmu-v3 arm-smmu-v3.0.auto: option mask 0x0
990 10:49:11.529388 [ 1.512457] arm-smmu-v3 arm-smmu-v3.0.auto: IDR0.HTTU features(0x600000) overridden by FW configuration (0x0)
991 10:49:11.529887 [ 1.512597] arm-smmu-v3 arm-smmu-v3.0.auto: ias 48-bit, oas 48-bit (features 0x001c1fef)
992 10:49:11.652297 [ 1.514521] arm-smmu-v3 arm-smmu-v3.0.auto: allocated 65536 entries for cmdq
993 10:49:11.767922 [ 1.515509] arm-smmu-v3 arm-smmu-v3.0.auto: allocated 32768 entries for evtq
994 10:49:11.768386 [ 1.515629] arm-smmu-v3 arm-smmu-v3.0.auto: 2-level strtab only covers 25/32 bits of SID
995 10:49:12.086416 [ 1.517408] arm-smmu-v3 arm-smmu-v3.0.auto: msi_domain absent - falling back to wired irqs
996 10:49:12.513906 [ 1.557244] loop: module loaded
997 10:49:12.517290 [ 1.557456] virtio_blk virtio0: 1/0/0 default/read/poll queues
998 10:49:12.552337 [ 1.558249] virtio_blk virtio0: [vda] 1953125 512-byte logical blocks (1.00 GB/954 MiB)
999 10:49:12.629281 [ 1.563326] vda: vda1
1000 10:49:12.685045 [ 1.568893] megasas: 07.727.03.00-rc1
1001 10:49:12.718958 [ 1.572336] ahci 0000:00:1f.0: Adding to iommu group 0
1002 10:49:12.731221 [ 1.573260] ahci 0000:00:1f.0: can't derive routing for PCI INT A
1003 10:49:12.731818 [ 1.573364] ahci 0000:00:1f.0: PCI INT A: no GSI
1004 10:49:12.732149 [ 1.573490] ahci 0000:00:1f.0: version 3.0
1005 10:49:12.732729 [ 1.573596] ahci 0000:00:1f.0: enabling device (0000 -> 0002)
1006 10:49:12.786972 [ 1.574410] ahci 0000:00:1f.0: AHCI vers 0001.0301, 32 command slots, 6 Gbps, SATA mode
1007 10:49:12.787299 [ 1.574561] ahci 0000:00:1f.0: 1/1 ports implemented (port mask 0x1)
1008 10:49:12.787822 [ 1.574679] ahci 0000:00:1f.0: flags: 64bit ncq only
1009 10:49:12.853463 [ 1.577883] scsi host0: ahci
1010 10:49:12.863991 [ 1.578946] ata1: SATA max UDMA/133 abar m8192@0x50806000 port 0x50806100 irq 23 lpm-pol 0
1011 10:49:12.896384 [ 1.580284] ahci 0000:01:00.0: Adding to iommu group 1
1012 10:49:12.906007 [ 1.581272] pci 0000:00:01.0: can't derive routing for PCI INT A
1013 10:49:12.906237 [ 1.581376] ahci 0000:01:00.0: PCI INT A: no GSI
1014 10:49:12.907012 [ 1.581529] ahci 0000:01:00.0: enabling device (0000 -> 0002)
1015 10:49:12.928018 [ 1.582262] ahci 0000:01:00.0: AHCI vers 0001.0301, 32 command slots, 6 Gbps, SATA mode
1016 10:49:12.928473 [ 1.582413] ahci 0000:01:00.0: 1/1 ports implemented (port mask 0x1)
1017 10:49:12.928574 [ 1.582531] ahci 0000:01:00.0: flags: 64bit ncq only
1018 10:49:12.997091 [ 1.585773] scsi host1: ahci
1019 10:49:13.007149 [ 1.586833] ata2: SATA max UDMA/133 abar m8192@0x50006000 port 0x50006100 irq 24 lpm-pol 0
1020 10:49:13.063399 [ 1.588599] ahci 0000:05:00.0: Adding to iommu group 2
1021 10:49:13.071270 [ 1.589728] pci 0000:00:03.0: can't derive routing for PCI INT A
1022 10:49:13.071967 [ 1.589832] ahci 0000:05:00.0: PCI INT A: no GSI
1023 10:49:13.072423 [ 1.590011] ahci 0000:05:00.0: enabling device (0000 -> 0002)
1024 10:49:13.090866 [ 1.590755] ahci 0000:05:00.0: AHCI vers 0001.0301, 32 command slots, 6 Gbps, SATA mode
1025 10:49:13.091130 [ 1.590906] ahci 0000:05:00.0: 1/1 ports implemented (port mask 0x1)
1026 10:49:13.091614 [ 1.591024] ahci 0000:05:00.0: flags: 64bit ncq only
1027 10:49:13.155353 [ 1.594311] scsi host2: ahci
1028 10:49:13.164768 [ 1.595379] ata3: SATA max UDMA/133 abar m8192@0x50206000 port 0x50206100 irq 25 lpm-pol 0
1029 10:49:13.426154 [ 1.629260] tun: Universal TUN/TAP device driver, 1.6
1030 10:49:13.467768 [ 1.632731] thunder_xcv, ver 1.0
1031 10:49:13.470422 [ 1.632982] thunder_bgx, ver 1.0
1032 10:49:13.473198 [ 1.633235] nicpf, ver 1.0
1033 10:49:13.519209 [ 1.639034] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
1034 10:49:13.519685 [ 1.639132] hns3: Copyright (c) 2017 Huawei Corporation.
1035 10:49:13.523600 [ 1.639491] hclge is initializing
1036 10:49:13.524692 [ 1.639670] e1000: Intel(R) PRO/1000 Network Driver
1037 10:49:13.524771 [ 1.639747] e1000: Copyright (c) 1999-2006 Intel Corporation.
1038 10:49:13.527471 [ 1.640088] e1000e: Intel(R) PRO/1000 Network Driver
1039 10:49:13.528236 [ 1.640160] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
1040 10:49:13.535453 [ 1.640694] igb: Intel(R) Gigabit Ethernet Network Driver
1041 10:49:13.535593 [ 1.640775] igb: Copyright (c) 2007-2014 Intel Corporation.
1042 10:49:13.538202 [ 1.641111] igbvf: Intel(R) Gigabit Virtual Function Network Driver
1043 10:49:13.538745 [ 1.641198] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
1044 10:49:13.550614 [ 1.642733] sky2: driver version 1.30
1045 10:49:13.573784 [ 1.645511] smc91x LNRO0003:00 (unnamed net_device) (uninitialized): smc91x: IOADDR 00000000ca9b0381 doesn't match configuration (300).
1046 10:49:13.574017 [ 1.645669] smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@fluxnic.net>
1047 10:49:13.623508 [ 1.662911] smc91x LNRO0003:00 eth0: SMC91C11xFD (rev 1) at 00000000ca9b0381 IRQ 18
1048 10:49:13.624064 [ 1.663046] [nowait]
1049 10:49:13.624558 [ 1.663120] smc91x LNRO0003:00 eth0: Ethernet addr: 00:02:f7:ef:00:03
1050 10:49:13.671105 [ 1.666568] VFIO - User Level meta-driver version: 0.3
1051 10:49:13.772861 [ 1.679098] usbcore: registered new interface driver usb-storage
1052 10:49:13.930882 [ 1.692953] rtc-efi rtc-efi.0: registered as rtc0
1053 10:49:13.937992 [ 1.693195] rtc-efi rtc-efi.0: setting system clock to 2024-10-30T10:48:34 UTC (1730285314)
1054 10:49:13.969337 [ 1.696975] i2c_dev: i2c /dev entries driver
1055 10:49:14.134747 [ 1.717571] sbsa-gwdt sbsa-gwdt.0: Initialized with 10s timeout @ 100000000 Hz, action=0.
1056 10:49:14.233160 [ 1.731824] sdhci: Secure Digital Host Controller Interface driver
1057 10:49:14.233632 [ 1.731903] sdhci: Copyright(c) Pierre Ossman
1058 10:49:14.253522 [ 1.734922] Synopsys Designware Multimedia Card Interface Driver
1059 10:49:14.283441 [ 1.739233] sdhci-pltfm: SDHCI platform and OF driver helper
1060 10:49:14.357393 [ 1.749598] pstore: Using crash dump compression: deflate
1061 10:49:14.357602 [ 1.749678] pstore: Registered efi_pstore as persistent store backend
1062 10:49:14.370571 [ 1.750771] SMCCC: SOC_ID: ID = jep106:043b:0000 Revision = 0x00000002
1063 10:49:14.402892 [ 1.755961] usbcore: registered new interface driver usbhid
1064 10:49:14.403078 [ 1.756047] usbhid: USB HID core driver
1065 10:49:14.561505 [ 1.773306] hw perfevents: enabled with armv8_pmuv3_0 PMU driver, 9 (0,800000ff) counters available
1066 10:49:14.748621 [ 1.795384] NET: Registered PF_PACKET protocol family
1067 10:49:14.754092 [ 1.795868] 9pnet: Installing 9P2000 support
1068 10:49:14.758155 [ 1.796129] Key type dns_resolver registered
1069 10:49:15.319337 [ 1.881510] registered taskstats version 1
1070 10:49:15.365331 [ 1.883117] Loading compiled-in X.509 certificates
1071 10:49:15.389848 [ 1.887638] ata1: SATA link down (SStatus 0 SControl 300)
1072 10:49:15.448630 [ 1.899641] ata2: SATA link down (SStatus 0 SControl 300)
1073 10:49:15.485789 [ 1.907644] ata3: SATA link down (SStatus 0 SControl 300)
1074 10:49:15.623247 [ 1.949813] Demotion targets for Node 0: null
1075 10:49:15.663944 [ 1.952988] pcieport 0000:00:01.0: Adding to iommu group 3
1076 10:49:15.685720 [ 1.954242] pcieport 0000:00:02.0: Adding to iommu group 4
1077 10:49:15.709718 [ 1.955480] pcieport 0000:00:03.0: Adding to iommu group 5
1078 10:49:15.729696 [ 1.956730] pcieport 0000:00:04.0: Adding to iommu group 6
1079 10:49:15.761483 [ 1.959183] pcieport 0000:03:00.0: Adding to iommu group 5
1080 10:49:15.793340 [ 1.960953] pcieport 0000:04:00.0: Adding to iommu group 5
1081 10:49:15.798310 [ 1.961840] pcieport 0000:04:01.0: Adding to iommu group 5
1082 10:49:15.803325 [ 1.962406] pcieport 0000:04:02.0: Adding to iommu group 5
1083 10:49:15.866106 [ 2.018772] smc91x LNRO0003:00 eth0: link up, 10Mbps, half-duplex, lpa 0x0000
1084 10:49:15.888940 [ 2.032518] Sending DHCP requests ., OK
1085 10:49:15.894461 [ 2.032930] IP-Config: Got DHCP answer from 172.20.51.254, my address is 172.20.51.1
1086 10:49:15.894983 [ 2.033053] IP-Config: Complete:
1087 10:49:15.895333 [ 2.033111] device=eth0, hwaddr=00:02:f7:ef:00:03, ipaddr=172.20.51.1, mask=255.255.255.0, gw=172.20.51.254
1088 10:49:15.895687 [ 2.033263] host=172.20.51.1, domain=, nis-domain=(none)
1089 10:49:15.896173 [ 2.033352] bootserver=172.20.51.254, rootserver=172.20.51.254, rootpath=
1090 10:49:15.896519 [ 2.033409] nameserver0=172.20.51.254, nameserver1=172.20.51.252
1091 10:49:15.930964 [ 2.034726] clk: Disabling unused clocks
1092 10:49:15.931978 [ 2.034800] PM: genpd: Disabling unused power domains
1093 10:49:15.932506 [ 2.034909] ALSA device list:
1094 10:49:15.932649 [ 2.034982] No soundcards found.
1095 10:49:16.357259 [ 2.043569] EXT4-fs (vda1): mounted filesystem ac79c2da-de45-4fc6-aeab-71f249cabd36 r/w with ordered data mode. Quota mode: none.
1096 10:49:16.362133 [ 2.043789] VFS: Mounted root (ext4 filesystem) on device 254:1.
1097 10:49:16.397124 [ 2.045342] devtmpfs: mounted
1098 10:49:16.504511 [ 2.068135] Freeing unused kernel memory: 10496K
1099 10:49:16.511185 [ 2.068800] Run /sbin/init as init process
1100 10:49:16.511714 [ 2.068872] with arguments:
1101 10:49:16.511858 [ 2.068931] /sbin/init
1102 10:49:16.511973 [ 2.068994] Image
1103 10:49:16.512080 [ 2.069054] with environment:
1104 10:49:16.512181 [ 2.069114] HOME=/
1105 10:49:16.512301 [ 2.069175] TERM=linux
1106 10:49:16.512406 [ 2.069233] user_debug=31
1107 10:49:18.794837 [ 2.430827] NET: Registered PF_INET6 protocol family
1108 10:49:18.886044 [ 2.435810] Segment Routing with IPv6
1109 10:49:18.887532 [ 2.436061] In-situ OAM (IOAM) with IPv6
1110 10:49:20.229923 [ 2.572697] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
1111 10:49:20.233390 [ 2.573175] systemd[1]: Detected architecture arm64.
1112 10:49:20.243633 [ 2.573986] systemd[1]: Detected initialized system, this is not the first boot.
1113 10:49:20.244864 [ 2.574141] systemd[1]: Kernel version 6.12.0-rc5-next-20241030, our baseline is 4.15
1114 10:49:20.268758
1115 10:49:20.269247 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
1116 10:49:20.269348
1117 10:49:20.302768 [ 2.577716] systemd[1]: Hostname set to <debian-bookworm-arm64>.
1118 10:49:20.357904 [ 2.581346] systemd[1]: 127.0.0.1 has already been added to loopback interface
1119 10:49:20.360655 [ 2.581578] systemd[1]: ::1 has already been added to loopback interface
1120 10:49:20.363514 [ 2.581803] systemd[1]: Successfully brought loopback interface up
1121 10:49:20.376566 [ 2.582465] systemd[1]: Setting '/proc/sys/fs/file-max' to '9223372036854775807'
1122 10:49:20.401131 [ 2.583969] systemd[1]: No credentials passed via fw_cfg.
1123 10:49:20.413340 [ 2.584593] systemd[1]: Failed to open '/sys/firmware/dmi/entries/11-0/raw', ignoring: No such file or directory
1124 10:49:20.426095 [ 2.585350] systemd[1]: Reading EFI variable /sys/firmware/efi/efivars/LoaderTimeInitUSec-4a67b082-0a4c-41cf-b6c7-440b29bb8c4f.
1125 10:49:20.429331 [ 2.585617] systemd[1]: open("/sys/firmware/efi/efivars/LoaderTimeInitUSec-4a67b082-0a4c-41cf-b6c7-440b29bb8c4f") failed: No such file or directory
1126 10:49:20.430907 [ 2.585803] systemd[1]: Failed to read LoaderTimeInitUSec: No such file or directory
1127 10:49:20.490190 [ 2.588761] systemd[1]: Found cgroup2 on /sys/fs/cgroup/, full unified hierarchy
1128 10:49:20.490647 [ 2.588904] systemd[1]: Unified cgroup hierarchy is located at /sys/fs/cgroup.
1129 10:49:21.279121 [ 2.667499] systemd[1]: bpf-firewall: Got EBADF when using BPF_F_ALLOW_MULTI, which indicates it is supported. Yay!
1130 10:49:21.295874 [ 2.668064] systemd[1]: Controller 'cpu' supported: yes
1131 10:49:21.296836 [ 2.668193] systemd[1]: Controller 'cpuacct' supported: no
1132 10:49:21.297949 [ 2.668323] systemd[1]: Controller 'cpuset' supported: yes
1133 10:49:21.304183 [ 2.668513] systemd[1]: Controller 'io' supported: yes
1134 10:49:21.306342 [ 2.668641] systemd[1]: Controller 'blkio' supported: no
1135 10:49:21.308038 [ 2.668769] systemd[1]: Controller 'memory' supported: yes
1136 10:49:21.309719 [ 2.668899] systemd[1]: Controller 'devices' supported: no
1137 10:49:21.311426 [ 2.669029] systemd[1]: Controller 'pids' supported: yes
1138 10:49:21.313106 [ 2.669158] systemd[1]: Controller 'bpf-firewall' supported: yes
1139 10:49:21.314721 [ 2.669292] systemd[1]: Controller 'bpf-devices' supported: yes
1140 10:49:21.316994 [ 2.669425] systemd[1]: Controller 'bpf-foreign' supported: yes
1141 10:49:21.318694 [ 2.669558] systemd[1]: Controller 'bpf-socket-bind' supported: no
1142 10:49:21.320371 [ 2.669694] systemd[1]: Controller 'bpf-restrict-network-interfaces' supported: no
1143 10:49:21.325460 [ 2.669888] systemd[1]: Set up TFD_TIMER_CANCEL_ON_SET timerfd.
1144 10:49:21.329357 [ 2.670084] systemd[1]: Failed to stat /etc/localtime, ignoring: No such file or directory
1145 10:49:21.352808 [ 2.671155] systemd[1]: /etc/localtime doesn't exist yet, watching /etc instead.
1146 10:49:21.412354 [ 2.673133] systemd[1]: Enabling (yes) showing of status (commandline).
1147 10:49:21.486794 [ 2.677961] systemd[1]: Successfully forked off '(sd-executor)' as PID 105.
1148 10:49:21.646984 [ 2.685990] (sd-execut[105]: About to execute /usr/lib/systemd/system-generators/systemd-fstab-generator (null)
1149 10:49:21.712403 [ 2.689738] (sd-execut[105]: Successfully forked off '(direxec)' as PID 106.
1150 10:49:21.721391 [ 2.690035] (sd-execut[105]: About to execute /usr/lib/systemd/system-generators/systemd-getty-generator (null)
1151 10:49:21.852673 [ 2.694155] (sd-execut[105]: Successfully forked off '(direxec)' as PID 107.
1152 10:49:21.861161 [ 2.694440] (sd-execut[105]: About to execute /usr/lib/systemd/system-generators/systemd-integritysetup-generator (null)
1153 10:49:21.980475 [ 2.698179] (sd-execut[105]: Successfully forked off '(direxec)' as PID 108.
1154 10:49:21.999091 [ 2.698513] (sd-execut[105]: About to execute /usr/lib/systemd/system-generators/systemd-run-generator (null)
1155 10:49:22.194260 [ 2.702219] (sd-execut[105]: Successfully forked off '(direxec)' as PID 109.
1156 10:49:22.237237 [ 2.702578] (sd-execut[105]: About to execute /usr/lib/systemd/system-generators/systemd-veritysetup-generator (null)
1157 10:49:22.488118 [ 2.706276] (sd-execut[105]: Successfully forked off '(direxec)' as PID 110.
1158 10:49:25.376084 [ 2.809330] systemd-fstab-generator[106]: Parsing /etc/fstab...
1159 10:49:25.451486 [ 2.810271] systemd-fstab-generator[106]: Found entry what=/dev/disk/by-uuid/ac79c2da-de45-4fc6-aeab-71f249cabd36 where=/ type=ext4 makefs=no growfs=no noauto=no nofail=no
1160 10:49:25.569352 [ 2.812052] systemd-fstab-generator[106]: Checking was requested for /dev/disk/by-uuid/ac79c2da-de45-4fc6-aeab-71f249cabd36, but fsck.ext4 does not exist.
1161 10:49:25.645095 [ 2.812852] systemd-fstab-generator[106]: SELinux enabled state cached to: disabled
1162 10:49:25.684088 [ 2.813272] systemd-getty-generator[107]: Automatically adding serial getty for /dev/ttyAMA0.
1163 10:49:25.721434 [ 2.813842] systemd-getty-generator[107]: SELinux enabled state cached to: disabled
1164 10:49:26.469725 [ 2.835636] (sd-execut[105]: /usr/lib/systemd/system-generators/systemd-veritysetup-generator succeeded.
1165 10:49:26.474141 [ 2.835965] (sd-execut[105]: /usr/lib/systemd/system-generators/systemd-integritysetup-generator succeeded.
1166 10:49:26.479161 [ 2.836268] (sd-execut[105]: /usr/lib/systemd/system-generators/systemd-fstab-generator succeeded.
1167 10:49:26.497669 [ 2.836661] (sd-execut[105]: /usr/lib/systemd/system-generators/systemd-getty-generator succeeded.
1168 10:49:26.501515 [ 2.836943] (sd-execut[105]: /usr/lib/systemd/system-generators/systemd-run-generator succeeded.
1169 10:49:26.549987 [ 2.842410] systemd[1]: (sd-executor) succeeded.
1170 10:49:26.556561 [ 2.842795] systemd[1]: Looking for unit files in (higher priority first):
1171 10:49:26.557071 [ 2.842921] systemd[1]: /etc/systemd/system.control
1172 10:49:26.557173 [ 2.843018] systemd[1]: /run/systemd/system.control
1173 10:49:26.557663 [ 2.843146] systemd[1]: /run/systemd/transient
1174 10:49:26.557992 [ 2.843255] systemd[1]: /run/systemd/generator.early
1175 10:49:26.558081 [ 2.843368] systemd[1]: /etc/systemd/system
1176 10:49:26.558414 [ 2.843476] systemd[1]: /etc/systemd/system.attached
1177 10:49:26.558510 [ 2.843588] systemd[1]: /run/systemd/system
1178 10:49:26.558860 [ 2.843696] systemd[1]: /run/systemd/system.attached
1179 10:49:26.559185 [ 2.843809] systemd[1]: /run/systemd/generator
1180 10:49:26.559559 [ 2.843919] systemd[1]: /usr/local/lib/systemd/system
1181 10:49:26.559653 [ 2.844032] systemd[1]: /lib/systemd/system
1182 10:49:26.559727 [ 2.844138] systemd[1]: /usr/lib/systemd/system
1183 10:49:26.560058 [ 2.844250] systemd[1]: /run/systemd/generator.late
1184 10:49:26.577415 [ 2.844574] systemd[1]: Cannot stat /run/systemd/transient: No such file or directory
1185 10:49:26.798570 [ 2.858252] systemd[1]: sd-device-enumerator: Failed to open directory /run/udev/tags/systemd, ignoring: No such file or directory
1186 10:49:26.806918 [ 2.858836] systemd[1]: Modification times have changed, need to update cache.
1187 10:49:26.899431 [ 2.866026] systemd[1]: unit_file_build_name_map: normal unit file: /run/systemd/generator/-.mount
1188 10:49:26.919486 [ 2.870042] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.service
1189 10:49:26.921645 [ 2.870334] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_fail@.service
1190 10:49:26.924064 [ 2.870550] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.service
1191 10:49:26.926026 [ 2.870789] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/shutdown.target
1192 10:49:26.928280 [ 2.871076] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-initctl.socket
1193 10:49:26.930559 [ 2.871291] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rescue.target
1194 10:49:26.932841 [ 2.871516] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/quotaon.service
1195 10:49:26.941298 [ 2.872195] systemd[1]: Linked unit file: /lib/systemd/system/alsa-utils.service → /dev/null
1196 10:49:26.951355 [ 2.872506] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pcrphase-sysinit.service
1197 10:49:26.962288 [ 2.874327] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.mount
1198 10:49:26.963868 [ 2.874546] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/alsa-restore.service
1199 10:49:26.966142 [ 2.874764] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/container-getty@.service
1200 10:49:26.968354 [ 2.875026] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_reap.service
1201 10:49:26.970486 [ 2.875246] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-tracing.mount
1202 10:49:26.972753 [ 2.875486] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/emergency.target
1203 10:49:26.975012 [ 2.875718] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-sync.target
1204 10:49:26.977227 [ 2.875964] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.service
1205 10:49:26.978917 [ 2.876189] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sockets.target
1206 10:49:26.990200 [ 2.876516] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/timers.target
1207 10:49:26.992391 [ 2.876751] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-device.target
1208 10:49:26.994531 [ 2.876979] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.service
1209 10:49:26.997289 [ 2.877431] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kexec.target
1210 10:49:26.999525 [ 2.877700] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-wall.path
1211 10:49:27.001742 [ 2.877995] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.timer
1212 10:49:27.004017 [ 2.878226] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-udevadm-cleanup-db.service
1213 10:49:27.006237 [ 2.878451] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/syslog.socket
1214 10:49:27.014150 [ 2.879544] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-volatile-root.service
1215 10:49:27.024086 [ 2.880915] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-quotacheck.service
1216 10:49:27.025756 [ 2.881156] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/serial-getty@.service
1217 10:49:27.028032 [ 2.881374] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/time-set.target
1218 10:49:27.030268 [ 2.881636] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-switch-root.target
1219 10:49:27.032520 [ 2.881870] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pcrphase-initrd.service
1220 10:49:27.034758 [ 2.882191] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sys-kernel-debug.mount
1221 10:49:27.036449 [ 2.882414] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sleep.target
1222 10:49:27.038686 [ 2.882636] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-mqueue.mount
1223 10:49:27.040969 [ 2.882852] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty.target
1224 10:49:27.042667 [ 2.883081] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty@.service
1225 10:49:27.044897 [ 2.883298] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-pre.target
1226 10:49:27.047153 [ 2.883540] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd-wait-online@.service
1227 10:49:27.049418 [ 2.883774] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-veritysetup.target
1228 10:49:27.051086 [ 2.884017] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/bluetooth.target
1229 10:49:27.066749 [ 2.885361] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-lookup.target
1230 10:49:27.068875 [ 2.885592] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/final.target
1231 10:49:27.071674 [ 2.886147] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-audit.socket
1232 10:49:27.081266 [ 2.887406] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-remount-fs.service
1233 10:49:27.083442 [ 2.887650] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs-pre.target
1234 10:49:27.085658 [ 2.887876] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend-then-hibernate.service
1235 10:49:27.087591 [ 2.888109] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.socket
1236 10:49:27.095134 [ 2.888443] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sound.target
1237 10:49:27.097976 [ 2.888661] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rc-local.service
1238 10:49:27.100186 [ 2.888878] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-repart.service
1239 10:49:27.102432 [ 2.889120] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysusers.service
1240 10:49:27.104687 [ 2.889362] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/getty-static.service
1241 10:49:27.106372 [ 2.889589] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-cleanup.service
1242 10:49:27.108625 [ 2.889864] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup-dev.service
1243 10:49:27.110878 [ 2.890119] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-rfkill.socket
1244 10:49:27.113129 [ 2.890367] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update-pre.target
1245 10:49:27.115448 [ 2.890642] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hibernate-resume@.service
1246 10:49:27.117144 [ 2.890915] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/kmod-static-nodes.service
1247 10:49:27.119429 [ 2.891136] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/usb-gadget.target
1248 10:49:27.121630 [ 2.891389] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.socket
1249 10:49:27.123892 [ 2.891613] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/nss-user-lookup.target
1250 10:49:27.126155 [ 2.891833] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hybrid-sleep.target
1251 10:49:27.128405 [ 2.892121] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-clean.service
1252 10:49:27.135194 [ 2.892492] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-backlight@.service
1253 10:49:27.137962 [ 2.892767] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-root-fs.target
1254 10:49:27.140152 [ 2.893007] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/rpcbind.target
1255 10:49:27.147868 [ 2.893625] systemd[1]: Linked unit file: /lib/systemd/system/rcS.service → /dev/null
1256 10:49:27.151351 [ 2.895917] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/basic.target
1257 10:49:27.153582 [ 2.896135] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/hibernate.target
1258 10:49:27.161406 [ 2.896355] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/veritysetup.target
1259 10:49:27.164812 [ 2.896674] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dev-hugepages.mount
1260 10:49:27.167332 [ 2.896917] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/veritysetup-pre.target
1261 10:49:27.180552 [ 2.898386] systemd[1]: Linked unit file: /lib/systemd/system/x11-common.service → /dev/null
1262 10:49:27.182955 [ 2.898610] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pcrphase.service
1263 10:49:27.184909 [ 2.898831] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-binfmt.service
1264 10:49:27.187154 [ 2.899052] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network-online.target
1265 10:49:27.189693 [ 2.899304] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-sysext.service
1266 10:49:27.202399 [ 2.900640] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user.slice
1267 10:49:27.205074 [ 2.900899] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-modules-load.service
1268 10:49:27.207341 [ 2.901131] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hostnamed.service
1269 10:49:27.209829 [ 2.901385] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-cryptsetup.target
1270 10:49:27.212075 [ 2.901626] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-suspend.service
1271 10:49:27.214028 [ 2.901893] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/pam_namespace.service
1272 10:49:27.216275 [ 2.902172] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udev-trigger.service
1273 10:49:27.218532 [ 2.902518] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/boot-complete.target
1274 10:49:27.220777 [ 2.902755] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/dbus.service
1275 10:49:27.223019 [ 2.902980] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.path
1276 10:49:27.232107 [ 2.904276] systemd[1]: Linked unit file: /lib/systemd/system/cryptdisks.service → /dev/null
1277 10:49:27.240342 [ 2.904578] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/poweroff.target
1278 10:49:27.243146 [ 2.904810] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-control.socket
1279 10:49:27.245335 [ 2.905061] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-firstboot.service
1280 10:49:27.255845 [ 2.906234] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/exit.target
1281 10:49:27.258000 [ 2.906449] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/first-boot-complete.target
1282 10:49:27.260178 [ 2.906683] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub_all.timer
1283 10:49:27.261909 [ 2.906895] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.service
1284 10:49:27.264712 [ 2.907161] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald.service
1285 10:49:27.266113 [ 2.907379] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/alsa-state.service
1286 10:49:27.268647 [ 2.907594] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup.target
1287 10:49:27.270668 [ 2.907811] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsck-root.service
1288 10:49:27.272938 [ 2.908077] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/proc-sys-fs-binfmt_misc.automount
1289 10:49:27.276291 [ 2.908313] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-fsckd.socket
1290 10:49:27.283117 [ 2.908629] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/reboot.target
1291 10:49:27.285212 [ 2.908923] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timesyncd.service
1292 10:49:27.288082 [ 2.909145] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/network.target
1293 10:49:27.299988 [ 2.910274] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-ask-password-console.service
1294 10:49:27.302589 [ 2.910524] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald@.service
1295 10:49:27.305113 [ 2.910773] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-halt.service
1296 10:49:27.307381 [ 2.911132] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/factory-reset.target
1297 10:49:27.309907 [ 2.911451] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-udevd-kernel.socket
1298 10:49:27.312375 [ 2.911672] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd-fs.target
1299 10:49:27.314633 [ 2.911893] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-user-sessions.service
1300 10:49:27.316857 [ 2.912169] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend-then-hibernate.target
1301 10:49:27.321709 [ 2.912464] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/suspend.target
1302 10:49:27.324252 [ 2.912681] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/user-runtime-dir@.service
1303 10:49:27.326218 [ 2.912900] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/e2scrub@.service
1304 10:49:27.328456 [ 2.913158] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/slices.target
1305 10:49:27.330696 [ 2.913394] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-timedated.service
1306 10:49:27.333231 [ 2.913625] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/console-getty.service
1307 10:49:27.335161 [ 2.913903] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/multi-user.target
1308 10:49:27.337419 [ 2.914125] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-tmpfiles-setup.service
1309 10:49:27.340537 [ 2.914352] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/remote-fs.target
1310 10:49:27.343913 [ 2.914586] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-hybrid-sleep.service
1311 10:49:27.347236 [ 2.914810] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/system-update.target
1312 10:49:27.350567 [ 2.915115] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/cryptsetup-pre.target
1313 10:49:27.354498 [ 2.915515] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-exit.service
1314 10:49:27.357815 [ 2.915810] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-logind.service
1315 10:49:27.361237 [ 2.916029] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/local-fs.target
1316 10:49:27.364317 [ 2.916308] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-network-generator.service
1317 10:49:27.370492 [ 2.916630] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-update-utmp-runlevel.service
1318 10:49:27.373976 [ 2.916887] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-journald-dev-log.socket
1319 10:49:27.377326 [ 2.917110] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/initrd.target
1320 10:49:27.379523 [ 2.917330] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/integritysetup-pre.target
1321 10:49:27.382503 [ 2.917679] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-localed.service
1322 10:49:27.384471 [ 2.917928] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-reboot.service
1323 10:49:27.386705 [ 2.918149] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/halt.target
1324 10:49:27.388955 [ 2.918366] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/blockdev@.target
1325 10:49:27.391689 [ 2.918651] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/umount.target
1326 10:49:27.394157 [ 2.918884] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/smartcard.target
1327 10:49:27.396204 [ 2.919115] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.service
1328 10:49:27.398931 [ 2.919341] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-pstore.service
1329 10:49:27.401161 [ 2.919639] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/sigpwr.target
1330 10:49:27.407980 [ 2.920256] systemd[1]: Linked unit file: /lib/systemd/system/hwclock.service → /dev/null
1331 10:49:27.412400 [ 2.920555] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-networkd.socket
1332 10:49:27.414573 [ 2.920788] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/systemd-machine-id-commit.service
1333 10:49:27.423565 [ 2.925248] systemd[1]: unit_file_build_name_map: normal unit file: /lib/systemd/system/fstrim.timer
1334 10:49:35.656578 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
1335 10:49:35.753189 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
1336 10:49:35.856150 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
1337 10:49:35.940076 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
1338 10:49:35.967411 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
1339 10:49:35.991685 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
1340 10:49:36.015073 Expecting device [0;1;39mdev-ttyAMA0.device[0m - /dev/ttyAMA0...
1341 10:49:36.029639 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
1342 10:49:36.051930 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
1343 10:49:36.069248 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
1344 10:49:36.083797 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
1345 10:49:36.098359 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
1346 10:49:36.113998 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
1347 10:49:36.130435 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
1348 10:49:36.168371 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
1349 10:49:36.245468 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
1350 10:49:36.283720 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
1351 10:49:36.340733 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
1352 10:49:36.387421 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
1353 10:49:36.448751 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
1354 10:49:36.485711 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
1355 10:49:36.834425 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
1356 10:49:37.271144 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
1357 10:49:37.874373 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
1358 10:49:38.832675 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
1359 10:49:39.478978 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
1360 10:49:40.070845 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
1361 10:49:40.899168 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
1362 10:49:41.782831 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
1363 10:49:42.596856 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
1364 10:49:43.562176 [ 5.075682] device-mapper: ioctl: 4.48.0-ioctl (2023-03-01) initialised: dm-devel@lists.linux.dev
1365 10:49:44.589433 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
1366 10:49:45.081982 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
1367 10:49:45.771736 Starting [0;1;39msystemd-network-g… units from Kernel command line...
1368 10:49:46.171365 [ 5.166451] ACPI: bus type drm_connector registered
1369 10:49:46.749336 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
1370 10:49:47.703001 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
1371 10:49:49.151596 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
1372 10:49:49.254773 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
1373 10:49:49.331739 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
1374 10:49:49.484537 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
1375 10:49:49.938204 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
1376 10:49:50.265216 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
1377 10:49:50.653889 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
1378 10:49:51.160497 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
1379 10:49:51.880209 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
1380 10:49:54.442306 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
1381 10:49:55.112749 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
1382 10:49:55.502942 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
1383 10:49:55.605240 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
1384 10:49:56.667968 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
1385 10:49:57.598001 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
1386 10:49:58.520243 [ 5.410039] EXT4-fs (vda1): re-mounted ac79c2da-de45-4fc6-aeab-71f249cabd36 r/w. Quota mode: none.
1387 10:49:59.400372 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
1388 10:50:00.638509 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
1389 10:50:01.583721 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
1390 10:50:03.908755 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
1391 10:50:05.299433 [ 5.593886] systemd-journald[128]: SELinux enabled state cached to: disabled
1392 10:50:05.319524 [ 5.594300] systemd-journald[128]: Auditing in kernel turned off.
1393 10:50:05.939374 [ 5.604885] systemd-journald[128]: Fixed min_use=15.5M max_use=77.9M max_size=9.7M min_size=512.0K keep_free=38.9M n_max_files=100
1394 10:50:05.965175 [ 5.605494] systemd-journald[128]: Reserving 333 entries in field hash table.
1395 10:50:06.397882 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
1396 10:50:07.588915 [ 5.672308] systemd-journald[128]: Reserving 17735 entries in data hash table.
1397 10:50:07.705244 [ 5.674174] systemd-journald[128]: Journal effective settings seal=no keyed_hash=yes compress=yes compress_threshold_bytes=512B
1398 10:50:07.731201 [ 5.674804] systemd-journald[128]: Vacuuming...
1399 10:50:07.747968 [ 5.675148] systemd-journald[128]: Vacuuming done, freed 0B of archived journals from /run/log/journal/44a983756b26438995e691b947c527e4.
1400 10:50:07.755779 [ 5.675389] systemd-journald[128]: Flushing /dev/kmsg...
1401 10:50:08.376284 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
1402 10:50:09.677102 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
1403 10:50:17.072350 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
1404 10:50:17.136234 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
1405 10:50:17.176828 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
1406 10:50:18.549902 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
1407 10:50:37.918911 [ 6.826740] systemd-journald[128]: systemd-journald running as PID 128 for the system.
1408 10:50:38.009363 [ 6.830503] systemd-journald[128]: Sent READY=1 notification.
1409 10:50:38.019444 [ 6.830703] systemd-journald[128]: Sent WATCHDOG=1 notification.
1410 10:50:38.057295 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
1411 10:50:38.273001 [ 6.837015] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1412 10:50:38.401662 [ 6.840221] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1413 10:50:38.585070 [ 6.845289] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1414 10:50:38.741909 [ 6.849430] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1415 10:50:38.882660 [ 6.853766] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1416 10:50:38.991661 [ 6.857971] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1417 10:50:39.091259 [ 6.862064] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1418 10:50:39.200700 [ 6.866146] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1419 10:50:39.318528 [ 6.870509] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1420 10:50:39.432091 [ 6.874704] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1421 10:50:39.601019 [ 6.878945] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1422 10:50:39.770510 [ 6.883083] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1423 10:50:40.090590 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
1424 10:50:40.095203 [ 6.890711] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1425 10:50:40.353754 [ 6.893899] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1426 10:50:40.539733 [ 6.896326] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1427 10:50:40.840898 [ 6.900826] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1428 10:50:41.087719 [ 6.904067] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1429 10:50:41.437272 [ 6.909143] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1430 10:50:41.793359 [ 6.914495] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1431 10:50:42.002068 [ 6.918655] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1432 10:50:45.162385 [ 7.015663] systemd-journald[128]: varlink: New incoming connection.
1433 10:50:45.184141 [ 7.015942] systemd-journald[128]: varlink-21: Setting state idle-server
1434 10:50:45.266442 [ 7.018643] systemd-journald[128]: varlink-21: New incoming message: {"method":"io.systemd.Journal.FlushToVar","parameters":{}}
1435 10:50:45.297610 [ 7.019501] systemd-journald[128]: varlink-21: Changing state idle-server → processing-method
1436 10:50:45.304292 [ 7.019655] systemd-journald[128]: Received client request to flush runtime journal.
1437 10:50:45.314986 [ 7.020002] systemd-journald[128]: Vacuuming...
1438 10:50:45.338882 [ 7.020431] systemd-journald[128]: Vacuuming done, freed 0B of archived journals from /run/log/journal/44a983756b26438995e691b947c527e4.
1439 10:50:45.390623 [ 7.022374] systemd-journald[128]: varlink-21: Sending message: {"parameters":{}}
1440 10:50:45.397348 [ 7.022526] systemd-journald[128]: varlink-21: Changing state processing-method → processed-method
1441 10:50:45.402946 [ 7.022694] systemd-journald[128]: varlink-21: Changing state processed-method → idle-server
1442 10:50:45.674108 [ 7.031377] systemd-journald[128]: varlink-21: Got POLLHUP from socket.
1443 10:50:45.683598 [ 7.031594] systemd-journald[128]: varlink-21: Changing state idle-server → pending-disconnect
1444 10:50:45.690333 [ 7.031799] systemd-journald[128]: varlink-21: Changing state pending-disconnect → processing-disconnect
1445 10:50:45.695382 [ 7.031965] systemd-journald[128]: varlink-21: Changing state processing-disconnect → disconnected
1446 10:50:46.283064 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
1447 10:50:48.368034 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
1448 10:50:48.482967 [ 7.100010] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1449 10:50:48.628870 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
1450 10:50:51.028253 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
1451 10:50:51.517081 [ 7.150052] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1452 10:51:02.107391 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
1453 10:51:04.366944 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
1454 10:51:04.719020 [ 7.517317] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1455 10:51:05.319162 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
1456 10:51:05.769693 [ 7.535630] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1457 10:51:15.183716 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
1458 10:51:25.067065 [ 8.327780] cfg80211: Loading compiled-in X.509 certificates for regulatory database
1459 10:51:25.141087 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
1460 10:51:26.943573 [ 8.435480] Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
1461 10:51:27.024395 [ 8.444231] Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
1462 10:51:27.045357 [ 8.444656] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
1463 10:51:27.046494 [ 8.444782] cfg80211: failed to load regulatory.db
1464 10:51:30.600133 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
1465 10:51:30.697192 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
1466 10:52:00.647791 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
1467 10:52:07.750458 [ 9.584516] systemd[1]: systemd-timesyncd.service: Got notification message from PID 155 (READY=1, STATUS=Daemon is running)
1468 10:52:08.429211 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
1469 10:52:10.858065 [ 9.710218] smc91x LNRO0003:00 enalnro3i0: renamed from eth0 (while UP)
1470 10:52:19.953958 [[0;32m OK [0m] Found device [0;1;39mdev-ttyAMA0.device[0m - /dev/ttyAMA0.
1471 10:52:28.185846 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
1472 10:52:28.990588 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
1473 10:52:29.407507 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
1474 10:52:29.998304 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
1475 10:52:30.742438 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
1476 10:52:31.056575 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
1477 10:52:31.612588 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
1478 10:52:32.001416 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
1479 10:52:33.520685 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
1480 10:52:35.507627 [ 10.833278] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1481 10:52:35.843137 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
1482 10:52:37.772141 [ 10.901155] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1483 10:52:38.360464 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
1484 10:52:43.930684 [ 11.108884] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1485 10:52:44.198654 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
1486 10:52:46.810567 [ 11.224913] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1487 10:52:47.328421 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
1488 10:52:49.433096 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
1489 10:52:56.483514 [ 11.544649] systemd[1]: Successfully connected to API bus.
1490 10:52:58.640387 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
1491 10:52:59.567737 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
1492 10:53:21.148310 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
1493 10:53:23.442308 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyAM…ice[0m - Serial Getty on ttyAMA0.
1494 10:53:23.679078 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
1495 10:53:33.091597 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
1496 10:53:34.261601 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
1497 10:53:34.750480 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
1498 10:53:36.746177 [ 13.157008] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1499 10:53:37.263908 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
1500 10:53:43.091035 [ 13.425089] systemd-journald[128]: Data hash table of /run/log/journal/44a983756b26438995e691b947c527e4/system.journal has a fill level at 75.0 (13303 of 17735 items, 8388608 file size, 630 bytes per hash table item), suggesting rotation.
1501 10:53:43.093970 [ 13.425327] systemd-journald[128]: /run/log/journal/44a983756b26438995e691b947c527e4/system.journal: Journal header limits reached or header out-of-date, rotating.
1502 10:53:43.095478 [ 13.425514] systemd-journald[128]: Rotating...
1503 10:53:43.117895 [ 13.426912] systemd-journald[128]: Reserving 333 entries in field hash table.
1504 10:53:43.208582 [ 13.448599] systemd[1]: Registering bus object implementation for path=/org/freedesktop/systemd1/unit iface=org.freedesktop.systemd1.Target
1505 10:53:43.268860 [ 13.464528] systemd[1]: Registering bus object implementation for path=/org/freedesktop/systemd1/unit iface=org.freedesktop.systemd1.Timer
1506 10:53:43.312115 [ 13.480528] systemd[1]: Registering bus object implementation for path=/org/freedesktop/LogControl1 iface=org.freedesktop.LogControl1
1507 10:53:43.337070 [ 13.488143] systemd-journald[128]: Reserving 17735 entries in data hash table.
1508 10:53:43.399679 [ 13.490640] systemd-journald[128]: Vacuuming...
1509 10:53:43.428976 [ 13.496539] systemd[1]: Accepted new private connection.
1510 10:53:43.500034 [ 13.510522] systemd-journald[128]: Vacuuming done, freed 0B of archived journals from /run/log/journal/44a983756b26438995e691b947c527e4.
1511 10:53:43.531629 [ 13.512534] systemd[1]: Bus private-bus-connection: changing state AUTHENTICATING → RUNNING
1512 10:53:46.484665 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
1513 10:53:49.827776
1514 10:53:49.833462 Debian GNU/Linux 12 debian-bookworm-arm64 ttyAMA0
1515 10:53:49.835129
1516 10:53:49.850290 debian-bookworm-arm64 login: root (automatic login)
1517 10:53:49.854245
1518 10:53:55.373773 Linux debian-bookworm-arm64 6.12.0-rc5-next-20241030 #1 SMP PREEMPT Wed Oct 30 10:38:14 UTC 2024 aarch64
1519 10:53:55.421141
1520 10:53:55.424919 The programs included with the Debian GNU/Linux system are free software;
1521 10:53:55.427784 the exact distribution terms for each program are described in the
1522 10:53:55.431173 individual files in /usr/share/doc/*/copyright.
1523 10:53:55.431328
1524 10:53:55.433469 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
1525 10:53:55.436268 permitted by applicable law.
1526 10:54:11.938277 [ 14.548976] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1527 10:54:22.483097 [ 14.944722] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1528 10:55:36.288225 [ 18.189697] systemd-journald[128]: Successfully sent stream file descriptor to service manager.
1529 10:55:55.644378 Matched prompt #10: / #
1531 10:55:55.644902 Setting prompt string to ['/ #']
1532 10:55:55.645068 end: 2.3.1 login-action (duration 00:07:07) [common]
1534 10:55:55.645433 end: 2.3 auto-login-action (duration 00:07:22) [common]
1535 10:55:55.645617 start: 2.4 expect-shell-connection (timeout 00:12:22) [common]
1536 10:55:55.645775 Setting prompt string to ['/ #']
1537 10:55:55.645925 Forcing a shell prompt, looking for ['/ #']
1539 10:55:55.696287 / #
1540 10:55:55.696641 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:20:00)
1541 10:55:55.696833 Waiting using forced prompt support (timeout 00:10:00)
1542 10:55:55.709029
1543 10:55:55.914425 end: 2.4 expect-shell-connection (duration 00:00:00) [common]
1544 10:55:55.914688 end: 2 boot-fvp (duration 00:07:38) [common]
1545 10:55:55.914853 start: 3 lava-test-retry (timeout 01:01:06) [common]
1546 10:55:55.915002 start: 3.1 lava-test-shell (timeout 01:01:06) [common]
1547 10:55:55.915127 Using namespace: common
1548 10:55:55.915258 Using a character delay of 50 (ms)
1550 10:55:56.015714 / # #
1551 10:55:56.016043 lava-test-shell: Wait for prompt ['/ #'] (timeout 01:10:00)
1552 10:55:56.027336 #
1553 10:55:56.177709 Using /lava-913179
1554 10:55:56.177941 Sending with 50 millisecond of delay
1556 10:55:58.232340 / # export SHELL=/bin/sh
1557 10:55:58.282821 export SHELL=/bin/sh
1558 10:55:58.398059 Sending with 50 millisecond of delay
1560 10:56:01.052608 / # . /lava-913179/environment
1561 10:56:01.103078 . /lava-913179/environment
1562 10:56:01.272292 Sending with 50 millisecond of delay
1564 10:56:06.131945 / # /lava-913179/bin/lava-test-runner /lava-913179/0
1565 10:56:06.182290 Test shell timeout: 10s (minimum of the action and connection timeout)
1566 10:56:06.182962 /lava-913179/bin/lava-test-runner /lava-913179/0
1567 10:56:11.698176 + export TESTRUN_ID=0_timesync-off
1568 10:56:11.710021 + cd /lava-913179/0/tests/0_timesync-off
1569 10:56:11.820514 + cat uuid
1570 10:56:12.198843 + UUID=913179_1.1.3.1
1571 10:56:12.206670 + set +x
1572 10:56:12.210234 Received signal: <STARTRUN> 0_timesync-off 913179_1.1.3.1
1573 10:56:12.210378 Starting test lava.0_timesync-off (913179_1.1.3.1)
1574 10:56:12.210578 Skipping test definition patterns.
1575 10:56:12.210781 <LAVA_SIGNAL_STARTRUN 0_timesync-off 913179_1.1.3.1>
1576 10:56:12.227391 + systemctl stop systemd-timesyncd
1577 10:56:26.911522 + set +x
1578 10:56:26.917132 <LAVA_SIGNAL_ENDRUN 0_timesync-off 913179_1.1.3.1>
1579 10:56:26.917582 Received signal: <ENDRUN> 0_timesync-off 913179_1.1.3.1
1580 10:56:26.917794 Ending use of test pattern.
1581 10:56:26.917954 Ending test lava.0_timesync-off (913179_1.1.3.1), duration 14.71
1583 10:56:29.087060 + export TESTRUN_ID=1_kselftest-arm64_fvp
1584 10:56:29.090969 + cd /lava-913179/0/tests/1_kselftest-arm64_fvp
1585 10:56:29.207452 + cat uuid
1586 10:56:29.572315 + UUID=913179_1.1.3.5
1587 10:56:29.575146 + set +x
1588 10:56:29.585883 Received signal: <STARTRUN> 1_kselftest-arm64_fvp 913179_1.1.3.5
1589 10:56:29.586080 Starting test lava.1_kselftest-arm64_fvp (913179_1.1.3.5)
1590 10:56:29.586233 Skipping test definition patterns.
1591 10:56:29.586422 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64_fvp 913179_1.1.3.5>
1592 10:56:29.595298 + cd ./automated/linux/kselftest/
1593 10:56:29.695647 + ./kselftest.sh -c arm64 -T -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/kselftest.tar.xz -L -S /dev/null -b fvp -g next -e -p /opt/kselftests/mainline/ -n 1 -i 1 -E
1594 10:56:33.034808 [ 20.412495] systemd-journald[128]: Data hash table of /run/log/journal/44a983756b26438995e691b947c527e4/system.journal has a fill level at 75.0 (13302 of 17735 items, 8388608 file size, 630 bytes per hash table item), suggesting rotation.
1595 10:56:33.041622 [ 20.412734] systemd-journald[128]: /run/log/journal/44a983756b26438995e691b947c527e4/system.journal: Journal header limits reached or header out-of-date, rotating.
1596 10:56:33.045565 [ 20.412921] systemd-journald[128]: Rotating...
1597 10:56:33.223664 [ 20.422138] systemd-journald[128]: Reserving 333 entries in field hash table.
1598 10:56:33.799169 INFO: install_deps skipped
1599 10:56:34.246858 [ 20.485079] systemd-journald[128]: Reserving 17735 entries in data hash table.
1600 10:56:34.330507 [ 20.487213] systemd-journald[128]: Vacuuming...
1601 10:56:34.614471 [ 20.509529] systemd-journald[128]: Vacuuming done, freed 0B of archived journals from /run/log/journal/44a983756b26438995e691b947c527e4.
1602 10:56:36.631872 --2024-10-30 10:52:19-- http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/kselftest.tar.xz
1603 10:56:36.916085 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
1604 10:56:38.489196 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
1605 10:56:38.749482 HTTP request sent, awaiting response... 200 OK
1606 10:56:38.762112 Length: 7306664 (7.0M) [application/octet-stream]
1607 10:56:38.764366 Saving to: 'kselftest_armhf.tar.gz'
1608 10:56:38.769962
1609 10:56:57.413753
kselftest_armhf.tar 0%[ ] 0 --.-KB/s
kselftest_armhf.tar 47%[========> ] 3.30M 16.5MB/s
kselftest_armhf.tar 95%[==================> ] 6.67M 16.7MB/s
kselftest_armhf.tar 100%[===================>] 6.97M 16.6MB/s in 0.4s
1610 10:56:57.414916
1611 10:56:57.427164 2024-10-30 10:52:20 (16.6 MB/s) - 'kselftest_armhf.tar.gz' saved [7306664/7306664]
1612 10:56:57.427309
1613 11:00:26.873097 skiplist:
1614 11:00:26.880266 ========================================
1615 11:00:26.887483 ========================================
1616 11:00:27.826082 arm64:tags_test
1617 11:00:27.826975 arm64:fake_sigreturn_bad_magic
1618 11:00:27.827517 arm64:fake_sigreturn_bad_size
1619 11:00:27.828092 arm64:fake_sigreturn_bad_size_for_magic0
1620 11:00:27.828233 arm64:fake_sigreturn_duplicated_fpsimd
1621 11:00:27.828695 arm64:fake_sigreturn_misaligned_sp
1622 11:00:27.828829 arm64:fake_sigreturn_missing_fpsimd
1623 11:00:27.829274 arm64:fake_sigreturn_sme_change_vl
1624 11:00:27.829412 arm64:fake_sigreturn_sve_change_vl
1625 11:00:27.829564 arm64:fpmr_siginfo
1626 11:00:27.829907 arm64:gcs_exception_fault
1627 11:00:27.830043 arm64:gcs_frame
1628 11:00:27.830174 arm64:gcs_write_fault
1629 11:00:27.830501 arm64:mangle_pstate_invalid_compat_toggle
1630 11:00:27.830621 arm64:mangle_pstate_invalid_daif_bits
1631 11:00:27.831066 arm64:mangle_pstate_invalid_mode_el1h
1632 11:00:27.831296 arm64:mangle_pstate_invalid_mode_el1t
1633 11:00:27.831417 arm64:mangle_pstate_invalid_mode_el2h
1634 11:00:27.831791 arm64:mangle_pstate_invalid_mode_el2t
1635 11:00:27.831915 arm64:mangle_pstate_invalid_mode_el3h
1636 11:00:27.832043 arm64:mangle_pstate_invalid_mode_el3t
1637 11:00:27.832210 arm64:poe_siginfo
1638 11:00:27.832320 arm64:sme_trap_no_sm
1639 11:00:27.832422 arm64:sme_trap_non_streaming
1640 11:00:27.832740 arm64:sme_trap_za
1641 11:00:27.832898 arm64:sme_vl
1642 11:00:27.833015 arm64:ssve_regs
1643 11:00:27.833119 arm64:ssve_za_regs
1644 11:00:27.833296 arm64:sve_regs
1645 11:00:27.833412 arm64:sve_vl
1646 11:00:27.833514 arm64:tpidr2_restore
1647 11:00:27.833863 arm64:tpidr2_siginfo
1648 11:00:27.833987 arm64:za_no_regs
1649 11:00:27.834091 arm64:za_regs
1650 11:00:27.834447 arm64:zt_no_regs
1651 11:00:27.834564 arm64:zt_regs
1652 11:00:27.834668 arm64:pac
1653 11:00:27.835020 arm64:fp-ptrace
1654 11:00:27.835138 arm64:fp-stress
1655 11:00:27.835241 arm64:sve-ptrace
1656 11:00:27.835595 arm64:sve-probe-vls
1657 11:00:27.836173 arm64:vec-syscfg
1658 11:00:27.836296 arm64:za-fork
1659 11:00:27.836771 arm64:za-ptrace
1660 11:00:27.837335 arm64:check_buffer_fill
1661 11:00:27.837456 arm64:check_child_memory
1662 11:00:27.837909 arm64:check_gcr_el1_cswitch
1663 11:00:27.838499 arm64:check_hugetlb_options
1664 11:00:27.838617 arm64:check_ksm_options
1665 11:00:27.838720 arm64:check_mmap_options
1666 11:00:27.839054 arm64:check_prctl
1667 11:00:27.843599 arm64:check_tags_inclusion
1668 11:00:27.845266 arm64:check_user_mem
1669 11:00:27.847017 arm64:btitest
1670 11:00:27.847558 arm64:nobtitest
1671 11:00:27.847685 arm64:hwcap
1672 11:00:27.848102 arm64:ptrace
1673 11:00:27.848223 arm64:syscall-abi
1674 11:00:27.848667 arm64:tpidr2
1675 11:00:27.848790 arm64:basic-gcs
1676 11:00:27.849241 arm64:libc-gcs
1677 11:00:27.849361 arm64:gcs-locking
1678 11:00:27.849813 arm64:gcs-stress
1679 11:00:27.849946 arm64:gcspushm
1680 11:00:27.850050 arm64:gcsstr
1681 11:00:28.094378 ============== Tests to run ===============
1682 11:00:28.209676 arm64:tags_test
1683 11:00:28.209914 arm64:fake_sigreturn_bad_magic
1684 11:00:28.210034 arm64:fake_sigreturn_bad_size
1685 11:00:28.210369 arm64:fake_sigreturn_bad_size_for_magic0
1686 11:00:28.210506 arm64:fake_sigreturn_duplicated_fpsimd
1687 11:00:28.210639 arm64:fake_sigreturn_misaligned_sp
1688 11:00:28.210795 arm64:fake_sigreturn_missing_fpsimd
1689 11:00:28.210912 arm64:fake_sigreturn_sme_change_vl
1690 11:00:28.211015 arm64:fake_sigreturn_sve_change_vl
1691 11:00:28.211140 arm64:fpmr_siginfo
1692 11:00:28.211252 arm64:gcs_exception_fault
1693 11:00:28.211427 arm64:gcs_frame
1694 11:00:28.211546 arm64:gcs_write_fault
1695 11:00:28.211649 arm64:mangle_pstate_invalid_compat_toggle
1696 11:00:28.211779 arm64:mangle_pstate_invalid_daif_bits
1697 11:00:28.211963 arm64:mangle_pstate_invalid_mode_el1h
1698 11:00:28.212086 arm64:mangle_pstate_invalid_mode_el1t
1699 11:00:28.212190 arm64:mangle_pstate_invalid_mode_el2h
1700 11:00:28.212290 arm64:mangle_pstate_invalid_mode_el2t
1701 11:00:28.212460 arm64:mangle_pstate_invalid_mode_el3h
1702 11:00:28.212611 arm64:mangle_pstate_invalid_mode_el3t
1703 11:00:28.212720 arm64:poe_siginfo
1704 11:00:28.212820 arm64:sme_trap_no_sm
1705 11:00:28.212921 arm64:sme_trap_non_streaming
1706 11:00:28.213121 arm64:sme_trap_za
1707 11:00:28.213241 arm64:sme_vl
1708 11:00:28.213345 arm64:ssve_regs
1709 11:00:28.213447 arm64:ssve_za_regs
1710 11:00:28.213607 arm64:sve_regs
1711 11:00:28.213732 arm64:sve_vl
1712 11:00:28.213843 arm64:tpidr2_restore
1713 11:00:28.213948 arm64:tpidr2_siginfo
1714 11:00:28.214047 arm64:za_no_regs
1715 11:00:28.214199 arm64:za_regs
1716 11:00:28.214327 arm64:zt_no_regs
1717 11:00:28.214430 arm64:zt_regs
1718 11:00:28.214557 arm64:pac
1719 11:00:28.214688 arm64:fp-ptrace
1720 11:00:28.214829 arm64:fp-stress
1721 11:00:28.214933 arm64:sve-ptrace
1722 11:00:28.215034 arm64:sve-probe-vls
1723 11:00:28.215135 arm64:vec-syscfg
1724 11:00:28.215251 arm64:za-fork
1725 11:00:28.215405 arm64:za-ptrace
1726 11:00:28.215519 arm64:check_buffer_fill
1727 11:00:28.215619 arm64:check_child_memory
1728 11:00:28.215746 arm64:check_gcr_el1_cswitch
1729 11:00:28.215914 arm64:check_hugetlb_options
1730 11:00:28.216042 arm64:check_ksm_options
1731 11:00:28.216144 arm64:check_mmap_options
1732 11:00:28.216245 arm64:check_prctl
1733 11:00:28.216371 arm64:check_tags_inclusion
1734 11:00:28.216532 arm64:check_user_mem
1735 11:00:28.216645 arm64:btitest
1736 11:00:28.216744 arm64:nobtitest
1737 11:00:28.216841 arm64:hwcap
1738 11:00:28.216966 arm64:ptrace
1739 11:00:28.217072 arm64:syscall-abi
1740 11:00:28.217172 arm64:tpidr2
1741 11:00:28.217271 arm64:basic-gcs
1742 11:00:28.217368 arm64:libc-gcs
1743 11:00:28.217467 arm64:gcs-locking
1744 11:00:28.217565 arm64:gcs-stress
1745 11:00:28.217663 arm64:gcspushm
1746 11:00:28.217760 arm64:gcsstr
1747 11:00:28.243858 ===========End Tests to run ===============
1748 11:00:28.437470 shardfile-arm64 pass
1749 11:00:53.321101 [ 51.006573] kselftest: Running tests in arm64
1750 11:00:53.877646 TAP version 13
1751 11:00:54.278657 1..65
1752 11:00:55.247443 # timeout set to 45
1753 11:00:55.250451 # selftests: arm64: tags_test
1754 11:00:56.462779 # TAP version 13
1755 11:00:56.463976 # 1..1
1756 11:00:56.466805 # ok 1 Syscall successful with tagged address
1757 11:00:56.468483 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
1758 11:00:56.606592 ok 1 selftests: arm64: tags_test
1759 11:00:57.560235 # timeout set to 45
1760 11:00:57.562985 # selftests: arm64: fake_sigreturn_bad_magic
1761 11:00:58.728211 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
1762 11:00:58.729374 # Registered handlers for all signals.
1763 11:00:58.729976 # Detected MINSTKSIGSZ:4720
1764 11:00:58.731166 # Testcase initialized.
1765 11:00:58.733400 # uc context validated.
1766 11:00:58.735752 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1767 11:00:58.737997 # Handled SIG_COPYCTX
1768 11:00:58.738561 # Available space:3520
1769 11:00:58.739723 # Using badly built context - ERR: BAD MAGIC !
1770 11:00:58.741408 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCC93AD70
1771 11:00:58.749443 # SIG_OK -- SP:0xFFFFCC93BFD0 si_addr@:0xffffcc93bfd0 si_code:2 token@:0xffffcc93ad70 offset:-4704
1772 11:00:58.750574 # ==>> completed. PASS(1)
1773 11:00:58.857697 ok 2 selftests: arm64: fake_sigreturn_bad_magic
1774 11:00:59.796009 # timeout set to 45
1775 11:00:59.799167 # selftests: arm64: fake_sigreturn_bad_size
1776 11:01:01.045939 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
1777 11:01:01.047089 # Registered handlers for all signals.
1778 11:01:01.047659 # Detected MINSTKSIGSZ:4720
1779 11:01:01.048216 # Testcase initialized.
1780 11:01:01.049970 # uc context validated.
1781 11:01:01.052868 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1782 11:01:01.055180 # Handled SIG_COPYCTX
1783 11:01:01.056885 # Available space:3520
1784 11:01:01.058048 # uc context validated.
1785 11:01:01.059197 # Using badly built context - ERR: Bad size for esr_context
1786 11:01:01.060928 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFC572730
1787 11:01:01.061500 # SIG_OK -- SP:0xFFFFFC573990 si_addr@:0xfffffc573990 si_code:2 token@:0xfffffc572730 offset:-4704
1788 11:01:01.061641 # ==>> completed. PASS(1)
1789 11:01:01.169637 ok 3 selftests: arm64: fake_sigreturn_bad_size
1790 11:01:02.154100 # timeout set to 45
1791 11:01:02.157337 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
1792 11:01:03.331042 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
1793 11:01:03.333315 # Registered handlers for all signals.
1794 11:01:03.335646 # Detected MINSTKSIGSZ:4720
1795 11:01:03.337391 # Testcase initialized.
1796 11:01:03.340246 # uc context validated.
1797 11:01:03.344256 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1798 11:01:03.345952 # Handled SIG_COPYCTX
1799 11:01:03.347670 # Available space:3520
1800 11:01:03.349378 # Using badly built context - ERR: Bad size for terminator
1801 11:01:03.349975 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF4906680
1802 11:01:03.350560 # SIG_OK -- SP:0xFFFFF49078E0 si_addr@:0xfffff49078e0 si_code:2 token@:0xfffff4906680 offset:-4704
1803 11:01:03.350696 # ==>> completed. PASS(1)
1804 11:01:03.453183 ok 4 selftests: arm64: fake_sigreturn_bad_size_for_magic0
1805 11:01:04.442010 # timeout set to 45
1806 11:01:04.445056 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
1807 11:01:05.668880 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
1808 11:01:05.672632 # Registered handlers for all signals.
1809 11:01:05.675466 # Detected MINSTKSIGSZ:4720
1810 11:01:05.677774 # Testcase initialized.
1811 11:01:05.678935 # uc context validated.
1812 11:01:05.680656 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1813 11:01:05.681782 # Handled SIG_COPYCTX
1814 11:01:05.682422 # Available space:3520
1815 11:01:05.684122 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
1816 11:01:05.684718 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFA5B2DD0
1817 11:01:05.685029 # SIG_OK -- SP:0xFFFFFA5B4030 si_addr@:0xfffffa5b4030 si_code:2 token@:0xfffffa5b2dd0 offset:-4704
1818 11:01:05.685138 # ==>> completed. PASS(1)
1819 11:01:05.792241 ok 5 selftests: arm64: fake_sigreturn_duplicated_fpsimd
1820 11:01:06.797415 # timeout set to 45
1821 11:01:06.800774 # selftests: arm64: fake_sigreturn_misaligned_sp
1822 11:01:07.989712 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
1823 11:01:07.990884 # Registered handlers for all signals.
1824 11:01:07.991387 # Detected MINSTKSIGSZ:4720
1825 11:01:07.992605 # Testcase initialized.
1826 11:01:07.993737 # uc context validated.
1827 11:01:07.996064 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1828 11:01:07.998303 # Handled SIG_COPYCTX
1829 11:01:08.000015 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD7399DE3
1830 11:01:08.002296 # SIG_OK -- SP:0xFFFFD7399DE3 si_addr@:0xffffd7399de3 si_code:2 token@:0xffffd7399de3 offset:0
1831 11:01:08.003440 # ==>> completed. PASS(1)
1832 11:01:08.115080 ok 6 selftests: arm64: fake_sigreturn_misaligned_sp
1833 11:01:09.147649 # timeout set to 45
1834 11:01:09.158369 # selftests: arm64: fake_sigreturn_missing_fpsimd
1835 11:01:10.334296 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
1836 11:01:10.336018 # Registered handlers for all signals.
1837 11:01:10.337133 # Detected MINSTKSIGSZ:4720
1838 11:01:10.338815 # Testcase initialized.
1839 11:01:10.340546 # uc context validated.
1840 11:01:10.343407 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1841 11:01:10.345141 # Handled SIG_COPYCTX
1842 11:01:10.345732 # Mangling template header. Spare space:4096
1843 11:01:10.347431 # Using badly built context - ERR: Missing FPSIMD
1844 11:01:10.349133 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDD83E300
1845 11:01:10.349443 # SIG_OK -- SP:0xFFFFDD83F560 si_addr@:0xffffdd83f560 si_code:2 token@:0xffffdd83e300 offset:-4704
1846 11:01:10.349554 # ==>> completed. PASS(1)
1847 11:01:10.496872 ok 7 selftests: arm64: fake_sigreturn_missing_fpsimd
1848 11:01:11.556644 # timeout set to 45
1849 11:01:11.570366 # selftests: arm64: fake_sigreturn_sme_change_vl
1850 11:01:12.720830 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
1851 11:01:12.722566 # Registered handlers for all signals.
1852 11:01:12.723120 # Detected MINSTKSIGSZ:4720
1853 11:01:12.725417 # Required Features: [ SME ] supported
1854 11:01:12.727147 # Incompatible Features: [] absent
1855 11:01:12.728282 # Testcase initialized.
1856 11:01:12.730562 # uc context validated.
1857 11:01:12.731716 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1858 11:01:12.732301 # Handled SIG_COPYCTX
1859 11:01:12.733988 # Attempting to change VL from 16 to 64
1860 11:01:12.735172 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF94F6690
1861 11:01:12.735316 # SIG_OK -- SP:0xFFFFF94F78F0 si_addr@:0xfffff94f78f0 si_code:2 token@:0xfffff94f6690 offset:-4704
1862 11:01:12.735743 # ==>> completed. PASS(1)
1863 11:01:12.837943 ok 8 selftests: arm64: fake_sigreturn_sme_change_vl
1864 11:01:13.835368 # timeout set to 45
1865 11:01:13.838297 # selftests: arm64: fake_sigreturn_sve_change_vl
1866 11:01:15.071295 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
1867 11:01:15.074121 # Registered handlers for all signals.
1868 11:01:15.075795 # Detected MINSTKSIGSZ:4720
1869 11:01:15.078592 # Required Features: [ SVE ] supported
1870 11:01:15.080840 # Incompatible Features: [] absent
1871 11:01:15.084756 # Testcase initialized.
1872 11:01:15.085875 # uc context validated.
1873 11:01:15.087601 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1874 11:01:15.088663 # Handled SIG_COPYCTX
1875 11:01:15.090343 # Attempting to change VL from 16 to 64
1876 11:01:15.090902 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC4E48910
1877 11:01:15.091462 # SIG_OK -- SP:0xFFFFC4E49B70 si_addr@:0xffffc4e49b70 si_code:2 token@:0xffffc4e48910 offset:-4704
1878 11:01:15.091750 # ==>> completed. PASS(1)
1879 11:01:15.203048 ok 9 selftests: arm64: fake_sigreturn_sve_change_vl
1880 11:01:16.183757 # timeout set to 45
1881 11:01:16.187456 # selftests: arm64: fpmr_siginfo
1882 11:01:17.394558 # # FPMR :: Validate that FPMR is present as expected
1883 11:01:17.397024 # Registered handlers for all signals.
1884 11:01:17.397957 # Detected MINSTKSIGSZ:4720
1885 11:01:17.398550 # Testcase initialized.
1886 11:01:17.399132 # uc context validated.
1887 11:01:17.399725 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
1888 11:01:17.400285 # Handled SIG_COPYCTX
1889 11:01:17.403106 # FPMR sigframe absent on system without FPMR
1890 11:01:17.404287 # ==>> completed. PASS(1)
1891 11:01:17.497990 ok 10 selftests: arm64: fpmr_siginfo
1892 11:01:18.448552 # timeout set to 45
1893 11:01:18.450567 # selftests: arm64: gcs_exception_fault
1894 11:01:19.598137 # # Invalid GCS operation :: An invalid GCS operation generates the expected signal
1895 11:01:19.599842 # Registered handlers for all signals.
1896 11:01:19.608965 # Detected MINSTKSIGSZ:4720
1897 11:01:19.610614 # Required Features: [ GCS ] NOT supported
1898 11:01:19.612835 # ==>> completed. SKIP.
1899 11:01:19.759191 ok 11 selftests: arm64: gcs_exception_fault # SKIP
1900 11:01:20.726682 # timeout set to 45
1901 11:01:20.730044 # selftests: arm64: gcs_frame
1902 11:01:21.843236 # # GCS basics :: Validate a GCS signal context
1903 11:01:21.845441 # Registered handlers for all signals.
1904 11:01:21.846588 # Detected MINSTKSIGSZ:4720
1905 11:01:21.847142 # Required Features: [ GCS ] NOT supported
1906 11:01:21.847714 # ==>> completed. SKIP.
1907 11:01:22.004488 ok 12 selftests: arm64: gcs_frame # SKIP
1908 11:01:22.953220 # timeout set to 45
1909 11:01:22.956363 # selftests: arm64: gcs_write_fault
1910 11:01:24.110965 # # GCS write fault :: Normal writes to a GCS segfault
1911 11:01:24.113178 # Registered handlers for all signals.
1912 11:01:24.113767 # Detected MINSTKSIGSZ:4720
1913 11:01:24.114403 # Required Features: [ GCS ] NOT supported
1914 11:01:24.114931 # ==>> completed. SKIP.
1915 11:01:24.283998 ok 13 selftests: arm64: gcs_write_fault # SKIP
1916 11:01:25.281828 # timeout set to 45
1917 11:01:25.285019 # selftests: arm64: mangle_pstate_invalid_compat_toggle
1918 11:01:26.468305 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
1919 11:01:26.470009 # Registered handlers for all signals.
1920 11:01:26.471111 # Detected MINSTKSIGSZ:4720
1921 11:01:26.473349 # Testcase initialized.
1922 11:01:26.475034 # uc context validated.
1923 11:01:26.476727 # Handled SIG_TRIG
1924 11:01:26.480078 # SIG_OK -- SP:0xFFFFFE1F0910 si_addr@:0xfffffe1f0910 si_code:2 token@:(nil) offset:-281474945190160
1925 11:01:26.480634 # ==>> completed. PASS(1)
1926 11:01:26.585645 ok 14 selftests: arm64: mangle_pstate_invalid_compat_toggle
1927 11:01:27.593039 # timeout set to 45
1928 11:01:27.605685 # selftests: arm64: mangle_pstate_invalid_daif_bits
1929 11:01:28.817535 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
1930 11:01:28.819203 # Registered handlers for all signals.
1931 11:01:28.820974 # Detected MINSTKSIGSZ:4720
1932 11:01:28.822713 # Testcase initialized.
1933 11:01:28.824961 # uc context validated.
1934 11:01:28.826654 # Handled SIG_TRIG
1935 11:01:28.829436 # SIG_OK -- SP:0xFFFFC1E30DA0 si_addr@:0xffffc1e30da0 si_code:2 token@:(nil) offset:-281473934626208
1936 11:01:28.830562 # ==>> completed. PASS(1)
1937 11:01:28.922159 ok 15 selftests: arm64: mangle_pstate_invalid_daif_bits
1938 11:01:30.051336 # timeout set to 45
1939 11:01:30.054457 # selftests: arm64: mangle_pstate_invalid_mode_el1h
1940 11:01:31.343090 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
1941 11:01:31.344774 # Registered handlers for all signals.
1942 11:01:31.347019 # Detected MINSTKSIGSZ:4720
1943 11:01:31.348757 # Testcase initialized.
1944 11:01:31.350964 # uc context validated.
1945 11:01:31.352069 # Handled SIG_TRIG
1946 11:01:31.354320 # SIG_OK -- SP:0xFFFFF990ECF0 si_addr@:0xfffff990ecf0 si_code:2 token@:(nil) offset:-281474868767984
1947 11:01:31.355977 # ==>> completed. PASS(1)
1948 11:01:31.451049 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el1h
1949 11:01:32.463273 # timeout set to 45
1950 11:01:32.466019 # selftests: arm64: mangle_pstate_invalid_mode_el1t
1951 11:01:33.697421 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
1952 11:01:33.699830 # Registered handlers for all signals.
1953 11:01:33.700926 # Detected MINSTKSIGSZ:4720
1954 11:01:33.701485 # Testcase initialized.
1955 11:01:33.703238 # uc context validated.
1956 11:01:33.705551 # Handled SIG_TRIG
1957 11:01:33.709597 # SIG_OK -- SP:0xFFFFDB49DBA0 si_addr@:0xffffdb49dba0 si_code:2 token@:(nil) offset:-281474360794016
1958 11:01:33.710730 # ==>> completed. PASS(1)
1959 11:01:33.807676 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el1t
1960 11:01:34.827731 # timeout set to 45
1961 11:01:34.831093 # selftests: arm64: mangle_pstate_invalid_mode_el2h
1962 11:01:35.997892 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
1963 11:01:36.000191 # Registered handlers for all signals.
1964 11:01:36.001382 # Detected MINSTKSIGSZ:4720
1965 11:01:36.003662 # Testcase initialized.
1966 11:01:36.004827 # uc context validated.
1967 11:01:36.007137 # Handled SIG_TRIG
1968 11:01:36.009445 # SIG_OK -- SP:0xFFFFD447F670 si_addr@:0xffffd447f670 si_code:2 token@:(nil) offset:-281474243229296
1969 11:01:36.010031 # ==>> completed. PASS(1)
1970 11:01:36.114509 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el2h
1971 11:01:37.244105 # timeout set to 45
1972 11:01:37.248453 # selftests: arm64: mangle_pstate_invalid_mode_el2t
1973 11:01:38.580090 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
1974 11:01:38.584083 # Registered handlers for all signals.
1975 11:01:38.585851 # Detected MINSTKSIGSZ:4720
1976 11:01:38.588116 # Testcase initialized.
1977 11:01:38.589864 # uc context validated.
1978 11:01:38.591598 # Handled SIG_TRIG
1979 11:01:38.595591 # SIG_OK -- SP:0xFFFFF40A5890 si_addr@:0xfffff40a5890 si_code:2 token@:(nil) offset:-281474776062096
1980 11:01:38.596692 # ==>> completed. PASS(1)
1981 11:01:38.721348 ok 19 selftests: arm64: mangle_pstate_invalid_mode_el2t
1982 11:01:39.791994 # timeout set to 45
1983 11:01:39.796267 # selftests: arm64: mangle_pstate_invalid_mode_el3h
1984 11:01:41.138580 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
1985 11:01:41.141438 # Registered handlers for all signals.
1986 11:01:41.143727 # Detected MINSTKSIGSZ:4720
1987 11:01:41.145444 # Testcase initialized.
1988 11:01:41.147199 # uc context validated.
1989 11:01:41.148377 # Handled SIG_TRIG
1990 11:01:41.150700 # SIG_OK -- SP:0xFFFFF668EA40 si_addr@:0xfffff668ea40 si_code:2 token@:(nil) offset:-281474815814208
1991 11:01:41.151284 # ==>> completed. PASS(1)
1992 11:01:41.249185 ok 20 selftests: arm64: mangle_pstate_invalid_mode_el3h
1993 11:01:42.223403 # timeout set to 45
1994 11:01:42.226226 # selftests: arm64: mangle_pstate_invalid_mode_el3t
1995 11:01:43.426517 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
1996 11:01:43.428191 # Registered handlers for all signals.
1997 11:01:43.428764 # Detected MINSTKSIGSZ:4720
1998 11:01:43.429959 # Testcase initialized.
1999 11:01:43.431082 # uc context validated.
2000 11:01:43.432801 # Handled SIG_TRIG
2001 11:01:43.436815 # SIG_OK -- SP:0xFFFFE5E843A0 si_addr@:0xffffe5e843a0 si_code:2 token@:(nil) offset:-281474538947488
2002 11:01:43.437983 # ==>> completed. PASS(1)
2003 11:01:43.538642 ok 21 selftests: arm64: mangle_pstate_invalid_mode_el3t
2004 11:01:44.639575 # timeout set to 45
2005 11:01:44.642912 # selftests: arm64: poe_siginfo
2006 11:01:45.983009 # # POR_EL0 :: Validate that POR_EL0 is present as expected
2007 11:01:45.985799 # Registered handlers for all signals.
2008 11:01:45.987003 # Detected MINSTKSIGSZ:4720
2009 11:01:45.987571 # Testcase initialized.
2010 11:01:45.988718 # uc context validated.
2011 11:01:45.991795 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2012 11:01:45.993729 # Handled SIG_COPYCTX
2013 11:01:45.997463 # POR_EL0 sigframe absent on system without POE
2014 11:01:45.998606 # ==>> completed. PASS(1)
2015 11:01:46.113540 ok 22 selftests: arm64: poe_siginfo
2016 11:01:47.087651 # timeout set to 45
2017 11:01:47.090405 # selftests: arm64: sme_trap_no_sm
2018 11:01:48.297733 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
2019 11:01:48.298888 # Registered handlers for all signals.
2020 11:01:48.299028 # Detected MINSTKSIGSZ:4720
2021 11:01:48.299465 # Required Features: [ SME ] supported
2022 11:01:48.300042 # Incompatible Features: [] absent
2023 11:01:48.300622 # Testcase initialized.
2024 11:01:48.301788 # SIG_OK -- SP:0xFFFFD5FC8800 si_addr@:0xaaaab4161024 si_code:1 token@:(nil) offset:-187650142507044
2025 11:01:48.302974 # ==>> completed. PASS(1)
2026 11:01:48.403518 ok 23 selftests: arm64: sme_trap_no_sm
2027 11:01:49.414090 # timeout set to 45
2028 11:01:49.417412 # selftests: arm64: sme_trap_non_streaming
2029 11:01:50.641288 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
2030 11:01:50.642392 # Registered handlers for all signals.
2031 11:01:50.644083 # Detected MINSTKSIGSZ:4720
2032 11:01:50.646947 # Required Features: [ SME ] supported
2033 11:01:50.650217 # Incompatible Features: [ FA64 ] absent
2034 11:01:50.652475 # Testcase initialized.
2035 11:01:50.654149 # SIG_OK -- SP:0xFFFFF31E7AF0 si_addr@:0xaaaae8d91024 si_code:1 token@:(nil) offset:-187651027701796
2036 11:01:50.655817 # ==>> completed. PASS(1)
2037 11:01:50.752082 ok 24 selftests: arm64: sme_trap_non_streaming
2038 11:01:51.799332 # timeout set to 45
2039 11:01:51.802582 # selftests: arm64: sme_trap_za
2040 11:01:53.087491 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
2041 11:01:53.088635 # Registered handlers for all signals.
2042 11:01:53.089232 # Detected MINSTKSIGSZ:4720
2043 11:01:53.089789 # Testcase initialized.
2044 11:01:53.093228 # SIG_OK -- SP:0xFFFFC44A0DA0 si_addr@:0xaaaadc181020 si_code:1 token@:(nil) offset:-187650813726752
2045 11:01:53.094907 # ==>> completed. PASS(1)
2046 11:01:53.220220 ok 25 selftests: arm64: sme_trap_za
2047 11:01:54.250700 # timeout set to 45
2048 11:01:54.254697 # selftests: arm64: sme_vl
2049 11:01:55.463236 # # SME VL :: Check that we get the right SME VL reported
2050 11:01:55.467787 # Registered handlers for all signals.
2051 11:01:55.470520 # Detected MINSTKSIGSZ:4720
2052 11:01:55.473947 # Required Features: [ SME ] supported
2053 11:01:55.475078 # Incompatible Features: [] absent
2054 11:01:55.476767 # Testcase initialized.
2055 11:01:55.477308 # uc context validated.
2056 11:01:55.479035 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2057 11:01:55.480170 # Handled SIG_COPYCTX
2058 11:01:55.480271 # got expected VL 32
2059 11:01:55.480721 # ==>> completed. PASS(1)
2060 11:01:55.587944 ok 26 selftests: arm64: sme_vl
2061 11:01:56.650963 # timeout set to 45
2062 11:01:56.654397 # selftests: arm64: ssve_regs
2063 11:01:57.955055 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
2064 11:01:57.956755 # Registered handlers for all signals.
2065 11:01:57.957934 # Detected MINSTKSIGSZ:4720
2066 11:01:57.958721 # Required Features: [ SME ] supported
2067 11:01:57.959087 # Incompatible Features: [] absent
2068 11:01:57.959676 # Testcase initialized.
2069 11:01:57.959784 # Testing VL 64
2070 11:01:57.960253 # uc context validated.
2071 11:01:57.960831 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2072 11:01:57.960942 # Handled SIG_COPYCTX
2073 11:01:57.961408 # Got expected size 2208 and VL 64
2074 11:01:57.961515 # Testing VL 32
2075 11:01:57.962576 # uc context validated.
2076 11:01:57.964886 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2077 11:01:57.966594 # Handled SIG_COPYCTX
2078 11:01:57.968896 # Got expected size 1120 and VL 32
2079 11:01:57.970021 # Testing VL 16
2080 11:01:57.971172 # uc context validated.
2081 11:01:57.972337 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2082 11:01:57.972904 # Handled SIG_COPYCTX
2083 11:01:57.973483 # Got expected size 576 and VL 16
2084 11:01:57.973591 # ==>> completed. PASS(1)
2085 11:01:58.063496 ok 27 selftests: arm64: ssve_regs
2086 11:01:59.036445 # timeout set to 45
2087 11:01:59.039709 # selftests: arm64: ssve_za_regs
2088 11:02:00.393235 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
2089 11:02:00.394402 # Registered handlers for all signals.
2090 11:02:00.394980 # Detected MINSTKSIGSZ:4720
2091 11:02:00.395561 # Required Features: [ SME ] supported
2092 11:02:00.398427 # Incompatible Features: [] absent
2093 11:02:00.400165 # Testcase initialized.
2094 11:02:00.401892 # Testing VL 64
2095 11:02:00.404734 # Validating EXTRA...
2096 11:02:00.405896 # uc context validated.
2097 11:02:00.407041 # 7392 byte GOOD CONTEXT grabbed from sig_copyctx handler
2098 11:02:00.408200 # Handled SIG_COPYCTX
2099 11:02:00.409367 # Got expected SSVE size 2208 and VL 64
2100 11:02:00.409487 # Got expected ZA size 4112 and VL 64
2101 11:02:00.409975 # Testing VL 32
2102 11:02:00.410088 # uc context validated.
2103 11:02:00.410189 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2104 11:02:00.410530 # Handled SIG_COPYCTX
2105 11:02:00.410642 # Got expected SSVE size 1120 and VL 32
2106 11:02:00.411110 # Got expected ZA size 1040 and VL 32
2107 11:02:00.411223 # Testing VL 16
2108 11:02:00.411323 # uc context validated.
2109 11:02:00.411799 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2110 11:02:00.411911 # Handled SIG_COPYCTX
2111 11:02:00.412009 # Got expected SSVE size 576 and VL 16
2112 11:02:00.412307 # Got expected ZA size 272 and VL 16
2113 11:02:00.412417 # ==>> completed. PASS(1)
2114 11:02:00.495539 ok 28 selftests: arm64: ssve_za_regs
2115 11:02:01.478365 # timeout set to 45
2116 11:02:01.481732 # selftests: arm64: sve_regs
2117 11:02:02.951269 # # SVE registers :: Check that we get the right SVE registers reported
2118 11:02:02.954133 # Registered handlers for all signals.
2119 11:02:02.955800 # Detected MINSTKSIGSZ:4720
2120 11:02:02.958046 # Required Features: [ SVE ] supported
2121 11:02:02.960303 # Incompatible Features: [] absent
2122 11:02:02.961420 # Testcase initialized.
2123 11:02:02.963647 # Testing VL 64
2124 11:02:02.964759 # uc context validated.
2125 11:02:02.965899 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2126 11:02:02.967007 # Handled SIG_COPYCTX
2127 11:02:02.968135 # Got expected size 2208 and VL 64
2128 11:02:02.968701 # Testing VL 32
2129 11:02:02.968837 # uc context validated.
2130 11:02:02.969257 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2131 11:02:02.969406 # Handled SIG_COPYCTX
2132 11:02:02.969521 # Got expected size 1120 and VL 32
2133 11:02:02.969831 # Testing VL 16
2134 11:02:02.969959 # uc context validated.
2135 11:02:02.970060 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2136 11:02:02.970381 # Handled SIG_COPYCTX
2137 11:02:02.970495 # Got expected size 576 and VL 16
2138 11:02:02.970596 # ==>> completed. PASS(1)
2139 11:02:03.066457 ok 29 selftests: arm64: sve_regs
2140 11:02:04.072567 # timeout set to 45
2141 11:02:04.075243 # selftests: arm64: sve_vl
2142 11:02:05.335751 # # SVE VL :: Check that we get the right SVE VL reported
2143 11:02:05.338019 # Registered handlers for all signals.
2144 11:02:05.339723 # Detected MINSTKSIGSZ:4720
2145 11:02:05.340268 # Required Features: [ SVE ] supported
2146 11:02:05.340861 # Incompatible Features: [] absent
2147 11:02:05.341437 # Testcase initialized.
2148 11:02:05.343174 # uc context validated.
2149 11:02:05.345447 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2150 11:02:05.347717 # Handled SIG_COPYCTX
2151 11:02:05.348857 # got expected VL 64
2152 11:02:05.350012 # ==>> completed. PASS(1)
2153 11:02:05.442164 ok 30 selftests: arm64: sve_vl
2154 11:02:06.413006 # timeout set to 45
2155 11:02:06.415953 # selftests: arm64: tpidr2_restore
2156 11:02:07.579479 # # TPIDR2 restore :: Validate that TPIDR2 is restored from the sigframe
2157 11:02:07.580053 # Registered handlers for all signals.
2158 11:02:07.580618 # Detected MINSTKSIGSZ:4720
2159 11:02:07.581794 # Required Features: [ SME ] supported
2160 11:02:07.584636 # Incompatible Features: [] absent
2161 11:02:07.585788 # Initial TPIDR2: 0
2162 11:02:07.588092 # Testcase initialized.
2163 11:02:07.589791 # Setting TPIDR2 to 1
2164 11:02:07.590414 # Handled SIG_TRIG
2165 11:02:07.590999 # TPIDR2 restored
2166 11:02:07.592675 # ==>> completed. PASS(1)
2167 11:02:07.701430 ok 31 selftests: arm64: tpidr2_restore
2168 11:02:08.678143 # timeout set to 45
2169 11:02:08.681220 # selftests: arm64: tpidr2_siginfo
2170 11:02:09.951678 # # TPIDR2 :: Validate that TPIDR2 is present as expected
2171 11:02:09.954483 # Registered handlers for all signals.
2172 11:02:09.955583 # Detected MINSTKSIGSZ:4720
2173 11:02:09.956134 # Testcase initialized.
2174 11:02:09.957846 # uc context validated.
2175 11:02:09.960106 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2176 11:02:09.962345 # Handled SIG_COPYCTX
2177 11:02:09.964021 # TPIDR2 sigframe present on system with SME
2178 11:02:09.965694 # ==>> completed. PASS(1)
2179 11:02:10.057754 ok 32 selftests: arm64: tpidr2_siginfo
2180 11:02:11.055113 # timeout set to 45
2181 11:02:11.058434 # selftests: arm64: za_no_regs
2182 11:02:12.386171 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
2183 11:02:12.390069 # Registered handlers for all signals.
2184 11:02:12.392319 # Detected MINSTKSIGSZ:4720
2185 11:02:12.394025 # Required Features: [ SME ] supported
2186 11:02:12.396296 # Incompatible Features: [] absent
2187 11:02:12.398000 # Testcase initialized.
2188 11:02:12.400276 # Testing VL 64
2189 11:02:12.404737 # uc context validated.
2190 11:02:12.407035 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2191 11:02:12.408701 # Handled SIG_COPYCTX
2192 11:02:12.410965 # Got expected size 16 and VL 64
2193 11:02:12.411550 # Testing VL 32
2194 11:02:12.412094 # uc context validated.
2195 11:02:12.412212 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2196 11:02:12.412314 # Handled SIG_COPYCTX
2197 11:02:12.412715 # Got expected size 16 and VL 32
2198 11:02:12.412954 # Testing VL 16
2199 11:02:12.413127 # uc context validated.
2200 11:02:12.413526 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2201 11:02:12.413664 # Handled SIG_COPYCTX
2202 11:02:12.413873 # Got expected size 16 and VL 16
2203 11:02:12.414016 # ==>> completed. PASS(1)
2204 11:02:12.518653 ok 33 selftests: arm64: za_no_regs
2205 11:02:13.542077 # timeout set to 45
2206 11:02:13.545596 # selftests: arm64: za_regs
2207 11:02:14.815633 # # ZA register :: Check that we get the right ZA registers reported
2208 11:02:14.817864 # Registered handlers for all signals.
2209 11:02:14.818453 # Detected MINSTKSIGSZ:4720
2210 11:02:14.820144 # Required Features: [ SME ] supported
2211 11:02:14.822403 # Incompatible Features: [] absent
2212 11:02:14.824678 # Testcase initialized.
2213 11:02:14.826388 # Testing VL 64
2214 11:02:14.827515 # Validating EXTRA...
2215 11:02:14.828639 # uc context validated.
2216 11:02:14.829762 # 5200 byte GOOD CONTEXT grabbed from sig_copyctx handler
2217 11:02:14.831462 # Handled SIG_COPYCTX
2218 11:02:14.841007 # Got expected size 4112 and VL 64
2219 11:02:14.842151 # Testing VL 32
2220 11:02:14.842299 # uc context validated.
2221 11:02:14.842411 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2222 11:02:14.842757 # Handled SIG_COPYCTX
2223 11:02:14.842944 # Got expected size 1040 and VL 32
2224 11:02:14.843115 # Testing VL 16
2225 11:02:14.843312 # uc context validated.
2226 11:02:14.843479 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
2227 11:02:14.843887 # Handled SIG_COPYCTX
2228 11:02:14.844022 # Got expected size 272 and VL 16
2229 11:02:14.844488 # ==>> completed. PASS(1)
2230 11:02:14.943430 ok 34 selftests: arm64: za_regs
2231 11:02:15.887998 # timeout set to 45
2232 11:02:15.890973 # selftests: arm64: zt_no_regs
2233 11:02:17.068315 # # ZT register data not present :: Validate that ZT is not present when ZA is disabled
2234 11:02:17.070003 # Registered handlers for all signals.
2235 11:02:17.070583 # Detected MINSTKSIGSZ:4720
2236 11:02:17.071713 # Required Features: [ SME2 ] NOT supported
2237 11:02:17.073430 # ==>> completed. SKIP.
2238 11:02:17.241864 ok 35 selftests: arm64: zt_no_regs # SKIP
2239 11:02:18.222849 # timeout set to 45
2240 11:02:18.225924 # selftests: arm64: zt_regs
2241 11:02:19.380437 # # ZT register data :: Validate that ZT is present and has data when ZA is enabled
2242 11:02:19.382160 # Registered handlers for all signals.
2243 11:02:19.383256 # Detected MINSTKSIGSZ:4720
2244 11:02:19.383830 # Required Features: [ SME2 ] NOT supported
2245 11:02:19.384393 # ==>> completed. SKIP.
2246 11:02:19.546253 ok 36 selftests: arm64: zt_regs # SKIP
2247 11:02:20.552205 # timeout set to 45
2248 11:02:20.555044 # selftests: arm64: pac
2249 11:02:23.829777 # TAP version 13
2250 11:02:23.831487 # 1..7
2251 11:02:23.833683 # # Starting 7 tests from 1 test cases.
2252 11:02:23.835969 # # RUN global.corrupt_pac ...
2253 11:02:23.844376 # # OK global.corrupt_pac
2254 11:02:23.847781 # ok 1 global.corrupt_pac
2255 11:02:23.850056 # # RUN global.pac_instructions_not_nop ...
2256 11:02:23.851763 # # OK global.pac_instructions_not_nop
2257 11:02:23.852340 # ok 2 global.pac_instructions_not_nop
2258 11:02:23.854053 # # RUN global.pac_instructions_not_nop_generic ...
2259 11:02:23.854664 # # OK global.pac_instructions_not_nop_generic
2260 11:02:23.854804 # ok 3 global.pac_instructions_not_nop_generic
2261 11:02:23.854916 # # RUN global.single_thread_different_keys ...
2262 11:02:23.855258 # # OK global.single_thread_different_keys
2263 11:02:23.855408 # ok 4 global.single_thread_different_keys
2264 11:02:23.855521 # # RUN global.exec_changed_keys ...
2265 11:02:23.855854 # # OK global.exec_changed_keys
2266 11:02:23.855993 # ok 5 global.exec_changed_keys
2267 11:02:23.856100 # # RUN global.context_switch_keep_keys ...
2268 11:02:23.856434 # # OK global.context_switch_keep_keys
2269 11:02:23.856574 # ok 6 global.context_switch_keep_keys
2270 11:02:23.856966 # # RUN global.context_switch_keep_keys_generic ...
2271 11:02:23.857115 # # OK global.context_switch_keep_keys_generic
2272 11:02:23.857661 # ok 7 global.context_switch_keep_keys_generic
2273 11:02:23.857810 # # PASSED: 7 / 7 tests passed.
2274 11:02:23.857957 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
2275 11:02:24.009371 ok 37 selftests: arm64: pac
2276 11:02:24.946408 # timeout set to 45
2277 11:02:24.951476 # selftests: arm64: fp-ptrace
2278 11:03:13.750407 # TAP version 13
2279 11:03:13.751511 # # 3 SVE VLs, using 64 and 16
2280 11:03:13.752650 # # 3 SME VLs, using 64 and 16
2281 11:03:13.753809 # 1..252
2282 11:03:13.755512 # ok 1 No writes, SVE 64->64, SME 64/0->64/0
2283 11:03:13.755655 # ok 2 FPSIMD write, SVE 64->64, SME 64/0->64/0
2284 11:03:13.756085 # ok 3 SVE write, SVE 64->64, SME 64/0->64/0
2285 11:03:13.756239 # ok 4 # SKIP No writes, SVE 64->16, SME 64/0->64/0
2286 11:03:13.756648 # ok 5 # SKIP FPSIMD write, SVE 64->16, SME 64/0->64/0
2287 11:03:13.756786 # ok 6 SVE write, SVE 64->16, SME 64/0->64/0
2288 11:03:13.757309 # ok 7 # SKIP No writes, SVE 16->64, SME 64/0->64/0
2289 11:03:13.757447 # ok 8 # SKIP FPSIMD write, SVE 16->64, SME 64/0->64/0
2290 11:03:13.758938 # ok 9 SVE write, SVE 16->64, SME 64/0->64/0
2291 11:03:13.759510 # ok 10 No writes, SVE 16->16, SME 64/0->64/0
2292 11:03:13.765158 # ok 11 FPSIMD write, SVE 16->16, SME 64/0->64/0
2293 11:03:13.775850 # ok 12 SVE write, SVE 16->16, SME 64/0->64/0
2294 11:03:13.781415 # ok 13 No writes, SVE 64->64, SME 64/0->64/0
2295 11:03:13.785334 # ok 14 FPSIMD write, SVE 64->64, SME 64/0->64/0
2296 11:03:13.793743 # ok 15 SVE write, SVE 64->64, SME 64/0->64/0
2297 11:03:13.802171 # ok 16 ZA write, SVE 64->64, SME 64/0->64/0
2298 11:03:13.806108 # ok 17 # SKIP No writes, SVE 64->64, SME 64/0->64/1
2299 11:03:13.815168 # ok 18 # SKIP FPSIMD write, SVE 64->64, SME 64/0->64/1
2300 11:03:13.825746 # ok 19 SVE write, SVE 64->64, SME 64/0->64/1
2301 11:03:13.827404 # ok 20 # SKIP ZA write, SVE 64->64, SME 64/0->64/1
2302 11:03:13.836461 # ok 21 # SKIP No writes, SVE 64->64, SME 64/0->64/2
2303 11:03:13.848265 # ok 22 # SKIP FPSIMD write, SVE 64->64, SME 64/0->64/2
2304 11:03:13.849404 # ok 23 # SKIP SVE write, SVE 64->64, SME 64/0->64/2
2305 11:03:13.849548 # ok 24 ZA write, SVE 64->64, SME 64/0->64/2
2306 11:03:13.852804 # ok 25 # SKIP No writes, SVE 64->64, SME 64/1->64/0
2307 11:03:13.853980 # ok 26 # SKIP FPSIMD write, SVE 64->64, SME 64/1->64/0
2308 11:03:13.855708 # ok 27 SVE write, SVE 64->64, SME 64/1->64/0
2309 11:03:13.856279 # ok 28 # SKIP ZA write, SVE 64->64, SME 64/1->64/0
2310 11:03:13.857432 # ok 29 No writes, SVE 64->64, SME 64/1->64/1
2311 11:03:13.859153 # ok 30 FPSIMD write, SVE 64->64, SME 64/1->64/1
2312 11:03:13.859292 # ok 31 SVE write, SVE 64->64, SME 64/1->64/1
2313 11:03:13.859742 # ok 32 ZA write, SVE 64->64, SME 64/1->64/1
2314 11:03:13.859883 # ok 33 # SKIP No writes, SVE 64->64, SME 64/1->64/2
2315 11:03:13.860317 # ok 34 # SKIP FPSIMD write, SVE 64->64, SME 64/1->64/2
2316 11:03:13.861458 # ok 35 # SKIP SVE write, SVE 64->64, SME 64/1->64/2
2317 11:03:13.862030 # ok 36 # SKIP ZA write, SVE 64->64, SME 64/1->64/2
2318 11:03:13.862168 # ok 37 # SKIP No writes, SVE 64->64, SME 64/1->64/3
2319 11:03:13.867670 # ok 38 # SKIP FPSIMD write, SVE 64->64, SME 64/1->64/3
2320 11:03:13.871623 # ok 39 # SKIP SVE write, SVE 64->64, SME 64/1->64/3
2321 11:03:13.873930 # ok 40 ZA write, SVE 64->64, SME 64/1->64/3
2322 11:03:13.874072 # ok 41 # SKIP No writes, SVE 64->64, SME 64/2->64/0
2323 11:03:13.874516 # ok 42 # SKIP FPSIMD write, SVE 64->64, SME 64/2->64/0
2324 11:03:13.874657 # ok 43 # SKIP SVE write, SVE 64->64, SME 64/2->64/0
2325 11:03:13.875083 # ok 44 ZA write, SVE 64->64, SME 64/2->64/0
2326 11:03:13.875653 # ok 45 # SKIP No writes, SVE 64->64, SME 64/2->64/1
2327 11:03:13.875787 # ok 46 # SKIP FPSIMD write, SVE 64->64, SME 64/2->64/1
2328 11:03:13.876239 # ok 47 # SKIP SVE write, SVE 64->64, SME 64/2->64/1
2329 11:03:13.876386 # ok 48 # SKIP ZA write, SVE 64->64, SME 64/2->64/1
2330 11:03:13.878000 # ok 49 No writes, SVE 64->64, SME 64/2->64/2
2331 11:03:13.878138 # ok 50 FPSIMD write, SVE 64->64, SME 64/2->64/2
2332 11:03:13.878572 # ok 51 SVE write, SVE 64->64, SME 64/2->64/2
2333 11:03:13.878911 # ok 52 ZA write, SVE 64->64, SME 64/2->64/2
2334 11:03:13.879293 # ok 53 # SKIP No writes, SVE 64->64, SME 64/2->64/3
2335 11:03:13.879433 # ok 54 # SKIP FPSIMD write, SVE 64->64, SME 64/2->64/3
2336 11:03:13.879804 # ok 55 SVE write, SVE 64->64, SME 64/2->64/3
2337 11:03:13.879943 # ok 56 # SKIP ZA write, SVE 64->64, SME 64/2->64/3
2338 11:03:13.880290 # ok 57 # SKIP No writes, SVE 64->64, SME 64/3->64/0
2339 11:03:13.880449 # ok 58 # SKIP FPSIMD write, SVE 64->64, SME 64/3->64/0
2340 11:03:13.880910 # ok 59 # SKIP SVE write, SVE 64->64, SME 64/3->64/0
2341 11:03:13.881251 # ok 60 # SKIP ZA write, SVE 64->64, SME 64/3->64/0
2342 11:03:13.881636 # ok 61 # SKIP No writes, SVE 64->64, SME 64/3->64/1
2343 11:03:13.881776 # ok 62 # SKIP FPSIMD write, SVE 64->64, SME 64/3->64/1
2344 11:03:13.881921 # ok 63 # SKIP SVE write, SVE 64->64, SME 64/3->64/1
2345 11:03:13.882125 # ok 64 ZA write, SVE 64->64, SME 64/3->64/1
2346 11:03:13.882247 # ok 65 # SKIP No writes, SVE 64->64, SME 64/3->64/2
2347 11:03:13.882612 # ok 66 # SKIP FPSIMD write, SVE 64->64, SME 64/3->64/2
2348 11:03:13.882946 # ok 67 SVE write, SVE 64->64, SME 64/3->64/2
2349 11:03:13.884346 # ok 68 # SKIP ZA write, SVE 64->64, SME 64/3->64/2
2350 11:03:13.884489 # ok 69 No writes, SVE 64->64, SME 64/3->64/3
2351 11:03:13.884952 # ok 70 FPSIMD write, SVE 64->64, SME 64/3->64/3
2352 11:03:13.885093 # ok 71 SVE write, SVE 64->64, SME 64/3->64/3
2353 11:03:13.885532 # ok 72 ZA write, SVE 64->64, SME 64/3->64/3
2354 11:03:13.885672 # ok 73 # SKIP No writes, SVE 64->64, SME 64/0->16/0
2355 11:03:13.885779 # ok 74 # SKIP FPSIMD write, SVE 64->64, SME 64/0->16/0
2356 11:03:13.886110 # ok 75 # SKIP SVE write, SVE 64->64, SME 64/0->16/0
2357 11:03:13.886267 # ok 76 ZA write, SVE 64->64, SME 64/0->16/0
2358 11:03:13.886720 # ok 77 # SKIP No writes, SVE 64->64, SME 64/0->16/1
2359 11:03:13.886864 # ok 78 # SKIP FPSIMD write, SVE 64->64, SME 64/0->16/1
2360 11:03:13.887285 # ok 79 SVE write, SVE 64->64, SME 64/0->16/1
2361 11:03:24.841138 # ok 80 # SKIP ZA write, SVE 64->64, SME 64/0->16/1
2362 11:03:24.842269 # ok 81 # SKIP No writes, SVE 64->64, SME 64/0->16/2
2363 11:03:24.843419 # ok 82 # SKIP FPSIMD write, SVE 64->64, SME 64/0->16/2
2364 11:03:24.845700 # ok 83 # SKIP SVE write, SVE 64->64, SME 64/0->16/2
2365 11:03:24.847415 # ok 84 ZA write, SVE 64->64, SME 64/0->16/2
2366 11:03:24.858700 # ok 85 # SKIP No writes, SVE 64->64, SME 64/1->16/0
2367 11:03:24.861980 # ok 86 # SKIP FPSIMD write, SVE 64->64, SME 64/1->16/0
2368 11:03:24.863139 # ok 87 # SKIP SVE write, SVE 64->64, SME 64/1->16/0
2369 11:03:24.863692 # ok 88 # SKIP ZA write, SVE 64->64, SME 64/1->16/0
2370 11:03:24.864260 # ok 89 # SKIP No writes, SVE 64->64, SME 64/1->16/1
2371 11:03:24.864831 # ok 90 # SKIP FPSIMD write, SVE 64->64, SME 64/1->16/1
2372 11:03:24.864967 # ok 91 SVE write, SVE 64->64, SME 64/1->16/1
2373 11:03:24.865418 # ok 92 # SKIP ZA write, SVE 64->64, SME 64/1->16/1
2374 11:03:24.865699 # ok 93 # SKIP No writes, SVE 64->64, SME 64/1->16/2
2375 11:03:24.867306 # ok 94 # SKIP FPSIMD write, SVE 64->64, SME 64/1->16/2
2376 11:03:24.867937 # ok 95 # SKIP SVE write, SVE 64->64, SME 64/1->16/2
2377 11:03:24.869479 # ok 96 # SKIP ZA write, SVE 64->64, SME 64/1->16/2
2378 11:03:24.877445 # ok 97 # SKIP No writes, SVE 64->64, SME 64/1->16/3
2379 11:03:24.888664 # ok 98 # SKIP FPSIMD write, SVE 64->64, SME 64/1->16/3
2380 11:03:24.890892 # ok 99 # SKIP SVE write, SVE 64->64, SME 64/1->16/3
2381 11:03:24.899409 # ok 100 # SKIP ZA write, SVE 64->64, SME 64/1->16/3
2382 11:03:24.910621 # ok 101 # SKIP No writes, SVE 64->64, SME 64/2->16/0
2383 11:03:24.912874 # ok 102 # SKIP FPSIMD write, SVE 64->64, SME 64/2->16/0
2384 11:03:24.921365 # ok 103 # SKIP SVE write, SVE 64->64, SME 64/2->16/0
2385 11:03:24.929218 # ok 104 ZA write, SVE 64->64, SME 64/2->16/0
2386 11:03:24.933748 # ok 105 # SKIP No writes, SVE 64->64, SME 64/2->16/1
2387 11:03:24.942263 # ok 106 # SKIP FPSIMD write, SVE 64->64, SME 64/2->16/1
2388 11:03:24.954000 # ok 107 # SKIP SVE write, SVE 64->64, SME 64/2->16/1
2389 11:03:24.955122 # ok 108 # SKIP ZA write, SVE 64->64, SME 64/2->16/1
2390 11:03:24.958007 # ok 109 # SKIP No writes, SVE 64->64, SME 64/2->16/2
2391 11:03:24.959112 # ok 110 # SKIP FPSIMD write, SVE 64->64, SME 64/2->16/2
2392 11:03:24.960820 # ok 111 # SKIP SVE write, SVE 64->64, SME 64/2->16/2
2393 11:03:24.961417 # ok 112 ZA write, SVE 64->64, SME 64/2->16/2
2394 11:03:24.962568 # ok 113 # SKIP No writes, SVE 64->64, SME 64/2->16/3
2395 11:03:24.963702 # ok 114 # SKIP FPSIMD write, SVE 64->64, SME 64/2->16/3
2396 11:03:24.964273 # ok 115 # SKIP SVE write, SVE 64->64, SME 64/2->16/3
2397 11:03:24.964854 # ok 116 # SKIP ZA write, SVE 64->64, SME 64/2->16/3
2398 11:03:24.964999 # ok 117 # SKIP No writes, SVE 64->64, SME 64/3->16/0
2399 11:03:24.965429 # ok 118 # SKIP FPSIMD write, SVE 64->64, SME 64/3->16/0
2400 11:03:24.966024 # ok 119 # SKIP SVE write, SVE 64->64, SME 64/3->16/0
2401 11:03:24.966167 # ok 120 # SKIP ZA write, SVE 64->64, SME 64/3->16/0
2402 11:03:24.966578 # ok 121 # SKIP No writes, SVE 64->64, SME 64/3->16/1
2403 11:03:24.966715 # ok 122 # SKIP FPSIMD write, SVE 64->64, SME 64/3->16/1
2404 11:03:24.967150 # ok 123 # SKIP SVE write, SVE 64->64, SME 64/3->16/1
2405 11:03:24.967286 # ok 124 # SKIP ZA write, SVE 64->64, SME 64/3->16/1
2406 11:03:24.967752 # ok 125 # SKIP No writes, SVE 64->64, SME 64/3->16/2
2407 11:03:24.967894 # ok 126 # SKIP FPSIMD write, SVE 64->64, SME 64/3->16/2
2408 11:03:24.968422 # ok 127 # SKIP SVE write, SVE 64->64, SME 64/3->16/2
2409 11:03:24.968556 # ok 128 # SKIP ZA write, SVE 64->64, SME 64/3->16/2
2410 11:03:24.968899 # ok 129 # SKIP No writes, SVE 64->64, SME 64/3->16/3
2411 11:03:24.969034 # ok 130 # SKIP FPSIMD write, SVE 64->64, SME 64/3->16/3
2412 11:03:24.969461 # ok 131 # SKIP SVE write, SVE 64->64, SME 64/3->16/3
2413 11:03:24.970606 # ok 132 # SKIP ZA write, SVE 64->64, SME 64/3->16/3
2414 11:03:24.970742 # ok 133 # SKIP No writes, SVE 64->64, SME 16/0->64/0
2415 11:03:24.971183 # ok 134 # SKIP FPSIMD write, SVE 64->64, SME 16/0->64/0
2416 11:03:24.971320 # ok 135 # SKIP SVE write, SVE 64->64, SME 16/0->64/0
2417 11:03:24.971752 # ok 136 ZA write, SVE 64->64, SME 16/0->64/0
2418 11:03:24.972320 # ok 137 # SKIP No writes, SVE 64->64, SME 16/0->64/1
2419 11:03:24.972453 # ok 138 # SKIP FPSIMD write, SVE 64->64, SME 16/0->64/1
2420 11:03:24.972898 # ok 139 SVE write, SVE 64->64, SME 16/0->64/1
2421 11:03:24.973037 # ok 140 # SKIP ZA write, SVE 64->64, SME 16/0->64/1
2422 11:03:24.973465 # ok 141 # SKIP No writes, SVE 64->64, SME 16/0->64/2
2423 11:03:24.973805 # ok 142 # SKIP FPSIMD write, SVE 64->64, SME 16/0->64/2
2424 11:03:24.974166 # ok 143 # SKIP SVE write, SVE 64->64, SME 16/0->64/2
2425 11:03:24.974297 # ok 144 ZA write, SVE 64->64, SME 16/0->64/2
2426 11:03:24.974630 # ok 145 # SKIP No writes, SVE 64->64, SME 16/1->64/0
2427 11:03:24.974760 # ok 146 # SKIP FPSIMD write, SVE 64->64, SME 16/1->64/0
2428 11:03:24.975180 # ok 147 # SKIP SVE write, SVE 64->64, SME 16/1->64/0
2429 11:03:24.975313 # ok 148 # SKIP ZA write, SVE 64->64, SME 16/1->64/0
2430 11:03:24.975753 # ok 149 # SKIP No writes, SVE 64->64, SME 16/1->64/1
2431 11:03:24.976311 # ok 150 # SKIP FPSIMD write, SVE 64->64, SME 16/1->64/1
2432 11:03:24.976890 # ok 151 SVE write, SVE 64->64, SME 16/1->64/1
2433 11:03:24.977462 # ok 152 # SKIP ZA write, SVE 64->64, SME 16/1->64/1
2434 11:03:24.977793 # ok 153 # SKIP No writes, SVE 64->64, SME 16/1->64/2
2435 11:03:24.978155 # ok 154 # SKIP FPSIMD write, SVE 64->64, SME 16/1->64/2
2436 11:03:24.978613 # ok 155 # SKIP SVE write, SVE 64->64, SME 16/1->64/2
2437 11:03:49.469881 # ok 156 # SKIP ZA write, SVE 64->64, SME 16/1->64/2
2438 11:03:49.470345 # ok 157 # SKIP No writes, SVE 64->64, SME 16/1->64/3
2439 11:03:49.470481 # ok 158 # SKIP FPSIMD write, SVE 64->64, SME 16/1->64/3
2440 11:03:49.470846 # ok 159 # SKIP SVE write, SVE 64->64, SME 16/1->64/3
2441 11:03:49.470994 # ok 160 # SKIP ZA write, SVE 64->64, SME 16/1->64/3
2442 11:03:49.471381 # ok 161 # SKIP No writes, SVE 64->64, SME 16/2->64/0
2443 11:03:49.484255 # ok 162 # SKIP FPSIMD write, SVE 64->64, SME 16/2->64/0
2444 11:03:49.487670 # ok 163 # SKIP SVE write, SVE 64->64, SME 16/2->64/0
2445 11:03:49.488221 # ok 164 ZA write, SVE 64->64, SME 16/2->64/0
2446 11:03:49.492744 # ok 165 # SKIP No writes, SVE 64->64, SME 16/2->64/1
2447 11:03:49.511553 # ok 166 # SKIP FPSIMD write, SVE 64->64, SME 16/2->64/1
2448 11:03:49.511698 # ok 167 # SKIP SVE write, SVE 64->64, SME 16/2->64/1
2449 11:03:49.517134 # ok 168 # SKIP ZA write, SVE 64->64, SME 16/2->64/1
2450 11:03:49.529385 # ok 169 # SKIP No writes, SVE 64->64, SME 16/2->64/2
2451 11:03:49.535491 # ok 170 # SKIP FPSIMD write, SVE 64->64, SME 16/2->64/2
2452 11:03:49.542707 # ok 171 # SKIP SVE write, SVE 64->64, SME 16/2->64/2
2453 11:03:49.549921 # ok 172 ZA write, SVE 64->64, SME 16/2->64/2
2454 11:03:49.556064 # ok 173 # SKIP No writes, SVE 64->64, SME 16/2->64/3
2455 11:03:49.563859 # ok 174 # SKIP FPSIMD write, SVE 64->64, SME 16/2->64/3
2456 11:03:49.572151 # ok 175 # SKIP SVE write, SVE 64->64, SME 16/2->64/3
2457 11:03:49.580508 # ok 176 # SKIP ZA write, SVE 64->64, SME 16/2->64/3
2458 11:03:49.581600 # ok 177 # SKIP No writes, SVE 64->64, SME 16/3->64/0
2459 11:03:49.582174 # ok 178 # SKIP FPSIMD write, SVE 64->64, SME 16/3->64/0
2460 11:03:49.582731 # ok 179 # SKIP SVE write, SVE 64->64, SME 16/3->64/0
2461 11:03:49.582870 # ok 180 # SKIP ZA write, SVE 64->64, SME 16/3->64/0
2462 11:03:49.583848 # ok 181 # SKIP No writes, SVE 64->64, SME 16/3->64/1
2463 11:03:49.586083 # ok 182 # SKIP FPSIMD write, SVE 64->64, SME 16/3->64/1
2464 11:03:49.587805 # ok 183 # SKIP SVE write, SVE 64->64, SME 16/3->64/1
2465 11:03:49.588333 # ok 184 # SKIP ZA write, SVE 64->64, SME 16/3->64/1
2466 11:03:49.589455 # ok 185 # SKIP No writes, SVE 64->64, SME 16/3->64/2
2467 11:03:49.591150 # ok 186 # SKIP FPSIMD write, SVE 64->64, SME 16/3->64/2
2468 11:03:49.591296 # ok 187 # SKIP SVE write, SVE 64->64, SME 16/3->64/2
2469 11:03:49.591689 # ok 188 # SKIP ZA write, SVE 64->64, SME 16/3->64/2
2470 11:03:49.592258 # ok 189 # SKIP No writes, SVE 64->64, SME 16/3->64/3
2471 11:03:49.592403 # ok 190 # SKIP FPSIMD write, SVE 64->64, SME 16/3->64/3
2472 11:03:49.592811 # ok 191 # SKIP SVE write, SVE 64->64, SME 16/3->64/3
2473 11:03:49.592951 # ok 192 # SKIP ZA write, SVE 64->64, SME 16/3->64/3
2474 11:03:49.593267 # ok 193 No writes, SVE 64->64, SME 16/0->16/0
2475 11:03:49.593450 # ok 194 FPSIMD write, SVE 64->64, SME 16/0->16/0
2476 11:03:49.593936 # ok 195 SVE write, SVE 64->64, SME 16/0->16/0
2477 11:03:49.594506 # ok 196 ZA write, SVE 64->64, SME 16/0->16/0
2478 11:03:49.594641 # ok 197 # SKIP No writes, SVE 64->64, SME 16/0->16/1
2479 11:03:49.595628 # ok 198 # SKIP FPSIMD write, SVE 64->64, SME 16/0->16/1
2480 11:03:49.595765 # ok 199 SVE write, SVE 64->64, SME 16/0->16/1
2481 11:03:49.595873 # ok 200 # SKIP ZA write, SVE 64->64, SME 16/0->16/1
2482 11:03:49.596194 # ok 201 # SKIP No writes, SVE 64->64, SME 16/0->16/2
2483 11:03:49.596331 # ok 202 # SKIP FPSIMD write, SVE 64->64, SME 16/0->16/2
2484 11:03:49.596739 # ok 203 # SKIP SVE write, SVE 64->64, SME 16/0->16/2
2485 11:03:49.596876 # ok 204 ZA write, SVE 64->64, SME 16/0->16/2
2486 11:03:49.597865 # ok 205 # SKIP No writes, SVE 64->64, SME 16/1->16/0
2487 11:03:49.598452 # ok 206 # SKIP FPSIMD write, SVE 64->64, SME 16/1->16/0
2488 11:03:49.599009 # ok 207 SVE write, SVE 64->64, SME 16/1->16/0
2489 11:03:49.599143 # ok 208 # SKIP ZA write, SVE 64->64, SME 16/1->16/0
2490 11:03:49.599250 # ok 209 No writes, SVE 64->64, SME 16/1->16/1
2491 11:03:49.599573 # ok 210 FPSIMD write, SVE 64->64, SME 16/1->16/1
2492 11:03:49.599708 # ok 211 SVE write, SVE 64->64, SME 16/1->16/1
2493 11:03:49.600136 # ok 212 ZA write, SVE 64->64, SME 16/1->16/1
2494 11:03:49.600272 # ok 213 # SKIP No writes, SVE 64->64, SME 16/1->16/2
2495 11:03:49.600721 # ok 214 # SKIP FPSIMD write, SVE 64->64, SME 16/1->16/2
2496 11:03:49.601054 # ok 215 # SKIP SVE write, SVE 64->64, SME 16/1->16/2
2497 11:03:49.601411 # ok 216 # SKIP ZA write, SVE 64->64, SME 16/1->16/2
2498 11:03:49.601551 # ok 217 # SKIP No writes, SVE 64->64, SME 16/1->16/3
2499 11:03:49.601866 # ok 218 # SKIP FPSIMD write, SVE 64->64, SME 16/1->16/3
2500 11:03:49.602006 # ok 219 # SKIP SVE write, SVE 64->64, SME 16/1->16/3
2501 11:03:49.602396 # ok 220 ZA write, SVE 64->64, SME 16/1->16/3
2502 11:03:49.602537 # ok 221 # SKIP No writes, SVE 64->64, SME 16/2->16/0
2503 11:03:49.603083 # ok 222 # SKIP FPSIMD write, SVE 64->64, SME 16/2->16/0
2504 11:03:49.603222 # ok 223 # SKIP SVE write, SVE 64->64, SME 16/2->16/0
2505 11:03:49.604063 # ok 224 ZA write, SVE 64->64, SME 16/2->16/0
2506 11:03:49.604622 # ok 225 # SKIP No writes, SVE 64->64, SME 16/2->16/1
2507 11:03:49.604766 # ok 226 # SKIP FPSIMD write, SVE 64->64, SME 16/2->16/1
2508 11:03:49.605187 # ok 227 # SKIP SVE write, SVE 64->64, SME 16/2->16/1
2509 11:03:49.605329 # ok 228 # SKIP ZA write, SVE 64->64, SME 16/2->16/1
2510 11:03:49.605480 # ok 229 No writes, SVE 64->64, SME 16/2->16/2
2511 11:03:49.605827 # ok 230 FPSIMD write, SVE 64->64, SME 16/2->16/2
2512 11:03:49.605982 # ok 231 SVE write, SVE 64->64, SME 16/2->16/2
2513 11:03:49.606358 # ok 232 ZA write, SVE 64->64, SME 16/2->16/2
2514 11:03:49.612455 # ok 233 # SKIP No writes, SVE 64->64, SME 16/2->16/3
2515 11:03:58.236684 # ok 234 # SKIP FPSIMD write, SVE 64->64, SME 16/2->16/3
2516 11:03:58.239869 # ok 235 SVE write, SVE 64->64, SME 16/2->16/3
2517 11:03:58.244381 # ok 236 # SKIP ZA write, SVE 64->64, SME 16/2->16/3
2518 11:03:58.246588 # ok 237 # SKIP No writes, SVE 64->64, SME 16/3->16/0
2519 11:03:58.249975 # ok 238 # SKIP FPSIMD write, SVE 64->64, SME 16/3->16/0
2520 11:03:58.251642 # ok 239 # SKIP SVE write, SVE 64->64, SME 16/3->16/0
2521 11:03:58.252771 # ok 240 # SKIP ZA write, SVE 64->64, SME 16/3->16/0
2522 11:03:58.253912 # ok 241 # SKIP No writes, SVE 64->64, SME 16/3->16/1
2523 11:03:58.255080 # ok 242 # SKIP FPSIMD write, SVE 64->64, SME 16/3->16/1
2524 11:03:58.255652 # ok 243 # SKIP SVE write, SVE 64->64, SME 16/3->16/1
2525 11:03:58.256232 # ok 244 ZA write, SVE 64->64, SME 16/3->16/1
2526 11:03:58.256375 # ok 245 # SKIP No writes, SVE 64->64, SME 16/3->16/2
2527 11:03:58.256928 # ok 246 # SKIP FPSIMD write, SVE 64->64, SME 16/3->16/2
2528 11:03:58.257065 # ok 247 SVE write, SVE 64->64, SME 16/3->16/2
2529 11:03:58.257173 # ok 248 # SKIP ZA write, SVE 64->64, SME 16/3->16/2
2530 11:03:58.257362 # ok 249 No writes, SVE 64->64, SME 16/3->16/3
2531 11:03:58.257517 # ok 250 FPSIMD write, SVE 64->64, SME 16/3->16/3
2532 11:03:58.257919 # ok 251 SVE write, SVE 64->64, SME 16/3->16/3
2533 11:03:58.258057 # ok 252 ZA write, SVE 64->64, SME 16/3->16/3
2534 11:03:58.258161 # # Totals: pass:68 fail:0 xfail:0 xpass:0 skip:184 error:0
2535 11:03:58.365499 ok 38 selftests: arm64: fp-ptrace
2536 11:03:59.285027 # timeout set to 45
2537 11:03:59.287637 # selftests: arm64: fp-stress
2538 11:04:27.922766 # TAP version 13
2539 11:04:27.926807 # 1..88
2540 11:04:27.930227 # # 8 CPUs, 3 SVE VLs, 3 SME VLs, SME2 absent
2541 11:04:27.933035 # # Will run for 10s
2542 11:04:27.938131 # # Started FPSIMD-0-0
2543 11:04:27.939872 # # Started KERNEL-0-0
2544 11:04:27.942148 # # Started SVE-VL-64-0
2545 11:04:27.944495 # # Started SVE-VL-32-0
2546 11:04:27.946069 # # Started SVE-VL-16-0
2547 11:04:27.947776 # # Started SSVE-VL-64-0
2548 11:04:27.950595 # # Started ZA-VL-64-0
2549 11:04:27.952296 # # Started SSVE-VL-32-0
2550 11:04:27.954586 # # Started ZA-VL-32-0
2551 11:04:27.957428 # # Started SSVE-VL-16-0
2552 11:04:27.959703 # # Started ZA-VL-16-0
2553 11:04:27.960862 # # Started FPSIMD-1-0
2554 11:04:27.963158 # # Started KERNEL-1-0
2555 11:04:27.964887 # # Started SVE-VL-64-1
2556 11:04:27.966588 # # Started SVE-VL-32-1
2557 11:04:27.967738 # # Started SVE-VL-16-1
2558 11:04:27.969461 # # Started SSVE-VL-64-1
2559 11:04:27.971158 # # Started ZA-VL-64-1
2560 11:04:27.972859 # # Started SSVE-VL-32-1
2561 11:04:27.974586 # # Started ZA-VL-32-1
2562 11:04:27.977429 # # Started SSVE-VL-16-1
2563 11:04:27.980275 # # Started ZA-VL-16-1
2564 11:04:27.983695 # # Started FPSIMD-2-0
2565 11:04:27.986561 # # Started KERNEL-2-0
2566 11:04:27.989461 # # Started SVE-VL-64-2
2567 11:04:27.991255 # # Started SVE-VL-32-2
2568 11:04:27.994613 # # Started SVE-VL-16-2
2569 11:04:27.997455 # # Started SSVE-VL-64-2
2570 11:04:28.000284 # # Started ZA-VL-64-2
2571 11:04:28.002036 # # Started SSVE-VL-32-2
2572 11:04:28.004895 # # Started ZA-VL-32-2
2573 11:04:28.007201 # # Started SSVE-VL-16-2
2574 11:04:28.009492 # # Started ZA-VL-16-2
2575 11:04:28.011191 # # Started FPSIMD-3-0
2576 11:04:28.013485 # # Started KERNEL-3-0
2577 11:04:28.016941 # # Started SVE-VL-64-3
2578 11:04:28.019197 # # Started SVE-VL-32-3
2579 11:04:28.022059 # # Started SVE-VL-16-3
2580 11:04:28.025437 # # Started SSVE-VL-64-3
2581 11:04:28.027155 # # Started ZA-VL-64-3
2582 11:04:28.029406 # # Started SSVE-VL-32-3
2583 11:04:28.031697 # # Started ZA-VL-32-3
2584 11:04:28.032825 # # Started SSVE-VL-16-3
2585 11:04:28.034005 # # Started ZA-VL-16-3
2586 11:04:28.036810 # # Started FPSIMD-4-0
2587 11:04:28.038489 # # Started KERNEL-4-0
2588 11:04:28.039661 # # Started SVE-VL-64-4
2589 11:04:28.043627 # # Started SVE-VL-32-4
2590 11:04:28.046503 # # Started SVE-VL-16-4
2591 11:04:28.047669 # # Started SSVE-VL-64-4
2592 11:04:28.051093 # # Started ZA-VL-64-4
2593 11:04:28.052815 # # Started SSVE-VL-32-4
2594 11:04:28.055127 # # Started ZA-VL-32-4
2595 11:04:28.057989 # # Started SSVE-VL-16-4
2596 11:04:28.059719 # # Started ZA-VL-16-4
2597 11:04:28.061431 # # Started FPSIMD-5-0
2598 11:04:28.063151 # # Started KERNEL-5-0
2599 11:04:28.066599 # # Started SVE-VL-64-5
2600 11:04:28.068875 # # Started SVE-VL-32-5
2601 11:04:28.071712 # # Started SVE-VL-16-5
2602 11:04:28.076277 # # Started SSVE-VL-64-5
2603 11:04:28.080781 # # Started ZA-VL-64-5
2604 11:04:28.083634 # # Started SSVE-VL-32-5
2605 11:04:28.086454 # # Started ZA-VL-32-5
2606 11:04:28.089290 # # Started SSVE-VL-16-5
2607 11:04:28.090480 # # Started ZA-VL-16-5
2608 11:04:28.092734 # # Started FPSIMD-6-0
2609 11:04:28.094453 # # Started KERNEL-6-0
2610 11:04:28.096711 # # Started SVE-VL-64-6
2611 11:04:28.097883 # # Started SVE-VL-32-6
2612 11:04:28.099629 # # Started SVE-VL-16-6
2613 11:04:28.101351 # # Started SSVE-VL-64-6
2614 11:04:28.102532 # # Started ZA-VL-64-6
2615 11:04:28.103696 # # Started SSVE-VL-32-6
2616 11:04:28.106525 # # Started ZA-VL-32-6
2617 11:04:28.107683 # # Started SSVE-VL-16-6
2618 11:04:28.109426 # # Started ZA-VL-16-6
2619 11:04:28.111684 # # Started FPSIMD-7-0
2620 11:04:28.112842 # # Started KERNEL-7-0
2621 11:04:28.115160 # # Started SVE-VL-64-7
2622 11:04:28.116910 # # Started SVE-VL-32-7
2623 11:04:28.118026 # # Started SVE-VL-16-7
2624 11:04:28.120875 # # Started SSVE-VL-64-7
2625 11:04:28.122029 # # Started ZA-VL-64-7
2626 11:04:28.124298 # # Started SSVE-VL-32-7
2627 11:04:28.126618 # # Started ZA-VL-32-7
2628 11:04:28.129481 # # Started SSVE-VL-16-7
2629 11:04:28.131187 # # Started ZA-VL-16-7
2630 11:04:28.134026 # # ZA-VL-32-0: Streaming mode vector length: 256 bits
2631 11:04:28.135760 # # ZA-VL-32-0: PID: 1282
2632 11:04:28.138093 # # SSVE-VL-32-1: Streaming mode Vector length: 256 bits
2633 11:04:28.138642 # # SSVE-VL-32-1: PID: 1292
2634 11:04:28.140367 # # SVE-VL-64-4: Vector length: 512 bits
2635 11:04:28.141518 # # SVE-VL-64-4: PID: 1320
2636 11:04:28.848263 # # SVE-VL-64-1: Vector length: 512 bits
2637 11:04:28.849964 # # SVE-VL-64-1: PID: 1287
2638 11:04:28.851096 # # SVE-VL-16-1: Vector length: 128 bits
2639 11:04:28.852805 # # SVE-VL-16-1: PID: 1289
2640 11:04:28.854517 # # SVE-VL-32-3: Vector length: 256 bits
2641 11:04:28.855083 # # SVE-VL-32-3: PID: 1310
2642 11:04:28.857338 # # SVE-VL-32-1: Vector length: 256 bits
2643 11:04:28.857924 # # SVE-VL-32-1: PID: 1288
2644 11:04:28.858485 # # FPSIMD-4-0: Vector length: 128 bits
2645 11:04:28.859048 # # FPSIMD-4-0: PID: 1318
2646 11:04:28.859615 # # SSVE-VL-16-5: Streaming mode Vector length: 128 bits
2647 11:04:28.860183 # # SSVE-VL-16-5: PID: 1338
2648 11:04:28.860761 # # SVE-VL-32-2: Vector length: 256 bits
2649 11:04:28.862461 # # SVE-VL-16-6: Vector length: 128 bits
2650 11:04:28.864156 # # SVE-VL-16-6: PID: 1344
2651 11:04:28.865285 # # ZA-VL-32-1: Streaming mode vector length: 256 bits
2652 11:04:28.866428 # # ZA-VL-32-1: PID: 1293
2653 11:04:28.868736 # # ZA-VL-32-6: Streaming mode vector length: 256 bits
2654 11:04:28.871034 # # ZA-VL-32-6: PID: 1348
2655 11:04:28.875576 # # SVE-VL-16-7: Vector length: 128 bits
2656 11:04:28.878379 # # SVE-VL-16-7: PID: 1355
2657 11:04:28.882428 # # FPSIMD-6-0: Vector length: 128 bits
2658 11:04:28.884609 # # FPSIMD-6-0: PID: 1340
2659 11:04:28.888024 # # ZA-VL-16-6: Streaming mode vector length: 128 bits
2660 11:04:28.889692 # # ZA-VL-16-6: PID: 1350
2661 11:04:28.891972 # # SSVE-VL-64-4: Streaming mode Vector length: 512 bits
2662 11:04:28.893676 # # SSVE-VL-64-4: PID: 1323
2663 11:04:28.896008 # # SVE-VL-64-6: Vector length: 512 bits
2664 11:04:28.898832 # # SVE-VL-64-6: PID: 1342
2665 11:04:28.900471 # # SSVE-VL-64-3: Streaming mode Vector length: 512 bits
2666 11:04:28.902184 # # SSVE-VL-64-3: PID: 1312
2667 11:04:28.903871 # # SVE-VL-16-0: Vector length: 128 bits
2668 11:04:28.906716 # # SVE-VL-16-0: PID: 1278
2669 11:04:28.909525 # # FPSIMD-0-0: Vector length: 128 bits
2670 11:04:28.912856 # # FPSIMD-0-0: PID: 1274
2671 11:04:28.926279 # # SVE-VL-32-6: Vector length: 256 bits
2672 11:04:28.931300 # # SVE-VL-32-6: PID: 1343
2673 11:04:28.936389 # # SSVE-VL-64-5: Streaming mode Vector length: 512 bits
2674 11:04:28.938610 # # SSVE-VL-64-5: PID: 1334
2675 11:04:28.942008 # # ZA-VL-16-5: Streaming mode vector length: 128 bits
2676 11:04:28.944803 # # ZA-VL-16-5: PID: 1339
2677 11:04:28.945949 # # FPSIMD-2-0: Vector length: 128 bits
2678 11:04:28.948192 # # FPSIMD-2-0: PID: 1296
2679 11:04:28.951017 # # SVE-VL-32-2: PID: 1299
2680 11:04:28.955495 # # SSVE-VL-16-6: Streaming mode Vector length: 128 bits
2681 11:04:29.986931 # # SSVE-[ 80.316499] NET: Registered PF_ALG protocol family
2682 11:04:40.915357 VL-16-6: PID: 1349
2683 11:04:40.915931 # # FPSIMD-7-0: Vector length: 128 bits
2684 11:04:40.916488 # # FPSIMD-7-0: PID: 1351
2685 11:04:40.916630 # # SSVE-VL-64-2: Streaming mode Vector length: 512 bits
2686 11:04:40.917021 # # SSVE-VL-64-2: PID: 1301
2687 11:04:40.917187 # # ZA-VL-64-6: Streaming mode vector length: 512 bits
2688 11:04:40.918185 # # ZA-VL-64-6: PID: 1346
2689 11:04:40.918326 # # SSVE-VL-64-0: Streaming mode Vector length: 512 bits
2690 11:04:40.918745 # # SSVE-VL-64-0: PID: 1279
2691 11:04:40.919330 # # SSVE-VL-32-2: Streaming mode Vector length: 256 bits
2692 11:04:40.919471 # # SSVE-VL-32-2: PID: 1303
2693 11:04:40.920466 # # SSVE-VL-64-6: Streaming mode Vector length: 512 bits
2694 11:04:40.921038 # # SSVE-VL-64-6: PID: 1345
2695 11:04:40.923358 # # ZA-VL-16-2: Streaming mode vector length: 128 bits
2696 11:04:40.924483 # # ZA-VL-16-2: PID: 1306
2697 11:04:40.924624 # # SSVE-VL-64-7: Streaming mode Vector length: 512 bits
2698 11:04:40.925686 # # SSVE-VL-64-7: PID: 1356
2699 11:04:40.926315 # # ZA-VL-32-3: Streaming mode vector length: 256 bits
2700 11:04:40.926966 # # ZA-VL-32-3: PID: 1315
2701 11:04:40.927536 # # SVE-VL-32-7: Vector length: 256 bits
2702 11:04:40.928102 # # SVE-VL-32-7: PID: 1354
2703 11:04:40.928666 # # SSVE-VL-32-3: Streaming mode Vector length: 256 bits
2704 11:04:40.929240 # # SSVE-VL-32-3: PID: 1314
2705 11:04:40.929526 # # SSVE-VL-32-7: Streaming mode Vector length: 256 bits
2706 11:04:40.929817 # # SSVE-VL-32-7: PID: 1358
2707 11:04:40.932635 # # FPSIMD-1-0: Vector length: 128 bits
2708 11:04:40.944947 # # FPSIMD-1-0: PID: 1285
2709 11:04:40.953366 # # SSVE-VL-16-3: Streaming mode Vector length: 128 bits
2710 11:04:40.955078 # # SSVE-VL-16-3: PID: 1316
2711 11:04:40.956213 # # SVE-VL-64-7: Vector length: 512 bits
2712 11:04:40.956370 # # SVE-VL-64-7: PID: 1353
2713 11:04:40.957381 # # SSVE-VL-32-0: Streaming mode Vector length: 256 bits
2714 11:04:40.957926 # # SSVE-VL-32-0: PID: 1281
2715 11:04:40.959066 # # SVE-VL-64-3: Vector length: 512 bits
2716 11:04:40.959651 # # SVE-VL-64-3: PID: 1309
2717 11:04:40.960216 # # SSVE-VL-16-7: Streaming mode Vector length: 128 bits
2718 11:04:40.960779 # # SSVE-VL-16-7: PID: 1360
2719 11:04:40.962499 # # SSVE-VL-16-2: Streaming mode Vector length: 128 bits
2720 11:04:40.963624 # # SSVE-VL-16-2: PID: 1305
2721 11:04:40.966466 # # SSVE-VL-64-1: Streaming mode Vector length: 512 bits
2722 11:04:40.967037 # # SSVE-VL-64-1: PID: 1290
2723 11:04:40.968728 # # SSVE-VL-16-1: Streaming mode Vector length: 128 bits
2724 11:04:40.969313 # # SSVE-VL-16-1: PID: 1294
2725 11:04:40.969910 # # SSVE-VL-32-4: Streaming mode Vector length: 256 bits
2726 11:04:40.970455 # # SSVE-VL-32-4: PID: 1325
2727 11:04:40.971020 # # ZA-VL-16-7: Streaming mode vector length: 128 bits
2728 11:04:40.971584 # # ZA-VL-16-7: PID: 1361
2729 11:04:40.972156 # # KERNEL-7-0: Failed to bind sha224: No such file or directory (2)
2730 11:04:40.972712 # # SSVE-VL-32-5: Streaming mode Vector length: 256 bits
2731 11:04:40.973283 # # SSVE-VL-32-5: PID: 1336
2732 11:04:40.974976 # # SSVE-VL-32-6: Streaming mode Vector length: 256 bits
2733 11:04:40.975105 # # SSVE-VL-32-6: PID: 1347
2734 11:04:40.975533 # # ZA-VL-64-4: Streaming mode vector length: 512 bits
2735 11:04:40.976084 # # ZA-VL-64-4: PID: 1324
2736 11:04:40.977223 # # ZA-VL-64-5: Streaming mode vector length: 512 bits
2737 11:04:40.978899 # # ZA-VL-64-5: PID: 1335
2738 11:04:40.981148 # # KERNEL-2-0: Failed to bind sha224: No such file or directory (2)
2739 11:04:40.982303 # # KERNEL-1-0: Failed to bind sha224: No such file or directory (2)
2740 11:04:40.984554 # # SVE-VL-32-5: Vector length: 256 bits
2741 11:04:40.985113 # # SVE-VL-32-5: PID: 1332
2742 11:04:40.986245 # # SVE-VL-32-4: Vector length: 256 bits
2743 11:04:40.987921 # # SVE-VL-32-4: PID: 1321
2744 11:04:40.989044 # # FPSIMD-3-0: Vector length: 128 bits
2745 11:04:40.989617 # # FPSIMD-3-0: PID: 1307
2746 11:04:40.991308 # # ZA-VL-32-7: Streaming mode vector length: 256 bits
2747 11:04:40.991875 # # ZA-VL-32-7: PID: 1359
2748 11:04:40.994120 # # ZA-VL-64-0: Streaming mode vector length: 512 bits
2749 11:04:40.996331 # # ZA-VL-64-0: PID: 1280
2750 11:04:40.997456 # # ZA-VL-64-3: Streaming mode vector length: 512 bits
2751 11:04:40.998550 # # ZA-VL-64-3: PID: 1313
2752 11:04:40.999660 # # SVE-VL-16-2: Vector length: 128 bits
2753 11:04:41.000225 # # SVE-VL-16-2: PID: 1300
2754 11:04:41.002442 # # ZA-VL-32-2: Streaming mode vector length: 256 bits
2755 11:04:41.003548 # # ZA-VL-32-2: PID: 1304
2756 11:04:41.005765 # # SVE-VL-64-2: Vector length: 512 bits
2757 11:04:41.006342 # # SVE-VL-64-2: PID: 1298
2758 11:04:41.008582 # # KERNEL-5-0: Failed to bind sha224: No such file or directory (2)
2759 11:04:41.009136 # # ZA-VL-16-1: Streaming mode vector length: 128 bits
2760 11:04:41.010255 # # ZA-VL-16-1: PID: 1295
2761 11:04:41.012469 # # KERNEL-3-0: Failed to bind sha224: No such file or directory (2)
2762 11:04:41.014693 # # KERNEL-7-0: Vector length: 128 bits
2763 11:04:41.016914 # # KERNEL-7-0: PID: 1352
2764 11:04:41.019154 # # ZA-VL-64-1: Streaming mode vector length: 512 bits
2765 11:04:41.020295 # # ZA-VL-64-1: PID: 1291
2766 11:04:41.021998 # # SVE-VL-16-3: Vector length: 128 bits
2767 11:04:41.023133 # # SVE-VL-16-3: PID: 1311
2768 11:04:41.023700 # # KERNEL-2-0: Vector length: 128 bits
2769 11:04:41.025412 # # KERNEL-2-0: PID: 1297
2770 11:04:41.027156 # # SSVE-VL-16-0: Streaming mode Vector length: 128 bits
2771 11:04:41.027742 # # SSVE-VL-16-0: PID: 1283
2772 11:04:43.084541 # # SVE-VL-64-0: Vector length: 512 bits
2773 11:04:43.087857 # # SVE-VL-64-0: PID: 1276
2774 11:04:43.090690 # # ZA-VL-16-3: Streaming mode vector length: 128 bits
2775 11:04:43.091275 # # ZA-VL-16-3: PID: 1317
2776 11:04:43.091834 # # KERNEL-5-0: Vector length: 128 bits
2777 11:04:43.092975 # # KERNEL-5-0: PID: 1330
2778 11:04:43.094741 # # SVE-VL-64-5: Vector length: 512 bits
2779 11:04:43.095854 # # SVE-VL-64-5: PID: 1331
2780 11:04:43.096992 # # KERNEL-3-0: Vector length: 128 bits
2781 11:04:43.098171 # # KERNEL-3-0: PID: 1308
2782 11:04:43.098749 # # ZA-VL-16-4: Streaming mode vector length: 128 bits
2783 11:04:43.099327 # # ZA-VL-16-4: PID: 1328
2784 11:06:20.478814 # # FPSIMD-5-0: Vector length: 128 bits
2785 11:06:20.481668 # # FPSIMD-5-0: PID: 1329
2786 11:06:20.547823 # # SVE-VL-16-5: Vector length: 128 bits
2787 11:06:20.550615 # # SVE-VL-16-5: PID: 1333
2788 11:06:20.554058 # # KERNEL-6-0: Failed to bind sha224: No such file or directory (2)
2789 11:06:20.556935 # # SVE-VL-16-4: Vector length: 128 bits
2790 11:06:20.559806 # # SVE-VL-16-4: PID: 1322
2791 11:06:20.562683 # # ZA-VL-64-2: Streaming mode vector length: 512 bits
2792 11:06:20.565526 # # ZA-VL-64-2: PID: 1302
2793 11:06:20.568400 # # SVE-VL-32-0: Vector length: 256 bits
2794 11:06:20.571847 # # SVE-VL-32-0: PID: 1277
2795 11:06:20.575317 # # ZA-VL-64-7: Streaming mode vector length: 512 bits
2796 11:06:20.578694 # # ZA-VL-64-7: PID: 1357
2797 11:06:20.583267 # # ZA-VL-32-4: Streaming mode vector length: 256 bits
2798 11:06:20.586693 # # ZA-VL-32-4: PID: 1326
2799 11:06:20.590148 # # KERNEL-6-0: Vector length: 128 bits
2800 11:06:20.593530 # # KERNEL-6-0: PID: 1341
2801 11:06:20.596972 # # SSVE-VL-16-4: Streaming mode Vector length: 128 bits
2802 11:06:20.599859 # # SSVE-VL-16-4: PID: 1327
2803 11:06:20.602703 # # KERNEL-4-0: Failed to bind sha224: No such file or directory (2)
2804 11:06:20.605545 # # KERNEL-4-0: Vector length: 128 bits
2805 11:06:20.608965 # # KERNEL-4-0: PID: 1319
2806 11:06:20.611818 # # KERNEL-1-0: Vector length: 128 bits
2807 11:06:20.615207 # # KERNEL-1-0: PID: 1286
2808 11:06:20.619186 # # ZA-VL-16-0: Streaming mode vector length: 128 bits
2809 11:06:20.622047 # # ZA-VL-16-0: PID: 1284
2810 11:06:20.624892 # # KERNEL-0-0: Failed to bind sha224: No such file or directory (2)
2811 11:06:20.628305 # # ZA-VL-32-5: Streaming mode vector length: 256 bits
2812 11:06:20.631171 # # ZA-VL-32-5: PID: 1337
2813 11:06:20.634029 # # KERNEL-0-0: Vector length: 128 bits
2814 11:06:20.636885 # # KERNEL-0-0: PID: 1275
2815 11:06:20.639173 # # Sending signals, timeout remaining: 10
2816 11:06:20.641477 # # Sending signals, timeout remaining: 9
2817 11:06:20.644286 # # Sending signals, timeout remaining: 8
2818 11:06:20.646028 # # Sending signals, timeout remaining: 7
2819 11:06:20.648333 # # Sending signals, timeout remaining: 6
2820 11:06:20.650606 # # Sending signals, timeout remaining: 5
2821 11:06:20.653451 # # Sending signals, timeout remaining: 4
2822 11:06:20.655755 # # Sending signals, timeout remaining: 3
2823 11:06:20.657481 # # Sending signals, timeout remaining: 2
2824 11:06:20.659780 # # Sending signals, timeout remaining: 1
2825 11:06:20.662080 # # Finishing up...
2826 11:06:20.664945 # # ZA-VL-32-0: Terminated by signal 15, no error, iterations=3408, signals=9
2827 11:06:20.668378 # # SVE-VL-32-2: Terminated by signal 15, no error, iterations=2952, signals=10
2828 11:06:20.672354 # # SSVE-VL-64-2: Terminated by signal 15, no error, iterations=2094, signals=10
2829 11:06:20.675224 # # SSVE-VL-16-5: Terminated by signal 15, no error, iterations=3930, signals=10
2830 11:06:20.679811 # # ZA-VL-32-6: Terminated by signal 15, no error, iterations=3736, signals=10
2831 11:06:20.683229 # # SVE-VL-64-7: Terminated by signal 15, no error, iterations=1923, signals=10
2832 11:06:20.686673 # # SSVE-VL-64-7: Terminated by signal 15, no error, iterations=1998, signals=10
2833 11:06:20.688381 # ok 1 FPSIMD-0-0
2834 11:06:20.690096 # ok 2 KERNEL-0-0
2835 11:06:20.691248 # ok 3 SVE-VL-64-0
2836 11:06:20.692952 # ok 4 SVE-VL-32-0
2837 11:06:20.695237 # ok 5 SVE-VL-16-0
2838 11:06:20.696390 # ok 6 SSVE-VL-64-0
2839 11:06:20.698675 # ok 7 ZA-VL-64-0
2840 11:06:20.700405 # ok 8 SSVE-VL-32-0
2841 11:06:20.701540 # ok 9 ZA-VL-32-0
2842 11:06:20.703289 # ok 10 SSVE-VL-16-0
2843 11:06:20.705541 # ok 11 ZA-VL-16-0
2844 11:06:20.706717 # ok 12 FPSIMD-1-0
2845 11:06:20.708432 # ok 13 KERNEL-1-0
2846 11:06:20.721292 # ok 14 SVE-VL-64-1
2847 11:06:20.724629 # ok 15 SVE-VL-32-1
2848 11:06:20.727457 # ok 16 SVE-VL-16-1
2849 11:06:20.729714 # ok 17 SSVE-VL-64-1
2850 11:06:20.730893 # ok 18 ZA-VL-64-1
2851 11:06:20.734848 # ok 19 SSVE-VL-32-1
2852 11:06:20.736563 # ok 20 ZA-VL-32-1
2853 11:06:20.738280 # ok 21 SSVE-VL-16-1
2854 11:06:20.741133 # ok 22 ZA-VL-16-1
2855 11:06:20.742299 # ok 23 FPSIMD-2-0
2856 11:06:20.744559 # ok 24 KERNEL-2-0
2857 11:06:20.747409 # ok 25 SVE-VL-64-2
2858 11:06:20.749664 # ok 26 SVE-VL-32-2
2859 11:06:20.751420 # ok 27 SVE-VL-16-2
2860 11:06:20.753694 # ok 28 SSVE-VL-64-2
2861 11:06:20.755985 # ok 29 ZA-VL-64-2
2862 11:06:20.757692 # ok 30 SSVE-VL-32-2
2863 11:06:20.759410 # ok 31 ZA-VL-32-2
2864 11:06:20.761659 # ok 32 SSVE-VL-16-2
2865 11:06:20.763389 # ok 33 ZA-VL-16-2
2866 11:06:20.765093 # ok 34 FPSIMD-3-0
2867 11:06:20.767366 # ok 35 KERNEL-3-0
2868 11:06:20.769089 # ok 36 SVE-VL-64-3
2869 11:06:20.771390 # ok 37 SVE-VL-32-3
2870 11:06:20.772528 # ok 38 SVE-VL-16-3
2871 11:06:20.774822 # ok 39 SSVE-VL-64-3
2872 11:06:20.776554 # ok 40 ZA-VL-64-3
2873 11:06:20.778273 # ok 41 SSVE-VL-32-3
2874 11:06:20.781116 # ok 42 ZA-VL-32-3
2875 11:06:20.782269 # ok 43 SSVE-VL-16-3
2876 11:06:20.783976 # ok 44 ZA-VL-16-3
2877 11:06:20.786824 # ok 45 FPSIMD-4-0
2878 11:06:20.790771 # ok 46 KERNEL-4-0
2879 11:06:20.792475 # ok 47 SVE-VL-64-4
2880 11:06:20.794210 # ok 48 SVE-VL-32-4
2881 11:06:20.796482 # ok 49 SVE-VL-16-4
2882 11:06:20.798202 # ok 50 SSVE-VL-64-4
2883 11:06:20.799889 # ok 51 ZA-VL-64-4
2884 11:06:20.802739 # ok 52 SSVE-VL-32-4
2885 11:06:20.805003 # ok 53 ZA-VL-32-4
2886 11:06:20.807319 # ok 54 SSVE-VL-16-4
2887 11:06:20.808452 # ok 55 ZA-VL-16-4
2888 11:06:20.810727 # ok 56 FPSIMD-5-0
2889 11:06:20.811308 # ok 57 KERNEL-5-0
2890 11:06:20.812443 # ok 58 SVE-VL-64-5
2891 11:06:20.813593 # ok 59 SVE-VL-32-5
2892 11:06:20.813705 # ok 60 SVE-VL-16-5
2893 11:06:20.813813 # ok 61 SSVE-VL-64-5
2894 11:06:20.814306 # ok 62 ZA-VL-64-5
2895 11:06:20.814419 # ok 63 SSVE-VL-32-5
2896 11:06:20.814763 # ok 64 ZA-VL-32-5
2897 11:06:20.815328 # ok 65 SSVE-VL-16-5
2898 11:06:20.816486 # ok 66 ZA-VL-16-5
2899 11:06:20.818207 # ok 67 FPSIMD-6-0
2900 11:06:20.819918 # ok 68 KERNEL-6-0
2901 11:06:20.821065 # ok 69 SVE-VL-64-6
2902 11:06:20.823351 # ok 70 SVE-VL-32-6
2903 11:06:20.824507 # ok 71 SVE-VL-16-6
2904 11:06:20.826826 # ok 72 SSVE-VL-64-6
2905 11:06:20.828535 # ok 73 ZA-VL-64-6
2906 11:06:20.830241 # ok 74 SSVE-VL-32-6
2907 11:06:20.831957 # ok 75 ZA-VL-32-6
2908 11:06:20.833109 # ok 76 SSVE-VL-16-6
2909 11:06:20.835398 # ok 77 ZA-VL-16-6
2910 11:06:20.836552 # ok 78 FPSIMD-7-0
2911 11:06:20.838268 # ok 79 KERNEL-7-0
2912 11:06:20.839415 # ok 80 SVE-VL-64-7
2913 11:06:20.841121 # ok 81 SVE-VL-32-7
2914 11:06:20.842301 # ok 82 SVE-VL-16-7
2915 11:06:20.844004 # ok 83 SSVE-VL-64-7
2916 11:06:20.845730 # ok 84 ZA-VL-64-7
2917 11:06:20.847455 # ok 85 SSVE-VL-32-7
2918 11:06:20.849179 # ok 86 ZA-VL-32-7
2919 11:06:20.850930 # ok 87 SSVE-VL-16-7
2920 11:06:20.853203 # ok 88 ZA-VL-16-7
2921 11:06:20.856096 # # SVE-VL-32-4: Terminated by signal 15, no error, iterations=2935, signals=9
2922 11:06:20.875630 # # FPSIMD-7-0: Terminated by signal 15, no error, iterations=7477, signals=10
2923 11:06:20.878494 # # SSVE-VL-32-4: Terminated by signal 15, no error, iterations=2935, signals=9
2924 11:06:20.881884 # # SVE-VL-16-3: Terminated by signal 15, no error, iterations=3785, signals=9
2925 11:06:20.885871 # # SVE-VL-16-2: Terminated by signal 15, no error, iterations=3923, signals=9
2926 11:06:20.889311 # # SSVE-VL-32-5: Terminated by signal 15, no error, iterations=2941, signals=9
2927 11:06:20.892763 # # FPSIMD-6-0: Terminated by signal 15, no error, iterations=8816, signals=10
2928 11:06:20.895629 # # KERNEL-7-0: Terminated by signal 15, no error, iterations=7150, signals=9
2929 11:06:20.899018 # # SVE-VL-32-7: Terminated by signal 15, no error, iterations=2877, signals=9
2930 11:06:20.902471 # # FPSIMD-4-0: Terminated by signal 15, no error, iterations=7609, signals=9
2931 11:06:20.905330 # # ZA-VL-32-7: Terminated by signal 15, no error, iterations=3296, signals=9
2932 11:06:20.908761 # # KERNEL-1-0: Terminated by signal 15, no error, iterations=7303, signals=9
2933 11:06:20.911632 # # SSVE-VL-64-3: Terminated by signal 15, no error, iterations=2064, signals=9
2934 11:06:20.915043 # # ZA-VL-64-0: Terminated by signal 15, no error, iterations=1125, signals=9
2935 11:06:20.919020 # # SSVE-VL-16-0: Terminated by signal 15, no error, iterations=3931, signals=9
2936 11:06:20.977879 # # ZA-VL-16-2: Terminated by signal 15, no error, iterations=8112, signals=10
2937 11:06:20.983535 # # ZA-VL-64-7: Terminated by signal 15, no error, iterations=1077, signals=9
2938 11:06:20.988066 # # FPSIMD-5-0: Terminated by signal 15, no error, iterations=7756, signals=9
2939 11:06:20.992614 # # ZA-VL-32-1: Terminated by signal 15, no error, iterations=3390, signals=9
2940 11:06:20.996615 # # SVE-VL-32-0: Terminated by signal 15, no error, iterations=2827, signals=9
2941 11:06:21.001190 # # SSVE-VL-16-6: Terminated by signal 15, no error, iterations=3926, signals=9
2942 11:06:21.004601 # # SSVE-VL-16-7: Terminated by signal 15, no error, iterations=4256, signals=9
2943 11:06:21.007447 # # SVE-VL-32-6: Terminated by signal 15, no error, iterations=3118, signals=9
2944 11:06:21.010347 # # SVE-VL-64-4: Terminated by signal 15, no error, iterations=1964, signals=9
2945 11:06:21.013217 # # ZA-VL-64-2: Terminated by signal 15, no error, iterations=1078, signals=9
2946 11:06:21.016674 # # ZA-VL-16-7: Terminated by signal 15, no error, iterations=8300, signals=9
2947 11:06:21.020668 # # FPSIMD-2-0: Terminated by signal 15, no error, iterations=7652, signals=9
2948 11:06:21.025252 # # KERNEL-5-0: Terminated by signal 15, no error, iterations=7597, signals=9
2949 11:06:21.029200 # # KERNEL-0-0: Terminated by signal 15, no error, iterations=7576, signals=10
2950 11:06:21.032064 # # ZA-VL-64-3: Terminated by signal 15, no error, iterations=1126, signals=9
2951 11:06:21.034937 # # ZA-VL-64-5: Terminated by signal 15, no error, iterations=1284, signals=9
2952 11:06:21.038375 # # ZA-VL-32-3: Terminated by signal 15, no error, iterations=3307, signals=9
2953 11:06:21.042400 # # ZA-VL-64-6: Terminated by signal 15, no error, iterations=1135, signals=9
2954 11:06:21.045809 # # ZA-VL-16-6: Terminated by signal 15, no error, iterations=8569, signals=9
2955 11:06:21.049785 # # KERNEL-3-0: Terminated by signal 15, no error, iterations=7598, signals=9
2956 11:06:21.052578 # # SSVE-VL-32-6: Terminated by signal 15, no error, iterations=2880, signals=9
2957 11:06:21.056027 # # SSVE-VL-16-4: Terminated by signal 15, no error, iterations=3658, signals=9
2958 11:06:21.060613 # # SSVE-VL-64-5: Terminated by signal 15, no error, iterations=1986, signals=9
2959 11:06:21.062335 # # ZA-VL-64-4: Terminated by signal 15, no error, iterations=1284, signals=9
2960 11:06:21.063490 # # ZA-VL-64-1: Terminated by signal 15, no error, iterations=1106, signals=9
2961 11:06:21.063626 # # ZA-VL-32-5: Terminated by signal 15, no error, iterations=3185, signals=9
2962 11:06:21.064091 # # SSVE-VL-32-2: Terminated by signal 15, no error, iterations=2935, signals=9
2963 11:06:21.064661 # # SVE-VL-16-5: Terminated by signal 15, no error, iterations=3886, signals=9
2964 11:06:21.064995 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=8071, signals=10
2965 11:06:21.065344 # # ZA-VL-16-4: Terminated by signal 15, no error, iterations=7878, signals=9
2966 11:06:21.065481 # # KERNEL-6-0: Terminated by signal 15, no error, iterations=7754, signals=10
2967 11:06:21.065814 # # KERNEL-2-0: Terminated by signal 15, no error, iterations=7519, signals=9
2968 11:06:21.065987 # # FPSIMD-3-0: Terminated by signal 15, no error, iterations=7191, signals=10
2969 11:06:21.066595 # # SSVE-VL-16-3: Terminated by signal 15, no error, iterations=3826, signals=9
2970 11:06:21.066979 # # SSVE-VL-32-1: Terminated by signal 15, no error, iterations=3028, signals=9
2971 11:06:21.067310 # # SVE-VL-16-4: Terminated by signal 15, no error, iterations=3929, signals=9
2972 11:06:21.068162 # # SVE-VL-32-1: Terminated by signal 15, no error, iterations=2935, signals=9
2973 11:06:21.068716 # # KERNEL-4-0: Terminated by signal 15, no error, iterations=8180, signals=10
2974 11:06:21.593976 # # ZA-VL-16-1: Terminated by signal 15, no error, iterations=8428, signals=9
2975 11:06:21.601283 # # SVE-VL-64-1: Terminated by signal 15, no error, iterations=1980, signals=9
2976 11:06:21.605790 # # SVE-VL-32-3: Terminated by signal 15, no error, iterations=2929, signals=9
2977 11:06:21.614198 # # ZA-VL-32-4: Terminated by signal 15, no error, iterations=3210, signals=9
2978 11:06:21.619279 # # ZA-VL-32-2: Terminated by signal 15, no error, iterations=3294, signals=10
2979 11:06:21.622654 # # SVE-VL-16-7: Terminated by signal 15, no error, iterations=4088, signals=9
2980 11:06:21.627161 # # SSVE-VL-32-3: Terminated by signal 15, no error, iterations=2957, signals=9
2981 11:06:21.628894 # # SVE-VL-64-2: Terminated by signal 15, no error, iterations=1962, signals=9
2982 11:06:21.630590 # # SSVE-VL-64-0: Terminated by signal 15, no error, iterations=1985, signals=9
2983 11:06:21.634592 # # ZA-VL-16-5: Terminated by signal 15, no error, iterations=8947, signals=9
2984 11:06:21.636901 # # FPSIMD-1-0: Terminated by signal 15, no error, iterations=7277, signals=10
2985 11:06:21.640282 # # ZA-VL-16-0: Terminated by signal 15, no error, iterations=8650, signals=9
2986 11:06:21.644279 # # SSVE-VL-16-2: Terminated by signal 15, no error, iterations=4296, signals=9
2987 11:06:21.647163 # # SSVE-VL-32-7: Terminated by signal 15, no error, iterations=3112, signals=9
2988 11:06:21.650016 # # SSVE-VL-64-4: Terminated by signal 15, no error, iterations=2057, signals=9
2989 11:06:21.651742 # # SSVE-VL-32-0: Terminated by signal 15, no error, iterations=2900, signals=9
2990 11:06:21.653472 # # SVE-VL-64-3: Terminated by signal 15, no error, iterations=1943, signals=9
2991 11:06:21.655719 # # SSVE-VL-16-1: Terminated by signal 15, no error, iterations=3785, signals=9
2992 11:06:21.657430 # # ZA-VL-16-3: Terminated by signal 15, no error, iterations=8004, signals=9
2993 11:06:21.660280 # # SSVE-VL-64-6: Terminated by signal 15, no error, iterations=1964, signals=9
2994 11:06:21.662577 # # SVE-VL-16-1: Terminated by signal 15, no error, iterations=4141, signals=9
2995 11:06:21.664286 # # SVE-VL-64-0: Terminated by signal 15, no error, iterations=1914, signals=9
2996 11:06:21.666575 # # SVE-VL-16-6: Terminated by signal 15, no error, iterations=4118, signals=9
2997 11:06:21.671166 # # SVE-VL-64-5: Terminated by signal 15, no error, iterations=1924, signals=9
2998 11:06:21.674525 # # SVE-VL-16-0: Terminated by signal 15, no error, iterations=3974, signals=9
2999 11:06:21.678453 # # SSVE-VL-64-1: Terminated by signal 15, no error, iterations=1928, signals=9
3000 11:06:21.682948 # # SVE-VL-32-5: Terminated by signal 15, no error, iterations=2921, signals=9
3001 11:06:21.685188 # # SVE-VL-64-6: Terminated by signal 15, no error, iterations=1963, signals=9
3002 11:06:21.686905 # # Totals: pass:88 fail:0 xfail:0 xpass:0 skip:0 error:0
3003 11:06:21.860933 ok 39 selftests: arm64: fp-stress
3004 11:06:22.964493 # timeout set to 45
3005 11:06:22.967353 # selftests: arm64: sve-ptrace
3006 11:06:24.445311 # TAP version 13
3007 11:06:24.446461 # 1..144
3008 11:06:24.447529 # # Parent is 1389, child is 1390
3009 11:06:24.449201 # ok 1 SVE FPSIMD set via SVE: 0
3010 11:06:24.451468 # ok 2 SVE get_fpsimd() gave same state
3011 11:06:24.452624 # ok 3 SVE SVE_PT_VL_INHERIT set
3012 11:06:24.453714 # ok 4 SVE SVE_PT_VL_INHERIT cleared
3013 11:06:24.455440 # ok 5 Set SVE VL 16
3014 11:06:24.457098 # ok 6 Set and get SVE data for VL 16
3015 11:06:24.458864 # ok 7 Set and get FPSIMD data for SVE VL 16
3016 11:06:24.459952 # ok 8 Set FPSIMD, read via SVE for SVE VL 16
3017 11:06:24.461091 # ok 9 Set SVE VL 32
3018 11:06:24.463346 # ok 10 Set and get SVE data for VL 32
3019 11:06:24.464997 # ok 11 Set and get FPSIMD data for SVE VL 32
3020 11:06:24.466141 # ok 12 Set FPSIMD, read via SVE for SVE VL 32
3021 11:06:24.467258 # ok 13 Set SVE VL 48
3022 11:06:24.469453 # ok 14 # SKIP SVE set SVE get SVE for VL 48
3023 11:06:24.481156 # ok 15 # SKIP SVE set SVE get FPSIMD for VL 48
3024 11:06:24.482881 # ok 16 # SKIP SVE set FPSIMD get SVE for VL 48
3025 11:06:24.484580 # ok 17 Set SVE VL 64
3026 11:06:24.486320 # ok 18 Set and get SVE data for VL 64
3027 11:06:24.488570 # ok 19 Set and get FPSIMD data for SVE VL 64
3028 11:06:24.489742 # ok 20 Set FPSIMD, read via SVE for SVE VL 64
3029 11:06:24.490880 # ok 21 Set SVE VL 80
3030 11:06:24.492590 # ok 22 # SKIP SVE set SVE get SVE for VL 80
3031 11:06:24.494865 # ok 23 # SKIP SVE set SVE get FPSIMD for VL 80
3032 11:06:24.496014 # ok 24 # SKIP SVE set FPSIMD get SVE for VL 80
3033 11:06:24.497147 # ok 25 Set SVE VL 96
3034 11:06:24.499440 # ok 26 # SKIP SVE set SVE get SVE for VL 96
3035 11:06:24.501161 # ok 27 # SKIP SVE set SVE get FPSIMD for VL 96
3036 11:06:24.502906 # ok 28 # SKIP SVE set FPSIMD get SVE for VL 96
3037 11:06:24.504055 # ok 29 Set SVE VL 112
3038 11:06:24.505792 # ok 30 # SKIP SVE set SVE get SVE for VL 112
3039 11:06:24.508093 # ok 31 # SKIP SVE set SVE get FPSIMD for VL 112
3040 11:06:24.509237 # ok 32 # SKIP SVE set FPSIMD get SVE for VL 112
3041 11:06:24.510393 # ok 33 Set SVE VL 128
3042 11:06:24.512104 # ok 34 # SKIP SVE set SVE get SVE for VL 128
3043 11:06:24.514365 # ok 35 # SKIP SVE set SVE get FPSIMD for VL 128
3044 11:06:24.515504 # ok 36 # SKIP SVE set FPSIMD get SVE for VL 128
3045 11:06:24.517210 # ok 37 Set SVE VL 144
3046 11:06:24.518951 # ok 38 # SKIP SVE set SVE get SVE for VL 144
3047 11:06:24.521224 # ok 39 # SKIP SVE set SVE get FPSIMD for VL 144
3048 11:06:24.522380 # ok 40 # SKIP SVE set FPSIMD get SVE for VL 144
3049 11:06:24.523526 # ok 41 Set SVE VL 160
3050 11:06:24.525225 # ok 42 # SKIP SVE set SVE get SVE for VL 160
3051 11:06:24.527505 # ok 43 # SKIP SVE set SVE get FPSIMD for VL 160
3052 11:06:24.528642 # ok 44 # SKIP SVE set FPSIMD get SVE for VL 160
3053 11:06:24.530947 # ok 45 Set SVE VL 176
3054 11:06:24.535514 # ok 46 # SKIP SVE set SVE get SVE for VL 176
3055 11:06:24.540005 # ok 47 # SKIP SVE set SVE get FPSIMD for VL 176
3056 11:06:24.542853 # ok 48 # SKIP SVE set FPSIMD get SVE for VL 176
3057 11:06:24.544561 # ok 49 Set SVE VL 192
3058 11:06:24.546841 # ok 50 # SKIP SVE set SVE get SVE for VL 192
3059 11:06:24.547402 # ok 51 # SKIP SVE set SVE get FPSIMD for VL 192
3060 11:06:24.547982 # ok 52 # SKIP SVE set FPSIMD get SVE for VL 192
3061 11:06:24.548564 # ok 53 Set SVE VL 208
3062 11:06:24.548664 # ok 54 # SKIP SVE set SVE get SVE for VL 208
3063 11:06:24.549713 # ok 55 # SKIP SVE set SVE get FPSIMD for VL 208
3064 11:06:24.549812 # ok 56 # SKIP SVE set FPSIMD get SVE for VL 208
3065 11:06:24.550318 # ok 57 Set SVE VL 224
3066 11:06:24.550885 # ok 58 # SKIP SVE set SVE get SVE for VL 224
3067 11:06:24.551461 # ok 59 # SKIP SVE set SVE get FPSIMD for VL 224
3068 11:06:24.552038 # ok 60 # SKIP SVE set FPSIMD get SVE for VL 224
3069 11:06:24.552621 # ok 61 Set SVE VL 240
3070 11:06:24.553197 # ok 62 # SKIP SVE set SVE get SVE for VL 240
3071 11:06:24.553770 # ok 63 # SKIP SVE set SVE get FPSIMD for VL 240
3072 11:06:24.554365 # ok 64 # SKIP SVE set FPSIMD get SVE for VL 240
3073 11:06:24.554936 # ok 65 Set SVE VL 256
3074 11:06:24.555035 # ok 66 # SKIP SVE set SVE get SVE for VL 256
3075 11:06:24.555537 # ok 67 # SKIP SVE set SVE get FPSIMD for VL 256
3076 11:06:24.556688 # ok 68 # SKIP SVE set FPSIMD get SVE for VL 256
3077 11:06:24.557261 # ok 69 Set SVE VL 272
3078 11:06:24.557859 # ok 70 # SKIP SVE set SVE get SVE for VL 272
3079 11:06:24.558441 # ok 71 # SKIP SVE set SVE get FPSIMD for VL 272
3080 11:06:24.559591 # ok 72 # SKIP SVE set FPSIMD get SVE for VL 272
3081 11:06:24.561322 # ok 73 Streaming SVE FPSIMD set via SVE: 0
3082 11:06:24.563061 # ok 74 Streaming SVE get_fpsimd() gave same state
3083 11:06:24.563162 # ok 75 Streaming SVE SVE_PT_VL_INHERIT set
3084 11:06:24.563625 # ok 76 Streaming SVE SVE_PT_VL_INHERIT cleared
3085 11:06:24.564219 # ok 77 Set Streaming SVE VL 16
3086 11:06:24.564316 # ok 78 Set and get Streaming SVE data for VL 16
3087 11:06:24.564406 # ok 79 Set and get FPSIMD data for Streaming SVE VL 16
3088 11:06:24.564785 # ok 80 Set FPSIMD, read via SVE for Streaming SVE VL 16
3089 11:06:24.565364 # ok 81 Set Streaming SVE VL 32
3090 11:06:24.565461 # ok 82 Set and get Streaming SVE data for VL 32
3091 11:06:24.565963 # ok 83 Set and get FPSIMD data for Streaming SVE VL 32
3092 11:06:24.567110 # ok 84 Set FPSIMD, read via SVE for Streaming SVE VL 32
3093 11:06:24.569412 # ok 85 Set Streaming SVE VL 48
3094 11:06:24.573358 # ok 86 # SKIP Streaming SVE set SVE get SVE for VL 48
3095 11:06:24.578501 # ok 87 # SKIP Streaming SVE set SVE get FPSIMD for VL 48
3096 11:06:24.581417 # ok 88 # SKIP Streaming SVE set FPSIMD get SVE for VL 48
3097 11:06:24.583081 # ok 89 Set Streaming SVE VL 64
3098 11:06:24.586518 # ok 90 Set and get Streaming SVE data for VL 64
3099 11:06:24.587107 # ok 91 Set and get FPSIMD data for Streaming SVE VL 64
3100 11:06:24.589359 # ok 92 Set FPSIMD, read via SVE for Streaming SVE VL 64
3101 11:06:24.604522 # ok 93 Set Streaming SVE VL 80
3102 11:06:24.610179 # ok 94 # SKIP Streaming SVE set SVE get SVE for VL 80
3103 11:06:24.798262 # ok 95 # SKIP Streaming SVE set SVE get FPSIMD for VL 80
3104 11:06:24.802229 # ok 96 # SKIP Streaming SVE set FPSIMD get SVE for VL 80
3105 11:06:24.802799 # ok 97 Set Streaming SVE VL 96
3106 11:06:24.805072 # ok 98 # SKIP Streaming SVE set SVE get SVE for VL 96
3107 11:06:24.807886 # ok 99 # SKIP Streaming SVE set SVE get FPSIMD for VL 96
3108 11:06:24.811296 # ok 100 # SKIP Streaming SVE set FPSIMD get SVE for VL 96
3109 11:06:24.813010 # ok 101 Set Streaming SVE VL 112
3110 11:06:24.814183 # ok 102 # SKIP Streaming SVE set SVE get SVE for VL 112
3111 11:06:24.815897 # ok 103 # SKIP Streaming SVE set SVE get FPSIMD for VL 112
3112 11:06:24.817036 # ok 104 # SKIP Streaming SVE set FPSIMD get SVE for VL 112
3113 11:06:24.817136 # ok 105 Set Streaming SVE VL 128
3114 11:06:24.817601 # ok 106 # SKIP Streaming SVE set SVE get SVE for VL 128
3115 11:06:24.817696 # ok 107 # SKIP Streaming SVE set SVE get FPSIMD for VL 128
3116 11:06:24.818189 # ok 108 # SKIP Streaming SVE set FPSIMD get SVE for VL 128
3117 11:06:24.818287 # ok 109 Set Streaming SVE VL 144
3118 11:06:24.818759 # ok 110 # SKIP Streaming SVE set SVE get SVE for VL 144
3119 11:06:24.818856 # ok 111 # SKIP Streaming SVE set SVE get FPSIMD for VL 144
3120 11:06:24.819337 # ok 112 # SKIP Streaming SVE set FPSIMD get SVE for VL 144
3121 11:06:24.819438 # ok 113 Set Streaming SVE VL 160
3122 11:06:24.819944 # ok 114 # SKIP Streaming SVE set SVE get SVE for VL 160
3123 11:06:24.820042 # ok 115 # SKIP Streaming SVE set SVE get FPSIMD for VL 160
3124 11:06:24.821641 # ok 116 # SKIP Streaming SVE set FPSIMD get SVE for VL 160
3125 11:06:24.831719 # ok 117 Set Streaming SVE VL 176
3126 11:06:24.833415 # ok 118 # SKIP Streaming SVE set SVE get SVE for VL 176
3127 11:06:24.833515 # ok 119 # SKIP Streaming SVE set SVE get FPSIMD for VL 176
3128 11:06:24.834578 # ok 120 # SKIP Streaming SVE set FPSIMD get SVE for VL 176
3129 11:06:24.835143 # ok 121 Set Streaming SVE VL 192
3130 11:06:24.835242 # ok 122 # SKIP Streaming SVE set SVE get SVE for VL 192
3131 11:06:24.835718 # ok 123 # SKIP Streaming SVE set SVE get FPSIMD for VL 192
3132 11:06:24.836298 # ok 124 # SKIP Streaming SVE set FPSIMD get SVE for VL 192
3133 11:06:24.836930 # ok 125 Set Streaming SVE VL 208
3134 11:06:24.837491 # ok 126 # SKIP Streaming SVE set SVE get SVE for VL 208
3135 11:06:24.837640 # ok 127 # SKIP Streaming SVE set SVE get FPSIMD for VL 208
3136 11:06:24.838143 # ok 128 # SKIP Streaming SVE set FPSIMD get SVE for VL 208
3137 11:06:24.838264 # ok 129 Set Streaming SVE VL 224
3138 11:06:24.838652 # ok 130 # SKIP Streaming SVE set SVE get SVE for VL 224
3139 11:06:24.838786 # ok 131 # SKIP Streaming SVE set SVE get FPSIMD for VL 224
3140 11:06:24.838894 # ok 132 # SKIP Streaming SVE set FPSIMD get SVE for VL 224
3141 11:06:24.839218 # ok 133 Set Streaming SVE VL 240
3142 11:06:24.839795 # ok 134 # SKIP Streaming SVE set SVE get SVE for VL 240
3143 11:06:24.839929 # ok 135 # SKIP Streaming SVE set SVE get FPSIMD for VL 240
3144 11:06:24.840372 # ok 136 # SKIP Streaming SVE set FPSIMD get SVE for VL 240
3145 11:06:24.840509 # ok 137 Set Streaming SVE VL 256
3146 11:06:24.842107 # ok 138 # SKIP Streaming SVE set SVE get SVE for VL 256
3147 11:06:24.843809 # ok 139 # SKIP Streaming SVE set SVE get FPSIMD for VL 256
3148 11:06:24.846730 # ok 140 # SKIP Streaming SVE set FPSIMD get SVE for VL 256
3149 11:06:24.847878 # ok 141 Set Streaming SVE VL 272
3150 11:06:24.849036 # ok 142 # SKIP Streaming SVE set SVE get SVE for VL 272
3151 11:06:24.850786 # ok 143 # SKIP Streaming SVE set SVE get FPSIMD for VL 272
3152 11:06:24.851366 # ok 144 # SKIP Streaming SVE set FPSIMD get SVE for VL 272
3153 11:06:24.851937 # # Totals: pass:60 fail:0 xfail:0 xpass:0 skip:84 error:0
3154 11:06:24.923577 ok 40 selftests: arm64: sve-ptrace
3155 11:06:25.875585 # timeout set to 45
3156 11:06:25.878756 # selftests: arm64: sve-probe-vls
3157 11:06:27.097931 # TAP version 13
3158 11:06:27.099018 # 1..2
3159 11:06:27.102925 # ok 1 Enumerated 3 vector lengths
3160 11:06:27.105275 # ok 2 All vector lengths valid
3161 11:06:27.106986 # # 16
3162 11:06:27.108143 # # 32
3163 11:06:27.109885 # # 64
3164 11:06:27.112172 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
3165 11:06:27.217485 ok 41 selftests: arm64: sve-probe-vls
3166 11:06:28.236916 # timeout set to 45
3167 11:06:28.240292 # selftests: arm64: vec-syscfg
3168 11:06:32.434230 # TAP version 13
3169 11:06:32.436195 # 1..21
3170 11:06:32.437915 # ok 1 SVE default vector length 64
3171 11:06:32.440185 # ok 2 SVE minimum vector length 16
3172 11:06:32.442467 # ok 3 SVE maximum vector length 64
3173 11:06:32.444736 # ok 4 SVE current VL is 64
3174 11:06:32.446981 # ok 5 SVE set VL 64 and have VL 64
3175 11:06:32.448691 # ok 6 SVE prctl() set min/max
3176 11:06:32.449882 # ok 7 SVE vector length used default
3177 11:06:32.450993 # ok 8 SVE vector length was inherited
3178 11:06:32.452151 # ok 9 SVE vector length set on exec
3179 11:06:32.452290 # ok 10 SVE prctl() set all VLs, 0 errors
3180 11:06:32.452401 # ok 11 SME default vector length 32
3181 11:06:32.452726 # ok 12 SME minimum vector length 16
3182 11:06:32.452864 # ok 13 SME maximum vector length 64
3183 11:06:32.452971 # ok 14 SME current VL is 32
3184 11:06:32.453320 # ok 15 SME set VL 32 and have VL 32
3185 11:06:32.453455 # ok 16 SME prctl() set min/max
3186 11:06:32.453561 # ok 17 SME vector length used default
3187 11:06:32.453935 # ok 18 SME vector length was inherited
3188 11:06:32.454071 # ok 19 SME vector length set on exec
3189 11:06:32.454592 # ok 20 SME prctl() set all VLs, 0 errors
3190 11:06:32.454737 # ok 21 change_sve_with_za
3191 11:06:32.454849 # # Totals: pass:21 fail:0 xfail:0 xpass:0 skip:0 error:0
3192 11:06:32.560543 ok 42 selftests: arm64: vec-syscfg
3193 11:06:33.532398 # timeout set to 45
3194 11:06:33.535210 # selftests: arm64: za-fork
3195 11:06:34.614434 # TAP version 13
3196 11:06:34.615573 # 1..1
3197 11:06:34.617873 # # PID: 1456
3198 11:06:34.619009 # ok 1 fork_test
3199 11:06:34.620135 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
3200 11:06:34.722213 ok 43 selftests: arm64: za-fork
3201 11:06:35.759373 # timeout set to 45
3202 11:06:35.762562 # selftests: arm64: za-ptrace
3203 11:06:37.263698 # TAP version 13
3204 11:06:37.264822 # 1..51
3205 11:06:37.265932 # # Parent is 1475, child is 1476
3206 11:06:37.266490 # ok 1 Set VL 16
3207 11:06:37.268169 # ok 2 Disabled ZA for VL 16
3208 11:06:37.270437 # ok 3 Data match for VL 16
3209 11:06:37.273247 # ok 4 Set VL 32
3210 11:06:37.276152 # ok 5 Disabled ZA for VL 32
3211 11:06:37.277263 # ok 6 Data match for VL 32
3212 11:06:37.278475 # ok 7 Set VL 48
3213 11:06:37.279065 # ok 8 # SKIP Disabled ZA for VL 48
3214 11:06:37.280719 # ok 9 # SKIP Get and set data for VL 48
3215 11:06:37.280857 # ok 10 Set VL 64
3216 11:06:37.280964 # ok 11 Disabled ZA for VL 64
3217 11:06:37.281297 # ok 12 Data match for VL 64
3218 11:06:37.281629 # ok 13 Set VL 80
3219 11:06:37.281755 # ok 14 # SKIP Disabled ZA for VL 80
3220 11:06:37.281894 # ok 15 # SKIP Get and set data for VL 80
3221 11:06:37.282004 # ok 16 Set VL 96
3222 11:06:37.282123 # ok 17 # SKIP Disabled ZA for VL 96
3223 11:06:37.282468 # ok 18 # SKIP Get and set data for VL 96
3224 11:06:37.282585 # ok 19 Set VL 112
3225 11:06:37.282691 # ok 20 # SKIP Disabled ZA for VL 112
3226 11:06:37.283041 # ok 21 # SKIP Get and set data for VL 112
3227 11:06:37.283156 # ok 22 Set VL 128
3228 11:06:37.283597 # ok 23 # SKIP Disabled ZA for VL 128
3229 11:06:37.283904 # ok 24 # SKIP Get and set data for VL 128
3230 11:06:37.284023 # ok 25 Set VL 144
3231 11:06:37.284328 # ok 26 # SKIP Disabled ZA for VL 144
3232 11:06:37.284434 # ok 27 # SKIP Get and set data for VL 144
3233 11:06:37.284740 # ok 28 Set VL 160
3234 11:06:37.284855 # ok 29 # SKIP Disabled ZA for VL 160
3235 11:06:37.285322 # ok 30 # SKIP Get and set data for VL 160
3236 11:06:37.285903 # ok 31 Set VL 176
3237 11:06:37.286505 # ok 32 # SKIP Disabled ZA for VL 176
3238 11:06:37.287058 # ok 33 # SKIP Get and set data for VL 176
3239 11:06:37.287176 # ok 34 Set VL 192
3240 11:06:37.287617 # ok 35 # SKIP Disabled ZA for VL 192
3241 11:06:37.288183 # ok 36 # SKIP Get and set data for VL 192
3242 11:06:37.288298 # ok 37 Set VL 208
3243 11:06:37.288794 # ok 38 # SKIP Disabled ZA for VL 208
3244 11:06:37.288910 # ok 39 # SKIP Get and set data for VL 208
3245 11:06:37.289010 # ok 40 Set VL 224
3246 11:06:37.289378 # ok 41 # SKIP Disabled ZA for VL 224
3247 11:06:37.289509 # ok 42 # SKIP Get and set data for VL 224
3248 11:06:37.289615 # ok 43 Set VL 240
3249 11:06:37.289953 # ok 44 # SKIP Disabled ZA for VL 240
3250 11:06:37.290091 # ok 45 # SKIP Get and set data for VL 240
3251 11:06:37.290512 # ok 46 Set VL 256
3252 11:06:37.290632 # ok 47 # SKIP Disabled ZA for VL 256
3253 11:06:37.291120 # ok 48 # SKIP Get and set data for VL 256
3254 11:06:37.291239 # ok 49 Set VL 272
3255 11:06:37.291621 # ok 50 # SKIP Disabled ZA for VL 272
3256 11:06:37.291741 # ok 51 # SKIP Get and set data for VL 272
3257 11:06:37.292172 # # Totals: pass:23 fail:0 xfail:0 xpass:0 skip:28 error:0
3258 11:06:37.380341 ok 44 selftests: arm64: za-ptrace
3259 11:06:38.334022 # timeout set to 45
3260 11:06:38.337298 # selftests: arm64: check_buffer_fill
3261 11:06:40.706275 # 1..20
3262 11:06:40.709074 # ok 1 Check buffer correctness by byte with sync err mode and mmap memory
3263 11:06:40.711917 # ok 2 Check buffer correctness by byte with async err mode and mmap memory
3264 11:06:40.715408 # ok 3 Check buffer correctness by byte with sync err mode and mmap/mprotect memory
3265 11:06:40.719424 # ok 4 Check buffer correctness by byte with async err mode and mmap/mprotect memory
3266 11:06:40.721097 # ok 5 Check buffer write underflow by byte with sync mode and mmap memory
3267 11:06:40.723426 # ok 6 Check buffer write underflow by byte with async mode and mmap memory
3268 11:06:40.723530 # ok 7 Check buffer write underflow by byte with tag check fault ignore and mmap memory
3269 11:06:40.724147 # ok 8 Check buffer write underflow by byte with sync mode and mmap memory
3270 11:06:40.724246 # ok 9 Check buffer write underflow by byte with async mode and mmap memory
3271 11:06:40.724754 # ok 10 Check buffer write underflow by byte with tag check fault ignore and mmap memory
3272 11:06:40.725140 # ok 11 Check buffer write overflow by byte with sync mode and mmap memory
3273 11:06:40.725235 # ok 12 Check buffer write overflow by byte with async mode and mmap memory
3274 11:06:40.725876 # ok 13 Check buffer write overflow by byte with tag fault ignore mode and mmap memory
3275 11:06:40.726331 # ok 14 Check buffer write correctness by block with sync mode and mmap memory
3276 11:06:40.726427 # ok 15 Check buffer write correctness by block with async mode and mmap memory
3277 11:06:40.726893 # ok 16 Check buffer write correctness by block with tag fault ignore and mmap memory
3278 11:06:40.726990 # # FAIL: mmap allocation
3279 11:06:40.727079 # # FAIL: memory allocation
3280 11:06:40.727621 # not ok 17 Check initial tags with private mapping, sync error mode and mmap memory
3281 11:06:40.728607 # ok 18 Check initial tags with private mapping, sync error mode and mmap/mprotect memory
3282 11:06:40.729180 # # FAIL: mmap allocation
3283 11:06:40.729272 # # FAIL: memory allocation
3284 11:06:40.740563 # not ok 19 Check initial tags with shared mapping, sync error mode and mmap memory
3285 11:06:40.741688 # ok 20 Check initial tags with shared mapping, sync error mode and mmap/mprotect memory
3286 11:06:40.742844 # # Totals: pass:18 fail:2 xfail:0 xpass:0 skip:0 error:0
3287 11:06:40.899534 not ok 45 selftests: arm64: check_buffer_fill # exit=1
3288 11:06:41.926223 # timeout set to 45
3289 11:06:41.929654 # selftests: arm64: check_child_memory
3290 11:06:48.261070 # 1..12
3291 11:06:48.265009 # ok 1 Check child anonymous memory with private mapping, precise mode and mmap memory
3292 11:06:48.267208 # ok 2 Check child anonymous memory with shared mapping, precise mode and mmap memory
3293 11:06:48.270678 # ok 3 Check child anonymous memory with private mapping, imprecise mode and mmap memory
3294 11:06:48.274030 # ok 4 Check child anonymous memory with shared mapping, imprecise mode and mmap memory
3295 11:06:48.275748 # ok 5 Check child anonymous memory with private mapping, precise mode and mmap/mprotect memory
3296 11:06:48.278025 # ok 6 Check child anonymous memory with shared mapping, precise mode and mmap/mprotect memory
3297 11:06:48.278184 # # FAIL: mmap allocation
3298 11:06:48.278585 # # FAIL: memory allocation
3299 11:06:48.278738 # not ok 7 Check child file memory with private mapping, precise mode and mmap memory
3300 11:06:48.279129 # # FAIL: mmap allocation
3301 11:06:48.279273 # # FAIL: memory allocation
3302 11:06:48.279704 # not ok 8 Check child file memory with shared mapping, precise mode and mmap memory
3303 11:06:48.279879 # ok 9 Check child file memory with private mapping, imprecise mode and mmap memory
3304 11:06:48.280035 # ok 10 Check child file memory with shared mapping, imprecise mode and mmap memory
3305 11:06:48.280409 # ok 11 Check child file memory with private mapping, precise mode and mmap/mprotect memory
3306 11:06:48.280837 # ok 12 Check child file memory with shared mapping, precise mode and mmap/mprotect memory
3307 11:06:48.280978 # # Totals: pass:10 fail:2 xfail:0 xpass:0 skip:0 error:0
3308 11:06:48.440310 not ok 46 selftests: arm64: check_child_memory # exit=1
3309 11:06:49.454391 # timeout set to 45
3310 11:06:49.457172 # selftests: arm64: check_gcr_el1_cswitch
3311 11:14:59.693531 # 1..1
3312 11:14:59.695215 # ok 1 Verify that GCR_EL1 is set correctly on context switch
3313 11:14:59.696377 # # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0
3314 11:14:59.838939 ok 47 selftests: arm64: check_gcr_el1_cswitch
3315 11:15:00.876406 # timeout set to 45
3316 11:15:00.879719 # selftests: arm64: check_hugetlb_options
3317 11:15:11.102907 # 1..12
3318 11:15:11.106377 # ok 1 Check hugetlb memory with private mapping, sync error mode, mmap memory and tag check off
3319 11:15:11.108131 # ok 2 Check hugetlb memory with private mapping, no error mode, mmap memory and tag check off
3320 11:15:11.108690 # ok 3 Check hugetlb memory with private mapping, sync error mode, mmap memory and tag check on
3321 11:15:11.112168 # ok 4 Check hugetlb memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
3322 11:15:11.117300 # ok 5 Check hugetlb memory with private mapping, async error mode, mmap memory and tag check on
3323 11:15:11.132582 # ok 6 Check hugetlb memory with private mapping, async error mode, mmap/mprotect memory and tag check on
3324 11:15:11.135752 # ok 7 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
3325 11:15:11.135843 # ok 8 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
3326 11:15:11.136313 # ok 9 Check child hugetlb memory with private mapping, precise mode and mmap memory
3327 11:15:11.136389 # ok 10 Check child hugetlb memory with private mapping, precise mode and mmap memory
3328 11:15:11.136873 # ok 11 Check child hugetlb memory with private mapping, precise mode and mmap/mprotect memory
3329 11:15:11.137437 # ok 12 Check child hugetlb memory with private mapping, precise mode and mmap/mprotect memory
3330 11:15:11.137977 # # Totals: pass:12 fail:0 xfail:0 xpass:0 skip:0 error:0
3331 11:15:11.235795 ok 48 selftests: arm64: check_hugetlb_options
3332 11:15:12.215000 # timeout set to 45
3333 11:15:12.218227 # selftests: arm64: check_ksm_options
3334 11:15:17.308535 # 1..4
3335 11:15:17.311802 # ok 1 Check KSM mte page merge for private mapping, sync mode and mmap memory
3336 11:15:17.315686 # ok 2 Check KSM mte page merge for private mapping, async mode and mmap memory
3337 11:15:17.319611 # ok 3 Check KSM mte page merge for shared mapping, sync mode and mmap memory
3338 11:15:17.321859 # ok 4 Check KSM mte page merge for shared mapping, async mode and mmap memory
3339 11:15:17.323523 # # Totals: pass:4 fail:0 xfail:0 xpass:0 skip:0 error:0
3340 11:15:17.413903 ok 49 selftests: arm64: check_ksm_options
3341 11:15:18.337824 # timeout set to 45
3342 11:15:18.341163 # selftests: arm64: check_mmap_options
3343 11:15:20.802671 # 1..22
3344 11:15:20.806173 # ok 1 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check off
3345 11:15:20.807925 # ok 2 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check off
3346 11:15:20.811319 # ok 3 Check anonymous memory with private mapping, no error mode, mmap memory and tag check off
3347 11:15:20.814785 # ok 4 Check file memory with private mapping, no error mode, mmap/mprotect memory and tag check off
3348 11:15:20.817036 # ok 5 Check anonymous memory with private mapping, sync error mode, mmap memory and tag check on
3349 11:15:20.818797 # ok 6 Check anonymous memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
3350 11:15:20.819387 # ok 7 Check anonymous memory with shared mapping, sync error mode, mmap memory and tag check on
3351 11:15:20.819520 # ok 8 Check anonymous memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
3352 11:15:20.820049 # ok 9 Check anonymous memory with private mapping, async error mode, mmap memory and tag check on
3353 11:15:20.820182 # ok 10 Check anonymous memory with private mapping, async error mode, mmap/mprotect memory and tag check on
3354 11:15:20.820510 # ok 11 Check anonymous memory with shared mapping, async error mode, mmap memory and tag check on
3355 11:15:20.821121 # ok 12 Check anonymous memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
3356 11:15:20.821254 # # FAIL: mmap allocation
3357 11:15:20.821359 # # FAIL: memory allocation
3358 11:15:20.821674 # not ok 13 Check file memory with private mapping, sync error mode, mmap memory and tag check on
3359 11:15:20.822307 # ok 14 Check file memory with private mapping, sync error mode, mmap/mprotect memory and tag check on
3360 11:15:20.822445 # # FAIL: mmap allocation
3361 11:15:20.822900 # # FAIL: memory allocation
3362 11:15:20.823684 # not ok 15 Check file memory with shared mapping, sync error mode, mmap memory and tag check on
3363 11:15:20.824642 # ok 16 Check file memory with shared mapping, sync error mode, mmap/mprotect memory and tag check on
3364 11:15:20.824774 # # FAIL: mmap allocation
3365 11:15:20.825150 # # FAIL: memory allocation
3366 11:15:20.825733 # not ok 17 Check file memory with private mapping, async error mode, mmap memory and tag check on
3367 11:15:20.825875 # ok 18 Check file memory with private mapping, async error mode, mmap/mprotect memory and tag check on
3368 11:15:20.826419 # # FAIL: mmap allocation
3369 11:15:20.826552 # # FAIL: memory allocation
3370 11:15:20.826953 # not ok 19 Check file memory with shared mapping, async error mode, mmap memory and tag check on
3371 11:15:20.827538 # ok 20 Check file memory with shared mapping, async error mode, mmap/mprotect memory and tag check on
3372 11:15:20.827668 # # FAIL: mmap allocation
3373 11:15:20.827774 # # FAIL: memory allocation
3374 11:15:20.837554 # not ok 21 Check clear PROT_MTE flags with private mapping, sync error mode and mmap memory
3375 11:15:20.839849 # ok 22 Check clear PROT_MTE flags with private mapping and sync error mode and mmap/mprotect memory
3376 11:15:20.840436 # # Totals: pass:17 fail:5 xfail:0 xpass:0 skip:0 error:0
3377 11:15:20.962107 not ok 50 selftests: arm64: check_mmap_options # exit=1
3378 11:15:22.025907 # timeout set to 45
3379 11:15:22.029208 # selftests: arm64: check_prctl
3380 11:15:23.241812 # TAP version 13
3381 11:15:23.242823 # 1..5
3382 11:15:23.244539 # ok 1 check_basic_read
3383 11:15:23.246759 # ok 2 NONE
3384 11:15:23.247871 # ok 3 SYNC
3385 11:15:23.248426 # ok 4 ASYNC
3386 11:15:23.248976 # ok 5 SYNC+ASYNC
3387 11:15:23.251206 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
3388 11:15:23.383390 ok 51 selftests: arm64: check_prctl
3389 11:15:24.429190 # timeout set to 45
3390 11:15:24.432370 # selftests: arm64: check_tags_inclusion
3391 11:15:26.084148 # 1..4
3392 11:15:26.088580 # ok 1 Check an included tag value with sync mode
3393 11:15:26.091961 # ok 2 Check different included tags value with sync mode
3394 11:15:26.095339 # ok 3 Check none included tags value with sync mode
3395 11:15:26.097590 # ok 4 Check all included tags value with sync mode
3396 11:15:26.100385 # # Totals: pass:4 fail:0 xfail:0 xpass:0 skip:0 error:0
3397 11:15:26.212201 ok 52 selftests: arm64: check_tags_inclusion
3398 11:15:27.316028 # timeout set to 45
3399 11:15:27.319978 # selftests: arm64: check_user_mem
3400 11:16:16.366562 # 1..64
3401 11:16:16.367247 # ok 1 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
3402 11:16:16.367664 # ok 2 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
3403 11:16:16.367847 # ok 3 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
3404 11:16:16.368250 # ok 4 test type: read, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
3405 11:16:16.368854 # ok 5 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
3406 11:16:16.369032 # ok 6 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
3407 11:16:16.369573 # ok 7 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
3408 11:16:16.370101 # ok 8 test type: read, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
3409 11:16:16.370496 # ok 9 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
3410 11:16:16.370695 # ok 10 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
3411 11:16:16.371227 # ok 11 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
3412 11:16:16.371360 # ok 12 test type: read, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
3413 11:16:16.371858 # ok 13 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
3414 11:16:16.372415 # ok 14 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
3415 11:16:16.372555 # ok 15 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
3416 11:16:16.372993 # ok 16 test type: read, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
3417 11:16:16.373570 # ok 17 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
3418 11:16:16.373894 # ok 18 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
3419 11:16:16.374229 # ok 19 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
3420 11:16:16.374770 # ok 20 test type: write, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
3421 11:16:16.375336 # ok 21 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
3422 11:16:16.375665 # ok 22 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
3423 11:16:16.376032 # ok 23 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
3424 11:16:16.376498 # ok 24 test type: write, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
3425 11:16:16.376642 # ok 25 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
3426 11:16:16.377082 # ok 26 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
3427 11:16:16.377654 # ok 27 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
3428 11:16:16.378249 # ok 28 test type: write, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
3429 11:16:16.378578 # ok 29 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
3430 11:16:16.388293 # ok 30 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
3431 11:16:16.390022 # ok 31 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
3432 11:16:16.391734 # ok 32 test type: write, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
3433 11:16:16.392312 # ok 33 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
3434 11:16:16.392926 # ok 34 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
3435 11:16:16.393270 # ok 35 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
3436 11:16:16.394060 # ok 36 test type: readv, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
3437 11:16:16.394204 # ok 37 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
3438 11:16:16.394643 # ok 38 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
3439 11:16:16.395218 # ok 39 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
3440 11:16:16.395781 # ok 40 test type: readv, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
3441 11:16:16.395920 # ok 41 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
3442 11:16:16.396375 # ok 42 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
3443 11:16:16.396960 # ok 43 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
3444 11:16:16.397109 # ok 44 test type: readv, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
3445 11:16:16.397539 # ok 45 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
3446 11:16:16.398105 # ok 46 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
3447 11:16:16.398258 # ok 47 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
3448 11:16:16.398699 # ok 48 test type: readv, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
3449 11:16:16.399260 # ok 49 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
3450 11:16:16.399393 # ok 50 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
3451 11:16:16.399842 # ok 51 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
3452 11:16:27.254925 # ok 52 test type: writev, MTE_SYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
3453 11:16:27.256696 # ok 53 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
3454 11:16:27.260638 # ok 54 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
3455 11:16:27.266910 # ok 55 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
3456 11:16:27.268596 # ok 56 test type: writev, MTE_SYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
3457 11:16:27.282208 # ok 57 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 0
3458 11:16:27.291749 # ok 58 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 0, tag offset: 16
3459 11:16:27.300269 # ok 59 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 0
3460 11:16:27.304832 # ok 60 test type: writev, MTE_ASYNC_ERR, MAP_SHARED, tag len: 16, tag offset: 16
3461 11:16:27.306561 # ok 61 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 0
3462 11:16:27.307145 # ok 62 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 0, tag offset: 16
3463 11:16:27.307704 # ok 63 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 0
3464 11:16:27.308862 # ok 64 test type: writev, MTE_ASYNC_ERR, MAP_PRIVATE, tag len: 16, tag offset: 16
3465 11:16:27.309450 # # Totals: pass:64 fail:0 xfail:0 xpass:0 skip:0 error:0
3466 11:16:27.417872 ok 53 selftests: arm64: check_user_mem
3467 11:16:28.387824 # timeout set to 45
3468 11:16:28.391058 # selftests: arm64: btitest
3469 11:16:29.571528 # TAP version 13
3470 11:16:29.572599 # 1..18
3471 11:16:29.574317 # # HWCAP_PACA present
3472 11:16:29.575430 # # HWCAP2_BTI present
3473 11:16:29.577130 # # Test binary built for BTI
3474 11:16:29.580482 # # [SIGILL in nohint_func/call_using_br_x0, BTYPE=11 (expected)]
3475 11:16:29.583289 # ok 1 nohint_func/call_using_br_x0
3476 11:16:29.586119 # # [SIGILL in nohint_func/call_using_br_x16, BTYPE=01 (expected)]
3477 11:16:29.587210 # ok 2 nohint_func/call_using_br_x16
3478 11:16:29.589485 # # [SIGILL in nohint_func/call_using_blr, BTYPE=10 (expected)]
3479 11:16:29.589639 # ok 3 nohint_func/call_using_blr
3480 11:16:29.590205 # # [SIGILL in bti_none_func/call_using_br_x0, BTYPE=11 (expected)]
3481 11:16:29.590349 # ok 4 bti_none_func/call_using_br_x0
3482 11:16:29.590705 # # [SIGILL in bti_none_func/call_using_br_x16, BTYPE=01 (expected)]
3483 11:16:29.591216 # ok 5 bti_none_func/call_using_br_x16
3484 11:16:29.591364 # # [SIGILL in bti_none_func/call_using_blr, BTYPE=10 (expected)]
3485 11:16:29.591741 # ok 6 bti_none_func/call_using_blr
3486 11:16:29.591885 # # [SIGILL in bti_c_func/call_using_br_x0, BTYPE=11 (expected)]
3487 11:16:29.592270 # ok 7 bti_c_func/call_using_br_x0
3488 11:16:29.592375 # ok 8 bti_c_func/call_using_br_x16
3489 11:16:29.592859 # ok 9 bti_c_func/call_using_blr
3490 11:16:29.592959 # ok 10 bti_j_func/call_using_br_x0
3491 11:16:29.593381 # ok 11 bti_j_func/call_using_br_x16
3492 11:16:29.593958 # # [SIGILL in bti_j_func/call_using_blr, BTYPE=10 (expected)]
3493 11:16:29.594056 # ok 12 bti_j_func/call_using_blr
3494 11:16:29.595037 # ok 13 bti_jc_func/call_using_br_x0
3495 11:16:29.595602 # ok 14 bti_jc_func/call_using_br_x16
3496 11:16:29.595702 # ok 15 bti_jc_func/call_using_blr
3497 11:16:29.596719 # # [SIGILL in paciasp_func/call_using_br_x0, BTYPE=11 (expected)]
3498 11:16:29.596818 # ok 16 paciasp_func/call_using_br_x0
3499 11:16:29.597273 # ok 17 paciasp_func/call_using_br_x16
3500 11:16:29.597850 # ok 18 paciasp_func/call_using_blr
3501 11:16:29.598411 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
3502 11:16:29.694158 ok 54 selftests: arm64: btitest
3503 11:16:30.683498 # timeout set to 45
3504 11:16:30.686880 # selftests: arm64: nobtitest
3505 11:16:31.768186 # TAP version 13
3506 11:16:31.770444 # 1..18
3507 11:16:31.772167 # # HWCAP_PACA present
3508 11:16:31.773340 # # HWCAP2_BTI present
3509 11:16:31.773960 # # Test binary not built for BTI
3510 11:16:31.775683 # ok 1 nohint_func/call_using_br_x0
3511 11:16:31.778003 # ok 2 nohint_func/call_using_br_x16
3512 11:16:31.780325 # ok 3 nohint_func/call_using_blr
3513 11:16:31.781481 # ok 4 bti_none_func/call_using_br_x0
3514 11:16:31.783743 # ok 5 bti_none_func/call_using_br_x16
3515 11:16:31.798840 # ok 6 bti_none_func/call_using_blr
3516 11:16:31.801122 # ok 7 bti_c_func/call_using_br_x0
3517 11:16:31.802296 # ok 8 bti_c_func/call_using_br_x16
3518 11:16:31.802879 # ok 9 bti_c_func/call_using_blr
3519 11:16:31.803462 # ok 10 bti_j_func/call_using_br_x0
3520 11:16:31.803600 # ok 11 bti_j_func/call_using_br_x16
3521 11:16:31.803711 # ok 12 bti_j_func/call_using_blr
3522 11:16:31.804044 # ok 13 bti_jc_func/call_using_br_x0
3523 11:16:31.804183 # ok 14 bti_jc_func/call_using_br_x16
3524 11:16:31.804312 # ok 15 bti_jc_func/call_using_blr
3525 11:16:31.804639 # ok 16 paciasp_func/call_using_br_x0
3526 11:16:31.804772 # ok 17 paciasp_func/call_using_br_x16
3527 11:16:31.804897 # ok 18 paciasp_func/call_using_blr
3528 11:16:31.805213 # # Totals: pass:18 fail:0 xfail:0 xpass:0 skip:0 error:0
3529 11:16:31.899596 ok 55 selftests: arm64: nobtitest
3530 11:16:33.040736 # timeout set to 45
3531 11:16:33.046982 # selftests: arm64: hwcap
3532 11:16:35.187111 # TAP version 13
3533 11:16:35.187278 # 1..171
3534 11:16:35.187574 # ok 1 cpuinfo_match_AES
3535 11:16:35.187671 # # sigill_reported for AES
3536 11:16:35.187773 # ok 2 # SKIP sigill_AES
3537 11:16:35.187857 # ok 3 # SKIP sigbus_AES
3538 11:16:35.188191 # # CRC32 present
3539 11:16:35.188287 # ok 4 cpuinfo_match_CRC32
3540 11:16:35.188382 # ok 5 sigill_CRC32
3541 11:16:35.188896 # ok 6 # SKIP sigbus_CRC32
3542 11:16:35.189003 # ok 7 cpuinfo_match_CSSC
3543 11:16:35.189084 # # sigill_reported for CSSC
3544 11:16:35.189441 # ok 8 # SKIP sigill_CSSC
3545 11:16:35.189545 # ok 9 # SKIP sigbus_CSSC
3546 11:16:35.189650 # ok 10 cpuinfo_match_F8CVT
3547 11:16:35.189749 # # sigill_reported for F8CVT
3548 11:16:35.190186 # ok 11 # SKIP sigill_F8CVT
3549 11:16:35.190372 # ok 12 # SKIP sigbus_F8CVT
3550 11:16:35.190640 # ok 13 cpuinfo_match_F8DP4
3551 11:16:35.190725 # # sigill_reported for F8DP4
3552 11:16:35.190998 # ok 14 # SKIP sigill_F8DP4
3553 11:16:35.191118 # ok 15 # SKIP sigbus_F8DP4
3554 11:16:35.191206 # ok 16 cpuinfo_match_F8DP2
3555 11:16:35.191290 # # sigill_reported for F8DP2
3556 11:16:35.191358 # ok 17 # SKIP sigill_F8DP2
3557 11:16:35.191431 # ok 18 # SKIP sigbus_F8DP2
3558 11:16:35.191716 # ok 19 cpuinfo_match_F8E5M2
3559 11:16:35.191817 # ok 20 # SKIP sigill_F8E5M2
3560 11:16:35.192265 # ok 21 # SKIP sigbus_F8E5M2
3561 11:16:35.192412 # ok 22 cpuinfo_match_F8E4M3
3562 11:16:35.192827 # ok 23 # SKIP sigill_F8E4M3
3563 11:16:35.192925 # ok 24 # SKIP sigbus_F8E4M3
3564 11:16:35.193037 # ok 25 cpuinfo_match_F8FMA
3565 11:16:35.193623 # # sigill_reported for F8FMA
3566 11:16:35.193720 # ok 26 # SKIP sigill_F8FMA
3567 11:16:35.193813 # ok 27 # SKIP sigbus_F8FMA
3568 11:16:35.194118 # ok 28 cpuinfo_match_FAMINMAX
3569 11:16:35.194215 # # sigill_reported for FAMINMAX
3570 11:16:35.194280 # ok 29 # SKIP sigill_FAMINMAX
3571 11:16:35.194602 # ok 30 # SKIP sigbus_FAMINMAX
3572 11:16:35.194699 # # FP present
3573 11:16:35.194973 # ok 31 cpuinfo_match_FP
3574 11:16:35.195069 # ok 32 sigill_FP
3575 11:16:35.198003 # ok 33 # SKIP sigbus_FP
3576 11:16:35.198123 # ok 34 cpuinfo_match_FPMR
3577 11:16:35.198221 # ok 35 sigill_FPMR
3578 11:16:35.198321 # ok 36 # SKIP sigbus_FPMR
3579 11:16:35.198411 # ok 37 cpuinfo_match_GCS
3580 11:16:35.198497 # ok 38 sigill_GCS
3581 11:16:35.198559 # ok 39 # SKIP sigbus_GCS
3582 11:16:35.198619 # # JSCVT present
3583 11:16:35.198904 # ok 40 cpuinfo_match_JSCVT
3584 11:16:35.199802 # ok 41 sigill_JSCVT
3585 11:16:35.203363 # ok 42 # SKIP sigbus_JSCVT
3586 11:16:35.205938 # # LRCPC present
3587 11:16:35.207630 # ok 43 cpuinfo_match_LRCPC
3588 11:16:35.212022 # ok 44 sigill_LRCPC
3589 11:16:35.214345 # ok 45 # SKIP sigbus_LRCPC
3590 11:16:35.216854 # # LRCPC2 present
3591 11:16:35.219238 # ok 46 cpuinfo_match_LRCPC2
3592 11:16:35.222723 # ok 47 sigill_LRCPC2
3593 11:16:35.223788 # ok 48 # SKIP sigbus_LRCPC2
3594 11:16:35.224445 # ok 49 cpuinfo_match_LRCPC3
3595 11:16:35.224605 # # sigill_reported for LRCPC3
3596 11:16:35.224934 # ok 50 # SKIP sigill_LRCPC3
3597 11:16:35.226074 # ok 51 # SKIP sigbus_LRCPC3
3598 11:16:35.226206 # # LSE present
3599 11:16:35.231760 # ok 52 cpuinfo_match_LSE
3600 11:16:35.234101 # ok 53 sigill_LSE
3601 11:16:35.235697 # ok 54 # SKIP sigbus_LSE
3602 11:16:35.235892 # # LSE2 present
3603 11:16:35.236370 # ok 55 cpuinfo_match_LSE2
3604 11:16:35.237035 # ok 56 sigill_LSE2
3605 11:16:35.237217 # ok 57 sigbus_LSE2
3606 11:16:35.238309 # ok 58 cpuinfo_match_LSE128
3607 11:16:35.238480 # # sigill_reported for LSE128
3608 11:16:35.238881 # ok 59 # SKIP sigill_LSE128
3609 11:16:35.239021 # ok 60 # SKIP sigbus_LSE128
3610 11:16:35.239156 # ok 61 cpuinfo_match_LUT
3611 11:16:35.240051 # # sigill_reported for LUT
3612 11:16:35.240394 # ok 62 # SKIP sigill_LUT
3613 11:16:35.240660 # ok 63 # SKIP sigbus_LUT
3614 11:16:35.240857 # ok 64 cpuinfo_match_MOPS
3615 11:16:35.241212 # ok 65 sigill_MOPS
3616 11:16:35.241461 # ok 66 # SKIP sigbus_MOPS
3617 11:16:35.241664 # ok 67 cpuinfo_match_PMULL
3618 11:16:35.241912 # # sigill_reported for PMULL
3619 11:16:35.242107 # ok 68 # SKIP sigill_PMULL
3620 11:16:35.242269 # ok 69 # SKIP sigbus_PMULL
3621 11:16:35.242686 # ok 70 cpuinfo_match_POE
3622 11:16:35.242785 # ok 71 sigill_POE
3623 11:16:35.242901 # ok 72 # SKIP sigbus_POE
3624 11:16:35.243113 # # RNG present
3625 11:16:35.243260 # ok 73 cpuinfo_match_RNG
3626 11:16:35.243393 # ok 74 sigill_RNG
3627 11:16:35.243527 # ok 75 # SKIP sigbus_RNG
3628 11:16:35.243761 # ok 76 cpuinfo_match_RPRFM
3629 11:16:35.243854 # ok 77 # SKIP sigill_RPRFM
3630 11:16:35.243965 # ok 78 # SKIP sigbus_RPRFM
3631 11:16:35.244101 # ok 79 cpuinfo_match_SHA1
3632 11:16:35.244314 # # sigill_reported for SHA1
3633 11:16:35.244449 # ok 80 # SKIP sigill_SHA1
3634 11:16:35.244602 # ok 81 # SKIP sigbus_SHA1
3635 11:16:35.244800 # ok 82 cpuinfo_match_SHA2
3636 11:16:35.244931 # # sigill_reported for SHA2
3637 11:16:35.245083 # ok 83 # SKIP sigill_SHA2
3638 11:16:35.245215 # ok 84 # SKIP sigbus_SHA2
3639 11:16:35.245430 # ok 85 cpuinfo_match_SHA512
3640 11:16:35.245585 # # sigill_reported for SHA512
3641 11:16:35.245714 # ok 86 # SKIP sigill_SHA512
3642 11:16:35.245924 # ok 87 # SKIP sigbus_SHA512
3643 11:16:35.246098 # # SME present
3644 11:16:35.246503 # ok 88 cpuinfo_match_SME
3645 11:16:35.248272 # ok 89 sigill_SME
3646 11:16:35.250624 # ok 90 # SKIP sigbus_SME
3647 11:16:35.253985 # ok 91 cpuinfo_match_SME2
3648 11:16:35.256244 # ok 92 sigill_SME2
3649 11:16:35.259580 # ok 93 # SKIP sigbus_SME2
3650 11:16:35.263619 # ok 94 cpuinfo_match_SME 2.1
3651 11:16:35.265212 # # sigill_reported for SME 2.1
3652 11:16:35.268781 # ok 95 # SKIP sigill_SME 2.1
3653 11:16:35.271619 # ok 96 # SKIP sigbus_SME 2.1
3654 11:16:35.274239 # ok 97 cpuinfo_match_SME I16I32
3655 11:16:35.274668 # # sigill_not reported for SME I16I32
3656 11:16:35.274771 # ok 98 # SKIP sigill_SME I16I32
3657 11:16:35.274853 # ok 99 # SKIP sigbus_SME I16I32
3658 11:16:35.274946 # ok 100 cpuinfo_match_SME BI32I32
3659 11:16:35.275027 # # sigill_reported for SME BI32I32
3660 11:16:35.276320 # ok 101 # SKIP sigill_SME BI32I32
3661 11:16:35.276451 # ok 102 # SKIP sigbus_SME BI32I32
3662 11:16:35.276550 # ok 103 cpuinfo_match_SME B16B16
3663 11:16:35.276645 # # sigill_reported for SME B16B16
3664 11:16:35.276748 # ok 104 # SKIP sigill_SME B16B16
3665 11:16:35.276834 # ok 105 # SKIP sigbus_SME B16B16
3666 11:16:35.277113 # ok 106 cpuinfo_match_SME F16F16
3667 11:16:35.277226 # # sigill_reported for SME F16F16
3668 11:16:35.277332 # ok 107 # SKIP sigill_SME F16F16
3669 11:16:35.277944 # ok 108 # SKIP sigbus_SME F16F16
3670 11:16:35.278128 # ok 109 cpuinfo_match_SME F8F16
3671 11:16:35.278347 # # sigill_reported for SME F8F16
3672 11:16:35.278531 # ok 110 # SKIP sigill_SME F8F16
3673 11:16:35.278834 # ok 111 # SKIP sigbus_SME F8F16
3674 11:16:35.279287 # ok 112 cpuinfo_match_SME F8F32
3675 11:16:35.279494 # # sigill_reported for SME F8F32
3676 11:16:35.279627 # ok 113 # SKIP sigill_SME F8F32
3677 11:16:35.279714 # ok 114 # SKIP sigbus_SME F8F32
3678 11:16:35.279792 # ok 115 cpuinfo_match_SME LUTV2
3679 11:16:35.280041 # # sigill_reported for SME LUTV2
3680 11:16:35.281242 # ok 116 # SKIP sigill_SME LUTV2
3681 11:16:35.832360 # ok 117 # SKIP sigbus_SME LUTV2
3682 11:16:35.837731 # ok 118 cpuinfo_match_SME SF8FMA
3683 11:16:35.839421 # # sigill_reported for SME SF8FMA
3684 11:16:35.840102 # ok 119 # SKIP sigill_SME SF8FMA
3685 11:16:35.842859 # ok 120 # SKIP sigbus_SME SF8FMA
3686 11:16:35.848970 # ok 121 cpuinfo_match_SME SF8DP2
3687 11:16:35.852383 # # sigill_reported for SME SF8DP2
3688 11:16:35.856201 # ok 122 # SKIP sigill_SME SF8DP2
3689 11:16:35.856919 # ok 123 # SKIP sigbus_SME SF8DP2
3690 11:16:35.857948 # ok 124 cpuinfo_match_SME SF8DP4
3691 11:16:35.860968 # # sigill_reported for SME SF8DP4
3692 11:16:35.861893 # ok 125 # SKIP sigill_SME SF8DP4
3693 11:16:35.862000 # ok 126 # SKIP sigbus_SME SF8DP4
3694 11:16:35.862298 # # SVE present
3695 11:16:35.863180 # ok 127 cpuinfo_match_SVE
3696 11:16:35.863338 # ok 128 sigill_SVE
3697 11:16:35.864060 # ok 129 # SKIP sigbus_SVE
3698 11:16:35.864279 # # SVE 2 present
3699 11:16:35.864489 # ok 130 cpuinfo_match_SVE 2
3700 11:16:35.864587 # ok 131 sigill_SVE 2
3701 11:16:35.864677 # ok 132 # SKIP sigbus_SVE 2
3702 11:16:35.864776 # ok 133 cpuinfo_match_SVE 2.1
3703 11:16:35.864848 # # sigill_reported for SVE 2.1
3704 11:16:35.865875 # ok 134 # SKIP sigill_SVE 2.1
3705 11:16:35.866858 # ok 135 # SKIP sigbus_SVE 2.1
3706 11:16:35.867015 # ok 136 cpuinfo_match_SVE AES
3707 11:16:35.867120 # # sigill_reported for SVE AES
3708 11:16:35.868146 # ok 137 # SKIP sigill_SVE AES
3709 11:16:35.868572 # ok 138 # SKIP sigbus_SVE AES
3710 11:16:35.868659 # ok 139 cpuinfo_match_SVE2 B16B16
3711 11:16:35.868730 # # sigill_reported for SVE2 B16B16
3712 11:16:35.868797 # ok 140 # SKIP sigill_SVE2 B16B16
3713 11:16:35.869884 # ok 141 # SKIP sigbus_SVE2 B16B16
3714 11:16:35.870335 # ok 142 cpuinfo_match_SVE2 PMULL
3715 11:16:35.870910 # # sigill_reported for SVE2 PMULL
3716 11:16:35.871044 # ok 143 # SKIP sigill_SVE2 PMULL
3717 11:16:35.871505 # ok 144 # SKIP sigbus_SVE2 PMULL
3718 11:16:35.874658 # # SVE2 BITPERM present
3719 11:16:35.895575 # ok 145 cpuinfo_match_SVE2 BITPERM
3720 11:16:35.899321 # ok 146 sigill_SVE2 BITPERM
3721 11:16:35.899451 # ok 147 # SKIP sigbus_SVE2 BITPERM
3722 11:16:35.899543 # ok 148 cpuinfo_match_SVE2 SHA3
3723 11:16:35.899814 # # sigill_not reported for SVE2 SHA3
3724 11:16:35.899918 # ok 149 # SKIP sigill_SVE2 SHA3
3725 11:16:35.900381 # ok 150 # SKIP sigbus_SVE2 SHA3
3726 11:16:35.900701 # ok 151 cpuinfo_match_SVE2 SM4
3727 11:16:35.900799 # # sigill_reported for SVE2 SM4
3728 11:16:35.901191 # ok 152 # SKIP sigill_SVE2 SM4
3729 11:16:35.901289 # ok 153 # SKIP sigbus_SVE2 SM4
3730 11:16:35.902427 # # SVE2 I8MM present
3731 11:16:35.902527 # ok 154 cpuinfo_match_SVE2 I8MM
3732 11:16:35.904115 # ok 155 sigill_SVE2 I8MM
3733 11:16:35.904221 # ok 156 # SKIP sigbus_SVE2 I8MM
3734 11:16:35.904322 # # SVE2 F32MM present
3735 11:16:35.904610 # ok 157 cpuinfo_match_SVE2 F32MM
3736 11:16:35.905596 # ok 158 sigill_SVE2 F32MM
3737 11:16:35.906794 # ok 159 # SKIP sigbus_SVE2 F32MM
3738 11:16:35.907724 # # SVE2 F64MM present
3739 11:16:35.912755 # ok 160 cpuinfo_match_SVE2 F64MM
3740 11:16:35.914042 # ok 161 sigill_SVE2 F64MM
3741 11:16:35.916516 # ok 162 # SKIP sigbus_SVE2 F64MM
3742 11:16:35.921603 # # SVE2 BF16 present
3743 11:16:35.921741 # ok 163 cpuinfo_match_SVE2 BF16
3744 11:16:35.921847 # ok 164 sigill_SVE2 BF16
3745 11:16:35.922314 # ok 165 # SKIP sigbus_SVE2 BF16
3746 11:16:35.922610 # # SVE2 EBF16 present
3747 11:16:35.927052 # ok 166 cpuinfo_match_SVE2 EBF16
3748 11:16:35.927183 # ok 167 # SKIP sigill_SVE2 EBF16
3749 11:16:35.927272 # ok 168 # SKIP sigbus_SVE2 EBF16
3750 11:16:35.927365 # ok 169 cpuinfo_match_HBC
3751 11:16:35.927652 # ok 170 sigill_HBC
3752 11:16:35.928601 # ok 171 # SKIP sigbus_HBC
3753 11:16:35.928754 # # Totals: pass:80 fail:0 xfail:0 xpass:0 skip:91 error:0
3754 11:16:36.034240 ok 56 selftests: arm64: hwcap
3755 11:16:37.612284 # timeout set to 45
3756 11:16:37.617742 # selftests: arm64: ptrace
3757 11:16:39.604768 [ 129.025660] systemd-journald[128]: Sent WATCHDOG=1 notification.
3758 11:16:40.071686 # TAP version 13
3759 11:16:40.072279 # 1..11
3760 11:16:40.073351 # # Parent is 7951, child is 7952
3761 11:16:40.074855 # ok 1 read_tpidr_one
3762 11:16:40.077549 # ok 2 write_tpidr_one
3763 11:16:40.082018 # ok 3 verify_tpidr_one
3764 11:16:40.086087 # ok 4 count_tpidrs
3765 11:16:40.089951 # ok 5 tpidr2_write
3766 11:16:40.090929 # ok 6 tpidr2_read
3767 11:16:40.093096 # ok 7 write_tpidr_only
3768 11:16:40.094902 # ok 8 read_NT_ARM_HW_WATCH
3769 11:16:40.098456 # # NT_ARM_HW_WATCH version 9 with 16 slots
3770 11:16:40.098632 # ok 9 NT_ARM_HW_WATCH_arch_set
3771 11:16:40.100773 # ok 10 read_NT_ARM_HW_BREAK
3772 11:16:40.103644 # # NT_ARM_HW_BREAK version 9 with 16 slots
3773 11:16:40.103806 # ok 11 NT_ARM_HW_BREAK_arch_set
3774 11:16:40.103892 # # Totals: pass:11 fail:0 xfail:0 xpass:0 skip:0 error:0
3775 11:16:40.255510 ok 57 selftests: arm64: ptrace
3776 11:16:42.039186 # timeout set to 45
3777 11:16:42.043183 # selftests: arm64: syscall-abi
3778 11:16:50.238679 # TAP version 13
3779 11:16:50.240391 # 1..80
3780 11:16:50.244364 # # SME1 without FA64
3781 11:16:50.246143 # ok 1 getpid() FPSIMD
3782 11:16:50.248511 # ok 2 getpid() SVE VL 64
3783 11:16:50.252585 # ok 3 getpid() SVE VL 64/SME VL 64 SM+ZA
3784 11:16:50.256065 # ok 4 getpid() SVE VL 64/SME VL 64 SM
3785 11:16:50.262628 # ok 5 getpid() SVE VL 64/SME VL 64 ZA
3786 11:16:50.265308 # ok 6 getpid() SVE VL 64/SME VL 32 SM+ZA
3787 11:16:50.266464 # ok 7 getpid() SVE VL 64/SME VL 32 SM
3788 11:16:50.268785 # ok 8 getpid() SVE VL 64/SME VL 32 ZA
3789 11:16:50.272207 # ok 9 getpid() SVE VL 64/SME VL 16 SM+ZA
3790 11:16:50.272760 # ok 10 getpid() SVE VL 64/SME VL 16 SM
3791 11:16:50.272919 # ok 11 getpid() SVE VL 64/SME VL 16 ZA
3792 11:16:50.273238 # ok 12 getpid() SVE VL 32
3793 11:16:50.273363 # ok 13 getpid() SVE VL 32/SME VL 64 SM+ZA
3794 11:16:50.273883 # ok 14 getpid() SVE VL 32/SME VL 64 SM
3795 11:16:50.274023 # ok 15 getpid() SVE VL 32/SME VL 64 ZA
3796 11:16:50.274453 # ok 16 getpid() SVE VL 32/SME VL 32 SM+ZA
3797 11:16:50.274999 # ok 17 getpid() SVE VL 32/SME VL 32 SM
3798 11:16:50.275094 # ok 18 getpid() SVE VL 32/SME VL 32 ZA
3799 11:16:50.275175 # ok 19 getpid() SVE VL 32/SME VL 16 SM+ZA
3800 11:16:50.275546 # ok 20 getpid() SVE VL 32/SME VL 16 SM
3801 11:16:50.276313 # ok 21 getpid() SVE VL 32/SME VL 16 ZA
3802 11:16:50.276410 # ok 22 getpid() SVE VL 16
3803 11:16:50.276692 # ok 23 getpid() SVE VL 16/SME VL 64 SM+ZA
3804 11:16:50.276787 # ok 24 getpid() SVE VL 16/SME VL 64 SM
3805 11:16:50.277312 # ok 25 getpid() SVE VL 16/SME VL 64 ZA
3806 11:16:50.277979 # ok 26 getpid() SVE VL 16/SME VL 32 SM+ZA
3807 11:16:50.278129 # ok 27 getpid() SVE VL 16/SME VL 32 SM
3808 11:16:50.278450 # ok 28 getpid() SVE VL 16/SME VL 32 ZA
3809 11:16:50.279558 # ok 29 getpid() SVE VL 16/SME VL 16 SM+ZA
3810 11:16:50.280089 # ok 30 getpid() SVE VL 16/SME VL 16 SM
3811 11:16:50.280640 # ok 31 getpid() SVE VL 16/SME VL 16 ZA
3812 11:16:50.281248 # ok 32 getpid() SME VL 64 SM+ZA
3813 11:16:50.281790 # ok 33 getpid() SME VL 64 SM
3814 11:16:50.281909 # ok 34 getpid() SME VL 64 ZA
3815 11:16:50.283176 # ok 35 getpid() SME VL 32 SM+ZA
3816 11:16:50.283555 # ok 36 getpid() SME VL 32 SM
3817 11:16:50.283702 # ok 37 getpid() SME VL 32 ZA
3818 11:16:50.316619 # ok 38 getpid() SME VL 16 SM+ZA
3819 11:16:50.322040 # ok 39 getpid() SME VL 16 SM
3820 11:16:50.326578 # ok 40 getpid() SME VL 16 ZA
3821 11:16:50.327627 # ok 41 sched_yield() FPSIMD
3822 11:16:50.328807 # ok 42 sched_yield() SVE VL 64
3823 11:16:50.329403 # ok 43 sched_yield() SVE VL 64/SME VL 64 SM+ZA
3824 11:16:50.329497 # ok 44 sched_yield() SVE VL 64/SME VL 64 SM
3825 11:16:50.330845 # ok 45 sched_yield() SVE VL 64/SME VL 64 ZA
3826 11:16:50.330943 # ok 46 sched_yield() SVE VL 64/SME VL 32 SM+ZA
3827 11:16:50.331240 # ok 47 sched_yield() SVE VL 64/SME VL 32 SM
3828 11:16:50.331857 # ok 48 sched_yield() SVE VL 64/SME VL 32 ZA
3829 11:16:50.332320 # ok 49 sched_yield() SVE VL 64/SME VL 16 SM+ZA
3830 11:16:50.333441 # ok 50 sched_yield() SVE VL 64/SME VL 16 SM
3831 11:16:50.334636 # ok 51 sched_yield() SVE VL 64/SME VL 16 ZA
3832 11:16:50.338424 # ok 52 sched_yield() SVE VL 32
3833 11:16:50.343769 # ok 53 sched_yield() SVE VL 32/SME VL 64 SM+ZA
3834 11:16:50.347745 # ok 54 sched_yield() SVE VL 32/SME VL 64 SM
3835 11:16:50.348959 # ok 55 sched_yield() SVE VL 32/SME VL 64 ZA
3836 11:16:50.351240 # ok 56 sched_yield() SVE VL 32/SME VL 32 SM+ZA
3837 11:16:50.352084 # ok 57 sched_yield() SVE VL 32/SME VL 32 SM
3838 11:16:50.352684 # ok 58 sched_yield() SVE VL 32/SME VL 32 ZA
3839 11:16:50.353246 # ok 59 sched_yield() SVE VL 32/SME VL 16 SM+ZA
3840 11:16:50.353845 # ok 60 sched_yield() SVE VL 32/SME VL 16 SM
3841 11:16:50.354967 # ok 61 sched_yield() SVE VL 32/SME VL 16 ZA
3842 11:16:50.356115 # ok 62 sched_yield() SVE VL 16
3843 11:16:50.357248 # ok 63 sched_yield() SVE VL 16/SME VL 64 SM+ZA
3844 11:16:50.357821 # ok 64 sched_yield() SVE VL 16/SME VL 64 SM
3845 11:16:50.358428 # ok 65 sched_yield() SVE VL 16/SME VL 64 ZA
3846 11:16:50.359036 # ok 66 sched_yield() SVE VL 16/SME VL 32 SM+ZA
3847 11:16:50.359124 # ok 67 sched_yield() SVE VL 16/SME VL 32 SM
3848 11:16:50.359393 # ok 68 sched_yield() SVE VL 16/SME VL 32 ZA
3849 11:16:50.359668 # ok 69 sched_yield() SVE VL 16/SME VL 16 SM+ZA
3850 11:16:50.359744 # ok 70 sched_yield() SVE VL 16/SME VL 16 SM
3851 11:16:50.360190 # ok 71 sched_yield() SVE VL 16/SME VL 16 ZA
3852 11:16:50.360277 # ok 72 sched_yield() SME VL 64 SM+ZA
3853 11:16:50.360752 # ok 73 sched_yield() SME VL 64 SM
3854 11:16:50.361315 # ok 74 sched_yield() SME VL 64 ZA
3855 11:16:50.362102 # ok 75 sched_yield() SME VL 32 SM+ZA
3856 11:16:50.362570 # ok 76 sched_yield() SME VL 32 SM
3857 11:16:50.363129 # ok 77 sched_yield() SME VL 32 ZA
3858 11:16:50.363218 # ok 78 sched_yield() SME VL 16 SM+ZA
3859 11:16:50.363721 # ok 79 sched_yield() SME VL 16 SM
3860 11:16:50.364283 # ok 80 sched_yield() SME VL 16 ZA
3861 11:16:50.364376 # # Totals: pass:80 fail:0 xfail:0 xpass:0 skip:0 error:0
3862 11:16:50.446541 ok 58 selftests: arm64: syscall-abi
3863 11:16:51.834126 # timeout set to 45
3864 11:16:51.838513 # selftests: arm64: tpidr2
3865 11:16:53.451312 # TAP version 13
3866 11:16:53.453652 # 1..5
3867 11:16:53.456426 # # PID: 7988
3868 11:16:53.456999 # ok 1 default_value
3869 11:16:53.458129 # ok 2 write_read
3870 11:16:53.460473 # ok 3 write_sleep_read
3871 11:16:53.463392 # ok 4 write_fork_read
3872 11:16:53.466221 # ok 5 write_clone_read
3873 11:16:53.470414 # # Totals: pass:5 fail:0 xfail:0 xpass:0 skip:0 error:0
3874 11:16:53.614625 ok 59 selftests: arm64: tpidr2
3875 11:16:54.968551 # timeout set to 45
3876 11:16:54.972912 # selftests: arm64: basic-gcs
3877 11:16:56.410807 # TAP version 13
3878 11:16:56.415233 # 1..0 # SKIP Failed to read GCS state: -22
3879 11:16:56.631233 ok 60 selftests: arm64: basic-gcs # SKIP
3880 11:16:57.864462 # timeout set to 45
3881 11:16:57.868751 # selftests: arm64: libc-gcs
3882 11:16:59.419626 # 1..0 # SKIP SKIP GCS not supported
3883 11:16:59.637072 ok 61 selftests: arm64: libc-gcs # SKIP
3884 11:17:01.009991 # timeout set to 45
3885 11:17:01.014589 # selftests: arm64: gcs-locking
3886 11:17:02.611240 # 1..0 # SKIP SKIP GCS not supported
3887 11:17:02.799009 ok 62 selftests: arm64: gcs-locking # SKIP
3888 11:17:04.256176 # timeout set to 45
3889 11:17:04.261852 # selftests: arm64: gcs-stress
3890 11:17:06.157916 # TAP version 13
3891 11:17:06.159639 # 1..0
3892 11:17:06.164237 # # 8 CPUs, 0 GCS threads
3893 11:17:06.165881 # 1..0 # SKIP No tests scheduled
3894 11:17:06.462586 ok 63 selftests: arm64: gcs-stress # SKIP
3895 11:17:08.176187 # timeout set to 45
3896 11:17:08.181818 # selftests: arm64: gcspushm
3897 11:17:10.235387 # Failed to enable GCS with push permission
3898 11:17:10.542562 ok 64 selftests: arm64: gcspushm # SKIP
3899 11:17:12.326253 # timeout set to 45
3900 11:17:12.332789 # selftests: arm64: gcsstr
3901 11:17:14.456076 # Failed to enable GCS with write permission
3902 11:17:14.744588 ok 65 selftests: arm64: gcsstr # SKIP
3903 11:18:07.056129 arm64_tags_test_Syscall_successful_with_tagged_address pass
3904 11:18:07.056343 arm64_tags_test pass
3905 11:18:07.064460 arm64_fake_sigreturn_bad_magic pass
3906 11:18:07.066004 arm64_fake_sigreturn_bad_size pass
3907 11:18:07.066201 arm64_fake_sigreturn_bad_size_for_magic0 pass
3908 11:18:07.066470 arm64_fake_sigreturn_duplicated_fpsimd pass
3909 11:18:07.066922 arm64_fake_sigreturn_misaligned_sp pass
3910 11:18:07.067102 arm64_fake_sigreturn_missing_fpsimd pass
3911 11:18:07.067475 arm64_fake_sigreturn_sme_change_vl pass
3912 11:18:07.067646 arm64_fake_sigreturn_sve_change_vl pass
3913 11:18:07.067764 arm64_fpmr_siginfo pass
3914 11:18:07.067871 arm64_gcs_exception_fault skip
3915 11:18:07.068099 arm64_gcs_frame skip
3916 11:18:07.068253 arm64_gcs_write_fault skip
3917 11:18:07.068367 arm64_mangle_pstate_invalid_compat_toggle pass
3918 11:18:07.068702 arm64_mangle_pstate_invalid_daif_bits pass
3919 11:18:07.068844 arm64_mangle_pstate_invalid_mode_el1h pass
3920 11:18:07.068999 arm64_mangle_pstate_invalid_mode_el1t pass
3921 11:18:07.069255 arm64_mangle_pstate_invalid_mode_el2h pass
3922 11:18:07.069394 arm64_mangle_pstate_invalid_mode_el2t pass
3923 11:18:07.069766 arm64_mangle_pstate_invalid_mode_el3h pass
3924 11:18:07.069940 arm64_mangle_pstate_invalid_mode_el3t pass
3925 11:18:07.070125 arm64_poe_siginfo pass
3926 11:18:07.070297 arm64_sme_trap_no_sm pass
3927 11:18:07.070444 arm64_sme_trap_non_streaming pass
3928 11:18:07.070555 arm64_sme_trap_za pass
3929 11:18:07.070911 arm64_sme_vl pass
3930 11:18:07.072057 arm64_ssve_regs pass
3931 11:18:07.072625 arm64_ssve_za_regs pass
3932 11:18:07.072783 arm64_sve_regs pass
3933 11:18:07.072916 arm64_sve_vl pass
3934 11:18:07.073097 arm64_tpidr2_restore pass
3935 11:18:07.073512 arm64_tpidr2_siginfo pass
3936 11:18:07.073649 arm64_za_no_regs pass
3937 11:18:07.073812 arm64_za_regs pass
3938 11:18:07.073974 arm64_zt_no_regs skip
3939 11:18:07.074156 arm64_zt_regs skip
3940 11:18:07.074287 arm64_pac_global_corrupt_pac pass
3941 11:18:07.074460 arm64_pac_global_pac_instructions_not_nop pass
3942 11:18:07.074578 arm64_pac_global_pac_instructions_not_nop_generic pass
3943 11:18:07.074709 arm64_pac_global_single_thread_different_keys pass
3944 11:18:07.074817 arm64_pac_global_exec_changed_keys pass
3945 11:18:07.075012 arm64_pac_global_context_switch_keep_keys pass
3946 11:18:07.075158 arm64_pac_global_context_switch_keep_keys_generic pass
3947 11:18:07.075271 arm64_pac pass
3948 11:18:07.075608 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_0 pass
3949 11:18:07.075752 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_0 pass
3950 11:18:07.075860 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_0 pass
3951 11:18:07.076196 arm64_fp-ptrace_No_writes_SVE_64-_16_SME_64_0-_64_0 skip
3952 11:18:07.076337 arm64_fp-ptrace_FPSIMD_write_SVE_64-_16_SME_64_0-_64_0 skip
3953 11:18:07.076445 arm64_fp-ptrace_SVE_write_SVE_64-_16_SME_64_0-_64_0 pass
3954 11:18:07.076801 arm64_fp-ptrace_No_writes_SVE_16-_64_SME_64_0-_64_0 skip
3955 11:18:07.076943 arm64_fp-ptrace_FPSIMD_write_SVE_16-_64_SME_64_0-_64_0 skip
3956 11:18:07.078731 arm64_fp-ptrace_SVE_write_SVE_16-_64_SME_64_0-_64_0 pass
3957 11:18:07.078989 arm64_fp-ptrace_No_writes_SVE_16-_16_SME_64_0-_64_0 pass
3958 11:18:07.079153 arm64_fp-ptrace_FPSIMD_write_SVE_16-_16_SME_64_0-_64_0 pass
3959 11:18:07.079505 arm64_fp-ptrace_SVE_write_SVE_16-_16_SME_64_0-_64_0 pass
3960 11:18:07.079668 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_0_dup2 pass
3961 11:18:07.079794 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_0_dup2 pass
3962 11:18:07.079956 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_0_dup2 pass
3963 11:18:07.080134 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_0 pass
3964 11:18:07.080376 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_1 skip
3965 11:18:07.080530 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_1 skip
3966 11:18:07.080723 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_1 pass
3967 11:18:07.080931 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_1 skip
3968 11:18:07.081154 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_2 skip
3969 11:18:07.081357 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_2 skip
3970 11:18:07.081526 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_2 skip
3971 11:18:07.081686 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_2 pass
3972 11:18:07.081867 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_0 skip
3973 11:18:07.082008 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_0 skip
3974 11:18:07.082177 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_0 pass
3975 11:18:07.082345 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_0 skip
3976 11:18:07.082472 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_1 pass
3977 11:18:07.082690 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_1 pass
3978 11:18:07.082886 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_1 pass
3979 11:18:07.083034 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_1 pass
3980 11:18:07.083401 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_2 skip
3981 11:18:07.083558 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_2 skip
3982 11:18:07.083789 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_2 skip
3983 11:18:07.092342 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_2 skip
3984 11:18:07.092759 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_3 skip
3985 11:18:07.093358 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_3 skip
3986 11:18:07.093465 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_3 skip
3987 11:18:07.093557 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_3 pass
3988 11:18:07.093895 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_0 skip
3989 11:18:07.094050 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_0 skip
3990 11:18:07.094467 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_0 skip
3991 11:18:07.094615 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_0 pass
3992 11:18:07.095056 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_1 skip
3993 11:18:07.095237 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_1 skip
3994 11:18:07.095817 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_1 skip
3995 11:18:07.095924 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_1 skip
3996 11:18:07.096237 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_2 pass
3997 11:18:07.096390 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_2 pass
3998 11:18:07.096761 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_2 pass
3999 11:18:07.096919 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_2 pass
4000 11:18:07.097095 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_3 skip
4001 11:18:07.097385 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_3 skip
4002 11:18:07.098192 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_3 pass
4003 11:18:07.098303 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_3 skip
4004 11:18:07.098587 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_0 skip
4005 11:18:07.100192 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_0 skip
4006 11:18:07.101922 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_0 skip
4007 11:18:07.103087 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_0 skip
4008 11:18:07.103575 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_1 skip
4009 11:18:07.103880 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_1 skip
4010 11:18:07.104189 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_1 skip
4011 11:18:07.104287 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_1 pass
4012 11:18:07.104734 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_2 skip
4013 11:18:07.104907 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_2 skip
4014 11:18:07.105962 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_2 pass
4015 11:18:07.106149 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_2 skip
4016 11:18:07.106251 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_3 pass
4017 11:18:07.106340 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_3 pass
4018 11:18:07.106623 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_3 pass
4019 11:18:07.106720 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_3 pass
4020 11:18:07.106799 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_0 skip
4021 11:18:07.107176 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_0 skip
4022 11:18:07.107467 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_0 skip
4023 11:18:07.107552 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_0 pass
4024 11:18:07.107824 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_1 skip
4025 11:18:07.107951 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_1 skip
4026 11:18:07.108050 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_1 pass
4027 11:18:07.108845 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_1 skip
4028 11:18:07.109760 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_2 skip
4029 11:18:07.110123 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_2 skip
4030 11:18:07.110220 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_2 skip
4031 11:18:07.110300 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_2 pass
4032 11:18:07.110617 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_0 skip
4033 11:18:07.111386 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_0 skip
4034 11:18:07.111481 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_0 skip
4035 11:18:07.111562 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_0 skip
4036 11:18:07.111882 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_1 skip
4037 11:18:07.111977 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_1 skip
4038 11:18:07.112056 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_1 pass
4039 11:18:07.112378 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_1 skip
4040 11:18:07.112661 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_2 skip
4041 11:18:07.112949 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_2 skip
4042 11:18:07.113058 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_2 skip
4043 11:18:07.113137 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_2 skip
4044 11:18:07.113958 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_3 skip
4045 11:18:07.114061 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_3 skip
4046 11:18:07.114140 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_3 skip
4047 11:18:07.117896 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_3 skip
4048 11:18:07.119562 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_0 skip
4049 11:18:07.120335 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_0 skip
4050 11:18:07.120434 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_0 skip
4051 11:18:07.120515 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_0 pass
4052 11:18:07.120785 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_1 skip
4053 11:18:07.120867 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_1 skip
4054 11:18:07.121317 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_1 skip
4055 11:18:07.121461 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_1 skip
4056 11:18:07.121794 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_2 skip
4057 11:18:07.121916 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_2 skip
4058 11:18:07.122001 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_2 skip
4059 11:18:07.122605 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_2 pass
4060 11:18:07.122705 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_3 skip
4061 11:18:07.122784 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_3 skip
4062 11:18:07.123065 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_3 skip
4063 11:18:07.136542 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_3 skip
4064 11:18:07.136731 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_0 skip
4065 11:18:07.137010 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_0 skip
4066 11:18:07.137303 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_0 skip
4067 11:18:07.137393 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_0 skip
4068 11:18:07.137673 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_1 skip
4069 11:18:07.137768 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_1 skip
4070 11:18:07.137856 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_1 skip
4071 11:18:07.138383 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_1 skip
4072 11:18:07.138468 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_2 skip
4073 11:18:07.138739 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_2 skip
4074 11:18:07.139071 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_2 skip
4075 11:18:07.139208 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_2 skip
4076 11:18:07.139306 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_3 skip
4077 11:18:07.139814 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_3 skip
4078 11:18:07.139913 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_3 skip
4079 11:18:07.140188 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_3 skip
4080 11:18:07.140283 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_0 skip
4081 11:18:07.141388 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_0 skip
4082 11:18:07.141736 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_0 skip
4083 11:18:07.141882 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_0 pass
4084 11:18:07.142021 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_1 skip
4085 11:18:07.142158 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_1 skip
4086 11:18:07.142294 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_1 pass
4087 11:18:07.142433 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_1 skip
4088 11:18:07.142590 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_2 skip
4089 11:18:07.142724 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_2 skip
4090 11:18:07.142880 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_2 skip
4091 11:18:07.143013 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_2 pass
4092 11:18:07.143151 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_0 skip
4093 11:18:07.143308 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_0 skip
4094 11:18:07.143441 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_0 skip
4095 11:18:07.143868 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_0 skip
4096 11:18:07.144957 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_1 skip
4097 11:18:07.145102 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_1 skip
4098 11:18:07.145435 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_1 pass
4099 11:18:07.145567 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_1 skip
4100 11:18:07.146424 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_2 skip
4101 11:18:07.146567 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_2 skip
4102 11:18:07.146724 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_2 skip
4103 11:18:07.147169 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_2 skip
4104 11:18:07.147504 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_3 skip
4105 11:18:07.147638 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_3 skip
4106 11:18:07.147791 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_3 skip
4107 11:18:07.147924 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_3 skip
4108 11:18:07.150581 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_0 skip
4109 11:18:07.152799 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_0 skip
4110 11:18:07.153968 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_0 skip
4111 11:18:07.154504 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_0 pass
4112 11:18:07.154787 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_1 skip
4113 11:18:07.155081 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_1 skip
4114 11:18:07.155176 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_1 skip
4115 11:18:07.155657 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_1 skip
4116 11:18:07.155941 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_2 skip
4117 11:18:07.156247 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_2 skip
4118 11:18:07.156526 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_2 skip
4119 11:18:07.156813 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_2 pass
4120 11:18:07.157367 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_3 skip
4121 11:18:07.157950 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_3 skip
4122 11:18:07.158237 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_3 skip
4123 11:18:07.159960 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_3 skip
4124 11:18:07.161375 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_0 skip
4125 11:18:07.163061 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_0 skip
4126 11:18:07.163642 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_0 skip
4127 11:18:07.163777 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_0 skip
4128 11:18:07.163875 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_1 skip
4129 11:18:07.164214 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_1 skip
4130 11:18:07.164311 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_1 skip
4131 11:18:07.164764 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_1 skip
4132 11:18:07.164860 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_2 skip
4133 11:18:07.165174 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_2 skip
4134 11:18:07.165991 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_2 skip
4135 11:18:07.166139 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_2 skip
4136 11:18:07.166568 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_3 skip
4137 11:18:07.166661 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_3 skip
4138 11:18:07.166929 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_3 skip
4139 11:18:07.167200 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_3 skip
4140 11:18:07.167281 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_0 pass
4141 11:18:07.167721 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_0 pass
4142 11:18:07.167819 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_0 pass
4143 11:18:07.167896 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_0 pass
4144 11:18:07.168333 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_1 skip
4145 11:18:07.169467 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_1 skip
4146 11:18:07.170688 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_1 pass
4147 11:18:07.170798 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_1 skip
4148 11:18:07.170876 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_2 skip
4149 11:18:07.170951 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_2 skip
4150 11:18:07.171226 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_2 skip
4151 11:18:07.171322 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_2 pass
4152 11:18:07.171401 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_0 skip
4153 11:18:07.171776 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_0 skip
4154 11:18:07.171879 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_0 pass
4155 11:18:07.172347 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_0 skip
4156 11:18:07.172445 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_1 pass
4157 11:18:07.172524 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_1 pass
4158 11:18:07.172930 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_1 pass
4159 11:18:07.175909 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_1 pass
4160 11:18:07.176046 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_2 skip
4161 11:18:07.176339 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_2 skip
4162 11:18:07.176442 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_2 skip
4163 11:18:07.176525 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_2 skip
4164 11:18:07.176602 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_3 skip
4165 11:18:07.176721 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_3 skip
4166 11:18:07.176853 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_3 skip
4167 11:18:07.176952 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_3 pass
4168 11:18:07.177052 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_0 skip
4169 11:18:07.177136 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_0 skip
4170 11:18:07.177214 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_0 skip
4171 11:18:07.177289 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_0 pass
4172 11:18:07.177560 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_1 skip
4173 11:18:07.177642 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_1 skip
4174 11:18:07.177718 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_1 skip
4175 11:18:07.181566 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_1 skip
4176 11:18:07.183812 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_2 pass
4177 11:18:07.184395 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_2 pass
4178 11:18:07.184974 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_2 pass
4179 11:18:07.185541 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_2 pass
4180 11:18:07.185637 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_3 skip
4181 11:18:07.186118 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_3 skip
4182 11:18:07.186215 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_3 pass
4183 11:18:07.186292 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_3 skip
4184 11:18:07.186736 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_0 skip
4185 11:18:07.187017 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_0 skip
4186 11:18:07.187106 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_0 skip
4187 11:18:07.187422 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_0 skip
4188 11:18:07.187519 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_1 skip
4189 11:18:07.187596 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_1 skip
4190 11:18:07.187979 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_1 skip
4191 11:18:07.188064 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_1 pass
4192 11:18:07.188142 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_2 skip
4193 11:18:07.188595 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_2 skip
4194 11:18:07.188679 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_2 pass
4195 11:18:07.188756 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_2 skip
4196 11:18:07.189160 arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_3 pass
4197 11:18:07.189258 arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_3 pass
4198 11:18:07.189338 arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_3 pass
4199 11:18:07.189710 arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_3 pass
4200 11:18:07.189806 arm64_fp-ptrace pass
4201 11:18:07.189895 arm64_fp-stress_FPSIMD-0-0 pass
4202 11:18:07.190268 arm64_fp-stress_KERNEL-0-0 pass
4203 11:18:07.190356 arm64_fp-stress_SVE-VL-64-0 pass
4204 11:18:07.190833 arm64_fp-stress_SVE-VL-32-0 pass
4205 11:18:07.190916 arm64_fp-stress_SVE-VL-16-0 pass
4206 11:18:07.190991 arm64_fp-stress_SSVE-VL-64-0 pass
4207 11:18:07.191458 arm64_fp-stress_ZA-VL-64-0 pass
4208 11:18:07.191554 arm64_fp-stress_SSVE-VL-32-0 pass
4209 11:18:07.191634 arm64_fp-stress_ZA-VL-32-0 pass
4210 11:18:07.197589 arm64_fp-stress_SSVE-VL-16-0 pass
4211 11:18:07.197765 arm64_fp-stress_ZA-VL-16-0 pass
4212 11:18:07.197857 arm64_fp-stress_FPSIMD-1-0 pass
4213 11:18:07.198141 arm64_fp-stress_KERNEL-1-0 pass
4214 11:18:07.198234 arm64_fp-stress_SVE-VL-64-1 pass
4215 11:18:07.198315 arm64_fp-stress_SVE-VL-32-1 pass
4216 11:18:07.198695 arm64_fp-stress_SVE-VL-16-1 pass
4217 11:18:07.199296 arm64_fp-stress_SSVE-VL-64-1 pass
4218 11:18:07.199860 arm64_fp-stress_ZA-VL-64-1 pass
4219 11:18:07.199956 arm64_fp-stress_SSVE-VL-32-1 pass
4220 11:18:07.200035 arm64_fp-stress_ZA-VL-32-1 pass
4221 11:18:07.200482 arm64_fp-stress_SSVE-VL-16-1 pass
4222 11:18:07.201016 arm64_fp-stress_ZA-VL-16-1 pass
4223 11:18:07.202162 arm64_fp-stress_FPSIMD-2-0 pass
4224 11:18:07.204420 arm64_fp-stress_KERNEL-2-0 pass
4225 11:18:07.204995 arm64_fp-stress_SVE-VL-64-2 pass
4226 11:18:07.205133 arm64_fp-stress_SVE-VL-32-2 pass
4227 11:18:07.205563 arm64_fp-stress_SVE-VL-16-2 pass
4228 11:18:07.205859 arm64_fp-stress_SSVE-VL-64-2 pass
4229 11:18:07.205950 arm64_fp-stress_ZA-VL-64-2 pass
4230 11:18:07.206274 arm64_fp-stress_SSVE-VL-32-2 pass
4231 11:18:07.206370 arm64_fp-stress_ZA-VL-32-2 pass
4232 11:18:07.206704 arm64_fp-stress_SSVE-VL-16-2 pass
4233 11:18:07.206991 arm64_fp-stress_ZA-VL-16-2 pass
4234 11:18:07.207082 arm64_fp-stress_FPSIMD-3-0 pass
4235 11:18:07.207404 arm64_fp-stress_KERNEL-3-0 pass
4236 11:18:07.207501 arm64_fp-stress_SVE-VL-64-3 pass
4237 11:18:07.207820 arm64_fp-stress_SVE-VL-32-3 pass
4238 11:18:07.207930 arm64_fp-stress_SVE-VL-16-3 pass
4239 11:18:07.208426 arm64_fp-stress_SSVE-VL-64-3 pass
4240 11:18:07.208522 arm64_fp-stress_ZA-VL-64-3 pass
4241 11:18:07.208600 arm64_fp-stress_SSVE-VL-32-3 pass
4242 11:18:07.209031 arm64_fp-stress_ZA-VL-32-3 pass
4243 11:18:07.209128 arm64_fp-stress_SSVE-VL-16-3 pass
4244 11:18:07.209208 arm64_fp-stress_ZA-VL-16-3 pass
4245 11:18:07.209281 arm64_fp-stress_FPSIMD-4-0 pass
4246 11:18:07.209573 arm64_fp-stress_KERNEL-4-0 pass
4247 11:18:07.210141 arm64_fp-stress_SVE-VL-64-4 pass
4248 11:18:07.210427 arm64_fp-stress_SVE-VL-32-4 pass
4249 11:18:07.210713 arm64_fp-stress_SVE-VL-16-4 pass
4250 11:18:07.210806 arm64_fp-stress_SSVE-VL-64-4 pass
4251 11:18:07.214759 arm64_fp-stress_ZA-VL-64-4 pass
4252 11:18:07.216342 arm64_fp-stress_SSVE-VL-32-4 pass
4253 11:18:07.217503 arm64_fp-stress_ZA-VL-32-4 pass
4254 11:18:07.218077 arm64_fp-stress_SSVE-VL-16-4 pass
4255 11:18:07.218188 arm64_fp-stress_ZA-VL-16-4 pass
4256 11:18:07.218475 arm64_fp-stress_FPSIMD-5-0 pass
4257 11:18:07.218819 arm64_fp-stress_KERNEL-5-0 pass
4258 11:18:07.218921 arm64_fp-stress_SVE-VL-64-5 pass
4259 11:18:07.219274 arm64_fp-stress_SVE-VL-32-5 pass
4260 11:18:07.219426 arm64_fp-stress_SVE-VL-16-5 pass
4261 11:18:07.219827 arm64_fp-stress_SSVE-VL-64-5 pass
4262 11:18:07.220010 arm64_fp-stress_ZA-VL-64-5 pass
4263 11:18:07.220164 arm64_fp-stress_SSVE-VL-32-5 pass
4264 11:18:07.220404 arm64_fp-stress_ZA-VL-32-5 pass
4265 11:18:07.220549 arm64_fp-stress_SSVE-VL-16-5 pass
4266 11:18:07.220660 arm64_fp-stress_ZA-VL-16-5 pass
4267 11:18:07.220997 arm64_fp-stress_FPSIMD-6-0 pass
4268 11:18:07.221161 arm64_fp-stress_KERNEL-6-0 pass
4269 11:18:07.221274 arm64_fp-stress_SVE-VL-64-6 pass
4270 11:18:07.221403 arm64_fp-stress_SVE-VL-32-6 pass
4271 11:18:07.221708 arm64_fp-stress_SVE-VL-16-6 pass
4272 11:18:07.222705 arm64_fp-stress_SSVE-VL-64-6 pass
4273 11:18:07.222901 arm64_fp-stress_ZA-VL-64-6 pass
4274 11:18:07.223026 arm64_fp-stress_SSVE-VL-32-6 pass
4275 11:18:07.223517 arm64_fp-stress_ZA-VL-32-6 pass
4276 11:18:07.223819 arm64_fp-stress_SSVE-VL-16-6 pass
4277 11:18:07.223978 arm64_fp-stress_ZA-VL-16-6 pass
4278 11:18:07.224171 arm64_fp-stress_FPSIMD-7-0 pass
4279 11:18:07.224329 arm64_fp-stress_KERNEL-7-0 pass
4280 11:18:07.224521 arm64_fp-stress_SVE-VL-64-7 pass
4281 11:18:07.224652 arm64_fp-stress_SVE-VL-32-7 pass
4282 11:18:07.224782 arm64_fp-stress_SVE-VL-16-7 pass
4283 11:18:07.224987 arm64_fp-stress_SSVE-VL-64-7 pass
4284 11:18:07.225136 arm64_fp-stress_ZA-VL-64-7 pass
4285 11:18:07.225269 arm64_fp-stress_SSVE-VL-32-7 pass
4286 11:18:07.225627 arm64_fp-stress_ZA-VL-32-7 pass
4287 11:18:07.225775 arm64_fp-stress_SSVE-VL-16-7 pass
4288 11:18:07.225938 arm64_fp-stress_ZA-VL-16-7 pass
4289 11:18:07.228175 arm64_fp-stress pass
4290 11:18:07.228673 arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 pass
4291 11:18:07.228840 arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state pass
4292 11:18:07.229020 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set pass
4293 11:18:07.229182 arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared pass
4294 11:18:07.229316 arm64_sve-ptrace_Set_SVE_VL_16 pass
4295 11:18:07.229505 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 pass
4296 11:18:07.229684 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 pass
4297 11:18:07.229849 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 pass
4298 11:18:07.230004 arm64_sve-ptrace_Set_SVE_VL_32 pass
4299 11:18:07.230653 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 pass
4300 11:18:07.232895 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 pass
4301 11:18:07.234628 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 pass
4302 11:18:07.234845 arm64_sve-ptrace_Set_SVE_VL_48 pass
4303 11:18:07.235232 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_48 skip
4304 11:18:07.235415 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
4305 11:18:07.235903 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
4306 11:18:07.236009 arm64_sve-ptrace_Set_SVE_VL_64 pass
4307 11:18:07.236310 arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 pass
4308 11:18:07.236404 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 pass
4309 11:18:07.236880 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 pass
4310 11:18:07.236982 arm64_sve-ptrace_Set_SVE_VL_80 pass
4311 11:18:07.237261 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_80 skip
4312 11:18:07.237562 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
4313 11:18:07.237662 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
4314 11:18:07.237740 arm64_sve-ptrace_Set_SVE_VL_96 pass
4315 11:18:07.238036 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_96 skip
4316 11:18:07.238131 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
4317 11:18:07.238624 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
4318 11:18:07.238745 arm64_sve-ptrace_Set_SVE_VL_112 pass
4319 11:18:07.239737 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_112 skip
4320 11:18:07.239846 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
4321 11:18:07.239936 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
4322 11:18:07.240020 arm64_sve-ptrace_Set_SVE_VL_128 pass
4323 11:18:07.240902 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_128 skip
4324 11:18:07.241011 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_128 skip
4325 11:18:07.241443 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_128 skip
4326 11:18:07.241567 arm64_sve-ptrace_Set_SVE_VL_144 pass
4327 11:18:07.242556 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_144 skip
4328 11:18:07.244892 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
4329 11:18:07.246051 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
4330 11:18:07.246653 arm64_sve-ptrace_Set_SVE_VL_160 pass
4331 11:18:07.251823 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_160 skip
4332 11:18:07.252861 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
4333 11:18:07.253370 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
4334 11:18:07.253947 arm64_sve-ptrace_Set_SVE_VL_176 pass
4335 11:18:07.254105 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_176 skip
4336 11:18:07.254240 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
4337 11:18:07.254578 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
4338 11:18:07.254677 arm64_sve-ptrace_Set_SVE_VL_192 pass
4339 11:18:07.255128 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_192 skip
4340 11:18:07.255658 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
4341 11:18:07.255775 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
4342 11:18:07.256759 arm64_sve-ptrace_Set_SVE_VL_208 pass
4343 11:18:07.256868 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_208 skip
4344 11:18:07.257148 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
4345 11:18:07.257249 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
4346 11:18:07.257328 arm64_sve-ptrace_Set_SVE_VL_224 pass
4347 11:18:07.257610 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_224 skip
4348 11:18:07.257706 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
4349 11:18:07.257785 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
4350 11:18:07.257870 arm64_sve-ptrace_Set_SVE_VL_240 pass
4351 11:18:07.258193 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_240 skip
4352 11:18:07.258288 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
4353 11:18:07.258754 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
4354 11:18:07.258855 arm64_sve-ptrace_Set_SVE_VL_256 pass
4355 11:18:07.260012 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_256 skip
4356 11:18:07.260126 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_256 skip
4357 11:18:07.260450 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_256 skip
4358 11:18:07.260545 arm64_sve-ptrace_Set_SVE_VL_272 pass
4359 11:18:07.260638 arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 skip
4360 11:18:07.260717 arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
4361 11:18:07.261117 arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
4362 11:18:07.261215 arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 pass
4363 11:18:07.261306 arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state pass
4364 11:18:07.261891 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set pass
4365 11:18:07.261990 arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared pass
4366 11:18:07.262070 arm64_sve-ptrace_Set_Streaming_SVE_VL_16 pass
4367 11:18:07.262616 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 pass
4368 11:18:07.262712 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 pass
4369 11:18:07.262791 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 pass
4370 11:18:07.263210 arm64_sve-ptrace_Set_Streaming_SVE_VL_32 pass
4371 11:18:07.263306 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 pass
4372 11:18:07.263384 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 pass
4373 11:18:07.263840 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 pass
4374 11:18:07.263938 arm64_sve-ptrace_Set_Streaming_SVE_VL_48 pass
4375 11:18:07.264427 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 skip
4376 11:18:07.264523 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 skip
4377 11:18:07.264794 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 skip
4378 11:18:07.264875 arm64_sve-ptrace_Set_Streaming_SVE_VL_64 pass
4379 11:18:07.265160 arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 pass
4380 11:18:07.265731 arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 pass
4381 11:18:07.265847 arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 pass
4382 11:18:07.265936 arm64_sve-ptrace_Set_Streaming_SVE_VL_80 pass
4383 11:18:07.266292 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 skip
4384 11:18:07.266616 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 skip
4385 11:18:07.266701 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 skip
4386 11:18:07.266795 arm64_sve-ptrace_Set_Streaming_SVE_VL_96 pass
4387 11:18:07.266933 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 skip
4388 11:18:07.267018 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 skip
4389 11:18:07.267613 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 skip
4390 11:18:07.268022 arm64_sve-ptrace_Set_Streaming_SVE_VL_112 pass
4391 11:18:07.268121 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 skip
4392 11:18:07.268201 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 skip
4393 11:18:07.273632 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 skip
4394 11:18:07.273809 arm64_sve-ptrace_Set_Streaming_SVE_VL_128 pass
4395 11:18:07.274295 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_128 skip
4396 11:18:07.278141 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_128 skip
4397 11:18:07.279247 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_128 skip
4398 11:18:07.279855 arm64_sve-ptrace_Set_Streaming_SVE_VL_144 pass
4399 11:18:07.279959 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 skip
4400 11:18:07.280424 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 skip
4401 11:18:07.280921 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 skip
4402 11:18:07.281020 arm64_sve-ptrace_Set_Streaming_SVE_VL_160 pass
4403 11:18:07.281488 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 skip
4404 11:18:07.281780 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 skip
4405 11:18:07.283786 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 skip
4406 11:18:07.285501 arm64_sve-ptrace_Set_Streaming_SVE_VL_176 pass
4407 11:18:07.286068 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 skip
4408 11:18:07.286363 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 skip
4409 11:18:07.286737 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 skip
4410 11:18:07.286833 arm64_sve-ptrace_Set_Streaming_SVE_VL_192 pass
4411 11:18:07.287317 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 skip
4412 11:18:07.287597 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 skip
4413 11:18:07.287901 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 skip
4414 11:18:07.288186 arm64_sve-ptrace_Set_Streaming_SVE_VL_208 pass
4415 11:18:07.288272 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 skip
4416 11:18:07.288561 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 skip
4417 11:18:07.288655 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 skip
4418 11:18:07.289135 arm64_sve-ptrace_Set_Streaming_SVE_VL_224 pass
4419 11:18:07.289230 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 skip
4420 11:18:07.289502 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 skip
4421 11:18:07.289801 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 skip
4422 11:18:07.289906 arm64_sve-ptrace_Set_Streaming_SVE_VL_240 pass
4423 11:18:07.290388 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 skip
4424 11:18:07.290688 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 skip
4425 11:18:07.290784 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 skip
4426 11:18:07.292188 arm64_sve-ptrace_Set_Streaming_SVE_VL_256 pass
4427 11:18:07.292297 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_256 skip
4428 11:18:07.292376 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_256 skip
4429 11:18:07.293388 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_256 skip
4430 11:18:07.294002 arm64_sve-ptrace_Set_Streaming_SVE_VL_272 pass
4431 11:18:07.294100 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 skip
4432 11:18:07.294369 arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 skip
4433 11:18:07.294650 arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 skip
4434 11:18:07.294744 arm64_sve-ptrace pass
4435 11:18:07.294820 arm64_sve-probe-vls_Enumerated_3_vector_lengths pass
4436 11:18:07.294893 arm64_sve-probe-vls_All_vector_lengths_valid pass
4437 11:18:07.295265 arm64_sve-probe-vls pass
4438 11:18:07.295361 arm64_vec-syscfg_SVE_default_vector_length_64 pass
4439 11:18:07.295629 arm64_vec-syscfg_SVE_minimum_vector_length_16 pass
4440 11:18:07.295915 arm64_vec-syscfg_SVE_maximum_vector_length_64 pass
4441 11:18:07.296009 arm64_vec-syscfg_SVE_current_VL_is_64 pass
4442 11:18:07.296094 arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 pass
4443 11:18:07.296172 arm64_vec-syscfg_SVE_prctl_set_min_max pass
4444 11:18:07.296493 arm64_vec-syscfg_SVE_vector_length_used_default pass
4445 11:18:07.296596 arm64_vec-syscfg_SVE_vector_length_was_inherited pass
4446 11:18:07.296673 arm64_vec-syscfg_SVE_vector_length_set_on_exec pass
4447 11:18:07.297161 arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors pass
4448 11:18:07.297257 arm64_vec-syscfg_SME_default_vector_length_32 pass
4449 11:18:07.297527 arm64_vec-syscfg_SME_minimum_vector_length_16 pass
4450 11:18:07.297614 arm64_vec-syscfg_SME_maximum_vector_length_64 pass
4451 11:18:07.297889 arm64_vec-syscfg_SME_current_VL_is_32 pass
4452 11:18:07.297986 arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 pass
4453 11:18:07.298076 arm64_vec-syscfg_SME_prctl_set_min_max pass
4454 11:18:07.298463 arm64_vec-syscfg_SME_vector_length_used_default pass
4455 11:18:07.298554 arm64_vec-syscfg_SME_vector_length_was_inherited pass
4456 11:18:07.298669 arm64_vec-syscfg_SME_vector_length_set_on_exec pass
4457 11:18:07.298754 arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors pass
4458 11:18:07.299299 arm64_vec-syscfg_change_sve_with_za pass
4459 11:18:07.299397 arm64_vec-syscfg pass
4460 11:18:07.299476 arm64_za-fork_fork_test pass
4461 11:18:07.299552 arm64_za-fork pass
4462 11:18:07.299633 arm64_za-ptrace_Set_VL_16 pass
4463 11:18:07.299909 arm64_za-ptrace_Disabled_ZA_for_VL_16 pass
4464 11:18:07.299997 arm64_za-ptrace_Data_match_for_VL_16 pass
4465 11:18:07.300075 arm64_za-ptrace_Set_VL_32 pass
4466 11:18:07.303854 arm64_za-ptrace_Disabled_ZA_for_VL_32 pass
4467 11:18:07.306265 arm64_za-ptrace_Data_match_for_VL_32 pass
4468 11:18:07.306381 arm64_za-ptrace_Set_VL_48 pass
4469 11:18:07.306715 arm64_za-ptrace_Disabled_ZA_for_VL_48 skip
4470 11:18:07.307299 arm64_za-ptrace_Get_and_set_data_for_VL_48 skip
4471 11:18:07.307394 arm64_za-ptrace_Set_VL_64 pass
4472 11:18:07.307864 arm64_za-ptrace_Disabled_ZA_for_VL_64 pass
4473 11:18:07.307959 arm64_za-ptrace_Data_match_for_VL_64 pass
4474 11:18:07.308227 arm64_za-ptrace_Set_VL_80 pass
4475 11:18:07.308514 arm64_za-ptrace_Disabled_ZA_for_VL_80 skip
4476 11:18:07.308608 arm64_za-ptrace_Get_and_set_data_for_VL_80 skip
4477 11:18:07.308984 arm64_za-ptrace_Set_VL_96 pass
4478 11:18:07.309268 arm64_za-ptrace_Disabled_ZA_for_VL_96 skip
4479 11:18:07.309352 arm64_za-ptrace_Get_and_set_data_for_VL_96 skip
4480 11:18:07.309631 arm64_za-ptrace_Set_VL_112 pass
4481 11:18:07.309724 arm64_za-ptrace_Disabled_ZA_for_VL_112 skip
4482 11:18:07.309799 arm64_za-ptrace_Get_and_set_data_for_VL_112 skip
4483 11:18:07.309883 arm64_za-ptrace_Set_VL_128 pass
4484 11:18:07.310155 arm64_za-ptrace_Disabled_ZA_for_VL_128 skip
4485 11:18:07.310261 arm64_za-ptrace_Get_and_set_data_for_VL_128 skip
4486 11:18:07.310746 arm64_za-ptrace_Set_VL_144 pass
4487 11:18:07.310841 arm64_za-ptrace_Disabled_ZA_for_VL_144 skip
4488 11:18:07.311118 arm64_za-ptrace_Get_and_set_data_for_VL_144 skip
4489 11:18:07.311214 arm64_za-ptrace_Set_VL_160 pass
4490 11:18:07.311493 arm64_za-ptrace_Disabled_ZA_for_VL_160 skip
4491 11:18:07.311587 arm64_za-ptrace_Get_and_set_data_for_VL_160 skip
4492 11:18:07.311666 arm64_za-ptrace_Set_VL_176 pass
4493 11:18:07.311744 arm64_za-ptrace_Disabled_ZA_for_VL_176 skip
4494 11:18:07.311818 arm64_za-ptrace_Get_and_set_data_for_VL_176 skip
4495 11:18:07.312216 arm64_za-ptrace_Set_VL_192 pass
4496 11:18:07.312314 arm64_za-ptrace_Disabled_ZA_for_VL_192 skip
4497 11:18:07.312589 arm64_za-ptrace_Get_and_set_data_for_VL_192 skip
4498 11:18:07.312699 arm64_za-ptrace_Set_VL_208 pass
4499 11:18:07.312777 arm64_za-ptrace_Disabled_ZA_for_VL_208 skip
4500 11:18:07.313168 arm64_za-ptrace_Get_and_set_data_for_VL_208 skip
4501 11:18:07.313264 arm64_za-ptrace_Set_VL_224 pass
4502 11:18:07.313338 arm64_za-ptrace_Disabled_ZA_for_VL_224 skip
4503 11:18:07.313803 arm64_za-ptrace_Get_and_set_data_for_VL_224 skip
4504 11:18:07.313912 arm64_za-ptrace_Set_VL_240 pass
4505 11:18:07.313988 arm64_za-ptrace_Disabled_ZA_for_VL_240 skip
4506 11:18:07.314066 arm64_za-ptrace_Get_and_set_data_for_VL_240 skip
4507 11:18:07.314343 arm64_za-ptrace_Set_VL_256 pass
4508 11:18:07.314437 arm64_za-ptrace_Disabled_ZA_for_VL_256 skip
4509 11:18:07.314511 arm64_za-ptrace_Get_and_set_data_for_VL_256 skip
4510 11:18:07.314872 arm64_za-ptrace_Set_VL_272 pass
4511 11:18:07.315163 arm64_za-ptrace_Disabled_ZA_for_VL_272 skip
4512 11:18:07.315257 arm64_za-ptrace_Get_and_set_data_for_VL_272 skip
4513 11:18:07.315536 arm64_za-ptrace pass
4514 11:18:07.315630 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory pass
4515 11:18:07.316125 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory pass
4516 11:18:07.316219 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory pass
4517 11:18:07.316693 arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory pass
4518 11:18:07.316789 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory pass
4519 11:18:07.318193 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory pass
4520 11:18:07.318333 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory pass
4521 11:18:07.318417 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory_dup2 pass
4522 11:18:07.318496 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory_dup2 pass
4523 11:18:07.318573 arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory_dup2 pass
4524 11:18:07.318668 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory pass
4525 11:18:07.319270 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory pass
4526 11:18:07.319569 arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory pass
4527 11:18:07.319672 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory pass
4528 11:18:07.319945 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory pass
4529 11:18:07.320054 arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory pass
4530 11:18:07.320137 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory fail
4531 11:18:07.320561 arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory pass
4532 11:18:07.325745 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory fail
4533 11:18:07.326391 arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory pass
4534 11:18:07.326486 arm64_check_buffer_fill fail
4535 11:18:07.327194 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory pass
4536 11:18:07.328810 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory pass
4537 11:18:07.337922 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory pass
4538 11:18:07.338944 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory pass
4539 11:18:07.339712 arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory pass
4540 11:18:07.340091 arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory pass
4541 11:18:07.341801 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory fail
4542 11:18:07.345776 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory fail
4543 11:18:07.348062 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory pass
4544 11:18:07.350573 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory pass
4545 11:18:07.352595 arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory pass
4546 11:18:07.355335 arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory pass
4547 11:18:07.356606 arm64_check_child_memory fail
4548 11:18:07.358839 arm64_check_gcr_el1_cswitch_Verify_that_GCR_EL1_is_set_correctly_on_context_switch pass
4549 11:18:07.359957 arm64_check_gcr_el1_cswitch pass
4550 11:18:07.362803 arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
4551 11:18:07.363360 arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
4552 11:18:07.364561 arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on pass
4553 11:18:07.365651 arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4554 11:18:07.366773 arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on pass
4555 11:18:07.368598 arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4556 11:18:07.370210 arm64_check_hugetlb_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory pass
4557 11:18:07.371901 arm64_check_hugetlb_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory pass
4558 11:18:07.373617 arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_memory pass
4559 11:18:07.375322 arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_memory_dup2 pass
4560 11:18:07.377037 arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory pass
4561 11:18:07.379292 arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory_dup2 pass
4562 11:18:07.379859 arm64_check_hugetlb_options pass
4563 11:18:07.380440 arm64_check_ksm_options_Check_KSM_mte_page_merge_for_private_mapping_sync_mode_and_mmap_memory pass
4564 11:18:07.381398 arm64_check_ksm_options_Check_KSM_mte_page_merge_for_private_mapping_async_mode_and_mmap_memory pass
4565 11:18:07.381681 arm64_check_ksm_options_Check_KSM_mte_page_merge_for_shared_mapping_sync_mode_and_mmap_memory pass
4566 11:18:07.381759 arm64_check_ksm_options_Check_KSM_mte_page_merge_for_shared_mapping_async_mode_and_mmap_memory pass
4567 11:18:07.382143 arm64_check_ksm_options pass
4568 11:18:07.382243 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off pass
4569 11:18:07.382719 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off pass
4570 11:18:07.383327 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off pass
4571 11:18:07.383504 arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off pass
4572 11:18:07.384428 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on pass
4573 11:18:07.384976 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4574 11:18:07.390192 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on pass
4575 11:18:07.392289 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4576 11:18:07.393463 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on pass
4577 11:18:07.394061 arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4578 11:18:07.395197 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on pass
4579 11:18:07.395797 arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4580 11:18:07.396372 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
4581 11:18:07.397001 arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4582 11:18:07.397610 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on fail
4583 11:18:07.398739 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4584 11:18:07.399919 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
4585 11:18:07.401065 arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4586 11:18:07.401646 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on fail
4587 11:18:07.402267 arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on pass
4588 11:18:07.403469 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory fail
4589 11:18:07.405173 arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory pass
4590 11:18:07.405733 arm64_check_mmap_options fail
4591 11:18:07.406381 arm64_check_prctl_check_basic_read pass
4592 11:18:07.406876 arm64_check_prctl_NONE pass
4593 11:18:07.407451 arm64_check_prctl_SYNC pass
4594 11:18:07.407547 arm64_check_prctl_ASYNC pass
4595 11:18:07.408032 arm64_check_prctl_SYNC_ASYNC pass
4596 11:18:07.408615 arm64_check_prctl pass
4597 11:18:07.409180 arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode pass
4598 11:18:07.410945 arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode pass
4599 11:18:07.411584 arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode pass
4600 11:18:07.412126 arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode pass
4601 11:18:07.412680 arm64_check_tags_inclusion pass
4602 11:18:07.413262 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
4603 11:18:07.413851 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
4604 11:18:07.414416 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
4605 11:18:07.416169 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
4606 11:18:07.416710 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
4607 11:18:07.417861 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
4608 11:18:07.417961 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
4609 11:18:07.418445 arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
4610 11:18:07.419335 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
4611 11:18:07.419619 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
4612 11:18:07.419705 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
4613 11:18:07.420755 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
4614 11:18:07.421374 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
4615 11:18:07.421953 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
4616 11:18:07.422527 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
4617 11:18:07.423131 arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
4618 11:18:07.423686 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
4619 11:18:07.424863 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
4620 11:18:07.426030 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
4621 11:18:07.426615 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
4622 11:18:07.441870 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
4623 11:18:07.443590 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
4624 11:18:07.444699 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
4625 11:18:07.445893 arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
4626 11:18:07.446457 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
4627 11:18:07.447049 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
4628 11:18:07.448751 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
4629 11:18:07.449319 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
4630 11:18:07.451062 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
4631 11:18:07.452236 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
4632 11:18:07.453300 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
4633 11:18:07.454427 arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
4634 11:18:07.455052 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
4635 11:18:07.455608 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
4636 11:18:07.455899 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
4637 11:18:07.456419 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
4638 11:18:07.456717 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
4639 11:18:07.456814 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
4640 11:18:07.457294 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
4641 11:18:07.457448 arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
4642 11:18:07.458034 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
4643 11:18:07.458817 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
4644 11:18:07.459159 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
4645 11:18:07.460730 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
4646 11:18:07.461313 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
4647 11:18:07.461870 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
4648 11:18:07.462462 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
4649 11:18:07.463570 arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
4650 11:18:07.464467 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
4651 11:18:07.465289 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
4652 11:18:07.465866 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
4653 11:18:07.466441 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
4654 11:18:07.466997 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
4655 11:18:07.468632 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
4656 11:18:07.469695 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
4657 11:18:07.470836 arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
4658 11:18:07.471418 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 pass
4659 11:18:07.473116 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 pass
4660 11:18:07.473673 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 pass
4661 11:18:07.474273 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 pass
4662 11:18:07.475405 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 pass
4663 11:18:07.475983 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 pass
4664 11:18:07.477654 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 pass
4665 11:18:07.478844 arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 pass
4666 11:18:07.479386 arm64_check_user_mem pass
4667 11:18:07.480543 arm64_btitest_nohint_func_call_using_br_x0 pass
4668 11:18:07.481662 arm64_btitest_nohint_func_call_using_br_x16 pass
4669 11:18:07.481756 arm64_btitest_nohint_func_call_using_blr pass
4670 11:18:07.482783 arm64_btitest_bti_none_func_call_using_br_x0 pass
4671 11:18:07.488542 arm64_btitest_bti_none_func_call_using_br_x16 pass
4672 11:18:07.489003 arm64_btitest_bti_none_func_call_using_blr pass
4673 11:18:07.490442 arm64_btitest_bti_c_func_call_using_br_x0 pass
4674 11:18:07.490762 arm64_btitest_bti_c_func_call_using_br_x16 pass
4675 11:18:07.491245 arm64_btitest_bti_c_func_call_using_blr pass
4676 11:18:07.492331 arm64_btitest_bti_j_func_call_using_br_x0 pass
4677 11:18:07.492890 arm64_btitest_bti_j_func_call_using_br_x16 pass
4678 11:18:07.493431 arm64_btitest_bti_j_func_call_using_blr pass
4679 11:18:07.494014 arm64_btitest_bti_jc_func_call_using_br_x0 pass
4680 11:18:07.494589 arm64_btitest_bti_jc_func_call_using_br_x16 pass
4681 11:18:07.495157 arm64_btitest_bti_jc_func_call_using_blr pass
4682 11:18:07.495678 arm64_btitest_paciasp_func_call_using_br_x0 pass
4683 11:18:07.496821 arm64_btitest_paciasp_func_call_using_br_x16 pass
4684 11:18:07.497400 arm64_btitest_paciasp_func_call_using_blr pass
4685 11:18:07.497977 arm64_btitest pass
4686 11:18:07.499097 arm64_nobtitest_nohint_func_call_using_br_x0 pass
4687 11:18:07.499658 arm64_nobtitest_nohint_func_call_using_br_x16 pass
4688 11:18:07.500783 arm64_nobtitest_nohint_func_call_using_blr pass
4689 11:18:07.501935 arm64_nobtitest_bti_none_func_call_using_br_x0 pass
4690 11:18:07.502545 arm64_nobtitest_bti_none_func_call_using_br_x16 pass
4691 11:18:07.503650 arm64_nobtitest_bti_none_func_call_using_blr pass
4692 11:18:07.504220 arm64_nobtitest_bti_c_func_call_using_br_x0 pass
4693 11:18:07.504763 arm64_nobtitest_bti_c_func_call_using_br_x16 pass
4694 11:18:07.505877 arm64_nobtitest_bti_c_func_call_using_blr pass
4695 11:18:07.507013 arm64_nobtitest_bti_j_func_call_using_br_x0 pass
4696 11:18:07.508717 arm64_nobtitest_bti_j_func_call_using_br_x16 pass
4697 11:18:07.510421 arm64_nobtitest_bti_j_func_call_using_blr pass
4698 11:18:07.512131 arm64_nobtitest_bti_jc_func_call_using_br_x0 pass
4699 11:18:07.513799 arm64_nobtitest_bti_jc_func_call_using_br_x16 pass
4700 11:18:07.514935 arm64_nobtitest_bti_jc_func_call_using_blr pass
4701 11:18:07.516102 arm64_nobtitest_paciasp_func_call_using_br_x0 pass
4702 11:18:07.517785 arm64_nobtitest_paciasp_func_call_using_br_x16 pass
4703 11:18:07.518930 arm64_nobtitest_paciasp_func_call_using_blr pass
4704 11:18:07.519496 arm64_nobtitest pass
4705 11:18:07.520657 arm64_hwcap_cpuinfo_match_AES pass
4706 11:18:07.521286 arm64_hwcap_sigill_AES skip
4707 11:18:07.522403 arm64_hwcap_sigbus_AES skip
4708 11:18:07.522990 arm64_hwcap_cpuinfo_match_CRC32 pass
4709 11:18:07.524165 arm64_hwcap_sigill_CRC32 pass
4710 11:18:07.525879 arm64_hwcap_sigbus_CRC32 skip
4711 11:18:07.526439 arm64_hwcap_cpuinfo_match_CSSC pass
4712 11:18:07.527607 arm64_hwcap_sigill_CSSC skip
4713 11:18:07.528287 arm64_hwcap_sigbus_CSSC skip
4714 11:18:07.529388 arm64_hwcap_cpuinfo_match_F8CVT pass
4715 11:18:07.532233 arm64_hwcap_sigill_F8CVT skip
4716 11:18:07.533383 arm64_hwcap_sigbus_F8CVT skip
4717 11:18:07.535158 arm64_hwcap_cpuinfo_match_F8DP4 pass
4718 11:18:07.535727 arm64_hwcap_sigill_F8DP4 skip
4719 11:18:07.537437 arm64_hwcap_sigbus_F8DP4 skip
4720 11:18:07.538578 arm64_hwcap_cpuinfo_match_F8DP2 pass
4721 11:18:07.540297 arm64_hwcap_sigill_F8DP2 skip
4722 11:18:07.541423 arm64_hwcap_sigbus_F8DP2 skip
4723 11:18:07.542529 arm64_hwcap_cpuinfo_match_F8E5M2 pass
4724 11:18:07.543674 arm64_hwcap_sigill_F8E5M2 skip
4725 11:18:07.543775 arm64_hwcap_sigbus_F8E5M2 skip
4726 11:18:07.544285 arm64_hwcap_cpuinfo_match_F8E4M3 pass
4727 11:18:07.544873 arm64_hwcap_sigill_F8E4M3 skip
4728 11:18:07.546042 arm64_hwcap_sigbus_F8E4M3 skip
4729 11:18:07.546632 arm64_hwcap_cpuinfo_match_F8FMA pass
4730 11:18:07.547192 arm64_hwcap_sigill_F8FMA skip
4731 11:18:07.547749 arm64_hwcap_sigbus_F8FMA skip
4732 11:18:07.548913 arm64_hwcap_cpuinfo_match_FAMINMAX pass
4733 11:18:07.549493 arm64_hwcap_sigill_FAMINMAX skip
4734 11:18:07.549587 arm64_hwcap_sigbus_FAMINMAX skip
4735 11:18:07.550114 arm64_hwcap_cpuinfo_match_FP pass
4736 11:18:07.550211 arm64_hwcap_sigill_FP pass
4737 11:18:07.550712 arm64_hwcap_sigbus_FP skip
4738 11:18:07.550865 arm64_hwcap_cpuinfo_match_FPMR pass
4739 11:18:07.551293 arm64_hwcap_sigill_FPMR pass
4740 11:18:07.551479 arm64_hwcap_sigbus_FPMR skip
4741 11:18:07.551639 arm64_hwcap_cpuinfo_match_GCS pass
4742 11:18:07.552001 arm64_hwcap_sigill_GCS pass
4743 11:18:07.552382 arm64_hwcap_sigbus_GCS skip
4744 11:18:07.552529 arm64_hwcap_cpuinfo_match_JSCVT pass
4745 11:18:07.552987 arm64_hwcap_sigill_JSCVT pass
4746 11:18:07.553126 arm64_hwcap_sigbus_JSCVT skip
4747 11:18:07.553205 arm64_hwcap_cpuinfo_match_LRCPC pass
4748 11:18:07.553543 arm64_hwcap_sigill_LRCPC pass
4749 11:18:07.553636 arm64_hwcap_sigbus_LRCPC skip
4750 11:18:07.554211 arm64_hwcap_cpuinfo_match_LRCPC2 pass
4751 11:18:07.554308 arm64_hwcap_sigill_LRCPC2 pass
4752 11:18:07.554762 arm64_hwcap_sigbus_LRCPC2 skip
4753 11:18:07.554862 arm64_hwcap_cpuinfo_match_LRCPC3 pass
4754 11:18:07.555318 arm64_hwcap_sigill_LRCPC3 skip
4755 11:18:07.559929 arm64_hwcap_sigbus_LRCPC3 skip
4756 11:18:07.561541 arm64_hwcap_cpuinfo_match_LSE pass
4757 11:18:07.562179 arm64_hwcap_sigill_LSE pass
4758 11:18:07.562278 arm64_hwcap_sigbus_LSE skip
4759 11:18:07.562714 arm64_hwcap_cpuinfo_match_LSE2 pass
4760 11:18:07.562810 arm64_hwcap_sigill_LSE2 pass
4761 11:18:07.562887 arm64_hwcap_sigbus_LSE2 pass
4762 11:18:07.563310 arm64_hwcap_cpuinfo_match_LSE128 pass
4763 11:18:07.563402 arm64_hwcap_sigill_LSE128 skip
4764 11:18:07.563891 arm64_hwcap_sigbus_LSE128 skip
4765 11:18:07.564463 arm64_hwcap_cpuinfo_match_LUT pass
4766 11:18:07.565051 arm64_hwcap_sigill_LUT skip
4767 11:18:07.565648 arm64_hwcap_sigbus_LUT skip
4768 11:18:07.565744 arm64_hwcap_cpuinfo_match_MOPS pass
4769 11:18:07.566262 arm64_hwcap_sigill_MOPS pass
4770 11:18:07.566360 arm64_hwcap_sigbus_MOPS skip
4771 11:18:07.566811 arm64_hwcap_cpuinfo_match_PMULL pass
4772 11:18:07.567458 arm64_hwcap_sigill_PMULL skip
4773 11:18:07.567707 arm64_hwcap_sigbus_PMULL skip
4774 11:18:07.568144 arm64_hwcap_cpuinfo_match_POE pass
4775 11:18:07.568310 arm64_hwcap_sigill_POE pass
4776 11:18:07.569210 arm64_hwcap_sigbus_POE skip
4777 11:18:07.569767 arm64_hwcap_cpuinfo_match_RNG pass
4778 11:18:07.570394 arm64_hwcap_sigill_RNG pass
4779 11:18:07.580465 arm64_hwcap_sigbus_RNG skip
4780 11:18:07.580666 arm64_hwcap_cpuinfo_match_RPRFM pass
4781 11:18:07.581586 arm64_hwcap_sigill_RPRFM skip
4782 11:18:07.581771 arm64_hwcap_sigbus_RPRFM skip
4783 11:18:07.582173 arm64_hwcap_cpuinfo_match_SHA1 pass
4784 11:18:07.582466 arm64_hwcap_sigill_SHA1 skip
4785 11:18:07.582560 arm64_hwcap_sigbus_SHA1 skip
4786 11:18:07.582839 arm64_hwcap_cpuinfo_match_SHA2 pass
4787 11:18:07.582932 arm64_hwcap_sigill_SHA2 skip
4788 11:18:07.583321 arm64_hwcap_sigbus_SHA2 skip
4789 11:18:07.583419 arm64_hwcap_cpuinfo_match_SHA512 pass
4790 11:18:07.583882 arm64_hwcap_sigill_SHA512 skip
4791 11:18:07.583996 arm64_hwcap_sigbus_SHA512 skip
4792 11:18:07.584488 arm64_hwcap_cpuinfo_match_SME pass
4793 11:18:07.584584 arm64_hwcap_sigill_SME pass
4794 11:18:07.585054 arm64_hwcap_sigbus_SME skip
4795 11:18:07.585175 arm64_hwcap_cpuinfo_match_SME2 pass
4796 11:18:07.585669 arm64_hwcap_sigill_SME2 pass
4797 11:18:07.585822 arm64_hwcap_sigbus_SME2 skip
4798 11:18:07.586285 arm64_hwcap_cpuinfo_match_SME_2_1 pass
4799 11:18:07.586799 arm64_hwcap_sigill_SME_2_1 skip
4800 11:18:07.586967 arm64_hwcap_sigbus_SME_2_1 skip
4801 11:18:07.587974 arm64_hwcap_cpuinfo_match_SME_I16I32 pass
4802 11:18:07.588130 arm64_hwcap_sigill_SME_I16I32 skip
4803 11:18:07.588544 arm64_hwcap_sigbus_SME_I16I32 skip
4804 11:18:07.589137 arm64_hwcap_cpuinfo_match_SME_BI32I32 pass
4805 11:18:07.589721 arm64_hwcap_sigill_SME_BI32I32 skip
4806 11:18:07.589887 arm64_hwcap_sigbus_SME_BI32I32 skip
4807 11:18:07.590303 arm64_hwcap_cpuinfo_match_SME_B16B16 pass
4808 11:18:07.590868 arm64_hwcap_sigill_SME_B16B16 skip
4809 11:18:07.590969 arm64_hwcap_sigbus_SME_B16B16 skip
4810 11:18:07.591496 arm64_hwcap_cpuinfo_match_SME_F16F16 pass
4811 11:18:07.591651 arm64_hwcap_sigill_SME_F16F16 skip
4812 11:18:07.592081 arm64_hwcap_sigbus_SME_F16F16 skip
4813 11:18:07.592662 arm64_hwcap_cpuinfo_match_SME_F8F16 pass
4814 11:18:07.592814 arm64_hwcap_sigill_SME_F8F16 skip
4815 11:18:07.593231 arm64_hwcap_sigbus_SME_F8F16 skip
4816 11:18:07.593808 arm64_hwcap_cpuinfo_match_SME_F8F32 pass
4817 11:18:07.594425 arm64_hwcap_sigill_SME_F8F32 skip
4818 11:18:07.594986 arm64_hwcap_sigbus_SME_F8F32 skip
4819 11:18:07.595144 arm64_hwcap_cpuinfo_match_SME_LUTV2 pass
4820 11:18:07.595565 arm64_hwcap_sigill_SME_LUTV2 skip
4821 11:18:07.596142 arm64_hwcap_sigbus_SME_LUTV2 skip
4822 11:18:07.596746 arm64_hwcap_cpuinfo_match_SME_SF8FMA pass
4823 11:18:07.597307 arm64_hwcap_sigill_SME_SF8FMA skip
4824 11:18:07.597912 arm64_hwcap_sigbus_SME_SF8FMA skip
4825 11:18:07.598492 arm64_hwcap_cpuinfo_match_SME_SF8DP2 pass
4826 11:18:07.598644 arm64_hwcap_sigill_SME_SF8DP2 skip
4827 11:18:07.599065 arm64_hwcap_sigbus_SME_SF8DP2 skip
4828 11:18:07.599221 arm64_hwcap_cpuinfo_match_SME_SF8DP4 pass
4829 11:18:07.599647 arm64_hwcap_sigill_SME_SF8DP4 skip
4830 11:18:07.599796 arm64_hwcap_sigbus_SME_SF8DP4 skip
4831 11:18:07.600234 arm64_hwcap_cpuinfo_match_SVE pass
4832 11:18:07.600800 arm64_hwcap_sigill_SVE pass
4833 11:18:07.601353 arm64_hwcap_sigbus_SVE skip
4834 11:18:07.601949 arm64_hwcap_cpuinfo_match_SVE_2 pass
4835 11:18:07.602537 arm64_hwcap_sigill_SVE_2 pass
4836 11:18:07.603090 arm64_hwcap_sigbus_SVE_2 skip
4837 11:18:07.603242 arm64_hwcap_cpuinfo_match_SVE_2_1 pass
4838 11:18:07.604223 arm64_hwcap_sigill_SVE_2_1 skip
4839 11:18:07.608775 arm64_hwcap_sigbus_SVE_2_1 skip
4840 11:18:07.609948 arm64_hwcap_cpuinfo_match_SVE_AES pass
4841 11:18:07.610157 arm64_hwcap_sigill_SVE_AES skip
4842 11:18:07.610535 arm64_hwcap_sigbus_SVE_AES skip
4843 11:18:07.611084 arm64_hwcap_cpuinfo_match_SVE2_B16B16 pass
4844 11:18:07.611247 arm64_hwcap_sigill_SVE2_B16B16 skip
4845 11:18:07.611405 arm64_hwcap_sigbus_SVE2_B16B16 skip
4846 11:18:07.611800 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
4847 11:18:07.611940 arm64_hwcap_sigill_SVE2_PMULL skip
4848 11:18:07.612343 arm64_hwcap_sigbus_SVE2_PMULL skip
4849 11:18:07.612484 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
4850 11:18:07.613329 arm64_hwcap_sigill_SVE2_BITPERM pass
4851 11:18:07.613899 arm64_hwcap_sigbus_SVE2_BITPERM skip
4852 11:18:07.614071 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
4853 11:18:07.614457 arm64_hwcap_sigill_SVE2_SHA3 skip
4854 11:18:07.615047 arm64_hwcap_sigbus_SVE2_SHA3 skip
4855 11:18:07.615620 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
4856 11:18:07.615758 arm64_hwcap_sigill_SVE2_SM4 skip
4857 11:18:07.616190 arm64_hwcap_sigbus_SVE2_SM4 skip
4858 11:18:07.616377 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
4859 11:18:07.616746 arm64_hwcap_sigill_SVE2_I8MM pass
4860 11:18:07.616932 arm64_hwcap_sigbus_SVE2_I8MM skip
4861 11:18:07.617357 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
4862 11:18:07.617536 arm64_hwcap_sigill_SVE2_F32MM pass
4863 11:18:07.617979 arm64_hwcap_sigbus_SVE2_F32MM skip
4864 11:18:07.618154 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
4865 11:18:07.618313 arm64_hwcap_sigill_SVE2_F64MM pass
4866 11:18:07.622282 arm64_hwcap_sigbus_SVE2_F64MM skip
4867 11:18:07.622485 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
4868 11:18:07.622639 arm64_hwcap_sigill_SVE2_BF16 pass
4869 11:18:07.622784 arm64_hwcap_sigbus_SVE2_BF16 skip
4870 11:18:07.623000 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
4871 11:18:07.623391 arm64_hwcap_sigill_SVE2_EBF16 skip
4872 11:18:07.623533 arm64_hwcap_sigbus_SVE2_EBF16 skip
4873 11:18:07.623697 arm64_hwcap_cpuinfo_match_HBC pass
4874 11:18:07.623830 arm64_hwcap_sigill_HBC pass
4875 11:18:07.623958 arm64_hwcap_sigbus_HBC skip
4876 11:18:07.624129 arm64_hwcap pass
4877 11:18:07.624307 arm64_ptrace_read_tpidr_one pass
4878 11:18:07.624649 arm64_ptrace_write_tpidr_one pass
4879 11:18:07.624812 arm64_ptrace_verify_tpidr_one pass
4880 11:18:07.624958 arm64_ptrace_count_tpidrs pass
4881 11:18:07.625438 arm64_ptrace_tpidr2_write pass
4882 11:18:07.625583 arm64_ptrace_tpidr2_read pass
4883 11:18:07.625699 arm64_ptrace_write_tpidr_only pass
4884 11:18:07.626054 arm64_ptrace_read_NT_ARM_HW_WATCH pass
4885 11:18:07.626244 arm64_ptrace_NT_ARM_HW_WATCH_arch_set pass
4886 11:18:07.627617 arm64_ptrace_read_NT_ARM_HW_BREAK pass
4887 11:18:07.628200 arm64_ptrace_NT_ARM_HW_BREAK_arch_set pass
4888 11:18:07.628768 arm64_ptrace pass
4889 11:18:07.629353 arm64_syscall-abi_getpid_FPSIMD pass
4890 11:18:07.630512 arm64_syscall-abi_getpid_SVE_VL_64 pass
4891 11:18:07.630788 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA pass
4892 11:18:07.631145 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM pass
4893 11:18:07.631749 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA pass
4894 11:18:07.632908 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA pass
4895 11:18:07.633521 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM pass
4896 11:18:07.634834 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA pass
4897 11:18:07.635262 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA pass
4898 11:18:07.636416 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM pass
4899 11:18:07.637559 arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA pass
4900 11:18:07.638738 arm64_syscall-abi_getpid_SVE_VL_32 pass
4901 11:18:07.639348 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA pass
4902 11:18:07.640476 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM pass
4903 11:18:07.641673 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA pass
4904 11:18:07.642855 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA pass
4905 11:18:07.644022 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM pass
4906 11:18:07.644163 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA pass
4907 11:18:07.645188 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA pass
4908 11:18:07.645767 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM pass
4909 11:18:07.646345 arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA pass
4910 11:18:07.646964 arm64_syscall-abi_getpid_SVE_VL_16 pass
4911 11:18:07.648013 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA pass
4912 11:18:07.648460 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM pass
4913 11:18:07.648865 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA pass
4914 11:18:07.650504 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA pass
4915 11:18:07.650695 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM pass
4916 11:18:07.651111 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA pass
4917 11:18:07.652140 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA pass
4918 11:18:07.652861 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM pass
4919 11:18:07.659801 arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA pass
4920 11:18:07.661370 arm64_syscall-abi_getpid_SME_VL_64_SM_ZA pass
4921 11:18:07.661940 arm64_syscall-abi_getpid_SME_VL_64_SM pass
4922 11:18:07.662471 arm64_syscall-abi_getpid_SME_VL_64_ZA pass
4923 11:18:07.664380 arm64_syscall-abi_getpid_SME_VL_32_SM_ZA pass
4924 11:18:07.664500 arm64_syscall-abi_getpid_SME_VL_32_SM pass
4925 11:18:07.665397 arm64_syscall-abi_getpid_SME_VL_32_ZA pass
4926 11:18:07.665931 arm64_syscall-abi_getpid_SME_VL_16_SM_ZA pass
4927 11:18:07.666524 arm64_syscall-abi_getpid_SME_VL_16_SM pass
4928 11:18:07.667086 arm64_syscall-abi_getpid_SME_VL_16_ZA pass
4929 11:18:07.667615 arm64_syscall-abi_sched_yield_FPSIMD pass
4930 11:18:07.668221 arm64_syscall-abi_sched_yield_SVE_VL_64 pass
4931 11:18:07.668499 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA pass
4932 11:18:07.669003 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM pass
4933 11:18:07.669149 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA pass
4934 11:18:07.669625 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA pass
4935 11:18:07.670004 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM pass
4936 11:18:07.670142 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA pass
4937 11:18:07.670531 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA pass
4938 11:18:07.670695 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM pass
4939 11:18:07.671074 arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA pass
4940 11:18:07.671215 arm64_syscall-abi_sched_yield_SVE_VL_32 pass
4941 11:18:07.671631 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA pass
4942 11:18:07.672197 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM pass
4943 11:18:07.672304 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA pass
4944 11:18:07.672751 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA pass
4945 11:18:07.672925 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM pass
4946 11:18:07.674118 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA pass
4947 11:18:07.674312 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA pass
4948 11:18:07.674688 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM pass
4949 11:18:07.674821 arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA pass
4950 11:18:07.675207 arm64_syscall-abi_sched_yield_SVE_VL_16 pass
4951 11:18:07.675723 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA pass
4952 11:18:07.676272 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM pass
4953 11:18:07.677426 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA pass
4954 11:18:07.678030 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA pass
4955 11:18:07.678157 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM pass
4956 11:18:07.678538 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA pass
4957 11:18:07.679132 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA pass
4958 11:18:07.679757 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM pass
4959 11:18:07.680247 arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA pass
4960 11:18:07.680838 arm64_syscall-abi_sched_yield_SME_VL_64_SM_ZA pass
4961 11:18:07.681410 arm64_syscall-abi_sched_yield_SME_VL_64_SM pass
4962 11:18:07.682016 arm64_syscall-abi_sched_yield_SME_VL_64_ZA pass
4963 11:18:07.683079 arm64_syscall-abi_sched_yield_SME_VL_32_SM_ZA pass
4964 11:18:07.683632 arm64_syscall-abi_sched_yield_SME_VL_32_SM pass
4965 11:18:07.684218 arm64_syscall-abi_sched_yield_SME_VL_32_ZA pass
4966 11:18:07.684802 arm64_syscall-abi_sched_yield_SME_VL_16_SM_ZA pass
4967 11:18:07.684963 arm64_syscall-abi_sched_yield_SME_VL_16_SM pass
4968 11:18:07.685912 arm64_syscall-abi_sched_yield_SME_VL_16_ZA pass
4969 11:18:07.686058 arm64_syscall-abi pass
4970 11:18:07.686498 arm64_tpidr2_default_value pass
4971 11:18:07.686642 arm64_tpidr2_write_read pass
4972 11:18:07.687607 arm64_tpidr2_write_sleep_read pass
4973 11:18:07.697209 arm64_tpidr2_write_fork_read pass
4974 11:18:07.697591 arm64_tpidr2_write_clone_read pass
4975 11:18:07.698175 arm64_tpidr2 pass
4976 11:18:07.699014 arm64_basic-gcs skip
4977 11:18:07.699189 arm64_libc-gcs skip
4978 11:18:07.699502 arm64_gcs-locking skip
4979 11:18:07.700096 arm64_gcs-stress skip
4980 11:18:07.700600 arm64_gcspushm skip
4981 11:18:07.701158 arm64_gcsstr skip
4982 11:18:09.328713 + ../../utils/send-to-lava.sh ./output/result.txt
4983 11:18:10.419648 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-arm64 RESULT=pass
4985 11:18:10.420326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-arm64 RESULT=pass>
4986 11:18:11.267417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test_Syscall_successful_with_tagged_address RESULT=pass
4988 11:18:11.268208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test_Syscall_successful_with_tagged_address RESULT=pass>
4989 11:18:12.153963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
4991 11:18:12.154382 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
4992 11:18:13.054086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
4994 11:18:13.054513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
4995 11:18:13.830432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
4997 11:18:13.831046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
4998 11:18:14.661047 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
4999 11:18:14.661512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
5001 11:18:15.521997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
5002 11:18:15.522511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
5004 11:18:16.446410 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
5006 11:18:16.447227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
5007 11:18:17.277355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
5008 11:18:17.277799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
5010 11:18:18.007179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass>
5011 11:18:18.007589 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=pass
5013 11:18:18.869545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass>
5014 11:18:18.869923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=pass
5016 11:18:19.833542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fpmr_siginfo RESULT=pass
5018 11:18:19.834756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fpmr_siginfo RESULT=pass>
5019 11:18:20.730456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_gcs_exception_fault RESULT=skip
5021 11:18:20.730872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_gcs_exception_fault RESULT=skip>
5022 11:18:21.815395 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_gcs_frame RESULT=skip>
5023 11:18:21.815874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_gcs_frame RESULT=skip
5025 11:18:22.649320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_gcs_write_fault RESULT=skip>
5026 11:18:22.649691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_gcs_write_fault RESULT=skip
5028 11:18:23.612337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
5030 11:18:23.621127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
5031 11:18:24.489258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
5033 11:18:24.489819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
5034 11:18:25.392150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
5036 11:18:25.392564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
5037 11:18:26.291627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
5039 11:18:26.292965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
5040 11:18:27.242596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
5041 11:18:27.243106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
5043 11:18:28.173583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
5045 11:18:28.174348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
5046 11:18:28.963367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
5048 11:18:28.964725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
5049 11:18:29.694451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
5050 11:18:29.694834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
5052 11:18:30.385515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_poe_siginfo RESULT=pass
5054 11:18:30.386107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_poe_siginfo RESULT=pass>
5055 11:18:31.075497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass>
5056 11:18:31.075845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=pass
5058 11:18:31.774812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=pass
5060 11:18:31.775144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=pass>
5061 11:18:32.449322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
5062 11:18:32.449747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
5064 11:18:33.110408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=pass>
5065 11:18:33.110831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=pass
5067 11:18:33.744527 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=pass
5069 11:18:33.745033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=pass>
5070 11:18:34.410673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_za_regs RESULT=pass
5072 11:18:34.411252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_za_regs RESULT=pass>
5073 11:18:35.064481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=pass>
5074 11:18:35.064920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=pass
5076 11:18:35.920561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=pass
5078 11:18:35.921117 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=pass>
5079 11:18:36.662595 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_restore RESULT=pass
5081 11:18:36.663333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_restore RESULT=pass>
5082 11:18:37.347696 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_siginfo RESULT=pass>
5083 11:18:37.348127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_siginfo RESULT=pass
5085 11:18:38.132539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=pass
5087 11:18:38.133115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=pass>
5088 11:18:38.808252 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=pass>
5089 11:18:38.808683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=pass
5091 11:18:39.487255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_zt_no_regs RESULT=skip>
5092 11:18:39.487642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_zt_no_regs RESULT=skip
5094 11:18:40.145950 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_zt_regs RESULT=skip>
5095 11:18:40.146343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_zt_regs RESULT=skip
5097 11:18:40.780801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass>
5098 11:18:40.781242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_corrupt_pac RESULT=pass
5100 11:18:41.431522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass
5102 11:18:41.432022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop RESULT=pass>
5103 11:18:42.113157 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass
5105 11:18:42.113664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_pac_instructions_not_nop_generic RESULT=pass>
5106 11:18:42.932681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass>
5107 11:18:42.933200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_single_thread_different_keys RESULT=pass
5109 11:18:43.615919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass>
5110 11:18:43.616344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_exec_changed_keys RESULT=pass
5112 11:18:44.294568 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass>
5113 11:18:44.295000 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys RESULT=pass
5115 11:18:44.925807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass
5117 11:18:44.926371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_global_context_switch_keep_keys_generic RESULT=pass>
5118 11:18:45.578916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
5119 11:18:45.579320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
5121 11:18:46.216515 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_0 RESULT=pass
5123 11:18:46.217040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_0 RESULT=pass>
5124 11:18:46.869330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_0 RESULT=pass
5126 11:18:46.869924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_0 RESULT=pass>
5127 11:18:47.500646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_0 RESULT=pass>
5128 11:18:47.501111 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_0 RESULT=pass
5130 11:18:48.252842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_16_SME_64_0-_64_0 RESULT=skip
5132 11:18:48.253426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_16_SME_64_0-_64_0 RESULT=skip>
5133 11:18:48.939376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_16_SME_64_0-_64_0 RESULT=skip
5135 11:18:48.940140 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_16_SME_64_0-_64_0 RESULT=skip>
5136 11:18:49.619780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_16_SME_64_0-_64_0 RESULT=pass>
5137 11:18:49.620222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_16_SME_64_0-_64_0 RESULT=pass
5139 11:18:50.367830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_16-_64_SME_64_0-_64_0 RESULT=skip
5141 11:18:50.377844 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_16-_64_SME_64_0-_64_0 RESULT=skip>
5142 11:18:51.085389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_16-_64_SME_64_0-_64_0 RESULT=skip
5144 11:18:51.086162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_16-_64_SME_64_0-_64_0 RESULT=skip>
5145 11:18:51.786826 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_16-_64_SME_64_0-_64_0 RESULT=pass>
5146 11:18:51.787236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_16-_64_SME_64_0-_64_0 RESULT=pass
5148 11:18:52.504669 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_16-_16_SME_64_0-_64_0 RESULT=pass
5150 11:18:52.505250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_16-_16_SME_64_0-_64_0 RESULT=pass>
5151 11:18:53.243890 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_16-_16_SME_64_0-_64_0 RESULT=pass
5153 11:18:53.244715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_16-_16_SME_64_0-_64_0 RESULT=pass>
5154 11:18:53.935363 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_16-_16_SME_64_0-_64_0 RESULT=pass>
5155 11:18:53.935779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_16-_16_SME_64_0-_64_0 RESULT=pass
5157 11:18:54.616278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_0_dup2 RESULT=pass>
5158 11:18:54.616711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_0_dup2 RESULT=pass
5160 11:18:55.359044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_0_dup2 RESULT=pass
5162 11:18:55.359834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_0_dup2 RESULT=pass>
5163 11:18:56.190560 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_0_dup2 RESULT=pass
5165 11:18:56.190967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_0_dup2 RESULT=pass>
5166 11:18:56.937870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_0 RESULT=pass>
5167 11:18:56.938293 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_0 RESULT=pass
5169 11:18:57.593499 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_1 RESULT=skip>
5170 11:18:57.593921 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_1 RESULT=skip
5172 11:18:58.241523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_1 RESULT=skip>
5173 11:18:58.241945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_1 RESULT=skip
5175 11:18:58.898836 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_1 RESULT=pass
5177 11:18:58.899323 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_1 RESULT=pass>
5178 11:18:59.576502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_1 RESULT=skip>
5179 11:18:59.576931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_1 RESULT=skip
5181 11:19:00.215114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_2 RESULT=skip
5183 11:19:00.215632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_2 RESULT=skip>
5184 11:19:00.899673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_2 RESULT=skip>
5185 11:19:00.900094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_2 RESULT=skip
5187 11:19:01.580561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_2 RESULT=skip>
5188 11:19:01.580989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_2 RESULT=skip
5190 11:19:02.215379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_2 RESULT=pass>
5191 11:19:02.215766 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_2 RESULT=pass
5193 11:19:02.857486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_0 RESULT=skip>
5194 11:19:02.857875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_0 RESULT=skip
5196 11:19:03.471604 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_0 RESULT=skip
5198 11:19:03.472122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_0 RESULT=skip>
5199 11:19:04.197291 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_0 RESULT=pass
5201 11:19:04.197907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_0 RESULT=pass>
5202 11:19:04.875663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_0 RESULT=skip>
5203 11:19:04.876117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_0 RESULT=skip
5205 11:19:05.615464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_1 RESULT=pass>
5206 11:19:05.615875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_1 RESULT=pass
5208 11:19:06.298090 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_1 RESULT=pass
5210 11:19:06.298606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_1 RESULT=pass>
5211 11:19:06.947286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_1 RESULT=pass
5213 11:19:06.947914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_1 RESULT=pass>
5214 11:19:07.628723 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_1 RESULT=pass>
5215 11:19:07.629153 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_1 RESULT=pass
5217 11:19:08.336714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_2 RESULT=skip>
5218 11:19:08.337171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_2 RESULT=skip
5220 11:19:08.956946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_2 RESULT=skip>
5221 11:19:08.957392 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_2 RESULT=skip
5223 11:19:09.605778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_2 RESULT=skip
5225 11:19:09.606495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_2 RESULT=skip>
5226 11:19:10.330053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_2 RESULT=skip
5228 11:19:10.330731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_2 RESULT=skip>
5229 11:19:11.046072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_3 RESULT=skip>
5230 11:19:11.046457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_3 RESULT=skip
5232 11:19:11.746089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_3 RESULT=skip>
5233 11:19:11.746475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_3 RESULT=skip
5235 11:19:12.413307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_3 RESULT=skip
5237 11:19:12.413850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_3 RESULT=skip>
5238 11:19:13.135585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_3 RESULT=pass
5240 11:19:13.136160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_3 RESULT=pass>
5241 11:19:13.832646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_0 RESULT=skip>
5242 11:19:13.833037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_0 RESULT=skip
5244 11:19:14.504331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_0 RESULT=skip
5246 11:19:14.504728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_0 RESULT=skip>
5247 11:19:15.143010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_0 RESULT=skip>
5248 11:19:15.143396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_0 RESULT=skip
5250 11:19:15.829150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_0 RESULT=pass>
5251 11:19:15.829522 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_0 RESULT=pass
5253 11:19:16.508199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_1 RESULT=skip
5255 11:19:16.508801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_1 RESULT=skip>
5256 11:19:17.210637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_1 RESULT=skip
5258 11:19:17.211048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_1 RESULT=skip>
5259 11:19:17.866422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_1 RESULT=skip
5261 11:19:17.866828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_1 RESULT=skip>
5262 11:19:18.514052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_1 RESULT=skip>
5263 11:19:18.514493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_1 RESULT=skip
5265 11:19:19.181027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_2 RESULT=pass
5267 11:19:19.181603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_2 RESULT=pass>
5268 11:19:19.844309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_2 RESULT=pass>
5269 11:19:19.844750 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_2 RESULT=pass
5271 11:19:20.484870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_2 RESULT=pass>
5272 11:19:20.485304 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_2 RESULT=pass
5274 11:19:21.149843 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_2 RESULT=pass
5276 11:19:21.150733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_2 RESULT=pass>
5277 11:19:21.821956 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_3 RESULT=skip
5279 11:19:21.822373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_3 RESULT=skip>
5280 11:19:22.468338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_3 RESULT=skip>
5281 11:19:22.468758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_3 RESULT=skip
5283 11:19:23.148944 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_3 RESULT=pass
5285 11:19:23.149747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_3 RESULT=pass>
5286 11:19:23.795310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_3 RESULT=skip>
5287 11:19:23.795741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_3 RESULT=skip
5289 11:19:24.461479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_0 RESULT=skip
5291 11:19:24.462015 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_0 RESULT=skip>
5292 11:19:25.121911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_0 RESULT=skip>
5293 11:19:25.122280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_0 RESULT=skip
5295 11:19:25.793707 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_0 RESULT=skip
5297 11:19:25.794152 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_0 RESULT=skip>
5298 11:19:26.469436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_0 RESULT=skip
5300 11:19:26.469754 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_0 RESULT=skip>
5301 11:19:27.133891 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_1 RESULT=skip>
5302 11:19:27.134314 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_1 RESULT=skip
5304 11:19:27.809557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_1 RESULT=skip
5306 11:19:27.810287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_1 RESULT=skip>
5307 11:19:28.448440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_1 RESULT=skip>
5308 11:19:28.448795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_1 RESULT=skip
5310 11:19:29.079320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_1 RESULT=pass
5312 11:19:29.079861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_1 RESULT=pass>
5313 11:19:29.739482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_2 RESULT=skip>
5314 11:19:29.739878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_2 RESULT=skip
5316 11:19:30.369300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_2 RESULT=skip>
5317 11:19:30.369695 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_2 RESULT=skip
5319 11:19:31.005009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_2 RESULT=pass>
5320 11:19:31.005396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_2 RESULT=pass
5322 11:19:31.689463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_2 RESULT=skip>
5323 11:19:31.689874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_2 RESULT=skip
5325 11:19:32.373871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_3 RESULT=pass>
5326 11:19:32.374300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_3 RESULT=pass
5328 11:19:33.025967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_3 RESULT=pass>
5329 11:19:33.026394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_3 RESULT=pass
5331 11:19:33.650903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_3 RESULT=pass
5333 11:19:33.651597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_3 RESULT=pass>
5334 11:19:34.326559 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_3 RESULT=pass
5336 11:19:34.327102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_3 RESULT=pass>
5337 11:19:35.045284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_0 RESULT=skip>
5338 11:19:35.045718 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_0 RESULT=skip
5340 11:19:35.693327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_0 RESULT=skip>
5341 11:19:35.693813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_0 RESULT=skip
5343 11:19:36.348102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_0 RESULT=skip
5345 11:19:36.348648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_0 RESULT=skip>
5346 11:19:36.981355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_0 RESULT=pass>
5347 11:19:36.981779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_0 RESULT=pass
5349 11:19:37.633745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_1 RESULT=skip>
5350 11:19:37.634200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_1 RESULT=skip
5352 11:19:38.326045 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_1 RESULT=skip
5354 11:19:38.326586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_1 RESULT=skip>
5355 11:19:39.016128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_1 RESULT=pass
5357 11:19:39.016871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_1 RESULT=pass>
5358 11:19:39.678030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_1 RESULT=skip>
5359 11:19:39.678451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_1 RESULT=skip
5361 11:19:40.375306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_2 RESULT=skip
5363 11:19:40.375865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_2 RESULT=skip>
5364 11:19:41.090330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_2 RESULT=skip
5366 11:19:41.091103 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_2 RESULT=skip>
5367 11:19:41.836973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_2 RESULT=skip>
5368 11:19:41.837390 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_2 RESULT=skip
5370 11:19:42.636912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_2 RESULT=pass
5372 11:19:42.637294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_2 RESULT=pass>
5373 11:19:43.297261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_0 RESULT=skip>
5374 11:19:43.297615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_0 RESULT=skip
5376 11:19:43.959709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_0 RESULT=skip
5378 11:19:43.960261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_0 RESULT=skip>
5379 11:19:44.627012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_0 RESULT=skip>
5380 11:19:44.627419 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_0 RESULT=skip
5382 11:19:45.380799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_0 RESULT=skip>
5383 11:19:45.381195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_0 RESULT=skip
5385 11:19:46.126182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_1 RESULT=skip>
5386 11:19:46.126609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_1 RESULT=skip
5388 11:19:46.897412 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_1 RESULT=skip
5390 11:19:46.898121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_1 RESULT=skip>
5391 11:19:47.607447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_1 RESULT=pass>
5392 11:19:47.607870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_1 RESULT=pass
5394 11:19:48.303467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_1 RESULT=skip>
5395 11:19:48.303903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_1 RESULT=skip
5397 11:19:49.019154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_2 RESULT=skip
5399 11:19:49.019765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_2 RESULT=skip>
5400 11:19:49.705224 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_2 RESULT=skip>
5401 11:19:49.705634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_2 RESULT=skip
5403 11:19:50.382934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_2 RESULT=skip
5405 11:19:50.383508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_2 RESULT=skip>
5406 11:19:51.060508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_2 RESULT=skip
5408 11:19:51.066550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_2 RESULT=skip>
5409 11:19:51.725713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_3 RESULT=skip>
5410 11:19:51.726124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_3 RESULT=skip
5412 11:19:52.407960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_3 RESULT=skip>
5413 11:19:52.408319 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_3 RESULT=skip
5415 11:19:53.082849 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_3 RESULT=skip
5417 11:19:53.083272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_3 RESULT=skip>
5418 11:19:53.920978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_3 RESULT=skip>
5419 11:19:53.921402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_3 RESULT=skip
5421 11:19:54.640447 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_0 RESULT=skip
5423 11:19:54.640919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_0 RESULT=skip>
5424 11:19:55.414850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_0 RESULT=skip
5426 11:19:55.415280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_0 RESULT=skip>
5427 11:19:56.102624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_0 RESULT=skip>
5428 11:19:56.103028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_0 RESULT=skip
5430 11:19:56.909120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_0 RESULT=pass
5432 11:19:56.910398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_0 RESULT=pass>
5433 11:19:57.669762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_1 RESULT=skip
5435 11:19:57.670439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_1 RESULT=skip>
5436 11:19:58.387080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_1 RESULT=skip
5438 11:19:58.387595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_1 RESULT=skip>
5439 11:19:59.135350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_1 RESULT=skip>
5440 11:19:59.135746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_1 RESULT=skip
5442 11:19:59.835640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_1 RESULT=skip
5444 11:19:59.836398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_1 RESULT=skip>
5445 11:20:00.497316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_2 RESULT=skip>
5446 11:20:00.497668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_2 RESULT=skip
5448 11:20:01.149336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_2 RESULT=skip>
5449 11:20:01.149822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_2 RESULT=skip
5451 11:20:01.820648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_2 RESULT=skip
5453 11:20:01.821393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_2 RESULT=skip>
5454 11:20:02.493088 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_2 RESULT=pass
5456 11:20:02.493517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_2 RESULT=pass>
5457 11:20:03.174289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_3 RESULT=skip
5459 11:20:03.179575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_3 RESULT=skip>
5460 11:20:03.856753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_3 RESULT=skip>
5461 11:20:03.857149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_3 RESULT=skip
5463 11:20:04.534398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_3 RESULT=skip
5465 11:20:04.534818 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_3 RESULT=skip>
5466 11:20:05.174325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_3 RESULT=skip
5468 11:20:05.174741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_3 RESULT=skip>
5469 11:20:05.892106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_0 RESULT=skip>
5470 11:20:05.892488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_0 RESULT=skip
5472 11:20:06.557443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_0 RESULT=skip>
5473 11:20:06.557884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_0 RESULT=skip
5475 11:20:07.236540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_0 RESULT=skip
5477 11:20:07.236901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_0 RESULT=skip>
5478 11:20:07.904679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_0 RESULT=skip>
5479 11:20:07.905059 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_0 RESULT=skip
5481 11:20:08.606367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_1 RESULT=skip>
5482 11:20:08.606802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_1 RESULT=skip
5484 11:20:09.329505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_1 RESULT=skip
5486 11:20:09.330091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_1 RESULT=skip>
5487 11:20:10.137189 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_1 RESULT=skip
5489 11:20:10.137885 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_1 RESULT=skip>
5490 11:20:10.902564 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_1 RESULT=skip
5492 11:20:10.903324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_1 RESULT=skip>
5493 11:20:11.572020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_2 RESULT=skip
5495 11:20:11.572610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_2 RESULT=skip>
5496 11:20:12.273756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_2 RESULT=skip>
5497 11:20:12.274222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_2 RESULT=skip
5499 11:20:13.149123 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_2 RESULT=skip
5501 11:20:13.149535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_2 RESULT=skip>
5502 11:20:13.819965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_2 RESULT=skip>
5503 11:20:13.820355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_2 RESULT=skip
5505 11:20:14.487562 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_3 RESULT=skip>
5506 11:20:14.487955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_3 RESULT=skip
5508 11:20:15.205407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_3 RESULT=skip
5510 11:20:15.205820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_3 RESULT=skip>
5511 11:20:15.958550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_3 RESULT=skip>
5512 11:20:15.958946 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_3 RESULT=skip
5514 11:20:16.626428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_3 RESULT=skip
5516 11:20:16.627013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_3 RESULT=skip>
5517 11:20:17.300805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_0 RESULT=skip
5519 11:20:17.301374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_0 RESULT=skip>
5520 11:20:17.960338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_0 RESULT=skip>
5521 11:20:17.960724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_0 RESULT=skip
5523 11:20:18.632599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_0 RESULT=skip>
5524 11:20:18.632995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_0 RESULT=skip
5526 11:20:19.284628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_0 RESULT=pass>
5527 11:20:19.285006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_0 RESULT=pass
5529 11:20:20.026742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_1 RESULT=skip>
5530 11:20:20.027112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_1 RESULT=skip
5532 11:20:20.714937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_1 RESULT=skip
5534 11:20:20.715482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_1 RESULT=skip>
5535 11:20:21.394007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_1 RESULT=pass>
5536 11:20:21.394405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_1 RESULT=pass
5538 11:20:22.077730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_1 RESULT=skip
5540 11:20:22.078187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_1 RESULT=skip>
5541 11:20:22.796688 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_2 RESULT=skip>
5542 11:20:22.797143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_2 RESULT=skip
5544 11:20:23.534821 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_2 RESULT=skip
5546 11:20:23.535412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_2 RESULT=skip>
5547 11:20:24.254572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_2 RESULT=skip>
5548 11:20:24.254971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_2 RESULT=skip
5550 11:20:25.062809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_2 RESULT=pass
5552 11:20:25.063420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_2 RESULT=pass>
5553 11:20:25.784497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_0 RESULT=skip
5555 11:20:25.785325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_0 RESULT=skip>
5556 11:20:26.485171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_0 RESULT=skip>
5557 11:20:26.485572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_0 RESULT=skip
5559 11:20:27.185549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_0 RESULT=skip>
5560 11:20:27.185989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_0 RESULT=skip
5562 11:20:28.001464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_0 RESULT=skip>
5563 11:20:28.001884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_0 RESULT=skip
5565 11:20:28.680553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_1 RESULT=skip
5567 11:20:28.681121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_1 RESULT=skip>
5568 11:20:29.436212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_1 RESULT=skip
5570 11:20:29.436945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_1 RESULT=skip>
5571 11:20:30.158080 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_1 RESULT=pass
5573 11:20:30.158825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_1 RESULT=pass>
5574 11:20:30.894975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_1 RESULT=skip>
5575 11:20:30.895373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_1 RESULT=skip
5577 11:20:31.693557 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_2 RESULT=skip
5579 11:20:31.693979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_2 RESULT=skip>
5580 11:20:32.387872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_2 RESULT=skip
5582 11:20:32.388427 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_2 RESULT=skip>
5583 11:20:33.060754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_2 RESULT=skip
5585 11:20:33.061185 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_2 RESULT=skip>
5586 11:20:33.814316 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_2 RESULT=skip
5588 11:20:33.815080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_2 RESULT=skip>
5589 11:20:34.512170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_3 RESULT=skip
5591 11:20:34.512600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_3 RESULT=skip>
5592 11:20:35.478037 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_3 RESULT=skip
5594 11:20:35.478635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_3 RESULT=skip>
5595 11:20:36.235120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_3 RESULT=skip>
5596 11:20:36.235568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_3 RESULT=skip
5598 11:20:36.901907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_3 RESULT=skip
5600 11:20:36.902560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_3 RESULT=skip>
5601 11:20:37.638022 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_0 RESULT=skip
5603 11:20:37.638545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_0 RESULT=skip>
5604 11:20:38.370585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_0 RESULT=skip>
5605 11:20:38.371029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_0 RESULT=skip
5607 11:20:39.052873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_0 RESULT=skip
5609 11:20:39.053698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_0 RESULT=skip>
5610 11:20:39.753640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_0 RESULT=pass>
5611 11:20:39.754122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_0 RESULT=pass
5613 11:20:40.390038 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_1 RESULT=skip>
5614 11:20:40.390489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_1 RESULT=skip
5616 11:20:41.068701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_1 RESULT=skip>
5617 11:20:41.069154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_1 RESULT=skip
5619 11:20:41.730009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_1 RESULT=skip
5621 11:20:41.730759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_1 RESULT=skip>
5622 11:20:42.377897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_1 RESULT=skip
5624 11:20:42.378480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_1 RESULT=skip>
5625 11:20:43.033942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_2 RESULT=skip>
5626 11:20:43.034378 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_2 RESULT=skip
5628 11:20:43.706280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_2 RESULT=skip>
5629 11:20:43.706727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_2 RESULT=skip
5631 11:20:44.398757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_2 RESULT=skip
5633 11:20:44.399319 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_2 RESULT=skip>
5634 11:20:45.153040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_2 RESULT=pass
5636 11:20:45.153777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_2 RESULT=pass>
5637 11:20:45.923143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_3 RESULT=skip
5639 11:20:45.923715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_3 RESULT=skip>
5640 11:20:46.735132 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_3 RESULT=skip
5642 11:20:46.735656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_3 RESULT=skip>
5643 11:20:47.450781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_3 RESULT=skip>
5644 11:20:47.451216 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_3 RESULT=skip
5646 11:20:48.088641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_3 RESULT=skip>
5647 11:20:48.089070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_3 RESULT=skip
5649 11:20:48.779741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_0 RESULT=skip
5651 11:20:48.780311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_0 RESULT=skip>
5652 11:20:49.448759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_0 RESULT=skip>
5653 11:20:49.449194 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_0 RESULT=skip
5655 11:20:50.126259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_0 RESULT=skip
5657 11:20:50.126825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_0 RESULT=skip>
5658 11:20:50.835411 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_0 RESULT=skip
5660 11:20:50.836238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_0 RESULT=skip>
5661 11:20:51.581906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_1 RESULT=skip>
5662 11:20:51.582302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_1 RESULT=skip
5664 11:20:52.254014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_1 RESULT=skip
5666 11:20:52.254441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_1 RESULT=skip>
5667 11:20:52.923910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_1 RESULT=skip
5669 11:20:52.924341 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_1 RESULT=skip>
5670 11:20:53.600125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_1 RESULT=skip
5672 11:20:53.600646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_1 RESULT=skip>
5673 11:20:54.264896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_2 RESULT=skip
5675 11:20:54.265462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_2 RESULT=skip>
5676 11:20:54.917289 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_2 RESULT=skip>
5677 11:20:54.917734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_2 RESULT=skip
5679 11:20:55.584806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_2 RESULT=skip>
5680 11:20:55.585211 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_2 RESULT=skip
5682 11:20:56.363523 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_2 RESULT=skip
5684 11:20:56.363959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_2 RESULT=skip>
5685 11:20:57.095757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_3 RESULT=skip>
5686 11:20:57.096199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_3 RESULT=skip
5688 11:20:57.748363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_3 RESULT=skip
5690 11:20:57.748895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_3 RESULT=skip>
5691 11:20:58.450957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_3 RESULT=skip
5693 11:20:58.451531 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_3 RESULT=skip>
5694 11:20:59.122894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_3 RESULT=skip>
5695 11:20:59.123333 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_3 RESULT=skip
5697 11:20:59.949212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_0 RESULT=pass
5699 11:20:59.949638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_0 RESULT=pass>
5700 11:21:00.702755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_0 RESULT=pass
5702 11:21:00.703181 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_0 RESULT=pass>
5703 11:21:01.409461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_0 RESULT=pass>
5704 11:21:01.409878 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_0 RESULT=pass
5706 11:21:02.095897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_0 RESULT=pass
5708 11:21:02.096522 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_0 RESULT=pass>
5709 11:21:02.809400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_1 RESULT=skip
5711 11:21:02.810296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_1 RESULT=skip>
5712 11:21:03.538984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_1 RESULT=skip
5714 11:21:03.539559 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_1 RESULT=skip>
5715 11:21:04.246544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_1 RESULT=pass
5717 11:21:04.247321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_1 RESULT=pass>
5718 11:21:04.980985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_1 RESULT=skip>
5719 11:21:04.981420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_1 RESULT=skip
5721 11:21:05.638449 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_2 RESULT=skip
5723 11:21:05.647100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_2 RESULT=skip>
5724 11:21:06.334761 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_2 RESULT=skip
5726 11:21:06.335178 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_2 RESULT=skip>
5727 11:21:07.060770 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_2 RESULT=skip
5729 11:21:07.061543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_2 RESULT=skip>
5730 11:21:07.760814 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_2 RESULT=pass>
5731 11:21:07.761207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_2 RESULT=pass
5733 11:21:08.414769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_0 RESULT=skip
5735 11:21:08.415725 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_0 RESULT=skip>
5736 11:21:09.052433 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_0 RESULT=skip>
5737 11:21:09.052865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_0 RESULT=skip
5739 11:21:09.732425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_0 RESULT=pass>
5740 11:21:09.732851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_0 RESULT=pass
5742 11:21:10.367910 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_0 RESULT=skip
5744 11:21:10.368455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_0 RESULT=skip>
5745 11:21:11.009112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_1 RESULT=pass
5747 11:21:11.009673 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_1 RESULT=pass>
5748 11:21:11.672976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_1 RESULT=pass>
5749 11:21:11.673425 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_1 RESULT=pass
5751 11:21:12.500439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_1 RESULT=pass
5753 11:21:12.501046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_1 RESULT=pass>
5754 11:21:13.247793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_1 RESULT=pass>
5755 11:21:13.248243 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_1 RESULT=pass
5757 11:21:13.948911 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_2 RESULT=skip
5759 11:21:13.949529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_2 RESULT=skip>
5760 11:21:14.633424 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_2 RESULT=skip
5762 11:21:14.634075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_2 RESULT=skip>
5763 11:21:15.331770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_2 RESULT=skip>
5764 11:21:15.332207 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_2 RESULT=skip
5766 11:21:16.087801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_2 RESULT=skip
5768 11:21:16.088584 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_2 RESULT=skip>
5769 11:21:16.781852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_3 RESULT=skip>
5770 11:21:16.782279 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_3 RESULT=skip
5772 11:21:17.482824 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_3 RESULT=skip>
5773 11:21:17.483242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_3 RESULT=skip
5775 11:21:18.229626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_3 RESULT=skip>
5776 11:21:18.230075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_3 RESULT=skip
5778 11:21:19.023429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_3 RESULT=pass
5780 11:21:19.023843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_3 RESULT=pass>
5781 11:21:19.716232 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_0 RESULT=skip
5783 11:21:19.717014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_0 RESULT=skip>
5784 11:21:20.390470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_0 RESULT=skip>
5785 11:21:20.390870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_0 RESULT=skip
5787 11:21:21.081805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_0 RESULT=skip
5789 11:21:21.082247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_0 RESULT=skip>
5790 11:21:21.774075 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_0 RESULT=pass
5792 11:21:21.774520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_0 RESULT=pass>
5793 11:21:22.456268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_1 RESULT=skip
5795 11:21:22.456679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_1 RESULT=skip>
5796 11:21:23.107136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_1 RESULT=skip
5798 11:21:23.107734 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_1 RESULT=skip>
5799 11:21:23.816815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_1 RESULT=skip
5801 11:21:23.817428 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_1 RESULT=skip>
5802 11:21:24.501948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_1 RESULT=skip>
5803 11:21:24.502433 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_1 RESULT=skip
5805 11:21:25.210540 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_2 RESULT=pass>
5806 11:21:25.210983 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_2 RESULT=pass
5808 11:21:25.950074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_2 RESULT=pass>
5809 11:21:25.950519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_2 RESULT=pass
5811 11:21:26.645670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_2 RESULT=pass
5813 11:21:26.646294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_2 RESULT=pass>
5814 11:21:27.324849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_2 RESULT=pass>
5815 11:21:27.325248 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_2 RESULT=pass
5817 11:21:28.085476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_3 RESULT=skip>
5818 11:21:28.085885 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_3 RESULT=skip
5820 11:21:28.797771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_3 RESULT=skip
5822 11:21:28.798376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_3 RESULT=skip>
5823 11:21:29.592981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_3 RESULT=pass
5825 11:21:29.593578 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_3 RESULT=pass>
5826 11:21:30.339723 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_3 RESULT=skip
5828 11:21:30.340377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_3 RESULT=skip>
5829 11:21:31.018281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_0 RESULT=skip
5831 11:21:31.018837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_0 RESULT=skip>
5832 11:21:31.720875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_0 RESULT=skip
5834 11:21:31.721454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_0 RESULT=skip>
5835 11:21:32.428096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_0 RESULT=skip
5837 11:21:32.428520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_0 RESULT=skip>
5838 11:21:33.125928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_0 RESULT=skip>
5839 11:21:33.126376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_0 RESULT=skip
5841 11:21:33.797959 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_1 RESULT=skip
5843 11:21:33.798391 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_1 RESULT=skip>
5844 11:21:34.477542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_1 RESULT=skip>
5845 11:21:34.477961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_1 RESULT=skip
5847 11:21:35.221401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_1 RESULT=skip>
5848 11:21:35.221803 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_1 RESULT=skip
5850 11:21:35.977750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_1 RESULT=pass>
5851 11:21:35.978198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_1 RESULT=pass
5853 11:21:36.680262 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_2 RESULT=skip>
5854 11:21:36.680696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_2 RESULT=skip
5856 11:21:37.373889 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_2 RESULT=skip
5858 11:21:37.374450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_2 RESULT=skip>
5859 11:21:38.060968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_2 RESULT=pass
5861 11:21:38.061576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_2 RESULT=pass>
5862 11:21:38.798606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_2 RESULT=skip>
5863 11:21:38.799029 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_2 RESULT=skip
5865 11:21:39.596409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_3 RESULT=pass
5867 11:21:39.596786 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_3 RESULT=pass>
5868 11:21:40.289146 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_3 RESULT=pass
5870 11:21:40.289764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_3 RESULT=pass>
5871 11:21:41.053414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_3 RESULT=pass
5873 11:21:41.054215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_3 RESULT=pass>
5874 11:21:41.820150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_3 RESULT=pass
5876 11:21:41.827853 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_3 RESULT=pass>
5877 11:21:42.548234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-ptrace RESULT=pass
5879 11:21:42.548841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-ptrace RESULT=pass>
5880 11:21:43.253119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
5882 11:21:43.253657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
5883 11:21:43.990766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_KERNEL-0-0 RESULT=pass>
5884 11:21:43.991200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_KERNEL-0-0 RESULT=pass
5886 11:21:44.676246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass>
5887 11:21:44.676687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-0 RESULT=pass
5889 11:21:45.377005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass>
5890 11:21:45.377481 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-0 RESULT=pass
5892 11:21:46.118086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass
5894 11:21:46.118513 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-0 RESULT=pass>
5895 11:21:46.801624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass
5897 11:21:46.802186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-0 RESULT=pass>
5898 11:21:47.474023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass
5900 11:21:47.474585 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-0 RESULT=pass>
5901 11:21:48.115145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass
5903 11:21:48.115726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-0 RESULT=pass>
5904 11:21:48.752148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass>
5905 11:21:48.752575 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-0 RESULT=pass
5907 11:21:49.392226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass>
5908 11:21:49.392663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-0 RESULT=pass
5910 11:21:50.072048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass
5912 11:21:50.072626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-0 RESULT=pass>
5913 11:21:50.749097 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass
5915 11:21:50.749630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass>
5916 11:21:51.375349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_KERNEL-1-0 RESULT=pass>
5917 11:21:51.375794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_KERNEL-1-0 RESULT=pass
5919 11:21:52.037258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-1 RESULT=pass>
5920 11:21:52.037619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-1 RESULT=pass
5922 11:21:52.853974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-1 RESULT=pass
5924 11:21:52.854384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-1 RESULT=pass>
5925 11:21:53.558394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-1 RESULT=pass>
5926 11:21:53.558785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-1 RESULT=pass
5928 11:21:54.251903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-1 RESULT=pass
5930 11:21:54.252490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-1 RESULT=pass>
5931 11:21:54.896655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-1 RESULT=pass>
5932 11:21:54.897093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-1 RESULT=pass
5934 11:21:55.558203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-1 RESULT=pass
5936 11:21:55.567088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-1 RESULT=pass>
5937 11:21:56.287226 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-1 RESULT=pass
5939 11:21:56.287744 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-1 RESULT=pass>
5940 11:21:56.942497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-1 RESULT=pass>
5941 11:21:56.942917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-1 RESULT=pass
5943 11:21:57.599557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-1 RESULT=pass>
5944 11:21:57.599991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-1 RESULT=pass
5946 11:21:58.340091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass
5948 11:21:58.340521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass>
5949 11:21:59.028637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_KERNEL-2-0 RESULT=pass
5951 11:21:59.029376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_KERNEL-2-0 RESULT=pass>
5952 11:21:59.658043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-2 RESULT=pass>
5953 11:21:59.658479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-2 RESULT=pass
5955 11:22:00.319671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-2 RESULT=pass>
5956 11:22:00.320099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-2 RESULT=pass
5958 11:22:00.956751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-2 RESULT=pass
5960 11:22:00.957256 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-2 RESULT=pass>
5961 11:22:01.579209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-2 RESULT=pass
5963 11:22:01.579742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-2 RESULT=pass>
5964 11:22:02.217213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-2 RESULT=pass
5966 11:22:02.217741 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-2 RESULT=pass>
5967 11:22:02.870384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-2 RESULT=pass
5969 11:22:02.870938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-2 RESULT=pass>
5970 11:22:03.600389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-2 RESULT=pass>
5971 11:22:03.600844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-2 RESULT=pass
5973 11:22:04.289646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-2 RESULT=pass>
5974 11:22:04.290092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-2 RESULT=pass
5976 11:22:05.156303 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-2 RESULT=pass
5978 11:22:05.157071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-2 RESULT=pass>
5979 11:22:05.890496 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass
5981 11:22:05.891027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass>
5982 11:22:06.560801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_KERNEL-3-0 RESULT=pass>
5983 11:22:06.561233 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_KERNEL-3-0 RESULT=pass
5985 11:22:07.189409 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-3 RESULT=pass
5987 11:22:07.189961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-3 RESULT=pass>
5988 11:22:07.883201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-3 RESULT=pass
5990 11:22:07.883765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-3 RESULT=pass>
5991 11:22:08.547636 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-3 RESULT=pass>
5992 11:22:08.548073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-3 RESULT=pass
5994 11:22:09.189552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-3 RESULT=pass
5996 11:22:09.190339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-3 RESULT=pass>
5997 11:22:09.839703 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-3 RESULT=pass
5999 11:22:09.840263 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-3 RESULT=pass>
6000 11:22:10.473770 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-3 RESULT=pass>
6001 11:22:10.474230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-3 RESULT=pass
6003 11:22:11.175275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-3 RESULT=pass
6005 11:22:11.175869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-3 RESULT=pass>
6006 11:22:11.840606 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-3 RESULT=pass>
6007 11:22:11.841041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-3 RESULT=pass
6009 11:22:12.466928 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-3 RESULT=pass
6011 11:22:12.467518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-3 RESULT=pass>
6012 11:22:13.137452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass
6014 11:22:13.138069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass>
6015 11:22:13.782470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_KERNEL-4-0 RESULT=pass>
6016 11:22:13.782853 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_KERNEL-4-0 RESULT=pass
6018 11:22:14.410247 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-4 RESULT=pass>
6019 11:22:14.410675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-4 RESULT=pass
6021 11:22:15.070917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-4 RESULT=pass>
6022 11:22:15.071347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-4 RESULT=pass
6024 11:22:15.756646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-4 RESULT=pass>
6025 11:22:15.757081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-4 RESULT=pass
6027 11:22:16.476569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-4 RESULT=pass
6029 11:22:16.477172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-4 RESULT=pass>
6030 11:22:17.110272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-4 RESULT=pass>
6031 11:22:17.110726 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-4 RESULT=pass
6033 11:22:17.779208 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-4 RESULT=pass>
6034 11:22:17.779645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-4 RESULT=pass
6036 11:22:18.414315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-4 RESULT=pass
6038 11:22:18.414956 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-4 RESULT=pass>
6039 11:22:19.052083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-4 RESULT=pass
6041 11:22:19.052616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-4 RESULT=pass>
6042 11:22:19.681091 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-4 RESULT=pass
6044 11:22:19.681641 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-4 RESULT=pass>
6045 11:22:20.342458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass>
6046 11:22:20.342894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass
6048 11:22:21.050201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_KERNEL-5-0 RESULT=pass
6050 11:22:21.051009 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_KERNEL-5-0 RESULT=pass>
6051 11:22:21.740519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-5 RESULT=pass
6053 11:22:21.741075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-5 RESULT=pass>
6054 11:22:22.418820 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-5 RESULT=pass
6056 11:22:22.419349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-5 RESULT=pass>
6057 11:22:23.069819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-5 RESULT=pass
6059 11:22:23.070373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-5 RESULT=pass>
6060 11:22:23.718918 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-5 RESULT=pass
6062 11:22:23.719472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-5 RESULT=pass>
6063 11:22:24.369210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-5 RESULT=pass>
6064 11:22:24.369599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-5 RESULT=pass
6066 11:22:24.971253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-5 RESULT=pass>
6067 11:22:24.971682 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-5 RESULT=pass
6069 11:22:25.628037 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-5 RESULT=pass>
6070 11:22:25.628489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-5 RESULT=pass
6072 11:22:26.332627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-5 RESULT=pass
6074 11:22:26.333051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-5 RESULT=pass>
6075 11:22:26.996442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-5 RESULT=pass
6077 11:22:26.997039 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-5 RESULT=pass>
6078 11:22:27.643350 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass
6080 11:22:27.643921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass>
6081 11:22:28.295685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_KERNEL-6-0 RESULT=pass
6083 11:22:28.296265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_KERNEL-6-0 RESULT=pass>
6084 11:22:29.035356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-6 RESULT=pass>
6085 11:22:29.035880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-6 RESULT=pass
6087 11:22:29.679670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-6 RESULT=pass>
6088 11:22:29.680131 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-6 RESULT=pass
6090 11:22:30.391406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-6 RESULT=pass
6092 11:22:30.392190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-6 RESULT=pass>
6093 11:22:31.054864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-6 RESULT=pass
6095 11:22:31.055623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-6 RESULT=pass>
6096 11:22:31.715807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-6 RESULT=pass>
6097 11:22:31.716267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-6 RESULT=pass
6099 11:22:32.421295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-6 RESULT=pass>
6100 11:22:32.421696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-6 RESULT=pass
6102 11:22:33.069467 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-6 RESULT=pass
6104 11:22:33.074351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-6 RESULT=pass>
6105 11:22:33.759104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-6 RESULT=pass
6107 11:22:33.759882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-6 RESULT=pass>
6108 11:22:34.438977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-6 RESULT=pass>
6109 11:22:34.439422 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-6 RESULT=pass
6111 11:22:35.107893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass>
6112 11:22:35.108297 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass
6114 11:22:35.842980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_KERNEL-7-0 RESULT=pass
6116 11:22:35.843414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_KERNEL-7-0 RESULT=pass>
6117 11:22:36.478325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-7 RESULT=pass>
6118 11:22:36.478733 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-64-7 RESULT=pass
6120 11:22:37.198439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-7 RESULT=pass>
6121 11:22:37.198897 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-32-7 RESULT=pass
6123 11:22:37.909493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-7 RESULT=pass
6125 11:22:37.909913 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SVE-VL-16-7 RESULT=pass>
6126 11:22:38.592281 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-7 RESULT=pass
6128 11:22:38.592877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-64-7 RESULT=pass>
6129 11:22:39.219444 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-7 RESULT=pass>
6130 11:22:39.219798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-64-7 RESULT=pass
6132 11:22:39.861849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-7 RESULT=pass>
6133 11:22:39.862197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-32-7 RESULT=pass
6135 11:22:40.536585 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-7 RESULT=pass
6137 11:22:40.537188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-32-7 RESULT=pass>
6138 11:22:41.182148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-7 RESULT=pass>
6139 11:22:41.182531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_SSVE-VL-16-7 RESULT=pass
6141 11:22:41.833221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-7 RESULT=pass>
6142 11:22:41.833645 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_ZA-VL-16-7 RESULT=pass
6144 11:22:42.513197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
6146 11:22:42.513702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
6147 11:22:43.159262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
6149 11:22:43.159836 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
6150 11:22:43.881289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass
6152 11:22:43.882051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state RESULT=pass>
6153 11:22:44.613006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
6154 11:22:44.613381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
6156 11:22:45.252099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
6157 11:22:45.252494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
6159 11:22:45.921851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass>
6160 11:22:45.922185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_16 RESULT=pass
6162 11:22:46.578882 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass
6164 11:22:46.579414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16 RESULT=pass>
6165 11:22:47.234295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass>
6166 11:22:47.234730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16 RESULT=pass
6168 11:22:47.872381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass
6170 11:22:47.872810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16 RESULT=pass>
6171 11:22:48.617451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass
6173 11:22:48.617873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_32 RESULT=pass>
6174 11:22:49.347999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass
6176 11:22:49.348729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32 RESULT=pass>
6177 11:22:50.104788 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass
6179 11:22:50.105577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32 RESULT=pass>
6180 11:22:50.770583 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass
6182 11:22:50.770973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32 RESULT=pass>
6183 11:22:51.438736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass>
6184 11:22:51.439127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_48 RESULT=pass
6186 11:22:52.100213 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
6187 11:22:52.100586 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
6189 11:22:52.801508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
6191 11:22:52.801874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
6192 11:22:53.469293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
6193 11:22:53.469670 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
6195 11:22:54.167236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass>
6196 11:22:54.167588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_64 RESULT=pass
6198 11:22:54.828726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass>
6199 11:22:54.829190 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64 RESULT=pass
6201 11:22:55.479197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass>
6202 11:22:55.479625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64 RESULT=pass
6204 11:22:56.138910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass>
6205 11:22:56.139361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64 RESULT=pass
6207 11:22:56.782072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass>
6208 11:22:56.782512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_80 RESULT=pass
6210 11:22:57.428284 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
6211 11:22:57.428712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
6213 11:22:58.101520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
6215 11:22:58.102120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
6216 11:22:58.807952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
6217 11:22:58.808349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
6219 11:22:59.589606 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass
6221 11:22:59.590116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_96 RESULT=pass>
6222 11:23:00.323962 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
6224 11:23:00.324476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
6225 11:23:01.051815 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
6227 11:23:01.052315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
6228 11:23:01.748796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
6230 11:23:01.749623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
6231 11:23:02.451241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass
6233 11:23:02.452061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_112 RESULT=pass>
6234 11:23:03.121080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
6235 11:23:03.121500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
6237 11:23:03.764436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
6239 11:23:03.764990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
6240 11:23:04.398892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
6241 11:23:04.399261 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
6243 11:23:05.042843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass>
6244 11:23:05.043220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_128 RESULT=pass
6246 11:23:05.700513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_128 RESULT=skip
6248 11:23:05.701344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_128 RESULT=skip>
6249 11:23:06.354398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_128 RESULT=skip
6251 11:23:06.354915 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_128 RESULT=skip>
6252 11:23:06.973429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_128 RESULT=skip
6254 11:23:06.974059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_128 RESULT=skip>
6255 11:23:07.692524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass>
6256 11:23:07.692945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_144 RESULT=pass
6258 11:23:08.332435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
6259 11:23:08.332879 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
6261 11:23:09.120854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
6263 11:23:09.121437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
6264 11:23:09.860721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
6266 11:23:09.861297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
6267 11:23:10.512928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass>
6268 11:23:10.513363 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_160 RESULT=pass
6270 11:23:11.192547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
6271 11:23:11.192984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
6273 11:23:11.844203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
6274 11:23:11.844638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
6276 11:23:12.544914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
6277 11:23:12.545360 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
6279 11:23:13.188727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass
6281 11:23:13.189150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_176 RESULT=pass>
6282 11:23:13.856540 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
6284 11:23:13.856946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
6285 11:23:14.520343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
6287 11:23:14.520746 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
6288 11:23:15.319925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
6290 11:23:15.320719 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
6291 11:23:16.116338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass>
6292 11:23:16.116768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_192 RESULT=pass
6294 11:23:16.848708 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
6295 11:23:16.849143 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
6297 11:23:17.479845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
6299 11:23:17.480228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
6300 11:23:18.211280 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
6302 11:23:18.211683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
6303 11:23:18.839097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass>
6304 11:23:18.839521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_208 RESULT=pass
6306 11:23:19.497302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
6308 11:23:19.497865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
6309 11:23:20.118623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
6311 11:23:20.119126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
6312 11:23:20.742822 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
6314 11:23:20.743349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
6315 11:23:21.382026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass>
6316 11:23:21.382520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_224 RESULT=pass
6318 11:23:22.036634 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
6320 11:23:22.037035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
6321 11:23:22.705806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
6323 11:23:22.706345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
6324 11:23:23.353070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
6325 11:23:23.353387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
6327 11:23:24.077173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass
6329 11:23:24.077599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_240 RESULT=pass>
6330 11:23:24.710685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
6331 11:23:24.711089 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
6333 11:23:25.367111 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
6334 11:23:25.367531 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
6336 11:23:26.023144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
6337 11:23:26.023537 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
6339 11:23:26.765783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass>
6340 11:23:26.766238 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_256 RESULT=pass
6342 11:23:27.447263 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_256 RESULT=skip
6344 11:23:27.448089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_256 RESULT=skip>
6345 11:23:28.127808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_256 RESULT=skip
6347 11:23:28.128249 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_256 RESULT=skip>
6348 11:23:28.813256 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_256 RESULT=skip
6350 11:23:28.814082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_256 RESULT=skip>
6351 11:23:29.615788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass>
6352 11:23:29.616134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_SVE_VL_272 RESULT=pass
6354 11:23:30.385881 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
6356 11:23:30.386251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
6357 11:23:31.163884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
6359 11:23:31.164672 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
6360 11:23:31.899322 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
6361 11:23:31.899702 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
6363 11:23:32.617406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass>
6364 11:23:32.617854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0 RESULT=pass
6366 11:23:33.313798 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass
6368 11:23:33.314776 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state RESULT=pass>
6369 11:23:33.953262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass
6371 11:23:33.953683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set RESULT=pass>
6372 11:23:34.612565 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass
6374 11:23:34.613150 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared RESULT=pass>
6375 11:23:35.250705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass
6377 11:23:35.251481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_16 RESULT=pass>
6378 11:23:35.962992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass
6380 11:23:35.963713 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16 RESULT=pass>
6381 11:23:36.624132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass>
6382 11:23:36.624570 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16 RESULT=pass
6384 11:23:37.272563 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass
6386 11:23:37.273098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16 RESULT=pass>
6387 11:23:37.948076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass>
6388 11:23:37.948498 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_32 RESULT=pass
6390 11:23:38.604309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass
6392 11:23:38.604709 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32 RESULT=pass>
6393 11:23:39.268110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass>
6394 11:23:39.268542 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32 RESULT=pass
6396 11:23:39.914549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass
6398 11:23:39.914964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32 RESULT=pass>
6399 11:23:40.572425 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass>
6400 11:23:40.572806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_48 RESULT=pass
6402 11:23:41.232356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip
6404 11:23:41.232879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48 RESULT=skip>
6405 11:23:42.083126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip
6407 11:23:42.083926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48 RESULT=skip>
6408 11:23:42.777901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip>
6409 11:23:42.778311 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48 RESULT=skip
6411 11:23:43.454632 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass
6413 11:23:43.455333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_64 RESULT=pass>
6414 11:23:44.202381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass>
6415 11:23:44.202730 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64 RESULT=pass
6417 11:23:44.921548 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass
6419 11:23:44.922172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64 RESULT=pass>
6420 11:23:45.596552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass
6422 11:23:45.597087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64 RESULT=pass>
6423 11:23:46.301091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass>
6424 11:23:46.301521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_80 RESULT=pass
6426 11:23:46.987470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip
6428 11:23:46.988026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80 RESULT=skip>
6429 11:23:47.641180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip>
6430 11:23:47.641627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80 RESULT=skip
6432 11:23:48.282779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip>
6433 11:23:48.283180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80 RESULT=skip
6435 11:23:48.945360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass>
6436 11:23:48.945759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_96 RESULT=pass
6438 11:23:49.591894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip>
6439 11:23:49.592324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96 RESULT=skip
6441 11:23:50.237368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip
6443 11:23:50.237906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96 RESULT=skip>
6444 11:23:50.901605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip>
6445 11:23:50.902044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96 RESULT=skip
6447 11:23:51.564741 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass
6449 11:23:51.565288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_112 RESULT=pass>
6450 11:23:52.193867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip
6452 11:23:52.194446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112 RESULT=skip>
6453 11:23:52.824396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip>
6454 11:23:52.824806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112 RESULT=skip
6456 11:23:53.535326 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip>
6457 11:23:53.535752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112 RESULT=skip
6459 11:23:54.196650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass>
6460 11:23:54.197079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_128 RESULT=pass
6462 11:23:54.890466 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_128 RESULT=skip>
6463 11:23:54.890908 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_128 RESULT=skip
6465 11:23:55.583092 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_128 RESULT=skip>
6466 11:23:55.583485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_128 RESULT=skip
6468 11:23:56.248035 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_128 RESULT=skip>
6469 11:23:56.248470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_128 RESULT=skip
6471 11:23:56.917978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass
6473 11:23:56.918785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_144 RESULT=pass>
6474 11:23:57.651500 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip
6476 11:23:57.652056 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144 RESULT=skip>
6477 11:23:58.334386 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip>
6478 11:23:58.334812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144 RESULT=skip
6480 11:23:59.010938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip>
6481 11:23:59.011331 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144 RESULT=skip
6483 11:23:59.666610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass
6485 11:23:59.667184 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_160 RESULT=pass>
6486 11:24:00.402957 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip
6488 11:24:00.403505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160 RESULT=skip>
6489 11:24:01.137352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip
6491 11:24:01.138106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160 RESULT=skip>
6492 11:24:01.816212 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip
6494 11:24:01.816798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160 RESULT=skip>
6495 11:24:02.445443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass
6497 11:24:02.445998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_176 RESULT=pass>
6498 11:24:03.089884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip>
6499 11:24:03.090305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176 RESULT=skip
6501 11:24:03.746144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip
6503 11:24:03.746508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176 RESULT=skip>
6504 11:24:04.511987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip
6506 11:24:04.512765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176 RESULT=skip>
6507 11:24:05.226646 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass
6509 11:24:05.227445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_192 RESULT=pass>
6510 11:24:05.978328 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip>
6511 11:24:05.978735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192 RESULT=skip
6513 11:24:06.643847 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip
6515 11:24:06.644403 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192 RESULT=skip>
6516 11:24:07.308325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip
6518 11:24:07.308873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192 RESULT=skip>
6519 11:24:07.947649 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass
6521 11:24:07.948155 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_208 RESULT=pass>
6522 11:24:08.580620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip>
6523 11:24:08.581056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208 RESULT=skip
6525 11:24:09.229124 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip
6527 11:24:09.229680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208 RESULT=skip>
6528 11:24:09.846777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip
6530 11:24:09.851102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208 RESULT=skip>
6531 11:24:10.481330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass>
6532 11:24:10.481771 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_224 RESULT=pass
6534 11:24:11.232959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip>
6535 11:24:11.233368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224 RESULT=skip
6537 11:24:11.879798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip>
6538 11:24:11.880225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224 RESULT=skip
6540 11:24:12.523344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip
6542 11:24:12.523752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224 RESULT=skip>
6543 11:24:13.150094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass>
6544 11:24:13.150454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_240 RESULT=pass
6546 11:24:13.899532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip
6548 11:24:13.900343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240 RESULT=skip>
6549 11:24:14.610755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip
6551 11:24:14.611287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240 RESULT=skip>
6552 11:24:15.332011 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip
6554 11:24:15.332740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240 RESULT=skip>
6555 11:24:15.983511 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass
6557 11:24:15.983926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_256 RESULT=pass>
6558 11:24:16.678884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_256 RESULT=skip
6560 11:24:16.679482 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_256 RESULT=skip>
6561 11:24:17.453773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_256 RESULT=skip>
6562 11:24:17.454228 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_256 RESULT=skip
6564 11:24:18.120643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_256 RESULT=skip>
6565 11:24:18.121073 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_256 RESULT=skip
6567 11:24:18.747926 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass
6569 11:24:18.748436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Set_Streaming_SVE_VL_272 RESULT=pass>
6570 11:24:19.401644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip
6572 11:24:19.402196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272 RESULT=skip>
6573 11:24:20.056802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip
6575 11:24:20.057304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272 RESULT=skip>
6576 11:24:20.684253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip>
6577 11:24:20.684681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272 RESULT=skip
6579 11:24:21.318342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=pass>
6580 11:24:21.318773 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=pass
6582 11:24:21.933154 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_3_vector_lengths RESULT=pass
6584 11:24:21.933686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_Enumerated_3_vector_lengths RESULT=pass>
6585 11:24:22.557062 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass>
6586 11:24:22.557489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_All_vector_lengths_valid RESULT=pass
6588 11:24:23.179786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass
6590 11:24:23.180201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=pass>
6591 11:24:23.807052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass
6593 11:24:23.807575 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_default_vector_length_64 RESULT=pass>
6594 11:24:24.435127 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass
6596 11:24:24.441091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_minimum_vector_length_16 RESULT=pass>
6597 11:24:25.080382 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_64 RESULT=pass
6599 11:24:25.080878 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_maximum_vector_length_64 RESULT=pass>
6600 11:24:25.718458 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass
6602 11:24:25.719005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_current_VL_is_64 RESULT=pass>
6603 11:24:26.373148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass>
6604 11:24:26.373555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64 RESULT=pass
6606 11:24:27.001093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass>
6607 11:24:27.001514 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_min_max RESULT=pass
6609 11:24:27.606092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass
6611 11:24:27.606589 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_used_default RESULT=pass>
6612 11:24:28.296841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass
6614 11:24:28.297343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_was_inherited RESULT=pass>
6615 11:24:28.992807 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass
6617 11:24:28.993320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_vector_length_set_on_exec RESULT=pass>
6618 11:24:29.747967 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass>
6619 11:24:29.748450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors RESULT=pass
6621 11:24:30.412513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass
6623 11:24:30.413003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_default_vector_length_32 RESULT=pass>
6624 11:24:31.048690 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass
6626 11:24:31.049253 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_minimum_vector_length_16 RESULT=pass>
6627 11:24:31.727912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_64 RESULT=pass
6629 11:24:31.728694 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_maximum_vector_length_64 RESULT=pass>
6630 11:24:32.399619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass
6632 11:24:32.400121 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_current_VL_is_32 RESULT=pass>
6633 11:24:33.046491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass
6635 11:24:33.055107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32 RESULT=pass>
6636 11:24:33.675324 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass>
6637 11:24:33.675779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_min_max RESULT=pass
6639 11:24:34.302261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass>
6640 11:24:34.302658 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_used_default RESULT=pass
6642 11:24:34.939733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass>
6643 11:24:34.940134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_was_inherited RESULT=pass
6645 11:24:35.565233 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass>
6646 11:24:35.565625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_vector_length_set_on_exec RESULT=pass
6648 11:24:36.173961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass>
6649 11:24:36.174398 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors RESULT=pass
6651 11:24:36.810487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_change_sve_with_za RESULT=pass
6653 11:24:36.810822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_change_sve_with_za RESULT=pass>
6654 11:24:37.444764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
6655 11:24:37.445203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
6657 11:24:38.134524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass>
6658 11:24:38.134950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_fork_test RESULT=pass
6660 11:24:38.754907 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
6661 11:24:38.755343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
6663 11:24:39.367465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass>
6664 11:24:39.367865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_16 RESULT=pass
6666 11:24:40.090953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass
6668 11:24:40.091370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_16 RESULT=pass>
6669 11:24:40.781286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass>
6670 11:24:40.781720 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_16 RESULT=pass
6672 11:24:41.422027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass>
6673 11:24:41.422452 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_32 RESULT=pass
6675 11:24:42.046026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass>
6676 11:24:42.046437 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_32 RESULT=pass
6678 11:24:42.697744 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass
6680 11:24:42.698277 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_32 RESULT=pass>
6681 11:24:43.385748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass>
6682 11:24:43.386180 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_48 RESULT=pass
6684 11:24:44.033801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip
6686 11:24:44.034367 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_48 RESULT=skip>
6687 11:24:44.631193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip>
6688 11:24:44.631661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_48 RESULT=skip
6690 11:24:45.263335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass>
6691 11:24:45.263763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_64 RESULT=pass
6693 11:24:46.060302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass
6695 11:24:46.061120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_64 RESULT=pass>
6696 11:24:46.743673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass
6698 11:24:46.744173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Data_match_for_VL_64 RESULT=pass>
6699 11:24:47.425828 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass
6701 11:24:47.426633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_80 RESULT=pass>
6702 11:24:48.060397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip>
6703 11:24:48.060779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_80 RESULT=skip
6705 11:24:48.708187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip
6707 11:24:48.708574 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_80 RESULT=skip>
6708 11:24:49.355999 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass
6710 11:24:49.356518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_96 RESULT=pass>
6711 11:24:50.004704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip>
6712 11:24:50.005140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_96 RESULT=skip
6714 11:24:50.625200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip>
6715 11:24:50.625630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_96 RESULT=skip
6717 11:24:51.318707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass>
6718 11:24:51.319172 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_112 RESULT=pass
6720 11:24:51.967569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip>
6721 11:24:51.968001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_112 RESULT=skip
6723 11:24:52.643610 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip
6725 11:24:52.644246 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_112 RESULT=skip>
6726 11:24:53.367252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass
6728 11:24:53.367906 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_128 RESULT=pass>
6729 11:24:54.016873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=skip
6731 11:24:54.022451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_128 RESULT=skip>
6732 11:24:54.683547 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_128 RESULT=skip>
6733 11:24:54.683989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_128 RESULT=skip
6735 11:24:55.342533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass>
6736 11:24:55.342979 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_144 RESULT=pass
6738 11:24:56.017888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip
6740 11:24:56.018516 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_144 RESULT=skip>
6741 11:24:56.675383 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip
6743 11:24:56.675943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_144 RESULT=skip>
6744 11:24:57.299646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass>
6745 11:24:57.300033 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_160 RESULT=pass
6747 11:24:57.907518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip
6749 11:24:57.907919 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_160 RESULT=skip>
6750 11:24:58.620102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip
6752 11:24:58.620506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_160 RESULT=skip>
6753 11:24:59.310198 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass
6755 11:24:59.310944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_176 RESULT=pass>
6756 11:24:59.959755 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip
6758 11:24:59.960296 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_176 RESULT=skip>
6759 11:25:00.632625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip>
6760 11:25:00.633061 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_176 RESULT=skip
6762 11:25:01.258796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass
6764 11:25:01.259274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_192 RESULT=pass>
6765 11:25:01.917635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip>
6766 11:25:01.918064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_192 RESULT=skip
6768 11:25:02.555888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip
6770 11:25:02.556459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_192 RESULT=skip>
6771 11:25:03.184528 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass>
6772 11:25:03.184953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_208 RESULT=pass
6774 11:25:03.876469 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip
6776 11:25:03.876943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_208 RESULT=skip>
6777 11:25:04.591020 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip
6779 11:25:04.591715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_208 RESULT=skip>
6780 11:25:05.271011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass>
6781 11:25:05.271436 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_224 RESULT=pass
6783 11:25:05.926651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip>
6784 11:25:05.927079 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_224 RESULT=skip
6786 11:25:06.546393 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip
6788 11:25:06.546936 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_224 RESULT=skip>
6789 11:25:07.202393 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass>
6790 11:25:07.202813 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_240 RESULT=pass
6792 11:25:07.879751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip>
6793 11:25:07.880138 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_240 RESULT=skip
6795 11:25:08.634619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip>
6796 11:25:08.635027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_240 RESULT=skip
6798 11:25:09.324070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass>
6799 11:25:09.324490 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_256 RESULT=pass
6801 11:25:09.959030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=skip>
6802 11:25:09.959381 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_256 RESULT=skip
6804 11:25:10.598909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_256 RESULT=skip>
6805 11:25:10.599284 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_256 RESULT=skip
6807 11:25:11.265266 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass
6809 11:25:11.266118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Set_VL_272 RESULT=pass>
6810 11:25:12.024746 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip
6812 11:25:12.025164 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Disabled_ZA_for_VL_272 RESULT=skip>
6813 11:25:12.837757 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip
6815 11:25:12.838304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_Get_and_set_data_for_VL_272 RESULT=skip>
6816 11:25:13.494644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=pass
6818 11:25:13.495012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=pass>
6819 11:25:14.227792 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass>
6820 11:25:14.228241 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory RESULT=pass
6822 11:25:14.997809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass>
6823 11:25:14.998269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory RESULT=pass
6825 11:25:15.645444 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass
6827 11:25:15.645863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory RESULT=pass>
6828 11:25:16.575887 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass
6830 11:25:16.576651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory RESULT=pass>
6831 11:25:17.261043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
6833 11:25:17.261486 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
6834 11:25:18.017894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
6836 11:25:18.018487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
6837 11:25:18.646963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass>
6838 11:25:18.647384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory RESULT=pass
6840 11:25:19.288204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory_dup2 RESULT=pass
6842 11:25:19.288710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory_dup2 RESULT=pass>
6843 11:25:19.953165 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory_dup2 RESULT=pass
6845 11:25:19.953704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory_dup2 RESULT=pass>
6846 11:25:20.579378 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory_dup2 RESULT=pass>
6847 11:25:20.579797 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory_dup2 RESULT=pass
6849 11:25:21.257286 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass
6851 11:25:21.258064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory RESULT=pass>
6852 11:25:21.890191 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass
6854 11:25:21.890691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory RESULT=pass>
6855 11:25:22.567289 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass
6857 11:25:22.568114 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory RESULT=pass>
6858 11:25:23.213965 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=pass
6860 11:25:23.214480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory RESULT=pass>
6861 11:25:23.853169 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=pass
6863 11:25:23.853711 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory RESULT=pass>
6864 11:25:24.539527 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass>
6865 11:25:24.539945 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory RESULT=pass
6867 11:25:25.175042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
6869 11:25:25.175620 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
6870 11:25:25.815357 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
6872 11:25:25.816026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
6873 11:25:26.573163 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=fail
6875 11:25:26.573704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
6876 11:25:27.200626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
6877 11:25:27.201014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
6879 11:25:27.856673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail
6881 11:25:27.857182 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=fail>
6882 11:25:28.633653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=pass
6884 11:25:28.634086 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=pass>
6885 11:25:29.386439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=pass
6887 11:25:29.386855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=pass>
6888 11:25:30.067342 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=pass
6890 11:25:30.067977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=pass>
6891 11:25:30.935099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=pass
6893 11:25:30.935732 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=pass>
6894 11:25:31.679355 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass
6896 11:25:31.679871 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass>
6897 11:25:32.329077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass>
6898 11:25:32.329505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass
6900 11:25:33.066417 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail
6902 11:25:33.067083 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=fail>
6903 11:25:33.805638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail>
6904 11:25:33.806052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory RESULT=fail
6906 11:25:34.592806 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=pass
6908 11:25:34.605210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory RESULT=pass>
6909 11:25:35.334616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=pass
6911 11:25:35.335294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory RESULT=pass>
6912 11:25:36.053947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass
6914 11:25:36.054379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass>
6915 11:25:36.886000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass>
6916 11:25:36.886493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass
6918 11:25:37.670343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=fail
6920 11:25:37.670869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=fail>
6921 11:25:38.579064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch_Verify_that_GCR_EL1_is_set_correctly_on_context_switch RESULT=pass
6923 11:25:38.579515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch_Verify_that_GCR_EL1_is_set_correctly_on_context_switch RESULT=pass>
6924 11:25:39.542644 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=pass
6926 11:25:39.543379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=pass>
6927 11:25:40.451989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
6929 11:25:40.460278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
6930 11:25:41.200551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
6932 11:25:41.202379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
6933 11:25:42.073524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=pass>
6934 11:25:42.073868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=pass
6936 11:25:42.847171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
6938 11:25:42.847884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
6939 11:25:43.732214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=pass>
6940 11:25:43.732615 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=pass
6942 11:25:44.432028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
6943 11:25:44.432430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
6945 11:25:45.306477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass
6947 11:25:45.307146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=pass>
6948 11:25:46.235073 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
6949 11:25:46.236482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
6951 11:25:47.181927 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=pass
6953 11:25:47.182325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_memory RESULT=pass>
6954 11:25:48.012505 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_memory_dup2 RESULT=pass
6956 11:25:48.012903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_memory_dup2 RESULT=pass>
6957 11:25:48.892448 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass>
6958 11:25:48.892834 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory RESULT=pass
6960 11:25:49.620317 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory_dup2 RESULT=pass
6962 11:25:49.620766 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory_dup2 RESULT=pass>
6963 11:25:50.464120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_hugetlb_options RESULT=pass
6965 11:25:50.464860 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_hugetlb_options RESULT=pass>
6966 11:25:51.351818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options_Check_KSM_mte_page_merge_for_private_mapping_sync_mode_and_mmap_memory RESULT=pass
6968 11:25:51.353765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options_Check_KSM_mte_page_merge_for_private_mapping_sync_mode_and_mmap_memory RESULT=pass>
6969 11:25:52.170171 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options_Check_KSM_mte_page_merge_for_private_mapping_async_mode_and_mmap_memory RESULT=pass
6971 11:25:52.170847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options_Check_KSM_mte_page_merge_for_private_mapping_async_mode_and_mmap_memory RESULT=pass>
6972 11:25:53.175362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options_Check_KSM_mte_page_merge_for_shared_mapping_sync_mode_and_mmap_memory RESULT=pass>
6973 11:25:53.175765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options_Check_KSM_mte_page_merge_for_shared_mapping_sync_mode_and_mmap_memory RESULT=pass
6975 11:25:54.022978 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options_Check_KSM_mte_page_merge_for_shared_mapping_async_mode_and_mmap_memory RESULT=pass
6977 11:25:54.023690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options_Check_KSM_mte_page_merge_for_shared_mapping_async_mode_and_mmap_memory RESULT=pass>
6978 11:25:54.719036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=pass
6980 11:25:54.719509 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=pass>
6981 11:25:55.609491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
6982 11:25:55.609867 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off RESULT=pass
6984 11:25:56.500782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
6986 11:25:56.501190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
6987 11:25:57.343238 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass>
6988 11:25:57.343626 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off RESULT=pass
6990 11:25:58.304852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass>
6991 11:25:58.305209 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off RESULT=pass
6993 11:25:59.223736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=pass
6995 11:25:59.224160 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=pass>
6996 11:26:00.273567 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
6998 11:26:00.274230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
6999 11:26:01.380027 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=pass
7001 11:26:01.380598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=pass>
7002 11:26:02.288067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
7004 11:26:02.290023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
7005 11:26:03.162434 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=pass>
7006 11:26:03.162801 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=pass
7008 11:26:03.945489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
7009 11:26:03.945880 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
7011 11:26:04.676577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=pass>
7012 11:26:04.676967 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=pass
7014 11:26:05.389808 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
7016 11:26:05.390255 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
7017 11:26:06.064552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
7019 11:26:06.065389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
7020 11:26:06.706273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
7021 11:26:06.706627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
7023 11:26:07.352640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
7024 11:26:07.353068 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on RESULT=fail
7026 11:26:08.007952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
7028 11:26:08.008440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
7029 11:26:08.648955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
7030 11:26:08.649497 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
7032 11:26:09.311495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
7033 11:26:09.311914 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
7035 11:26:09.963913 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail
7037 11:26:09.964299 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on RESULT=fail>
7038 11:26:10.635628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass>
7039 11:26:10.635986 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on RESULT=pass
7041 11:26:11.299459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail>
7042 11:26:11.299886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory RESULT=fail
7044 11:26:11.965648 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=pass
7046 11:26:11.966094 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory RESULT=pass>
7047 11:26:12.606714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=fail>
7048 11:26:12.607100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=fail
7050 11:26:13.414866 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
7052 11:26:13.415613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
7053 11:26:14.128995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
7054 11:26:14.129405 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
7056 11:26:14.788379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass
7058 11:26:14.788933 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=pass>
7059 11:26:15.477605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass
7061 11:26:15.478126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=pass>
7062 11:26:16.181022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass>
7063 11:26:16.181488 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=pass
7065 11:26:16.905192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
7066 11:26:16.905630 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
7068 11:26:17.580958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=pass
7070 11:26:17.581603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode RESULT=pass>
7071 11:26:18.277610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=pass>
7072 11:26:18.278094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode RESULT=pass
7074 11:26:19.060348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass
7076 11:26:19.061078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode RESULT=pass>
7077 11:26:19.724329 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=pass
7079 11:26:19.724894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode RESULT=pass>
7080 11:26:20.380094 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=pass
7082 11:26:20.380676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=pass>
7083 11:26:21.040206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
7084 11:26:21.040611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
7086 11:26:21.800492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
7087 11:26:21.800864 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
7089 11:26:22.516396 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
7090 11:26:22.516796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
7092 11:26:23.135788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
7093 11:26:23.136182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
7095 11:26:23.832493 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
7097 11:26:23.832947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
7098 11:26:24.578271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
7099 11:26:24.578698 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
7101 11:26:25.286768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
7103 11:26:25.287508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
7104 11:26:25.941222 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
7106 11:26:25.941761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
7107 11:26:26.881623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
7108 11:26:26.882070 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
7110 11:26:27.547465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
7111 11:26:27.547886 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
7113 11:26:28.219348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
7115 11:26:28.220123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
7116 11:26:28.828072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
7117 11:26:28.828534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
7119 11:26:29.581831 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
7121 11:26:29.582512 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
7122 11:26:30.233649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
7123 11:26:30.234116 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
7125 11:26:30.898938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
7127 11:26:30.899521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
7128 11:26:31.557554 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
7129 11:26:31.557860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
7131 11:26:32.211189 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
7132 11:26:32.211569 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
7134 11:26:32.861778 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
7136 11:26:32.862360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
7137 11:26:33.515876 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
7139 11:26:33.516445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
7140 11:26:34.269704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
7142 11:26:34.270476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
7143 11:26:34.950227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
7144 11:26:34.950681 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
7146 11:26:35.750305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
7148 11:26:35.750728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
7149 11:26:36.456339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
7150 11:26:36.456759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
7152 11:26:37.227779 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
7154 11:26:37.228309 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
7155 11:26:37.870799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
7157 11:26:37.871342 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
7158 11:26:38.495552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
7159 11:26:38.495976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
7161 11:26:39.135683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
7162 11:26:39.136145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
7164 11:26:39.757396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
7166 11:26:39.757938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
7167 11:26:40.398325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
7169 11:26:40.398979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
7170 11:26:41.018109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
7171 11:26:41.018506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
7173 11:26:41.632453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
7175 11:26:41.639048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
7176 11:26:42.270478 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
7178 11:26:42.270938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
7179 11:26:42.895375 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
7180 11:26:42.895800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
7182 11:26:43.508742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
7183 11:26:43.509140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
7185 11:26:44.119561 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
7186 11:26:44.119961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
7188 11:26:44.729763 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
7190 11:26:44.730282 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
7191 11:26:45.364061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
7192 11:26:45.364489 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
7194 11:26:46.023708 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
7196 11:26:46.030728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
7197 11:26:46.697661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
7199 11:26:46.698215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
7200 11:26:47.423308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
7201 11:26:47.423709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
7203 11:26:48.181204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
7205 11:26:48.182061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
7206 11:26:48.823348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
7207 11:26:48.823738 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
7209 11:26:49.538277 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
7211 11:26:49.538904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
7212 11:26:50.178619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
7213 11:26:50.179043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
7215 11:26:50.897875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
7217 11:26:50.898490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
7218 11:26:51.569884 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
7219 11:26:51.570302 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
7221 11:26:52.215292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
7223 11:26:52.215801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
7224 11:26:52.854582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
7225 11:26:52.854981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
7227 11:26:53.481786 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
7229 11:26:53.482335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
7230 11:26:54.103917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
7231 11:26:54.104343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
7233 11:26:54.733236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
7235 11:26:54.733768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
7236 11:26:55.359573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
7237 11:26:55.359991 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
7239 11:26:55.978267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
7240 11:26:55.978709 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
7242 11:26:56.650599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
7244 11:26:56.651362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
7245 11:26:57.341932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
7246 11:26:57.342359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
7248 11:26:57.991088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
7249 11:26:57.991486 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
7251 11:26:58.616062 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass
7253 11:26:58.616487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0 RESULT=pass>
7254 11:26:59.255912 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass>
7255 11:26:59.256305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16 RESULT=pass
7257 11:26:59.883917 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass
7259 11:26:59.884333 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0 RESULT=pass>
7260 11:27:00.597808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass>
7261 11:27:00.598258 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16 RESULT=pass
7263 11:27:01.231984 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass
7265 11:27:01.232407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0 RESULT=pass>
7266 11:27:01.914403 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass
7268 11:27:01.914869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16 RESULT=pass>
7269 11:27:02.568935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass>
7270 11:27:02.569328 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0 RESULT=pass
7272 11:27:03.195873 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass>
7273 11:27:03.196267 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16 RESULT=pass
7275 11:27:03.807640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=pass
7277 11:27:03.808236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=pass>
7278 11:27:04.484272 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass
7280 11:27:04.484790 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=pass>
7281 11:27:05.131889 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass>
7282 11:27:05.132308 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=pass
7284 11:27:05.748190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass>
7285 11:27:05.748580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=pass
7287 11:27:06.507161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass
7289 11:27:06.507820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=pass>
7290 11:27:07.226955 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass
7292 11:27:07.227779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=pass>
7293 11:27:07.877783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass>
7294 11:27:07.878237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=pass
7296 11:27:08.541330 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass
7298 11:27:08.541731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=pass>
7299 11:27:09.242100 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass
7301 11:27:09.242962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=pass>
7302 11:27:09.868428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass
7304 11:27:09.868827 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=pass>
7305 11:27:10.605957 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass>
7306 11:27:10.606312 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=pass
7308 11:27:11.360875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass
7310 11:27:11.361204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=pass>
7311 11:27:12.242852 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass
7313 11:27:12.243657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=pass>
7314 11:27:12.974104 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass
7316 11:27:12.974849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=pass>
7317 11:27:13.657596 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass>
7318 11:27:13.657951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=pass
7320 11:27:14.310932 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass
7322 11:27:14.311339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=pass>
7323 11:27:14.970365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass
7325 11:27:14.976737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=pass>
7326 11:27:15.596030 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass>
7327 11:27:15.596512 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=pass
7329 11:27:16.252966 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass
7331 11:27:16.253330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=pass>
7332 11:27:16.896700 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
7333 11:27:16.897064 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
7335 11:27:17.532503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass>
7336 11:27:17.532861 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=pass
7338 11:27:18.193973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass>
7339 11:27:18.194367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=pass
7341 11:27:18.898681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass>
7342 11:27:18.899084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=pass
7344 11:27:19.630122 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass
7346 11:27:19.630541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=pass>
7347 11:27:20.285894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass>
7348 11:27:20.286321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=pass
7350 11:27:21.014054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass
7352 11:27:21.014829 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=pass>
7353 11:27:21.655201 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass
7355 11:27:21.655597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=pass>
7356 11:27:22.356860 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass
7358 11:27:22.357638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=pass>
7359 11:27:23.056405 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass>
7360 11:27:23.056854 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=pass
7362 11:27:23.859096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass
7364 11:27:23.859663 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=pass>
7365 11:27:24.512266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass>
7366 11:27:24.512705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=pass
7368 11:27:25.190402 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass
7370 11:27:25.191008 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=pass>
7371 11:27:25.899534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass
7373 11:27:25.900033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=pass>
7374 11:27:26.631939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass
7376 11:27:26.632377 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=pass>
7377 11:27:27.367091 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass>
7378 11:27:27.367491 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=pass
7380 11:27:28.024024 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass>
7381 11:27:28.024462 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=pass
7383 11:27:28.672493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass>
7384 11:27:28.672924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=pass
7386 11:27:29.329609 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass
7388 11:27:29.330206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=pass>
7389 11:27:30.309783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
7390 11:27:30.310182 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
7392 11:27:31.035234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_AES RESULT=pass
7394 11:27:31.035765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_AES RESULT=pass>
7395 11:27:31.716071 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_AES RESULT=skip>
7396 11:27:31.716470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_AES RESULT=skip
7398 11:27:32.380266 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_AES RESULT=skip>
7399 11:27:32.380640 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_AES RESULT=skip
7401 11:27:33.047975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_CRC32 RESULT=pass
7403 11:27:33.048418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_CRC32 RESULT=pass>
7404 11:27:33.730705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_CRC32 RESULT=pass
7406 11:27:33.731074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_CRC32 RESULT=pass>
7407 11:27:34.380070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_CRC32 RESULT=skip>
7408 11:27:34.380503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_CRC32 RESULT=skip
7410 11:27:35.081717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_CSSC RESULT=pass>
7411 11:27:35.082107 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_CSSC RESULT=pass
7413 11:27:35.749340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_CSSC RESULT=skip>
7414 11:27:35.749736 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_CSSC RESULT=skip
7416 11:27:36.522093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_CSSC RESULT=skip
7418 11:27:36.522666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_CSSC RESULT=skip>
7419 11:27:37.351842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8CVT RESULT=pass
7421 11:27:37.352623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8CVT RESULT=pass>
7422 11:27:38.127505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_F8CVT RESULT=skip>
7423 11:27:38.127898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_F8CVT RESULT=skip
7425 11:27:38.893013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_F8CVT RESULT=skip>
7426 11:27:38.893399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_F8CVT RESULT=skip
7428 11:27:39.761981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8DP4 RESULT=pass
7430 11:27:39.762515 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8DP4 RESULT=pass>
7431 11:27:40.545031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_F8DP4 RESULT=skip
7433 11:27:40.545598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_F8DP4 RESULT=skip>
7434 11:27:41.254971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_F8DP4 RESULT=skip>
7435 11:27:41.255368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_F8DP4 RESULT=skip
7437 11:27:41.999430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8DP2 RESULT=pass
7439 11:27:41.999845 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8DP2 RESULT=pass>
7440 11:27:42.680242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_F8DP2 RESULT=skip>
7441 11:27:42.680705 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_F8DP2 RESULT=skip
7443 11:27:43.400063 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_F8DP2 RESULT=skip
7445 11:27:43.400689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_F8DP2 RESULT=skip>
7446 11:27:44.071972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8E5M2 RESULT=pass
7448 11:27:44.072569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8E5M2 RESULT=pass>
7449 11:27:44.704142 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_F8E5M2 RESULT=skip
7451 11:27:44.704755 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_F8E5M2 RESULT=skip>
7452 11:27:45.340818 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_F8E5M2 RESULT=skip
7454 11:27:45.341340 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_F8E5M2 RESULT=skip>
7455 11:27:45.951951 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8E4M3 RESULT=pass
7457 11:27:45.952445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8E4M3 RESULT=pass>
7458 11:27:46.578194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_F8E4M3 RESULT=skip>
7459 11:27:46.578616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_F8E4M3 RESULT=skip
7461 11:27:47.199616 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_F8E4M3 RESULT=skip
7463 11:27:47.200124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_F8E4M3 RESULT=skip>
7464 11:27:47.821544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8FMA RESULT=pass
7466 11:27:47.822188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_F8FMA RESULT=pass>
7467 11:27:48.497072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_F8FMA RESULT=skip
7469 11:27:48.497524 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_F8FMA RESULT=skip>
7470 11:27:49.157785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_F8FMA RESULT=skip
7472 11:27:49.158147 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_F8FMA RESULT=skip>
7473 11:27:49.838627 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_FAMINMAX RESULT=pass>
7474 11:27:49.839051 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_FAMINMAX RESULT=pass
7476 11:27:50.476118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_FAMINMAX RESULT=skip>
7477 11:27:50.476532 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_FAMINMAX RESULT=skip
7479 11:27:51.195939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_FAMINMAX RESULT=skip
7481 11:27:51.196692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_FAMINMAX RESULT=skip>
7482 11:27:51.986419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_FP RESULT=pass>
7483 11:27:51.986839 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_FP RESULT=pass
7485 11:27:52.682093 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_FP RESULT=pass
7487 11:27:52.682657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_FP RESULT=pass>
7488 11:27:53.339675 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_FP RESULT=skip
7490 11:27:53.340257 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_FP RESULT=skip>
7491 11:27:53.985159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_FPMR RESULT=pass>
7492 11:27:53.985578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_FPMR RESULT=pass
7494 11:27:54.671694 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_FPMR RESULT=pass
7496 11:27:54.672494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_FPMR RESULT=pass>
7497 11:27:55.314485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_FPMR RESULT=skip
7499 11:27:55.315069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_FPMR RESULT=skip>
7500 11:27:55.957724 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_GCS RESULT=pass
7502 11:27:55.958329 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_GCS RESULT=pass>
7503 11:27:56.600268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_GCS RESULT=pass
7505 11:27:56.600879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_GCS RESULT=pass>
7506 11:27:57.274249 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_GCS RESULT=skip
7508 11:27:57.275001 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_GCS RESULT=skip>
7509 11:27:57.942872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_JSCVT RESULT=pass>
7510 11:27:57.943307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_JSCVT RESULT=pass
7512 11:27:58.559667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_JSCVT RESULT=pass>
7513 11:27:58.560086 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_JSCVT RESULT=pass
7515 11:27:59.182135 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_JSCVT RESULT=skip>
7516 11:27:59.182546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_JSCVT RESULT=skip
7518 11:27:59.927450 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LRCPC RESULT=pass>
7519 11:27:59.927869 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LRCPC RESULT=pass
7521 11:28:00.653461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_LRCPC RESULT=pass
7523 11:28:00.654026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_LRCPC RESULT=pass>
7524 11:28:01.348076 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_LRCPC RESULT=skip
7526 11:28:01.348868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_LRCPC RESULT=skip>
7527 11:28:02.081349 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LRCPC2 RESULT=pass
7529 11:28:02.082207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LRCPC2 RESULT=pass>
7530 11:28:02.802489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_LRCPC2 RESULT=pass>
7531 11:28:02.802900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_LRCPC2 RESULT=pass
7533 11:28:03.491417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_LRCPC2 RESULT=skip>
7534 11:28:03.491850 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_LRCPC2 RESULT=skip
7536 11:28:04.243526 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LRCPC3 RESULT=pass
7538 11:28:04.244380 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LRCPC3 RESULT=pass>
7539 11:28:05.062173 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_LRCPC3 RESULT=skip
7541 11:28:05.062681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_LRCPC3 RESULT=skip>
7542 11:28:05.784473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_LRCPC3 RESULT=skip>
7543 11:28:05.784980 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_LRCPC3 RESULT=skip
7545 11:28:06.526423 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LSE RESULT=pass
7547 11:28:06.526993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LSE RESULT=pass>
7548 11:28:07.280833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_LSE RESULT=pass
7550 11:28:07.281197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_LSE RESULT=pass>
7551 11:28:07.994355 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_LSE RESULT=skip>
7552 11:28:07.994704 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_LSE RESULT=skip
7554 11:28:08.767356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LSE2 RESULT=pass
7556 11:28:08.767774 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LSE2 RESULT=pass>
7557 11:28:09.451321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_LSE2 RESULT=pass
7559 11:28:09.451901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_LSE2 RESULT=pass>
7560 11:28:10.131110 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_LSE2 RESULT=pass>
7561 11:28:10.131543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_LSE2 RESULT=pass
7563 11:28:10.773307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LSE128 RESULT=pass>
7564 11:28:10.773734 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LSE128 RESULT=pass
7566 11:28:11.431053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_LSE128 RESULT=skip
7568 11:28:11.431825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_LSE128 RESULT=skip>
7569 11:28:12.043535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_LSE128 RESULT=skip>
7570 11:28:12.043943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_LSE128 RESULT=skip
7572 11:28:12.720436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LUT RESULT=pass>
7573 11:28:12.720790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_LUT RESULT=pass
7575 11:28:13.415338 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_LUT RESULT=skip
7577 11:28:13.415783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_LUT RESULT=skip>
7578 11:28:14.102710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_LUT RESULT=skip
7580 11:28:14.103101 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_LUT RESULT=skip>
7581 11:28:14.815236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_MOPS RESULT=pass>
7582 11:28:14.815625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_MOPS RESULT=pass
7584 11:28:15.812203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_MOPS RESULT=pass>
7585 11:28:15.813745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_MOPS RESULT=pass
7587 11:28:16.693712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_MOPS RESULT=skip
7589 11:28:16.694146 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_MOPS RESULT=skip>
7590 11:28:17.557414 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_PMULL RESULT=pass
7592 11:28:17.558034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_PMULL RESULT=pass>
7593 11:28:18.408859 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_PMULL RESULT=skip
7595 11:28:18.409780 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_PMULL RESULT=skip>
7596 11:28:19.308485 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_PMULL RESULT=skip
7598 11:28:19.309188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_PMULL RESULT=skip>
7599 11:28:20.348440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_POE RESULT=pass
7601 11:28:20.349307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_POE RESULT=pass>
7602 11:28:21.364842 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_POE RESULT=pass
7604 11:28:21.365264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_POE RESULT=pass>
7605 11:28:22.285993 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_POE RESULT=skip>
7606 11:28:22.286401 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_POE RESULT=skip
7608 11:28:23.033963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
7609 11:28:23.034364 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
7611 11:28:23.829305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass
7613 11:28:23.829716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=pass>
7614 11:28:24.607494 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_RNG RESULT=skip>
7615 11:28:24.607952 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_RNG RESULT=skip
7617 11:28:25.401109 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RPRFM RESULT=pass
7619 11:28:25.401750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RPRFM RESULT=pass>
7620 11:28:26.097592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RPRFM RESULT=skip>
7621 11:28:26.098067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RPRFM RESULT=skip
7623 11:28:26.826849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_RPRFM RESULT=skip>
7624 11:28:26.827294 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_RPRFM RESULT=skip
7626 11:28:27.648240 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SHA1 RESULT=pass
7628 11:28:27.648854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SHA1 RESULT=pass>
7629 11:28:28.371385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SHA1 RESULT=skip>
7630 11:28:28.371841 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SHA1 RESULT=skip
7632 11:28:29.103087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SHA1 RESULT=skip>
7633 11:28:29.103539 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SHA1 RESULT=skip
7635 11:28:29.847119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SHA2 RESULT=pass>
7636 11:28:29.847598 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SHA2 RESULT=pass
7638 11:28:30.681392 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SHA2 RESULT=skip>
7639 11:28:30.681802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SHA2 RESULT=skip
7641 11:28:31.516259 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SHA2 RESULT=skip
7643 11:28:31.516667 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SHA2 RESULT=skip>
7644 11:28:32.800518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SHA512 RESULT=pass
7646 11:28:32.801467 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SHA512 RESULT=pass>
7647 11:28:33.821620 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SHA512 RESULT=skip
7649 11:28:33.822423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SHA512 RESULT=skip>
7650 11:28:34.742448 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SHA512 RESULT=skip
7652 11:28:34.742870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SHA512 RESULT=skip>
7653 11:28:35.634810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
7655 11:28:35.635591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
7656 11:28:36.540048 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
7657 11:28:36.540451 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
7659 11:28:37.295321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME RESULT=skip
7661 11:28:37.295745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME RESULT=skip>
7662 11:28:37.965623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME2 RESULT=pass>
7663 11:28:37.966001 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME2 RESULT=pass
7665 11:28:38.656264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME2 RESULT=pass>
7666 11:28:38.656716 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME2 RESULT=pass
7668 11:28:39.336779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME2 RESULT=skip>
7669 11:28:39.337170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME2 RESULT=skip
7671 11:28:40.108971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_2_1 RESULT=pass
7673 11:28:40.109757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_2_1 RESULT=pass>
7674 11:28:41.141103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_2_1 RESULT=skip
7676 11:28:41.141876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_2_1 RESULT=skip>
7677 11:28:42.093961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_2_1 RESULT=skip>
7678 11:28:42.094340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_2_1 RESULT=skip
7680 11:28:43.106148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_I16I32 RESULT=pass
7682 11:28:43.106695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_I16I32 RESULT=pass>
7683 11:28:44.165231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_I16I32 RESULT=skip
7685 11:28:44.165649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_I16I32 RESULT=skip>
7686 11:28:45.153197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_I16I32 RESULT=skip
7688 11:28:45.153593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_I16I32 RESULT=skip>
7689 11:28:46.219119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_BI32I32 RESULT=pass
7691 11:28:46.219750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_BI32I32 RESULT=pass>
7692 11:28:47.252087 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_BI32I32 RESULT=skip
7694 11:28:47.252680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_BI32I32 RESULT=skip>
7695 11:28:48.324800 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_BI32I32 RESULT=skip
7697 11:28:48.325432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_BI32I32 RESULT=skip>
7698 11:28:49.348126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_B16B16 RESULT=pass
7700 11:28:49.348536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_B16B16 RESULT=pass>
7701 11:28:50.380084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_B16B16 RESULT=skip>
7702 11:28:50.380454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_B16B16 RESULT=skip
7704 11:28:51.669745 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_B16B16 RESULT=skip
7706 11:28:51.670179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_B16B16 RESULT=skip>
7707 11:28:52.705015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_F16F16 RESULT=pass
7709 11:28:52.705493 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_F16F16 RESULT=pass>
7710 11:28:53.417628 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_F16F16 RESULT=skip
7712 11:28:53.418040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_F16F16 RESULT=skip>
7713 11:28:54.143278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_F16F16 RESULT=skip>
7714 11:28:54.143673 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_F16F16 RESULT=skip
7716 11:28:54.949458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_F8F16 RESULT=pass>
7717 11:28:54.949874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_F8F16 RESULT=pass
7719 11:28:55.675665 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_F8F16 RESULT=skip
7721 11:28:55.676193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_F8F16 RESULT=skip>
7722 11:28:56.386865 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_F8F16 RESULT=skip
7724 11:28:56.387300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_F8F16 RESULT=skip>
7725 11:28:57.168347 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_F8F32 RESULT=pass
7727 11:28:57.168945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_F8F32 RESULT=pass>
7728 11:28:57.917931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_F8F32 RESULT=skip>
7729 11:28:57.918371 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_F8F32 RESULT=skip
7731 11:28:58.636520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_F8F32 RESULT=skip
7733 11:28:58.638815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_F8F32 RESULT=skip>
7734 11:28:59.627014 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_LUTV2 RESULT=pass
7736 11:28:59.627442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_LUTV2 RESULT=pass>
7737 11:29:00.641706 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_LUTV2 RESULT=skip>
7738 11:29:00.642126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_LUTV2 RESULT=skip
7740 11:29:01.650751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_LUTV2 RESULT=skip
7742 11:29:01.651590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_LUTV2 RESULT=skip>
7743 11:29:02.790525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_SF8FMA RESULT=pass
7745 11:29:02.791679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_SF8FMA RESULT=pass>
7746 11:29:03.877104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_SF8FMA RESULT=skip>
7747 11:29:03.877731 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_SF8FMA RESULT=skip
7749 11:29:04.762055 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_SF8FMA RESULT=skip>
7750 11:29:04.762475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_SF8FMA RESULT=skip
7752 11:29:05.794003 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_SF8DP2 RESULT=pass>
7753 11:29:05.794407 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_SF8DP2 RESULT=pass
7755 11:29:06.557577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_SF8DP2 RESULT=skip>
7756 11:29:06.557972 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_SF8DP2 RESULT=skip
7758 11:29:07.276438 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_SF8DP2 RESULT=skip
7760 11:29:07.281442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_SF8DP2 RESULT=skip>
7761 11:29:08.196625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_SF8DP4 RESULT=pass
7763 11:29:08.197028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME_SF8DP4 RESULT=pass>
7764 11:29:09.103787 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME_SF8DP4 RESULT=skip
7766 11:29:09.104193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME_SF8DP4 RESULT=skip>
7767 11:29:09.861851 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SME_SF8DP4 RESULT=skip>
7768 11:29:09.862225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SME_SF8DP4 RESULT=skip
7770 11:29:10.658609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
7771 11:29:10.658971 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
7773 11:29:11.463551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
7775 11:29:11.464163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
7776 11:29:12.213476 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE RESULT=skip
7778 11:29:12.214217 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE RESULT=skip>
7779 11:29:12.981269 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
7781 11:29:12.981917 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
7782 11:29:13.761664 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass>
7783 11:29:13.762077 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=pass
7785 11:29:14.535566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE_2 RESULT=skip>
7786 11:29:14.536513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE_2 RESULT=skip
7788 11:29:15.315608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2_1 RESULT=pass>
7789 11:29:15.316006 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2_1 RESULT=pass
7791 11:29:16.061502 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2_1 RESULT=skip
7793 11:29:16.061928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2_1 RESULT=skip>
7794 11:29:16.808751 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE_2_1 RESULT=skip
7796 11:29:16.809543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE_2_1 RESULT=skip>
7797 11:29:17.561475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
7799 11:29:17.561893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
7800 11:29:18.274896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip>
7801 11:29:18.275300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip
7803 11:29:19.133927 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE_AES RESULT=skip>
7804 11:29:19.134326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE_AES RESULT=skip
7806 11:29:19.952366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_B16B16 RESULT=pass
7808 11:29:19.953222 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_B16B16 RESULT=pass>
7809 11:29:20.750265 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_B16B16 RESULT=skip
7811 11:29:20.750693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_B16B16 RESULT=skip>
7812 11:29:21.506441 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_B16B16 RESULT=skip>
7813 11:29:21.506950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_B16B16 RESULT=skip
7815 11:29:22.330430 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
7817 11:29:22.330879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
7818 11:29:23.230655 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip
7820 11:29:23.231203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip>
7821 11:29:24.219974 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_PMULL RESULT=skip
7823 11:29:24.220394 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_PMULL RESULT=skip>
7824 11:29:25.126235 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
7826 11:29:25.126800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
7827 11:29:26.085231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass
7829 11:29:26.085953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=pass>
7830 11:29:27.204214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_BITPERM RESULT=skip
7832 11:29:27.204629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_BITPERM RESULT=skip>
7833 11:29:28.413651 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
7835 11:29:28.414928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
7836 11:29:29.620145 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip
7838 11:29:29.637731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip>
7839 11:29:30.719855 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_SHA3 RESULT=skip>
7840 11:29:30.720246 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_SHA3 RESULT=skip
7842 11:29:31.710000 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
7843 11:29:31.710413 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
7845 11:29:32.824456 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip
7847 11:29:32.824892 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip>
7848 11:29:33.871586 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_SM4 RESULT=skip>
7849 11:29:33.872092 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_SM4 RESULT=skip
7851 11:29:34.942139 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
7853 11:29:34.942816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
7854 11:29:35.982478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass>
7855 11:29:35.983958 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=pass
7857 11:29:37.107964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_I8MM RESULT=skip>
7858 11:29:37.108384 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_I8MM RESULT=skip
7860 11:29:38.207619 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
7862 11:29:38.208119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
7863 11:29:39.347782 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass
7865 11:29:39.349187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=pass>
7866 11:29:40.507558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_F32MM RESULT=skip
7868 11:29:40.507971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_F32MM RESULT=skip>
7869 11:29:41.728901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
7871 11:29:41.729701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
7872 11:29:42.760475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass
7874 11:29:42.761227 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=pass>
7875 11:29:43.783970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_F64MM RESULT=skip
7877 11:29:43.784646 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_F64MM RESULT=skip>
7878 11:29:44.780876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
7879 11:29:44.781262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
7881 11:29:45.623642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass>
7882 11:29:45.624046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=pass
7884 11:29:46.595148 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_BF16 RESULT=skip
7886 11:29:46.596280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_BF16 RESULT=skip>
7887 11:29:47.548079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
7888 11:29:47.548470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
7890 11:29:48.476321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
7892 11:29:48.476733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
7893 11:29:49.368052 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_EBF16 RESULT=skip
7895 11:29:49.368464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_SVE2_EBF16 RESULT=skip>
7896 11:29:50.326374 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_HBC RESULT=pass
7898 11:29:50.326808 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_HBC RESULT=pass>
7899 11:29:51.237119 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_HBC RESULT=pass
7901 11:29:51.237535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_HBC RESULT=pass>
7902 11:29:52.111739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigbus_HBC RESULT=skip>
7903 11:29:52.112125 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigbus_HBC RESULT=skip
7905 11:29:53.012023 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
7907 11:29:53.013968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
7908 11:29:53.968224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
7910 11:29:53.968691 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
7911 11:29:54.899790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
7913 11:29:54.900533 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
7914 11:29:55.849627 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
7916 11:29:55.850756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
7917 11:29:56.791976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
7919 11:29:56.792384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
7920 11:29:57.562048 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
7922 11:29:57.562742 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
7923 11:29:58.498053 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
7925 11:29:58.498475 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
7926 11:29:59.550683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
7928 11:29:59.551404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
7929 11:30:00.667352 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_NT_ARM_HW_WATCH RESULT=pass
7931 11:30:00.667972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_NT_ARM_HW_WATCH RESULT=pass>
7932 11:30:01.682758 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_NT_ARM_HW_WATCH_arch_set RESULT=pass
7934 11:30:01.683854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_NT_ARM_HW_WATCH_arch_set RESULT=pass>
7935 11:30:02.682291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_NT_ARM_HW_BREAK RESULT=pass>
7936 11:30:02.682699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_NT_ARM_HW_BREAK RESULT=pass
7938 11:30:03.700220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_NT_ARM_HW_BREAK_arch_set RESULT=pass
7940 11:30:03.701821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_NT_ARM_HW_BREAK_arch_set RESULT=pass>
7941 11:30:04.767197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
7943 11:30:04.768616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
7944 11:30:05.735083 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
7946 11:30:05.735703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
7947 11:30:06.765796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass
7949 11:30:06.766580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64 RESULT=pass>
7950 11:30:07.793785 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
7952 11:30:07.794573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
7953 11:30:08.779711 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass
7955 11:30:08.781250 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM RESULT=pass>
7956 11:30:09.716033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
7957 11:30:09.716525 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA RESULT=pass
7959 11:30:10.774874 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
7961 11:30:10.775452 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
7962 11:30:12.165914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass>
7963 11:30:12.166326 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM RESULT=pass
7965 11:30:13.187975 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass
7967 11:30:13.188651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
7968 11:30:14.317166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
7969 11:30:14.318872 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
7971 11:30:15.456431 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass
7973 11:30:15.457737 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM RESULT=pass>
7974 11:30:16.672475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass
7976 11:30:16.673816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
7977 11:30:17.665432 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass
7979 11:30:17.666052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32 RESULT=pass>
7980 11:30:18.662685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
7982 11:30:18.663397 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
7983 11:30:19.604285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass>
7984 11:30:19.604685 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM RESULT=pass
7986 11:30:20.435793 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass
7988 11:30:20.436218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
7989 11:30:21.367359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
7990 11:30:21.367769 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
7992 11:30:22.312578 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass
7994 11:30:22.313005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM RESULT=pass>
7995 11:30:23.274992 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass
7997 11:30:23.275398 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
7998 11:30:24.220019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
8000 11:30:24.220692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
8001 11:30:25.119897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass>
8002 11:30:25.120255 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM RESULT=pass
8004 11:30:26.027410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
8005 11:30:26.027814 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA RESULT=pass
8007 11:30:26.969194 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass>
8008 11:30:26.969596 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16 RESULT=pass
8010 11:30:27.987208 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
8012 11:30:27.987618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
8013 11:30:29.067366 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass>
8014 11:30:29.067868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM RESULT=pass
8016 11:30:30.003248 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
8017 11:30:30.004310 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA RESULT=pass
8019 11:30:30.998472 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
8020 11:30:30.999989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
8022 11:30:32.011676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass
8024 11:30:32.012301 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM RESULT=pass>
8025 11:30:32.987520 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
8026 11:30:32.988200 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA RESULT=pass
8028 11:30:33.964678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
8030 11:30:33.965089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
8031 11:30:34.911544 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass
8033 11:30:34.911953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM RESULT=pass>
8034 11:30:35.882845 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass
8036 11:30:35.883573 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
8037 11:30:36.843668 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_64_SM_ZA RESULT=pass
8039 11:30:36.844426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_64_SM_ZA RESULT=pass>
8040 11:30:38.007387 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_64_SM RESULT=pass
8042 11:30:38.007798 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_64_SM RESULT=pass>
8043 11:30:39.003464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_64_ZA RESULT=pass>
8044 11:30:39.004282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_64_ZA RESULT=pass
8046 11:30:40.099707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_32_SM_ZA RESULT=pass>
8047 11:30:40.100394 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_32_SM_ZA RESULT=pass
8049 11:30:41.089977 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_32_SM RESULT=pass>
8050 11:30:41.090375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_32_SM RESULT=pass
8052 11:30:42.112614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_32_ZA RESULT=pass>
8053 11:30:42.114380 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_32_ZA RESULT=pass
8055 11:30:43.255440 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_16_SM_ZA RESULT=pass
8057 11:30:43.256115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_16_SM_ZA RESULT=pass>
8058 11:30:44.322541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_16_SM RESULT=pass>
8059 11:30:44.323404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_16_SM RESULT=pass
8061 11:30:45.438339 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_16_ZA RESULT=pass
8063 11:30:45.438748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_SME_VL_16_ZA RESULT=pass>
8064 11:30:46.534949 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
8066 11:30:46.536251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
8067 11:30:47.518209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass>
8068 11:30:47.518600 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64 RESULT=pass
8070 11:30:48.451508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass
8072 11:30:48.453521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA RESULT=pass>
8073 11:30:49.396712 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass>
8074 11:30:49.397743 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM RESULT=pass
8076 11:30:50.408235 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass>
8077 11:30:50.408638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA RESULT=pass
8079 11:30:51.450228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass>
8080 11:30:51.450638 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA RESULT=pass
8082 11:30:52.420103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass
8084 11:30:52.420621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM RESULT=pass>
8085 11:30:53.534728 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass
8087 11:30:53.536756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA RESULT=pass>
8088 11:30:54.600784 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass
8090 11:30:54.601435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA RESULT=pass>
8091 11:30:55.697451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass>
8092 11:30:55.697868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM RESULT=pass
8094 11:30:56.804912 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass
8096 11:30:56.805735 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA RESULT=pass>
8097 11:30:57.776944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass>
8098 11:30:57.777358 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32 RESULT=pass
8100 11:30:58.739513 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass
8102 11:30:58.741259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA RESULT=pass>
8103 11:30:59.700676 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass
8105 11:30:59.701099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM RESULT=pass>
8106 11:31:00.886106 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass
8108 11:31:00.887351 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA RESULT=pass>
8109 11:31:02.074187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass
8111 11:31:02.074659 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA RESULT=pass>
8112 11:31:03.155483 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass
8114 11:31:03.156183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM RESULT=pass>
8115 11:31:04.183725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass
8117 11:31:04.185698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA RESULT=pass>
8118 11:31:05.211802 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass
8120 11:31:05.212212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA RESULT=pass>
8121 11:31:06.199768 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass>
8122 11:31:06.200158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM RESULT=pass
8124 11:31:07.198082 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass
8126 11:31:07.198797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA RESULT=pass>
8127 11:31:08.173580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass
8129 11:31:08.174352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16 RESULT=pass>
8130 11:31:09.037437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass>
8131 11:31:09.037830 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA RESULT=pass
8133 11:31:10.040995 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass
8135 11:31:10.042598 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM RESULT=pass>
8136 11:31:10.928337 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass>
8137 11:31:10.928805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA RESULT=pass
8139 11:31:12.047891 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass
8141 11:31:12.048861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA RESULT=pass>
8142 11:31:13.026833 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass
8144 11:31:13.027237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM RESULT=pass>
8145 11:31:14.007961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass
8147 11:31:14.009259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA RESULT=pass>
8148 11:31:14.948089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass>
8149 11:31:14.948475 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA RESULT=pass
8151 11:31:15.977428 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass
8153 11:31:15.978064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM RESULT=pass>
8154 11:31:16.944406 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass>
8155 11:31:16.944809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA RESULT=pass
8157 11:31:17.850995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_64_SM_ZA RESULT=pass>
8158 11:31:17.851373 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_64_SM_ZA RESULT=pass
8160 11:31:18.546768 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_64_SM RESULT=pass
8162 11:31:18.547166 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_64_SM RESULT=pass>
8163 11:31:19.212844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_64_ZA RESULT=pass
8165 11:31:19.213996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_64_ZA RESULT=pass>
8166 11:31:20.150134 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_32_SM_ZA RESULT=pass
8168 11:31:20.150530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_32_SM_ZA RESULT=pass>
8169 11:31:21.066298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_32_SM RESULT=pass
8171 11:31:21.066704 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_32_SM RESULT=pass>
8172 11:31:22.005918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_32_ZA RESULT=pass>
8173 11:31:22.006320 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_32_ZA RESULT=pass
8175 11:31:22.933960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_16_SM_ZA RESULT=pass>
8176 11:31:22.934362 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_16_SM_ZA RESULT=pass
8178 11:31:23.987265 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_16_SM RESULT=pass>
8179 11:31:23.987654 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_16_SM RESULT=pass
8181 11:31:24.851313 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_16_ZA RESULT=pass>
8182 11:31:24.851722 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_SME_VL_16_ZA RESULT=pass
8184 11:31:25.686307 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
8186 11:31:25.693890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
8187 11:31:26.482065 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass>
8188 11:31:26.482461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_default_value RESULT=pass
8190 11:31:27.427252 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass
8192 11:31:27.427955 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_read RESULT=pass>
8193 11:31:28.394484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass
8195 11:31:28.395205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_sleep_read RESULT=pass>
8196 11:31:29.280810 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass
8198 11:31:29.281228 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_fork_read RESULT=pass>
8199 11:31:30.091899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass
8201 11:31:30.092437 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_write_clone_read RESULT=pass>
8202 11:31:31.058484 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
8204 11:31:31.058914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
8205 11:31:32.182205 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_basic-gcs RESULT=skip>
8206 11:31:32.182602 Received signal: <TESTCASE> TEST_CASE_ID=arm64_basic-gcs RESULT=skip
8208 11:31:33.165796 Received signal: <TESTCASE> TEST_CASE_ID=arm64_libc-gcs RESULT=skip
8210 11:31:33.166237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_libc-gcs RESULT=skip>
8211 11:31:34.141343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_gcs-locking RESULT=skip>
8212 11:31:34.141759 Received signal: <TESTCASE> TEST_CASE_ID=arm64_gcs-locking RESULT=skip
8214 11:31:35.026379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_gcs-stress RESULT=skip
8216 11:31:35.027004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_gcs-stress RESULT=skip>
8217 11:31:35.945796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_gcspushm RESULT=skip>
8218 11:31:35.946213 Received signal: <TESTCASE> TEST_CASE_ID=arm64_gcspushm RESULT=skip
8220 11:31:37.015010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_gcsstr RESULT=skip
8222 11:31:37.015684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_gcsstr RESULT=skip>
8223 11:31:37.083355 + set +x
8224 11:31:37.085516 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64_fvp 913179_1.1.3.5>
8225 11:31:37.085791 Received signal: <ENDRUN> 1_kselftest-arm64_fvp 913179_1.1.3.5
8226 11:31:37.085915 Ending use of test pattern.
8227 11:31:37.086002 Ending test lava.1_kselftest-arm64_fvp (913179_1.1.3.5), duration 2107.50
8229 11:31:37.197375 ok: lava_test_shell seems to have completed
8230 11:31:37.208097 arm64_basic-gcs: skip
arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: pass
arm64_btitest_bti_c_func_call_using_br_x0: pass
arm64_btitest_bti_c_func_call_using_br_x16: pass
arm64_btitest_bti_j_func_call_using_blr: pass
arm64_btitest_bti_j_func_call_using_br_x0: pass
arm64_btitest_bti_j_func_call_using_br_x16: pass
arm64_btitest_bti_jc_func_call_using_blr: pass
arm64_btitest_bti_jc_func_call_using_br_x0: pass
arm64_btitest_bti_jc_func_call_using_br_x16: pass
arm64_btitest_bti_none_func_call_using_blr: pass
arm64_btitest_bti_none_func_call_using_br_x0: pass
arm64_btitest_bti_none_func_call_using_br_x16: pass
arm64_btitest_nohint_func_call_using_blr: pass
arm64_btitest_nohint_func_call_using_br_x0: pass
arm64_btitest_nohint_func_call_using_br_x16: pass
arm64_btitest_paciasp_func_call_using_blr: pass
arm64_btitest_paciasp_func_call_using_br_x0: pass
arm64_btitest_paciasp_func_call_using_br_x16: pass
arm64_check_buffer_fill: fail
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_async_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_correctness_by_byte_with_sync_err_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_correctness_by_block_with_tag_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_overflow_by_byte_with_tag_fault_ignore_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_async_mode_and_mmap_memory_dup2: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_sync_mode_and_mmap_memory_dup2: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory: pass
arm64_check_buffer_fill_Check_buffer_write_underflow_by_byte_with_tag_check_fault_ignore_and_mmap_memory_dup2: pass
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_initial_tags_with_private_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_buffer_fill_Check_initial_tags_with_shared_mapping_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory: fail
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_imprecise_mode_and_mmap_memory: pass
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_memory: pass
arm64_check_child_memory_Check_child_anonymous_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: pass
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_memory: pass
arm64_check_child_memory_Check_child_anonymous_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_imprecise_mode_and_mmap_memory: pass
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: pass
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_imprecise_mode_and_mmap_memory: pass
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_memory: fail
arm64_check_child_memory_Check_child_file_memory_with_shared_mapping_precise_mode_and_mmap_mprotect_memory: pass
arm64_check_gcr_el1_cswitch: pass
arm64_check_gcr_el1_cswitch_Verify_that_GCR_EL1_is_set_correctly_on_context_switch: pass
arm64_check_hugetlb_options: pass
arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_memory: pass
arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_memory_dup2: pass
arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory: pass
arm64_check_hugetlb_options_Check_child_hugetlb_memory_with_private_mapping_precise_mode_and_mmap_mprotect_memory_dup2: pass
arm64_check_hugetlb_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_hugetlb_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: pass
arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: pass
arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: pass
arm64_check_hugetlb_options_Check_hugetlb_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_ksm_options: pass
arm64_check_ksm_options_Check_KSM_mte_page_merge_for_private_mapping_async_mode_and_mmap_memory: pass
arm64_check_ksm_options_Check_KSM_mte_page_merge_for_private_mapping_sync_mode_and_mmap_memory: pass
arm64_check_ksm_options_Check_KSM_mte_page_merge_for_shared_mapping_async_mode_and_mmap_memory: pass
arm64_check_ksm_options_Check_KSM_mte_page_merge_for_shared_mapping_sync_mode_and_mmap_memory: pass
arm64_check_mmap_options: fail
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_no_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_anonymous_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_anonymous_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_and_sync_error_mode_and_mmap_mprotect_memory: pass
arm64_check_mmap_options_Check_clear_PROT_MTE_flags_with_private_mapping_sync_error_mode_and_mmap_memory: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_no_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_off: pass
arm64_check_mmap_options_Check_file_memory_with_private_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_async_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_memory_and_tag_check_on: fail
arm64_check_mmap_options_Check_file_memory_with_shared_mapping_sync_error_mode_mmap_mprotect_memory_and_tag_check_on: pass
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: pass
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: pass
arm64_check_prctl_SYNC_ASYNC: pass
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: pass
arm64_check_tags_inclusion_Check_all_included_tags_value_with_sync_mode: pass
arm64_check_tags_inclusion_Check_an_included_tag_value_with_sync_mode: pass
arm64_check_tags_inclusion_Check_different_included_tags_value_with_sync_mode: pass
arm64_check_tags_inclusion_Check_none_included_tags_value_with_sync_mode: pass
arm64_check_user_mem: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_read_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_readv_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_write_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_ASYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_PRIVATE_tag_len_16_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_0_tag_offset_16: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_0: pass
arm64_check_user_mem_test_type_writev_MTE_SYNC_ERR_MAP_SHARED_tag_len_16_tag_offset_16: pass
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: pass
arm64_fake_sigreturn_sve_change_vl: pass
arm64_fp-ptrace: pass
arm64_fp-ptrace_FPSIMD_write_SVE_16-_16_SME_64_0-_64_0: pass
arm64_fp-ptrace_FPSIMD_write_SVE_16-_64_SME_64_0-_64_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_16_SME_64_0-_64_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_0: pass
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_16_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_0-_64_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_1: pass
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_16_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_1-_64_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_2: pass
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_16_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_2-_64_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_16_3: pass
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_16_3-_64_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_16_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_0: pass
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_0_dup2: pass
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_0-_64_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_16_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_1: pass
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_1-_64_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_16_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_2: pass
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_2-_64_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_16_3: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_0: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_1: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_2: skip
arm64_fp-ptrace_FPSIMD_write_SVE_64-_64_SME_64_3-_64_3: pass
arm64_fp-ptrace_No_writes_SVE_16-_16_SME_64_0-_64_0: pass
arm64_fp-ptrace_No_writes_SVE_16-_64_SME_64_0-_64_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_16_SME_64_0-_64_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_0: pass
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_16_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_0-_64_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_1: pass
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_16_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_1-_64_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_2: pass
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_16_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_2-_64_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_16_3: pass
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_16_3-_64_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_16_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_0: pass
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_0_dup2: pass
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_0-_64_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_16_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_1: pass
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_1-_64_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_16_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_2: pass
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_2-_64_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_16_3: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_0: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_1: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_2: skip
arm64_fp-ptrace_No_writes_SVE_64-_64_SME_64_3-_64_3: pass
arm64_fp-ptrace_SVE_write_SVE_16-_16_SME_64_0-_64_0: pass
arm64_fp-ptrace_SVE_write_SVE_16-_64_SME_64_0-_64_0: pass
arm64_fp-ptrace_SVE_write_SVE_64-_16_SME_64_0-_64_0: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_0: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_1: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_16_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_1: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_0-_64_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_0: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_1: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_16_3: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_1: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_1-_64_3: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_1: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_2: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_16_3: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_1: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_2-_64_3: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_1: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_2: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_16_3: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_1: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_16_3-_64_3: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_1: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_16_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_0: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_0_dup2: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_1: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_0-_64_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_1: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_16_3: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_0: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_1: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_1-_64_3: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_1: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_16_3: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_1: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_2: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_2-_64_3: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_1: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_2: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_16_3: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_0: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_1: skip
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_2: pass
arm64_fp-ptrace_SVE_write_SVE_64-_64_SME_64_3-_64_3: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_0: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_16_2: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_0: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_0-_64_2: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_0: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_1: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_2: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_16_3: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_0: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_2: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_1-_64_3: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_0: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_2: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_16_3: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_0: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_2: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_2-_64_3: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_0: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_1: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_2: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_16_3: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_0: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_2: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_16_3-_64_3: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_0: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_16_2: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_0: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_0-_64_2: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_0: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_2: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_16_3: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_0: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_1: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_2: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_1-_64_3: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_0: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_2: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_16_3: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_0: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_2: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_2-_64_3: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_0: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_1: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_2: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_16_3: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_0: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_1: pass
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_2: skip
arm64_fp-ptrace_ZA_write_SVE_64-_64_SME_64_3-_64_3: pass
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_FPSIMD-1-0: pass
arm64_fp-stress_FPSIMD-2-0: pass
arm64_fp-stress_FPSIMD-3-0: pass
arm64_fp-stress_FPSIMD-4-0: pass
arm64_fp-stress_FPSIMD-5-0: pass
arm64_fp-stress_FPSIMD-6-0: pass
arm64_fp-stress_FPSIMD-7-0: pass
arm64_fp-stress_KERNEL-0-0: pass
arm64_fp-stress_KERNEL-1-0: pass
arm64_fp-stress_KERNEL-2-0: pass
arm64_fp-stress_KERNEL-3-0: pass
arm64_fp-stress_KERNEL-4-0: pass
arm64_fp-stress_KERNEL-5-0: pass
arm64_fp-stress_KERNEL-6-0: pass
arm64_fp-stress_KERNEL-7-0: pass
arm64_fp-stress_SSVE-VL-16-0: pass
arm64_fp-stress_SSVE-VL-16-1: pass
arm64_fp-stress_SSVE-VL-16-2: pass
arm64_fp-stress_SSVE-VL-16-3: pass
arm64_fp-stress_SSVE-VL-16-4: pass
arm64_fp-stress_SSVE-VL-16-5: pass
arm64_fp-stress_SSVE-VL-16-6: pass
arm64_fp-stress_SSVE-VL-16-7: pass
arm64_fp-stress_SSVE-VL-32-0: pass
arm64_fp-stress_SSVE-VL-32-1: pass
arm64_fp-stress_SSVE-VL-32-2: pass
arm64_fp-stress_SSVE-VL-32-3: pass
arm64_fp-stress_SSVE-VL-32-4: pass
arm64_fp-stress_SSVE-VL-32-5: pass
arm64_fp-stress_SSVE-VL-32-6: pass
arm64_fp-stress_SSVE-VL-32-7: pass
arm64_fp-stress_SSVE-VL-64-0: pass
arm64_fp-stress_SSVE-VL-64-1: pass
arm64_fp-stress_SSVE-VL-64-2: pass
arm64_fp-stress_SSVE-VL-64-3: pass
arm64_fp-stress_SSVE-VL-64-4: pass
arm64_fp-stress_SSVE-VL-64-5: pass
arm64_fp-stress_SSVE-VL-64-6: pass
arm64_fp-stress_SSVE-VL-64-7: pass
arm64_fp-stress_SVE-VL-16-0: pass
arm64_fp-stress_SVE-VL-16-1: pass
arm64_fp-stress_SVE-VL-16-2: pass
arm64_fp-stress_SVE-VL-16-3: pass
arm64_fp-stress_SVE-VL-16-4: pass
arm64_fp-stress_SVE-VL-16-5: pass
arm64_fp-stress_SVE-VL-16-6: pass
arm64_fp-stress_SVE-VL-16-7: pass
arm64_fp-stress_SVE-VL-32-0: pass
arm64_fp-stress_SVE-VL-32-1: pass
arm64_fp-stress_SVE-VL-32-2: pass
arm64_fp-stress_SVE-VL-32-3: pass
arm64_fp-stress_SVE-VL-32-4: pass
arm64_fp-stress_SVE-VL-32-5: pass
arm64_fp-stress_SVE-VL-32-6: pass
arm64_fp-stress_SVE-VL-32-7: pass
arm64_fp-stress_SVE-VL-64-0: pass
arm64_fp-stress_SVE-VL-64-1: pass
arm64_fp-stress_SVE-VL-64-2: pass
arm64_fp-stress_SVE-VL-64-3: pass
arm64_fp-stress_SVE-VL-64-4: pass
arm64_fp-stress_SVE-VL-64-5: pass
arm64_fp-stress_SVE-VL-64-6: pass
arm64_fp-stress_SVE-VL-64-7: pass
arm64_fp-stress_ZA-VL-16-0: pass
arm64_fp-stress_ZA-VL-16-1: pass
arm64_fp-stress_ZA-VL-16-2: pass
arm64_fp-stress_ZA-VL-16-3: pass
arm64_fp-stress_ZA-VL-16-4: pass
arm64_fp-stress_ZA-VL-16-5: pass
arm64_fp-stress_ZA-VL-16-6: pass
arm64_fp-stress_ZA-VL-16-7: pass
arm64_fp-stress_ZA-VL-32-0: pass
arm64_fp-stress_ZA-VL-32-1: pass
arm64_fp-stress_ZA-VL-32-2: pass
arm64_fp-stress_ZA-VL-32-3: pass
arm64_fp-stress_ZA-VL-32-4: pass
arm64_fp-stress_ZA-VL-32-5: pass
arm64_fp-stress_ZA-VL-32-6: pass
arm64_fp-stress_ZA-VL-32-7: pass
arm64_fp-stress_ZA-VL-64-0: pass
arm64_fp-stress_ZA-VL-64-1: pass
arm64_fp-stress_ZA-VL-64-2: pass
arm64_fp-stress_ZA-VL-64-3: pass
arm64_fp-stress_ZA-VL-64-4: pass
arm64_fp-stress_ZA-VL-64-5: pass
arm64_fp-stress_ZA-VL-64-6: pass
arm64_fp-stress_ZA-VL-64-7: pass
arm64_fpmr_siginfo: pass
arm64_gcs-locking: skip
arm64_gcs-stress: skip
arm64_gcs_exception_fault: skip
arm64_gcs_frame: skip
arm64_gcs_write_fault: skip
arm64_gcspushm: skip
arm64_gcsstr: skip
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_AES: pass
arm64_hwcap_cpuinfo_match_CRC32: pass
arm64_hwcap_cpuinfo_match_CSSC: pass
arm64_hwcap_cpuinfo_match_F8CVT: pass
arm64_hwcap_cpuinfo_match_F8DP2: pass
arm64_hwcap_cpuinfo_match_F8DP4: pass
arm64_hwcap_cpuinfo_match_F8E4M3: pass
arm64_hwcap_cpuinfo_match_F8E5M2: pass
arm64_hwcap_cpuinfo_match_F8FMA: pass
arm64_hwcap_cpuinfo_match_FAMINMAX: pass
arm64_hwcap_cpuinfo_match_FP: pass
arm64_hwcap_cpuinfo_match_FPMR: pass
arm64_hwcap_cpuinfo_match_GCS: pass
arm64_hwcap_cpuinfo_match_HBC: pass
arm64_hwcap_cpuinfo_match_JSCVT: pass
arm64_hwcap_cpuinfo_match_LRCPC: pass
arm64_hwcap_cpuinfo_match_LRCPC2: pass
arm64_hwcap_cpuinfo_match_LRCPC3: pass
arm64_hwcap_cpuinfo_match_LSE: pass
arm64_hwcap_cpuinfo_match_LSE128: pass
arm64_hwcap_cpuinfo_match_LSE2: pass
arm64_hwcap_cpuinfo_match_LUT: pass
arm64_hwcap_cpuinfo_match_MOPS: pass
arm64_hwcap_cpuinfo_match_PMULL: pass
arm64_hwcap_cpuinfo_match_POE: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_RPRFM: pass
arm64_hwcap_cpuinfo_match_SHA1: pass
arm64_hwcap_cpuinfo_match_SHA2: pass
arm64_hwcap_cpuinfo_match_SHA512: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SME2: pass
arm64_hwcap_cpuinfo_match_SME_2_1: pass
arm64_hwcap_cpuinfo_match_SME_B16B16: pass
arm64_hwcap_cpuinfo_match_SME_BI32I32: pass
arm64_hwcap_cpuinfo_match_SME_F16F16: pass
arm64_hwcap_cpuinfo_match_SME_F8F16: pass
arm64_hwcap_cpuinfo_match_SME_F8F32: pass
arm64_hwcap_cpuinfo_match_SME_I16I32: pass
arm64_hwcap_cpuinfo_match_SME_LUTV2: pass
arm64_hwcap_cpuinfo_match_SME_SF8DP2: pass
arm64_hwcap_cpuinfo_match_SME_SF8DP4: pass
arm64_hwcap_cpuinfo_match_SME_SF8FMA: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_B16B16: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_2_1: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigbus_AES: skip
arm64_hwcap_sigbus_CRC32: skip
arm64_hwcap_sigbus_CSSC: skip
arm64_hwcap_sigbus_F8CVT: skip
arm64_hwcap_sigbus_F8DP2: skip
arm64_hwcap_sigbus_F8DP4: skip
arm64_hwcap_sigbus_F8E4M3: skip
arm64_hwcap_sigbus_F8E5M2: skip
arm64_hwcap_sigbus_F8FMA: skip
arm64_hwcap_sigbus_FAMINMAX: skip
arm64_hwcap_sigbus_FP: skip
arm64_hwcap_sigbus_FPMR: skip
arm64_hwcap_sigbus_GCS: skip
arm64_hwcap_sigbus_HBC: skip
arm64_hwcap_sigbus_JSCVT: skip
arm64_hwcap_sigbus_LRCPC: skip
arm64_hwcap_sigbus_LRCPC2: skip
arm64_hwcap_sigbus_LRCPC3: skip
arm64_hwcap_sigbus_LSE: skip
arm64_hwcap_sigbus_LSE128: skip
arm64_hwcap_sigbus_LSE2: pass
arm64_hwcap_sigbus_LUT: skip
arm64_hwcap_sigbus_MOPS: skip
arm64_hwcap_sigbus_PMULL: skip
arm64_hwcap_sigbus_POE: skip
arm64_hwcap_sigbus_RNG: skip
arm64_hwcap_sigbus_RPRFM: skip
arm64_hwcap_sigbus_SHA1: skip
arm64_hwcap_sigbus_SHA2: skip
arm64_hwcap_sigbus_SHA512: skip
arm64_hwcap_sigbus_SME: skip
arm64_hwcap_sigbus_SME2: skip
arm64_hwcap_sigbus_SME_2_1: skip
arm64_hwcap_sigbus_SME_B16B16: skip
arm64_hwcap_sigbus_SME_BI32I32: skip
arm64_hwcap_sigbus_SME_F16F16: skip
arm64_hwcap_sigbus_SME_F8F16: skip
arm64_hwcap_sigbus_SME_F8F32: skip
arm64_hwcap_sigbus_SME_I16I32: skip
arm64_hwcap_sigbus_SME_LUTV2: skip
arm64_hwcap_sigbus_SME_SF8DP2: skip
arm64_hwcap_sigbus_SME_SF8DP4: skip
arm64_hwcap_sigbus_SME_SF8FMA: skip
arm64_hwcap_sigbus_SVE: skip
arm64_hwcap_sigbus_SVE2_B16B16: skip
arm64_hwcap_sigbus_SVE2_BF16: skip
arm64_hwcap_sigbus_SVE2_BITPERM: skip
arm64_hwcap_sigbus_SVE2_EBF16: skip
arm64_hwcap_sigbus_SVE2_F32MM: skip
arm64_hwcap_sigbus_SVE2_F64MM: skip
arm64_hwcap_sigbus_SVE2_I8MM: skip
arm64_hwcap_sigbus_SVE2_PMULL: skip
arm64_hwcap_sigbus_SVE2_SHA3: skip
arm64_hwcap_sigbus_SVE2_SM4: skip
arm64_hwcap_sigbus_SVE_2: skip
arm64_hwcap_sigbus_SVE_2_1: skip
arm64_hwcap_sigbus_SVE_AES: skip
arm64_hwcap_sigill_AES: skip
arm64_hwcap_sigill_CRC32: pass
arm64_hwcap_sigill_CSSC: skip
arm64_hwcap_sigill_F8CVT: skip
arm64_hwcap_sigill_F8DP2: skip
arm64_hwcap_sigill_F8DP4: skip
arm64_hwcap_sigill_F8E4M3: skip
arm64_hwcap_sigill_F8E5M2: skip
arm64_hwcap_sigill_F8FMA: skip
arm64_hwcap_sigill_FAMINMAX: skip
arm64_hwcap_sigill_FP: pass
arm64_hwcap_sigill_FPMR: pass
arm64_hwcap_sigill_GCS: pass
arm64_hwcap_sigill_HBC: pass
arm64_hwcap_sigill_JSCVT: pass
arm64_hwcap_sigill_LRCPC: pass
arm64_hwcap_sigill_LRCPC2: pass
arm64_hwcap_sigill_LRCPC3: skip
arm64_hwcap_sigill_LSE: pass
arm64_hwcap_sigill_LSE128: skip
arm64_hwcap_sigill_LSE2: pass
arm64_hwcap_sigill_LUT: skip
arm64_hwcap_sigill_MOPS: pass
arm64_hwcap_sigill_PMULL: skip
arm64_hwcap_sigill_POE: pass
arm64_hwcap_sigill_RNG: pass
arm64_hwcap_sigill_RPRFM: skip
arm64_hwcap_sigill_SHA1: skip
arm64_hwcap_sigill_SHA2: skip
arm64_hwcap_sigill_SHA512: skip
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SME2: pass
arm64_hwcap_sigill_SME_2_1: skip
arm64_hwcap_sigill_SME_B16B16: skip
arm64_hwcap_sigill_SME_BI32I32: skip
arm64_hwcap_sigill_SME_F16F16: skip
arm64_hwcap_sigill_SME_F8F16: skip
arm64_hwcap_sigill_SME_F8F32: skip
arm64_hwcap_sigill_SME_I16I32: skip
arm64_hwcap_sigill_SME_LUTV2: skip
arm64_hwcap_sigill_SME_SF8DP2: skip
arm64_hwcap_sigill_SME_SF8DP4: skip
arm64_hwcap_sigill_SME_SF8FMA: skip
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_B16B16: skip
arm64_hwcap_sigill_SVE2_BF16: pass
arm64_hwcap_sigill_SVE2_BITPERM: pass
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: pass
arm64_hwcap_sigill_SVE2_F64MM: pass
arm64_hwcap_sigill_SVE2_I8MM: pass
arm64_hwcap_sigill_SVE2_PMULL: skip
arm64_hwcap_sigill_SVE2_SHA3: skip
arm64_hwcap_sigill_SVE2_SM4: skip
arm64_hwcap_sigill_SVE_2: pass
arm64_hwcap_sigill_SVE_2_1: skip
arm64_hwcap_sigill_SVE_AES: skip
arm64_libc-gcs: skip
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: pass
arm64_nobtitest_bti_c_func_call_using_br_x0: pass
arm64_nobtitest_bti_c_func_call_using_br_x16: pass
arm64_nobtitest_bti_j_func_call_using_blr: pass
arm64_nobtitest_bti_j_func_call_using_br_x0: pass
arm64_nobtitest_bti_j_func_call_using_br_x16: pass
arm64_nobtitest_bti_jc_func_call_using_blr: pass
arm64_nobtitest_bti_jc_func_call_using_br_x0: pass
arm64_nobtitest_bti_jc_func_call_using_br_x16: pass
arm64_nobtitest_bti_none_func_call_using_blr: pass
arm64_nobtitest_bti_none_func_call_using_br_x0: pass
arm64_nobtitest_bti_none_func_call_using_br_x16: pass
arm64_nobtitest_nohint_func_call_using_blr: pass
arm64_nobtitest_nohint_func_call_using_br_x0: pass
arm64_nobtitest_nohint_func_call_using_br_x16: pass
arm64_nobtitest_paciasp_func_call_using_blr: pass
arm64_nobtitest_paciasp_func_call_using_br_x0: pass
arm64_nobtitest_paciasp_func_call_using_br_x16: pass
arm64_pac: pass
arm64_pac_global_context_switch_keep_keys: pass
arm64_pac_global_context_switch_keep_keys_generic: pass
arm64_pac_global_corrupt_pac: pass
arm64_pac_global_exec_changed_keys: pass
arm64_pac_global_pac_instructions_not_nop: pass
arm64_pac_global_pac_instructions_not_nop_generic: pass
arm64_pac_global_single_thread_different_keys: pass
arm64_poe_siginfo: pass
arm64_ptrace: pass
arm64_ptrace_NT_ARM_HW_BREAK_arch_set: pass
arm64_ptrace_NT_ARM_HW_WATCH_arch_set: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_NT_ARM_HW_BREAK: pass
arm64_ptrace_read_NT_ARM_HW_WATCH: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_sme_trap_no_sm: pass
arm64_sme_trap_non_streaming: pass
arm64_sme_trap_za: pass
arm64_sme_vl: pass
arm64_ssve_regs: pass
arm64_ssve_za_regs: pass
arm64_sve-probe-vls: pass
arm64_sve-probe-vls_All_vector_lengths_valid: pass
arm64_sve-probe-vls_Enumerated_3_vector_lengths: pass
arm64_sve-ptrace: pass
arm64_sve-ptrace_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_128: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_256: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_128: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_256: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_128: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_256: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_FPSIMD_read_via_SVE_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_112: pass
arm64_sve-ptrace_Set_SVE_VL_128: pass
arm64_sve-ptrace_Set_SVE_VL_144: pass
arm64_sve-ptrace_Set_SVE_VL_16: pass
arm64_sve-ptrace_Set_SVE_VL_160: pass
arm64_sve-ptrace_Set_SVE_VL_176: pass
arm64_sve-ptrace_Set_SVE_VL_192: pass
arm64_sve-ptrace_Set_SVE_VL_208: pass
arm64_sve-ptrace_Set_SVE_VL_224: pass
arm64_sve-ptrace_Set_SVE_VL_240: pass
arm64_sve-ptrace_Set_SVE_VL_256: pass
arm64_sve-ptrace_Set_SVE_VL_272: pass
arm64_sve-ptrace_Set_SVE_VL_32: pass
arm64_sve-ptrace_Set_SVE_VL_48: pass
arm64_sve-ptrace_Set_SVE_VL_64: pass
arm64_sve-ptrace_Set_SVE_VL_80: pass
arm64_sve-ptrace_Set_SVE_VL_96: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_112: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_128: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_144: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_160: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_176: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_192: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_208: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_224: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_240: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_256: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_272: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_48: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_80: pass
arm64_sve-ptrace_Set_Streaming_SVE_VL_96: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_16: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_32: pass
arm64_sve-ptrace_Set_and_get_FPSIMD_data_for_Streaming_SVE_VL_64: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_16: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_32: pass
arm64_sve-ptrace_Set_and_get_Streaming_SVE_data_for_VL_64: pass
arm64_sve-ptrace_Streaming_SVE_FPSIMD_set_via_SVE_0: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_cleared: pass
arm64_sve-ptrace_Streaming_SVE_SVE_PT_VL_INHERIT_set: pass
arm64_sve-ptrace_Streaming_SVE_get_fpsimd_gave_same_state: pass
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_128: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_256: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_FPSIMD_get_SVE_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_FPSIMD_for_VL_96: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_112: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_128: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_144: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_160: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_176: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_192: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_208: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_224: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_240: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_256: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_272: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_48: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_80: skip
arm64_sve-ptrace_Streaming_SVE_set_SVE_get_SVE_for_VL_96: skip
arm64_sve_regs: pass
arm64_sve_vl: pass
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_getpid_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_getpid_SVE_VL_64_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_syscall-abi_sched_yield_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_16_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_32_SME_VL_64_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_16_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_32_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_SM_ZA: pass
arm64_syscall-abi_sched_yield_SVE_VL_64_SME_VL_64_ZA: pass
arm64_tags_test: pass
arm64_tags_test_Syscall_successful_with_tagged_address: pass
arm64_tpidr2: pass
arm64_tpidr2_default_value: pass
arm64_tpidr2_restore: pass
arm64_tpidr2_siginfo: pass
arm64_tpidr2_write_clone_read: pass
arm64_tpidr2_write_fork_read: pass
arm64_tpidr2_write_read: pass
arm64_tpidr2_write_sleep_read: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_current_VL_is_32: pass
arm64_vec-syscfg_SME_default_vector_length_32: pass
arm64_vec-syscfg_SME_maximum_vector_length_64: pass
arm64_vec-syscfg_SME_minimum_vector_length_16: pass
arm64_vec-syscfg_SME_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SME_prctl_set_min_max: pass
arm64_vec-syscfg_SME_set_VL_32_and_have_VL_32: pass
arm64_vec-syscfg_SME_vector_length_set_on_exec: pass
arm64_vec-syscfg_SME_vector_length_used_default: pass
arm64_vec-syscfg_SME_vector_length_was_inherited: pass
arm64_vec-syscfg_SVE_current_VL_is_64: pass
arm64_vec-syscfg_SVE_default_vector_length_64: pass
arm64_vec-syscfg_SVE_maximum_vector_length_64: pass
arm64_vec-syscfg_SVE_minimum_vector_length_16: pass
arm64_vec-syscfg_SVE_prctl_set_all_VLs_0_errors: pass
arm64_vec-syscfg_SVE_prctl_set_min_max: pass
arm64_vec-syscfg_SVE_set_VL_64_and_have_VL_64: pass
arm64_vec-syscfg_SVE_vector_length_set_on_exec: pass
arm64_vec-syscfg_SVE_vector_length_used_default: pass
arm64_vec-syscfg_SVE_vector_length_was_inherited: pass
arm64_vec-syscfg_change_sve_with_za: pass
arm64_za-fork: pass
arm64_za-fork_fork_test: pass
arm64_za-ptrace: pass
arm64_za-ptrace_Data_match_for_VL_16: pass
arm64_za-ptrace_Data_match_for_VL_32: pass
arm64_za-ptrace_Data_match_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_112: skip
arm64_za-ptrace_Disabled_ZA_for_VL_128: skip
arm64_za-ptrace_Disabled_ZA_for_VL_144: skip
arm64_za-ptrace_Disabled_ZA_for_VL_16: pass
arm64_za-ptrace_Disabled_ZA_for_VL_160: skip
arm64_za-ptrace_Disabled_ZA_for_VL_176: skip
arm64_za-ptrace_Disabled_ZA_for_VL_192: skip
arm64_za-ptrace_Disabled_ZA_for_VL_208: skip
arm64_za-ptrace_Disabled_ZA_for_VL_224: skip
arm64_za-ptrace_Disabled_ZA_for_VL_240: skip
arm64_za-ptrace_Disabled_ZA_for_VL_256: skip
arm64_za-ptrace_Disabled_ZA_for_VL_272: skip
arm64_za-ptrace_Disabled_ZA_for_VL_32: pass
arm64_za-ptrace_Disabled_ZA_for_VL_48: skip
arm64_za-ptrace_Disabled_ZA_for_VL_64: pass
arm64_za-ptrace_Disabled_ZA_for_VL_80: skip
arm64_za-ptrace_Disabled_ZA_for_VL_96: skip
arm64_za-ptrace_Get_and_set_data_for_VL_112: skip
arm64_za-ptrace_Get_and_set_data_for_VL_128: skip
arm64_za-ptrace_Get_and_set_data_for_VL_144: skip
arm64_za-ptrace_Get_and_set_data_for_VL_160: skip
arm64_za-ptrace_Get_and_set_data_for_VL_176: skip
arm64_za-ptrace_Get_and_set_data_for_VL_192: skip
arm64_za-ptrace_Get_and_set_data_for_VL_208: skip
arm64_za-ptrace_Get_and_set_data_for_VL_224: skip
arm64_za-ptrace_Get_and_set_data_for_VL_240: skip
arm64_za-ptrace_Get_and_set_data_for_VL_256: skip
arm64_za-ptrace_Get_and_set_data_for_VL_272: skip
arm64_za-ptrace_Get_and_set_data_for_VL_48: skip
arm64_za-ptrace_Get_and_set_data_for_VL_80: skip
arm64_za-ptrace_Get_and_set_data_for_VL_96: skip
arm64_za-ptrace_Set_VL_112: pass
arm64_za-ptrace_Set_VL_128: pass
arm64_za-ptrace_Set_VL_144: pass
arm64_za-ptrace_Set_VL_16: pass
arm64_za-ptrace_Set_VL_160: pass
arm64_za-ptrace_Set_VL_176: pass
arm64_za-ptrace_Set_VL_192: pass
arm64_za-ptrace_Set_VL_208: pass
arm64_za-ptrace_Set_VL_224: pass
arm64_za-ptrace_Set_VL_240: pass
arm64_za-ptrace_Set_VL_256: pass
arm64_za-ptrace_Set_VL_272: pass
arm64_za-ptrace_Set_VL_32: pass
arm64_za-ptrace_Set_VL_48: pass
arm64_za-ptrace_Set_VL_64: pass
arm64_za-ptrace_Set_VL_80: pass
arm64_za-ptrace_Set_VL_96: pass
arm64_za_no_regs: pass
arm64_za_regs: pass
arm64_zt_no_regs: skip
arm64_zt_regs: skip
shardfile-arm64: pass
8231 11:31:37.208997 end: 3.1 lava-test-shell (duration 00:35:41) [common]
8232 11:31:37.209116 end: 3 lava-test-retry (duration 00:35:41) [common]
8233 11:31:37.209228 start: 4 finalize (timeout 00:10:00) [common]
8234 11:31:37.209335 start: 4.1 power-off (timeout 00:00:30) [common]
8235 11:31:37.209439 end: 4.1 power-off (duration 00:00:00) [common]
8236 11:31:37.209560 start: 4.2 read-feedback (timeout 00:10:00) [common]
8238 11:31:37.210319 Listened to connection for namespace 'common' for up to 1s
8239 11:31:37.334664 Listened to connection for namespace 'common' for up to 1s
8240 11:31:38.209938 Finalising connection for namespace 'common'
8241 11:31:38.210171 Disconnecting from shell: Finalise
8242 11:31:38.210276 / #
8243 11:31:38.310729 end: 4.2 read-feedback (duration 00:00:01) [common]
8244 11:31:38.310867 end: 4 finalize (duration 00:00:01) [common]
8245 11:31:38.310993 Cleaning after the job
8246 11:31:38.311145 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/bl1
8247 11:31:38.311389 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/diskfile
8248 11:31:38.311537 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/diskfile.modules
8249 11:31:38.311689 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/fip_uefi
8250 11:31:38.311843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/kernel
8251 11:31:38.311994 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/ramdisk
8252 11:31:38.312133 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/startup_nsh
8253 11:31:38.312272 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913179/fvp-deploy-tzjh0w2l/uefi_cfg
8254 11:31:38.312427 Stopping container lava-913179-2.1.1 from action check-fvp-version
8255 11:31:38.312521 Calling: 'docker' 'stop' 'lava-913179-2.1.1'
8256 11:31:38.337926 >> Error response from daemon: No such container: lava-913179-2.1.1
8257 11:31:38.341959 Returned 1 in 0 seconds
8258 11:31:38.442215 Listening to feedback from FVP binary for 60s.
8278 11:31:43.445951 Stopping container lava-913179-2.1.2 from action run-fvp
8279 11:31:43.446166 Calling: 'docker' 'stop' 'lava-913179-2.1.2'
8280 11:31:55.250527 >> lava-913179-2.1.2
8281 11:31:55.251317 Returned 0 in 11 seconds
8282 11:31:55.351589 Stopped container lava-913179-2.1.2
8283 11:31:55.351827 Listening to feedback from FVP binary.
8284 11:31:55.352115 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/913179
8285 11:31:55.401743 Job finished correctly