Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 11:07:54.045700 lava-dispatcher, installed at version: 2024.01
2 11:07:54.046452 start: 0 validate
3 11:07:54.046928 Start time: 2024-10-30 11:07:54.046897+00:00 (UTC)
4 11:07:54.047445 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 11:07:54.048002 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:07:54.089953 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 11:07:54.090485 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241030%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 11:07:54.120379 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 11:07:54.120989 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241030%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 11:07:54.153033 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 11:07:54.153737 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:07:54.185902 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 11:07:54.186652 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241030%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 11:07:54.224599 validate duration: 0.18
16 11:07:54.225447 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:07:54.225775 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:07:54.226101 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:07:54.226676 Not decompressing ramdisk as can be used compressed.
20 11:07:54.227124 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 11:07:54.227409 saving as /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/ramdisk/initrd.cpio.gz
22 11:07:54.227680 total size: 5628140 (5 MB)
23 11:07:54.263417 progress 0 % (0 MB)
24 11:07:54.267590 progress 5 % (0 MB)
25 11:07:54.271816 progress 10 % (0 MB)
26 11:07:54.275551 progress 15 % (0 MB)
27 11:07:54.279706 progress 20 % (1 MB)
28 11:07:54.283489 progress 25 % (1 MB)
29 11:07:54.287581 progress 30 % (1 MB)
30 11:07:54.291752 progress 35 % (1 MB)
31 11:07:54.295570 progress 40 % (2 MB)
32 11:07:54.299543 progress 45 % (2 MB)
33 11:07:54.303341 progress 50 % (2 MB)
34 11:07:54.307507 progress 55 % (2 MB)
35 11:07:54.311491 progress 60 % (3 MB)
36 11:07:54.315076 progress 65 % (3 MB)
37 11:07:54.319119 progress 70 % (3 MB)
38 11:07:54.322778 progress 75 % (4 MB)
39 11:07:54.326818 progress 80 % (4 MB)
40 11:07:54.330549 progress 85 % (4 MB)
41 11:07:54.334623 progress 90 % (4 MB)
42 11:07:54.338647 progress 95 % (5 MB)
43 11:07:54.342002 progress 100 % (5 MB)
44 11:07:54.342651 5 MB downloaded in 0.11 s (46.69 MB/s)
45 11:07:54.343201 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:07:54.344129 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:07:54.344433 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:07:54.344706 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:07:54.345178 downloading http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/kernel/Image
51 11:07:54.345427 saving as /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/kernel/Image
52 11:07:54.345637 total size: 45906432 (43 MB)
53 11:07:54.345847 No compression specified
54 11:07:54.381589 progress 0 % (0 MB)
55 11:07:54.409682 progress 5 % (2 MB)
56 11:07:54.437702 progress 10 % (4 MB)
57 11:07:54.465353 progress 15 % (6 MB)
58 11:07:54.493112 progress 20 % (8 MB)
59 11:07:54.520975 progress 25 % (10 MB)
60 11:07:54.548744 progress 30 % (13 MB)
61 11:07:54.576486 progress 35 % (15 MB)
62 11:07:54.604171 progress 40 % (17 MB)
63 11:07:54.632050 progress 45 % (19 MB)
64 11:07:54.660059 progress 50 % (21 MB)
65 11:07:54.687758 progress 55 % (24 MB)
66 11:07:54.715580 progress 60 % (26 MB)
67 11:07:54.743356 progress 65 % (28 MB)
68 11:07:54.771201 progress 70 % (30 MB)
69 11:07:54.798924 progress 75 % (32 MB)
70 11:07:54.826610 progress 80 % (35 MB)
71 11:07:54.854587 progress 85 % (37 MB)
72 11:07:54.882193 progress 90 % (39 MB)
73 11:07:54.909927 progress 95 % (41 MB)
74 11:07:54.937177 progress 100 % (43 MB)
75 11:07:54.937935 43 MB downloaded in 0.59 s (73.92 MB/s)
76 11:07:54.938420 end: 1.2.1 http-download (duration 00:00:01) [common]
78 11:07:54.939234 end: 1.2 download-retry (duration 00:00:01) [common]
79 11:07:54.939510 start: 1.3 download-retry (timeout 00:09:59) [common]
80 11:07:54.939779 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 11:07:54.940268 downloading http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 11:07:54.940521 saving as /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/dtb/meson-g12b-a311d-libretech-cc.dtb
83 11:07:54.940729 total size: 54703 (0 MB)
84 11:07:54.940937 No compression specified
85 11:07:54.974935 progress 59 % (0 MB)
86 11:07:54.975769 progress 100 % (0 MB)
87 11:07:54.976344 0 MB downloaded in 0.04 s (1.47 MB/s)
88 11:07:54.976806 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:07:54.977623 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:07:54.977887 start: 1.4 download-retry (timeout 00:09:59) [common]
92 11:07:54.978155 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 11:07:54.978603 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 11:07:54.978847 saving as /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/nfsrootfs/full.rootfs.tar
95 11:07:54.979053 total size: 474398908 (452 MB)
96 11:07:54.979263 Using unxz to decompress xz
97 11:07:55.012327 progress 0 % (0 MB)
98 11:07:56.102912 progress 5 % (22 MB)
99 11:07:57.543227 progress 10 % (45 MB)
100 11:07:57.992599 progress 15 % (67 MB)
101 11:07:58.842756 progress 20 % (90 MB)
102 11:07:59.383827 progress 25 % (113 MB)
103 11:07:59.745235 progress 30 % (135 MB)
104 11:08:00.352156 progress 35 % (158 MB)
105 11:08:01.289267 progress 40 % (181 MB)
106 11:08:02.162597 progress 45 % (203 MB)
107 11:08:02.863774 progress 50 % (226 MB)
108 11:08:03.513170 progress 55 % (248 MB)
109 11:08:04.738120 progress 60 % (271 MB)
110 11:08:06.234938 progress 65 % (294 MB)
111 11:08:07.881990 progress 70 % (316 MB)
112 11:08:10.965496 progress 75 % (339 MB)
113 11:08:13.412753 progress 80 % (361 MB)
114 11:08:16.307366 progress 85 % (384 MB)
115 11:08:19.478964 progress 90 % (407 MB)
116 11:08:22.649155 progress 95 % (429 MB)
117 11:08:25.796119 progress 100 % (452 MB)
118 11:08:25.810235 452 MB downloaded in 30.83 s (14.67 MB/s)
119 11:08:25.811166 end: 1.4.1 http-download (duration 00:00:31) [common]
121 11:08:25.812818 end: 1.4 download-retry (duration 00:00:31) [common]
122 11:08:25.813338 start: 1.5 download-retry (timeout 00:09:28) [common]
123 11:08:25.813848 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 11:08:25.814960 downloading http://storage.kernelci.org/next/master/next-20241030/arm64/defconfig/gcc-12/modules.tar.xz
125 11:08:25.815468 saving as /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/modules/modules.tar
126 11:08:25.815874 total size: 11588888 (11 MB)
127 11:08:25.816335 Using unxz to decompress xz
128 11:08:25.862991 progress 0 % (0 MB)
129 11:08:25.932210 progress 5 % (0 MB)
130 11:08:26.009519 progress 10 % (1 MB)
131 11:08:26.093435 progress 15 % (1 MB)
132 11:08:26.169051 progress 20 % (2 MB)
133 11:08:26.244151 progress 25 % (2 MB)
134 11:08:26.322177 progress 30 % (3 MB)
135 11:08:26.393629 progress 35 % (3 MB)
136 11:08:26.472914 progress 40 % (4 MB)
137 11:08:26.557585 progress 45 % (5 MB)
138 11:08:26.632875 progress 50 % (5 MB)
139 11:08:26.716027 progress 55 % (6 MB)
140 11:08:26.797568 progress 60 % (6 MB)
141 11:08:26.878658 progress 65 % (7 MB)
142 11:08:26.956979 progress 70 % (7 MB)
143 11:08:27.039287 progress 75 % (8 MB)
144 11:08:27.115592 progress 80 % (8 MB)
145 11:08:27.197144 progress 85 % (9 MB)
146 11:08:27.269103 progress 90 % (9 MB)
147 11:08:27.363798 progress 95 % (10 MB)
148 11:08:27.461094 progress 100 % (11 MB)
149 11:08:27.475275 11 MB downloaded in 1.66 s (6.66 MB/s)
150 11:08:27.475891 end: 1.5.1 http-download (duration 00:00:02) [common]
152 11:08:27.477454 end: 1.5 download-retry (duration 00:00:02) [common]
153 11:08:27.477975 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 11:08:27.478494 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 11:08:42.779590 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/913129/extract-nfsrootfs-7obheu8k
156 11:08:42.780219 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 11:08:42.780513 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 11:08:42.781200 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy
159 11:08:42.781650 makedir: /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin
160 11:08:42.781975 makedir: /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/tests
161 11:08:42.782283 makedir: /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/results
162 11:08:42.782612 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-add-keys
163 11:08:42.783143 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-add-sources
164 11:08:42.783658 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-background-process-start
165 11:08:42.784221 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-background-process-stop
166 11:08:42.784850 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-common-functions
167 11:08:42.785370 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-echo-ipv4
168 11:08:42.785859 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-install-packages
169 11:08:42.786349 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-installed-packages
170 11:08:42.786837 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-os-build
171 11:08:42.787318 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-probe-channel
172 11:08:42.787795 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-probe-ip
173 11:08:42.788337 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-target-ip
174 11:08:42.788865 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-target-mac
175 11:08:42.789374 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-target-storage
176 11:08:42.789866 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-test-case
177 11:08:42.790345 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-test-event
178 11:08:42.790823 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-test-feedback
179 11:08:42.791300 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-test-raise
180 11:08:42.791776 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-test-reference
181 11:08:42.792335 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-test-runner
182 11:08:42.792867 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-test-set
183 11:08:42.793350 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-test-shell
184 11:08:42.793837 Updating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-install-packages (oe)
185 11:08:42.794371 Updating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/bin/lava-installed-packages (oe)
186 11:08:42.794813 Creating /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/environment
187 11:08:42.795181 LAVA metadata
188 11:08:42.795436 - LAVA_JOB_ID=913129
189 11:08:42.795652 - LAVA_DISPATCHER_IP=192.168.6.2
190 11:08:42.796026 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 11:08:42.796988 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 11:08:42.797301 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 11:08:42.797511 skipped lava-vland-overlay
194 11:08:42.797751 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 11:08:42.798001 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 11:08:42.798220 skipped lava-multinode-overlay
197 11:08:42.798461 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 11:08:42.798710 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 11:08:42.798957 Loading test definitions
200 11:08:42.799232 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 11:08:42.799451 Using /lava-913129 at stage 0
202 11:08:42.800615 uuid=913129_1.6.2.4.1 testdef=None
203 11:08:42.800924 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 11:08:42.801188 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 11:08:42.802873 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 11:08:42.803659 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 11:08:42.805977 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 11:08:42.806807 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 11:08:42.808899 runner path: /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 913129_1.6.2.4.1
212 11:08:42.809465 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 11:08:42.810215 Creating lava-test-runner.conf files
215 11:08:42.810416 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/913129/lava-overlay-g8syuxxy/lava-913129/0 for stage 0
216 11:08:42.810748 - 0_v4l2-decoder-conformance-h265
217 11:08:42.811084 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 11:08:42.811355 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 11:08:42.832580 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 11:08:42.832924 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 11:08:42.833182 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 11:08:42.833441 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 11:08:42.833700 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 11:08:43.441084 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 11:08:43.441552 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 11:08:43.441799 extracting modules file /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/913129/extract-nfsrootfs-7obheu8k
227 11:08:44.794172 extracting modules file /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/913129/extract-overlay-ramdisk-fj9za8bf/ramdisk
228 11:08:46.194998 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 11:08:46.195471 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 11:08:46.195747 [common] Applying overlay to NFS
231 11:08:46.195961 [common] Applying overlay /var/lib/lava/dispatcher/tmp/913129/compress-overlay-_i1ym_en/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/913129/extract-nfsrootfs-7obheu8k
232 11:08:46.224757 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 11:08:46.225118 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 11:08:46.225389 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 11:08:46.225613 Converting downloaded kernel to a uImage
236 11:08:46.225912 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/kernel/Image /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/kernel/uImage
237 11:08:46.706547 output: Image Name:
238 11:08:46.706962 output: Created: Wed Oct 30 11:08:46 2024
239 11:08:46.707172 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 11:08:46.707377 output: Data Size: 45906432 Bytes = 44830.50 KiB = 43.78 MiB
241 11:08:46.707578 output: Load Address: 01080000
242 11:08:46.707777 output: Entry Point: 01080000
243 11:08:46.707974 output:
244 11:08:46.708350 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 11:08:46.708618 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 11:08:46.708883 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 11:08:46.709137 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 11:08:46.709395 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 11:08:46.709650 Building ramdisk /var/lib/lava/dispatcher/tmp/913129/extract-overlay-ramdisk-fj9za8bf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/913129/extract-overlay-ramdisk-fj9za8bf/ramdisk
250 11:08:48.873407 >> 167174 blocks
251 11:08:56.566973 Adding RAMdisk u-boot header.
252 11:08:56.567633 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/913129/extract-overlay-ramdisk-fj9za8bf/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/913129/extract-overlay-ramdisk-fj9za8bf/ramdisk.cpio.gz.uboot
253 11:08:56.834370 output: Image Name:
254 11:08:56.834788 output: Created: Wed Oct 30 11:08:56 2024
255 11:08:56.835001 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 11:08:56.835208 output: Data Size: 23442891 Bytes = 22893.45 KiB = 22.36 MiB
257 11:08:56.835408 output: Load Address: 00000000
258 11:08:56.835606 output: Entry Point: 00000000
259 11:08:56.835801 output:
260 11:08:56.836765 rename /var/lib/lava/dispatcher/tmp/913129/extract-overlay-ramdisk-fj9za8bf/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/ramdisk/ramdisk.cpio.gz.uboot
261 11:08:56.837570 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 11:08:56.838168 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 11:08:56.838745 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 11:08:56.839243 No LXC device requested
265 11:08:56.839789 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 11:08:56.840385 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 11:08:56.840928 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 11:08:56.841382 Checking files for TFTP limit of 4294967296 bytes.
269 11:08:56.844324 end: 1 tftp-deploy (duration 00:01:03) [common]
270 11:08:56.844962 start: 2 uboot-action (timeout 00:05:00) [common]
271 11:08:56.845536 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 11:08:56.846081 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 11:08:56.846630 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 11:08:56.847202 Using kernel file from prepare-kernel: 913129/tftp-deploy-5vrq7au_/kernel/uImage
275 11:08:56.847880 substitutions:
276 11:08:56.848361 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 11:08:56.848803 - {DTB_ADDR}: 0x01070000
278 11:08:56.849238 - {DTB}: 913129/tftp-deploy-5vrq7au_/dtb/meson-g12b-a311d-libretech-cc.dtb
279 11:08:56.849673 - {INITRD}: 913129/tftp-deploy-5vrq7au_/ramdisk/ramdisk.cpio.gz.uboot
280 11:08:56.850107 - {KERNEL_ADDR}: 0x01080000
281 11:08:56.850536 - {KERNEL}: 913129/tftp-deploy-5vrq7au_/kernel/uImage
282 11:08:56.850964 - {LAVA_MAC}: None
283 11:08:56.851432 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/913129/extract-nfsrootfs-7obheu8k
284 11:08:56.851868 - {NFS_SERVER_IP}: 192.168.6.2
285 11:08:56.852370 - {PRESEED_CONFIG}: None
286 11:08:56.852805 - {PRESEED_LOCAL}: None
287 11:08:56.853235 - {RAMDISK_ADDR}: 0x08000000
288 11:08:56.853659 - {RAMDISK}: 913129/tftp-deploy-5vrq7au_/ramdisk/ramdisk.cpio.gz.uboot
289 11:08:56.854085 - {ROOT_PART}: None
290 11:08:56.854507 - {ROOT}: None
291 11:08:56.854929 - {SERVER_IP}: 192.168.6.2
292 11:08:56.855351 - {TEE_ADDR}: 0x83000000
293 11:08:56.855772 - {TEE}: None
294 11:08:56.856231 Parsed boot commands:
295 11:08:56.856651 - setenv autoload no
296 11:08:56.857074 - setenv initrd_high 0xffffffff
297 11:08:56.857497 - setenv fdt_high 0xffffffff
298 11:08:56.857917 - dhcp
299 11:08:56.858338 - setenv serverip 192.168.6.2
300 11:08:56.858758 - tftpboot 0x01080000 913129/tftp-deploy-5vrq7au_/kernel/uImage
301 11:08:56.859184 - tftpboot 0x08000000 913129/tftp-deploy-5vrq7au_/ramdisk/ramdisk.cpio.gz.uboot
302 11:08:56.859604 - tftpboot 0x01070000 913129/tftp-deploy-5vrq7au_/dtb/meson-g12b-a311d-libretech-cc.dtb
303 11:08:56.860049 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/913129/extract-nfsrootfs-7obheu8k,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 11:08:56.860491 - bootm 0x01080000 0x08000000 0x01070000
305 11:08:56.861045 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 11:08:56.862668 start: 2.3 connect-device (timeout 00:05:00) [common]
308 11:08:56.863131 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 11:08:56.878629 Setting prompt string to ['lava-test: # ']
310 11:08:56.880289 end: 2.3 connect-device (duration 00:00:00) [common]
311 11:08:56.880942 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 11:08:56.881539 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 11:08:56.882104 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 11:08:56.883331 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 11:08:56.920620 >> OK - accepted request
316 11:08:56.922898 Returned 0 in 0 seconds
317 11:08:57.024081 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 11:08:57.025764 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 11:08:57.026384 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 11:08:57.026935 Setting prompt string to ['Hit any key to stop autoboot']
322 11:08:57.027441 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 11:08:57.029167 Trying 192.168.56.21...
324 11:08:57.029699 Connected to conserv1.
325 11:08:57.030164 Escape character is '^]'.
326 11:08:57.030621
327 11:08:57.031077 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 11:08:57.031542
329 11:09:08.416980 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 11:09:08.417627 bl2_stage_init 0x01
331 11:09:08.418077 bl2_stage_init 0x81
332 11:09:08.422523 hw id: 0x0000 - pwm id 0x01
333 11:09:08.423047 bl2_stage_init 0xc1
334 11:09:08.423482 bl2_stage_init 0x02
335 11:09:08.423912
336 11:09:08.428177 L0:00000000
337 11:09:08.428650 L1:20000703
338 11:09:08.429094 L2:00008067
339 11:09:08.429516 L3:14000000
340 11:09:08.433694 B2:00402000
341 11:09:08.434157 B1:e0f83180
342 11:09:08.434601
343 11:09:08.435031 TE: 58167
344 11:09:08.435458
345 11:09:08.439241 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 11:09:08.439708
347 11:09:08.440179 Board ID = 1
348 11:09:08.444897 Set A53 clk to 24M
349 11:09:08.445357 Set A73 clk to 24M
350 11:09:08.445786 Set clk81 to 24M
351 11:09:08.450453 A53 clk: 1200 MHz
352 11:09:08.450909 A73 clk: 1200 MHz
353 11:09:08.451334 CLK81: 166.6M
354 11:09:08.451756 smccc: 00012abe
355 11:09:08.456145 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 11:09:08.461578 board id: 1
357 11:09:08.467499 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 11:09:08.478036 fw parse done
359 11:09:08.484078 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 11:09:08.526653 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 11:09:08.537522 PIEI prepare done
362 11:09:08.537977 fastboot data load
363 11:09:08.538408 fastboot data verify
364 11:09:08.543207 verify result: 266
365 11:09:08.548821 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 11:09:08.549276 LPDDR4 probe
367 11:09:08.549701 ddr clk to 1584MHz
368 11:09:08.556773 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 11:09:08.594006
370 11:09:08.594480 dmc_version 0001
371 11:09:08.600717 Check phy result
372 11:09:08.606586 INFO : End of CA training
373 11:09:08.607054 INFO : End of initialization
374 11:09:08.612209 INFO : Training has run successfully!
375 11:09:08.612673 Check phy result
376 11:09:08.617764 INFO : End of initialization
377 11:09:08.618231 INFO : End of read enable training
378 11:09:08.621092 INFO : End of fine write leveling
379 11:09:08.626619 INFO : End of Write leveling coarse delay
380 11:09:08.632214 INFO : Training has run successfully!
381 11:09:08.632678 Check phy result
382 11:09:08.633118 INFO : End of initialization
383 11:09:08.637819 INFO : End of read dq deskew training
384 11:09:08.643428 INFO : End of MPR read delay center optimization
385 11:09:08.643916 INFO : End of write delay center optimization
386 11:09:08.649068 INFO : End of read delay center optimization
387 11:09:08.654619 INFO : End of max read latency training
388 11:09:08.655085 INFO : Training has run successfully!
389 11:09:08.660228 1D training succeed
390 11:09:08.666160 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 11:09:08.713724 Check phy result
392 11:09:08.714184 INFO : End of initialization
393 11:09:08.735496 INFO : End of 2D read delay Voltage center optimization
394 11:09:08.755754 INFO : End of 2D read delay Voltage center optimization
395 11:09:08.807777 INFO : End of 2D write delay Voltage center optimization
396 11:09:08.857154 INFO : End of 2D write delay Voltage center optimization
397 11:09:08.862757 INFO : Training has run successfully!
398 11:09:08.863222
399 11:09:08.863683 channel==0
400 11:09:08.868360 RxClkDly_Margin_A0==88 ps 9
401 11:09:08.868829 TxDqDly_Margin_A0==98 ps 10
402 11:09:08.873970 RxClkDly_Margin_A1==88 ps 9
403 11:09:08.874433 TxDqDly_Margin_A1==98 ps 10
404 11:09:08.874880 TrainedVREFDQ_A0==74
405 11:09:08.879555 TrainedVREFDQ_A1==74
406 11:09:08.880055 VrefDac_Margin_A0==25
407 11:09:08.880509 DeviceVref_Margin_A0==40
408 11:09:08.885152 VrefDac_Margin_A1==25
409 11:09:08.885619 DeviceVref_Margin_A1==40
410 11:09:08.886059
411 11:09:08.886496
412 11:09:08.890755 channel==1
413 11:09:08.891224 RxClkDly_Margin_A0==98 ps 10
414 11:09:08.891669 TxDqDly_Margin_A0==98 ps 10
415 11:09:08.896317 RxClkDly_Margin_A1==98 ps 10
416 11:09:08.896786 TxDqDly_Margin_A1==88 ps 9
417 11:09:08.901974 TrainedVREFDQ_A0==77
418 11:09:08.902446 TrainedVREFDQ_A1==77
419 11:09:08.902892 VrefDac_Margin_A0==22
420 11:09:08.907545 DeviceVref_Margin_A0==37
421 11:09:08.908034 VrefDac_Margin_A1==24
422 11:09:08.913158 DeviceVref_Margin_A1==37
423 11:09:08.913623
424 11:09:08.914069 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 11:09:08.918763
426 11:09:08.946768 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 11:09:08.947325 2D training succeed
428 11:09:08.952356 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 11:09:08.957976 auto size-- 65535DDR cs0 size: 2048MB
430 11:09:08.958452 DDR cs1 size: 2048MB
431 11:09:08.963539 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 11:09:08.964039 cs0 DataBus test pass
433 11:09:08.969169 cs1 DataBus test pass
434 11:09:08.969639 cs0 AddrBus test pass
435 11:09:08.970086 cs1 AddrBus test pass
436 11:09:08.970528
437 11:09:08.974750 100bdlr_step_size ps== 420
438 11:09:08.975232 result report
439 11:09:08.980360 boot times 0Enable ddr reg access
440 11:09:08.985803 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 11:09:08.999295 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 11:09:09.572805 0.0;M3 CHK:0;cm4_sp_mode 0
443 11:09:09.573322 MVN_1=0x00000000
444 11:09:09.578397 MVN_2=0x00000000
445 11:09:09.584162 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 11:09:09.584634 OPS=0x10
447 11:09:09.585082 ring efuse init
448 11:09:09.585519 chipver efuse init
449 11:09:09.589729 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 11:09:09.595320 [0.018961 Inits done]
451 11:09:09.595783 secure task start!
452 11:09:09.596320 high task start!
453 11:09:09.599902 low task start!
454 11:09:09.600405 run into bl31
455 11:09:09.606565 NOTICE: BL31: v1.3(release):4fc40b1
456 11:09:09.614349 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 11:09:09.614822 NOTICE: BL31: G12A normal boot!
458 11:09:09.639781 NOTICE: BL31: BL33 decompress pass
459 11:09:09.645479 ERROR: Error initializing runtime service opteed_fast
460 11:09:10.878413
461 11:09:10.878924
462 11:09:10.886763 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 11:09:10.887244
464 11:09:10.887695 Model: Libre Computer AML-A311D-CC Alta
465 11:09:11.095220 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 11:09:11.118558 DRAM: 2 GiB (effective 3.8 GiB)
467 11:09:11.261546 Core: 408 devices, 31 uclasses, devicetree: separate
468 11:09:11.267441 WDT: Not starting watchdog@f0d0
469 11:09:11.299675 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 11:09:11.312251 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 11:09:11.317139 ** Bad device specification mmc 0 **
472 11:09:11.327485 Card did not respond to voltage select! : -110
473 11:09:11.335118 ** Bad device specification mmc 0 **
474 11:09:11.335591 Couldn't find partition mmc 0
475 11:09:11.343453 Card did not respond to voltage select! : -110
476 11:09:11.348995 ** Bad device specification mmc 0 **
477 11:09:11.349472 Couldn't find partition mmc 0
478 11:09:11.354032 Error: could not access storage.
479 11:09:12.616991 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 11:09:12.617530 bl2_stage_init 0x01
481 11:09:12.617989 bl2_stage_init 0x81
482 11:09:12.622600 hw id: 0x0000 - pwm id 0x01
483 11:09:12.623077 bl2_stage_init 0xc1
484 11:09:12.623524 bl2_stage_init 0x02
485 11:09:12.623962
486 11:09:12.628179 L0:00000000
487 11:09:12.628648 L1:20000703
488 11:09:12.629093 L2:00008067
489 11:09:12.629531 L3:14000000
490 11:09:12.633798 B2:00402000
491 11:09:12.634265 B1:e0f83180
492 11:09:12.634704
493 11:09:12.635144 TE: 58124
494 11:09:12.635580
495 11:09:12.639422 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 11:09:12.639896
497 11:09:12.640376 Board ID = 1
498 11:09:12.644986 Set A53 clk to 24M
499 11:09:12.645453 Set A73 clk to 24M
500 11:09:12.645896 Set clk81 to 24M
501 11:09:12.650597 A53 clk: 1200 MHz
502 11:09:12.651065 A73 clk: 1200 MHz
503 11:09:12.651507 CLK81: 166.6M
504 11:09:12.651950 smccc: 00012a92
505 11:09:12.656152 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 11:09:12.661775 board id: 1
507 11:09:12.667673 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 11:09:12.678309 fw parse done
509 11:09:12.684284 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 11:09:12.727013 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 11:09:12.737907 PIEI prepare done
512 11:09:12.738504 fastboot data load
513 11:09:12.738980 fastboot data verify
514 11:09:12.743572 verify result: 266
515 11:09:12.749084 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 11:09:12.749577 LPDDR4 probe
517 11:09:12.750037 ddr clk to 1584MHz
518 11:09:12.757126 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 11:09:12.794498
520 11:09:12.795125 dmc_version 0001
521 11:09:12.801009 Check phy result
522 11:09:12.806861 INFO : End of CA training
523 11:09:12.807360 INFO : End of initialization
524 11:09:12.812577 INFO : Training has run successfully!
525 11:09:12.813135 Check phy result
526 11:09:12.818129 INFO : End of initialization
527 11:09:12.818699 INFO : End of read enable training
528 11:09:12.823759 INFO : End of fine write leveling
529 11:09:12.829339 INFO : End of Write leveling coarse delay
530 11:09:12.829856 INFO : Training has run successfully!
531 11:09:12.830314 Check phy result
532 11:09:12.834838 INFO : End of initialization
533 11:09:12.835340 INFO : End of read dq deskew training
534 11:09:12.840627 INFO : End of MPR read delay center optimization
535 11:09:12.846117 INFO : End of write delay center optimization
536 11:09:12.851813 INFO : End of read delay center optimization
537 11:09:12.852412 INFO : End of max read latency training
538 11:09:12.857415 INFO : Training has run successfully!
539 11:09:12.857938 1D training succeed
540 11:09:12.866561 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 11:09:12.914159 Check phy result
542 11:09:12.914774 INFO : End of initialization
543 11:09:12.935853 INFO : End of 2D read delay Voltage center optimization
544 11:09:12.955913 INFO : End of 2D read delay Voltage center optimization
545 11:09:13.007929 INFO : End of 2D write delay Voltage center optimization
546 11:09:13.057054 INFO : End of 2D write delay Voltage center optimization
547 11:09:13.062631 INFO : Training has run successfully!
548 11:09:13.063170
549 11:09:13.063614 channel==0
550 11:09:13.068260 RxClkDly_Margin_A0==88 ps 9
551 11:09:13.068874 TxDqDly_Margin_A0==98 ps 10
552 11:09:13.073804 RxClkDly_Margin_A1==88 ps 9
553 11:09:13.074329 TxDqDly_Margin_A1==88 ps 9
554 11:09:13.074761 TrainedVREFDQ_A0==74
555 11:09:13.079372 TrainedVREFDQ_A1==74
556 11:09:13.079925 VrefDac_Margin_A0==25
557 11:09:13.080396 DeviceVref_Margin_A0==40
558 11:09:13.084956 VrefDac_Margin_A1==25
559 11:09:13.085457 DeviceVref_Margin_A1==40
560 11:09:13.085908
561 11:09:13.086322
562 11:09:13.086726 channel==1
563 11:09:13.090633 RxClkDly_Margin_A0==98 ps 10
564 11:09:13.091163 TxDqDly_Margin_A0==98 ps 10
565 11:09:13.096218 RxClkDly_Margin_A1==98 ps 10
566 11:09:13.096751 TxDqDly_Margin_A1==88 ps 9
567 11:09:13.101797 TrainedVREFDQ_A0==77
568 11:09:13.102295 TrainedVREFDQ_A1==77
569 11:09:13.102713 VrefDac_Margin_A0==22
570 11:09:13.107531 DeviceVref_Margin_A0==37
571 11:09:13.108284 VrefDac_Margin_A1==24
572 11:09:13.113089 DeviceVref_Margin_A1==37
573 11:09:13.113770
574 11:09:13.114352 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 11:09:13.114918
576 11:09:13.146686 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000018 dram_vref_reg_value 0x 00000060
577 11:09:13.147457 2D training succeed
578 11:09:13.152330 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 11:09:13.157857 auto size-- 65535DDR cs0 size: 2048MB
580 11:09:13.158554 DDR cs1 size: 2048MB
581 11:09:13.163451 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 11:09:13.164167 cs0 DataBus test pass
583 11:09:13.169047 cs1 DataBus test pass
584 11:09:13.169721 cs0 AddrBus test pass
585 11:09:13.170285 cs1 AddrBus test pass
586 11:09:13.170820
587 11:09:13.174676 100bdlr_step_size ps== 420
588 11:09:13.175378 result report
589 11:09:13.180292 boot times 0Enable ddr reg access
590 11:09:13.185533 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 11:09:13.199002 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 11:09:13.771145 0.0;M3 CHK:0;cm4_sp_mode 0
593 11:09:13.771898 MVN_1=0x00000000
594 11:09:13.776673 MVN_2=0x00000000
595 11:09:13.782433 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 11:09:13.783118 OPS=0x10
597 11:09:13.783752 ring efuse init
598 11:09:13.784321 chipver efuse init
599 11:09:13.790642 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 11:09:13.791293 [0.018960 Inits done]
601 11:09:13.791814 secure task start!
602 11:09:13.798222 high task start!
603 11:09:13.798834 low task start!
604 11:09:13.799347 run into bl31
605 11:09:13.804765 NOTICE: BL31: v1.3(release):4fc40b1
606 11:09:13.812601 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 11:09:13.813233 NOTICE: BL31: G12A normal boot!
608 11:09:13.838005 NOTICE: BL31: BL33 decompress pass
609 11:09:13.843644 ERROR: Error initializing runtime service opteed_fast
610 11:09:15.076563
611 11:09:15.077368
612 11:09:15.085016 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 11:09:15.085743
614 11:09:15.086299 Model: Libre Computer AML-A311D-CC Alta
615 11:09:15.293579 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 11:09:15.316683 DRAM: 2 GiB (effective 3.8 GiB)
617 11:09:15.459636 Core: 408 devices, 31 uclasses, devicetree: separate
618 11:09:15.465543 WDT: Not starting watchdog@f0d0
619 11:09:15.497737 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 11:09:15.510126 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 11:09:15.515296 ** Bad device specification mmc 0 **
622 11:09:15.525546 Card did not respond to voltage select! : -110
623 11:09:15.533301 ** Bad device specification mmc 0 **
624 11:09:15.533934 Couldn't find partition mmc 0
625 11:09:15.541522 Card did not respond to voltage select! : -110
626 11:09:15.547075 ** Bad device specification mmc 0 **
627 11:09:15.547699 Couldn't find partition mmc 0
628 11:09:15.552188 Error: could not access storage.
629 11:09:15.895767 Net: eth0: ethernet@ff3f0000
630 11:09:15.896576 starting USB...
631 11:09:16.147423 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 11:09:16.148203 Starting the controller
633 11:09:16.154451 USB XHCI 1.10
634 11:09:17.868966 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 11:09:17.869785 bl2_stage_init 0x01
636 11:09:17.870341 bl2_stage_init 0x81
637 11:09:17.874685 hw id: 0x0000 - pwm id 0x01
638 11:09:17.875298 bl2_stage_init 0xc1
639 11:09:17.875838 bl2_stage_init 0x02
640 11:09:17.876527
641 11:09:17.880216 L0:00000000
642 11:09:17.880839 L1:20000703
643 11:09:17.881382 L2:00008067
644 11:09:17.881902 L3:14000000
645 11:09:17.885891 B2:00402000
646 11:09:17.886503 B1:e0f83180
647 11:09:17.887042
648 11:09:17.887559 TE: 58124
649 11:09:17.888134
650 11:09:17.891562 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 11:09:17.892207
652 11:09:17.892751 Board ID = 1
653 11:09:17.896958 Set A53 clk to 24M
654 11:09:17.897565 Set A73 clk to 24M
655 11:09:17.898106 Set clk81 to 24M
656 11:09:17.902709 A53 clk: 1200 MHz
657 11:09:17.903205 A73 clk: 1200 MHz
658 11:09:17.903630 CLK81: 166.6M
659 11:09:17.904076 smccc: 00012a92
660 11:09:17.908281 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 11:09:17.913844 board id: 1
662 11:09:17.919854 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 11:09:17.930248 fw parse done
664 11:09:17.936210 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 11:09:17.978784 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 11:09:17.989707 PIEI prepare done
667 11:09:17.990319 fastboot data load
668 11:09:17.990863 fastboot data verify
669 11:09:17.995507 verify result: 266
670 11:09:18.001029 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 11:09:18.001656 LPDDR4 probe
672 11:09:18.002205 ddr clk to 1584MHz
673 11:09:18.008933 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 11:09:18.046273
675 11:09:18.046920 dmc_version 0001
676 11:09:18.052934 Check phy result
677 11:09:18.058794 INFO : End of CA training
678 11:09:18.059400 INFO : End of initialization
679 11:09:18.064496 INFO : Training has run successfully!
680 11:09:18.065111 Check phy result
681 11:09:18.070005 INFO : End of initialization
682 11:09:18.070612 INFO : End of read enable training
683 11:09:18.075606 INFO : End of fine write leveling
684 11:09:18.081186 INFO : End of Write leveling coarse delay
685 11:09:18.081803 INFO : Training has run successfully!
686 11:09:18.082331 Check phy result
687 11:09:18.086794 INFO : End of initialization
688 11:09:18.087399 INFO : End of read dq deskew training
689 11:09:18.092489 INFO : End of MPR read delay center optimization
690 11:09:18.097990 INFO : End of write delay center optimization
691 11:09:18.103620 INFO : End of read delay center optimization
692 11:09:18.104274 INFO : End of max read latency training
693 11:09:18.109193 INFO : Training has run successfully!
694 11:09:18.109800 1D training succeed
695 11:09:18.118383 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 11:09:18.165963 Check phy result
697 11:09:18.166484 INFO : End of initialization
698 11:09:18.187630 INFO : End of 2D read delay Voltage center optimization
699 11:09:18.207677 INFO : End of 2D read delay Voltage center optimization
700 11:09:18.259627 INFO : End of 2D write delay Voltage center optimization
701 11:09:18.308782 INFO : End of 2D write delay Voltage center optimization
702 11:09:18.314394 INFO : Training has run successfully!
703 11:09:18.315008
704 11:09:18.315537 channel==0
705 11:09:18.320023 RxClkDly_Margin_A0==88 ps 9
706 11:09:18.320633 TxDqDly_Margin_A0==98 ps 10
707 11:09:18.325574 RxClkDly_Margin_A1==88 ps 9
708 11:09:18.326189 TxDqDly_Margin_A1==98 ps 10
709 11:09:18.326732 TrainedVREFDQ_A0==74
710 11:09:18.331179 TrainedVREFDQ_A1==74
711 11:09:18.331805 VrefDac_Margin_A0==25
712 11:09:18.332388 DeviceVref_Margin_A0==40
713 11:09:18.336780 VrefDac_Margin_A1==25
714 11:09:18.337386 DeviceVref_Margin_A1==40
715 11:09:18.337931
716 11:09:18.338451
717 11:09:18.342414 channel==1
718 11:09:18.343028 RxClkDly_Margin_A0==98 ps 10
719 11:09:18.343556 TxDqDly_Margin_A0==88 ps 9
720 11:09:18.348017 RxClkDly_Margin_A1==98 ps 10
721 11:09:18.348626 TxDqDly_Margin_A1==88 ps 9
722 11:09:18.353581 TrainedVREFDQ_A0==76
723 11:09:18.354187 TrainedVREFDQ_A1==77
724 11:09:18.354728 VrefDac_Margin_A0==22
725 11:09:18.359195 DeviceVref_Margin_A0==38
726 11:09:18.359806 VrefDac_Margin_A1==22
727 11:09:18.364811 DeviceVref_Margin_A1==37
728 11:09:18.365410
729 11:09:18.365952 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 11:09:18.366469
731 11:09:18.398382 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000018 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 11:09:18.399061 2D training succeed
733 11:09:18.404013 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 11:09:18.409585 auto size-- 65535DDR cs0 size: 2048MB
735 11:09:18.410201 DDR cs1 size: 2048MB
736 11:09:18.415179 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 11:09:18.415774 cs0 DataBus test pass
738 11:09:18.420802 cs1 DataBus test pass
739 11:09:18.421407 cs0 AddrBus test pass
740 11:09:18.421945 cs1 AddrBus test pass
741 11:09:18.422462
742 11:09:18.426412 100bdlr_step_size ps== 420
743 11:09:18.427021 result report
744 11:09:18.432000 boot times 0Enable ddr reg access
745 11:09:18.437323 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 11:09:18.450743 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 11:09:19.022759 0.0;M3 CHK:0;cm4_sp_mode 0
748 11:09:19.023516 MVN_1=0x00000000
749 11:09:19.028307 MVN_2=0x00000000
750 11:09:19.034005 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 11:09:19.034532 OPS=0x10
752 11:09:19.034937 ring efuse init
753 11:09:19.035329 chipver efuse init
754 11:09:19.039586 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 11:09:19.045172 [0.018961 Inits done]
756 11:09:19.045772 secure task start!
757 11:09:19.046283 high task start!
758 11:09:19.049740 low task start!
759 11:09:19.050332 run into bl31
760 11:09:19.056510 NOTICE: BL31: v1.3(release):4fc40b1
761 11:09:19.064218 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 11:09:19.064823 NOTICE: BL31: G12A normal boot!
763 11:09:19.089569 NOTICE: BL31: BL33 decompress pass
764 11:09:19.095244 ERROR: Error initializing runtime service opteed_fast
765 11:09:20.328149
766 11:09:20.328585
767 11:09:20.336462 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 11:09:20.336811
769 11:09:20.337082 Model: Libre Computer AML-A311D-CC Alta
770 11:09:20.545073 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 11:09:20.568401 DRAM: 2 GiB (effective 3.8 GiB)
772 11:09:20.711362 Core: 408 devices, 31 uclasses, devicetree: separate
773 11:09:20.717237 WDT: Not starting watchdog@f0d0
774 11:09:20.749550 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 11:09:20.761956 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 11:09:20.766952 ** Bad device specification mmc 0 **
777 11:09:20.777287 Card did not respond to voltage select! : -110
778 11:09:20.784942 ** Bad device specification mmc 0 **
779 11:09:20.785564 Couldn't find partition mmc 0
780 11:09:20.793264 Card did not respond to voltage select! : -110
781 11:09:20.798801 ** Bad device specification mmc 0 **
782 11:09:20.799403 Couldn't find partition mmc 0
783 11:09:20.803871 Error: could not access storage.
784 11:09:21.146290 Net: eth0: ethernet@ff3f0000
785 11:09:21.146983 starting USB...
786 11:09:21.398128 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 11:09:21.398832 Starting the controller
788 11:09:21.405111 USB XHCI 1.10
789 11:09:23.567567 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 11:09:23.568432 bl2_stage_init 0x01
791 11:09:23.569007 bl2_stage_init 0x81
792 11:09:23.573219 hw id: 0x0000 - pwm id 0x01
793 11:09:23.573844 bl2_stage_init 0xc1
794 11:09:23.574391 bl2_stage_init 0x02
795 11:09:23.574925
796 11:09:23.578734 L0:00000000
797 11:09:23.579336 L1:20000703
798 11:09:23.579877 L2:00008067
799 11:09:23.580446 L3:14000000
800 11:09:23.584349 B2:00402000
801 11:09:23.584943 B1:e0f83180
802 11:09:23.585475
803 11:09:23.586012 TE: 58159
804 11:09:23.586530
805 11:09:23.589896 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 11:09:23.590511
807 11:09:23.591058 Board ID = 1
808 11:09:23.595564 Set A53 clk to 24M
809 11:09:23.596193 Set A73 clk to 24M
810 11:09:23.596736 Set clk81 to 24M
811 11:09:23.601142 A53 clk: 1200 MHz
812 11:09:23.601746 A73 clk: 1200 MHz
813 11:09:23.602276 CLK81: 166.6M
814 11:09:23.602801 smccc: 00012ab5
815 11:09:23.606661 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 11:09:23.612277 board id: 1
817 11:09:23.618215 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 11:09:23.628869 fw parse done
819 11:09:23.634881 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 11:09:23.677350 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 11:09:23.688250 PIEI prepare done
822 11:09:23.688864 fastboot data load
823 11:09:23.689412 fastboot data verify
824 11:09:23.693971 verify result: 266
825 11:09:23.699550 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 11:09:23.700253 LPDDR4 probe
827 11:09:23.700810 ddr clk to 1584MHz
828 11:09:23.707551 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 11:09:23.744759
830 11:09:23.745252 dmc_version 0001
831 11:09:23.751486 Check phy result
832 11:09:23.757363 INFO : End of CA training
833 11:09:23.757972 INFO : End of initialization
834 11:09:23.762947 INFO : Training has run successfully!
835 11:09:23.763548 Check phy result
836 11:09:23.768550 INFO : End of initialization
837 11:09:23.769156 INFO : End of read enable training
838 11:09:23.774174 INFO : End of fine write leveling
839 11:09:23.779757 INFO : End of Write leveling coarse delay
840 11:09:23.780396 INFO : Training has run successfully!
841 11:09:23.780941 Check phy result
842 11:09:23.785322 INFO : End of initialization
843 11:09:23.785910 INFO : End of read dq deskew training
844 11:09:23.790960 INFO : End of MPR read delay center optimization
845 11:09:23.796590 INFO : End of write delay center optimization
846 11:09:23.802188 INFO : End of read delay center optimization
847 11:09:23.802795 INFO : End of max read latency training
848 11:09:23.807763 INFO : Training has run successfully!
849 11:09:23.808400 1D training succeed
850 11:09:23.816909 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 11:09:23.864545 Check phy result
852 11:09:23.865151 INFO : End of initialization
853 11:09:23.886131 INFO : End of 2D read delay Voltage center optimization
854 11:09:23.906298 INFO : End of 2D read delay Voltage center optimization
855 11:09:23.958134 INFO : End of 2D write delay Voltage center optimization
856 11:09:24.007437 INFO : End of 2D write delay Voltage center optimization
857 11:09:24.012949 INFO : Training has run successfully!
858 11:09:24.013560
859 11:09:24.014111 channel==0
860 11:09:24.018610 RxClkDly_Margin_A0==88 ps 9
861 11:09:24.019215 TxDqDly_Margin_A0==98 ps 10
862 11:09:24.024162 RxClkDly_Margin_A1==88 ps 9
863 11:09:24.024775 TxDqDly_Margin_A1==98 ps 10
864 11:09:24.025337 TrainedVREFDQ_A0==74
865 11:09:24.029879 TrainedVREFDQ_A1==75
866 11:09:24.030502 VrefDac_Margin_A0==25
867 11:09:24.031049 DeviceVref_Margin_A0==40
868 11:09:24.035469 VrefDac_Margin_A1==25
869 11:09:24.036105 DeviceVref_Margin_A1==39
870 11:09:24.036612
871 11:09:24.037116
872 11:09:24.040957 channel==1
873 11:09:24.041541 RxClkDly_Margin_A0==98 ps 10
874 11:09:24.042044 TxDqDly_Margin_A0==88 ps 9
875 11:09:24.046558 RxClkDly_Margin_A1==98 ps 10
876 11:09:24.047143 TxDqDly_Margin_A1==88 ps 9
877 11:09:24.052242 TrainedVREFDQ_A0==76
878 11:09:24.052832 TrainedVREFDQ_A1==77
879 11:09:24.053342 VrefDac_Margin_A0==22
880 11:09:24.057822 DeviceVref_Margin_A0==38
881 11:09:24.058413 VrefDac_Margin_A1==22
882 11:09:24.063412 DeviceVref_Margin_A1==37
883 11:09:24.064014
884 11:09:24.064526 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 11:09:24.065024
886 11:09:24.096908 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
887 11:09:24.097547 2D training succeed
888 11:09:24.102489 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 11:09:24.108104 auto size-- 65535DDR cs0 size: 2048MB
890 11:09:24.108711 DDR cs1 size: 2048MB
891 11:09:24.113684 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 11:09:24.114275 cs0 DataBus test pass
893 11:09:24.119305 cs1 DataBus test pass
894 11:09:24.119896 cs0 AddrBus test pass
895 11:09:24.120445 cs1 AddrBus test pass
896 11:09:24.120944
897 11:09:24.124873 100bdlr_step_size ps== 420
898 11:09:24.125465 result report
899 11:09:24.130466 boot times 0Enable ddr reg access
900 11:09:24.135816 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 11:09:24.149312 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 11:09:24.721266 0.0;M3 CHK:0;cm4_sp_mode 0
903 11:09:24.721961 MVN_1=0x00000000
904 11:09:24.726769 MVN_2=0x00000000
905 11:09:24.732515 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 11:09:24.733124 OPS=0x10
907 11:09:24.733660 ring efuse init
908 11:09:24.734189 chipver efuse init
909 11:09:24.738157 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 11:09:24.743734 [0.018961 Inits done]
911 11:09:24.744390 secure task start!
912 11:09:24.744934 high task start!
913 11:09:24.748390 low task start!
914 11:09:24.748986 run into bl31
915 11:09:24.754949 NOTICE: BL31: v1.3(release):4fc40b1
916 11:09:24.762756 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 11:09:24.763388 NOTICE: BL31: G12A normal boot!
918 11:09:24.788187 NOTICE: BL31: BL33 decompress pass
919 11:09:24.793784 ERROR: Error initializing runtime service opteed_fast
920 11:09:26.026632
921 11:09:26.027349
922 11:09:26.035039 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 11:09:26.035644
924 11:09:26.036246 Model: Libre Computer AML-A311D-CC Alta
925 11:09:26.243424 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 11:09:26.266825 DRAM: 2 GiB (effective 3.8 GiB)
927 11:09:26.409791 Core: 408 devices, 31 uclasses, devicetree: separate
928 11:09:26.415672 WDT: Not starting watchdog@f0d0
929 11:09:26.447932 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 11:09:26.460367 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 11:09:26.465386 ** Bad device specification mmc 0 **
932 11:09:26.475737 Card did not respond to voltage select! : -110
933 11:09:26.483360 ** Bad device specification mmc 0 **
934 11:09:26.483959 Couldn't find partition mmc 0
935 11:09:26.491690 Card did not respond to voltage select! : -110
936 11:09:26.497250 ** Bad device specification mmc 0 **
937 11:09:26.497871 Couldn't find partition mmc 0
938 11:09:26.502301 Error: could not access storage.
939 11:09:26.844727 Net: eth0: ethernet@ff3f0000
940 11:09:26.845382 starting USB...
941 11:09:27.096592 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 11:09:27.097267 Starting the controller
943 11:09:27.103506 USB XHCI 1.10
944 11:09:28.657876 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 11:09:28.666097 scanning usb for storage devices... 0 Storage Device(s) found
947 11:09:28.717979 Hit any key to stop autoboot: 1
948 11:09:28.718939 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 11:09:28.719672 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 11:09:28.720214 Setting prompt string to ['=>']
951 11:09:28.720720 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 11:09:28.733540 0
953 11:09:28.734639 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 11:09:28.735283 Sending with 10 millisecond of delay
956 11:09:29.870402 => setenv autoload no
957 11:09:29.881340 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 11:09:29.887599 setenv autoload no
959 11:09:29.888513 Sending with 10 millisecond of delay
961 11:09:31.685660 => setenv initrd_high 0xffffffff
962 11:09:31.696619 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 11:09:31.697712 setenv initrd_high 0xffffffff
964 11:09:31.698587 Sending with 10 millisecond of delay
966 11:09:33.315250 => setenv fdt_high 0xffffffff
967 11:09:33.326277 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 11:09:33.327338 setenv fdt_high 0xffffffff
969 11:09:33.328215 Sending with 10 millisecond of delay
971 11:09:33.620326 => dhcp
972 11:09:33.631165 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 11:09:33.632231 dhcp
974 11:09:33.632796 Speed: 1000, full duplex
975 11:09:33.633333 BOOTP broadcast 1
976 11:09:33.639786 DHCP client bound to address 192.168.6.27 (8 ms)
977 11:09:33.640716 Sending with 10 millisecond of delay
979 11:09:35.317458 => setenv serverip 192.168.6.2
980 11:09:35.328400 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 11:09:35.329502 setenv serverip 192.168.6.2
982 11:09:35.330345 Sending with 10 millisecond of delay
984 11:09:39.054028 => tftpboot 0x01080000 913129/tftp-deploy-5vrq7au_/kernel/uImage
985 11:09:39.065031 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 11:09:39.066121 tftpboot 0x01080000 913129/tftp-deploy-5vrq7au_/kernel/uImage
987 11:09:39.066725 Speed: 1000, full duplex
988 11:09:39.067269 Using ethernet@ff3f0000 device
989 11:09:39.067967 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 11:09:39.073504 Filename '913129/tftp-deploy-5vrq7au_/kernel/uImage'.
991 11:09:39.077397 Load address: 0x1080000
992 11:09:41.855394 Loading: *################################################## 43.8 MiB
993 11:09:41.856234 15.7 MiB/s
994 11:09:41.856803 done
995 11:09:41.859959 Bytes transferred = 45906496 (2bc7a40 hex)
996 11:09:41.860971 Sending with 10 millisecond of delay
998 11:09:46.547677 => tftpboot 0x08000000 913129/tftp-deploy-5vrq7au_/ramdisk/ramdisk.cpio.gz.uboot
999 11:09:46.558747 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 11:09:46.559866 tftpboot 0x08000000 913129/tftp-deploy-5vrq7au_/ramdisk/ramdisk.cpio.gz.uboot
1001 11:09:46.560483 Speed: 1000, full duplex
1002 11:09:46.561025 Using ethernet@ff3f0000 device
1003 11:09:46.561708 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 11:09:46.573511 Filename '913129/tftp-deploy-5vrq7au_/ramdisk/ramdisk.cpio.gz.uboot'.
1005 11:09:46.574045 Load address: 0x8000000
1006 11:09:53.526470 Loading: *#########################T ######################## UDP wrong checksum 00000005 0000ad05
1007 11:09:58.527816 T UDP wrong checksum 00000005 0000ad05
1008 11:10:08.530671 T T UDP wrong checksum 00000005 0000ad05
1009 11:10:28.534743 T T T T UDP wrong checksum 00000005 0000ad05
1010 11:10:43.539008 T T
1011 11:10:43.539642 Retry count exceeded; starting again
1013 11:10:43.541225 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1016 11:10:43.542983 end: 2.4 uboot-commands (duration 00:01:47) [common]
1018 11:10:43.544389 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1020 11:10:43.545526 end: 2 uboot-action (duration 00:01:47) [common]
1022 11:10:43.547028 Cleaning after the job
1023 11:10:43.547568 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/ramdisk
1024 11:10:43.548843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/kernel
1025 11:10:43.593716 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/dtb
1026 11:10:43.594460 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/nfsrootfs
1027 11:10:43.893262 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/913129/tftp-deploy-5vrq7au_/modules
1028 11:10:43.914433 start: 4.1 power-off (timeout 00:00:30) [common]
1029 11:10:43.915111 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1030 11:10:43.950688 >> OK - accepted request
1031 11:10:43.952783 Returned 0 in 0 seconds
1032 11:10:44.053536 end: 4.1 power-off (duration 00:00:00) [common]
1034 11:10:44.054518 start: 4.2 read-feedback (timeout 00:10:00) [common]
1035 11:10:44.055194 Listened to connection for namespace 'common' for up to 1s
1036 11:10:45.055559 Finalising connection for namespace 'common'
1037 11:10:45.055956 Disconnecting from shell: Finalise
1038 11:10:45.056292 =>
1039 11:10:45.156944 end: 4.2 read-feedback (duration 00:00:01) [common]
1040 11:10:45.157533 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/913129
1041 11:10:47.862348 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/913129
1042 11:10:47.862948 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.