Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 09:27:07.286526 lava-dispatcher, installed at version: 2024.01
2 09:27:07.287343 start: 0 validate
3 09:27:07.287838 Start time: 2024-10-31 09:27:07.287807+00:00 (UTC)
4 09:27:07.288415 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:27:07.288952 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 09:27:07.328563 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:27:07.329141 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 09:27:07.359248 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:27:07.359858 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:27:08.408576 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:27:08.409093 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
12 09:27:08.446804 validate duration: 1.16
14 09:27:08.447632 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:27:08.447973 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:27:08.448316 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:27:08.448894 Not decompressing ramdisk as can be used compressed.
18 09:27:08.449328 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 09:27:08.449573 saving as /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/ramdisk/rootfs.cpio.gz
20 09:27:08.449832 total size: 8181887 (7 MB)
21 09:27:08.491764 progress 0 % (0 MB)
22 09:27:08.497789 progress 5 % (0 MB)
23 09:27:08.503645 progress 10 % (0 MB)
24 09:27:08.509671 progress 15 % (1 MB)
25 09:27:08.515223 progress 20 % (1 MB)
26 09:27:08.522537 progress 25 % (1 MB)
27 09:27:08.528677 progress 30 % (2 MB)
28 09:27:08.534313 progress 35 % (2 MB)
29 09:27:08.542542 progress 40 % (3 MB)
30 09:27:08.549401 progress 45 % (3 MB)
31 09:27:08.555712 progress 50 % (3 MB)
32 09:27:08.562560 progress 55 % (4 MB)
33 09:27:08.569117 progress 60 % (4 MB)
34 09:27:08.576392 progress 65 % (5 MB)
35 09:27:08.582924 progress 70 % (5 MB)
36 09:27:08.589911 progress 75 % (5 MB)
37 09:27:08.596430 progress 80 % (6 MB)
38 09:27:08.603339 progress 85 % (6 MB)
39 09:27:08.609700 progress 90 % (7 MB)
40 09:27:08.616561 progress 95 % (7 MB)
41 09:27:08.622399 progress 100 % (7 MB)
42 09:27:08.623217 7 MB downloaded in 0.17 s (45.01 MB/s)
43 09:27:08.623914 end: 1.1.1 http-download (duration 00:00:00) [common]
45 09:27:08.625054 end: 1.1 download-retry (duration 00:00:00) [common]
46 09:27:08.625425 start: 1.2 download-retry (timeout 00:10:00) [common]
47 09:27:08.625763 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 09:27:08.626327 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/kernel/Image
49 09:27:08.626642 saving as /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/kernel/Image
50 09:27:08.626897 total size: 46258688 (44 MB)
51 09:27:08.627150 No compression specified
52 09:27:08.661425 progress 0 % (0 MB)
53 09:27:08.690042 progress 5 % (2 MB)
54 09:27:08.718567 progress 10 % (4 MB)
55 09:27:08.746766 progress 15 % (6 MB)
56 09:27:08.775246 progress 20 % (8 MB)
57 09:27:08.803119 progress 25 % (11 MB)
58 09:27:08.831580 progress 30 % (13 MB)
59 09:27:08.859792 progress 35 % (15 MB)
60 09:27:08.887822 progress 40 % (17 MB)
61 09:27:08.916142 progress 45 % (19 MB)
62 09:27:08.943997 progress 50 % (22 MB)
63 09:27:08.972612 progress 55 % (24 MB)
64 09:27:09.000788 progress 60 % (26 MB)
65 09:27:09.028778 progress 65 % (28 MB)
66 09:27:09.056738 progress 70 % (30 MB)
67 09:27:09.084434 progress 75 % (33 MB)
68 09:27:09.112484 progress 80 % (35 MB)
69 09:27:09.140162 progress 85 % (37 MB)
70 09:27:09.168495 progress 90 % (39 MB)
71 09:27:09.196369 progress 95 % (41 MB)
72 09:27:09.223590 progress 100 % (44 MB)
73 09:27:09.224315 44 MB downloaded in 0.60 s (73.85 MB/s)
74 09:27:09.224827 end: 1.2.1 http-download (duration 00:00:01) [common]
76 09:27:09.225650 end: 1.2 download-retry (duration 00:00:01) [common]
77 09:27:09.225925 start: 1.3 download-retry (timeout 00:09:59) [common]
78 09:27:09.226187 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 09:27:09.226793 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 09:27:09.227103 saving as /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/dtb/meson-g12b-a311d-libretech-cc.dtb
81 09:27:09.227314 total size: 54703 (0 MB)
82 09:27:09.227524 No compression specified
83 09:27:09.267870 progress 59 % (0 MB)
84 09:27:09.268754 progress 100 % (0 MB)
85 09:27:09.269317 0 MB downloaded in 0.04 s (1.24 MB/s)
86 09:27:09.269789 end: 1.3.1 http-download (duration 00:00:00) [common]
88 09:27:09.270596 end: 1.3 download-retry (duration 00:00:00) [common]
89 09:27:09.270856 start: 1.4 download-retry (timeout 00:09:59) [common]
90 09:27:09.271117 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 09:27:09.271565 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/modules.tar.xz
92 09:27:09.271817 saving as /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/modules/modules.tar
93 09:27:09.272048 total size: 11589624 (11 MB)
94 09:27:09.272262 Using unxz to decompress xz
95 09:27:09.308590 progress 0 % (0 MB)
96 09:27:09.374782 progress 5 % (0 MB)
97 09:27:09.448945 progress 10 % (1 MB)
98 09:27:09.530296 progress 15 % (1 MB)
99 09:27:09.609938 progress 20 % (2 MB)
100 09:27:09.687936 progress 25 % (2 MB)
101 09:27:09.768414 progress 30 % (3 MB)
102 09:27:09.841630 progress 35 % (3 MB)
103 09:27:09.921563 progress 40 % (4 MB)
104 09:27:10.006054 progress 45 % (5 MB)
105 09:27:10.082448 progress 50 % (5 MB)
106 09:27:10.164194 progress 55 % (6 MB)
107 09:27:10.243266 progress 60 % (6 MB)
108 09:27:10.322786 progress 65 % (7 MB)
109 09:27:10.401075 progress 70 % (7 MB)
110 09:27:10.484879 progress 75 % (8 MB)
111 09:27:10.561181 progress 80 % (8 MB)
112 09:27:10.640027 progress 85 % (9 MB)
113 09:27:10.711360 progress 90 % (9 MB)
114 09:27:10.812024 progress 95 % (10 MB)
115 09:27:10.902244 progress 100 % (11 MB)
116 09:27:10.915295 11 MB downloaded in 1.64 s (6.73 MB/s)
117 09:27:10.915897 end: 1.4.1 http-download (duration 00:00:02) [common]
119 09:27:10.917490 end: 1.4 download-retry (duration 00:00:02) [common]
120 09:27:10.918009 start: 1.5 prepare-tftp-overlay (timeout 00:09:58) [common]
121 09:27:10.918521 start: 1.5.1 extract-nfsrootfs (timeout 00:09:58) [common]
122 09:27:10.919005 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 09:27:10.919499 start: 1.5.2 lava-overlay (timeout 00:09:58) [common]
124 09:27:10.920833 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37
125 09:27:10.921975 makedir: /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin
126 09:27:10.922778 makedir: /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/tests
127 09:27:10.923569 makedir: /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/results
128 09:27:10.924277 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-add-keys
129 09:27:10.925308 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-add-sources
130 09:27:10.926314 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-background-process-start
131 09:27:10.927332 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-background-process-stop
132 09:27:10.928372 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-common-functions
133 09:27:10.929303 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-echo-ipv4
134 09:27:10.930223 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-install-packages
135 09:27:10.931115 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-installed-packages
136 09:27:10.932056 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-os-build
137 09:27:10.932971 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-probe-channel
138 09:27:10.933852 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-probe-ip
139 09:27:10.934736 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-target-ip
140 09:27:10.935621 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-target-mac
141 09:27:10.936585 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-target-storage
142 09:27:10.937512 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-test-case
143 09:27:10.938408 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-test-event
144 09:27:10.939435 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-test-feedback
145 09:27:10.940390 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-test-raise
146 09:27:10.941274 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-test-reference
147 09:27:10.942186 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-test-runner
148 09:27:10.943080 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-test-set
149 09:27:10.943959 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-test-shell
150 09:27:10.944897 Updating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-install-packages (oe)
151 09:27:10.945853 Updating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/bin/lava-installed-packages (oe)
152 09:27:10.946669 Creating /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/environment
153 09:27:10.947378 LAVA metadata
154 09:27:10.947869 - LAVA_JOB_ID=916875
155 09:27:10.948336 - LAVA_DISPATCHER_IP=192.168.6.2
156 09:27:10.948984 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 09:27:10.950751 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 09:27:10.951351 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 09:27:10.951765 skipped lava-vland-overlay
160 09:27:10.952281 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 09:27:10.952785 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 09:27:10.953206 skipped lava-multinode-overlay
163 09:27:10.953683 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 09:27:10.954177 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 09:27:10.954641 Loading test definitions
166 09:27:10.955179 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 09:27:10.955613 Using /lava-916875 at stage 0
168 09:27:10.957753 uuid=916875_1.5.2.4.1 testdef=None
169 09:27:10.958331 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 09:27:10.958845 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 09:27:10.961226 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 09:27:10.962059 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 09:27:10.964345 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 09:27:10.965229 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 09:27:10.967413 runner path: /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/0/tests/0_dmesg test_uuid 916875_1.5.2.4.1
178 09:27:10.968004 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 09:27:10.968810 Creating lava-test-runner.conf files
181 09:27:10.969014 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/916875/lava-overlay-wf3n2o37/lava-916875/0 for stage 0
182 09:27:10.969352 - 0_dmesg
183 09:27:10.969716 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 09:27:10.970006 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 09:27:10.993431 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 09:27:10.993836 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 09:27:10.994108 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 09:27:10.994376 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 09:27:10.994640 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 09:27:11.961805 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 09:27:11.962326 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 09:27:11.962837 extracting modules file /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/916875/extract-overlay-ramdisk-_ine7039/ramdisk
193 09:27:13.279010 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 09:27:13.279482 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 09:27:13.279795 [common] Applying overlay /var/lib/lava/dispatcher/tmp/916875/compress-overlay-82xoqr26/overlay-1.5.2.5.tar.gz to ramdisk
196 09:27:13.280077 [common] Applying overlay /var/lib/lava/dispatcher/tmp/916875/compress-overlay-82xoqr26/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/916875/extract-overlay-ramdisk-_ine7039/ramdisk
197 09:27:13.309947 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 09:27:13.310352 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 09:27:13.310623 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 09:27:13.310846 Converting downloaded kernel to a uImage
201 09:27:13.311146 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/kernel/Image /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/kernel/uImage
202 09:27:13.824288 output: Image Name:
203 09:27:13.824710 output: Created: Thu Oct 31 09:27:13 2024
204 09:27:13.824921 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 09:27:13.825127 output: Data Size: 46258688 Bytes = 45174.50 KiB = 44.12 MiB
206 09:27:13.825326 output: Load Address: 01080000
207 09:27:13.825523 output: Entry Point: 01080000
208 09:27:13.825720 output:
209 09:27:13.826050 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
210 09:27:13.826314 end: 1.5.6 prepare-kernel (duration 00:00:01) [common]
211 09:27:13.826580 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 09:27:13.826829 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 09:27:13.827081 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 09:27:13.827345 Building ramdisk /var/lib/lava/dispatcher/tmp/916875/extract-overlay-ramdisk-_ine7039/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/916875/extract-overlay-ramdisk-_ine7039/ramdisk
215 09:27:16.424820 >> 181912 blocks
216 09:27:24.822271 Adding RAMdisk u-boot header.
217 09:27:24.822930 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/916875/extract-overlay-ramdisk-_ine7039/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/916875/extract-overlay-ramdisk-_ine7039/ramdisk.cpio.gz.uboot
218 09:27:25.109290 output: Image Name:
219 09:27:25.109709 output: Created: Thu Oct 31 09:27:24 2024
220 09:27:25.109916 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 09:27:25.110119 output: Data Size: 26054842 Bytes = 25444.18 KiB = 24.85 MiB
222 09:27:25.110319 output: Load Address: 00000000
223 09:27:25.110516 output: Entry Point: 00000000
224 09:27:25.110711 output:
225 09:27:25.111285 rename /var/lib/lava/dispatcher/tmp/916875/extract-overlay-ramdisk-_ine7039/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/ramdisk/ramdisk.cpio.gz.uboot
226 09:27:25.111692 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 09:27:25.111969 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 09:27:25.112560 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 09:27:25.113055 No LXC device requested
230 09:27:25.113599 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 09:27:25.114149 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 09:27:25.114681 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 09:27:25.115127 Checking files for TFTP limit of 4294967296 bytes.
234 09:27:25.118055 end: 1 tftp-deploy (duration 00:00:17) [common]
235 09:27:25.118684 start: 2 uboot-action (timeout 00:05:00) [common]
236 09:27:25.119246 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 09:27:25.119785 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 09:27:25.120368 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 09:27:25.120950 Using kernel file from prepare-kernel: 916875/tftp-deploy-tg881lyk/kernel/uImage
240 09:27:25.121626 substitutions:
241 09:27:25.122078 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 09:27:25.122518 - {DTB_ADDR}: 0x01070000
243 09:27:25.122954 - {DTB}: 916875/tftp-deploy-tg881lyk/dtb/meson-g12b-a311d-libretech-cc.dtb
244 09:27:25.123392 - {INITRD}: 916875/tftp-deploy-tg881lyk/ramdisk/ramdisk.cpio.gz.uboot
245 09:27:25.123828 - {KERNEL_ADDR}: 0x01080000
246 09:27:25.124287 - {KERNEL}: 916875/tftp-deploy-tg881lyk/kernel/uImage
247 09:27:25.124722 - {LAVA_MAC}: None
248 09:27:25.125196 - {PRESEED_CONFIG}: None
249 09:27:25.125631 - {PRESEED_LOCAL}: None
250 09:27:25.126064 - {RAMDISK_ADDR}: 0x08000000
251 09:27:25.126490 - {RAMDISK}: 916875/tftp-deploy-tg881lyk/ramdisk/ramdisk.cpio.gz.uboot
252 09:27:25.126924 - {ROOT_PART}: None
253 09:27:25.127353 - {ROOT}: None
254 09:27:25.127781 - {SERVER_IP}: 192.168.6.2
255 09:27:25.128246 - {TEE_ADDR}: 0x83000000
256 09:27:25.128679 - {TEE}: None
257 09:27:25.129109 Parsed boot commands:
258 09:27:25.129523 - setenv autoload no
259 09:27:25.129950 - setenv initrd_high 0xffffffff
260 09:27:25.130374 - setenv fdt_high 0xffffffff
261 09:27:25.130799 - dhcp
262 09:27:25.131226 - setenv serverip 192.168.6.2
263 09:27:25.131652 - tftpboot 0x01080000 916875/tftp-deploy-tg881lyk/kernel/uImage
264 09:27:25.132104 - tftpboot 0x08000000 916875/tftp-deploy-tg881lyk/ramdisk/ramdisk.cpio.gz.uboot
265 09:27:25.132532 - tftpboot 0x01070000 916875/tftp-deploy-tg881lyk/dtb/meson-g12b-a311d-libretech-cc.dtb
266 09:27:25.132959 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 09:27:25.133392 - bootm 0x01080000 0x08000000 0x01070000
268 09:27:25.133934 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 09:27:25.135554 start: 2.3 connect-device (timeout 00:05:00) [common]
271 09:27:25.136056 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 09:27:25.150639 Setting prompt string to ['lava-test: # ']
273 09:27:25.152271 end: 2.3 connect-device (duration 00:00:00) [common]
274 09:27:25.152921 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 09:27:25.153351 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 09:27:25.153659 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 09:27:25.154278 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 09:27:25.192508 >> OK - accepted request
279 09:27:25.194212 Returned 0 in 0 seconds
280 09:27:25.295113 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 09:27:25.296969 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 09:27:25.297592 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 09:27:25.298138 Setting prompt string to ['Hit any key to stop autoboot']
285 09:27:25.298633 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 09:27:25.300373 Trying 192.168.56.21...
287 09:27:25.300894 Connected to conserv1.
288 09:27:25.301335 Escape character is '^]'.
289 09:27:25.301796
290 09:27:25.302252 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 09:27:25.302725
292 09:27:37.398433 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
293 09:27:37.399126 bl2_stage_init 0x01
294 09:27:37.399601 bl2_stage_init 0x81
295 09:27:37.404095 hw id: 0x0000 - pwm id 0x01
296 09:27:37.404665 bl2_stage_init 0xc1
297 09:27:37.405122 bl2_stage_init 0x02
298 09:27:37.405569
299 09:27:37.409444 L0:00000000
300 09:27:37.409945 L1:20000703
301 09:27:37.410377 L2:00008067
302 09:27:37.410802 L3:14000000
303 09:27:37.415018 B2:00402000
304 09:27:37.415481 B1:e0f83180
305 09:27:37.415910
306 09:27:37.416384 TE: 58159
307 09:27:37.416814
308 09:27:37.420631 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
309 09:27:37.421097
310 09:27:37.421528 Board ID = 1
311 09:27:37.426229 Set A53 clk to 24M
312 09:27:37.426685 Set A73 clk to 24M
313 09:27:37.427112 Set clk81 to 24M
314 09:27:37.431832 A53 clk: 1200 MHz
315 09:27:37.432325 A73 clk: 1200 MHz
316 09:27:37.432753 CLK81: 166.6M
317 09:27:37.433175 smccc: 00012ab5
318 09:27:37.437407 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
319 09:27:37.442971 board id: 1
320 09:27:37.448950 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 09:27:37.459581 fw parse done
322 09:27:37.465513 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 09:27:37.508173 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 09:27:37.519070 PIEI prepare done
325 09:27:37.519399 fastboot data load
326 09:27:37.519605 fastboot data verify
327 09:27:37.524628 verify result: 266
328 09:27:37.530247 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
329 09:27:37.530562 LPDDR4 probe
330 09:27:37.530776 ddr clk to 1584MHz
331 09:27:37.538134 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 09:27:37.575460
333 09:27:37.575827 dmc_version 0001
334 09:27:37.582166 Check phy result
335 09:27:37.587970 INFO : End of CA training
336 09:27:37.588423 INFO : End of initialization
337 09:27:37.593572 INFO : Training has run successfully!
338 09:27:37.594051 Check phy result
339 09:27:37.599193 INFO : End of initialization
340 09:27:37.599489 INFO : End of read enable training
341 09:27:37.602544 INFO : End of fine write leveling
342 09:27:37.608154 INFO : End of Write leveling coarse delay
343 09:27:37.613674 INFO : Training has run successfully!
344 09:27:37.614164 Check phy result
345 09:27:37.614556 INFO : End of initialization
346 09:27:37.619228 INFO : End of read dq deskew training
347 09:27:37.622716 INFO : End of MPR read delay center optimization
348 09:27:37.628407 INFO : End of write delay center optimization
349 09:27:37.633897 INFO : End of read delay center optimization
350 09:27:37.634394 INFO : End of max read latency training
351 09:27:37.639466 INFO : Training has run successfully!
352 09:27:37.639927 1D training succeed
353 09:27:37.647735 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 09:27:37.695392 Check phy result
355 09:27:37.695906 INFO : End of initialization
356 09:27:37.717010 INFO : End of 2D read delay Voltage center optimization
357 09:27:37.737103 INFO : End of 2D read delay Voltage center optimization
358 09:27:37.788941 INFO : End of 2D write delay Voltage center optimization
359 09:27:37.838166 INFO : End of 2D write delay Voltage center optimization
360 09:27:37.843576 INFO : Training has run successfully!
361 09:27:37.844072
362 09:27:37.844511 channel==0
363 09:27:37.849258 RxClkDly_Margin_A0==88 ps 9
364 09:27:37.849714 TxDqDly_Margin_A0==98 ps 10
365 09:27:37.854964 RxClkDly_Margin_A1==88 ps 9
366 09:27:37.855430 TxDqDly_Margin_A1==88 ps 9
367 09:27:37.855864 TrainedVREFDQ_A0==74
368 09:27:37.860473 TrainedVREFDQ_A1==74
369 09:27:37.860939 VrefDac_Margin_A0==25
370 09:27:37.861371 DeviceVref_Margin_A0==40
371 09:27:37.866088 VrefDac_Margin_A1==25
372 09:27:37.866540 DeviceVref_Margin_A1==40
373 09:27:37.866974
374 09:27:37.867402
375 09:27:37.867830 channel==1
376 09:27:37.871583 RxClkDly_Margin_A0==98 ps 10
377 09:27:37.872067 TxDqDly_Margin_A0==88 ps 9
378 09:27:37.877228 RxClkDly_Margin_A1==98 ps 10
379 09:27:37.877707 TxDqDly_Margin_A1==88 ps 9
380 09:27:37.882826 TrainedVREFDQ_A0==77
381 09:27:37.883287 TrainedVREFDQ_A1==77
382 09:27:37.883720 VrefDac_Margin_A0==22
383 09:27:37.888416 DeviceVref_Margin_A0==37
384 09:27:37.888869 VrefDac_Margin_A1==24
385 09:27:37.894063 DeviceVref_Margin_A1==37
386 09:27:37.894517
387 09:27:37.894956 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 09:27:37.895387
389 09:27:37.927635 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
390 09:27:37.928214 2D training succeed
391 09:27:37.933306 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 09:27:37.938772 auto size-- 65535DDR cs0 size: 2048MB
393 09:27:37.939235 DDR cs1 size: 2048MB
394 09:27:37.944374 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 09:27:37.944836 cs0 DataBus test pass
396 09:27:37.949991 cs1 DataBus test pass
397 09:27:37.950462 cs0 AddrBus test pass
398 09:27:37.950890 cs1 AddrBus test pass
399 09:27:37.951313
400 09:27:37.955531 100bdlr_step_size ps== 420
401 09:27:37.956025 result report
402 09:27:37.961149 boot times 0Enable ddr reg access
403 09:27:37.966426 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 09:27:37.979953 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
405 09:27:38.551945 0.0;M3 CHK:0;cm4_sp_mode 0
406 09:27:38.552627 MVN_1=0x00000000
407 09:27:38.557367 MVN_2=0x00000000
408 09:27:38.563139 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
409 09:27:38.563638 OPS=0x10
410 09:27:38.564132 ring efuse init
411 09:27:38.564582 chipver efuse init
412 09:27:38.568716 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
413 09:27:38.574306 [0.018961 Inits done]
414 09:27:38.574792 secure task start!
415 09:27:38.575242 high task start!
416 09:27:38.578958 low task start!
417 09:27:38.579444 run into bl31
418 09:27:38.585565 NOTICE: BL31: v1.3(release):4fc40b1
419 09:27:38.593353 NOTICE: BL31: Built : 15:58:17, May 22 2019
420 09:27:38.593841 NOTICE: BL31: G12A normal boot!
421 09:27:38.618737 NOTICE: BL31: BL33 decompress pass
422 09:27:38.624443 ERROR: Error initializing runtime service opteed_fast
423 09:27:39.857441
424 09:27:39.858119
425 09:27:39.865841 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
426 09:27:39.866393
427 09:27:39.866862 Model: Libre Computer AML-A311D-CC Alta
428 09:27:40.074550 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
429 09:27:40.098953 DRAM: 2 GiB (effective 3.8 GiB)
430 09:27:40.242536 Core: 408 devices, 31 uclasses, devicetree: separate
431 09:27:40.246753 WDT: Not starting watchdog@f0d0
432 09:27:40.279166 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
433 09:27:40.291334 Loading Environment from FAT... Card did not respond to voltage select! : -110
434 09:27:40.296168 ** Bad device specification mmc 0 **
435 09:27:40.306706 Card did not respond to voltage select! : -110
436 09:27:40.315519 ** Bad device specification mmc 0 **
437 09:27:40.316093 Couldn't find partition mmc 0
438 09:27:40.322429 Card did not respond to voltage select! : -110
439 09:27:40.327949 ** Bad device specification mmc 0 **
440 09:27:40.329445 Couldn't find partition mmc 0
441 09:27:40.332986 Error: could not access storage.
442 09:27:41.598486 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
443 09:27:41.598911 bl2_stage_init 0x01
444 09:27:41.599135 bl2_stage_init 0x81
445 09:27:41.603920 hw id: 0x0000 - pwm id 0x01
446 09:27:41.604403 bl2_stage_init 0xc1
447 09:27:41.604826 bl2_stage_init 0x02
448 09:27:41.605283
449 09:27:41.609591 L0:00000000
450 09:27:41.609897 L1:20000703
451 09:27:41.610107 L2:00008067
452 09:27:41.610312 L3:14000000
453 09:27:41.615148 B2:00402000
454 09:27:41.615612 B1:e0f83180
455 09:27:41.616046
456 09:27:41.616465 TE: 58159
457 09:27:41.616873
458 09:27:41.620722 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
459 09:27:41.621165
460 09:27:41.621574 Board ID = 1
461 09:27:41.626384 Set A53 clk to 24M
462 09:27:41.626831 Set A73 clk to 24M
463 09:27:41.627241 Set clk81 to 24M
464 09:27:41.631920 A53 clk: 1200 MHz
465 09:27:41.632393 A73 clk: 1200 MHz
466 09:27:41.632803 CLK81: 166.6M
467 09:27:41.633201 smccc: 00012ab5
468 09:27:41.637512 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
469 09:27:41.643120 board id: 1
470 09:27:41.648966 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
471 09:27:41.659635 fw parse done
472 09:27:41.665594 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
473 09:27:41.708269 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
474 09:27:41.719280 PIEI prepare done
475 09:27:41.719742 fastboot data load
476 09:27:41.720198 fastboot data verify
477 09:27:41.724818 verify result: 266
478 09:27:41.730465 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
479 09:27:41.730914 LPDDR4 probe
480 09:27:41.731320 ddr clk to 1584MHz
481 09:27:41.738440 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
482 09:27:41.775681
483 09:27:41.776245 dmc_version 0001
484 09:27:41.782330 Check phy result
485 09:27:41.788211 INFO : End of CA training
486 09:27:41.788686 INFO : End of initialization
487 09:27:41.793826 INFO : Training has run successfully!
488 09:27:41.794304 Check phy result
489 09:27:41.799513 INFO : End of initialization
490 09:27:41.799976 INFO : End of read enable training
491 09:27:41.805026 INFO : End of fine write leveling
492 09:27:41.810618 INFO : End of Write leveling coarse delay
493 09:27:41.811072 INFO : Training has run successfully!
494 09:27:41.811481 Check phy result
495 09:27:41.816203 INFO : End of initialization
496 09:27:41.816667 INFO : End of read dq deskew training
497 09:27:41.821821 INFO : End of MPR read delay center optimization
498 09:27:41.827528 INFO : End of write delay center optimization
499 09:27:41.833015 INFO : End of read delay center optimization
500 09:27:41.833472 INFO : End of max read latency training
501 09:27:41.838628 INFO : Training has run successfully!
502 09:27:41.839083 1D training succeed
503 09:27:41.847824 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
504 09:27:41.895386 Check phy result
505 09:27:41.895876 INFO : End of initialization
506 09:27:41.917118 INFO : End of 2D read delay Voltage center optimization
507 09:27:41.936609 INFO : End of 2D read delay Voltage center optimization
508 09:27:41.988642 INFO : End of 2D write delay Voltage center optimization
509 09:27:42.037893 INFO : End of 2D write delay Voltage center optimization
510 09:27:42.043536 INFO : Training has run successfully!
511 09:27:42.044044
512 09:27:42.044473 channel==0
513 09:27:42.049086 RxClkDly_Margin_A0==88 ps 9
514 09:27:42.049544 TxDqDly_Margin_A0==98 ps 10
515 09:27:42.052409 RxClkDly_Margin_A1==88 ps 9
516 09:27:42.052856 TxDqDly_Margin_A1==88 ps 9
517 09:27:42.057992 TrainedVREFDQ_A0==74
518 09:27:42.058438 TrainedVREFDQ_A1==74
519 09:27:42.058846 VrefDac_Margin_A0==25
520 09:27:42.063591 DeviceVref_Margin_A0==40
521 09:27:42.064062 VrefDac_Margin_A1==25
522 09:27:42.069201 DeviceVref_Margin_A1==40
523 09:27:42.069669
524 09:27:42.070079
525 09:27:42.070477 channel==1
526 09:27:42.070872 RxClkDly_Margin_A0==78 ps 8
527 09:27:42.074803 TxDqDly_Margin_A0==88 ps 9
528 09:27:42.075258 RxClkDly_Margin_A1==88 ps 9
529 09:27:42.080409 TxDqDly_Margin_A1==88 ps 9
530 09:27:42.080859 TrainedVREFDQ_A0==77
531 09:27:42.081265 TrainedVREFDQ_A1==77
532 09:27:42.086021 VrefDac_Margin_A0==23
533 09:27:42.086469 DeviceVref_Margin_A0==37
534 09:27:42.086875 VrefDac_Margin_A1==24
535 09:27:42.091593 DeviceVref_Margin_A1==37
536 09:27:42.092064
537 09:27:42.097211 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
538 09:27:42.097661
539 09:27:42.125198 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000019 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
540 09:27:42.130794 2D training succeed
541 09:27:42.136419 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
542 09:27:42.136894 auto size-- 65535DDR cs0 size: 2048MB
543 09:27:42.142003 DDR cs1 size: 2048MB
544 09:27:42.142466 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
545 09:27:42.147596 cs0 DataBus test pass
546 09:27:42.148089 cs1 DataBus test pass
547 09:27:42.148504 cs0 AddrBus test pass
548 09:27:42.153212 cs1 AddrBus test pass
549 09:27:42.153686
550 09:27:42.154097 100bdlr_step_size ps== 420
551 09:27:42.154508 result report
552 09:27:42.158797 boot times 0Enable ddr reg access
553 09:27:42.166171 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
554 09:27:42.179689 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
555 09:27:42.753458 0.0;M3 CHK:0;cm4_sp_mode 0
556 09:27:42.754095 MVN_1=0x00000000
557 09:27:42.758829 MVN_2=0x00000000
558 09:27:42.764641 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
559 09:27:42.765134 OPS=0x10
560 09:27:42.765550 ring efuse init
561 09:27:42.765973 chipver efuse init
562 09:27:42.770186 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
563 09:27:42.775756 [0.018961 Inits done]
564 09:27:42.776256 secure task start!
565 09:27:42.776649 high task start!
566 09:27:42.780319 low task start!
567 09:27:42.780749 run into bl31
568 09:27:42.786949 NOTICE: BL31: v1.3(release):4fc40b1
569 09:27:42.794796 NOTICE: BL31: Built : 15:58:17, May 22 2019
570 09:27:42.795251 NOTICE: BL31: G12A normal boot!
571 09:27:42.820077 NOTICE: BL31: BL33 decompress pass
572 09:27:42.825799 ERROR: Error initializing runtime service opteed_fast
573 09:27:44.058802
574 09:27:44.059431
575 09:27:44.067299 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
576 09:27:44.067771
577 09:27:44.068232 Model: Libre Computer AML-A311D-CC Alta
578 09:27:44.275619 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
579 09:27:44.299141 DRAM: 2 GiB (effective 3.8 GiB)
580 09:27:44.442065 Core: 408 devices, 31 uclasses, devicetree: separate
581 09:27:44.447877 WDT: Not starting watchdog@f0d0
582 09:27:44.480087 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
583 09:27:44.492563 Loading Environment from FAT... Card did not respond to voltage select! : -110
584 09:27:44.497664 ** Bad device specification mmc 0 **
585 09:27:44.507863 Card did not respond to voltage select! : -110
586 09:27:44.515536 ** Bad device specification mmc 0 **
587 09:27:44.516013 Couldn't find partition mmc 0
588 09:27:44.523858 Card did not respond to voltage select! : -110
589 09:27:44.529349 ** Bad device specification mmc 0 **
590 09:27:44.529798 Couldn't find partition mmc 0
591 09:27:44.534427 Error: could not access storage.
592 09:27:44.876973 Net: eth0: ethernet@ff3f0000
593 09:27:44.877548 starting USB...
594 09:27:45.128711 Bus usb@ff500000: Register 3000140 NbrPorts 3
595 09:27:45.129143 Starting the controller
596 09:27:45.135740 USB XHCI 1.10
597 09:27:46.848774 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
598 09:27:46.849432 bl2_stage_init 0x81
599 09:27:46.854684 hw id: 0x0000 - pwm id 0x01
600 09:27:46.855175 bl2_stage_init 0xc1
601 09:27:46.855598 bl2_stage_init 0x02
602 09:27:46.856054
603 09:27:46.860051 L0:00000000
604 09:27:46.860523 L1:20000703
605 09:27:46.860938 L2:00008067
606 09:27:46.861340 L3:14000000
607 09:27:46.861737 B2:00402000
608 09:27:46.865607 B1:e0f83180
609 09:27:46.866063
610 09:27:46.866470 TE: 58150
611 09:27:46.866873
612 09:27:46.871290 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
613 09:27:46.871756
614 09:27:46.872203 Board ID = 1
615 09:27:46.876800 Set A53 clk to 24M
616 09:27:46.877258 Set A73 clk to 24M
617 09:27:46.877665 Set clk81 to 24M
618 09:27:46.882403 A53 clk: 1200 MHz
619 09:27:46.882862 A73 clk: 1200 MHz
620 09:27:46.883268 CLK81: 166.6M
621 09:27:46.883662 smccc: 00012aac
622 09:27:46.887976 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
623 09:27:46.893605 board id: 1
624 09:27:46.899377 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
625 09:27:46.910113 fw parse done
626 09:27:46.916046 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
627 09:27:46.958658 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
628 09:27:46.969504 PIEI prepare done
629 09:27:46.969960 fastboot data load
630 09:27:46.970367 fastboot data verify
631 09:27:46.975217 verify result: 266
632 09:27:46.980770 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
633 09:27:46.981229 LPDDR4 probe
634 09:27:46.981635 ddr clk to 1584MHz
635 09:27:46.988764 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
636 09:27:47.026039
637 09:27:47.026512 dmc_version 0001
638 09:27:47.032699 Check phy result
639 09:27:47.038565 INFO : End of CA training
640 09:27:47.039026 INFO : End of initialization
641 09:27:47.044253 INFO : Training has run successfully!
642 09:27:47.044713 Check phy result
643 09:27:47.049766 INFO : End of initialization
644 09:27:47.050221 INFO : End of read enable training
645 09:27:47.055362 INFO : End of fine write leveling
646 09:27:47.060998 INFO : End of Write leveling coarse delay
647 09:27:47.061454 INFO : Training has run successfully!
648 09:27:47.061859 Check phy result
649 09:27:47.066539 INFO : End of initialization
650 09:27:47.066995 INFO : End of read dq deskew training
651 09:27:47.072215 INFO : End of MPR read delay center optimization
652 09:27:47.077758 INFO : End of write delay center optimization
653 09:27:47.083358 INFO : End of read delay center optimization
654 09:27:47.083813 INFO : End of max read latency training
655 09:27:47.088994 INFO : Training has run successfully!
656 09:27:47.089446 1D training succeed
657 09:27:47.098116 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
658 09:27:47.145732 Check phy result
659 09:27:47.146201 INFO : End of initialization
660 09:27:47.167406 INFO : End of 2D read delay Voltage center optimization
661 09:27:47.187542 INFO : End of 2D read delay Voltage center optimization
662 09:27:47.239410 INFO : End of 2D write delay Voltage center optimization
663 09:27:47.288561 INFO : End of 2D write delay Voltage center optimization
664 09:27:47.294255 INFO : Training has run successfully!
665 09:27:47.294709
666 09:27:47.295117 channel==0
667 09:27:47.299852 RxClkDly_Margin_A0==88 ps 9
668 09:27:47.300385 TxDqDly_Margin_A0==98 ps 10
669 09:27:47.305568 RxClkDly_Margin_A1==88 ps 9
670 09:27:47.306027 TxDqDly_Margin_A1==88 ps 9
671 09:27:47.306437 TrainedVREFDQ_A0==74
672 09:27:47.311042 TrainedVREFDQ_A1==74
673 09:27:47.311502 VrefDac_Margin_A0==25
674 09:27:47.311908 DeviceVref_Margin_A0==40
675 09:27:47.316606 VrefDac_Margin_A1==25
676 09:27:47.317087 DeviceVref_Margin_A1==40
677 09:27:47.317503
678 09:27:47.317915
679 09:27:47.318319 channel==1
680 09:27:47.322223 RxClkDly_Margin_A0==98 ps 10
681 09:27:47.322667 TxDqDly_Margin_A0==98 ps 10
682 09:27:47.327667 RxClkDly_Margin_A1==98 ps 10
683 09:27:47.328143 TxDqDly_Margin_A1==98 ps 10
684 09:27:47.333374 TrainedVREFDQ_A0==77
685 09:27:47.333823 TrainedVREFDQ_A1==77
686 09:27:47.334233 VrefDac_Margin_A0==22
687 09:27:47.338939 DeviceVref_Margin_A0==37
688 09:27:47.339376 VrefDac_Margin_A1==22
689 09:27:47.344548 DeviceVref_Margin_A1==37
690 09:27:47.345013
691 09:27:47.345425 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
692 09:27:47.350192
693 09:27:47.378209 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
694 09:27:47.378689 2D training succeed
695 09:27:47.383759 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
696 09:27:47.389284 auto size-- 65535DDR cs0 size: 2048MB
697 09:27:47.389756 DDR cs1 size: 2048MB
698 09:27:47.394813 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
699 09:27:47.395292 cs0 DataBus test pass
700 09:27:47.400415 cs1 DataBus test pass
701 09:27:47.400905 cs0 AddrBus test pass
702 09:27:47.401362 cs1 AddrBus test pass
703 09:27:47.401929
704 09:27:47.406115 100bdlr_step_size ps== 420
705 09:27:47.406685 result report
706 09:27:47.411832 boot times 0Enable ddr reg access
707 09:27:47.417243 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
708 09:27:47.430664 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
709 09:27:48.002633 0.0;M3 CHK:0;cm4_sp_mode 0
710 09:27:48.003281 MVN_1=0x00000000
711 09:27:48.008112 MVN_2=0x00000000
712 09:27:48.013839 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
713 09:27:48.014379 OPS=0x10
714 09:27:48.014779 ring efuse init
715 09:27:48.015169 chipver efuse init
716 09:27:48.022077 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
717 09:27:48.022575 [0.018960 Inits done]
718 09:27:48.022969 secure task start!
719 09:27:48.029561 high task start!
720 09:27:48.030032 low task start!
721 09:27:48.030420 run into bl31
722 09:27:48.036363 NOTICE: BL31: v1.3(release):4fc40b1
723 09:27:48.044082 NOTICE: BL31: Built : 15:58:17, May 22 2019
724 09:27:48.044563 NOTICE: BL31: G12A normal boot!
725 09:27:48.069413 NOTICE: BL31: BL33 decompress pass
726 09:27:48.075068 ERROR: Error initializing runtime service opteed_fast
727 09:27:49.307914
728 09:27:49.308527
729 09:27:49.316350 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
730 09:27:49.316848
731 09:27:49.317269 Model: Libre Computer AML-A311D-CC Alta
732 09:27:49.524771 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
733 09:27:49.548160 DRAM: 2 GiB (effective 3.8 GiB)
734 09:27:49.691126 Core: 408 devices, 31 uclasses, devicetree: separate
735 09:27:49.697042 WDT: Not starting watchdog@f0d0
736 09:27:49.729257 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
737 09:27:49.741692 Loading Environment from FAT... Card did not respond to voltage select! : -110
738 09:27:49.746732 ** Bad device specification mmc 0 **
739 09:27:49.757028 Card did not respond to voltage select! : -110
740 09:27:49.764730 ** Bad device specification mmc 0 **
741 09:27:49.765210 Couldn't find partition mmc 0
742 09:27:49.773027 Card did not respond to voltage select! : -110
743 09:27:49.778603 ** Bad device specification mmc 0 **
744 09:27:49.779088 Couldn't find partition mmc 0
745 09:27:49.783685 Error: could not access storage.
746 09:27:50.126023 Net: eth0: ethernet@ff3f0000
747 09:27:50.126547 starting USB...
748 09:27:50.377891 Bus usb@ff500000: Register 3000140 NbrPorts 3
749 09:27:50.378413 Starting the controller
750 09:27:50.384913 USB XHCI 1.10
751 09:27:52.548817 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
752 09:27:52.549421 bl2_stage_init 0x01
753 09:27:52.549848 bl2_stage_init 0x81
754 09:27:52.554458 hw id: 0x0000 - pwm id 0x01
755 09:27:52.554941 bl2_stage_init 0xc1
756 09:27:52.555363 bl2_stage_init 0x02
757 09:27:52.555771
758 09:27:52.559968 L0:00000000
759 09:27:52.560474 L1:20000703
760 09:27:52.560889 L2:00008067
761 09:27:52.561295 L3:14000000
762 09:27:52.565593 B2:00402000
763 09:27:52.566072 B1:e0f83180
764 09:27:52.566483
765 09:27:52.566886 TE: 58167
766 09:27:52.567286
767 09:27:52.571130 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
768 09:27:52.571618
769 09:27:52.572067 Board ID = 1
770 09:27:52.576803 Set A53 clk to 24M
771 09:27:52.577281 Set A73 clk to 24M
772 09:27:52.577696 Set clk81 to 24M
773 09:27:52.582440 A53 clk: 1200 MHz
774 09:27:52.582919 A73 clk: 1200 MHz
775 09:27:52.583333 CLK81: 166.6M
776 09:27:52.583733 smccc: 00012abe
777 09:27:52.588066 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
778 09:27:52.593538 board id: 1
779 09:27:52.599535 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
780 09:27:52.610224 fw parse done
781 09:27:52.616269 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
782 09:27:52.658551 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
783 09:27:52.669479 PIEI prepare done
784 09:27:52.669961 fastboot data load
785 09:27:52.670377 fastboot data verify
786 09:27:52.675156 verify result: 266
787 09:27:52.680747 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
788 09:27:52.681233 LPDDR4 probe
789 09:27:52.681642 ddr clk to 1584MHz
790 09:27:52.688704 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
791 09:27:52.726060
792 09:27:52.726544 dmc_version 0001
793 09:27:52.732680 Check phy result
794 09:27:52.738556 INFO : End of CA training
795 09:27:52.739051 INFO : End of initialization
796 09:27:52.744202 INFO : Training has run successfully!
797 09:27:52.744679 Check phy result
798 09:27:52.749749 INFO : End of initialization
799 09:27:52.750226 INFO : End of read enable training
800 09:27:52.755351 INFO : End of fine write leveling
801 09:27:52.760972 INFO : End of Write leveling coarse delay
802 09:27:52.761451 INFO : Training has run successfully!
803 09:27:52.761863 Check phy result
804 09:27:52.766567 INFO : End of initialization
805 09:27:52.767046 INFO : End of read dq deskew training
806 09:27:52.772182 INFO : End of MPR read delay center optimization
807 09:27:52.777741 INFO : End of write delay center optimization
808 09:27:52.783350 INFO : End of read delay center optimization
809 09:27:52.783834 INFO : End of max read latency training
810 09:27:52.788994 INFO : Training has run successfully!
811 09:27:52.789475 1D training succeed
812 09:27:52.798134 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
813 09:27:52.845697 Check phy result
814 09:27:52.846178 INFO : End of initialization
815 09:27:52.868239 INFO : End of 2D read delay Voltage center optimization
816 09:27:52.888269 INFO : End of 2D read delay Voltage center optimization
817 09:27:52.940254 INFO : End of 2D write delay Voltage center optimization
818 09:27:52.989394 INFO : End of 2D write delay Voltage center optimization
819 09:27:52.995004 INFO : Training has run successfully!
820 09:27:52.995477
821 09:27:52.995892 channel==0
822 09:27:53.000559 RxClkDly_Margin_A0==88 ps 9
823 09:27:53.001041 TxDqDly_Margin_A0==98 ps 10
824 09:27:53.006178 RxClkDly_Margin_A1==88 ps 9
825 09:27:53.006659 TxDqDly_Margin_A1==98 ps 10
826 09:27:53.007094 TrainedVREFDQ_A0==74
827 09:27:53.011820 TrainedVREFDQ_A1==74
828 09:27:53.012358 VrefDac_Margin_A0==25
829 09:27:53.012779 DeviceVref_Margin_A0==40
830 09:27:53.017443 VrefDac_Margin_A1==24
831 09:27:53.018005 DeviceVref_Margin_A1==40
832 09:27:53.018408
833 09:27:53.018805
834 09:27:53.023163 channel==1
835 09:27:53.023834 RxClkDly_Margin_A0==98 ps 10
836 09:27:53.024311 TxDqDly_Margin_A0==88 ps 9
837 09:27:53.028697 RxClkDly_Margin_A1==98 ps 10
838 09:27:53.029310 TxDqDly_Margin_A1==88 ps 9
839 09:27:53.034227 TrainedVREFDQ_A0==77
840 09:27:53.034626 TrainedVREFDQ_A1==77
841 09:27:53.034831 VrefDac_Margin_A0==22
842 09:27:53.040016 DeviceVref_Margin_A0==37
843 09:27:53.040459 VrefDac_Margin_A1==22
844 09:27:53.046150 DeviceVref_Margin_A1==37
845 09:27:53.046659
846 09:27:53.046868 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
847 09:27:53.048051
848 09:27:53.080666 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 0000005f
849 09:27:53.081336 2D training succeed
850 09:27:53.084756 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
851 09:27:53.090292 auto size-- 65535DDR cs0 size: 2048MB
852 09:27:53.090940 DDR cs1 size: 2048MB
853 09:27:53.095896 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
854 09:27:53.096508 cs0 DataBus test pass
855 09:27:53.101454 cs1 DataBus test pass
856 09:27:53.102057 cs0 AddrBus test pass
857 09:27:53.102504 cs1 AddrBus test pass
858 09:27:53.102942
859 09:27:53.107096 100bdlr_step_size ps== 420
860 09:27:53.107673 result report
861 09:27:53.112642 boot times 0Enable ddr reg access
862 09:27:53.118059 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
863 09:27:53.131538 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
864 09:27:53.703494 0.0;M3 CHK:0;cm4_sp_mode 0
865 09:27:53.704236 MVN_1=0x00000000
866 09:27:53.708871 MVN_2=0x00000000
867 09:27:53.714625 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
868 09:27:53.715158 OPS=0x10
869 09:27:53.715606 ring efuse init
870 09:27:53.716082 chipver efuse init
871 09:27:53.720223 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
872 09:27:53.725756 [0.018961 Inits done]
873 09:27:53.726259 secure task start!
874 09:27:53.726690 high task start!
875 09:27:53.730321 low task start!
876 09:27:53.730820 run into bl31
877 09:27:53.737204 NOTICE: BL31: v1.3(release):4fc40b1
878 09:27:53.744869 NOTICE: BL31: Built : 15:58:17, May 22 2019
879 09:27:53.745419 NOTICE: BL31: G12A normal boot!
880 09:27:53.770180 NOTICE: BL31: BL33 decompress pass
881 09:27:53.775868 ERROR: Error initializing runtime service opteed_fast
882 09:27:55.008746
883 09:27:55.009356
884 09:27:55.017205 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
885 09:27:55.017719
886 09:27:55.018218 Model: Libre Computer AML-A311D-CC Alta
887 09:27:55.225505 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
888 09:27:55.248933 DRAM: 2 GiB (effective 3.8 GiB)
889 09:27:55.391954 Core: 408 devices, 31 uclasses, devicetree: separate
890 09:27:55.397826 WDT: Not starting watchdog@f0d0
891 09:27:55.430144 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
892 09:27:55.442542 Loading Environment from FAT... Card did not respond to voltage select! : -110
893 09:27:55.447526 ** Bad device specification mmc 0 **
894 09:27:55.457838 Card did not respond to voltage select! : -110
895 09:27:55.465496 ** Bad device specification mmc 0 **
896 09:27:55.465977 Couldn't find partition mmc 0
897 09:27:55.473839 Card did not respond to voltage select! : -110
898 09:27:55.479374 ** Bad device specification mmc 0 **
899 09:27:55.479849 Couldn't find partition mmc 0
900 09:27:55.484447 Error: could not access storage.
901 09:27:55.826879 Net: eth0: ethernet@ff3f0000
902 09:27:55.827436 starting USB...
903 09:27:56.078633 Bus usb@ff500000: Register 3000140 NbrPorts 3
904 09:27:56.079144 Starting the controller
905 09:27:56.085653 USB XHCI 1.10
906 09:27:57.948779 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
907 09:27:57.949414 bl2_stage_init 0x01
908 09:27:57.949876 bl2_stage_init 0x81
909 09:27:57.954337 hw id: 0x0000 - pwm id 0x01
910 09:27:57.954819 bl2_stage_init 0xc1
911 09:27:57.955269 bl2_stage_init 0x02
912 09:27:57.955712
913 09:27:57.959856 L0:00000000
914 09:27:57.960381 L1:20000703
915 09:27:57.960829 L2:00008067
916 09:27:57.961266 L3:14000000
917 09:27:57.962909 B2:00402000
918 09:27:57.963382 B1:e0f83180
919 09:27:57.963832
920 09:27:57.964314 TE: 58124
921 09:27:57.964762
922 09:27:57.974057 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
923 09:27:57.974558
924 09:27:57.975013 Board ID = 1
925 09:27:57.975449 Set A53 clk to 24M
926 09:27:57.975884 Set A73 clk to 24M
927 09:27:57.979675 Set clk81 to 24M
928 09:27:57.980179 A53 clk: 1200 MHz
929 09:27:57.980624 A73 clk: 1200 MHz
930 09:27:57.983101 CLK81: 166.6M
931 09:27:57.983567 smccc: 00012a92
932 09:27:57.988661 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
933 09:27:57.994246 board id: 1
934 09:27:57.999290 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
935 09:27:58.010042 fw parse done
936 09:27:58.016028 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
937 09:27:58.058574 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
938 09:27:58.069434 PIEI prepare done
939 09:27:58.069900 fastboot data load
940 09:27:58.070331 fastboot data verify
941 09:27:58.075033 verify result: 266
942 09:27:58.080658 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
943 09:27:58.081120 LPDDR4 probe
944 09:27:58.081544 ddr clk to 1584MHz
945 09:27:58.088647 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
946 09:27:58.125895
947 09:27:58.126396 dmc_version 0001
948 09:27:58.132568 Check phy result
949 09:27:58.138418 INFO : End of CA training
950 09:27:58.138876 INFO : End of initialization
951 09:27:58.144065 INFO : Training has run successfully!
952 09:27:58.144532 Check phy result
953 09:27:58.149687 INFO : End of initialization
954 09:27:58.150211 INFO : End of read enable training
955 09:27:58.155221 INFO : End of fine write leveling
956 09:27:58.160851 INFO : End of Write leveling coarse delay
957 09:27:58.161334 INFO : Training has run successfully!
958 09:27:58.161778 Check phy result
959 09:27:58.166428 INFO : End of initialization
960 09:27:58.166900 INFO : End of read dq deskew training
961 09:27:58.172038 INFO : End of MPR read delay center optimization
962 09:27:58.177662 INFO : End of write delay center optimization
963 09:27:58.183260 INFO : End of read delay center optimization
964 09:27:58.183735 INFO : End of max read latency training
965 09:27:58.188874 INFO : Training has run successfully!
966 09:27:58.189436 1D training succeed
967 09:27:58.198063 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
968 09:27:58.245581 Check phy result
969 09:27:58.246070 INFO : End of initialization
970 09:27:58.267235 INFO : End of 2D read delay Voltage center optimization
971 09:27:58.286436 INFO : End of 2D read delay Voltage center optimization
972 09:27:58.338356 INFO : End of 2D write delay Voltage center optimization
973 09:27:58.387599 INFO : End of 2D write delay Voltage center optimization
974 09:27:58.393228 INFO : Training has run successfully!
975 09:27:58.393715
976 09:27:58.394168 channel==0
977 09:27:58.398889 RxClkDly_Margin_A0==88 ps 9
978 09:27:58.399361 TxDqDly_Margin_A0==98 ps 10
979 09:27:58.402128 RxClkDly_Margin_A1==88 ps 9
980 09:27:58.402603 TxDqDly_Margin_A1==98 ps 10
981 09:27:58.407659 TrainedVREFDQ_A0==74
982 09:27:58.408163 TrainedVREFDQ_A1==75
983 09:27:58.413175 VrefDac_Margin_A0==25
984 09:27:58.413651 DeviceVref_Margin_A0==40
985 09:27:58.414091 VrefDac_Margin_A1==25
986 09:27:58.418963 DeviceVref_Margin_A1==39
987 09:27:58.419431
988 09:27:58.419875
989 09:27:58.420359 channel==1
990 09:27:58.420800 RxClkDly_Margin_A0==98 ps 10
991 09:27:58.424417 TxDqDly_Margin_A0==88 ps 9
992 09:27:58.424891 RxClkDly_Margin_A1==88 ps 9
993 09:27:58.430057 TxDqDly_Margin_A1==108 ps 11
994 09:27:58.430543 TrainedVREFDQ_A0==77
995 09:27:58.430986 TrainedVREFDQ_A1==77
996 09:27:58.435662 VrefDac_Margin_A0==23
997 09:27:58.436165 DeviceVref_Margin_A0==37
998 09:27:58.441180 VrefDac_Margin_A1==24
999 09:27:58.441649 DeviceVref_Margin_A1==37
1000 09:27:58.442088
1001 09:27:58.446915 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1002 09:27:58.447389
1003 09:27:58.474824 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
1004 09:27:58.480304 2D training succeed
1005 09:27:58.485895 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1006 09:27:58.486372 auto size-- 65535DDR cs0 size: 2048MB
1007 09:27:58.491477 DDR cs1 size: 2048MB
1008 09:27:58.491949 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1009 09:27:58.497111 cs0 DataBus test pass
1010 09:27:58.497579 cs1 DataBus test pass
1011 09:27:58.498022 cs0 AddrBus test pass
1012 09:27:58.502799 cs1 AddrBus test pass
1013 09:27:58.503268
1014 09:27:58.503719 100bdlr_step_size ps== 420
1015 09:27:58.504290 result report
1016 09:27:58.508314 boot times 0Enable ddr reg access
1017 09:27:58.516161 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1018 09:27:58.529579 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1019 09:27:59.101734 0.0;M3 CHK:0;cm4_sp_mode 0
1020 09:27:59.102322 MVN_1=0x00000000
1021 09:27:59.107134 MVN_2=0x00000000
1022 09:27:59.112865 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1023 09:27:59.113350 OPS=0x10
1024 09:27:59.113805 ring efuse init
1025 09:27:59.114245 chipver efuse init
1026 09:27:59.118464 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1027 09:27:59.124108 [0.018961 Inits done]
1028 09:27:59.124588 secure task start!
1029 09:27:59.125039 high task start!
1030 09:27:59.128651 low task start!
1031 09:27:59.129138 run into bl31
1032 09:27:59.135277 NOTICE: BL31: v1.3(release):4fc40b1
1033 09:27:59.143077 NOTICE: BL31: Built : 15:58:17, May 22 2019
1034 09:27:59.143558 NOTICE: BL31: G12A normal boot!
1035 09:27:59.168419 NOTICE: BL31: BL33 decompress pass
1036 09:27:59.174086 ERROR: Error initializing runtime service opteed_fast
1037 09:28:00.407085
1038 09:28:00.407674
1039 09:28:00.415387 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1040 09:28:00.415927
1041 09:28:00.416508 Model: Libre Computer AML-A311D-CC Alta
1042 09:28:00.623776 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1043 09:28:00.647231 DRAM: 2 GiB (effective 3.8 GiB)
1044 09:28:00.790192 Core: 408 devices, 31 uclasses, devicetree: separate
1045 09:28:00.796186 WDT: Not starting watchdog@f0d0
1046 09:28:00.828321 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1047 09:28:00.840802 Loading Environment from FAT... Card did not respond to voltage select! : -110
1048 09:28:00.845773 ** Bad device specification mmc 0 **
1049 09:28:00.856133 Card did not respond to voltage select! : -110
1050 09:28:00.863767 ** Bad device specification mmc 0 **
1051 09:28:00.864304 Couldn't find partition mmc 0
1052 09:28:00.872131 Card did not respond to voltage select! : -110
1053 09:28:00.877619 ** Bad device specification mmc 0 **
1054 09:28:00.878100 Couldn't find partition mmc 0
1055 09:28:00.882697 Error: could not access storage.
1056 09:28:01.225144 Net: eth0: ethernet@ff3f0000
1057 09:28:01.225675 starting USB...
1058 09:28:01.476959 Bus usb@ff500000: Register 3000140 NbrPorts 3
1059 09:28:01.477516 Starting the controller
1060 09:28:01.483911 USB XHCI 1.10
1061 09:28:03.040258 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1062 09:28:03.048609 scanning usb for storage devices... 0 Storage Device(s) found
1064 09:28:03.100341 Hit any key to stop autoboot: 1
1065 09:28:03.101129 end: 2.4.2 bootloader-interrupt (duration 00:00:38) [common]
1066 09:28:03.101741 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1067 09:28:03.102233 Setting prompt string to ['=>']
1068 09:28:03.102737 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1069 09:28:03.116078 0
1070 09:28:03.116982 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1071 09:28:03.117510 Sending with 10 millisecond of delay
1073 09:28:04.252322 => setenv autoload no
1074 09:28:04.263175 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1075 09:28:04.268546 setenv autoload no
1076 09:28:04.269347 Sending with 10 millisecond of delay
1078 09:28:06.066183 => setenv initrd_high 0xffffffff
1079 09:28:06.076996 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1080 09:28:06.077912 setenv initrd_high 0xffffffff
1081 09:28:06.078672 Sending with 10 millisecond of delay
1083 09:28:07.694977 => setenv fdt_high 0xffffffff
1084 09:28:07.705786 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1085 09:28:07.706671 setenv fdt_high 0xffffffff
1086 09:28:07.707433 Sending with 10 millisecond of delay
1088 09:28:07.999368 => dhcp
1089 09:28:08.010081 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1090 09:28:08.010938 dhcp
1091 09:28:08.011410 Speed: 1000, full duplex
1092 09:28:08.011869 BOOTP broadcast 1
1093 09:28:08.018303 DHCP client bound to address 192.168.6.27 (8 ms)
1094 09:28:08.019082 Sending with 10 millisecond of delay
1096 09:28:09.695532 => setenv serverip 192.168.6.2
1097 09:28:09.706401 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:15)
1098 09:28:09.707343 setenv serverip 192.168.6.2
1099 09:28:09.708099 Sending with 10 millisecond of delay
1101 09:28:13.431255 => tftpboot 0x01080000 916875/tftp-deploy-tg881lyk/kernel/uImage
1102 09:28:13.442093 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1103 09:28:13.442996 tftpboot 0x01080000 916875/tftp-deploy-tg881lyk/kernel/uImage
1104 09:28:13.443488 Speed: 1000, full duplex
1105 09:28:13.443945 Using ethernet@ff3f0000 device
1106 09:28:13.445156 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1107 09:28:13.450477 Filename '916875/tftp-deploy-tg881lyk/kernel/uImage'.
1108 09:28:13.454340 Load address: 0x1080000
1109 09:28:16.401195 Loading: *################################################## 44.1 MiB
1110 09:28:16.401849 15 MiB/s
1111 09:28:16.402326 done
1112 09:28:16.405520 Bytes transferred = 46258752 (2c1da40 hex)
1113 09:28:16.406357 Sending with 10 millisecond of delay
1115 09:28:21.092919 => tftpboot 0x08000000 916875/tftp-deploy-tg881lyk/ramdisk/ramdisk.cpio.gz.uboot
1116 09:28:21.103745 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1117 09:28:21.104679 tftpboot 0x08000000 916875/tftp-deploy-tg881lyk/ramdisk/ramdisk.cpio.gz.uboot
1118 09:28:21.105170 Speed: 1000, full duplex
1119 09:28:21.105625 Using ethernet@ff3f0000 device
1120 09:28:21.106618 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1121 09:28:21.115257 Filename '916875/tftp-deploy-tg881lyk/ramdisk/ramdisk.cpio.gz.uboot'.
1122 09:28:21.115787 Load address: 0x8000000
1123 09:28:28.495171 Loading: *###############T ################################### 24.8 MiB
1124 09:28:28.495835 3.4 MiB/s
1125 09:28:28.496362 done
1126 09:28:28.499697 Bytes transferred = 26054906 (18d90fa hex)
1127 09:28:28.500550 Sending with 10 millisecond of delay
1129 09:28:33.668162 => tftpboot 0x01070000 916875/tftp-deploy-tg881lyk/dtb/meson-g12b-a311d-libretech-cc.dtb
1130 09:28:33.678963 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:03:51)
1131 09:28:33.679847 tftpboot 0x01070000 916875/tftp-deploy-tg881lyk/dtb/meson-g12b-a311d-libretech-cc.dtb
1132 09:28:33.680393 Speed: 1000, full duplex
1133 09:28:33.680847 Using ethernet@ff3f0000 device
1134 09:28:33.684214 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1135 09:28:33.696718 Filename '916875/tftp-deploy-tg881lyk/dtb/meson-g12b-a311d-libretech-cc.dtb'.
1136 09:28:33.697254 Load address: 0x1070000
1137 09:28:33.713097 Loading: *################################################## 53.4 KiB
1138 09:28:33.713609 2.9 MiB/s
1139 09:28:33.714063 done
1140 09:28:33.719582 Bytes transferred = 54703 (d5af hex)
1141 09:28:33.720391 Sending with 10 millisecond of delay
1143 09:28:41.356130 => setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
1144 09:28:41.366951 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:03:44)
1145 09:28:41.367797 setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
1146 09:28:41.368610 Sending with 10 millisecond of delay
1148 09:28:43.707177 => bootm 0x01080000 0x08000000 0x01070000
1149 09:28:43.717981 Setting prompt string to ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1150 09:28:43.718554 bootloader-commands: Wait for prompt ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:03:41)
1151 09:28:43.719656 bootm 0x01080000 0x08000000 0x01070000
1152 09:28:43.720205 ## Booting kernel from Legacy Image at 01080000 ...
1153 09:28:43.722828 Image Name:
1154 09:28:43.728350 Image Type: AArch64 Linux Kernel Image (uncompressed)
1155 09:28:43.728829 Data Size: 46258688 Bytes = 44.1 MiB
1156 09:28:43.730432 Load Address: 01080000
1157 09:28:43.737275 Entry Point: 01080000
1158 09:28:43.931336 Verifying Checksum ... OK
1159 09:28:43.931875 ## Loading init Ramdisk from Legacy Image at 08000000 ...
1160 09:28:43.936805 Image Name:
1161 09:28:43.942314 Image Type: AArch64 Linux RAMDisk Image (uncompressed)
1162 09:28:43.942788 Data Size: 26054842 Bytes = 24.8 MiB
1163 09:28:43.947822 Load Address: 00000000
1164 09:28:43.948320 Entry Point: 00000000
1165 09:28:44.061143 Verifying Checksum ... OK
1166 09:28:44.061629 ## Flattened Device Tree blob at 01070000
1167 09:28:44.066481 Booting using the fdt blob at 0x1070000
1168 09:28:44.066956 Working FDT set to 1070000
1169 09:28:44.070123 Loading Kernel Image
1170 09:28:44.236079 Loading Ramdisk to 7e726000, end 7ffff0ba ... OK
1171 09:28:44.244502 Loading Device Tree to 000000007e715000, end 000000007e7255ae ... OK
1172 09:28:44.244980 Working FDT set to 7e715000
1173 09:28:44.245425
1174 09:28:44.246351 end: 2.4.3 bootloader-commands (duration 00:00:41) [common]
1175 09:28:44.246971 start: 2.4.4 auto-login-action (timeout 00:03:41) [common]
1176 09:28:44.247473 Setting prompt string to ['Linux version [0-9]']
1177 09:28:44.247974 Setting prompt string to ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1178 09:28:44.248530 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:05:00)
1179 09:28:44.249630 Starting kernel ...
1180 09:28:44.250105
1182 09:32:25.248096 end: 2.4.4 auto-login-action (duration 00:03:41) [common]
1185 09:32:25.250199 end: 2.4 uboot-commands (duration 00:05:00) [common]
1187 09:32:25.251703 uboot-action failed: 1 of 1 attempts. 'auto-login-action timed out after 221 seconds'
1189 09:32:25.252901 end: 2 uboot-action (duration 00:05:00) [common]
1191 09:32:25.254589 Cleaning after the job
1192 09:32:25.255187 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/ramdisk
1193 09:32:25.272205 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/kernel
1194 09:32:25.316604 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/dtb
1195 09:32:25.317360 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/916875/tftp-deploy-tg881lyk/modules
1196 09:32:25.336655 start: 4.1 power-off (timeout 00:00:30) [common]
1197 09:32:25.337274 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1198 09:32:25.370020 >> OK - accepted request
1199 09:32:25.372317 Returned 0 in 0 seconds
1200 09:32:25.473063 end: 4.1 power-off (duration 00:00:00) [common]
1202 09:32:25.473968 start: 4.2 read-feedback (timeout 00:10:00) [common]
1203 09:32:25.474597 Listened to connection for namespace 'common' for up to 1s
1204 09:32:26.475553 Finalising connection for namespace 'common'
1205 09:32:26.476239 Disconnecting from shell: Finalise
1206 09:32:26.577208 end: 4.2 read-feedback (duration 00:00:01) [common]
1207 09:32:26.577876 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/916875
1208 09:32:26.860671 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/916875
1209 09:32:26.861255 JobError: Your job cannot terminate cleanly.