Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:41:08.056629 lava-dispatcher, installed at version: 2024.01
2 09:41:08.057416 start: 0 validate
3 09:41:08.057883 Start time: 2024-10-31 09:41:08.057855+00:00 (UTC)
4 09:41:08.058440 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:41:08.058998 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:41:08.100973 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:41:08.101537 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 09:41:08.134074 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:41:08.134711 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:41:08.168377 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:41:08.168876 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:41:08.198653 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:41:08.199159 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
14 09:41:08.239079 validate duration: 0.18
16 09:41:08.240642 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:41:08.241258 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:41:08.241875 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:41:08.242832 Not decompressing ramdisk as can be used compressed.
20 09:41:08.243621 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 09:41:08.244182 saving as /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/ramdisk/initrd.cpio.gz
22 09:41:08.244712 total size: 5628182 (5 MB)
23 09:41:08.289133 progress 0 % (0 MB)
24 09:41:08.295843 progress 5 % (0 MB)
25 09:41:08.303616 progress 10 % (0 MB)
26 09:41:08.310475 progress 15 % (0 MB)
27 09:41:08.318078 progress 20 % (1 MB)
28 09:41:08.322584 progress 25 % (1 MB)
29 09:41:08.326582 progress 30 % (1 MB)
30 09:41:08.330566 progress 35 % (1 MB)
31 09:41:08.334207 progress 40 % (2 MB)
32 09:41:08.338285 progress 45 % (2 MB)
33 09:41:08.341850 progress 50 % (2 MB)
34 09:41:08.345762 progress 55 % (2 MB)
35 09:41:08.349726 progress 60 % (3 MB)
36 09:41:08.353285 progress 65 % (3 MB)
37 09:41:08.357229 progress 70 % (3 MB)
38 09:41:08.360819 progress 75 % (4 MB)
39 09:41:08.364731 progress 80 % (4 MB)
40 09:41:08.368338 progress 85 % (4 MB)
41 09:41:08.372278 progress 90 % (4 MB)
42 09:41:08.376133 progress 95 % (5 MB)
43 09:41:08.379360 progress 100 % (5 MB)
44 09:41:08.380028 5 MB downloaded in 0.14 s (39.67 MB/s)
45 09:41:08.380593 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:41:08.381494 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:41:08.381786 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:41:08.382054 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:41:08.382600 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/kernel/Image
51 09:41:08.382857 saving as /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/kernel/Image
52 09:41:08.383067 total size: 46258688 (44 MB)
53 09:41:08.383279 No compression specified
54 09:41:08.416659 progress 0 % (0 MB)
55 09:41:08.447210 progress 5 % (2 MB)
56 09:41:08.477595 progress 10 % (4 MB)
57 09:41:08.506171 progress 15 % (6 MB)
58 09:41:08.534966 progress 20 % (8 MB)
59 09:41:08.563306 progress 25 % (11 MB)
60 09:41:08.592107 progress 30 % (13 MB)
61 09:41:08.620916 progress 35 % (15 MB)
62 09:41:08.649437 progress 40 % (17 MB)
63 09:41:08.678114 progress 45 % (19 MB)
64 09:41:08.706847 progress 50 % (22 MB)
65 09:41:08.735614 progress 55 % (24 MB)
66 09:41:08.764749 progress 60 % (26 MB)
67 09:41:08.793015 progress 65 % (28 MB)
68 09:41:08.821637 progress 70 % (30 MB)
69 09:41:08.850116 progress 75 % (33 MB)
70 09:41:08.878566 progress 80 % (35 MB)
71 09:41:08.907015 progress 85 % (37 MB)
72 09:41:08.935854 progress 90 % (39 MB)
73 09:41:08.964445 progress 95 % (41 MB)
74 09:41:08.992464 progress 100 % (44 MB)
75 09:41:08.993206 44 MB downloaded in 0.61 s (72.31 MB/s)
76 09:41:08.993687 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:41:08.994511 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:41:08.994787 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:41:08.995056 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:41:08.995538 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 09:41:08.995802 saving as /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/dtb/meson-g12b-a311d-libretech-cc.dtb
83 09:41:08.996034 total size: 54703 (0 MB)
84 09:41:08.996248 No compression specified
85 09:41:09.035600 progress 59 % (0 MB)
86 09:41:09.036544 progress 100 % (0 MB)
87 09:41:09.037166 0 MB downloaded in 0.04 s (1.27 MB/s)
88 09:41:09.037690 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:41:09.038519 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:41:09.038785 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:41:09.039053 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:41:09.039524 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 09:41:09.039763 saving as /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/nfsrootfs/full.rootfs.tar
95 09:41:09.039966 total size: 107552908 (102 MB)
96 09:41:09.040214 Using unxz to decompress xz
97 09:41:09.077625 progress 0 % (0 MB)
98 09:41:09.721231 progress 5 % (5 MB)
99 09:41:10.445388 progress 10 % (10 MB)
100 09:41:11.173014 progress 15 % (15 MB)
101 09:41:11.927279 progress 20 % (20 MB)
102 09:41:12.494518 progress 25 % (25 MB)
103 09:41:13.113549 progress 30 % (30 MB)
104 09:41:13.847130 progress 35 % (35 MB)
105 09:41:14.195261 progress 40 % (41 MB)
106 09:41:14.627835 progress 45 % (46 MB)
107 09:41:15.320434 progress 50 % (51 MB)
108 09:41:16.013031 progress 55 % (56 MB)
109 09:41:16.765048 progress 60 % (61 MB)
110 09:41:17.520883 progress 65 % (66 MB)
111 09:41:18.252147 progress 70 % (71 MB)
112 09:41:19.049622 progress 75 % (76 MB)
113 09:41:19.737881 progress 80 % (82 MB)
114 09:41:20.456588 progress 85 % (87 MB)
115 09:41:21.185243 progress 90 % (92 MB)
116 09:41:21.892305 progress 95 % (97 MB)
117 09:41:22.634206 progress 100 % (102 MB)
118 09:41:22.645960 102 MB downloaded in 13.61 s (7.54 MB/s)
119 09:41:22.646529 end: 1.4.1 http-download (duration 00:00:14) [common]
121 09:41:22.647399 end: 1.4 download-retry (duration 00:00:14) [common]
122 09:41:22.647667 start: 1.5 download-retry (timeout 00:09:46) [common]
123 09:41:22.647943 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 09:41:22.649237 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/modules.tar.xz
125 09:41:22.649741 saving as /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/modules/modules.tar
126 09:41:22.650170 total size: 11589624 (11 MB)
127 09:41:22.650615 Using unxz to decompress xz
128 09:41:22.688826 progress 0 % (0 MB)
129 09:41:22.755686 progress 5 % (0 MB)
130 09:41:22.829526 progress 10 % (1 MB)
131 09:41:22.909021 progress 15 % (1 MB)
132 09:41:22.986194 progress 20 % (2 MB)
133 09:41:23.062374 progress 25 % (2 MB)
134 09:41:23.141565 progress 30 % (3 MB)
135 09:41:23.213575 progress 35 % (3 MB)
136 09:41:23.292472 progress 40 % (4 MB)
137 09:41:23.377581 progress 45 % (5 MB)
138 09:41:23.454926 progress 50 % (5 MB)
139 09:41:23.537650 progress 55 % (6 MB)
140 09:41:23.617291 progress 60 % (6 MB)
141 09:41:23.696404 progress 65 % (7 MB)
142 09:41:23.774952 progress 70 % (7 MB)
143 09:41:23.857991 progress 75 % (8 MB)
144 09:41:23.934465 progress 80 % (8 MB)
145 09:41:24.014666 progress 85 % (9 MB)
146 09:41:24.086488 progress 90 % (9 MB)
147 09:41:24.185971 progress 95 % (10 MB)
148 09:41:24.275583 progress 100 % (11 MB)
149 09:41:24.290801 11 MB downloaded in 1.64 s (6.74 MB/s)
150 09:41:24.291755 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:41:24.293574 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:41:24.294148 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 09:41:24.294713 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 09:41:34.002127 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/916886/extract-nfsrootfs-1pkgwnyl
156 09:41:34.002744 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 09:41:34.003040 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 09:41:34.003736 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx
159 09:41:34.004241 makedir: /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin
160 09:41:34.004589 makedir: /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/tests
161 09:41:34.004913 makedir: /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/results
162 09:41:34.005320 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-add-keys
163 09:41:34.005867 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-add-sources
164 09:41:34.006394 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-background-process-start
165 09:41:34.006908 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-background-process-stop
166 09:41:34.007453 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-common-functions
167 09:41:34.008013 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-echo-ipv4
168 09:41:34.008549 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-install-packages
169 09:41:34.009066 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-installed-packages
170 09:41:34.009566 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-os-build
171 09:41:34.010080 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-probe-channel
172 09:41:34.010587 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-probe-ip
173 09:41:34.011088 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-target-ip
174 09:41:34.011583 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-target-mac
175 09:41:34.012127 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-target-storage
176 09:41:34.012658 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-test-case
177 09:41:34.013178 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-test-event
178 09:41:34.013709 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-test-feedback
179 09:41:34.014247 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-test-raise
180 09:41:34.014745 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-test-reference
181 09:41:34.015242 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-test-runner
182 09:41:34.015749 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-test-set
183 09:41:34.016293 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-test-shell
184 09:41:34.016821 Updating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-install-packages (oe)
185 09:41:34.017376 Updating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/bin/lava-installed-packages (oe)
186 09:41:34.017846 Creating /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/environment
187 09:41:34.018240 LAVA metadata
188 09:41:34.018511 - LAVA_JOB_ID=916886
189 09:41:34.018731 - LAVA_DISPATCHER_IP=192.168.6.2
190 09:41:34.019120 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 09:41:34.020192 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 09:41:34.020549 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 09:41:34.020763 skipped lava-vland-overlay
194 09:41:34.021010 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 09:41:34.021269 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 09:41:34.021493 skipped lava-multinode-overlay
197 09:41:34.021740 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 09:41:34.021997 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 09:41:34.022259 Loading test definitions
200 09:41:34.022546 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 09:41:34.022774 Using /lava-916886 at stage 0
202 09:41:34.024106 uuid=916886_1.6.2.4.1 testdef=None
203 09:41:34.024462 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 09:41:34.024735 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 09:41:34.026701 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 09:41:34.027520 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 09:41:34.029940 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 09:41:34.030812 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 09:41:34.033150 runner path: /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/0/tests/0_dmesg test_uuid 916886_1.6.2.4.1
212 09:41:34.033782 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 09:41:34.034557 Creating lava-test-runner.conf files
215 09:41:34.034765 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/916886/lava-overlay-kpps7vcx/lava-916886/0 for stage 0
216 09:41:34.035140 - 0_dmesg
217 09:41:34.035501 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 09:41:34.035784 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 09:41:34.057821 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 09:41:34.058259 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 09:41:34.058526 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 09:41:34.058797 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 09:41:34.059064 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 09:41:34.697004 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 09:41:34.697512 start: 1.6.4 extract-modules (timeout 00:09:34) [common]
226 09:41:34.697820 extracting modules file /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/916886/extract-nfsrootfs-1pkgwnyl
227 09:41:36.335560 extracting modules file /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/916886/extract-overlay-ramdisk-j6hooxbl/ramdisk
228 09:41:38.022016 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 09:41:38.022517 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 09:41:38.022801 [common] Applying overlay to NFS
231 09:41:38.023017 [common] Applying overlay /var/lib/lava/dispatcher/tmp/916886/compress-overlay-cphd0vum/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/916886/extract-nfsrootfs-1pkgwnyl
232 09:41:38.066945 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 09:41:38.067404 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 09:41:38.067675 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 09:41:38.067909 Converting downloaded kernel to a uImage
236 09:41:38.068339 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/kernel/Image /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/kernel/uImage
237 09:41:38.619610 output: Image Name:
238 09:41:38.620073 output: Created: Thu Oct 31 09:41:38 2024
239 09:41:38.620292 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 09:41:38.620499 output: Data Size: 46258688 Bytes = 45174.50 KiB = 44.12 MiB
241 09:41:38.620702 output: Load Address: 01080000
242 09:41:38.620902 output: Entry Point: 01080000
243 09:41:38.621100 output:
244 09:41:38.621432 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 09:41:38.621704 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 09:41:38.621972 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 09:41:38.622225 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 09:41:38.622482 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 09:41:38.622744 Building ramdisk /var/lib/lava/dispatcher/tmp/916886/extract-overlay-ramdisk-j6hooxbl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/916886/extract-overlay-ramdisk-j6hooxbl/ramdisk
250 09:41:40.846398 >> 167129 blocks
251 09:41:48.594027 Adding RAMdisk u-boot header.
252 09:41:48.594741 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/916886/extract-overlay-ramdisk-j6hooxbl/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/916886/extract-overlay-ramdisk-j6hooxbl/ramdisk.cpio.gz.uboot
253 09:41:48.842770 output: Image Name:
254 09:41:48.843171 output: Created: Thu Oct 31 09:41:48 2024
255 09:41:48.843385 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 09:41:48.843591 output: Data Size: 23427357 Bytes = 22878.28 KiB = 22.34 MiB
257 09:41:48.843791 output: Load Address: 00000000
258 09:41:48.844017 output: Entry Point: 00000000
259 09:41:48.844418 output:
260 09:41:48.845514 rename /var/lib/lava/dispatcher/tmp/916886/extract-overlay-ramdisk-j6hooxbl/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/ramdisk/ramdisk.cpio.gz.uboot
261 09:41:48.846233 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 09:41:48.846774 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 09:41:48.847293 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 09:41:48.847751 No LXC device requested
265 09:41:48.848293 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 09:41:48.848806 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 09:41:48.849299 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 09:41:48.849709 Checking files for TFTP limit of 4294967296 bytes.
269 09:41:48.852393 end: 1 tftp-deploy (duration 00:00:41) [common]
270 09:41:48.852981 start: 2 uboot-action (timeout 00:05:00) [common]
271 09:41:48.853504 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 09:41:48.853998 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 09:41:48.854496 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 09:41:48.855017 Using kernel file from prepare-kernel: 916886/tftp-deploy-m30_2h3d/kernel/uImage
275 09:41:48.855636 substitutions:
276 09:41:48.856068 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 09:41:48.856475 - {DTB_ADDR}: 0x01070000
278 09:41:48.856871 - {DTB}: 916886/tftp-deploy-m30_2h3d/dtb/meson-g12b-a311d-libretech-cc.dtb
279 09:41:48.857266 - {INITRD}: 916886/tftp-deploy-m30_2h3d/ramdisk/ramdisk.cpio.gz.uboot
280 09:41:48.857661 - {KERNEL_ADDR}: 0x01080000
281 09:41:48.858048 - {KERNEL}: 916886/tftp-deploy-m30_2h3d/kernel/uImage
282 09:41:48.858438 - {LAVA_MAC}: None
283 09:41:48.858867 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/916886/extract-nfsrootfs-1pkgwnyl
284 09:41:48.859259 - {NFS_SERVER_IP}: 192.168.6.2
285 09:41:48.859650 - {PRESEED_CONFIG}: None
286 09:41:48.860065 - {PRESEED_LOCAL}: None
287 09:41:48.860459 - {RAMDISK_ADDR}: 0x08000000
288 09:41:48.860844 - {RAMDISK}: 916886/tftp-deploy-m30_2h3d/ramdisk/ramdisk.cpio.gz.uboot
289 09:41:48.861229 - {ROOT_PART}: None
290 09:41:48.861618 - {ROOT}: None
291 09:41:48.862002 - {SERVER_IP}: 192.168.6.2
292 09:41:48.862387 - {TEE_ADDR}: 0x83000000
293 09:41:48.862773 - {TEE}: None
294 09:41:48.863160 Parsed boot commands:
295 09:41:48.863538 - setenv autoload no
296 09:41:48.863921 - setenv initrd_high 0xffffffff
297 09:41:48.864332 - setenv fdt_high 0xffffffff
298 09:41:48.864716 - dhcp
299 09:41:48.865094 - setenv serverip 192.168.6.2
300 09:41:48.865474 - tftpboot 0x01080000 916886/tftp-deploy-m30_2h3d/kernel/uImage
301 09:41:48.865856 - tftpboot 0x08000000 916886/tftp-deploy-m30_2h3d/ramdisk/ramdisk.cpio.gz.uboot
302 09:41:48.866241 - tftpboot 0x01070000 916886/tftp-deploy-m30_2h3d/dtb/meson-g12b-a311d-libretech-cc.dtb
303 09:41:48.866625 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/916886/extract-nfsrootfs-1pkgwnyl,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 09:41:48.867021 - bootm 0x01080000 0x08000000 0x01070000
305 09:41:48.867516 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 09:41:48.869015 start: 2.3 connect-device (timeout 00:05:00) [common]
308 09:41:48.869430 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 09:41:48.883843 Setting prompt string to ['lava-test: # ']
310 09:41:48.885352 end: 2.3 connect-device (duration 00:00:00) [common]
311 09:41:48.885937 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 09:41:48.886477 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 09:41:48.887003 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 09:41:48.888141 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 09:41:48.924616 >> OK - accepted request
316 09:41:48.926690 Returned 0 in 0 seconds
317 09:41:49.027738 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 09:41:49.029354 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 09:41:49.029918 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 09:41:49.030427 Setting prompt string to ['Hit any key to stop autoboot']
322 09:41:49.030888 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 09:41:49.032472 Trying 192.168.56.21...
324 09:41:49.032970 Connected to conserv1.
325 09:41:49.033390 Escape character is '^]'.
326 09:41:49.033804
327 09:41:49.034227 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 09:41:49.034649
329 09:41:59.963818 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 09:41:59.964258 bl2_stage_init 0x01
331 09:41:59.964492 bl2_stage_init 0x81
332 09:41:59.969367 hw id: 0x0000 - pwm id 0x01
333 09:41:59.969650 bl2_stage_init 0xc1
334 09:41:59.969862 bl2_stage_init 0x02
335 09:41:59.970098
336 09:41:59.974886 L0:00000000
337 09:41:59.975140 L1:20000703
338 09:41:59.975348 L2:00008067
339 09:41:59.975560 L3:14000000
340 09:41:59.977865 B2:00402000
341 09:41:59.978111 B1:e0f83180
342 09:41:59.978318
343 09:41:59.978521 TE: 58124
344 09:41:59.978724
345 09:41:59.989048 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 09:41:59.989314
347 09:41:59.989529 Board ID = 1
348 09:41:59.989731 Set A53 clk to 24M
349 09:41:59.989931 Set A73 clk to 24M
350 09:41:59.994652 Set clk81 to 24M
351 09:41:59.994907 A53 clk: 1200 MHz
352 09:41:59.995115 A73 clk: 1200 MHz
353 09:41:59.998092 CLK81: 166.6M
354 09:41:59.998334 smccc: 00012a92
355 09:42:00.003689 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 09:42:00.009185 board id: 1
357 09:42:00.013836 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 09:42:00.025059 fw parse done
359 09:42:00.030480 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 09:42:00.073454 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 09:42:00.084513 PIEI prepare done
362 09:42:00.084753 fastboot data load
363 09:42:00.084955 fastboot data verify
364 09:42:00.090070 verify result: 266
365 09:42:00.095674 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 09:42:00.095904 LPDDR4 probe
367 09:42:00.096178 ddr clk to 1584MHz
368 09:42:00.103056 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 09:42:00.140760
370 09:42:00.141179 dmc_version 0001
371 09:42:00.147502 Check phy result
372 09:42:00.153512 INFO : End of CA training
373 09:42:00.153923 INFO : End of initialization
374 09:42:00.159083 INFO : Training has run successfully!
375 09:42:00.159502 Check phy result
376 09:42:00.164738 INFO : End of initialization
377 09:42:00.165152 INFO : End of read enable training
378 09:42:00.170333 INFO : End of fine write leveling
379 09:42:00.175883 INFO : End of Write leveling coarse delay
380 09:42:00.176329 INFO : Training has run successfully!
381 09:42:00.176723 Check phy result
382 09:42:00.181531 INFO : End of initialization
383 09:42:00.181950 INFO : End of read dq deskew training
384 09:42:00.187121 INFO : End of MPR read delay center optimization
385 09:42:00.192738 INFO : End of write delay center optimization
386 09:42:00.198352 INFO : End of read delay center optimization
387 09:42:00.198791 INFO : End of max read latency training
388 09:42:00.203906 INFO : Training has run successfully!
389 09:42:00.204372 1D training succeed
390 09:42:00.213029 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 09:42:00.260339 Check phy result
392 09:42:00.260787 INFO : End of initialization
393 09:42:00.281655 INFO : End of 2D read delay Voltage center optimization
394 09:42:00.301699 INFO : End of 2D read delay Voltage center optimization
395 09:42:00.353019 INFO : End of 2D write delay Voltage center optimization
396 09:42:00.403296 INFO : End of 2D write delay Voltage center optimization
397 09:42:00.408811 INFO : Training has run successfully!
398 09:42:00.409236
399 09:42:00.409636 channel==0
400 09:42:00.414421 RxClkDly_Margin_A0==88 ps 9
401 09:42:00.414850 TxDqDly_Margin_A0==98 ps 10
402 09:42:00.420032 RxClkDly_Margin_A1==88 ps 9
403 09:42:00.420450 TxDqDly_Margin_A1==88 ps 9
404 09:42:00.420847 TrainedVREFDQ_A0==74
405 09:42:00.425624 TrainedVREFDQ_A1==75
406 09:42:00.426043 VrefDac_Margin_A0==25
407 09:42:00.426435 DeviceVref_Margin_A0==40
408 09:42:00.431260 VrefDac_Margin_A1==25
409 09:42:00.431670 DeviceVref_Margin_A1==39
410 09:42:00.432084
411 09:42:00.432481
412 09:42:00.432873 channel==1
413 09:42:00.436812 RxClkDly_Margin_A0==88 ps 9
414 09:42:00.437227 TxDqDly_Margin_A0==88 ps 9
415 09:42:00.442429 RxClkDly_Margin_A1==88 ps 9
416 09:42:00.442847 TxDqDly_Margin_A1==98 ps 10
417 09:42:00.448016 TrainedVREFDQ_A0==77
418 09:42:00.448437 TrainedVREFDQ_A1==78
419 09:42:00.448833 VrefDac_Margin_A0==23
420 09:42:00.453609 DeviceVref_Margin_A0==37
421 09:42:00.454018 VrefDac_Margin_A1==24
422 09:42:00.459262 DeviceVref_Margin_A1==36
423 09:42:00.459674
424 09:42:00.460090 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 09:42:00.460484
426 09:42:00.492826 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 09:42:00.493346 2D training succeed
428 09:42:00.498430 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 09:42:00.504062 auto size-- 65535DDR cs0 size: 2048MB
430 09:42:00.504486 DDR cs1 size: 2048MB
431 09:42:00.509625 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 09:42:00.510044 cs0 DataBus test pass
433 09:42:00.515263 cs1 DataBus test pass
434 09:42:00.515679 cs0 AddrBus test pass
435 09:42:00.516096 cs1 AddrBus test pass
436 09:42:00.516487
437 09:42:00.520820 100bdlr_step_size ps== 420
438 09:42:00.521245 result report
439 09:42:00.526457 boot times 0Enable ddr reg access
440 09:42:00.531154 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 09:42:00.544602 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 09:42:01.118751 0.0;M3 CHK:0;cm4_sp_mode 0
443 09:42:01.119351 MVN_1=0x00000000
444 09:42:01.124194 MVN_2=0x00000000
445 09:42:01.129910 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 09:42:01.130360 OPS=0x10
447 09:42:01.130762 ring efuse init
448 09:42:01.131168 chipver efuse init
449 09:42:01.135528 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 09:42:01.141112 [0.018961 Inits done]
451 09:42:01.141535 secure task start!
452 09:42:01.141926 high task start!
453 09:42:01.147854 low task start!
454 09:42:01.148318 run into bl31
455 09:42:01.152387 NOTICE: BL31: v1.3(release):4fc40b1
456 09:42:01.160149 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 09:42:01.160578 NOTICE: BL31: G12A normal boot!
458 09:42:01.185578 NOTICE: BL31: BL33 decompress pass
459 09:42:01.191236 ERROR: Error initializing runtime service opteed_fast
460 09:42:02.424201
461 09:42:02.424796
462 09:42:02.432548 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 09:42:02.432988
464 09:42:02.433386 Model: Libre Computer AML-A311D-CC Alta
465 09:42:02.640975 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 09:42:02.664394 DRAM: 2 GiB (effective 3.8 GiB)
467 09:42:02.807383 Core: 408 devices, 31 uclasses, devicetree: separate
468 09:42:02.813241 WDT: Not starting watchdog@f0d0
469 09:42:02.845540 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 09:42:02.858004 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 09:42:02.863066 ** Bad device specification mmc 0 **
472 09:42:02.873328 Card did not respond to voltage select! : -110
473 09:42:02.880926 ** Bad device specification mmc 0 **
474 09:42:02.881404 Couldn't find partition mmc 0
475 09:42:02.889289 Card did not respond to voltage select! : -110
476 09:42:02.894830 ** Bad device specification mmc 0 **
477 09:42:02.895298 Couldn't find partition mmc 0
478 09:42:02.899864 Error: could not access storage.
479 09:42:04.164111 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 09:42:04.164716 bl2_stage_init 0x01
481 09:42:04.165145 bl2_stage_init 0x81
482 09:42:04.169704 hw id: 0x0000 - pwm id 0x01
483 09:42:04.170162 bl2_stage_init 0xc1
484 09:42:04.170576 bl2_stage_init 0x02
485 09:42:04.170982
486 09:42:04.175275 L0:00000000
487 09:42:04.175723 L1:20000703
488 09:42:04.176185 L2:00008067
489 09:42:04.176594 L3:14000000
490 09:42:04.180889 B2:00402000
491 09:42:04.181313 B1:e0f83180
492 09:42:04.181717
493 09:42:04.182121 TE: 58159
494 09:42:04.182524
495 09:42:04.186486 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 09:42:04.186939
497 09:42:04.187349 Board ID = 1
498 09:42:04.192080 Set A53 clk to 24M
499 09:42:04.192509 Set A73 clk to 24M
500 09:42:04.192917 Set clk81 to 24M
501 09:42:04.197700 A53 clk: 1200 MHz
502 09:42:04.198126 A73 clk: 1200 MHz
503 09:42:04.198527 CLK81: 166.6M
504 09:42:04.198929 smccc: 00012ab5
505 09:42:04.203280 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 09:42:04.208876 board id: 1
507 09:42:04.214780 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 09:42:04.225402 fw parse done
509 09:42:04.231377 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 09:42:04.274042 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 09:42:04.284904 PIEI prepare done
512 09:42:04.285344 fastboot data load
513 09:42:04.285756 fastboot data verify
514 09:42:04.290667 verify result: 266
515 09:42:04.296196 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 09:42:04.296631 LPDDR4 probe
517 09:42:04.297041 ddr clk to 1584MHz
518 09:42:04.304194 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 09:42:04.341406
520 09:42:04.341852 dmc_version 0001
521 09:42:04.348133 Check phy result
522 09:42:04.353979 INFO : End of CA training
523 09:42:04.354410 INFO : End of initialization
524 09:42:04.359695 INFO : Training has run successfully!
525 09:42:04.360211 Check phy result
526 09:42:04.365174 INFO : End of initialization
527 09:42:04.365613 INFO : End of read enable training
528 09:42:04.370778 INFO : End of fine write leveling
529 09:42:04.376356 INFO : End of Write leveling coarse delay
530 09:42:04.376790 INFO : Training has run successfully!
531 09:42:04.377196 Check phy result
532 09:42:04.381991 INFO : End of initialization
533 09:42:04.382425 INFO : End of read dq deskew training
534 09:42:04.387572 INFO : End of MPR read delay center optimization
535 09:42:04.393184 INFO : End of write delay center optimization
536 09:42:04.398808 INFO : End of read delay center optimization
537 09:42:04.399252 INFO : End of max read latency training
538 09:42:04.404382 INFO : Training has run successfully!
539 09:42:04.404839 1D training succeed
540 09:42:04.413562 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 09:42:04.461119 Check phy result
542 09:42:04.461576 INFO : End of initialization
543 09:42:04.482932 INFO : End of 2D read delay Voltage center optimization
544 09:42:04.503099 INFO : End of 2D read delay Voltage center optimization
545 09:42:04.555097 INFO : End of 2D write delay Voltage center optimization
546 09:42:04.604478 INFO : End of 2D write delay Voltage center optimization
547 09:42:04.610093 INFO : Training has run successfully!
548 09:42:04.610536
549 09:42:04.610955 channel==0
550 09:42:04.615693 RxClkDly_Margin_A0==88 ps 9
551 09:42:04.616173 TxDqDly_Margin_A0==98 ps 10
552 09:42:04.621282 RxClkDly_Margin_A1==88 ps 9
553 09:42:04.621724 TxDqDly_Margin_A1==98 ps 10
554 09:42:04.622132 TrainedVREFDQ_A0==74
555 09:42:04.626959 TrainedVREFDQ_A1==74
556 09:42:04.627408 VrefDac_Margin_A0==24
557 09:42:04.627814 DeviceVref_Margin_A0==40
558 09:42:04.632458 VrefDac_Margin_A1==25
559 09:42:04.632891 DeviceVref_Margin_A1==40
560 09:42:04.633295
561 09:42:04.633697
562 09:42:04.638066 channel==1
563 09:42:04.638500 RxClkDly_Margin_A0==98 ps 10
564 09:42:04.638904 TxDqDly_Margin_A0==88 ps 9
565 09:42:04.643667 RxClkDly_Margin_A1==88 ps 9
566 09:42:04.644134 TxDqDly_Margin_A1==88 ps 9
567 09:42:04.649276 TrainedVREFDQ_A0==77
568 09:42:04.649718 TrainedVREFDQ_A1==77
569 09:42:04.650123 VrefDac_Margin_A0==22
570 09:42:04.654952 DeviceVref_Margin_A0==37
571 09:42:04.655383 VrefDac_Margin_A1==24
572 09:42:04.660462 DeviceVref_Margin_A1==37
573 09:42:04.660894
574 09:42:04.661314 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 09:42:04.661750
576 09:42:04.694098 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 09:42:04.694620 2D training succeed
578 09:42:04.699704 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 09:42:04.705280 auto size-- 65535DDR cs0 size: 2048MB
580 09:42:04.705734 DDR cs1 size: 2048MB
581 09:42:04.711007 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 09:42:04.711453 cs0 DataBus test pass
583 09:42:04.716475 cs1 DataBus test pass
584 09:42:04.716909 cs0 AddrBus test pass
585 09:42:04.717316 cs1 AddrBus test pass
586 09:42:04.717713
587 09:42:04.722078 100bdlr_step_size ps== 420
588 09:42:04.722535 result report
589 09:42:04.727625 boot times 0Enable ddr reg access
590 09:42:04.733030 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 09:42:04.746429 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 09:42:05.320324 0.0;M3 CHK:0;cm4_sp_mode 0
593 09:42:05.320882 MVN_1=0x00000000
594 09:42:05.325747 MVN_2=0x00000000
595 09:42:05.331468 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 09:42:05.332113 OPS=0x10
597 09:42:05.332600 ring efuse init
598 09:42:05.333006 chipver efuse init
599 09:42:05.339840 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 09:42:05.340342 [0.018961 Inits done]
601 09:42:05.340738 secure task start!
602 09:42:05.347337 high task start!
603 09:42:05.347772 low task start!
604 09:42:05.348200 run into bl31
605 09:42:05.353962 NOTICE: BL31: v1.3(release):4fc40b1
606 09:42:05.361831 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 09:42:05.362271 NOTICE: BL31: G12A normal boot!
608 09:42:05.387128 NOTICE: BL31: BL33 decompress pass
609 09:42:05.392830 ERROR: Error initializing runtime service opteed_fast
610 09:42:06.626078
611 09:42:06.626529
612 09:42:06.639492 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 09:42:06.640171
614 09:42:06.640682 Model: Libre Computer AML-A311D-CC Alta
615 09:42:06.842645 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 09:42:06.866001 DRAM: 2 GiB (effective 3.8 GiB)
617 09:42:07.008796 Core: 408 devices, 31 uclasses, devicetree: separate
618 09:42:07.014806 WDT: Not starting watchdog@f0d0
619 09:42:07.046982 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 09:42:07.059437 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 09:42:07.064535 ** Bad device specification mmc 0 **
622 09:42:07.074595 Card did not respond to voltage select! : -110
623 09:42:07.081486 ** Bad device specification mmc 0 **
624 09:42:07.081929 Couldn't find partition mmc 0
625 09:42:07.090600 Card did not respond to voltage select! : -110
626 09:42:07.096280 ** Bad device specification mmc 0 **
627 09:42:07.096723 Couldn't find partition mmc 0
628 09:42:07.101275 Error: could not access storage.
629 09:42:07.443948 Net: eth0: ethernet@ff3f0000
630 09:42:07.444571 starting USB...
631 09:42:07.695609 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 09:42:07.696248 Starting the controller
633 09:42:07.702630 USB XHCI 1.10
634 09:42:09.414451 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 09:42:09.415157 bl2_stage_init 0x01
636 09:42:09.415636 bl2_stage_init 0x81
637 09:42:09.420123 hw id: 0x0000 - pwm id 0x01
638 09:42:09.420661 bl2_stage_init 0xc1
639 09:42:09.421127 bl2_stage_init 0x02
640 09:42:09.421582
641 09:42:09.425847 L0:00000000
642 09:42:09.426371 L1:20000703
643 09:42:09.426829 L2:00008067
644 09:42:09.427279 L3:14000000
645 09:42:09.428658 B2:00402000
646 09:42:09.429174 B1:e0f83180
647 09:42:09.429629
648 09:42:09.430073 TE: 58124
649 09:42:09.430516
650 09:42:09.439785 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 09:42:09.440350
652 09:42:09.440811 Board ID = 1
653 09:42:09.441257 Set A53 clk to 24M
654 09:42:09.441701 Set A73 clk to 24M
655 09:42:09.445398 Set clk81 to 24M
656 09:42:09.445912 A53 clk: 1200 MHz
657 09:42:09.446365 A73 clk: 1200 MHz
658 09:42:09.448925 CLK81: 166.6M
659 09:42:09.449439 smccc: 00012a92
660 09:42:09.454522 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 09:42:09.460061 board id: 1
662 09:42:09.465279 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 09:42:09.475925 fw parse done
664 09:42:09.481994 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 09:42:09.524293 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 09:42:09.535339 PIEI prepare done
667 09:42:09.535917 fastboot data load
668 09:42:09.536429 fastboot data verify
669 09:42:09.540943 verify result: 266
670 09:42:09.546522 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 09:42:09.547082 LPDDR4 probe
672 09:42:09.547546 ddr clk to 1584MHz
673 09:42:09.554418 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 09:42:09.591831
675 09:42:09.592467 dmc_version 0001
676 09:42:09.598441 Check phy result
677 09:42:09.604338 INFO : End of CA training
678 09:42:09.604876 INFO : End of initialization
679 09:42:09.609905 INFO : Training has run successfully!
680 09:42:09.610427 Check phy result
681 09:42:09.615471 INFO : End of initialization
682 09:42:09.616023 INFO : End of read enable training
683 09:42:09.621068 INFO : End of fine write leveling
684 09:42:09.626781 INFO : End of Write leveling coarse delay
685 09:42:09.627294 INFO : Training has run successfully!
686 09:42:09.627749 Check phy result
687 09:42:09.632293 INFO : End of initialization
688 09:42:09.632810 INFO : End of read dq deskew training
689 09:42:09.637892 INFO : End of MPR read delay center optimization
690 09:42:09.643472 INFO : End of write delay center optimization
691 09:42:09.649071 INFO : End of read delay center optimization
692 09:42:09.649587 INFO : End of max read latency training
693 09:42:09.654790 INFO : Training has run successfully!
694 09:42:09.655307 1D training succeed
695 09:42:09.663829 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 09:42:09.711476 Check phy result
697 09:42:09.712089 INFO : End of initialization
698 09:42:09.733122 INFO : End of 2D read delay Voltage center optimization
699 09:42:09.753189 INFO : End of 2D read delay Voltage center optimization
700 09:42:09.805109 INFO : End of 2D write delay Voltage center optimization
701 09:42:09.854326 INFO : End of 2D write delay Voltage center optimization
702 09:42:09.859860 INFO : Training has run successfully!
703 09:42:09.860418
704 09:42:09.860884 channel==0
705 09:42:09.865478 RxClkDly_Margin_A0==88 ps 9
706 09:42:09.866011 TxDqDly_Margin_A0==98 ps 10
707 09:42:09.868808 RxClkDly_Margin_A1==88 ps 9
708 09:42:09.869314 TxDqDly_Margin_A1==98 ps 10
709 09:42:09.874380 TrainedVREFDQ_A0==74
710 09:42:09.874892 TrainedVREFDQ_A1==74
711 09:42:09.875353 VrefDac_Margin_A0==24
712 09:42:09.880017 DeviceVref_Margin_A0==40
713 09:42:09.880530 VrefDac_Margin_A1==25
714 09:42:09.885600 DeviceVref_Margin_A1==40
715 09:42:09.886109
716 09:42:09.886566
717 09:42:09.887012 channel==1
718 09:42:09.887450 RxClkDly_Margin_A0==98 ps 10
719 09:42:09.891170 TxDqDly_Margin_A0==98 ps 10
720 09:42:09.891696 RxClkDly_Margin_A1==98 ps 10
721 09:42:09.896865 TxDqDly_Margin_A1==88 ps 9
722 09:42:09.897411 TrainedVREFDQ_A0==77
723 09:42:09.897870 TrainedVREFDQ_A1==77
724 09:42:09.902437 VrefDac_Margin_A0==22
725 09:42:09.902977 DeviceVref_Margin_A0==37
726 09:42:09.908034 VrefDac_Margin_A1==22
727 09:42:09.908572 DeviceVref_Margin_A1==37
728 09:42:09.909032
729 09:42:09.913615 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 09:42:09.914154
731 09:42:09.941546 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 09:42:09.947215 2D training succeed
733 09:42:09.952821 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 09:42:09.953355 auto size-- 65535DDR cs0 size: 2048MB
735 09:42:09.958400 DDR cs1 size: 2048MB
736 09:42:09.958926 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 09:42:09.963973 cs0 DataBus test pass
738 09:42:09.964538 cs1 DataBus test pass
739 09:42:09.964993 cs0 AddrBus test pass
740 09:42:09.969628 cs1 AddrBus test pass
741 09:42:09.970167
742 09:42:09.970629 100bdlr_step_size ps== 420
743 09:42:09.971087 result report
744 09:42:09.975244 boot times 0Enable ddr reg access
745 09:42:09.982929 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 09:42:09.996279 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 09:42:10.568307 0.0;M3 CHK:0;cm4_sp_mode 0
748 09:42:10.568972 MVN_1=0x00000000
749 09:42:10.573893 MVN_2=0x00000000
750 09:42:10.579581 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 09:42:10.580219 OPS=0x10
752 09:42:10.580670 ring efuse init
753 09:42:10.581104 chipver efuse init
754 09:42:10.585161 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 09:42:10.590811 [0.018961 Inits done]
756 09:42:10.591330 secure task start!
757 09:42:10.591762 high task start!
758 09:42:10.595327 low task start!
759 09:42:10.595833 run into bl31
760 09:42:10.601978 NOTICE: BL31: v1.3(release):4fc40b1
761 09:42:10.609889 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 09:42:10.610410 NOTICE: BL31: G12A normal boot!
763 09:42:10.635238 NOTICE: BL31: BL33 decompress pass
764 09:42:10.640922 ERROR: Error initializing runtime service opteed_fast
765 09:42:11.873808
766 09:42:11.874462
767 09:42:11.882214 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 09:42:11.882748
769 09:42:11.883208 Model: Libre Computer AML-A311D-CC Alta
770 09:42:12.090603 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 09:42:12.114013 DRAM: 2 GiB (effective 3.8 GiB)
772 09:42:12.257106 Core: 408 devices, 31 uclasses, devicetree: separate
773 09:42:12.262893 WDT: Not starting watchdog@f0d0
774 09:42:12.295147 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 09:42:12.307560 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 09:42:12.312563 ** Bad device specification mmc 0 **
777 09:42:12.322910 Card did not respond to voltage select! : -110
778 09:42:12.330563 ** Bad device specification mmc 0 **
779 09:42:12.331115 Couldn't find partition mmc 0
780 09:42:12.338937 Card did not respond to voltage select! : -110
781 09:42:12.344400 ** Bad device specification mmc 0 **
782 09:42:12.344916 Couldn't find partition mmc 0
783 09:42:12.349512 Error: could not access storage.
784 09:42:12.691895 Net: eth0: ethernet@ff3f0000
785 09:42:12.692563 starting USB...
786 09:42:12.943758 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 09:42:12.944409 Starting the controller
788 09:42:12.950745 USB XHCI 1.10
789 09:42:15.114635 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 09:42:15.115292 bl2_stage_init 0x01
791 09:42:15.115763 bl2_stage_init 0x81
792 09:42:15.120230 hw id: 0x0000 - pwm id 0x01
793 09:42:15.120768 bl2_stage_init 0xc1
794 09:42:15.121243 bl2_stage_init 0x02
795 09:42:15.121701
796 09:42:15.125798 L0:00000000
797 09:42:15.126313 L1:20000703
798 09:42:15.126772 L2:00008067
799 09:42:15.127218 L3:14000000
800 09:42:15.131349 B2:00402000
801 09:42:15.131859 B1:e0f83180
802 09:42:15.132358
803 09:42:15.132811 TE: 58124
804 09:42:15.133256
805 09:42:15.136995 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 09:42:15.137506
807 09:42:15.137962 Board ID = 1
808 09:42:15.142682 Set A53 clk to 24M
809 09:42:15.143188 Set A73 clk to 24M
810 09:42:15.143636 Set clk81 to 24M
811 09:42:15.148169 A53 clk: 1200 MHz
812 09:42:15.148679 A73 clk: 1200 MHz
813 09:42:15.149131 CLK81: 166.6M
814 09:42:15.149573 smccc: 00012a92
815 09:42:15.153776 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 09:42:15.159302 board id: 1
817 09:42:15.165341 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 09:42:15.175742 fw parse done
819 09:42:15.181749 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 09:42:15.224360 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 09:42:15.235339 PIEI prepare done
822 09:42:15.235850 fastboot data load
823 09:42:15.236349 fastboot data verify
824 09:42:15.240947 verify result: 266
825 09:42:15.246530 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 09:42:15.247039 LPDDR4 probe
827 09:42:15.247489 ddr clk to 1584MHz
828 09:42:15.254626 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 09:42:15.291795
830 09:42:15.292390 dmc_version 0001
831 09:42:15.298544 Check phy result
832 09:42:15.304349 INFO : End of CA training
833 09:42:15.304879 INFO : End of initialization
834 09:42:15.309969 INFO : Training has run successfully!
835 09:42:15.310508 Check phy result
836 09:42:15.315582 INFO : End of initialization
837 09:42:15.316131 INFO : End of read enable training
838 09:42:15.321150 INFO : End of fine write leveling
839 09:42:15.326749 INFO : End of Write leveling coarse delay
840 09:42:15.327275 INFO : Training has run successfully!
841 09:42:15.327730 Check phy result
842 09:42:15.332330 INFO : End of initialization
843 09:42:15.332836 INFO : End of read dq deskew training
844 09:42:15.337950 INFO : End of MPR read delay center optimization
845 09:42:15.343572 INFO : End of write delay center optimization
846 09:42:15.349139 INFO : End of read delay center optimization
847 09:42:15.349660 INFO : End of max read latency training
848 09:42:15.354724 INFO : Training has run successfully!
849 09:42:15.355242 1D training succeed
850 09:42:15.363850 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 09:42:15.411533 Check phy result
852 09:42:15.412153 INFO : End of initialization
853 09:42:15.433135 INFO : End of 2D read delay Voltage center optimization
854 09:42:15.453184 INFO : End of 2D read delay Voltage center optimization
855 09:42:15.505080 INFO : End of 2D write delay Voltage center optimization
856 09:42:15.554240 INFO : End of 2D write delay Voltage center optimization
857 09:42:15.559768 INFO : Training has run successfully!
858 09:42:15.560345
859 09:42:15.560884 channel==0
860 09:42:15.565487 RxClkDly_Margin_A0==88 ps 9
861 09:42:15.566111 TxDqDly_Margin_A0==98 ps 10
862 09:42:15.570938 RxClkDly_Margin_A1==88 ps 9
863 09:42:15.571509 TxDqDly_Margin_A1==88 ps 9
864 09:42:15.572043 TrainedVREFDQ_A0==74
865 09:42:15.576566 TrainedVREFDQ_A1==74
866 09:42:15.577176 VrefDac_Margin_A0==25
867 09:42:15.577657 DeviceVref_Margin_A0==40
868 09:42:15.582172 VrefDac_Margin_A1==25
869 09:42:15.582745 DeviceVref_Margin_A1==40
870 09:42:15.583182
871 09:42:15.583613
872 09:42:15.584077 channel==1
873 09:42:15.587711 RxClkDly_Margin_A0==98 ps 10
874 09:42:15.588222 TxDqDly_Margin_A0==98 ps 10
875 09:42:15.593421 RxClkDly_Margin_A1==88 ps 9
876 09:42:15.593960 TxDqDly_Margin_A1==88 ps 9
877 09:42:15.598926 TrainedVREFDQ_A0==77
878 09:42:15.599445 TrainedVREFDQ_A1==77
879 09:42:15.599888 VrefDac_Margin_A0==22
880 09:42:15.604523 DeviceVref_Margin_A0==37
881 09:42:15.605024 VrefDac_Margin_A1==24
882 09:42:15.610119 DeviceVref_Margin_A1==37
883 09:42:15.610606
884 09:42:15.611042 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 09:42:15.611473
886 09:42:15.643719 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 09:42:15.644371 2D training succeed
888 09:42:15.649415 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 09:42:15.654916 auto size-- 65535DDR cs0 size: 2048MB
890 09:42:15.655408 DDR cs1 size: 2048MB
891 09:42:15.660512 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 09:42:15.660991 cs0 DataBus test pass
893 09:42:15.666109 cs1 DataBus test pass
894 09:42:15.666584 cs0 AddrBus test pass
895 09:42:15.667020 cs1 AddrBus test pass
896 09:42:15.667450
897 09:42:15.671698 100bdlr_step_size ps== 420
898 09:42:15.672234 result report
899 09:42:15.677431 boot times 0Enable ddr reg access
900 09:42:15.682593 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 09:42:15.696048 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 09:42:16.268276 0.0;M3 CHK:0;cm4_sp_mode 0
903 09:42:16.268983 MVN_1=0x00000000
904 09:42:16.273656 MVN_2=0x00000000
905 09:42:16.279427 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 09:42:16.280172 OPS=0x10
907 09:42:16.280743 ring efuse init
908 09:42:16.281182 chipver efuse init
909 09:42:16.284941 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 09:42:16.290555 [0.018961 Inits done]
911 09:42:16.291018 secure task start!
912 09:42:16.291437 high task start!
913 09:42:16.295113 low task start!
914 09:42:16.295572 run into bl31
915 09:42:16.301768 NOTICE: BL31: v1.3(release):4fc40b1
916 09:42:16.309601 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 09:42:16.310082 NOTICE: BL31: G12A normal boot!
918 09:42:16.334962 NOTICE: BL31: BL33 decompress pass
919 09:42:16.340672 ERROR: Error initializing runtime service opteed_fast
920 09:42:17.573578
921 09:42:17.574181
922 09:42:17.581896 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 09:42:17.582365
924 09:42:17.582792 Model: Libre Computer AML-A311D-CC Alta
925 09:42:17.790330 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 09:42:17.813816 DRAM: 2 GiB (effective 3.8 GiB)
927 09:42:17.956779 Core: 408 devices, 31 uclasses, devicetree: separate
928 09:42:17.962587 WDT: Not starting watchdog@f0d0
929 09:42:17.994886 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 09:42:18.007334 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 09:42:18.012297 ** Bad device specification mmc 0 **
932 09:42:18.022750 Card did not respond to voltage select! : -110
933 09:42:18.030299 ** Bad device specification mmc 0 **
934 09:42:18.030765 Couldn't find partition mmc 0
935 09:42:18.038618 Card did not respond to voltage select! : -110
936 09:42:18.044160 ** Bad device specification mmc 0 **
937 09:42:18.044606 Couldn't find partition mmc 0
938 09:42:18.049206 Error: could not access storage.
939 09:42:18.390810 Net: eth0: ethernet@ff3f0000
940 09:42:18.391316 starting USB...
941 09:42:18.643686 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 09:42:18.644403 Starting the controller
943 09:42:18.650572 USB XHCI 1.10
944 09:42:20.204837 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 09:42:20.213202 scanning usb for storage devices... 0 Storage Device(s) found
947 09:42:20.264852 Hit any key to stop autoboot: 1
948 09:42:20.265682 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 09:42:20.266383 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
950 09:42:20.266934 Setting prompt string to ['=>']
951 09:42:20.267473 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
952 09:42:20.280690 0
953 09:42:20.281628 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 09:42:20.282121 Sending with 10 millisecond of delay
956 09:42:21.416565 => setenv autoload no
957 09:42:21.427350 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 09:42:21.432290 setenv autoload no
959 09:42:21.433027 Sending with 10 millisecond of delay
961 09:42:23.230038 => setenv initrd_high 0xffffffff
962 09:42:23.240815 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
963 09:42:23.241659 setenv initrd_high 0xffffffff
964 09:42:23.242381 Sending with 10 millisecond of delay
966 09:42:24.858297 => setenv fdt_high 0xffffffff
967 09:42:24.869051 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 09:42:24.869850 setenv fdt_high 0xffffffff
969 09:42:24.870559 Sending with 10 millisecond of delay
971 09:42:25.162330 => dhcp
972 09:42:25.172997 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
973 09:42:25.173667 dhcp
974 09:42:25.174015 Speed: 1000, full duplex
975 09:42:25.174312 BOOTP broadcast 1
976 09:42:25.184410 DHCP client bound to address 192.168.6.27 (11 ms)
977 09:42:25.185350 Sending with 10 millisecond of delay
979 09:42:26.863165 => setenv serverip 192.168.6.2
980 09:42:26.873966 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 09:42:26.874831 setenv serverip 192.168.6.2
982 09:42:26.875524 Sending with 10 millisecond of delay
984 09:42:30.599090 => tftpboot 0x01080000 916886/tftp-deploy-m30_2h3d/kernel/uImage
985 09:42:30.609877 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 09:42:30.610663 tftpboot 0x01080000 916886/tftp-deploy-m30_2h3d/kernel/uImage
987 09:42:30.611105 Speed: 1000, full duplex
988 09:42:30.611523 Using ethernet@ff3f0000 device
989 09:42:30.612719 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 09:42:30.618204 Filename '916886/tftp-deploy-m30_2h3d/kernel/uImage'.
991 09:42:30.622133 Load address: 0x1080000
992 09:42:33.957900 Loading: *################################################## 44.1 MiB
993 09:42:33.958338 13.2 MiB/s
994 09:42:33.958594 done
995 09:42:33.962410 Bytes transferred = 46258752 (2c1da40 hex)
996 09:42:33.963064 Sending with 10 millisecond of delay
998 09:42:38.649229 => tftpboot 0x08000000 916886/tftp-deploy-m30_2h3d/ramdisk/ramdisk.cpio.gz.uboot
999 09:42:38.660084 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 09:42:38.660791 tftpboot 0x08000000 916886/tftp-deploy-m30_2h3d/ramdisk/ramdisk.cpio.gz.uboot
1001 09:42:38.661085 Speed: 1000, full duplex
1002 09:42:38.661329 Using ethernet@ff3f0000 device
1003 09:42:38.662575 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 09:42:38.671252 Filename '916886/tftp-deploy-m30_2h3d/ramdisk/ramdisk.cpio.gz.uboot'.
1005 09:42:38.671848 Load address: 0x8000000
1006 09:42:45.709754 Loading: *##T ############################################### UDP wrong checksum 00000005 00001952
1007 09:42:50.710650 T UDP wrong checksum 00000005 00001952
1008 09:43:00.713648 T T UDP wrong checksum 00000005 00001952
1009 09:43:20.717793 T T T T UDP wrong checksum 00000005 00001952
1010 09:43:34.572283 T T UDP wrong checksum 000000ff 0000d3ab
1011 09:43:34.610994 UDP wrong checksum 000000ff 00006c9e
1012 09:43:35.722100
1013 09:43:35.722745 Retry count exceeded; starting again
1015 09:43:35.724343 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1018 09:43:35.726341 end: 2.4 uboot-commands (duration 00:01:47) [common]
1020 09:43:35.727845 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1022 09:43:35.729031 end: 2 uboot-action (duration 00:01:47) [common]
1024 09:43:35.730740 Cleaning after the job
1025 09:43:35.731355 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/ramdisk
1026 09:43:35.732649 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/kernel
1027 09:43:35.781788 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/dtb
1028 09:43:35.782696 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/nfsrootfs
1029 09:43:35.925947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/916886/tftp-deploy-m30_2h3d/modules
1030 09:43:35.945785 start: 4.1 power-off (timeout 00:00:30) [common]
1031 09:43:35.946446 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1032 09:43:35.983805 >> OK - accepted request
1033 09:43:35.985984 Returned 0 in 0 seconds
1034 09:43:36.086776 end: 4.1 power-off (duration 00:00:00) [common]
1036 09:43:36.087767 start: 4.2 read-feedback (timeout 00:10:00) [common]
1037 09:43:36.088451 Listened to connection for namespace 'common' for up to 1s
1038 09:43:37.089361 Finalising connection for namespace 'common'
1039 09:43:37.089794 Disconnecting from shell: Finalise
1040 09:43:37.090082 =>
1041 09:43:37.190829 end: 4.2 read-feedback (duration 00:00:01) [common]
1042 09:43:37.191555 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/916886
1043 09:43:39.057975 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/916886
1044 09:43:39.058632 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.