Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 10:04:28.797811 lava-dispatcher, installed at version: 2024.01
2 10:04:28.798621 start: 0 validate
3 10:04:28.799101 Start time: 2024-10-31 10:04:28.799071+00:00 (UTC)
4 10:04:28.799649 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 10:04:28.800219 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 10:04:28.843483 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 10:04:28.844064 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fkernel%2FImage exists
8 10:04:28.872104 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 10:04:28.872736 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 10:04:28.902579 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 10:04:28.903092 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 10:04:28.934014 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 10:04:28.934488 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fmodules.tar.xz exists
14 10:04:28.973391 validate duration: 0.17
16 10:04:28.974279 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 10:04:28.974644 start: 1.1 download-retry (timeout 00:10:00) [common]
18 10:04:28.974972 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 10:04:28.975614 Not decompressing ramdisk as can be used compressed.
20 10:04:28.976136 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 10:04:28.976443 saving as /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/ramdisk/initrd.cpio.gz
22 10:04:28.976748 total size: 5628182 (5 MB)
23 10:04:29.018602 progress 0 % (0 MB)
24 10:04:29.025880 progress 5 % (0 MB)
25 10:04:29.034049 progress 10 % (0 MB)
26 10:04:29.041261 progress 15 % (0 MB)
27 10:04:29.048739 progress 20 % (1 MB)
28 10:04:29.052643 progress 25 % (1 MB)
29 10:04:29.056961 progress 30 % (1 MB)
30 10:04:29.061211 progress 35 % (1 MB)
31 10:04:29.065023 progress 40 % (2 MB)
32 10:04:29.069173 progress 45 % (2 MB)
33 10:04:29.072998 progress 50 % (2 MB)
34 10:04:29.077195 progress 55 % (2 MB)
35 10:04:29.081381 progress 60 % (3 MB)
36 10:04:29.085380 progress 65 % (3 MB)
37 10:04:29.089543 progress 70 % (3 MB)
38 10:04:29.093303 progress 75 % (4 MB)
39 10:04:29.097432 progress 80 % (4 MB)
40 10:04:29.101197 progress 85 % (4 MB)
41 10:04:29.105380 progress 90 % (4 MB)
42 10:04:29.109220 progress 95 % (5 MB)
43 10:04:29.112616 progress 100 % (5 MB)
44 10:04:29.113368 5 MB downloaded in 0.14 s (39.29 MB/s)
45 10:04:29.114000 end: 1.1.1 http-download (duration 00:00:00) [common]
47 10:04:29.115003 end: 1.1 download-retry (duration 00:00:00) [common]
48 10:04:29.115345 start: 1.2 download-retry (timeout 00:10:00) [common]
49 10:04:29.115650 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 10:04:29.116205 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/kernel/Image
51 10:04:29.116507 saving as /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/kernel/Image
52 10:04:29.116739 total size: 38009344 (36 MB)
53 10:04:29.116970 No compression specified
54 10:04:29.159482 progress 0 % (0 MB)
55 10:04:29.184018 progress 5 % (1 MB)
56 10:04:29.208499 progress 10 % (3 MB)
57 10:04:29.232959 progress 15 % (5 MB)
58 10:04:29.257306 progress 20 % (7 MB)
59 10:04:29.281648 progress 25 % (9 MB)
60 10:04:29.306151 progress 30 % (10 MB)
61 10:04:29.330263 progress 35 % (12 MB)
62 10:04:29.354259 progress 40 % (14 MB)
63 10:04:29.378372 progress 45 % (16 MB)
64 10:04:29.402755 progress 50 % (18 MB)
65 10:04:29.426914 progress 55 % (19 MB)
66 10:04:29.451214 progress 60 % (21 MB)
67 10:04:29.475262 progress 65 % (23 MB)
68 10:04:29.501501 progress 70 % (25 MB)
69 10:04:29.525988 progress 75 % (27 MB)
70 10:04:29.552827 progress 80 % (29 MB)
71 10:04:29.577280 progress 85 % (30 MB)
72 10:04:29.602942 progress 90 % (32 MB)
73 10:04:29.628615 progress 95 % (34 MB)
74 10:04:29.652433 progress 100 % (36 MB)
75 10:04:29.653274 36 MB downloaded in 0.54 s (67.56 MB/s)
76 10:04:29.653779 end: 1.2.1 http-download (duration 00:00:01) [common]
78 10:04:29.654615 end: 1.2 download-retry (duration 00:00:01) [common]
79 10:04:29.654896 start: 1.3 download-retry (timeout 00:09:59) [common]
80 10:04:29.655166 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 10:04:29.655656 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 10:04:29.655947 saving as /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 10:04:29.656185 total size: 53209 (0 MB)
84 10:04:29.656403 No compression specified
85 10:04:29.695390 progress 61 % (0 MB)
86 10:04:29.696309 progress 100 % (0 MB)
87 10:04:29.696902 0 MB downloaded in 0.04 s (1.25 MB/s)
88 10:04:29.697410 end: 1.3.1 http-download (duration 00:00:00) [common]
90 10:04:29.698245 end: 1.3 download-retry (duration 00:00:00) [common]
91 10:04:29.698514 start: 1.4 download-retry (timeout 00:09:59) [common]
92 10:04:29.698783 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 10:04:29.699270 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 10:04:29.699528 saving as /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/nfsrootfs/full.rootfs.tar
95 10:04:29.699733 total size: 107552908 (102 MB)
96 10:04:29.699947 Using unxz to decompress xz
97 10:04:29.736900 progress 0 % (0 MB)
98 10:04:30.401473 progress 5 % (5 MB)
99 10:04:31.139097 progress 10 % (10 MB)
100 10:04:31.854385 progress 15 % (15 MB)
101 10:04:32.602214 progress 20 % (20 MB)
102 10:04:33.165413 progress 25 % (25 MB)
103 10:04:33.780198 progress 30 % (30 MB)
104 10:04:34.523233 progress 35 % (35 MB)
105 10:04:34.866516 progress 40 % (41 MB)
106 10:04:35.286450 progress 45 % (46 MB)
107 10:04:35.969714 progress 50 % (51 MB)
108 10:04:36.643530 progress 55 % (56 MB)
109 10:04:37.396502 progress 60 % (61 MB)
110 10:04:38.152992 progress 65 % (66 MB)
111 10:04:38.886711 progress 70 % (71 MB)
112 10:04:39.644881 progress 75 % (76 MB)
113 10:04:40.318900 progress 80 % (82 MB)
114 10:04:41.019853 progress 85 % (87 MB)
115 10:04:41.745640 progress 90 % (92 MB)
116 10:04:42.454180 progress 95 % (97 MB)
117 10:04:43.195363 progress 100 % (102 MB)
118 10:04:43.207589 102 MB downloaded in 13.51 s (7.59 MB/s)
119 10:04:43.208352 end: 1.4.1 http-download (duration 00:00:14) [common]
121 10:04:43.210011 end: 1.4 download-retry (duration 00:00:14) [common]
122 10:04:43.210545 start: 1.5 download-retry (timeout 00:09:46) [common]
123 10:04:43.211073 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 10:04:43.212299 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/modules.tar.xz
125 10:04:43.212798 saving as /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/modules/modules.tar
126 10:04:43.213220 total size: 11742820 (11 MB)
127 10:04:43.213650 Using unxz to decompress xz
128 10:04:43.259432 progress 0 % (0 MB)
129 10:04:43.339212 progress 5 % (0 MB)
130 10:04:43.419705 progress 10 % (1 MB)
131 10:04:43.500726 progress 15 % (1 MB)
132 10:04:43.582085 progress 20 % (2 MB)
133 10:04:43.659846 progress 25 % (2 MB)
134 10:04:43.741488 progress 30 % (3 MB)
135 10:04:43.817628 progress 35 % (3 MB)
136 10:04:43.898048 progress 40 % (4 MB)
137 10:04:43.983194 progress 45 % (5 MB)
138 10:04:44.064228 progress 50 % (5 MB)
139 10:04:44.147307 progress 55 % (6 MB)
140 10:04:44.230982 progress 60 % (6 MB)
141 10:04:44.311063 progress 65 % (7 MB)
142 10:04:44.391387 progress 70 % (7 MB)
143 10:04:44.477425 progress 75 % (8 MB)
144 10:04:44.560484 progress 80 % (8 MB)
145 10:04:44.641174 progress 85 % (9 MB)
146 10:04:44.716068 progress 90 % (10 MB)
147 10:04:44.817160 progress 95 % (10 MB)
148 10:04:44.913581 progress 100 % (11 MB)
149 10:04:44.925261 11 MB downloaded in 1.71 s (6.54 MB/s)
150 10:04:44.925868 end: 1.5.1 http-download (duration 00:00:02) [common]
152 10:04:44.926714 end: 1.5 download-retry (duration 00:00:02) [common]
153 10:04:44.926992 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 10:04:44.927262 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 10:04:54.659187 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/917027/extract-nfsrootfs-m1oljza0
156 10:04:54.659801 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 10:04:54.660132 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 10:04:54.660851 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5
159 10:04:54.661339 makedir: /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin
160 10:04:54.661685 makedir: /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/tests
161 10:04:54.662002 makedir: /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/results
162 10:04:54.662344 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-add-keys
163 10:04:54.662880 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-add-sources
164 10:04:54.663397 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-background-process-start
165 10:04:54.663921 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-background-process-stop
166 10:04:54.664517 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-common-functions
167 10:04:54.665023 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-echo-ipv4
168 10:04:54.665519 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-install-packages
169 10:04:54.666019 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-installed-packages
170 10:04:54.666504 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-os-build
171 10:04:54.666997 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-probe-channel
172 10:04:54.667564 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-probe-ip
173 10:04:54.668131 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-target-ip
174 10:04:54.668662 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-target-mac
175 10:04:54.669164 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-target-storage
176 10:04:54.669662 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-test-case
177 10:04:54.670150 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-test-event
178 10:04:54.670638 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-test-feedback
179 10:04:54.671127 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-test-raise
180 10:04:54.671619 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-test-reference
181 10:04:54.672158 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-test-runner
182 10:04:54.672688 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-test-set
183 10:04:54.673177 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-test-shell
184 10:04:54.673672 Updating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-install-packages (oe)
185 10:04:54.674277 Updating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/bin/lava-installed-packages (oe)
186 10:04:54.674745 Creating /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/environment
187 10:04:54.675127 LAVA metadata
188 10:04:54.675398 - LAVA_JOB_ID=917027
189 10:04:54.675618 - LAVA_DISPATCHER_IP=192.168.6.2
190 10:04:54.676013 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 10:04:54.676999 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 10:04:54.677324 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 10:04:54.677538 skipped lava-vland-overlay
194 10:04:54.677783 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 10:04:54.678041 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 10:04:54.678262 skipped lava-multinode-overlay
197 10:04:54.678507 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 10:04:54.678760 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 10:04:54.679015 Loading test definitions
200 10:04:54.679297 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 10:04:54.679521 Using /lava-917027 at stage 0
202 10:04:54.680756 uuid=917027_1.6.2.4.1 testdef=None
203 10:04:54.681085 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 10:04:54.681354 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 10:04:54.683171 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 10:04:54.683976 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 10:04:54.686279 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 10:04:54.687116 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 10:04:54.689343 runner path: /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/0/tests/0_dmesg test_uuid 917027_1.6.2.4.1
212 10:04:54.689923 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 10:04:54.690696 Creating lava-test-runner.conf files
215 10:04:54.690904 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/917027/lava-overlay-hxrkp_n5/lava-917027/0 for stage 0
216 10:04:54.691249 - 0_dmesg
217 10:04:54.691603 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 10:04:54.691890 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 10:04:54.713905 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 10:04:54.714315 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 10:04:54.714581 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 10:04:54.714855 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 10:04:54.715123 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 10:04:55.328984 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 10:04:55.329465 start: 1.6.4 extract-modules (timeout 00:09:34) [common]
226 10:04:55.329744 extracting modules file /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917027/extract-nfsrootfs-m1oljza0
227 10:04:56.690873 extracting modules file /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917027/extract-overlay-ramdisk-jx2vjn7_/ramdisk
228 10:04:58.090533 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 10:04:58.091026 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 10:04:58.091328 [common] Applying overlay to NFS
231 10:04:58.091558 [common] Applying overlay /var/lib/lava/dispatcher/tmp/917027/compress-overlay-0pnxs9rg/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/917027/extract-nfsrootfs-m1oljza0
232 10:04:58.120877 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 10:04:58.121288 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 10:04:58.121589 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 10:04:58.121837 Converting downloaded kernel to a uImage
236 10:04:58.122162 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/kernel/Image /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/kernel/uImage
237 10:04:58.519969 output: Image Name:
238 10:04:58.520425 output: Created: Thu Oct 31 10:04:58 2024
239 10:04:58.520636 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 10:04:58.520843 output: Data Size: 38009344 Bytes = 37118.50 KiB = 36.25 MiB
241 10:04:58.521046 output: Load Address: 01080000
242 10:04:58.521248 output: Entry Point: 01080000
243 10:04:58.521447 output:
244 10:04:58.521782 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 10:04:58.522048 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 10:04:58.522319 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 10:04:58.522571 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 10:04:58.522833 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 10:04:58.523095 Building ramdisk /var/lib/lava/dispatcher/tmp/917027/extract-overlay-ramdisk-jx2vjn7_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/917027/extract-overlay-ramdisk-jx2vjn7_/ramdisk
250 10:05:00.725815 >> 173832 blocks
251 10:05:08.370152 Adding RAMdisk u-boot header.
252 10:05:08.370579 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/917027/extract-overlay-ramdisk-jx2vjn7_/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/917027/extract-overlay-ramdisk-jx2vjn7_/ramdisk.cpio.gz.uboot
253 10:05:08.634172 output: Image Name:
254 10:05:08.634585 output: Created: Thu Oct 31 10:05:08 2024
255 10:05:08.635060 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 10:05:08.635530 output: Data Size: 24157061 Bytes = 23590.88 KiB = 23.04 MiB
257 10:05:08.636036 output: Load Address: 00000000
258 10:05:08.636500 output: Entry Point: 00000000
259 10:05:08.636950 output:
260 10:05:08.638062 rename /var/lib/lava/dispatcher/tmp/917027/extract-overlay-ramdisk-jx2vjn7_/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/ramdisk/ramdisk.cpio.gz.uboot
261 10:05:08.638848 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 10:05:08.639459 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 10:05:08.640086 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 10:05:08.640609 No LXC device requested
265 10:05:08.641180 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 10:05:08.641757 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 10:05:08.642317 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 10:05:08.642775 Checking files for TFTP limit of 4294967296 bytes.
269 10:05:08.645734 end: 1 tftp-deploy (duration 00:00:40) [common]
270 10:05:08.646389 start: 2 uboot-action (timeout 00:05:00) [common]
271 10:05:08.646986 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 10:05:08.647546 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 10:05:08.648171 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 10:05:08.648784 Using kernel file from prepare-kernel: 917027/tftp-deploy-dgtjygpf/kernel/uImage
275 10:05:08.649494 substitutions:
276 10:05:08.649950 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 10:05:08.650404 - {DTB_ADDR}: 0x01070000
278 10:05:08.650852 - {DTB}: 917027/tftp-deploy-dgtjygpf/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 10:05:08.651297 - {INITRD}: 917027/tftp-deploy-dgtjygpf/ramdisk/ramdisk.cpio.gz.uboot
280 10:05:08.651739 - {KERNEL_ADDR}: 0x01080000
281 10:05:08.652221 - {KERNEL}: 917027/tftp-deploy-dgtjygpf/kernel/uImage
282 10:05:08.652669 - {LAVA_MAC}: None
283 10:05:08.653159 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/917027/extract-nfsrootfs-m1oljza0
284 10:05:08.653614 - {NFS_SERVER_IP}: 192.168.6.2
285 10:05:08.654054 - {PRESEED_CONFIG}: None
286 10:05:08.654496 - {PRESEED_LOCAL}: None
287 10:05:08.654932 - {RAMDISK_ADDR}: 0x08000000
288 10:05:08.655365 - {RAMDISK}: 917027/tftp-deploy-dgtjygpf/ramdisk/ramdisk.cpio.gz.uboot
289 10:05:08.655803 - {ROOT_PART}: None
290 10:05:08.656274 - {ROOT}: None
291 10:05:08.656720 - {SERVER_IP}: 192.168.6.2
292 10:05:08.657163 - {TEE_ADDR}: 0x83000000
293 10:05:08.657601 - {TEE}: None
294 10:05:08.658040 Parsed boot commands:
295 10:05:08.658462 - setenv autoload no
296 10:05:08.658895 - setenv initrd_high 0xffffffff
297 10:05:08.659327 - setenv fdt_high 0xffffffff
298 10:05:08.659758 - dhcp
299 10:05:08.660223 - setenv serverip 192.168.6.2
300 10:05:08.660663 - tftpboot 0x01080000 917027/tftp-deploy-dgtjygpf/kernel/uImage
301 10:05:08.661099 - tftpboot 0x08000000 917027/tftp-deploy-dgtjygpf/ramdisk/ramdisk.cpio.gz.uboot
302 10:05:08.661541 - tftpboot 0x01070000 917027/tftp-deploy-dgtjygpf/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 10:05:08.661973 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/917027/extract-nfsrootfs-m1oljza0,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 10:05:08.662419 - bootm 0x01080000 0x08000000 0x01070000
305 10:05:08.662981 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 10:05:08.664681 start: 2.3 connect-device (timeout 00:05:00) [common]
308 10:05:08.665164 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 10:05:08.680671 Setting prompt string to ['lava-test: # ']
310 10:05:08.682284 end: 2.3 connect-device (duration 00:00:00) [common]
311 10:05:08.682964 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 10:05:08.683684 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 10:05:08.684365 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 10:05:08.685631 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 10:05:08.723468 >> OK - accepted request
316 10:05:08.725719 Returned 0 in 0 seconds
317 10:05:08.826896 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 10:05:08.828773 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 10:05:08.829425 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 10:05:08.829991 Setting prompt string to ['Hit any key to stop autoboot']
322 10:05:08.830502 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 10:05:08.832250 Trying 192.168.56.21...
324 10:05:08.832789 Connected to conserv1.
325 10:05:08.833264 Escape character is '^]'.
326 10:05:08.833718
327 10:05:08.834177 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 10:05:08.834641
329 10:05:15.680665 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 10:05:15.681351 bl2_stage_init 0x01
331 10:05:15.681811 bl2_stage_init 0x81
332 10:05:15.686181 hw id: 0x0000 - pwm id 0x01
333 10:05:15.686666 bl2_stage_init 0xc1
334 10:05:15.691744 bl2_stage_init 0x02
335 10:05:15.692257
336 10:05:15.692712 L0:00000000
337 10:05:15.693146 L1:00000703
338 10:05:15.693593 L2:00008067
339 10:05:15.694026 L3:15000000
340 10:05:15.697302 S1:00000000
341 10:05:15.697792 B2:20282000
342 10:05:15.698236 B1:a0f83180
343 10:05:15.698669
344 10:05:15.699103 TE: 71016
345 10:05:15.699538
346 10:05:15.703042 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 10:05:15.703523
348 10:05:15.708490 Board ID = 1
349 10:05:15.708957 Set cpu clk to 24M
350 10:05:15.709394 Set clk81 to 24M
351 10:05:15.714152 Use GP1_pll as DSU clk.
352 10:05:15.714622 DSU clk: 1200 Mhz
353 10:05:15.715055 CPU clk: 1200 MHz
354 10:05:15.719793 Set clk81 to 166.6M
355 10:05:15.725430 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 10:05:15.725904 board id: 1
357 10:05:15.732531 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 10:05:15.743303 fw parse done
359 10:05:15.749279 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 10:05:15.791713 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 10:05:15.802671 PIEI prepare done
362 10:05:15.803190 fastboot data load
363 10:05:15.803646 fastboot data verify
364 10:05:15.808269 verify result: 266
365 10:05:15.813899 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 10:05:15.814376 LPDDR4 probe
367 10:05:15.814817 ddr clk to 1584MHz
368 10:05:15.821883 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 10:05:15.859270
370 10:05:15.859800 dmc_version 0001
371 10:05:15.865869 Check phy result
372 10:05:15.871696 INFO : End of CA training
373 10:05:15.872214 INFO : End of initialization
374 10:05:15.877314 INFO : Training has run successfully!
375 10:05:15.877793 Check phy result
376 10:05:15.882957 INFO : End of initialization
377 10:05:15.883430 INFO : End of read enable training
378 10:05:15.888517 INFO : End of fine write leveling
379 10:05:15.894045 INFO : End of Write leveling coarse delay
380 10:05:15.894510 INFO : Training has run successfully!
381 10:05:15.894944 Check phy result
382 10:05:15.899755 INFO : End of initialization
383 10:05:15.900266 INFO : End of read dq deskew training
384 10:05:15.905248 INFO : End of MPR read delay center optimization
385 10:05:15.910919 INFO : End of write delay center optimization
386 10:05:15.916458 INFO : End of read delay center optimization
387 10:05:15.916922 INFO : End of max read latency training
388 10:05:15.922071 INFO : Training has run successfully!
389 10:05:15.922546 1D training succeed
390 10:05:15.931253 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 10:05:15.978895 Check phy result
392 10:05:15.979407 INFO : End of initialization
393 10:05:16.001267 INFO : End of 2D read delay Voltage center optimization
394 10:05:16.020532 INFO : End of 2D read delay Voltage center optimization
395 10:05:16.072387 INFO : End of 2D write delay Voltage center optimization
396 10:05:16.121476 INFO : End of 2D write delay Voltage center optimization
397 10:05:16.127111 INFO : Training has run successfully!
398 10:05:16.127584
399 10:05:16.128063 channel==0
400 10:05:16.132584 RxClkDly_Margin_A0==88 ps 9
401 10:05:16.133052 TxDqDly_Margin_A0==98 ps 10
402 10:05:16.136013 RxClkDly_Margin_A1==88 ps 9
403 10:05:16.136477 TxDqDly_Margin_A1==98 ps 10
404 10:05:16.141514 TrainedVREFDQ_A0==74
405 10:05:16.141977 TrainedVREFDQ_A1==75
406 10:05:16.142416 VrefDac_Margin_A0==24
407 10:05:16.147127 DeviceVref_Margin_A0==40
408 10:05:16.147588 VrefDac_Margin_A1==23
409 10:05:16.152717 DeviceVref_Margin_A1==39
410 10:05:16.153183
411 10:05:16.153620
412 10:05:16.154054 channel==1
413 10:05:16.154479 RxClkDly_Margin_A0==78 ps 8
414 10:05:16.156082 TxDqDly_Margin_A0==88 ps 9
415 10:05:16.161627 RxClkDly_Margin_A1==78 ps 8
416 10:05:16.162096 TxDqDly_Margin_A1==88 ps 9
417 10:05:16.162535 TrainedVREFDQ_A0==75
418 10:05:16.167290 TrainedVREFDQ_A1==75
419 10:05:16.167753 VrefDac_Margin_A0==22
420 10:05:16.172898 DeviceVref_Margin_A0==39
421 10:05:16.173361 VrefDac_Margin_A1==22
422 10:05:16.173794 DeviceVref_Margin_A1==39
423 10:05:16.174220
424 10:05:16.178496 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 10:05:16.178977
426 10:05:16.212130 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001b 00000017 00000015 00000016 dram_vref_reg_value 0x 00000062
427 10:05:16.212716 2D training succeed
428 10:05:16.217655 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 10:05:16.223265 auto size-- 65535DDR cs0 size: 2048MB
430 10:05:16.223733 DDR cs1 size: 2048MB
431 10:05:16.228843 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 10:05:16.229309 cs0 DataBus test pass
433 10:05:16.229743 cs1 DataBus test pass
434 10:05:16.234492 cs0 AddrBus test pass
435 10:05:16.234961 cs1 AddrBus test pass
436 10:05:16.235393
437 10:05:16.240153 100bdlr_step_size ps== 478
438 10:05:16.240632 result report
439 10:05:16.241067 boot times 0Enable ddr reg access
440 10:05:16.249787 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 10:05:16.263591 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 10:05:16.918710 bl2z: ptr: 05129330, size: 00001e40
443 10:05:16.925894 0.0;M3 CHK:0;cm4_sp_mode 0
444 10:05:16.926421 MVN_1=0x00000000
445 10:05:16.926871 MVN_2=0x00000000
446 10:05:16.937393 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 10:05:16.937783 OPS=0x04
448 10:05:16.938059 ring efuse init
449 10:05:16.943292 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 10:05:16.943648 [0.017310 Inits done]
451 10:05:16.943855 secure task start!
452 10:05:16.951120 high task start!
453 10:05:16.951503 low task start!
454 10:05:16.951714 run into bl31
455 10:05:16.960932 NOTICE: BL31: v1.3(release):4fc40b1
456 10:05:16.967316 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 10:05:16.967726 NOTICE: BL31: G12A normal boot!
458 10:05:16.982662 NOTICE: BL31: BL33 decompress pass
459 10:05:16.988355 ERROR: Error initializing runtime service opteed_fast
460 10:05:18.229035 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 10:05:18.229723 bl2_stage_init 0x01
462 10:05:18.230210 bl2_stage_init 0x81
463 10:05:18.234526 hw id: 0x0000 - pwm id 0x01
464 10:05:18.235087 bl2_stage_init 0xc1
465 10:05:18.240203 bl2_stage_init 0x02
466 10:05:18.240594
467 10:05:18.240847 L0:00000000
468 10:05:18.241079 L1:00000703
469 10:05:18.241320 L2:00008067
470 10:05:18.241656 L3:15000000
471 10:05:18.245885 S1:00000000
472 10:05:18.246303 B2:20282000
473 10:05:18.246539 B1:a0f83180
474 10:05:18.246772
475 10:05:18.247018 TE: 69328
476 10:05:18.247259
477 10:05:18.251449 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 10:05:18.251810
479 10:05:18.257113 Board ID = 1
480 10:05:18.257675 Set cpu clk to 24M
481 10:05:18.258127 Set clk81 to 24M
482 10:05:18.260440 Use GP1_pll as DSU clk.
483 10:05:18.261062 DSU clk: 1200 Mhz
484 10:05:18.265981 CPU clk: 1200 MHz
485 10:05:18.266512 Set clk81 to 166.6M
486 10:05:18.271568 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 10:05:18.272108 board id: 1
488 10:05:18.280851 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 10:05:18.291799 fw parse done
490 10:05:18.298174 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 10:05:18.341283 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 10:05:18.352296 PIEI prepare done
493 10:05:18.352809 fastboot data load
494 10:05:18.353266 fastboot data verify
495 10:05:18.357873 verify result: 266
496 10:05:18.363558 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 10:05:18.364104 LPDDR4 probe
498 10:05:18.364564 ddr clk to 1584MHz
499 10:05:19.731195 Load ddrfw from SPI, src: 0x00018000, des: 0 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 10:05:19.731865 bl2_stage_init 0x01
501 10:05:19.732346 bl2_stage_init 0x81
502 10:05:19.736655 hw id: 0x0000 - pwm id 0x01
503 10:05:19.737093 bl2_stage_init 0xc1
504 10:05:19.742349 bl2_stage_init 0x02
505 10:05:19.742819
506 10:05:19.743220 L0:00000000
507 10:05:19.743608 L1:00000703
508 10:05:19.744029 L2:00008067
509 10:05:19.744424 L3:15000000
510 10:05:19.747857 S1:00000000
511 10:05:19.748321 B2:20282000
512 10:05:19.748711 B1:a0f83180
513 10:05:19.749093
514 10:05:19.749477 TE: 70553
515 10:05:19.749859
516 10:05:19.753477 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 10:05:19.753916
518 10:05:19.759069 Board ID = 1
519 10:05:19.759503 Set cpu clk to 24M
520 10:05:19.759889 Set clk81 to 24M
521 10:05:19.764644 Use GP1_pll as DSU clk.
522 10:05:19.765069 DSU clk: 1200 Mhz
523 10:05:19.765453 CPU clk: 1200 MHz
524 10:05:19.770949 Set clk81 to 166.6M
525 10:05:19.775907 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 10:05:19.776354 board id: 1
527 10:05:19.783789 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 10:05:19.794267 fw parse done
529 10:05:19.800200 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 10:05:19.843051 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 10:05:19.854200 PIEI prepare done
532 10:05:19.854670 fastboot data load
533 10:05:19.855058 fastboot data verify
534 10:05:19.859774 verify result: 266
535 10:05:19.865391 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 10:05:19.865824 LPDDR4 probe
537 10:05:19.866221 ddr clk to 1584MHz
538 10:05:19.873361 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 10:05:19.911132
540 10:05:19.911557 dmc_version 0001
541 10:05:19.918154 Check phy result
542 10:05:19.924117 INFO : End of CA training
543 10:05:19.924546 INFO : End of initialization
544 10:05:19.929723 INFO : Training has run successfully!
545 10:05:19.930153 Check phy result
546 10:05:19.935297 INFO : End of initialization
547 10:05:19.935720 INFO : End of read enable training
548 10:05:19.940894 INFO : End of fine write leveling
549 10:05:19.946502 INFO : End of Write leveling coarse delay
550 10:05:19.946921 INFO : Training has run successfully!
551 10:05:19.947317 Check phy result
552 10:05:19.952114 INFO : End of initialization
553 10:05:19.952540 INFO : End of read dq deskew training
554 10:05:19.957689 INFO : End of MPR read delay center optimization
555 10:05:19.963277 INFO : End of write delay center optimization
556 10:05:19.968904 INFO : End of read delay center optimization
557 10:05:19.969325 INFO : End of max read latency training
558 10:05:19.974529 INFO : Training has run successfully!
559 10:05:19.974943 1D training succeed
560 10:05:19.983716 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 10:05:20.032129 Check phy result
562 10:05:20.032698 INFO : End of initialization
563 10:05:20.059434 INFO : End of 2D read delay Voltage center optimization
564 10:05:20.083663 INFO : End of 2D read delay Voltage center optimization
565 10:05:20.140344 INFO : End of 2D write delay Voltage center optimization
566 10:05:20.194359 INFO : End of 2D write delay Voltage center optimization
567 10:05:20.199833 INFO : Training has run successfully!
568 10:05:20.200151
569 10:05:20.200364 channel==0
570 10:05:20.205586 RxClkDly_Margin_A0==78 ps 8
571 10:05:20.205888 TxDqDly_Margin_A0==98 ps 10
572 10:05:20.208780 RxClkDly_Margin_A1==88 ps 9
573 10:05:20.209207 TxDqDly_Margin_A1==98 ps 10
574 10:05:20.214460 TrainedVREFDQ_A0==76
575 10:05:20.214903 TrainedVREFDQ_A1==74
576 10:05:20.215136 VrefDac_Margin_A0==24
577 10:05:20.219951 DeviceVref_Margin_A0==38
578 10:05:20.220248 VrefDac_Margin_A1==22
579 10:05:20.225553 DeviceVref_Margin_A1==40
580 10:05:20.225960
581 10:05:20.226287
582 10:05:20.226522 channel==1
583 10:05:20.226734 RxClkDly_Margin_A0==78 ps 8
584 10:05:20.231183 TxDqDly_Margin_A0==88 ps 9
585 10:05:20.231592 RxClkDly_Margin_A1==78 ps 8
586 10:05:20.237123 TxDqDly_Margin_A1==78 ps 8
587 10:05:20.237539 TrainedVREFDQ_A0==76
588 10:05:20.237880 TrainedVREFDQ_A1==77
589 10:05:20.242452 VrefDac_Margin_A0==22
590 10:05:20.242745 DeviceVref_Margin_A0==38
591 10:05:20.247950 VrefDac_Margin_A1==22
592 10:05:20.248411 DeviceVref_Margin_A1==37
593 10:05:20.248740
594 10:05:20.253654 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 10:05:20.253963
596 10:05:20.281904 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
597 10:05:20.287225 2D training succeed
598 10:05:20.292803 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 10:05:20.293098 auto size-- 65535DDR cs0 size: 2048MB
600 10:05:20.298386 DDR cs1 size: 2048MB
601 10:05:20.298815 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 10:05:20.304007 cs0 DataBus test pass
603 10:05:20.304309 cs1 DataBus test pass
604 10:05:20.304517 cs0 AddrBus test pass
605 10:05:20.310580 cs1 AddrBus test pass
606 10:05:20.310893
607 10:05:20.311106 100bdlr_step_size ps== 471
608 10:05:20.311325 result report
609 10:05:20.315202 boot times 0Enable ddr reg access
610 10:05:20.322698 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 10:05:20.336814 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 10:05:20.996276 bl2z: ptr: 05129330, size: 00001e40
613 10:05:21.005010 0.0;M3 CHK:0;cm4_sp_mode 0
614 10:05:21.005506 MVN_1=0x00000000
615 10:05:21.005921 MVN_2=0x00000000
616 10:05:21.016491 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 10:05:21.016937 OPS=0x04
618 10:05:21.017348 ring efuse init
619 10:05:21.019438 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 10:05:21.025931 [0.017354 Inits done]
621 10:05:21.026420 secure task start!
622 10:05:21.026847 high task start!
623 10:05:21.027255 low task start!
624 10:05:21.030347 run into bl31
625 10:05:21.038884 NOTICE: BL31: v1.3(release):4fc40b1
626 10:05:21.046708 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 10:05:21.047164 NOTICE: BL31: G12A normal boot!
628 10:05:21.062337 NOTICE: BL31: BL33 decompress pass
629 10:05:21.068644 ERROR: Error initializing runtime service opteed_fast
630 10:05:22.282172 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 10:05:22.282606 bl2_stage_init 0x01
632 10:05:22.282822 bl2_stage_init 0x81
633 10:05:22.287613 hw id: 0x0000 - pwm id 0x01
634 10:05:22.287923 bl2_stage_init 0xc1
635 10:05:22.293297 bl2_stage_init 0x02
636 10:05:22.293941
637 10:05:22.294522 L0:00000000
638 10:05:22.295069 L1:00000703
639 10:05:22.295603 L2:00008067
640 10:05:22.296042 L3:15000000
641 10:05:22.298722 S1:00000000
642 10:05:22.299060 B2:20282000
643 10:05:22.299658 B1:a0f83180
644 10:05:22.300278
645 10:05:22.300690 TE: 71329
646 10:05:22.300971
647 10:05:22.304561 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 10:05:22.305207
649 10:05:22.310231 Board ID = 1
650 10:05:22.310875 Set cpu clk to 24M
651 10:05:22.311422 Set clk81 to 24M
652 10:05:22.315705 Use GP1_pll as DSU clk.
653 10:05:22.316032 DSU clk: 1200 Mhz
654 10:05:22.316280 CPU clk: 1200 MHz
655 10:05:22.321105 Set clk81 to 166.6M
656 10:05:22.326780 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 10:05:22.327103 board id: 1
658 10:05:22.333980 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 10:05:22.344606 fw parse done
660 10:05:22.350546 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 10:05:22.393090 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 10:05:22.404198 PIEI prepare done
663 10:05:22.404735 fastboot data load
664 10:05:22.405174 fastboot data verify
665 10:05:22.409719 verify result: 266
666 10:05:22.415290 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 10:05:22.415808 LPDDR4 probe
668 10:05:22.416290 ddr clk to 1584MHz
669 10:05:22.423268 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 10:05:22.460546
671 10:05:22.461023 dmc_version 0001
672 10:05:22.467199 Check phy result
673 10:05:22.473086 INFO : End of CA training
674 10:05:22.473449 INFO : End of initialization
675 10:05:22.478745 INFO : Training has run successfully!
676 10:05:22.479129 Check phy result
677 10:05:22.484329 INFO : End of initialization
678 10:05:22.484686 INFO : End of read enable training
679 10:05:22.489837 INFO : End of fine write leveling
680 10:05:22.495450 INFO : End of Write leveling coarse delay
681 10:05:22.495765 INFO : Training has run successfully!
682 10:05:22.496014 Check phy result
683 10:05:22.501073 INFO : End of initialization
684 10:05:22.501386 INFO : End of read dq deskew training
685 10:05:22.506825 INFO : End of MPR read delay center optimization
686 10:05:22.512415 INFO : End of write delay center optimization
687 10:05:22.517993 INFO : End of read delay center optimization
688 10:05:22.518504 INFO : End of max read latency training
689 10:05:22.523604 INFO : Training has run successfully!
690 10:05:22.524153 1D training succeed
691 10:05:22.532617 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 10:05:22.580447 Check phy result
693 10:05:22.581065 INFO : End of initialization
694 10:05:22.602656 INFO : End of 2D read delay Voltage center optimization
695 10:05:22.621807 INFO : End of 2D read delay Voltage center optimization
696 10:05:22.673660 INFO : End of 2D write delay Voltage center optimization
697 10:05:22.722858 INFO : End of 2D write delay Voltage center optimization
698 10:05:22.728416 INFO : Training has run successfully!
699 10:05:22.728910
700 10:05:22.729336 channel==0
701 10:05:22.734057 RxClkDly_Margin_A0==88 ps 9
702 10:05:22.734571 TxDqDly_Margin_A0==98 ps 10
703 10:05:22.739602 RxClkDly_Margin_A1==88 ps 9
704 10:05:22.740132 TxDqDly_Margin_A1==98 ps 10
705 10:05:22.740559 TrainedVREFDQ_A0==74
706 10:05:22.745206 TrainedVREFDQ_A1==76
707 10:05:22.745692 VrefDac_Margin_A0==24
708 10:05:22.746105 DeviceVref_Margin_A0==40
709 10:05:22.750794 VrefDac_Margin_A1==23
710 10:05:22.751275 DeviceVref_Margin_A1==38
711 10:05:22.751688
712 10:05:22.752125
713 10:05:22.756384 channel==1
714 10:05:22.756865 RxClkDly_Margin_A0==78 ps 8
715 10:05:22.757274 TxDqDly_Margin_A0==98 ps 10
716 10:05:22.762038 RxClkDly_Margin_A1==88 ps 9
717 10:05:22.762516 TxDqDly_Margin_A1==88 ps 9
718 10:05:22.767581 TrainedVREFDQ_A0==76
719 10:05:22.768087 TrainedVREFDQ_A1==75
720 10:05:22.768505 VrefDac_Margin_A0==22
721 10:05:22.773213 DeviceVref_Margin_A0==38
722 10:05:22.773697 VrefDac_Margin_A1==22
723 10:05:22.778776 DeviceVref_Margin_A1==39
724 10:05:22.779252
725 10:05:22.779665 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 10:05:22.780100
727 10:05:22.812356 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000015 00000016 dram_vref_reg_value 0x 00000062
728 10:05:22.812906 2D training succeed
729 10:05:22.818050 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 10:05:22.823567 auto size-- 65535DDR cs0 size: 2048MB
731 10:05:22.824075 DDR cs1 size: 2048MB
732 10:05:22.829174 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 10:05:22.829656 cs0 DataBus test pass
734 10:05:22.834800 cs1 DataBus test pass
735 10:05:22.835274 cs0 AddrBus test pass
736 10:05:22.835689 cs1 AddrBus test pass
737 10:05:22.836126
738 10:05:22.840445 100bdlr_step_size ps== 478
739 10:05:22.840949 result report
740 10:05:22.846117 boot times 0Enable ddr reg access
741 10:05:22.851310 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 10:05:22.865078 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 10:05:23.519016 bl2z: ptr: 05129330, size: 00001e40
744 10:05:23.524636 0.0;M3 CHK:0;cm4_sp_mode 0
745 10:05:23.525154 MVN_1=0x00000000
746 10:05:23.525569 MVN_2=0x00000000
747 10:05:23.536133 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 10:05:23.536640 OPS=0x04
749 10:05:23.537059 ring efuse init
750 10:05:23.541754 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 10:05:23.542244 [0.017320 Inits done]
752 10:05:23.542655 secure task start!
753 10:05:23.549226 high task start!
754 10:05:23.549706 low task start!
755 10:05:23.550116 run into bl31
756 10:05:23.557852 NOTICE: BL31: v1.3(release):4fc40b1
757 10:05:23.565615 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 10:05:23.566111 NOTICE: BL31: G12A normal boot!
759 10:05:23.581144 NOTICE: BL31: BL33 decompress pass
760 10:05:23.586795 ERROR: Error initializing runtime service opteed_fast
761 10:05:24.380904
762 10:05:24.381473
763 10:05:24.386323 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 10:05:24.386804
765 10:05:24.389793 Model: Libre Computer AML-S905D3-CC Solitude
766 10:05:24.536606 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 10:05:24.552025 DRAM: 2 GiB (effective 3.8 GiB)
768 10:05:24.652928 Core: 406 devices, 33 uclasses, devicetree: separate
769 10:05:24.658800 WDT: Not starting watchdog@f0d0
770 10:05:24.683857 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 10:05:24.696208 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 10:05:24.701179 ** Bad device specification mmc 0 **
773 10:05:24.711239 Card did not respond to voltage select! : -110
774 10:05:24.718802 ** Bad device specification mmc 0 **
775 10:05:24.719298 Couldn't find partition mmc 0
776 10:05:24.727237 Card did not respond to voltage select! : -110
777 10:05:24.732652 ** Bad device specification mmc 0 **
778 10:05:24.733133 Couldn't find partition mmc 0
779 10:05:24.737763 Error: could not access storage.
780 10:05:25.034057 Net: eth0: ethernet@ff3f0000
781 10:05:25.034656 starting USB...
782 10:05:25.278711 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 10:05:25.279281 Starting the controller
784 10:05:25.285747 USB XHCI 1.10
785 10:05:26.839750 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 10:05:26.848038 scanning usb for storage devices... 0 Storage Device(s) found
788 10:05:26.899531 Hit any key to stop autoboot: 1
789 10:05:26.900545 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 10:05:26.901415 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
791 10:05:26.902049 Setting prompt string to ['=>']
792 10:05:26.902680 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
793 10:05:26.914070 0
794 10:05:26.914985 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 10:05:27.016209 => setenv autoload no
797 10:05:27.017162 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
798 10:05:27.022039 setenv autoload no
800 10:05:27.123528 => setenv initrd_high 0xffffffff
801 10:05:27.124496 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
802 10:05:27.128739 setenv initrd_high 0xffffffff
804 10:05:27.230205 => setenv fdt_high 0xffffffff
805 10:05:27.231114 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 10:05:27.235437 setenv fdt_high 0xffffffff
808 10:05:27.336924 => dhcp
809 10:05:27.337853 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 10:05:27.341795 dhcp
811 10:05:28.397837 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 10:05:28.398438 Speed: 1000, full duplex
813 10:05:28.398854 BOOTP broadcast 1
814 10:05:28.408212 DHCP client bound to address 192.168.6.21 (9 ms)
816 10:05:28.509658 => setenv serverip 192.168.6.2
817 10:05:28.510570 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
818 10:05:28.515044 setenv serverip 192.168.6.2
820 10:05:28.616509 => tftpboot 0x01080000 917027/tftp-deploy-dgtjygpf/kernel/uImage
821 10:05:28.617410 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
822 10:05:28.624093 tftpboot 0x01080000 917027/tftp-deploy-dgtjygpf/kernel/uImage
823 10:05:28.624576 Speed: 1000, full duplex
824 10:05:28.624988 Using ethernet@ff3f0000 device
825 10:05:28.629523 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
826 10:05:28.635048 Filename '917027/tftp-deploy-dgtjygpf/kernel/uImage'.
827 10:05:28.638965 Load address: 0x1080000
828 10:05:31.016404 Loading: *################################################## 36.2 MiB
829 10:05:31.017022 15.2 MiB/s
830 10:05:31.017447 done
831 10:05:31.020731 Bytes transferred = 38009408 (243fa40 hex)
833 10:05:31.122261 => tftpboot 0x08000000 917027/tftp-deploy-dgtjygpf/ramdisk/ramdisk.cpio.gz.uboot
834 10:05:31.123039 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:38)
835 10:05:31.129847 tftpboot 0x08000000 917027/tftp-deploy-dgtjygpf/ramdisk/ramdisk.cpio.gz.uboot
836 10:05:31.130324 Speed: 1000, full duplex
837 10:05:31.130721 Using ethernet@ff3f0000 device
838 10:05:31.135400 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
839 10:05:31.145062 Filename '917027/tftp-deploy-dgtjygpf/ramdisk/ramdisk.cpio.gz.uboot'.
840 10:05:31.145369 Load address: 0x8000000
841 10:05:32.640563 Loading: *################################################# UDP wrong checksum 00000005 0000da71
842 10:05:37.642512 T UDP wrong checksum 00000005 0000da71
843 10:05:47.644352 T T UDP wrong checksum 00000005 0000da71
844 10:06:07.648594 T T T T UDP wrong checksum 00000005 0000da71
845 10:06:27.653062 T T T
846 10:06:27.653714 Retry count exceeded; starting again
848 10:06:27.655197 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
851 10:06:27.657209 end: 2.4 uboot-commands (duration 00:01:19) [common]
853 10:06:27.659350 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
855 10:06:27.661030 end: 2 uboot-action (duration 00:01:19) [common]
857 10:06:27.663086 Cleaning after the job
858 10:06:27.663821 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/ramdisk
859 10:06:27.665625 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/kernel
860 10:06:27.711866 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/dtb
861 10:06:27.713256 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/nfsrootfs
862 10:06:27.880947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917027/tftp-deploy-dgtjygpf/modules
863 10:06:27.901600 start: 4.1 power-off (timeout 00:00:30) [common]
864 10:06:27.902236 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
865 10:06:27.933766 >> OK - accepted request
866 10:06:27.935819 Returned 0 in 0 seconds
867 10:06:28.036720 end: 4.1 power-off (duration 00:00:00) [common]
869 10:06:28.037915 start: 4.2 read-feedback (timeout 00:10:00) [common]
870 10:06:28.038558 Listened to connection for namespace 'common' for up to 1s
871 10:06:29.038950 Finalising connection for namespace 'common'
872 10:06:29.039684 Disconnecting from shell: Finalise
873 10:06:29.040252 =>
874 10:06:29.141227 end: 4.2 read-feedback (duration 00:00:01) [common]
875 10:06:29.141912 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/917027
876 10:06:31.389475 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/917027
877 10:06:31.390112 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.