Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 10:26:49.647490 lava-dispatcher, installed at version: 2024.01
2 10:26:49.648291 start: 0 validate
3 10:26:49.648766 Start time: 2024-10-31 10:26:49.648736+00:00 (UTC)
4 10:26:49.649290 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 10:26:49.649830 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 10:26:49.690659 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 10:26:49.691188 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fkernel%2FImage exists
8 10:26:49.720866 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 10:26:49.721755 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 10:26:49.750548 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 10:26:49.751117 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 10:26:49.783198 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 10:26:49.783751 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fmodules.tar.xz exists
14 10:26:49.820239 validate duration: 0.17
16 10:26:49.821118 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 10:26:49.821460 start: 1.1 download-retry (timeout 00:10:00) [common]
18 10:26:49.821790 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 10:26:49.822400 Not decompressing ramdisk as can be used compressed.
20 10:26:49.822869 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 10:26:49.823163 saving as /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/ramdisk/initrd.cpio.gz
22 10:26:49.823440 total size: 5628169 (5 MB)
23 10:26:49.858336 progress 0 % (0 MB)
24 10:26:49.863442 progress 5 % (0 MB)
25 10:26:49.868625 progress 10 % (0 MB)
26 10:26:49.873240 progress 15 % (0 MB)
27 10:26:49.878399 progress 20 % (1 MB)
28 10:26:49.882776 progress 25 % (1 MB)
29 10:26:49.887646 progress 30 % (1 MB)
30 10:26:49.892611 progress 35 % (1 MB)
31 10:26:49.896944 progress 40 % (2 MB)
32 10:26:49.901785 progress 45 % (2 MB)
33 10:26:49.906223 progress 50 % (2 MB)
34 10:26:49.911098 progress 55 % (2 MB)
35 10:26:49.916032 progress 60 % (3 MB)
36 10:26:49.920554 progress 65 % (3 MB)
37 10:26:49.925409 progress 70 % (3 MB)
38 10:26:49.929839 progress 75 % (4 MB)
39 10:26:49.934614 progress 80 % (4 MB)
40 10:26:49.938922 progress 85 % (4 MB)
41 10:26:49.943746 progress 90 % (4 MB)
42 10:26:49.948576 progress 95 % (5 MB)
43 10:26:49.952475 progress 100 % (5 MB)
44 10:26:49.953249 5 MB downloaded in 0.13 s (41.36 MB/s)
45 10:26:49.953890 end: 1.1.1 http-download (duration 00:00:00) [common]
47 10:26:49.954972 end: 1.1 download-retry (duration 00:00:00) [common]
48 10:26:49.955332 start: 1.2 download-retry (timeout 00:10:00) [common]
49 10:26:49.955664 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 10:26:49.956248 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/kernel/Image
51 10:26:49.956554 saving as /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/kernel/Image
52 10:26:49.956808 total size: 38009344 (36 MB)
53 10:26:49.957064 No compression specified
54 10:26:49.997677 progress 0 % (0 MB)
55 10:26:50.025425 progress 5 % (1 MB)
56 10:26:50.053488 progress 10 % (3 MB)
57 10:26:50.081800 progress 15 % (5 MB)
58 10:26:50.109783 progress 20 % (7 MB)
59 10:26:50.138111 progress 25 % (9 MB)
60 10:26:50.166145 progress 30 % (10 MB)
61 10:26:50.194724 progress 35 % (12 MB)
62 10:26:50.222883 progress 40 % (14 MB)
63 10:26:50.251173 progress 45 % (16 MB)
64 10:26:50.279373 progress 50 % (18 MB)
65 10:26:50.307590 progress 55 % (19 MB)
66 10:26:50.335738 progress 60 % (21 MB)
67 10:26:50.363746 progress 65 % (23 MB)
68 10:26:50.392102 progress 70 % (25 MB)
69 10:26:50.425085 progress 75 % (27 MB)
70 10:26:50.450330 progress 80 % (29 MB)
71 10:26:50.474208 progress 85 % (30 MB)
72 10:26:50.497915 progress 90 % (32 MB)
73 10:26:50.521459 progress 95 % (34 MB)
74 10:26:50.544736 progress 100 % (36 MB)
75 10:26:50.545557 36 MB downloaded in 0.59 s (61.57 MB/s)
76 10:26:50.546053 end: 1.2.1 http-download (duration 00:00:01) [common]
78 10:26:50.546878 end: 1.2 download-retry (duration 00:00:01) [common]
79 10:26:50.547158 start: 1.3 download-retry (timeout 00:09:59) [common]
80 10:26:50.547424 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 10:26:50.547917 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 10:26:50.548233 saving as /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/dtb/meson-g12b-a311d-libretech-cc.dtb
83 10:26:50.548444 total size: 54703 (0 MB)
84 10:26:50.548654 No compression specified
85 10:26:50.588135 progress 59 % (0 MB)
86 10:26:50.589067 progress 100 % (0 MB)
87 10:26:50.589662 0 MB downloaded in 0.04 s (1.27 MB/s)
88 10:26:50.590172 end: 1.3.1 http-download (duration 00:00:00) [common]
90 10:26:50.591028 end: 1.3 download-retry (duration 00:00:00) [common]
91 10:26:50.591317 start: 1.4 download-retry (timeout 00:09:59) [common]
92 10:26:50.591608 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 10:26:50.592145 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 10:26:50.592434 saving as /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/nfsrootfs/full.rootfs.tar
95 10:26:50.592655 total size: 120894716 (115 MB)
96 10:26:50.592877 Using unxz to decompress xz
97 10:26:50.634525 progress 0 % (0 MB)
98 10:26:51.456383 progress 5 % (5 MB)
99 10:26:52.305712 progress 10 % (11 MB)
100 10:26:53.102554 progress 15 % (17 MB)
101 10:26:53.840898 progress 20 % (23 MB)
102 10:26:54.435956 progress 25 % (28 MB)
103 10:26:55.263154 progress 30 % (34 MB)
104 10:26:56.071819 progress 35 % (40 MB)
105 10:26:56.421698 progress 40 % (46 MB)
106 10:26:56.796139 progress 45 % (51 MB)
107 10:26:57.549027 progress 50 % (57 MB)
108 10:26:58.441741 progress 55 % (63 MB)
109 10:26:59.222547 progress 60 % (69 MB)
110 10:26:59.982375 progress 65 % (74 MB)
111 10:27:00.758274 progress 70 % (80 MB)
112 10:27:01.587377 progress 75 % (86 MB)
113 10:27:02.376936 progress 80 % (92 MB)
114 10:27:03.138250 progress 85 % (98 MB)
115 10:27:03.988045 progress 90 % (103 MB)
116 10:27:04.756030 progress 95 % (109 MB)
117 10:27:05.576403 progress 100 % (115 MB)
118 10:27:05.588730 115 MB downloaded in 15.00 s (7.69 MB/s)
119 10:27:05.589675 end: 1.4.1 http-download (duration 00:00:15) [common]
121 10:27:05.591451 end: 1.4 download-retry (duration 00:00:15) [common]
122 10:27:05.592083 start: 1.5 download-retry (timeout 00:09:44) [common]
123 10:27:05.592681 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 10:27:05.593574 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/modules.tar.xz
125 10:27:05.594086 saving as /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/modules/modules.tar
126 10:27:05.594547 total size: 11742820 (11 MB)
127 10:27:05.595016 Using unxz to decompress xz
128 10:27:05.638892 progress 0 % (0 MB)
129 10:27:05.706073 progress 5 % (0 MB)
130 10:27:05.788521 progress 10 % (1 MB)
131 10:27:05.870796 progress 15 % (1 MB)
132 10:27:05.952260 progress 20 % (2 MB)
133 10:27:06.028565 progress 25 % (2 MB)
134 10:27:06.109602 progress 30 % (3 MB)
135 10:27:06.185238 progress 35 % (3 MB)
136 10:27:06.265120 progress 40 % (4 MB)
137 10:27:06.349514 progress 45 % (5 MB)
138 10:27:06.430799 progress 50 % (5 MB)
139 10:27:06.514056 progress 55 % (6 MB)
140 10:27:06.596217 progress 60 % (6 MB)
141 10:27:06.674840 progress 65 % (7 MB)
142 10:27:06.757027 progress 70 % (7 MB)
143 10:27:06.840660 progress 75 % (8 MB)
144 10:27:06.922112 progress 80 % (8 MB)
145 10:27:07.000970 progress 85 % (9 MB)
146 10:27:07.074532 progress 90 % (10 MB)
147 10:27:07.172496 progress 95 % (10 MB)
148 10:27:07.265632 progress 100 % (11 MB)
149 10:27:07.277181 11 MB downloaded in 1.68 s (6.66 MB/s)
150 10:27:07.278023 end: 1.5.1 http-download (duration 00:00:02) [common]
152 10:27:07.279617 end: 1.5 download-retry (duration 00:00:02) [common]
153 10:27:07.280176 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 10:27:07.280693 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 10:27:24.389942 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/917029/extract-nfsrootfs-jp8e99xp
156 10:27:24.390556 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 10:27:24.390843 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 10:27:24.391483 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd
159 10:27:24.391956 makedir: /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin
160 10:27:24.392359 makedir: /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/tests
161 10:27:24.392772 makedir: /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/results
162 10:27:24.393137 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-add-keys
163 10:27:24.393702 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-add-sources
164 10:27:24.394255 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-background-process-start
165 10:27:24.394779 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-background-process-stop
166 10:27:24.395341 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-common-functions
167 10:27:24.395971 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-echo-ipv4
168 10:27:24.397888 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-install-packages
169 10:27:24.398441 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-installed-packages
170 10:27:24.398958 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-os-build
171 10:27:24.399508 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-probe-channel
172 10:27:24.400042 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-probe-ip
173 10:27:24.400560 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-target-ip
174 10:27:24.401046 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-target-mac
175 10:27:24.401546 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-target-storage
176 10:27:24.402062 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-test-case
177 10:27:24.402571 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-test-event
178 10:27:24.403071 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-test-feedback
179 10:27:24.403573 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-test-raise
180 10:27:24.404179 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-test-reference
181 10:27:24.405133 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-test-runner
182 10:27:24.405652 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-test-set
183 10:27:24.407255 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-test-shell
184 10:27:24.407783 Updating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-add-keys (debian)
185 10:27:24.408357 Updating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-add-sources (debian)
186 10:27:24.408872 Updating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-install-packages (debian)
187 10:27:24.409384 Updating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-installed-packages (debian)
188 10:27:24.409876 Updating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/bin/lava-os-build (debian)
189 10:27:24.410314 Creating /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/environment
190 10:27:24.410686 LAVA metadata
191 10:27:24.410947 - LAVA_JOB_ID=917029
192 10:27:24.411162 - LAVA_DISPATCHER_IP=192.168.6.2
193 10:27:24.411541 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 10:27:24.412532 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 10:27:24.412847 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 10:27:24.413053 skipped lava-vland-overlay
197 10:27:24.413291 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 10:27:24.413541 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 10:27:24.413756 skipped lava-multinode-overlay
200 10:27:24.413995 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 10:27:24.414241 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 10:27:24.414488 Loading test definitions
203 10:27:24.414760 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 10:27:24.414977 Using /lava-917029 at stage 0
205 10:27:24.416263 uuid=917029_1.6.2.4.1 testdef=None
206 10:27:24.416575 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 10:27:24.416833 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 10:27:24.418388 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 10:27:24.419159 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 10:27:24.421097 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 10:27:24.421910 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 10:27:24.423735 runner path: /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/0/tests/0_timesync-off test_uuid 917029_1.6.2.4.1
215 10:27:24.424303 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 10:27:24.425104 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 10:27:24.425321 Using /lava-917029 at stage 0
219 10:27:24.425666 Fetching tests from https://github.com/kernelci/test-definitions.git
220 10:27:24.425952 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/0/tests/1_kselftest-alsa'
221 10:27:27.768427 Running '/usr/bin/git checkout kernelci.org
222 10:27:28.214749 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 10:27:28.217513 uuid=917029_1.6.2.4.5 testdef=None
224 10:27:28.218164 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 10:27:28.219745 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 10:27:28.225649 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 10:27:28.227374 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 10:27:28.235225 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 10:27:28.237071 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 10:27:28.244687 runner path: /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/0/tests/1_kselftest-alsa test_uuid 917029_1.6.2.4.5
234 10:27:28.245260 BOARD='meson-g12b-a311d-libretech-cc'
235 10:27:28.245705 BRANCH='next'
236 10:27:28.246140 SKIPFILE='/dev/null'
237 10:27:28.246568 SKIP_INSTALL='True'
238 10:27:28.246994 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/kselftest.tar.xz'
239 10:27:28.247431 TST_CASENAME=''
240 10:27:28.247861 TST_CMDFILES='alsa'
241 10:27:28.248977 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 10:27:28.250648 Creating lava-test-runner.conf files
244 10:27:28.251086 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/917029/lava-overlay-mlyz78bd/lava-917029/0 for stage 0
245 10:27:28.251786 - 0_timesync-off
246 10:27:28.252327 - 1_kselftest-alsa
247 10:27:28.253015 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 10:27:28.253597 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 10:27:51.422908 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 10:27:51.423351 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 10:27:51.423612 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 10:27:51.423881 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 10:27:51.424175 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 10:27:52.039079 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 10:27:52.039545 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 10:27:52.039798 extracting modules file /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917029/extract-nfsrootfs-jp8e99xp
257 10:27:53.372695 extracting modules file /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917029/extract-overlay-ramdisk-7apzkyxu/ramdisk
258 10:27:54.742990 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 10:27:54.743470 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 10:27:54.743746 [common] Applying overlay to NFS
261 10:27:54.743960 [common] Applying overlay /var/lib/lava/dispatcher/tmp/917029/compress-overlay-ntwnqfp1/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/917029/extract-nfsrootfs-jp8e99xp
262 10:27:57.478031 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 10:27:57.478494 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 10:27:57.478770 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 10:27:57.478999 Converting downloaded kernel to a uImage
266 10:27:57.479320 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/kernel/Image /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/kernel/uImage
267 10:27:57.881375 output: Image Name:
268 10:27:57.881789 output: Created: Thu Oct 31 10:27:57 2024
269 10:27:57.881998 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 10:27:57.882201 output: Data Size: 38009344 Bytes = 37118.50 KiB = 36.25 MiB
271 10:27:57.882402 output: Load Address: 01080000
272 10:27:57.882603 output: Entry Point: 01080000
273 10:27:57.882799 output:
274 10:27:57.883133 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 10:27:57.883404 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 10:27:57.883677 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 10:27:57.883929 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 10:27:57.884238 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 10:27:57.884499 Building ramdisk /var/lib/lava/dispatcher/tmp/917029/extract-overlay-ramdisk-7apzkyxu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/917029/extract-overlay-ramdisk-7apzkyxu/ramdisk
280 10:28:00.079714 >> 173832 blocks
281 10:28:07.707155 Adding RAMdisk u-boot header.
282 10:28:07.707852 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/917029/extract-overlay-ramdisk-7apzkyxu/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/917029/extract-overlay-ramdisk-7apzkyxu/ramdisk.cpio.gz.uboot
283 10:28:07.961430 output: Image Name:
284 10:28:07.961827 output: Created: Thu Oct 31 10:28:07 2024
285 10:28:07.962041 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 10:28:07.962244 output: Data Size: 24156963 Bytes = 23590.78 KiB = 23.04 MiB
287 10:28:07.962445 output: Load Address: 00000000
288 10:28:07.962643 output: Entry Point: 00000000
289 10:28:07.962841 output:
290 10:28:07.963466 rename /var/lib/lava/dispatcher/tmp/917029/extract-overlay-ramdisk-7apzkyxu/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/ramdisk/ramdisk.cpio.gz.uboot
291 10:28:07.963897 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 10:28:07.964419 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 10:28:07.964949 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 10:28:07.965399 No LXC device requested
295 10:28:07.965896 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 10:28:07.966395 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 10:28:07.966883 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 10:28:07.967289 Checking files for TFTP limit of 4294967296 bytes.
299 10:28:07.969969 end: 1 tftp-deploy (duration 00:01:18) [common]
300 10:28:07.970550 start: 2 uboot-action (timeout 00:05:00) [common]
301 10:28:07.971069 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 10:28:07.971563 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 10:28:07.972095 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 10:28:07.972625 Using kernel file from prepare-kernel: 917029/tftp-deploy-eg646jk7/kernel/uImage
305 10:28:07.973252 substitutions:
306 10:28:07.973656 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 10:28:07.974056 - {DTB_ADDR}: 0x01070000
308 10:28:07.974452 - {DTB}: 917029/tftp-deploy-eg646jk7/dtb/meson-g12b-a311d-libretech-cc.dtb
309 10:28:07.974850 - {INITRD}: 917029/tftp-deploy-eg646jk7/ramdisk/ramdisk.cpio.gz.uboot
310 10:28:07.975242 - {KERNEL_ADDR}: 0x01080000
311 10:28:07.975630 - {KERNEL}: 917029/tftp-deploy-eg646jk7/kernel/uImage
312 10:28:07.976045 - {LAVA_MAC}: None
313 10:28:07.976475 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/917029/extract-nfsrootfs-jp8e99xp
314 10:28:07.976867 - {NFS_SERVER_IP}: 192.168.6.2
315 10:28:07.977252 - {PRESEED_CONFIG}: None
316 10:28:07.977636 - {PRESEED_LOCAL}: None
317 10:28:07.978024 - {RAMDISK_ADDR}: 0x08000000
318 10:28:07.978404 - {RAMDISK}: 917029/tftp-deploy-eg646jk7/ramdisk/ramdisk.cpio.gz.uboot
319 10:28:07.978786 - {ROOT_PART}: None
320 10:28:07.979168 - {ROOT}: None
321 10:28:07.979550 - {SERVER_IP}: 192.168.6.2
322 10:28:07.979932 - {TEE_ADDR}: 0x83000000
323 10:28:07.980383 - {TEE}: None
324 10:28:07.980771 Parsed boot commands:
325 10:28:07.981144 - setenv autoload no
326 10:28:07.981526 - setenv initrd_high 0xffffffff
327 10:28:07.981909 - setenv fdt_high 0xffffffff
328 10:28:07.982288 - dhcp
329 10:28:07.982666 - setenv serverip 192.168.6.2
330 10:28:07.983049 - tftpboot 0x01080000 917029/tftp-deploy-eg646jk7/kernel/uImage
331 10:28:07.983433 - tftpboot 0x08000000 917029/tftp-deploy-eg646jk7/ramdisk/ramdisk.cpio.gz.uboot
332 10:28:07.983817 - tftpboot 0x01070000 917029/tftp-deploy-eg646jk7/dtb/meson-g12b-a311d-libretech-cc.dtb
333 10:28:07.984230 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/917029/extract-nfsrootfs-jp8e99xp,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 10:28:07.984628 - bootm 0x01080000 0x08000000 0x01070000
335 10:28:07.985121 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 10:28:07.986585 start: 2.3 connect-device (timeout 00:05:00) [common]
338 10:28:07.986995 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 10:28:08.002668 Setting prompt string to ['lava-test: # ']
340 10:28:08.004172 end: 2.3 connect-device (duration 00:00:00) [common]
341 10:28:08.004779 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 10:28:08.005329 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 10:28:08.005865 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 10:28:08.007036 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 10:28:08.045111 >> OK - accepted request
346 10:28:08.047319 Returned 0 in 0 seconds
347 10:28:08.148573 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 10:28:08.150400 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 10:28:08.151034 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 10:28:08.151605 Setting prompt string to ['Hit any key to stop autoboot']
352 10:28:08.152175 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 10:28:08.153885 Trying 192.168.56.21...
354 10:28:08.154416 Connected to conserv1.
355 10:28:08.154882 Escape character is '^]'.
356 10:28:08.155363
357 10:28:08.155836 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 10:28:08.156344
359 10:28:19.971571 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 10:28:19.972280 bl2_stage_init 0x01
361 10:28:19.972745 bl2_stage_init 0x81
362 10:28:19.977001 hw id: 0x0000 - pwm id 0x01
363 10:28:19.977511 bl2_stage_init 0xc1
364 10:28:19.977973 bl2_stage_init 0x02
365 10:28:19.978419
366 10:28:19.982599 L0:00000000
367 10:28:19.983096 L1:20000703
368 10:28:19.983537 L2:00008067
369 10:28:19.983970 L3:14000000
370 10:28:19.985589 B2:00402000
371 10:28:19.986092 B1:e0f83180
372 10:28:19.986522
373 10:28:19.986948 TE: 58167
374 10:28:19.987372
375 10:28:19.996639 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 10:28:19.997115
377 10:28:19.997542 Board ID = 1
378 10:28:19.997966 Set A53 clk to 24M
379 10:28:19.998386 Set A73 clk to 24M
380 10:28:20.002196 Set clk81 to 24M
381 10:28:20.002655 A53 clk: 1200 MHz
382 10:28:20.003081 A73 clk: 1200 MHz
383 10:28:20.007768 CLK81: 166.6M
384 10:28:20.008257 smccc: 00012abd
385 10:28:20.013420 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 10:28:20.013877 board id: 1
387 10:28:20.021044 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 10:28:20.032703 fw parse done
389 10:28:20.037735 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 10:28:20.081185 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 10:28:20.092213 PIEI prepare done
392 10:28:20.092695 fastboot data load
393 10:28:20.093126 fastboot data verify
394 10:28:20.097841 verify result: 266
395 10:28:20.103411 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 10:28:20.103897 LPDDR4 probe
397 10:28:20.104390 ddr clk to 1584MHz
398 10:28:20.110571 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 10:28:20.147684
400 10:28:20.148209 dmc_version 0001
401 10:28:20.154815 Check phy result
402 10:28:20.161224 INFO : End of CA training
403 10:28:20.161720 INFO : End of initialization
404 10:28:20.166816 INFO : Training has run successfully!
405 10:28:20.167338 Check phy result
406 10:28:20.172384 INFO : End of initialization
407 10:28:20.172889 INFO : End of read enable training
408 10:28:20.175739 INFO : End of fine write leveling
409 10:28:20.181291 INFO : End of Write leveling coarse delay
410 10:28:20.186784 INFO : Training has run successfully!
411 10:28:20.187285 Check phy result
412 10:28:20.187765 INFO : End of initialization
413 10:28:20.192421 INFO : End of read dq deskew training
414 10:28:20.197987 INFO : End of MPR read delay center optimization
415 10:28:20.198497 INFO : End of write delay center optimization
416 10:28:20.203609 INFO : End of read delay center optimization
417 10:28:20.209247 INFO : End of max read latency training
418 10:28:20.209746 INFO : Training has run successfully!
419 10:28:20.214815 1D training succeed
420 10:28:20.220691 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 10:28:20.267812 Check phy result
422 10:28:20.268323 INFO : End of initialization
423 10:28:20.290013 INFO : End of 2D read delay Voltage center optimization
424 10:28:20.309628 INFO : End of 2D read delay Voltage center optimization
425 10:28:20.362241 INFO : End of 2D write delay Voltage center optimization
426 10:28:20.412115 INFO : End of 2D write delay Voltage center optimization
427 10:28:20.417495 INFO : Training has run successfully!
428 10:28:20.417969
429 10:28:20.418419 channel==0
430 10:28:20.423059 RxClkDly_Margin_A0==88 ps 9
431 10:28:20.423525 TxDqDly_Margin_A0==98 ps 10
432 10:28:20.426405 RxClkDly_Margin_A1==88 ps 9
433 10:28:20.426878 TxDqDly_Margin_A1==88 ps 9
434 10:28:20.431928 TrainedVREFDQ_A0==74
435 10:28:20.432438 TrainedVREFDQ_A1==74
436 10:28:20.432894 VrefDac_Margin_A0==25
437 10:28:20.437492 DeviceVref_Margin_A0==40
438 10:28:20.437963 VrefDac_Margin_A1==25
439 10:28:20.443129 DeviceVref_Margin_A1==40
440 10:28:20.443602
441 10:28:20.444077
442 10:28:20.444526 channel==1
443 10:28:20.444969 RxClkDly_Margin_A0==98 ps 10
444 10:28:20.447094 TxDqDly_Margin_A0==98 ps 10
445 10:28:20.452348 RxClkDly_Margin_A1==98 ps 10
446 10:28:20.452822 TxDqDly_Margin_A1==88 ps 9
447 10:28:20.453272 TrainedVREFDQ_A0==77
448 10:28:20.457836 TrainedVREFDQ_A1==77
449 10:28:20.458306 VrefDac_Margin_A0==22
450 10:28:20.463592 DeviceVref_Margin_A0==37
451 10:28:20.464084 VrefDac_Margin_A1==22
452 10:28:20.464532 DeviceVref_Margin_A1==37
453 10:28:20.464969
454 10:28:20.469108 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 10:28:20.469581
456 10:28:20.502542 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 0000001a 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 10:28:20.503104 2D training succeed
458 10:28:20.508236 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 10:28:20.513746 auto size-- 65535DDR cs0 size: 2048MB
460 10:28:20.514225 DDR cs1 size: 2048MB
461 10:28:20.519383 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 10:28:20.519854 cs0 DataBus test pass
463 10:28:20.520346 cs1 DataBus test pass
464 10:28:20.524981 cs0 AddrBus test pass
465 10:28:20.525454 cs1 AddrBus test pass
466 10:28:20.525899
467 10:28:20.530550 100bdlr_step_size ps== 420
468 10:28:20.531036 result report
469 10:28:20.531477 boot times 0Enable ddr reg access
470 10:28:20.540221 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 10:28:20.552840 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 10:28:21.127422 0.0;M3 CHK:0;cm4_sp_mode 0
473 10:28:21.128043 MVN_1=0x00000000
474 10:28:21.132811 MVN_2=0x00000000
475 10:28:21.138580 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 10:28:21.139056 OPS=0x10
477 10:28:21.139505 ring efuse init
478 10:28:21.139943 chipver efuse init
479 10:28:21.144251 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 10:28:21.149775 [0.018961 Inits done]
481 10:28:21.150243 secure task start!
482 10:28:21.150687 high task start!
483 10:28:21.153512 low task start!
484 10:28:21.153998 run into bl31
485 10:28:21.160966 NOTICE: BL31: v1.3(release):4fc40b1
486 10:28:21.168655 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 10:28:21.169150 NOTICE: BL31: G12A normal boot!
488 10:28:21.194282 NOTICE: BL31: BL33 decompress pass
489 10:28:21.199524 ERROR: Error initializing runtime service opteed_fast
490 10:28:22.432835
491 10:28:22.433441
492 10:28:22.441258 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 10:28:22.441736
494 10:28:22.442185 Model: Libre Computer AML-A311D-CC Alta
495 10:28:22.648711 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 10:28:22.673031 DRAM: 2 GiB (effective 3.8 GiB)
497 10:28:22.816049 Core: 408 devices, 31 uclasses, devicetree: separate
498 10:28:22.821893 WDT: Not starting watchdog@f0d0
499 10:28:22.854130 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 10:28:22.866627 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 10:28:22.871593 ** Bad device specification mmc 0 **
502 10:28:22.881946 Card did not respond to voltage select! : -110
503 10:28:22.889605 ** Bad device specification mmc 0 **
504 10:28:22.890072 Couldn't find partition mmc 0
505 10:28:22.897934 Card did not respond to voltage select! : -110
506 10:28:22.903496 ** Bad device specification mmc 0 **
507 10:28:22.903969 Couldn't find partition mmc 0
508 10:28:22.908560 Error: could not access storage.
509 10:28:24.171804 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 10:28:24.172396 bl2_stage_init 0x01
511 10:28:24.172886 bl2_stage_init 0x81
512 10:28:24.177305 hw id: 0x0000 - pwm id 0x01
513 10:28:24.177793 bl2_stage_init 0xc1
514 10:28:24.178244 bl2_stage_init 0x02
515 10:28:24.178682
516 10:28:24.182923 L0:00000000
517 10:28:24.183388 L1:20000703
518 10:28:24.183829 L2:00008067
519 10:28:24.184326 L3:14000000
520 10:28:24.188585 B2:00402000
521 10:28:24.189062 B1:e0f83180
522 10:28:24.189506
523 10:28:24.189947 TE: 58124
524 10:28:24.190386
525 10:28:24.194186 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 10:28:24.194658
527 10:28:24.195104 Board ID = 1
528 10:28:24.199718 Set A53 clk to 24M
529 10:28:24.200219 Set A73 clk to 24M
530 10:28:24.200666 Set clk81 to 24M
531 10:28:24.205373 A53 clk: 1200 MHz
532 10:28:24.205837 A73 clk: 1200 MHz
533 10:28:24.206280 CLK81: 166.6M
534 10:28:24.206715 smccc: 00012a92
535 10:28:24.210914 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 10:28:24.216459 board id: 1
537 10:28:24.221454 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 10:28:24.233039 fw parse done
539 10:28:24.238005 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 10:28:24.280671 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 10:28:24.292493 PIEI prepare done
542 10:28:24.292963 fastboot data load
543 10:28:24.293412 fastboot data verify
544 10:28:24.298273 verify result: 266
545 10:28:24.303841 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 10:28:24.304361 LPDDR4 probe
547 10:28:24.304809 ddr clk to 1584MHz
548 10:28:24.310903 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 10:28:24.348058
550 10:28:24.348530 dmc_version 0001
551 10:28:24.354682 Check phy result
552 10:28:24.361545 INFO : End of CA training
553 10:28:24.362012 INFO : End of initialization
554 10:28:24.367140 INFO : Training has run successfully!
555 10:28:24.367605 Check phy result
556 10:28:24.372775 INFO : End of initialization
557 10:28:24.373242 INFO : End of read enable training
558 10:28:24.376074 INFO : End of fine write leveling
559 10:28:24.381536 INFO : End of Write leveling coarse delay
560 10:28:24.387307 INFO : Training has run successfully!
561 10:28:24.387772 Check phy result
562 10:28:24.388250 INFO : End of initialization
563 10:28:24.392839 INFO : End of read dq deskew training
564 10:28:24.396283 INFO : End of MPR read delay center optimization
565 10:28:24.401835 INFO : End of write delay center optimization
566 10:28:24.407429 INFO : End of read delay center optimization
567 10:28:24.407893 INFO : End of max read latency training
568 10:28:24.413080 INFO : Training has run successfully!
569 10:28:24.413548 1D training succeed
570 10:28:24.420308 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 10:28:24.467805 Check phy result
572 10:28:24.468314 INFO : End of initialization
573 10:28:24.489593 INFO : End of 2D read delay Voltage center optimization
574 10:28:24.509159 INFO : End of 2D read delay Voltage center optimization
575 10:28:24.560988 INFO : End of 2D write delay Voltage center optimization
576 10:28:24.611375 INFO : End of 2D write delay Voltage center optimization
577 10:28:24.616920 INFO : Training has run successfully!
578 10:28:24.617389
579 10:28:24.617838 channel==0
580 10:28:24.622447 RxClkDly_Margin_A0==88 ps 9
581 10:28:24.622914 TxDqDly_Margin_A0==98 ps 10
582 10:28:24.628103 RxClkDly_Margin_A1==88 ps 9
583 10:28:24.628569 TxDqDly_Margin_A1==98 ps 10
584 10:28:24.629020 TrainedVREFDQ_A0==74
585 10:28:24.633732 TrainedVREFDQ_A1==75
586 10:28:24.634201 VrefDac_Margin_A0==25
587 10:28:24.634641 DeviceVref_Margin_A0==40
588 10:28:24.639328 VrefDac_Margin_A1==25
589 10:28:24.639793 DeviceVref_Margin_A1==39
590 10:28:24.640289
591 10:28:24.640738
592 10:28:24.644873 channel==1
593 10:28:24.645342 RxClkDly_Margin_A0==88 ps 9
594 10:28:24.645788 TxDqDly_Margin_A0==98 ps 10
595 10:28:24.650464 RxClkDly_Margin_A1==88 ps 9
596 10:28:24.650936 TxDqDly_Margin_A1==88 ps 9
597 10:28:24.656081 TrainedVREFDQ_A0==77
598 10:28:24.656553 TrainedVREFDQ_A1==77
599 10:28:24.656998 VrefDac_Margin_A0==23
600 10:28:24.661691 DeviceVref_Margin_A0==37
601 10:28:24.662151 VrefDac_Margin_A1==24
602 10:28:24.667336 DeviceVref_Margin_A1==37
603 10:28:24.667806
604 10:28:24.668287 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 10:28:24.668735
606 10:28:24.700892 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
607 10:28:24.701403 2D training succeed
608 10:28:24.706451 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 10:28:24.712073 auto size-- 65535DDR cs0 size: 2048MB
610 10:28:24.712563 DDR cs1 size: 2048MB
611 10:28:24.717697 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 10:28:24.718173 cs0 DataBus test pass
613 10:28:24.723309 cs1 DataBus test pass
614 10:28:24.723797 cs0 AddrBus test pass
615 10:28:24.724287 cs1 AddrBus test pass
616 10:28:24.724728
617 10:28:24.728867 100bdlr_step_size ps== 420
618 10:28:24.729351 result report
619 10:28:24.734555 boot times 0Enable ddr reg access
620 10:28:24.738766 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 10:28:24.752303 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 10:28:25.326967 0.0;M3 CHK:0;cm4_sp_mode 0
623 10:28:25.327462 MVN_1=0x00000000
624 10:28:25.332419 MVN_2=0x00000000
625 10:28:25.338171 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 10:28:25.338691 OPS=0x10
627 10:28:25.339164 ring efuse init
628 10:28:25.339628 chipver efuse init
629 10:28:25.343920 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 10:28:25.349293 [0.018961 Inits done]
631 10:28:25.349759 secure task start!
632 10:28:25.350179 high task start!
633 10:28:25.352967 low task start!
634 10:28:25.353423 run into bl31
635 10:28:25.360606 NOTICE: BL31: v1.3(release):4fc40b1
636 10:28:25.367408 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 10:28:25.367867 NOTICE: BL31: G12A normal boot!
638 10:28:25.393647 NOTICE: BL31: BL33 decompress pass
639 10:28:25.398460 ERROR: Error initializing runtime service opteed_fast
640 10:28:26.632508
641 10:28:26.633053
642 10:28:26.640785 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 10:28:26.641271
644 10:28:26.641719 Model: Libre Computer AML-A311D-CC Alta
645 10:28:26.848649 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 10:28:26.872566 DRAM: 2 GiB (effective 3.8 GiB)
647 10:28:27.015812 Core: 408 devices, 31 uclasses, devicetree: separate
648 10:28:27.021552 WDT: Not starting watchdog@f0d0
649 10:28:27.054230 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 10:28:27.066466 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 10:28:27.071250 ** Bad device specification mmc 0 **
652 10:28:27.081722 Card did not respond to voltage select! : -110
653 10:28:27.089172 ** Bad device specification mmc 0 **
654 10:28:27.089697 Couldn't find partition mmc 0
655 10:28:27.097717 Card did not respond to voltage select! : -110
656 10:28:27.103012 ** Bad device specification mmc 0 **
657 10:28:27.103516 Couldn't find partition mmc 0
658 10:28:27.108018 Error: could not access storage.
659 10:28:27.450482 Net: eth0: ethernet@ff3f0000
660 10:28:27.451024 starting USB...
661 10:28:27.702576 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 10:28:27.703083 Starting the controller
663 10:28:27.709266 USB XHCI 1.10
664 10:28:29.422001 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 10:28:29.422562 bl2_stage_init 0x01
666 10:28:29.422986 bl2_stage_init 0x81
667 10:28:29.427735 hw id: 0x0000 - pwm id 0x01
668 10:28:29.428213 bl2_stage_init 0xc1
669 10:28:29.428628 bl2_stage_init 0x02
670 10:28:29.429030
671 10:28:29.433220 L0:00000000
672 10:28:29.433654 L1:20000703
673 10:28:29.434059 L2:00008067
674 10:28:29.434457 L3:14000000
675 10:28:29.438844 B2:00402000
676 10:28:29.439272 B1:e0f83180
677 10:28:29.439678
678 10:28:29.440113 TE: 58159
679 10:28:29.440521
680 10:28:29.444354 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 10:28:29.444795
682 10:28:29.445204 Board ID = 1
683 10:28:29.450010 Set A53 clk to 24M
684 10:28:29.450445 Set A73 clk to 24M
685 10:28:29.450846 Set clk81 to 24M
686 10:28:29.455651 A53 clk: 1200 MHz
687 10:28:29.456103 A73 clk: 1200 MHz
688 10:28:29.456509 CLK81: 166.6M
689 10:28:29.456905 smccc: 00012ab5
690 10:28:29.461147 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 10:28:29.466865 board id: 1
692 10:28:29.472755 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 10:28:29.483111 fw parse done
694 10:28:29.489090 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 10:28:29.531734 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 10:28:29.542630 PIEI prepare done
697 10:28:29.543056 fastboot data load
698 10:28:29.543467 fastboot data verify
699 10:28:29.548323 verify result: 266
700 10:28:29.553897 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 10:28:29.554326 LPDDR4 probe
702 10:28:29.554723 ddr clk to 1584MHz
703 10:28:29.561865 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 10:28:29.599104
705 10:28:29.599532 dmc_version 0001
706 10:28:29.605815 Check phy result
707 10:28:29.611715 INFO : End of CA training
708 10:28:29.612178 INFO : End of initialization
709 10:28:29.617281 INFO : Training has run successfully!
710 10:28:29.617707 Check phy result
711 10:28:29.622873 INFO : End of initialization
712 10:28:29.623304 INFO : End of read enable training
713 10:28:29.628520 INFO : End of fine write leveling
714 10:28:29.634097 INFO : End of Write leveling coarse delay
715 10:28:29.634522 INFO : Training has run successfully!
716 10:28:29.634921 Check phy result
717 10:28:29.639672 INFO : End of initialization
718 10:28:29.640129 INFO : End of read dq deskew training
719 10:28:29.645319 INFO : End of MPR read delay center optimization
720 10:28:29.650872 INFO : End of write delay center optimization
721 10:28:29.656519 INFO : End of read delay center optimization
722 10:28:29.656944 INFO : End of max read latency training
723 10:28:29.662098 INFO : Training has run successfully!
724 10:28:29.662526 1D training succeed
725 10:28:29.671277 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 10:28:29.718844 Check phy result
727 10:28:29.719267 INFO : End of initialization
728 10:28:29.740551 INFO : End of 2D read delay Voltage center optimization
729 10:28:29.760825 INFO : End of 2D read delay Voltage center optimization
730 10:28:29.812820 INFO : End of 2D write delay Voltage center optimization
731 10:28:29.862260 INFO : End of 2D write delay Voltage center optimization
732 10:28:29.867780 INFO : Training has run successfully!
733 10:28:29.868248
734 10:28:29.868660 channel==0
735 10:28:29.873517 RxClkDly_Margin_A0==88 ps 9
736 10:28:29.873947 TxDqDly_Margin_A0==98 ps 10
737 10:28:29.878995 RxClkDly_Margin_A1==88 ps 9
738 10:28:29.879417 TxDqDly_Margin_A1==98 ps 10
739 10:28:29.879821 TrainedVREFDQ_A0==74
740 10:28:29.884618 TrainedVREFDQ_A1==74
741 10:28:29.885044 VrefDac_Margin_A0==25
742 10:28:29.885447 DeviceVref_Margin_A0==40
743 10:28:29.890260 VrefDac_Margin_A1==25
744 10:28:29.890682 DeviceVref_Margin_A1==40
745 10:28:29.891083
746 10:28:29.891480
747 10:28:29.895790 channel==1
748 10:28:29.896241 RxClkDly_Margin_A0==98 ps 10
749 10:28:29.896644 TxDqDly_Margin_A0==88 ps 9
750 10:28:29.901506 RxClkDly_Margin_A1==88 ps 9
751 10:28:29.901937 TxDqDly_Margin_A1==88 ps 9
752 10:28:29.906997 TrainedVREFDQ_A0==74
753 10:28:29.907439 TrainedVREFDQ_A1==77
754 10:28:29.907846 VrefDac_Margin_A0==22
755 10:28:29.912589 DeviceVref_Margin_A0==40
756 10:28:29.913012 VrefDac_Margin_A1==24
757 10:28:29.918250 DeviceVref_Margin_A1==37
758 10:28:29.918674
759 10:28:29.919084 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 10:28:29.919483
761 10:28:29.951797 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
762 10:28:29.952283 2D training succeed
763 10:28:29.957525 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 10:28:29.962998 auto size-- 65535DDR cs0 size: 2048MB
765 10:28:29.963427 DDR cs1 size: 2048MB
766 10:28:29.968590 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 10:28:29.969021 cs0 DataBus test pass
768 10:28:29.974270 cs1 DataBus test pass
769 10:28:29.974694 cs0 AddrBus test pass
770 10:28:29.975099 cs1 AddrBus test pass
771 10:28:29.975495
772 10:28:29.979786 100bdlr_step_size ps== 420
773 10:28:29.980274 result report
774 10:28:29.985524 boot times 0Enable ddr reg access
775 10:28:29.990648 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 10:28:30.004176 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 10:28:30.577795 0.0;M3 CHK:0;cm4_sp_mode 0
778 10:28:30.578291 MVN_1=0x00000000
779 10:28:30.583319 MVN_2=0x00000000
780 10:28:30.589066 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 10:28:30.589557 OPS=0x10
782 10:28:30.589950 ring efuse init
783 10:28:30.590330 chipver efuse init
784 10:28:30.594599 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 10:28:30.600283 [0.018961 Inits done]
786 10:28:30.600699 secure task start!
787 10:28:30.601087 high task start!
788 10:28:30.604800 low task start!
789 10:28:30.605211 run into bl31
790 10:28:30.611528 NOTICE: BL31: v1.3(release):4fc40b1
791 10:28:30.619249 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 10:28:30.619663 NOTICE: BL31: G12A normal boot!
793 10:28:30.645157 NOTICE: BL31: BL33 decompress pass
794 10:28:30.650811 ERROR: Error initializing runtime service opteed_fast
795 10:28:31.883784
796 10:28:31.884372
797 10:28:31.892181 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 10:28:31.892628
799 10:28:31.893035 Model: Libre Computer AML-A311D-CC Alta
800 10:28:32.100535 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 10:28:32.123909 DRAM: 2 GiB (effective 3.8 GiB)
802 10:28:32.266981 Core: 408 devices, 31 uclasses, devicetree: separate
803 10:28:32.272888 WDT: Not starting watchdog@f0d0
804 10:28:32.305002 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 10:28:32.317767 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 10:28:32.323569 ** Bad device specification mmc 0 **
807 10:28:32.333001 Card did not respond to voltage select! : -110
808 10:28:32.340591 ** Bad device specification mmc 0 **
809 10:28:32.341149 Couldn't find partition mmc 0
810 10:28:32.348805 Card did not respond to voltage select! : -110
811 10:28:32.354250 ** Bad device specification mmc 0 **
812 10:28:32.354695 Couldn't find partition mmc 0
813 10:28:32.359645 Error: could not access storage.
814 10:28:32.702961 Net: eth0: ethernet@ff3f0000
815 10:28:32.703482 starting USB...
816 10:28:32.954708 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 10:28:32.955167 Starting the controller
818 10:28:32.961739 USB XHCI 1.10
819 10:28:35.123862 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 10:28:35.124502 bl2_stage_init 0x01
821 10:28:35.124922 bl2_stage_init 0x81
822 10:28:35.129293 hw id: 0x0000 - pwm id 0x01
823 10:28:35.129732 bl2_stage_init 0xc1
824 10:28:35.130140 bl2_stage_init 0x02
825 10:28:35.130540
826 10:28:35.134888 L0:00000000
827 10:28:35.135318 L1:20000703
828 10:28:35.135720 L2:00008067
829 10:28:35.136161 L3:14000000
830 10:28:35.140530 B2:00402000
831 10:28:35.140965 B1:e0f83180
832 10:28:35.141372
833 10:28:35.141773 TE: 58159
834 10:28:35.142176
835 10:28:35.146090 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 10:28:35.146529
837 10:28:35.146937 Board ID = 1
838 10:28:35.151624 Set A53 clk to 24M
839 10:28:35.152081 Set A73 clk to 24M
840 10:28:35.152488 Set clk81 to 24M
841 10:28:35.157226 A53 clk: 1200 MHz
842 10:28:35.157657 A73 clk: 1200 MHz
843 10:28:35.158063 CLK81: 166.6M
844 10:28:35.158459 smccc: 00012ab5
845 10:28:35.162912 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 10:28:35.168408 board id: 1
847 10:28:35.174332 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 10:28:35.185039 fw parse done
849 10:28:35.190996 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 10:28:35.233476 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 10:28:35.244343 PIEI prepare done
852 10:28:35.244773 fastboot data load
853 10:28:35.245179 fastboot data verify
854 10:28:35.249952 verify result: 266
855 10:28:35.255550 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 10:28:35.256021 LPDDR4 probe
857 10:28:35.256441 ddr clk to 1584MHz
858 10:28:35.263534 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 10:28:35.300786
860 10:28:35.301231 dmc_version 0001
861 10:28:35.307461 Check phy result
862 10:28:35.313354 INFO : End of CA training
863 10:28:35.313790 INFO : End of initialization
864 10:28:35.318968 INFO : Training has run successfully!
865 10:28:35.319403 Check phy result
866 10:28:35.324538 INFO : End of initialization
867 10:28:35.324971 INFO : End of read enable training
868 10:28:35.330138 INFO : End of fine write leveling
869 10:28:35.335729 INFO : End of Write leveling coarse delay
870 10:28:35.336198 INFO : Training has run successfully!
871 10:28:35.336610 Check phy result
872 10:28:35.341349 INFO : End of initialization
873 10:28:35.341781 INFO : End of read dq deskew training
874 10:28:35.346981 INFO : End of MPR read delay center optimization
875 10:28:35.352538 INFO : End of write delay center optimization
876 10:28:35.358125 INFO : End of read delay center optimization
877 10:28:35.358555 INFO : End of max read latency training
878 10:28:35.363728 INFO : Training has run successfully!
879 10:28:35.364191 1D training succeed
880 10:28:35.372919 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 10:28:35.420494 Check phy result
882 10:28:35.420946 INFO : End of initialization
883 10:28:35.443079 INFO : End of 2D read delay Voltage center optimization
884 10:28:35.463327 INFO : End of 2D read delay Voltage center optimization
885 10:28:35.515317 INFO : End of 2D write delay Voltage center optimization
886 10:28:35.564680 INFO : End of 2D write delay Voltage center optimization
887 10:28:35.570267 INFO : Training has run successfully!
888 10:28:35.570696
889 10:28:35.571107 channel==0
890 10:28:35.575891 RxClkDly_Margin_A0==88 ps 9
891 10:28:35.576367 TxDqDly_Margin_A0==98 ps 10
892 10:28:35.581471 RxClkDly_Margin_A1==88 ps 9
893 10:28:35.581899 TxDqDly_Margin_A1==98 ps 10
894 10:28:35.582324 TrainedVREFDQ_A0==74
895 10:28:35.587156 TrainedVREFDQ_A1==75
896 10:28:35.587642 VrefDac_Margin_A0==24
897 10:28:35.588091 DeviceVref_Margin_A0==40
898 10:28:35.592701 VrefDac_Margin_A1==25
899 10:28:35.593159 DeviceVref_Margin_A1==39
900 10:28:35.593542
901 10:28:35.593924
902 10:28:35.598275 channel==1
903 10:28:35.598692 RxClkDly_Margin_A0==98 ps 10
904 10:28:35.599078 TxDqDly_Margin_A0==98 ps 10
905 10:28:35.603869 RxClkDly_Margin_A1==88 ps 9
906 10:28:35.604311 TxDqDly_Margin_A1==88 ps 9
907 10:28:35.609484 TrainedVREFDQ_A0==77
908 10:28:35.609917 TrainedVREFDQ_A1==77
909 10:28:35.610303 VrefDac_Margin_A0==22
910 10:28:35.615139 DeviceVref_Margin_A0==37
911 10:28:35.615548 VrefDac_Margin_A1==24
912 10:28:35.620678 DeviceVref_Margin_A1==37
913 10:28:35.621089
914 10:28:35.621474 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 10:28:35.621857
916 10:28:35.654275 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
917 10:28:35.654775 2D training succeed
918 10:28:35.659890 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 10:28:35.665480 auto size-- 65535DDR cs0 size: 2048MB
920 10:28:35.665897 DDR cs1 size: 2048MB
921 10:28:35.671150 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 10:28:35.671573 cs0 DataBus test pass
923 10:28:35.676664 cs1 DataBus test pass
924 10:28:35.677076 cs0 AddrBus test pass
925 10:28:35.677460 cs1 AddrBus test pass
926 10:28:35.677839
927 10:28:35.682260 100bdlr_step_size ps== 420
928 10:28:35.682703 result report
929 10:28:35.687872 boot times 0Enable ddr reg access
930 10:28:35.693222 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 10:28:35.706713 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 10:28:36.280565 0.0;M3 CHK:0;cm4_sp_mode 0
933 10:28:36.281169 MVN_1=0x00000000
934 10:28:36.285942 MVN_2=0x00000000
935 10:28:36.291695 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 10:28:36.292188 OPS=0x10
937 10:28:36.292598 ring efuse init
938 10:28:36.292995 chipver efuse init
939 10:28:36.297292 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 10:28:36.302891 [0.018960 Inits done]
941 10:28:36.303316 secure task start!
942 10:28:36.303716 high task start!
943 10:28:36.307481 low task start!
944 10:28:36.307903 run into bl31
945 10:28:36.314243 NOTICE: BL31: v1.3(release):4fc40b1
946 10:28:36.321947 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 10:28:36.322380 NOTICE: BL31: G12A normal boot!
948 10:28:36.347319 NOTICE: BL31: BL33 decompress pass
949 10:28:36.353005 ERROR: Error initializing runtime service opteed_fast
950 10:28:37.585908
951 10:28:37.586405
952 10:28:37.594379 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 10:28:37.594815
954 10:28:37.595223 Model: Libre Computer AML-A311D-CC Alta
955 10:28:37.802687 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 10:28:37.826124 DRAM: 2 GiB (effective 3.8 GiB)
957 10:28:37.969313 Core: 408 devices, 31 uclasses, devicetree: separate
958 10:28:37.975032 WDT: Not starting watchdog@f0d0
959 10:28:38.007257 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 10:28:38.019722 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 10:28:38.024703 ** Bad device specification mmc 0 **
962 10:28:38.035026 Card did not respond to voltage select! : -110
963 10:28:38.042682 ** Bad device specification mmc 0 **
964 10:28:38.043112 Couldn't find partition mmc 0
965 10:28:38.051017 Card did not respond to voltage select! : -110
966 10:28:38.056532 ** Bad device specification mmc 0 **
967 10:28:38.056957 Couldn't find partition mmc 0
968 10:28:38.061591 Error: could not access storage.
969 10:28:38.404095 Net: eth0: ethernet@ff3f0000
970 10:28:38.404545 starting USB...
971 10:28:38.655850 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 10:28:38.656340 Starting the controller
973 10:28:38.662840 USB XHCI 1.10
974 10:28:40.216900 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 10:28:40.225197 scanning usb for storage devices... 0 Storage Device(s) found
977 10:28:40.276604 Hit any key to stop autoboot: 1
978 10:28:40.277344 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 10:28:40.277924 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 10:28:40.278386 Setting prompt string to ['=>']
981 10:28:40.278871 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 10:28:40.292738 0
983 10:28:40.293564 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 10:28:40.294037 Sending with 10 millisecond of delay
986 10:28:41.428442 => setenv autoload no
987 10:28:41.439144 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 10:28:41.444062 setenv autoload no
989 10:28:41.444771 Sending with 10 millisecond of delay
991 10:28:43.241122 => setenv initrd_high 0xffffffff
992 10:28:43.251823 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 10:28:43.252628 setenv initrd_high 0xffffffff
994 10:28:43.253326 Sending with 10 millisecond of delay
996 10:28:44.869086 => setenv fdt_high 0xffffffff
997 10:28:44.879708 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 10:28:44.880490 setenv fdt_high 0xffffffff
999 10:28:44.881183 Sending with 10 millisecond of delay
1001 10:28:45.172878 => dhcp
1002 10:28:45.183453 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 10:28:45.184215 dhcp
1004 10:28:45.184644 Speed: 1000, full duplex
1005 10:28:45.185052 BOOTP broadcast 1
1006 10:28:45.195695 DHCP client bound to address 192.168.6.27 (12 ms)
1007 10:28:45.196395 Sending with 10 millisecond of delay
1009 10:28:46.872421 => setenv serverip 192.168.6.2
1010 10:28:46.883147 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 10:28:46.884034 setenv serverip 192.168.6.2
1012 10:28:46.884728 Sending with 10 millisecond of delay
1014 10:28:50.607084 => tftpboot 0x01080000 917029/tftp-deploy-eg646jk7/kernel/uImage
1015 10:28:50.617796 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1016 10:28:50.618571 tftpboot 0x01080000 917029/tftp-deploy-eg646jk7/kernel/uImage
1017 10:28:50.619008 Speed: 1000, full duplex
1018 10:28:50.619417 Using ethernet@ff3f0000 device
1019 10:28:50.620447 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 10:28:50.626100 Filename '917029/tftp-deploy-eg646jk7/kernel/uImage'.
1021 10:28:50.629870 Load address: 0x1080000
1022 10:28:52.936362 Loading: *################################################## 36.2 MiB
1023 10:28:52.936981 15.7 MiB/s
1024 10:28:52.937417 done
1025 10:28:52.940912 Bytes transferred = 38009408 (243fa40 hex)
1026 10:28:52.941734 Sending with 10 millisecond of delay
1028 10:28:57.627420 => tftpboot 0x08000000 917029/tftp-deploy-eg646jk7/ramdisk/ramdisk.cpio.gz.uboot
1029 10:28:57.638233 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 10:28:57.639021 tftpboot 0x08000000 917029/tftp-deploy-eg646jk7/ramdisk/ramdisk.cpio.gz.uboot
1031 10:28:57.639464 Speed: 1000, full duplex
1032 10:28:57.639876 Using ethernet@ff3f0000 device
1033 10:28:57.640812 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 10:28:57.652745 Filename '917029/tftp-deploy-eg646jk7/ramdisk/ramdisk.cpio.gz.uboot'.
1035 10:28:57.653252 Load address: 0x8000000
1036 10:29:04.881408 Loading: *######T ########################################### UDP wrong checksum 00000005 00006987
1037 10:29:09.881974 T UDP wrong checksum 00000005 00006987
1038 10:29:19.885051 T T UDP wrong checksum 00000005 00006987
1039 10:29:39.889056 T T T T UDP wrong checksum 00000005 00006987
1040 10:29:54.893205 T T
1041 10:29:54.893821 Retry count exceeded; starting again
1043 10:29:54.895236 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1046 10:29:54.897216 end: 2.4 uboot-commands (duration 00:01:47) [common]
1048 10:29:54.898586 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1050 10:29:54.899580 end: 2 uboot-action (duration 00:01:47) [common]
1052 10:29:54.901145 Cleaning after the job
1053 10:29:54.901678 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/ramdisk
1054 10:29:54.903682 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/kernel
1055 10:29:54.941164 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/dtb
1056 10:29:54.942006 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/nfsrootfs
1057 10:29:55.095287 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917029/tftp-deploy-eg646jk7/modules
1058 10:29:55.114369 start: 4.1 power-off (timeout 00:00:30) [common]
1059 10:29:55.114972 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1060 10:29:55.147107 >> OK - accepted request
1061 10:29:55.149435 Returned 0 in 0 seconds
1062 10:29:55.250129 end: 4.1 power-off (duration 00:00:00) [common]
1064 10:29:55.251037 start: 4.2 read-feedback (timeout 00:10:00) [common]
1065 10:29:55.251678 Listened to connection for namespace 'common' for up to 1s
1066 10:29:56.252590 Finalising connection for namespace 'common'
1067 10:29:56.252968 Disconnecting from shell: Finalise
1068 10:29:56.253245 =>
1069 10:29:56.353822 end: 4.2 read-feedback (duration 00:00:01) [common]
1070 10:29:56.354135 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/917029
1071 10:29:59.209881 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/917029
1072 10:29:59.210524 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.