Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 10:51:10.591913 lava-dispatcher, installed at version: 2024.01
2 10:51:10.592714 start: 0 validate
3 10:51:10.593181 Start time: 2024-10-31 10:51:10.593152+00:00 (UTC)
4 10:51:10.593718 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 10:51:10.594249 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 10:51:10.635314 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 10:51:10.635856 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fkernel%2FImage exists
8 10:51:10.664172 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 10:51:10.664784 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 10:51:10.694708 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 10:51:10.695188 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 10:51:10.726365 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 10:51:10.726830 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fmodules.tar.xz exists
14 10:51:10.762043 validate duration: 0.17
16 10:51:10.762888 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 10:51:10.763233 start: 1.1 download-retry (timeout 00:10:00) [common]
18 10:51:10.763603 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 10:51:10.764233 Not decompressing ramdisk as can be used compressed.
20 10:51:10.764676 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 10:51:10.764964 saving as /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/ramdisk/initrd.cpio.gz
22 10:51:10.765231 total size: 5628169 (5 MB)
23 10:51:10.801336 progress 0 % (0 MB)
24 10:51:10.808959 progress 5 % (0 MB)
25 10:51:10.816668 progress 10 % (0 MB)
26 10:51:10.823447 progress 15 % (0 MB)
27 10:51:10.829680 progress 20 % (1 MB)
28 10:51:10.833260 progress 25 % (1 MB)
29 10:51:10.837213 progress 30 % (1 MB)
30 10:51:10.841186 progress 35 % (1 MB)
31 10:51:10.844682 progress 40 % (2 MB)
32 10:51:10.848605 progress 45 % (2 MB)
33 10:51:10.852141 progress 50 % (2 MB)
34 10:51:10.855958 progress 55 % (2 MB)
35 10:51:10.859915 progress 60 % (3 MB)
36 10:51:10.863464 progress 65 % (3 MB)
37 10:51:10.867363 progress 70 % (3 MB)
38 10:51:10.870931 progress 75 % (4 MB)
39 10:51:10.874940 progress 80 % (4 MB)
40 10:51:10.878478 progress 85 % (4 MB)
41 10:51:10.882377 progress 90 % (4 MB)
42 10:51:10.886090 progress 95 % (5 MB)
43 10:51:10.889296 progress 100 % (5 MB)
44 10:51:10.889917 5 MB downloaded in 0.12 s (43.05 MB/s)
45 10:51:10.890454 end: 1.1.1 http-download (duration 00:00:00) [common]
47 10:51:10.891331 end: 1.1 download-retry (duration 00:00:00) [common]
48 10:51:10.891623 start: 1.2 download-retry (timeout 00:10:00) [common]
49 10:51:10.891891 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 10:51:10.892374 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/kernel/Image
51 10:51:10.892616 saving as /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/kernel/Image
52 10:51:10.892824 total size: 38009344 (36 MB)
53 10:51:10.893033 No compression specified
54 10:51:10.927596 progress 0 % (0 MB)
55 10:51:10.950852 progress 5 % (1 MB)
56 10:51:10.974892 progress 10 % (3 MB)
57 10:51:10.998224 progress 15 % (5 MB)
58 10:51:11.021674 progress 20 % (7 MB)
59 10:51:11.045195 progress 25 % (9 MB)
60 10:51:11.068808 progress 30 % (10 MB)
61 10:51:11.092331 progress 35 % (12 MB)
62 10:51:11.115506 progress 40 % (14 MB)
63 10:51:11.138900 progress 45 % (16 MB)
64 10:51:11.162349 progress 50 % (18 MB)
65 10:51:11.185687 progress 55 % (19 MB)
66 10:51:11.209023 progress 60 % (21 MB)
67 10:51:11.232570 progress 65 % (23 MB)
68 10:51:11.255810 progress 70 % (25 MB)
69 10:51:11.279482 progress 75 % (27 MB)
70 10:51:11.302881 progress 80 % (29 MB)
71 10:51:11.326288 progress 85 % (30 MB)
72 10:51:11.349687 progress 90 % (32 MB)
73 10:51:11.373123 progress 95 % (34 MB)
74 10:51:11.395848 progress 100 % (36 MB)
75 10:51:11.396605 36 MB downloaded in 0.50 s (71.95 MB/s)
76 10:51:11.397110 end: 1.2.1 http-download (duration 00:00:01) [common]
78 10:51:11.397979 end: 1.2 download-retry (duration 00:00:01) [common]
79 10:51:11.398297 start: 1.3 download-retry (timeout 00:09:59) [common]
80 10:51:11.398574 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 10:51:11.399043 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 10:51:11.399311 saving as /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/dtb/meson-g12b-a311d-libretech-cc.dtb
83 10:51:11.399519 total size: 54703 (0 MB)
84 10:51:11.399727 No compression specified
85 10:51:11.438279 progress 59 % (0 MB)
86 10:51:11.439122 progress 100 % (0 MB)
87 10:51:11.439654 0 MB downloaded in 0.04 s (1.30 MB/s)
88 10:51:11.440140 end: 1.3.1 http-download (duration 00:00:00) [common]
90 10:51:11.440964 end: 1.3 download-retry (duration 00:00:00) [common]
91 10:51:11.441225 start: 1.4 download-retry (timeout 00:09:59) [common]
92 10:51:11.441490 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 10:51:11.441933 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 10:51:11.442168 saving as /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/nfsrootfs/full.rootfs.tar
95 10:51:11.442372 total size: 120894716 (115 MB)
96 10:51:11.442579 Using unxz to decompress xz
97 10:51:11.477766 progress 0 % (0 MB)
98 10:51:12.260041 progress 5 % (5 MB)
99 10:51:13.089728 progress 10 % (11 MB)
100 10:51:13.885278 progress 15 % (17 MB)
101 10:51:14.621100 progress 20 % (23 MB)
102 10:51:15.217173 progress 25 % (28 MB)
103 10:51:16.052323 progress 30 % (34 MB)
104 10:51:16.839954 progress 35 % (40 MB)
105 10:51:17.185666 progress 40 % (46 MB)
106 10:51:17.554274 progress 45 % (51 MB)
107 10:51:18.260712 progress 50 % (57 MB)
108 10:51:19.136947 progress 55 % (63 MB)
109 10:51:19.915556 progress 60 % (69 MB)
110 10:51:20.665922 progress 65 % (74 MB)
111 10:51:21.445848 progress 70 % (80 MB)
112 10:51:22.269375 progress 75 % (86 MB)
113 10:51:23.048738 progress 80 % (92 MB)
114 10:51:23.800615 progress 85 % (98 MB)
115 10:51:24.643541 progress 90 % (103 MB)
116 10:51:25.422795 progress 95 % (109 MB)
117 10:51:26.261018 progress 100 % (115 MB)
118 10:51:26.273404 115 MB downloaded in 14.83 s (7.77 MB/s)
119 10:51:26.274088 end: 1.4.1 http-download (duration 00:00:15) [common]
121 10:51:26.275760 end: 1.4 download-retry (duration 00:00:15) [common]
122 10:51:26.276357 start: 1.5 download-retry (timeout 00:09:44) [common]
123 10:51:26.276889 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 10:51:26.278123 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/modules.tar.xz
125 10:51:26.278614 saving as /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/modules/modules.tar
126 10:51:26.279033 total size: 11742820 (11 MB)
127 10:51:26.279456 Using unxz to decompress xz
128 10:51:26.323932 progress 0 % (0 MB)
129 10:51:26.391008 progress 5 % (0 MB)
130 10:51:26.465534 progress 10 % (1 MB)
131 10:51:26.546211 progress 15 % (1 MB)
132 10:51:26.626394 progress 20 % (2 MB)
133 10:51:26.702662 progress 25 % (2 MB)
134 10:51:26.783337 progress 30 % (3 MB)
135 10:51:26.859289 progress 35 % (3 MB)
136 10:51:26.939702 progress 40 % (4 MB)
137 10:51:27.025592 progress 45 % (5 MB)
138 10:51:27.108817 progress 50 % (5 MB)
139 10:51:27.193910 progress 55 % (6 MB)
140 10:51:27.275387 progress 60 % (6 MB)
141 10:51:27.353483 progress 65 % (7 MB)
142 10:51:27.432975 progress 70 % (7 MB)
143 10:51:27.516158 progress 75 % (8 MB)
144 10:51:27.597343 progress 80 % (8 MB)
145 10:51:27.676151 progress 85 % (9 MB)
146 10:51:27.749505 progress 90 % (10 MB)
147 10:51:27.847294 progress 95 % (10 MB)
148 10:51:27.940168 progress 100 % (11 MB)
149 10:51:27.951724 11 MB downloaded in 1.67 s (6.70 MB/s)
150 10:51:27.952637 end: 1.5.1 http-download (duration 00:00:02) [common]
152 10:51:27.954251 end: 1.5 download-retry (duration 00:00:02) [common]
153 10:51:27.954768 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 10:51:27.955279 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 10:51:44.141203 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/917070/extract-nfsrootfs-crnq5v1l
156 10:51:44.141817 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 10:51:44.142108 start: 1.6.2 lava-overlay (timeout 00:09:27) [common]
158 10:51:44.142796 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce
159 10:51:44.143251 makedir: /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin
160 10:51:44.143587 makedir: /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/tests
161 10:51:44.143946 makedir: /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/results
162 10:51:44.144330 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-add-keys
163 10:51:44.144883 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-add-sources
164 10:51:44.145403 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-background-process-start
165 10:51:44.145927 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-background-process-stop
166 10:51:44.146490 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-common-functions
167 10:51:44.146998 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-echo-ipv4
168 10:51:44.147488 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-install-packages
169 10:51:44.148050 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-installed-packages
170 10:51:44.148631 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-os-build
171 10:51:44.149123 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-probe-channel
172 10:51:44.149604 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-probe-ip
173 10:51:44.150127 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-target-ip
174 10:51:44.150615 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-target-mac
175 10:51:44.151098 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-target-storage
176 10:51:44.151623 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-test-case
177 10:51:44.152192 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-test-event
178 10:51:44.152765 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-test-feedback
179 10:51:44.153262 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-test-raise
180 10:51:44.153806 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-test-reference
181 10:51:44.154298 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-test-runner
182 10:51:44.154781 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-test-set
183 10:51:44.155300 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-test-shell
184 10:51:44.155804 Updating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-add-keys (debian)
185 10:51:44.156378 Updating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-add-sources (debian)
186 10:51:44.156901 Updating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-install-packages (debian)
187 10:51:44.157412 Updating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-installed-packages (debian)
188 10:51:44.157916 Updating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/bin/lava-os-build (debian)
189 10:51:44.158391 Creating /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/environment
190 10:51:44.158772 LAVA metadata
191 10:51:44.159032 - LAVA_JOB_ID=917070
192 10:51:44.159247 - LAVA_DISPATCHER_IP=192.168.6.2
193 10:51:44.159603 start: 1.6.2.1 ssh-authorize (timeout 00:09:27) [common]
194 10:51:44.160622 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 10:51:44.160942 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:27) [common]
196 10:51:44.161150 skipped lava-vland-overlay
197 10:51:44.161387 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 10:51:44.161638 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:27) [common]
199 10:51:44.161855 skipped lava-multinode-overlay
200 10:51:44.162091 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 10:51:44.162341 start: 1.6.2.4 test-definition (timeout 00:09:27) [common]
202 10:51:44.162586 Loading test definitions
203 10:51:44.162856 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:27) [common]
204 10:51:44.163073 Using /lava-917070 at stage 0
205 10:51:44.164167 uuid=917070_1.6.2.4.1 testdef=None
206 10:51:44.164469 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 10:51:44.164732 start: 1.6.2.4.2 test-overlay (timeout 00:09:27) [common]
208 10:51:44.166343 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 10:51:44.167129 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:27) [common]
211 10:51:44.169131 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 10:51:44.169951 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:27) [common]
214 10:51:44.171845 runner path: /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/0/tests/0_timesync-off test_uuid 917070_1.6.2.4.1
215 10:51:44.172424 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 10:51:44.173235 start: 1.6.2.4.5 git-repo-action (timeout 00:09:27) [common]
218 10:51:44.173456 Using /lava-917070 at stage 0
219 10:51:44.173803 Fetching tests from https://github.com/kernelci/test-definitions.git
220 10:51:44.174092 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/0/tests/1_kselftest-dt'
221 10:51:47.641731 Running '/usr/bin/git checkout kernelci.org
222 10:51:48.094456 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 10:51:48.095891 uuid=917070_1.6.2.4.5 testdef=None
224 10:51:48.096477 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 10:51:48.098084 start: 1.6.2.4.6 test-overlay (timeout 00:09:23) [common]
227 10:51:48.104192 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 10:51:48.105966 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:23) [common]
230 10:51:48.114169 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 10:51:48.116046 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:23) [common]
233 10:51:48.123831 runner path: /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/0/tests/1_kselftest-dt test_uuid 917070_1.6.2.4.5
234 10:51:48.124467 BOARD='meson-g12b-a311d-libretech-cc'
235 10:51:48.124913 BRANCH='next'
236 10:51:48.125342 SKIPFILE='/dev/null'
237 10:51:48.125768 SKIP_INSTALL='True'
238 10:51:48.126199 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/kselftest.tar.xz'
239 10:51:48.126634 TST_CASENAME=''
240 10:51:48.127061 TST_CMDFILES='dt'
241 10:51:48.128220 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 10:51:48.129953 Creating lava-test-runner.conf files
244 10:51:48.130399 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/917070/lava-overlay-mqya6jce/lava-917070/0 for stage 0
245 10:51:48.131104 - 0_timesync-off
246 10:51:48.131610 - 1_kselftest-dt
247 10:51:48.132354 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 10:51:48.132965 start: 1.6.2.5 compress-overlay (timeout 00:09:23) [common]
249 10:52:11.309698 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 10:52:11.310145 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 10:52:11.310409 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 10:52:11.310681 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 10:52:11.310949 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 10:52:11.923176 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 10:52:11.923653 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 10:52:11.923903 extracting modules file /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917070/extract-nfsrootfs-crnq5v1l
257 10:52:13.271309 extracting modules file /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917070/extract-overlay-ramdisk-vnpvobi3/ramdisk
258 10:52:14.682935 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 10:52:14.683419 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 10:52:14.683697 [common] Applying overlay to NFS
261 10:52:14.683911 [common] Applying overlay /var/lib/lava/dispatcher/tmp/917070/compress-overlay-r3mr5ehx/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/917070/extract-nfsrootfs-crnq5v1l
262 10:52:17.407439 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 10:52:17.407901 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 10:52:17.408215 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 10:52:17.408448 Converting downloaded kernel to a uImage
266 10:52:17.408755 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/kernel/Image /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/kernel/uImage
267 10:52:17.872356 output: Image Name:
268 10:52:17.872784 output: Created: Thu Oct 31 10:52:17 2024
269 10:52:17.872993 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 10:52:17.873197 output: Data Size: 38009344 Bytes = 37118.50 KiB = 36.25 MiB
271 10:52:17.873397 output: Load Address: 01080000
272 10:52:17.873596 output: Entry Point: 01080000
273 10:52:17.873792 output:
274 10:52:17.874124 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 10:52:17.874392 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 10:52:17.874661 start: 1.6.7 configure-preseed-file (timeout 00:08:53) [common]
277 10:52:17.874915 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 10:52:17.875171 start: 1.6.8 compress-ramdisk (timeout 00:08:53) [common]
279 10:52:17.875435 Building ramdisk /var/lib/lava/dispatcher/tmp/917070/extract-overlay-ramdisk-vnpvobi3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/917070/extract-overlay-ramdisk-vnpvobi3/ramdisk
280 10:52:20.090958 >> 173832 blocks
281 10:52:27.983583 Adding RAMdisk u-boot header.
282 10:52:27.984302 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/917070/extract-overlay-ramdisk-vnpvobi3/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/917070/extract-overlay-ramdisk-vnpvobi3/ramdisk.cpio.gz.uboot
283 10:52:28.245175 output: Image Name:
284 10:52:28.245597 output: Created: Thu Oct 31 10:52:27 2024
285 10:52:28.245808 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 10:52:28.246012 output: Data Size: 24156005 Bytes = 23589.85 KiB = 23.04 MiB
287 10:52:28.246212 output: Load Address: 00000000
288 10:52:28.246410 output: Entry Point: 00000000
289 10:52:28.246607 output:
290 10:52:28.247260 rename /var/lib/lava/dispatcher/tmp/917070/extract-overlay-ramdisk-vnpvobi3/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/ramdisk/ramdisk.cpio.gz.uboot
291 10:52:28.247684 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 10:52:28.247971 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 10:52:28.248687 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:43) [common]
294 10:52:28.249205 No LXC device requested
295 10:52:28.249761 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 10:52:28.250321 start: 1.8 deploy-device-env (timeout 00:08:43) [common]
297 10:52:28.250865 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 10:52:28.251318 Checking files for TFTP limit of 4294967296 bytes.
299 10:52:28.254260 end: 1 tftp-deploy (duration 00:01:17) [common]
300 10:52:28.254882 start: 2 uboot-action (timeout 00:05:00) [common]
301 10:52:28.255456 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 10:52:28.256027 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 10:52:28.256633 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 10:52:28.257210 Using kernel file from prepare-kernel: 917070/tftp-deploy-8q73o264/kernel/uImage
305 10:52:28.257897 substitutions:
306 10:52:28.258346 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 10:52:28.258790 - {DTB_ADDR}: 0x01070000
308 10:52:28.259230 - {DTB}: 917070/tftp-deploy-8q73o264/dtb/meson-g12b-a311d-libretech-cc.dtb
309 10:52:28.259671 - {INITRD}: 917070/tftp-deploy-8q73o264/ramdisk/ramdisk.cpio.gz.uboot
310 10:52:28.260143 - {KERNEL_ADDR}: 0x01080000
311 10:52:28.260578 - {KERNEL}: 917070/tftp-deploy-8q73o264/kernel/uImage
312 10:52:28.261011 - {LAVA_MAC}: None
313 10:52:28.261481 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/917070/extract-nfsrootfs-crnq5v1l
314 10:52:28.261917 - {NFS_SERVER_IP}: 192.168.6.2
315 10:52:28.262344 - {PRESEED_CONFIG}: None
316 10:52:28.262773 - {PRESEED_LOCAL}: None
317 10:52:28.263198 - {RAMDISK_ADDR}: 0x08000000
318 10:52:28.263624 - {RAMDISK}: 917070/tftp-deploy-8q73o264/ramdisk/ramdisk.cpio.gz.uboot
319 10:52:28.264082 - {ROOT_PART}: None
320 10:52:28.264516 - {ROOT}: None
321 10:52:28.264940 - {SERVER_IP}: 192.168.6.2
322 10:52:28.265363 - {TEE_ADDR}: 0x83000000
323 10:52:28.265786 - {TEE}: None
324 10:52:28.266206 Parsed boot commands:
325 10:52:28.266618 - setenv autoload no
326 10:52:28.267040 - setenv initrd_high 0xffffffff
327 10:52:28.267458 - setenv fdt_high 0xffffffff
328 10:52:28.267877 - dhcp
329 10:52:28.268332 - setenv serverip 192.168.6.2
330 10:52:28.268758 - tftpboot 0x01080000 917070/tftp-deploy-8q73o264/kernel/uImage
331 10:52:28.269185 - tftpboot 0x08000000 917070/tftp-deploy-8q73o264/ramdisk/ramdisk.cpio.gz.uboot
332 10:52:28.269611 - tftpboot 0x01070000 917070/tftp-deploy-8q73o264/dtb/meson-g12b-a311d-libretech-cc.dtb
333 10:52:28.270039 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/917070/extract-nfsrootfs-crnq5v1l,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 10:52:28.270478 - bootm 0x01080000 0x08000000 0x01070000
335 10:52:28.271013 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 10:52:28.272683 start: 2.3 connect-device (timeout 00:05:00) [common]
338 10:52:28.273142 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 10:52:28.288298 Setting prompt string to ['lava-test: # ']
340 10:52:28.289909 end: 2.3 connect-device (duration 00:00:00) [common]
341 10:52:28.290582 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 10:52:28.291203 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 10:52:28.291795 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 10:52:28.293059 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 10:52:28.330817 >> OK - accepted request
346 10:52:28.332994 Returned 0 in 0 seconds
347 10:52:28.434121 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 10:52:28.435827 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 10:52:28.436493 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 10:52:28.437045 Setting prompt string to ['Hit any key to stop autoboot']
352 10:52:28.437539 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 10:52:28.439219 Trying 192.168.56.21...
354 10:52:28.439723 Connected to conserv1.
355 10:52:28.440213 Escape character is '^]'.
356 10:52:28.440669
357 10:52:28.441130 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 10:52:28.441595
359 10:52:39.779185 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 10:52:39.779809 bl2_stage_init 0x01
361 10:52:39.780364 bl2_stage_init 0x81
362 10:52:39.784914 hw id: 0x0000 - pwm id 0x01
363 10:52:39.785482 bl2_stage_init 0xc1
364 10:52:39.785947 bl2_stage_init 0x02
365 10:52:39.786393
366 10:52:39.790409 L0:00000000
367 10:52:39.790905 L1:20000703
368 10:52:39.791356 L2:00008067
369 10:52:39.791800 L3:14000000
370 10:52:39.793251 B2:00402000
371 10:52:39.793728 B1:e0f83180
372 10:52:39.794159
373 10:52:39.794590 TE: 58167
374 10:52:39.795019
375 10:52:39.804337 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 10:52:39.804813
377 10:52:39.805246 Board ID = 1
378 10:52:39.805672 Set A53 clk to 24M
379 10:52:39.806096 Set A73 clk to 24M
380 10:52:39.810022 Set clk81 to 24M
381 10:52:39.810485 A53 clk: 1200 MHz
382 10:52:39.810914 A73 clk: 1200 MHz
383 10:52:39.815588 CLK81: 166.6M
384 10:52:39.816073 smccc: 00012abd
385 10:52:39.821293 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 10:52:39.821754 board id: 1
387 10:52:39.829895 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 10:52:39.840459 fw parse done
389 10:52:39.846403 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 10:52:39.888977 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 10:52:39.899814 PIEI prepare done
392 10:52:39.900313 fastboot data load
393 10:52:39.900748 fastboot data verify
394 10:52:39.905583 verify result: 266
395 10:52:39.911101 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 10:52:39.911570 LPDDR4 probe
397 10:52:39.912058 ddr clk to 1584MHz
398 10:52:39.919105 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 10:52:39.956329
400 10:52:39.956820 dmc_version 0001
401 10:52:39.963039 Check phy result
402 10:52:39.968900 INFO : End of CA training
403 10:52:39.969370 INFO : End of initialization
404 10:52:39.974502 INFO : Training has run successfully!
405 10:52:39.974967 Check phy result
406 10:52:39.980069 INFO : End of initialization
407 10:52:39.980534 INFO : End of read enable training
408 10:52:39.983398 INFO : End of fine write leveling
409 10:52:39.988938 INFO : End of Write leveling coarse delay
410 10:52:39.994608 INFO : Training has run successfully!
411 10:52:39.995079 Check phy result
412 10:52:39.995528 INFO : End of initialization
413 10:52:40.000183 INFO : End of read dq deskew training
414 10:52:40.005902 INFO : End of MPR read delay center optimization
415 10:52:40.006387 INFO : End of write delay center optimization
416 10:52:40.011378 INFO : End of read delay center optimization
417 10:52:40.016942 INFO : End of max read latency training
418 10:52:40.017416 INFO : Training has run successfully!
419 10:52:40.022578 1D training succeed
420 10:52:40.028538 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 10:52:40.076111 Check phy result
422 10:52:40.076584 INFO : End of initialization
423 10:52:40.097974 INFO : End of 2D read delay Voltage center optimization
424 10:52:40.118105 INFO : End of 2D read delay Voltage center optimization
425 10:52:40.170125 INFO : End of 2D write delay Voltage center optimization
426 10:52:40.219531 INFO : End of 2D write delay Voltage center optimization
427 10:52:40.225120 INFO : Training has run successfully!
428 10:52:40.225605
429 10:52:40.226056 channel==0
430 10:52:40.230653 RxClkDly_Margin_A0==88 ps 9
431 10:52:40.231122 TxDqDly_Margin_A0==98 ps 10
432 10:52:40.236330 RxClkDly_Margin_A1==78 ps 8
433 10:52:40.236796 TxDqDly_Margin_A1==98 ps 10
434 10:52:40.237247 TrainedVREFDQ_A0==74
435 10:52:40.241995 TrainedVREFDQ_A1==74
436 10:52:40.242470 VrefDac_Margin_A0==25
437 10:52:40.242916 DeviceVref_Margin_A0==40
438 10:52:40.247508 VrefDac_Margin_A1==25
439 10:52:40.247974 DeviceVref_Margin_A1==40
440 10:52:40.248462
441 10:52:40.248906
442 10:52:40.253127 channel==1
443 10:52:40.253593 RxClkDly_Margin_A0==98 ps 10
444 10:52:40.254036 TxDqDly_Margin_A0==98 ps 10
445 10:52:40.258716 RxClkDly_Margin_A1==98 ps 10
446 10:52:40.259187 TxDqDly_Margin_A1==88 ps 9
447 10:52:40.264281 TrainedVREFDQ_A0==77
448 10:52:40.264750 TrainedVREFDQ_A1==77
449 10:52:40.265197 VrefDac_Margin_A0==22
450 10:52:40.269937 DeviceVref_Margin_A0==37
451 10:52:40.270409 VrefDac_Margin_A1==24
452 10:52:40.275548 DeviceVref_Margin_A1==37
453 10:52:40.276042
454 10:52:40.276499 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 10:52:40.281087
456 10:52:40.308991 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 10:52:40.309541 2D training succeed
458 10:52:40.314588 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 10:52:40.320182 auto size-- 65535DDR cs0 size: 2048MB
460 10:52:40.320648 DDR cs1 size: 2048MB
461 10:52:40.325882 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 10:52:40.326355 cs0 DataBus test pass
463 10:52:40.331363 cs1 DataBus test pass
464 10:52:40.331828 cs0 AddrBus test pass
465 10:52:40.332325 cs1 AddrBus test pass
466 10:52:40.332774
467 10:52:40.336988 100bdlr_step_size ps== 420
468 10:52:40.337468 result report
469 10:52:40.342598 boot times 0Enable ddr reg access
470 10:52:40.348050 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 10:52:40.361501 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 10:52:40.935179 0.0;M3 CHK:0;cm4_sp_mode 0
473 10:52:40.935746 MVN_1=0x00000000
474 10:52:40.940675 MVN_2=0x00000000
475 10:52:40.946424 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 10:52:40.946909 OPS=0x10
477 10:52:40.947364 ring efuse init
478 10:52:40.947808 chipver efuse init
479 10:52:40.952037 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 10:52:40.957620 [0.018961 Inits done]
481 10:52:40.958089 secure task start!
482 10:52:40.958535 high task start!
483 10:52:40.962193 low task start!
484 10:52:40.962661 run into bl31
485 10:52:40.968867 NOTICE: BL31: v1.3(release):4fc40b1
486 10:52:40.976663 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 10:52:40.977138 NOTICE: BL31: G12A normal boot!
488 10:52:41.001992 NOTICE: BL31: BL33 decompress pass
489 10:52:41.007691 ERROR: Error initializing runtime service opteed_fast
490 10:52:42.240475
491 10:52:42.240995
492 10:52:42.248932 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 10:52:42.249416
494 10:52:42.249870 Model: Libre Computer AML-A311D-CC Alta
495 10:52:42.457341 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 10:52:42.480704 DRAM: 2 GiB (effective 3.8 GiB)
497 10:52:42.623678 Core: 408 devices, 31 uclasses, devicetree: separate
498 10:52:42.629610 WDT: Not starting watchdog@f0d0
499 10:52:42.661859 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 10:52:42.674349 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 10:52:42.679324 ** Bad device specification mmc 0 **
502 10:52:42.689640 Card did not respond to voltage select! : -110
503 10:52:42.697292 ** Bad device specification mmc 0 **
504 10:52:42.697763 Couldn't find partition mmc 0
505 10:52:42.705633 Card did not respond to voltage select! : -110
506 10:52:42.711153 ** Bad device specification mmc 0 **
507 10:52:42.711634 Couldn't find partition mmc 0
508 10:52:42.716232 Error: could not access storage.
509 10:52:43.979378 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 10:52:43.979937 bl2_stage_init 0x01
511 10:52:43.980487 bl2_stage_init 0x81
512 10:52:43.985049 hw id: 0x0000 - pwm id 0x01
513 10:52:43.985543 bl2_stage_init 0xc1
514 10:52:43.986005 bl2_stage_init 0x02
515 10:52:43.986457
516 10:52:43.990558 L0:00000000
517 10:52:43.991034 L1:20000703
518 10:52:43.991481 L2:00008067
519 10:52:43.991923 L3:14000000
520 10:52:43.996290 B2:00402000
521 10:52:43.996767 B1:e0f83180
522 10:52:43.997217
523 10:52:43.997662 TE: 58167
524 10:52:43.998109
525 10:52:44.001771 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 10:52:44.002255
527 10:52:44.002712 Board ID = 1
528 10:52:44.007366 Set A53 clk to 24M
529 10:52:44.007849 Set A73 clk to 24M
530 10:52:44.008338 Set clk81 to 24M
531 10:52:44.013049 A53 clk: 1200 MHz
532 10:52:44.013524 A73 clk: 1200 MHz
533 10:52:44.013973 CLK81: 166.6M
534 10:52:44.014417 smccc: 00012abe
535 10:52:44.018530 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 10:52:44.024285 board id: 1
537 10:52:44.030106 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 10:52:44.040692 fw parse done
539 10:52:44.046669 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 10:52:44.089365 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 10:52:44.100291 PIEI prepare done
542 10:52:44.100762 fastboot data load
543 10:52:44.101220 fastboot data verify
544 10:52:44.105915 verify result: 266
545 10:52:44.111450 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 10:52:44.111918 LPDDR4 probe
547 10:52:44.112422 ddr clk to 1584MHz
548 10:52:44.119441 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 10:52:44.156662
550 10:52:44.157139 dmc_version 0001
551 10:52:44.163438 Check phy result
552 10:52:44.169367 INFO : End of CA training
553 10:52:44.169839 INFO : End of initialization
554 10:52:44.174835 INFO : Training has run successfully!
555 10:52:44.175308 Check phy result
556 10:52:44.180431 INFO : End of initialization
557 10:52:44.180907 INFO : End of read enable training
558 10:52:44.186119 INFO : End of fine write leveling
559 10:52:44.191638 INFO : End of Write leveling coarse delay
560 10:52:44.192136 INFO : Training has run successfully!
561 10:52:44.192589 Check phy result
562 10:52:44.197347 INFO : End of initialization
563 10:52:44.197820 INFO : End of read dq deskew training
564 10:52:44.202824 INFO : End of MPR read delay center optimization
565 10:52:44.208437 INFO : End of write delay center optimization
566 10:52:44.214039 INFO : End of read delay center optimization
567 10:52:44.214508 INFO : End of max read latency training
568 10:52:44.219642 INFO : Training has run successfully!
569 10:52:44.220151 1D training succeed
570 10:52:44.228830 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 10:52:44.276477 Check phy result
572 10:52:44.276947 INFO : End of initialization
573 10:52:44.297990 INFO : End of 2D read delay Voltage center optimization
574 10:52:44.318109 INFO : End of 2D read delay Voltage center optimization
575 10:52:44.370000 INFO : End of 2D write delay Voltage center optimization
576 10:52:44.419224 INFO : End of 2D write delay Voltage center optimization
577 10:52:44.424797 INFO : Training has run successfully!
578 10:52:44.425271
579 10:52:44.425729 channel==0
580 10:52:44.430405 RxClkDly_Margin_A0==88 ps 9
581 10:52:44.430872 TxDqDly_Margin_A0==98 ps 10
582 10:52:44.436007 RxClkDly_Margin_A1==88 ps 9
583 10:52:44.436475 TxDqDly_Margin_A1==98 ps 10
584 10:52:44.436929 TrainedVREFDQ_A0==74
585 10:52:44.441616 TrainedVREFDQ_A1==74
586 10:52:44.442091 VrefDac_Margin_A0==25
587 10:52:44.442537 DeviceVref_Margin_A0==40
588 10:52:44.447222 VrefDac_Margin_A1==25
589 10:52:44.447694 DeviceVref_Margin_A1==40
590 10:52:44.448176
591 10:52:44.448626
592 10:52:44.452801 channel==1
593 10:52:44.453270 RxClkDly_Margin_A0==98 ps 10
594 10:52:44.453717 TxDqDly_Margin_A0==98 ps 10
595 10:52:44.458390 RxClkDly_Margin_A1==98 ps 10
596 10:52:44.458862 TxDqDly_Margin_A1==88 ps 9
597 10:52:44.464033 TrainedVREFDQ_A0==77
598 10:52:44.464507 TrainedVREFDQ_A1==77
599 10:52:44.464955 VrefDac_Margin_A0==22
600 10:52:44.469614 DeviceVref_Margin_A0==37
601 10:52:44.470081 VrefDac_Margin_A1==24
602 10:52:44.475199 DeviceVref_Margin_A1==37
603 10:52:44.475685
604 10:52:44.476174 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 10:52:44.480801
606 10:52:44.508820 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 10:52:44.509329 2D training succeed
608 10:52:44.514423 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 10:52:44.520032 auto size-- 65535DDR cs0 size: 2048MB
610 10:52:44.520517 DDR cs1 size: 2048MB
611 10:52:44.525614 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 10:52:44.526090 cs0 DataBus test pass
613 10:52:44.531218 cs1 DataBus test pass
614 10:52:44.531700 cs0 AddrBus test pass
615 10:52:44.532192 cs1 AddrBus test pass
616 10:52:44.532643
617 10:52:44.536789 100bdlr_step_size ps== 420
618 10:52:44.537277 result report
619 10:52:44.542425 boot times 0Enable ddr reg access
620 10:52:44.547842 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 10:52:44.561302 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 10:52:45.133443 0.0;M3 CHK:0;cm4_sp_mode 0
623 10:52:45.134131 MVN_1=0x00000000
624 10:52:45.138784 MVN_2=0x00000000
625 10:52:45.144555 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 10:52:45.145082 OPS=0x10
627 10:52:45.145546 ring efuse init
628 10:52:45.146027 chipver efuse init
629 10:52:45.150189 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 10:52:45.155722 [0.018961 Inits done]
631 10:52:45.156249 secure task start!
632 10:52:45.156687 high task start!
633 10:52:45.160304 low task start!
634 10:52:45.160771 run into bl31
635 10:52:45.166969 NOTICE: BL31: v1.3(release):4fc40b1
636 10:52:45.174775 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 10:52:45.175246 NOTICE: BL31: G12A normal boot!
638 10:52:45.200187 NOTICE: BL31: BL33 decompress pass
639 10:52:45.205874 ERROR: Error initializing runtime service opteed_fast
640 10:52:46.438964
641 10:52:46.439588
642 10:52:46.447373 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 10:52:46.447869
644 10:52:46.448375 Model: Libre Computer AML-A311D-CC Alta
645 10:52:46.655697 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 10:52:46.679110 DRAM: 2 GiB (effective 3.8 GiB)
647 10:52:46.822169 Core: 408 devices, 31 uclasses, devicetree: separate
648 10:52:46.828084 WDT: Not starting watchdog@f0d0
649 10:52:46.860227 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 10:52:46.872807 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 10:52:46.877704 ** Bad device specification mmc 0 **
652 10:52:46.887952 Card did not respond to voltage select! : -110
653 10:52:46.895736 ** Bad device specification mmc 0 **
654 10:52:46.896249 Couldn't find partition mmc 0
655 10:52:46.904053 Card did not respond to voltage select! : -110
656 10:52:46.909605 ** Bad device specification mmc 0 **
657 10:52:46.910079 Couldn't find partition mmc 0
658 10:52:46.914719 Error: could not access storage.
659 10:52:47.257134 Net: eth0: ethernet@ff3f0000
660 10:52:47.257620 starting USB...
661 10:52:47.508960 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 10:52:47.509462 Starting the controller
663 10:52:47.515926 USB XHCI 1.10
664 10:52:49.229606 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 10:52:49.230173 bl2_stage_init 0x01
666 10:52:49.230645 bl2_stage_init 0x81
667 10:52:49.235198 hw id: 0x0000 - pwm id 0x01
668 10:52:49.235679 bl2_stage_init 0xc1
669 10:52:49.236192 bl2_stage_init 0x02
670 10:52:49.236646
671 10:52:49.240969 L0:00000000
672 10:52:49.241444 L1:20000703
673 10:52:49.241892 L2:00008067
674 10:52:49.242330 L3:14000000
675 10:52:49.246335 B2:00402000
676 10:52:49.246808 B1:e0f83180
677 10:52:49.247257
678 10:52:49.247702 TE: 58124
679 10:52:49.248184
680 10:52:49.252076 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 10:52:49.252556
682 10:52:49.253008 Board ID = 1
683 10:52:49.257609 Set A53 clk to 24M
684 10:52:49.258086 Set A73 clk to 24M
685 10:52:49.258530 Set clk81 to 24M
686 10:52:49.263247 A53 clk: 1200 MHz
687 10:52:49.263719 A73 clk: 1200 MHz
688 10:52:49.264210 CLK81: 166.6M
689 10:52:49.264661 smccc: 00012a92
690 10:52:49.268806 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 10:52:49.274329 board id: 1
692 10:52:49.280315 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 10:52:49.290857 fw parse done
694 10:52:49.296965 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 10:52:49.339685 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 10:52:49.350430 PIEI prepare done
697 10:52:49.350900 fastboot data load
698 10:52:49.351355 fastboot data verify
699 10:52:49.356223 verify result: 266
700 10:52:49.361657 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 10:52:49.362135 LPDDR4 probe
702 10:52:49.362586 ddr clk to 1584MHz
703 10:52:49.369630 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 10:52:49.406876
705 10:52:49.407353 dmc_version 0001
706 10:52:49.413586 Check phy result
707 10:52:49.419412 INFO : End of CA training
708 10:52:49.419882 INFO : End of initialization
709 10:52:49.425165 INFO : Training has run successfully!
710 10:52:49.425636 Check phy result
711 10:52:49.430629 INFO : End of initialization
712 10:52:49.431097 INFO : End of read enable training
713 10:52:49.433936 INFO : End of fine write leveling
714 10:52:49.439513 INFO : End of Write leveling coarse delay
715 10:52:49.445145 INFO : Training has run successfully!
716 10:52:49.445615 Check phy result
717 10:52:49.446063 INFO : End of initialization
718 10:52:49.450663 INFO : End of read dq deskew training
719 10:52:49.456308 INFO : End of MPR read delay center optimization
720 10:52:49.456780 INFO : End of write delay center optimization
721 10:52:49.461913 INFO : End of read delay center optimization
722 10:52:49.467477 INFO : End of max read latency training
723 10:52:49.467947 INFO : Training has run successfully!
724 10:52:49.473145 1D training succeed
725 10:52:49.479051 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 10:52:49.526577 Check phy result
727 10:52:49.527049 INFO : End of initialization
728 10:52:49.548378 INFO : End of 2D read delay Voltage center optimization
729 10:52:49.568546 INFO : End of 2D read delay Voltage center optimization
730 10:52:49.620755 INFO : End of 2D write delay Voltage center optimization
731 10:52:49.670062 INFO : End of 2D write delay Voltage center optimization
732 10:52:49.675624 INFO : Training has run successfully!
733 10:52:49.676133
734 10:52:49.676591 channel==0
735 10:52:49.681216 RxClkDly_Margin_A0==88 ps 9
736 10:52:49.681688 TxDqDly_Margin_A0==98 ps 10
737 10:52:49.686755 RxClkDly_Margin_A1==88 ps 9
738 10:52:49.687233 TxDqDly_Margin_A1==98 ps 10
739 10:52:49.687687 TrainedVREFDQ_A0==74
740 10:52:49.692330 TrainedVREFDQ_A1==74
741 10:52:49.692801 VrefDac_Margin_A0==25
742 10:52:49.693244 DeviceVref_Margin_A0==40
743 10:52:49.697965 VrefDac_Margin_A1==25
744 10:52:49.698427 DeviceVref_Margin_A1==40
745 10:52:49.698874
746 10:52:49.699317
747 10:52:49.703540 channel==1
748 10:52:49.704035 RxClkDly_Margin_A0==98 ps 10
749 10:52:49.704485 TxDqDly_Margin_A0==98 ps 10
750 10:52:49.709212 RxClkDly_Margin_A1==88 ps 9
751 10:52:49.709686 TxDqDly_Margin_A1==98 ps 10
752 10:52:49.714751 TrainedVREFDQ_A0==77
753 10:52:49.715224 TrainedVREFDQ_A1==77
754 10:52:49.715674 VrefDac_Margin_A0==22
755 10:52:49.720319 DeviceVref_Margin_A0==37
756 10:52:49.720790 VrefDac_Margin_A1==24
757 10:52:49.726015 DeviceVref_Margin_A1==37
758 10:52:49.726487
759 10:52:49.726937 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 10:52:49.731629
761 10:52:49.759486 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000017 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
762 10:52:49.760006 2D training succeed
763 10:52:49.765146 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 10:52:49.770674 auto size-- 65535DDR cs0 size: 2048MB
765 10:52:49.771143 DDR cs1 size: 2048MB
766 10:52:49.776271 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 10:52:49.776744 cs0 DataBus test pass
768 10:52:49.781889 cs1 DataBus test pass
769 10:52:49.782355 cs0 AddrBus test pass
770 10:52:49.782799 cs1 AddrBus test pass
771 10:52:49.783239
772 10:52:49.787480 100bdlr_step_size ps== 420
773 10:52:49.787971 result report
774 10:52:49.793119 boot times 0Enable ddr reg access
775 10:52:49.798498 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 10:52:49.812071 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 10:52:50.385739 0.0;M3 CHK:0;cm4_sp_mode 0
778 10:52:50.386368 MVN_1=0x00000000
779 10:52:50.391241 MVN_2=0x00000000
780 10:52:50.397003 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 10:52:50.397560 OPS=0x10
782 10:52:50.398003 ring efuse init
783 10:52:50.398431 chipver efuse init
784 10:52:50.405234 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 10:52:50.405728 [0.018961 Inits done]
786 10:52:50.406160 secure task start!
787 10:52:50.412697 high task start!
788 10:52:50.413163 low task start!
789 10:52:50.413595 run into bl31
790 10:52:50.419353 NOTICE: BL31: v1.3(release):4fc40b1
791 10:52:50.427292 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 10:52:50.427773 NOTICE: BL31: G12A normal boot!
793 10:52:50.453240 NOTICE: BL31: BL33 decompress pass
794 10:52:50.458756 ERROR: Error initializing runtime service opteed_fast
795 10:52:51.691782
796 10:52:51.692505
797 10:52:51.700150 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 10:52:51.700655
799 10:52:51.701116 Model: Libre Computer AML-A311D-CC Alta
800 10:52:51.908668 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 10:52:51.931851 DRAM: 2 GiB (effective 3.8 GiB)
802 10:52:52.074859 Core: 408 devices, 31 uclasses, devicetree: separate
803 10:52:52.080698 WDT: Not starting watchdog@f0d0
804 10:52:52.112963 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 10:52:52.125413 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 10:52:52.130474 ** Bad device specification mmc 0 **
807 10:52:52.140724 Card did not respond to voltage select! : -110
808 10:52:52.148465 ** Bad device specification mmc 0 **
809 10:52:52.148951 Couldn't find partition mmc 0
810 10:52:52.156716 Card did not respond to voltage select! : -110
811 10:52:52.162231 ** Bad device specification mmc 0 **
812 10:52:52.162724 Couldn't find partition mmc 0
813 10:52:52.167300 Error: could not access storage.
814 10:52:52.509816 Net: eth0: ethernet@ff3f0000
815 10:52:52.510426 starting USB...
816 10:52:52.761781 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 10:52:52.762446 Starting the controller
818 10:52:52.768632 USB XHCI 1.10
819 10:52:54.931328 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 10:52:54.932031 bl2_stage_init 0x01
821 10:52:54.932508 bl2_stage_init 0x81
822 10:52:54.936958 hw id: 0x0000 - pwm id 0x01
823 10:52:54.937450 bl2_stage_init 0xc1
824 10:52:54.937911 bl2_stage_init 0x02
825 10:52:54.938358
826 10:52:54.942721 L0:00000000
827 10:52:54.943200 L1:20000703
828 10:52:54.943649 L2:00008067
829 10:52:54.944133 L3:14000000
830 10:52:54.945483 B2:00402000
831 10:52:54.945959 B1:e0f83180
832 10:52:54.946408
833 10:52:54.946852 TE: 58159
834 10:52:54.947301
835 10:52:54.956701 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 10:52:54.957188
837 10:52:54.957645 Board ID = 1
838 10:52:54.958090 Set A53 clk to 24M
839 10:52:54.958530 Set A73 clk to 24M
840 10:52:54.962614 Set clk81 to 24M
841 10:52:54.963092 A53 clk: 1200 MHz
842 10:52:54.963540 A73 clk: 1200 MHz
843 10:52:54.967937 CLK81: 166.6M
844 10:52:54.968445 smccc: 00012ab5
845 10:52:54.973385 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 10:52:54.973872 board id: 1
847 10:52:54.982200 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 10:52:54.992531 fw parse done
849 10:52:54.998636 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 10:52:55.041138 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 10:52:55.052016 PIEI prepare done
852 10:52:55.052504 fastboot data load
853 10:52:55.052956 fastboot data verify
854 10:52:55.057621 verify result: 266
855 10:52:55.063195 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 10:52:55.063670 LPDDR4 probe
857 10:52:55.064151 ddr clk to 1584MHz
858 10:52:55.071199 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 10:52:55.108512
860 10:52:55.109092 dmc_version 0001
861 10:52:55.115127 Check phy result
862 10:52:55.121089 INFO : End of CA training
863 10:52:55.121591 INFO : End of initialization
864 10:52:55.126718 INFO : Training has run successfully!
865 10:52:55.127202 Check phy result
866 10:52:55.132318 INFO : End of initialization
867 10:52:55.132795 INFO : End of read enable training
868 10:52:55.138107 INFO : End of fine write leveling
869 10:52:55.140731 INFO : End of Write leveling coarse delay
870 10:52:55.146516 INFO : Training has run successfully!
871 10:52:55.146994 Check phy result
872 10:52:55.147446 INFO : End of initialization
873 10:52:55.151969 INFO : End of read dq deskew training
874 10:52:55.157658 INFO : End of MPR read delay center optimization
875 10:52:55.158146 INFO : End of write delay center optimization
876 10:52:55.163415 INFO : End of read delay center optimization
877 10:52:55.169041 INFO : End of max read latency training
878 10:52:55.169520 INFO : Training has run successfully!
879 10:52:55.174553 1D training succeed
880 10:52:55.178718 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 10:52:55.228282 Check phy result
882 10:52:55.228803 INFO : End of initialization
883 10:52:55.250778 INFO : End of 2D read delay Voltage center optimization
884 10:52:55.270172 INFO : End of 2D read delay Voltage center optimization
885 10:52:55.321318 INFO : End of 2D write delay Voltage center optimization
886 10:52:55.371703 INFO : End of 2D write delay Voltage center optimization
887 10:52:55.377183 INFO : Training has run successfully!
888 10:52:55.377665
889 10:52:55.378120 channel==0
890 10:52:55.382773 RxClkDly_Margin_A0==88 ps 9
891 10:52:55.383248 TxDqDly_Margin_A0==98 ps 10
892 10:52:55.388407 RxClkDly_Margin_A1==88 ps 9
893 10:52:55.388887 TxDqDly_Margin_A1==98 ps 10
894 10:52:55.389359 TrainedVREFDQ_A0==74
895 10:52:55.394063 TrainedVREFDQ_A1==76
896 10:52:55.394585 VrefDac_Margin_A0==24
897 10:52:55.395035 DeviceVref_Margin_A0==40
898 10:52:55.399549 VrefDac_Margin_A1==24
899 10:52:55.400095 DeviceVref_Margin_A1==38
900 10:52:55.400532
901 10:52:55.400960
902 10:52:55.405172 channel==1
903 10:52:55.405632 RxClkDly_Margin_A0==88 ps 9
904 10:52:55.406065 TxDqDly_Margin_A0==88 ps 9
905 10:52:55.410805 RxClkDly_Margin_A1==88 ps 9
906 10:52:55.411267 TxDqDly_Margin_A1==88 ps 9
907 10:52:55.418320 TrainedVREFDQ_A0==74
908 10:52:55.418806 TrainedVREFDQ_A1==77
909 10:52:55.419238 VrefDac_Margin_A0==23
910 10:52:55.422022 DeviceVref_Margin_A0==40
911 10:52:55.422479 VrefDac_Margin_A1==24
912 10:52:55.427610 DeviceVref_Margin_A1==37
913 10:52:55.428113
914 10:52:55.428551 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 10:52:55.428980
916 10:52:55.461200 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000017 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 10:52:55.461698 2D training succeed
918 10:52:55.466816 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 10:52:55.472270 auto size-- 65535DDR cs0 size: 2048MB
920 10:52:55.472734 DDR cs1 size: 2048MB
921 10:52:55.478027 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 10:52:55.478490 cs0 DataBus test pass
923 10:52:55.483467 cs1 DataBus test pass
924 10:52:55.483915 cs0 AddrBus test pass
925 10:52:55.484389 cs1 AddrBus test pass
926 10:52:55.484816
927 10:52:55.489071 100bdlr_step_size ps== 420
928 10:52:55.489574 result report
929 10:52:55.494793 boot times 0Enable ddr reg access
930 10:52:55.499969 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 10:52:55.513358 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 10:52:56.087312 0.0;M3 CHK:0;cm4_sp_mode 0
933 10:52:56.088021 MVN_1=0x00000000
934 10:52:56.092584 MVN_2=0x00000000
935 10:52:56.098346 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 10:52:56.098833 OPS=0x10
937 10:52:56.099288 ring efuse init
938 10:52:56.099731 chipver efuse init
939 10:52:56.103968 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 10:52:56.109526 [0.018961 Inits done]
941 10:52:56.110005 secure task start!
942 10:52:56.110457 high task start!
943 10:52:56.114101 low task start!
944 10:52:56.114576 run into bl31
945 10:52:56.120762 NOTICE: BL31: v1.3(release):4fc40b1
946 10:52:56.128666 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 10:52:56.129164 NOTICE: BL31: G12A normal boot!
948 10:52:56.154019 NOTICE: BL31: BL33 decompress pass
949 10:52:56.159633 ERROR: Error initializing runtime service opteed_fast
950 10:52:57.392667
951 10:52:57.393337
952 10:52:57.400901 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 10:52:57.401408
954 10:52:57.401883 Model: Libre Computer AML-A311D-CC Alta
955 10:52:57.609430 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 10:52:57.632724 DRAM: 2 GiB (effective 3.8 GiB)
957 10:52:57.775764 Core: 408 devices, 31 uclasses, devicetree: separate
958 10:52:57.781620 WDT: Not starting watchdog@f0d0
959 10:52:57.813882 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 10:52:57.826332 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 10:52:57.831292 ** Bad device specification mmc 0 **
962 10:52:57.841643 Card did not respond to voltage select! : -110
963 10:52:57.849287 ** Bad device specification mmc 0 **
964 10:52:57.849767 Couldn't find partition mmc 0
965 10:52:57.857619 Card did not respond to voltage select! : -110
966 10:52:57.863245 ** Bad device specification mmc 0 **
967 10:52:57.863721 Couldn't find partition mmc 0
968 10:52:57.868287 Error: could not access storage.
969 10:52:58.210688 Net: eth0: ethernet@ff3f0000
970 10:52:58.211258 starting USB...
971 10:52:58.462592 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 10:52:58.463150 Starting the controller
973 10:52:58.469458 USB XHCI 1.10
974 10:53:00.023562 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 10:53:00.031715 scanning usb for storage devices... 0 Storage Device(s) found
977 10:53:00.083319 Hit any key to stop autoboot: 1
978 10:53:00.084162 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 10:53:00.084806 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 10:53:00.085329 Setting prompt string to ['=>']
981 10:53:00.085860 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 10:53:00.099166 0
983 10:53:00.100104 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 10:53:00.100648 Sending with 10 millisecond of delay
986 10:53:01.235420 => setenv autoload no
987 10:53:01.246359 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 10:53:01.251843 setenv autoload no
989 10:53:01.252650 Sending with 10 millisecond of delay
991 10:53:03.050097 => setenv initrd_high 0xffffffff
992 10:53:03.060849 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 10:53:03.061383 setenv initrd_high 0xffffffff
994 10:53:03.061857 Sending with 10 millisecond of delay
996 10:53:04.678870 => setenv fdt_high 0xffffffff
997 10:53:04.689623 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
998 10:53:04.690161 setenv fdt_high 0xffffffff
999 10:53:04.690653 Sending with 10 millisecond of delay
1001 10:53:04.982305 => dhcp
1002 10:53:04.993121 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 10:53:04.993997 dhcp
1004 10:53:04.994480 Speed: 1000, full duplex
1005 10:53:04.994940 BOOTP broadcast 1
1006 10:53:05.004250 DHCP client bound to address 192.168.6.27 (11 ms)
1007 10:53:05.005008 Sending with 10 millisecond of delay
1009 10:53:06.681524 => setenv serverip 192.168.6.2
1010 10:53:06.692389 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1011 10:53:06.693343 setenv serverip 192.168.6.2
1012 10:53:06.694091 Sending with 10 millisecond of delay
1014 10:53:10.417940 => tftpboot 0x01080000 917070/tftp-deploy-8q73o264/kernel/uImage
1015 10:53:10.428785 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 10:53:10.429665 tftpboot 0x01080000 917070/tftp-deploy-8q73o264/kernel/uImage
1017 10:53:10.430159 Speed: 1000, full duplex
1018 10:53:10.430618 Using ethernet@ff3f0000 device
1019 10:53:10.431397 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 10:53:10.437119 Filename '917070/tftp-deploy-8q73o264/kernel/uImage'.
1021 10:53:10.440965 Load address: 0x1080000
1022 10:53:12.765966 Loading: *################################################## 36.2 MiB
1023 10:53:12.766598 15.6 MiB/s
1024 10:53:12.767039 done
1025 10:53:12.770478 Bytes transferred = 38009408 (243fa40 hex)
1026 10:53:12.771289 Sending with 10 millisecond of delay
1028 10:53:17.457062 => tftpboot 0x08000000 917070/tftp-deploy-8q73o264/ramdisk/ramdisk.cpio.gz.uboot
1029 10:53:17.467871 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1030 10:53:17.468727 tftpboot 0x08000000 917070/tftp-deploy-8q73o264/ramdisk/ramdisk.cpio.gz.uboot
1031 10:53:17.469176 Speed: 1000, full duplex
1032 10:53:17.469597 Using ethernet@ff3f0000 device
1033 10:53:17.470693 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 10:53:17.479331 Filename '917070/tftp-deploy-8q73o264/ramdisk/ramdisk.cpio.gz.uboot'.
1035 10:53:17.479818 Load address: 0x8000000
1036 10:53:24.774089 Loading: *####T ############################################# UDP wrong checksum 00000005 0000490c
1037 10:53:29.774570 T UDP wrong checksum 00000005 0000490c
1038 10:53:39.776667 T T UDP wrong checksum 00000005 0000490c
1039 10:53:59.780703 T T T T UDP wrong checksum 00000005 0000490c
1040 10:54:14.785649 T T
1041 10:54:14.786092 Retry count exceeded; starting again
1043 10:54:14.788957 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1046 10:54:14.790742 end: 2.4 uboot-commands (duration 00:01:46) [common]
1048 10:54:14.792131 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1050 10:54:14.793142 end: 2 uboot-action (duration 00:01:47) [common]
1052 10:54:14.794640 Cleaning after the job
1053 10:54:14.795184 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/ramdisk
1054 10:54:14.796478 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/kernel
1055 10:54:14.833735 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/dtb
1056 10:54:14.834914 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/nfsrootfs
1057 10:54:14.995428 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917070/tftp-deploy-8q73o264/modules
1058 10:54:15.014921 start: 4.1 power-off (timeout 00:00:30) [common]
1059 10:54:15.015583 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1060 10:54:15.055623 >> OK - accepted request
1061 10:54:15.057380 Returned 0 in 0 seconds
1062 10:54:15.158094 end: 4.1 power-off (duration 00:00:00) [common]
1064 10:54:15.159025 start: 4.2 read-feedback (timeout 00:10:00) [common]
1065 10:54:15.159684 Listened to connection for namespace 'common' for up to 1s
1066 10:54:16.160653 Finalising connection for namespace 'common'
1067 10:54:16.161127 Disconnecting from shell: Finalise
1068 10:54:16.161431 =>
1069 10:54:16.262132 end: 4.2 read-feedback (duration 00:00:01) [common]
1070 10:54:16.262697 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/917070
1071 10:54:19.101921 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/917070
1072 10:54:19.102545 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.