Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 11:21:11.829853 lava-dispatcher, installed at version: 2024.01
2 11:21:11.830634 start: 0 validate
3 11:21:11.831100 Start time: 2024-10-31 11:21:11.831071+00:00 (UTC)
4 11:21:11.831624 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 11:21:11.832189 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:21:11.877766 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 11:21:11.878307 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fkernel%2FImage exists
8 11:21:11.907142 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 11:21:11.908071 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 11:21:11.938508 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 11:21:11.938966 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:21:11.970039 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 11:21:11.970494 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fmodules.tar.xz exists
14 11:21:12.011698 validate duration: 0.18
16 11:21:12.013228 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:21:12.013858 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:21:12.014442 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:21:12.015641 Not decompressing ramdisk as can be used compressed.
20 11:21:12.016501 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 11:21:12.017032 saving as /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/ramdisk/initrd.cpio.gz
22 11:21:12.017575 total size: 5628169 (5 MB)
23 11:21:12.055889 progress 0 % (0 MB)
24 11:21:12.063322 progress 5 % (0 MB)
25 11:21:12.071010 progress 10 % (0 MB)
26 11:21:12.077833 progress 15 % (0 MB)
27 11:21:12.085667 progress 20 % (1 MB)
28 11:21:12.090500 progress 25 % (1 MB)
29 11:21:12.094457 progress 30 % (1 MB)
30 11:21:12.098497 progress 35 % (1 MB)
31 11:21:12.102061 progress 40 % (2 MB)
32 11:21:12.106000 progress 45 % (2 MB)
33 11:21:12.109557 progress 50 % (2 MB)
34 11:21:12.113497 progress 55 % (2 MB)
35 11:21:12.117436 progress 60 % (3 MB)
36 11:21:12.120953 progress 65 % (3 MB)
37 11:21:12.124861 progress 70 % (3 MB)
38 11:21:12.128559 progress 75 % (4 MB)
39 11:21:12.132492 progress 80 % (4 MB)
40 11:21:12.135977 progress 85 % (4 MB)
41 11:21:12.139640 progress 90 % (4 MB)
42 11:21:12.143175 progress 95 % (5 MB)
43 11:21:12.146410 progress 100 % (5 MB)
44 11:21:12.147074 5 MB downloaded in 0.13 s (41.45 MB/s)
45 11:21:12.147631 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:21:12.148601 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:21:12.148923 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:21:12.149222 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:21:12.149700 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/kernel/Image
51 11:21:12.149959 saving as /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/kernel/Image
52 11:21:12.150179 total size: 38009344 (36 MB)
53 11:21:12.150396 No compression specified
54 11:21:12.184796 progress 0 % (0 MB)
55 11:21:12.208009 progress 5 % (1 MB)
56 11:21:12.231663 progress 10 % (3 MB)
57 11:21:12.254788 progress 15 % (5 MB)
58 11:21:12.277930 progress 20 % (7 MB)
59 11:21:12.301157 progress 25 % (9 MB)
60 11:21:12.324643 progress 30 % (10 MB)
61 11:21:12.347731 progress 35 % (12 MB)
62 11:21:12.370802 progress 40 % (14 MB)
63 11:21:12.393945 progress 45 % (16 MB)
64 11:21:12.417442 progress 50 % (18 MB)
65 11:21:12.440540 progress 55 % (19 MB)
66 11:21:12.463537 progress 60 % (21 MB)
67 11:21:12.486599 progress 65 % (23 MB)
68 11:21:12.509707 progress 70 % (25 MB)
69 11:21:12.533083 progress 75 % (27 MB)
70 11:21:12.556323 progress 80 % (29 MB)
71 11:21:12.579422 progress 85 % (30 MB)
72 11:21:12.602418 progress 90 % (32 MB)
73 11:21:12.625811 progress 95 % (34 MB)
74 11:21:12.648146 progress 100 % (36 MB)
75 11:21:12.648892 36 MB downloaded in 0.50 s (72.69 MB/s)
76 11:21:12.649378 end: 1.2.1 http-download (duration 00:00:01) [common]
78 11:21:12.650211 end: 1.2 download-retry (duration 00:00:01) [common]
79 11:21:12.650485 start: 1.3 download-retry (timeout 00:09:59) [common]
80 11:21:12.650749 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 11:21:12.651204 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 11:21:12.651475 saving as /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 11:21:12.651684 total size: 53209 (0 MB)
84 11:21:12.651890 No compression specified
85 11:21:12.692471 progress 61 % (0 MB)
86 11:21:12.693333 progress 100 % (0 MB)
87 11:21:12.693863 0 MB downloaded in 0.04 s (1.20 MB/s)
88 11:21:12.694316 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:21:12.695139 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:21:12.695404 start: 1.4 download-retry (timeout 00:09:59) [common]
92 11:21:12.695667 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 11:21:12.696123 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 11:21:12.696374 saving as /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/nfsrootfs/full.rootfs.tar
95 11:21:12.696580 total size: 120894716 (115 MB)
96 11:21:12.696791 Using unxz to decompress xz
97 11:21:12.733531 progress 0 % (0 MB)
98 11:21:13.528277 progress 5 % (5 MB)
99 11:21:14.356840 progress 10 % (11 MB)
100 11:21:15.144400 progress 15 % (17 MB)
101 11:21:15.879599 progress 20 % (23 MB)
102 11:21:16.473451 progress 25 % (28 MB)
103 11:21:17.310695 progress 30 % (34 MB)
104 11:21:18.102178 progress 35 % (40 MB)
105 11:21:18.451374 progress 40 % (46 MB)
106 11:21:18.822813 progress 45 % (51 MB)
107 11:21:19.536757 progress 50 % (57 MB)
108 11:21:20.427263 progress 55 % (63 MB)
109 11:21:21.208196 progress 60 % (69 MB)
110 11:21:21.966902 progress 65 % (74 MB)
111 11:21:22.745644 progress 70 % (80 MB)
112 11:21:23.570223 progress 75 % (86 MB)
113 11:21:24.359072 progress 80 % (92 MB)
114 11:21:25.117131 progress 85 % (98 MB)
115 11:21:25.970233 progress 90 % (103 MB)
116 11:21:26.740816 progress 95 % (109 MB)
117 11:21:27.567431 progress 100 % (115 MB)
118 11:21:27.579819 115 MB downloaded in 14.88 s (7.75 MB/s)
119 11:21:27.580640 end: 1.4.1 http-download (duration 00:00:15) [common]
121 11:21:27.582234 end: 1.4 download-retry (duration 00:00:15) [common]
122 11:21:27.582749 start: 1.5 download-retry (timeout 00:09:44) [common]
123 11:21:27.583258 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 11:21:27.584506 downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/modules.tar.xz
125 11:21:27.584993 saving as /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/modules/modules.tar
126 11:21:27.585397 total size: 11742820 (11 MB)
127 11:21:27.585813 Using unxz to decompress xz
128 11:21:27.628750 progress 0 % (0 MB)
129 11:21:27.695572 progress 5 % (0 MB)
130 11:21:27.770472 progress 10 % (1 MB)
131 11:21:27.850632 progress 15 % (1 MB)
132 11:21:27.930740 progress 20 % (2 MB)
133 11:21:28.006954 progress 25 % (2 MB)
134 11:21:28.087232 progress 30 % (3 MB)
135 11:21:28.163290 progress 35 % (3 MB)
136 11:21:28.243695 progress 40 % (4 MB)
137 11:21:28.328681 progress 45 % (5 MB)
138 11:21:28.409810 progress 50 % (5 MB)
139 11:21:28.492968 progress 55 % (6 MB)
140 11:21:28.575681 progress 60 % (6 MB)
141 11:21:28.654663 progress 65 % (7 MB)
142 11:21:28.734923 progress 70 % (7 MB)
143 11:21:28.818910 progress 75 % (8 MB)
144 11:21:28.900937 progress 80 % (8 MB)
145 11:21:28.981454 progress 85 % (9 MB)
146 11:21:29.056877 progress 90 % (10 MB)
147 11:21:29.156477 progress 95 % (10 MB)
148 11:21:29.251331 progress 100 % (11 MB)
149 11:21:29.263015 11 MB downloaded in 1.68 s (6.68 MB/s)
150 11:21:29.263609 end: 1.5.1 http-download (duration 00:00:02) [common]
152 11:21:29.265177 end: 1.5 download-retry (duration 00:00:02) [common]
153 11:21:29.265738 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 11:21:29.266262 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 11:21:45.450058 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/917110/extract-nfsrootfs-4z3rop0n
156 11:21:45.450672 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 11:21:45.450967 start: 1.6.2 lava-overlay (timeout 00:09:27) [common]
158 11:21:45.451681 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn
159 11:21:45.452187 makedir: /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin
160 11:21:45.452539 makedir: /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/tests
161 11:21:45.452857 makedir: /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/results
162 11:21:45.453187 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-add-keys
163 11:21:45.453715 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-add-sources
164 11:21:45.454230 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-background-process-start
165 11:21:45.454736 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-background-process-stop
166 11:21:45.455261 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-common-functions
167 11:21:45.455761 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-echo-ipv4
168 11:21:45.456283 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-install-packages
169 11:21:45.456772 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-installed-packages
170 11:21:45.457246 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-os-build
171 11:21:45.457727 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-probe-channel
172 11:21:45.458205 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-probe-ip
173 11:21:45.458714 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-target-ip
174 11:21:45.459254 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-target-mac
175 11:21:45.459737 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-target-storage
176 11:21:45.460273 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-test-case
177 11:21:45.460766 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-test-event
178 11:21:45.461235 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-test-feedback
179 11:21:45.461711 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-test-raise
180 11:21:45.462183 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-test-reference
181 11:21:45.462751 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-test-runner
182 11:21:45.463274 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-test-set
183 11:21:45.463757 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-test-shell
184 11:21:45.464284 Updating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-add-keys (debian)
185 11:21:45.464825 Updating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-add-sources (debian)
186 11:21:45.465328 Updating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-install-packages (debian)
187 11:21:45.465829 Updating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-installed-packages (debian)
188 11:21:45.466320 Updating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/bin/lava-os-build (debian)
189 11:21:45.466751 Creating /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/environment
190 11:21:45.467119 LAVA metadata
191 11:21:45.467385 - LAVA_JOB_ID=917110
192 11:21:45.467602 - LAVA_DISPATCHER_IP=192.168.6.2
193 11:21:45.467958 start: 1.6.2.1 ssh-authorize (timeout 00:09:27) [common]
194 11:21:45.468945 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 11:21:45.469265 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:27) [common]
196 11:21:45.469473 skipped lava-vland-overlay
197 11:21:45.469713 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 11:21:45.469966 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:27) [common]
199 11:21:45.470183 skipped lava-multinode-overlay
200 11:21:45.470424 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 11:21:45.470674 start: 1.6.2.4 test-definition (timeout 00:09:27) [common]
202 11:21:45.470920 Loading test definitions
203 11:21:45.471195 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:27) [common]
204 11:21:45.471412 Using /lava-917110 at stage 0
205 11:21:45.472496 uuid=917110_1.6.2.4.1 testdef=None
206 11:21:45.472810 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 11:21:45.473072 start: 1.6.2.4.2 test-overlay (timeout 00:09:27) [common]
208 11:21:45.474602 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 11:21:45.475398 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:27) [common]
211 11:21:45.477363 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 11:21:45.478192 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:27) [common]
214 11:21:45.480022 runner path: /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/0/tests/0_timesync-off test_uuid 917110_1.6.2.4.1
215 11:21:45.480578 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 11:21:45.481394 start: 1.6.2.4.5 git-repo-action (timeout 00:09:27) [common]
218 11:21:45.481617 Using /lava-917110 at stage 0
219 11:21:45.481961 Fetching tests from https://github.com/kernelci/test-definitions.git
220 11:21:45.482250 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/0/tests/1_kselftest-kvm'
221 11:21:49.112998 Running '/usr/bin/git checkout kernelci.org
222 11:21:49.239902 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/0/tests/1_kselftest-kvm/automated/linux/kselftest/kselftest.yaml
223 11:21:49.241694 uuid=917110_1.6.2.4.5 testdef=None
224 11:21:49.242125 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 11:21:49.243059 start: 1.6.2.4.6 test-overlay (timeout 00:09:23) [common]
227 11:21:49.246480 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 11:21:49.247481 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:23) [common]
230 11:21:49.251954 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 11:21:49.253023 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:23) [common]
233 11:21:49.257373 runner path: /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/0/tests/1_kselftest-kvm test_uuid 917110_1.6.2.4.5
234 11:21:49.257717 BOARD='meson-sm1-s905d3-libretech-cc'
235 11:21:49.257977 BRANCH='next'
236 11:21:49.258225 SKIPFILE='/dev/null'
237 11:21:49.258472 SKIP_INSTALL='True'
238 11:21:49.258714 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/kselftest.tar.xz'
239 11:21:49.258959 TST_CASENAME=''
240 11:21:49.259195 TST_CMDFILES='kvm'
241 11:21:49.259852 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 11:21:49.260842 Creating lava-test-runner.conf files
244 11:21:49.261099 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/917110/lava-overlay-playx2nn/lava-917110/0 for stage 0
245 11:21:49.261527 - 0_timesync-off
246 11:21:49.261832 - 1_kselftest-kvm
247 11:21:49.262238 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 11:21:49.262593 start: 1.6.2.5 compress-overlay (timeout 00:09:23) [common]
249 11:22:15.549406 end: 1.6.2.5 compress-overlay (duration 00:00:26) [common]
250 11:22:15.549868 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:56) [common]
251 11:22:15.550173 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 11:22:15.550492 end: 1.6.2 lava-overlay (duration 00:00:30) [common]
253 11:22:15.550790 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:56) [common]
254 11:22:16.161891 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 11:22:16.162374 start: 1.6.4 extract-modules (timeout 00:08:56) [common]
256 11:22:16.162629 extracting modules file /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917110/extract-nfsrootfs-4z3rop0n
257 11:22:17.506961 extracting modules file /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917110/extract-overlay-ramdisk-4tpf954r/ramdisk
258 11:22:18.883743 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 11:22:18.884249 start: 1.6.5 apply-overlay-tftp (timeout 00:08:53) [common]
260 11:22:18.884530 [common] Applying overlay to NFS
261 11:22:18.884749 [common] Applying overlay /var/lib/lava/dispatcher/tmp/917110/compress-overlay-tddsbsam/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/917110/extract-nfsrootfs-4z3rop0n
262 11:22:21.583683 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 11:22:21.584186 start: 1.6.6 prepare-kernel (timeout 00:08:50) [common]
264 11:22:21.584468 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:50) [common]
265 11:22:21.584702 Converting downloaded kernel to a uImage
266 11:22:21.585020 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/kernel/Image /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/kernel/uImage
267 11:22:22.054522 output: Image Name:
268 11:22:22.054946 output: Created: Thu Oct 31 11:22:21 2024
269 11:22:22.055158 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 11:22:22.055364 output: Data Size: 38009344 Bytes = 37118.50 KiB = 36.25 MiB
271 11:22:22.055566 output: Load Address: 01080000
272 11:22:22.055768 output: Entry Point: 01080000
273 11:22:22.055966 output:
274 11:22:22.056346 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 11:22:22.056622 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 11:22:22.056896 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
277 11:22:22.057154 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 11:22:22.057412 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
279 11:22:22.057669 Building ramdisk /var/lib/lava/dispatcher/tmp/917110/extract-overlay-ramdisk-4tpf954r/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/917110/extract-overlay-ramdisk-4tpf954r/ramdisk
280 11:22:24.259186 >> 173832 blocks
281 11:22:31.878646 Adding RAMdisk u-boot header.
282 11:22:31.879316 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/917110/extract-overlay-ramdisk-4tpf954r/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/917110/extract-overlay-ramdisk-4tpf954r/ramdisk.cpio.gz.uboot
283 11:22:32.132631 output: Image Name:
284 11:22:32.133060 output: Created: Thu Oct 31 11:22:31 2024
285 11:22:32.133272 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 11:22:32.133477 output: Data Size: 24155709 Bytes = 23589.56 KiB = 23.04 MiB
287 11:22:32.133700 output: Load Address: 00000000
288 11:22:32.133901 output: Entry Point: 00000000
289 11:22:32.134101 output:
290 11:22:32.134672 rename /var/lib/lava/dispatcher/tmp/917110/extract-overlay-ramdisk-4tpf954r/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/ramdisk/ramdisk.cpio.gz.uboot
291 11:22:32.135099 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 11:22:32.135390 end: 1.6 prepare-tftp-overlay (duration 00:01:03) [common]
293 11:22:32.135667 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 11:22:32.135909 No LXC device requested
295 11:22:32.136494 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 11:22:32.137019 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 11:22:32.137518 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 11:22:32.137928 Checking files for TFTP limit of 4294967296 bytes.
299 11:22:32.140614 end: 1 tftp-deploy (duration 00:01:20) [common]
300 11:22:32.141196 start: 2 uboot-action (timeout 00:05:00) [common]
301 11:22:32.141717 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 11:22:32.142208 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 11:22:32.142701 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 11:22:32.143224 Using kernel file from prepare-kernel: 917110/tftp-deploy-d6_w43k3/kernel/uImage
305 11:22:32.143849 substitutions:
306 11:22:32.144306 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 11:22:32.144711 - {DTB_ADDR}: 0x01070000
308 11:22:32.145108 - {DTB}: 917110/tftp-deploy-d6_w43k3/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 11:22:32.145509 - {INITRD}: 917110/tftp-deploy-d6_w43k3/ramdisk/ramdisk.cpio.gz.uboot
310 11:22:32.145905 - {KERNEL_ADDR}: 0x01080000
311 11:22:32.146291 - {KERNEL}: 917110/tftp-deploy-d6_w43k3/kernel/uImage
312 11:22:32.146678 - {LAVA_MAC}: None
313 11:22:32.147109 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/917110/extract-nfsrootfs-4z3rop0n
314 11:22:32.147505 - {NFS_SERVER_IP}: 192.168.6.2
315 11:22:32.147894 - {PRESEED_CONFIG}: None
316 11:22:32.148312 - {PRESEED_LOCAL}: None
317 11:22:32.148702 - {RAMDISK_ADDR}: 0x08000000
318 11:22:32.149086 - {RAMDISK}: 917110/tftp-deploy-d6_w43k3/ramdisk/ramdisk.cpio.gz.uboot
319 11:22:32.149473 - {ROOT_PART}: None
320 11:22:32.149858 - {ROOT}: None
321 11:22:32.150240 - {SERVER_IP}: 192.168.6.2
322 11:22:32.150623 - {TEE_ADDR}: 0x83000000
323 11:22:32.151005 - {TEE}: None
324 11:22:32.151388 Parsed boot commands:
325 11:22:32.151761 - setenv autoload no
326 11:22:32.152171 - setenv initrd_high 0xffffffff
327 11:22:32.152552 - setenv fdt_high 0xffffffff
328 11:22:32.152933 - dhcp
329 11:22:32.153310 - setenv serverip 192.168.6.2
330 11:22:32.153694 - tftpboot 0x01080000 917110/tftp-deploy-d6_w43k3/kernel/uImage
331 11:22:32.154083 - tftpboot 0x08000000 917110/tftp-deploy-d6_w43k3/ramdisk/ramdisk.cpio.gz.uboot
332 11:22:32.154467 - tftpboot 0x01070000 917110/tftp-deploy-d6_w43k3/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 11:22:32.154850 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/917110/extract-nfsrootfs-4z3rop0n,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 11:22:32.155245 - bootm 0x01080000 0x08000000 0x01070000
335 11:22:32.155732 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 11:22:32.157257 start: 2.3 connect-device (timeout 00:05:00) [common]
338 11:22:32.157674 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 11:22:32.172438 Setting prompt string to ['lava-test: # ']
340 11:22:32.173913 end: 2.3 connect-device (duration 00:00:00) [common]
341 11:22:32.174517 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 11:22:32.175094 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 11:22:32.175977 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 11:22:32.177203 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 11:22:32.214490 >> OK - accepted request
346 11:22:32.216610 Returned 0 in 0 seconds
347 11:22:32.317703 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 11:22:32.319341 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 11:22:32.319910 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 11:22:32.320481 Setting prompt string to ['Hit any key to stop autoboot']
352 11:22:32.320940 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 11:22:32.322490 Trying 192.168.56.21...
354 11:22:32.322966 Connected to conserv1.
355 11:22:32.323379 Escape character is '^]'.
356 11:22:32.323802
357 11:22:32.324261 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 11:22:32.324696
359 11:22:39.864441 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 11:22:39.865052 bl2_stage_init 0x01
361 11:22:39.865493 bl2_stage_init 0x81
362 11:22:39.869951 hw id: 0x0000 - pwm id 0x01
363 11:22:39.870404 bl2_stage_init 0xc1
364 11:22:39.875573 bl2_stage_init 0x02
365 11:22:39.876066
366 11:22:39.876503 L0:00000000
367 11:22:39.876924 L1:00000703
368 11:22:39.877343 L2:00008067
369 11:22:39.877750 L3:15000000
370 11:22:39.881153 S1:00000000
371 11:22:39.881614 B2:20282000
372 11:22:39.882027 B1:a0f83180
373 11:22:39.882425
374 11:22:39.882822 TE: 68216
375 11:22:39.883220
376 11:22:39.886759 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 11:22:39.887197
378 11:22:39.892369 Board ID = 1
379 11:22:39.892798 Set cpu clk to 24M
380 11:22:39.893195 Set clk81 to 24M
381 11:22:39.898030 Use GP1_pll as DSU clk.
382 11:22:39.898457 DSU clk: 1200 Mhz
383 11:22:39.898858 CPU clk: 1200 MHz
384 11:22:39.903469 Set clk81 to 166.6M
385 11:22:39.909143 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 11:22:39.909578 board id: 1
387 11:22:39.916521 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 11:22:39.927192 fw parse done
389 11:22:39.933210 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 11:22:39.975508 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 11:22:39.986382 PIEI prepare done
392 11:22:39.986807 fastboot data load
393 11:22:39.987214 fastboot data verify
394 11:22:39.992071 verify result: 266
395 11:22:39.997651 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 11:22:39.998080 LPDDR4 probe
397 11:22:39.998482 ddr clk to 1584MHz
398 11:22:40.005641 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 11:22:40.042881
400 11:22:40.043306 dmc_version 0001
401 11:22:40.049572 Check phy result
402 11:22:40.055510 INFO : End of CA training
403 11:22:40.055935 INFO : End of initialization
404 11:22:40.061091 INFO : Training has run successfully!
405 11:22:40.061511 Check phy result
406 11:22:40.066670 INFO : End of initialization
407 11:22:40.067088 INFO : End of read enable training
408 11:22:40.070013 INFO : End of fine write leveling
409 11:22:40.075555 INFO : End of Write leveling coarse delay
410 11:22:40.081159 INFO : Training has run successfully!
411 11:22:40.081585 Check phy result
412 11:22:40.081997 INFO : End of initialization
413 11:22:40.086758 INFO : End of read dq deskew training
414 11:22:40.090195 INFO : End of MPR read delay center optimization
415 11:22:40.095740 INFO : End of write delay center optimization
416 11:22:40.101379 INFO : End of read delay center optimization
417 11:22:40.101804 INFO : End of max read latency training
418 11:22:40.106970 INFO : Training has run successfully!
419 11:22:40.107394 1D training succeed
420 11:22:40.115113 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 11:22:40.162671 Check phy result
422 11:22:40.163104 INFO : End of initialization
423 11:22:40.185007 INFO : End of 2D read delay Voltage center optimization
424 11:22:40.204212 INFO : End of 2D read delay Voltage center optimization
425 11:22:40.256074 INFO : End of 2D write delay Voltage center optimization
426 11:22:40.305387 INFO : End of 2D write delay Voltage center optimization
427 11:22:40.310975 INFO : Training has run successfully!
428 11:22:40.311407
429 11:22:40.311816 channel==0
430 11:22:40.316492 RxClkDly_Margin_A0==88 ps 9
431 11:22:40.316919 TxDqDly_Margin_A0==98 ps 10
432 11:22:40.322079 RxClkDly_Margin_A1==88 ps 9
433 11:22:40.322497 TxDqDly_Margin_A1==98 ps 10
434 11:22:40.322897 TrainedVREFDQ_A0==74
435 11:22:40.327748 TrainedVREFDQ_A1==75
436 11:22:40.328204 VrefDac_Margin_A0==24
437 11:22:40.328609 DeviceVref_Margin_A0==40
438 11:22:40.333380 VrefDac_Margin_A1==23
439 11:22:40.333800 DeviceVref_Margin_A1==39
440 11:22:40.334198
441 11:22:40.334594
442 11:22:40.338864 channel==1
443 11:22:40.339292 RxClkDly_Margin_A0==78 ps 8
444 11:22:40.339692 TxDqDly_Margin_A0==98 ps 10
445 11:22:40.344441 RxClkDly_Margin_A1==88 ps 9
446 11:22:40.344869 TxDqDly_Margin_A1==78 ps 8
447 11:22:40.350228 TrainedVREFDQ_A0==78
448 11:22:40.350654 TrainedVREFDQ_A1==75
449 11:22:40.351055 VrefDac_Margin_A0==22
450 11:22:40.355784 DeviceVref_Margin_A0==36
451 11:22:40.356242 VrefDac_Margin_A1==22
452 11:22:40.361354 DeviceVref_Margin_A1==39
453 11:22:40.361776
454 11:22:40.362181 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 11:22:40.362580
456 11:22:40.394832 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000014 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001b 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
457 11:22:40.395323 2D training succeed
458 11:22:40.400532 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 11:22:40.405973 auto size-- 65535DDR cs0 size: 2048MB
460 11:22:40.406404 DDR cs1 size: 2048MB
461 11:22:40.411556 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 11:22:40.412005 cs0 DataBus test pass
463 11:22:40.417221 cs1 DataBus test pass
464 11:22:40.417640 cs0 AddrBus test pass
465 11:22:40.418041 cs1 AddrBus test pass
466 11:22:40.418438
467 11:22:40.422782 100bdlr_step_size ps== 478
468 11:22:40.423216 result report
469 11:22:40.428397 boot times 0Enable ddr reg access
470 11:22:40.433632 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 11:22:40.447494 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 11:22:41.102446 bl2z: ptr: 05129330, size: 00001e40
473 11:22:41.108877 0.0;M3 CHK:0;cm4_sp_mode 0
474 11:22:41.109324 MVN_1=0x00000000
475 11:22:41.109727 MVN_2=0x00000000
476 11:22:41.120375 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 11:22:41.120803 OPS=0x04
478 11:22:41.121207 ring efuse init
479 11:22:41.125988 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 11:22:41.126426 [0.017310 Inits done]
481 11:22:41.126827 secure task start!
482 11:22:41.133603 high task start!
483 11:22:41.134066 low task start!
484 11:22:41.134472 run into bl31
485 11:22:41.142248 NOTICE: BL31: v1.3(release):4fc40b1
486 11:22:41.150037 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 11:22:41.150476 NOTICE: BL31: G12A normal boot!
488 11:22:41.165597 NOTICE: BL31: BL33 decompress pass
489 11:22:41.171328 ERROR: Error initializing runtime service opteed_fast
490 11:22:42.417432 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 11:22:42.417918 bl2_stage_init 0x01
492 11:22:42.418342 bl2_stage_init 0x81
493 11:22:42.422986 hw id: 0x0000 - pwm id 0x01
494 11:22:42.423457 bl2_stage_init 0xc1
495 11:22:42.428628 bl2_stage_init 0x02
496 11:22:42.429093
497 11:22:42.429485 L0:00000000
498 11:22:42.429869 L1:00000703
499 11:22:42.430251 L2:00008067
500 11:22:42.430630 L3:15000000
501 11:22:42.434191 S1:00000000
502 11:22:42.434607 B2:20282000
503 11:22:42.434991 B1:a0f83180
504 11:22:42.435367
505 11:22:42.435744 TE: 71123
506 11:22:42.436176
507 11:22:42.439790 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 11:22:42.440235
509 11:22:42.445431 Board ID = 1
510 11:22:42.445852 Set cpu clk to 24M
511 11:22:42.446240 Set clk81 to 24M
512 11:22:42.450978 Use GP1_pll as DSU clk.
513 11:22:42.451388 DSU clk: 1200 Mhz
514 11:22:42.451775 CPU clk: 1200 MHz
515 11:22:42.456583 Set clk81 to 166.6M
516 11:22:42.462193 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 11:22:42.462601 board id: 1
518 11:22:42.469362 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 11:22:42.480274 fw parse done
520 11:22:42.486190 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 11:22:42.529359 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 11:22:42.540553 PIEI prepare done
523 11:22:42.540963 fastboot data load
524 11:22:42.541353 fastboot data verify
525 11:22:42.546113 verify result: 266
526 11:22:42.551717 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 11:22:42.552169 LPDDR4 probe
528 11:22:42.552556 ddr clk to 1584MHz
529 11:22:43.915529 Load ddrfw from SPI, src: 0x00 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 11:22:43.916161 bl2_stage_init 0x01
531 11:22:43.916586 bl2_stage_init 0x81
532 11:22:43.921092 hw id: 0x0000 - pwm id 0x01
533 11:22:43.921530 bl2_stage_init 0xc1
534 11:22:43.925652 bl2_stage_init 0x02
535 11:22:43.926083
536 11:22:43.926489 L0:00000000
537 11:22:43.926887 L1:00000703
538 11:22:43.927283 L2:00008067
539 11:22:43.931253 L3:15000000
540 11:22:43.931680 S1:00000000
541 11:22:43.932115 B2:20282000
542 11:22:43.932518 B1:a0f83180
543 11:22:43.932915
544 11:22:43.933312 TE: 68430
545 11:22:43.933705
546 11:22:43.942442 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 11:22:43.942873
548 11:22:43.943277 Board ID = 1
549 11:22:43.943674 Set cpu clk to 24M
550 11:22:43.944103 Set clk81 to 24M
551 11:22:43.945764 Use GP1_pll as DSU clk.
552 11:22:43.951362 DSU clk: 1200 Mhz
553 11:22:43.951786 CPU clk: 1200 MHz
554 11:22:43.952220 Set clk81 to 166.6M
555 11:22:43.956965 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 11:22:43.962561 board id: 1
557 11:22:43.966481 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 11:22:43.978137 fw parse done
559 11:22:43.984141 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 11:22:44.026856 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 11:22:44.037763 PIEI prepare done
562 11:22:44.038186 fastboot data load
563 11:22:44.038593 fastboot data verify
564 11:22:44.043323 verify result: 266
565 11:22:44.048912 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 11:22:44.049348 LPDDR4 probe
567 11:22:44.049753 ddr clk to 1584MHz
568 11:22:44.056937 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 11:22:44.094119
570 11:22:44.094545 dmc_version 0001
571 11:22:44.100939 Check phy result
572 11:22:44.106856 INFO : End of CA training
573 11:22:44.107275 INFO : End of initialization
574 11:22:44.112344 INFO : Training has run successfully!
575 11:22:44.112766 Check phy result
576 11:22:44.117920 INFO : End of initialization
577 11:22:44.118345 INFO : End of read enable training
578 11:22:44.123538 INFO : End of fine write leveling
579 11:22:44.129153 INFO : End of Write leveling coarse delay
580 11:22:44.129584 INFO : Training has run successfully!
581 11:22:44.129986 Check phy result
582 11:22:44.134723 INFO : End of initialization
583 11:22:44.135149 INFO : End of read dq deskew training
584 11:22:44.140341 INFO : End of MPR read delay center optimization
585 11:22:44.145938 INFO : End of write delay center optimization
586 11:22:44.151550 INFO : End of read delay center optimization
587 11:22:44.152031 INFO : End of max read latency training
588 11:22:44.157146 INFO : Training has run successfully!
589 11:22:44.157598 1D training succeed
590 11:22:44.166338 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 11:22:44.213949 Check phy result
592 11:22:44.214370 INFO : End of initialization
593 11:22:44.236261 INFO : End of 2D read delay Voltage center optimization
594 11:22:44.255441 INFO : End of 2D read delay Voltage center optimization
595 11:22:44.307289 INFO : End of 2D write delay Voltage center optimization
596 11:22:44.356487 INFO : End of 2D write delay Voltage center optimization
597 11:22:44.362106 INFO : Training has run successfully!
598 11:22:44.362533
599 11:22:44.362939 channel==0
600 11:22:44.367681 RxClkDly_Margin_A0==78 ps 8
601 11:22:44.368135 TxDqDly_Margin_A0==88 ps 9
602 11:22:44.373276 RxClkDly_Margin_A1==88 ps 9
603 11:22:44.373704 TxDqDly_Margin_A1==98 ps 10
604 11:22:44.374109 TrainedVREFDQ_A0==74
605 11:22:44.378897 TrainedVREFDQ_A1==75
606 11:22:44.379322 VrefDac_Margin_A0==23
607 11:22:44.379726 DeviceVref_Margin_A0==40
608 11:22:44.384475 VrefDac_Margin_A1==23
609 11:22:44.384899 DeviceVref_Margin_A1==39
610 11:22:44.385302
611 11:22:44.385699
612 11:22:44.386096 channel==1
613 11:22:44.390072 RxClkDly_Margin_A0==78 ps 8
614 11:22:44.390505 TxDqDly_Margin_A0==98 ps 10
615 11:22:44.395657 RxClkDly_Margin_A1==78 ps 8
616 11:22:44.396110 TxDqDly_Margin_A1==88 ps 9
617 11:22:44.401283 TrainedVREFDQ_A0==78
618 11:22:44.401730 TrainedVREFDQ_A1==75
619 11:22:44.402135 VrefDac_Margin_A0==22
620 11:22:44.406908 DeviceVref_Margin_A0==36
621 11:22:44.407339 VrefDac_Margin_A1==20
622 11:22:44.412473 DeviceVref_Margin_A1==39
623 11:22:44.412906
624 11:22:44.413308 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 11:22:44.413707
626 11:22:44.446085 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000062
627 11:22:44.446543 2D training succeed
628 11:22:44.451657 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 11:22:44.457270 auto size-- 65535DDR cs0 size: 2048MB
630 11:22:44.457700 DDR cs1 size: 2048MB
631 11:22:44.462904 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 11:22:44.463335 cs0 DataBus test pass
633 11:22:44.468481 cs1 DataBus test pass
634 11:22:44.468912 cs0 AddrBus test pass
635 11:22:44.469312 cs1 AddrBus test pass
636 11:22:44.469707
637 11:22:44.474085 100bdlr_step_size ps== 478
638 11:22:44.474521 result report
639 11:22:44.479676 boot times 0Enable ddr reg access
640 11:22:44.484855 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 11:22:44.498693 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 11:22:45.153671 bl2z: ptr: 05129330, size: 00001e40
643 11:22:45.162057 0.0;M3 CHK:0;cm4_sp_mode 0
644 11:22:45.162524 MVN_1=0x00000000
645 11:22:45.162933 MVN_2=0x00000000
646 11:22:45.173550 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 11:22:45.174006 OPS=0x04
648 11:22:45.174417 ring efuse init
649 11:22:45.179180 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 11:22:45.179627 [0.017319 Inits done]
651 11:22:45.180078 secure task start!
652 11:22:45.186815 high task start!
653 11:22:45.187254 low task start!
654 11:22:45.187656 run into bl31
655 11:22:45.195432 NOTICE: BL31: v1.3(release):4fc40b1
656 11:22:45.203233 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 11:22:45.203672 NOTICE: BL31: G12A normal boot!
658 11:22:45.218734 NOTICE: BL31: BL33 decompress pass
659 11:22:45.224426 ERROR: Error initializing runtime service opteed_fast
660 11:22:46.464043 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 11:22:46.464615 bl2_stage_init 0x01
662 11:22:46.465044 bl2_stage_init 0x81
663 11:22:46.469547 hw id: 0x0000 - pwm id 0x01
664 11:22:46.469982 bl2_stage_init 0xc1
665 11:22:46.475238 bl2_stage_init 0x02
666 11:22:46.475673
667 11:22:46.476112 L0:00000000
668 11:22:46.476514 L1:00000703
669 11:22:46.476906 L2:00008067
670 11:22:46.477297 L3:15000000
671 11:22:46.480752 S1:00000000
672 11:22:46.481183 B2:20282000
673 11:22:46.481583 B1:a0f83180
674 11:22:46.481972
675 11:22:46.482367 TE: 66743
676 11:22:46.482763
677 11:22:46.486268 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 11:22:46.486698
679 11:22:46.491869 Board ID = 1
680 11:22:46.492330 Set cpu clk to 24M
681 11:22:46.492732 Set clk81 to 24M
682 11:22:46.497459 Use GP1_pll as DSU clk.
683 11:22:46.497893 DSU clk: 1200 Mhz
684 11:22:46.498298 CPU clk: 1200 MHz
685 11:22:46.503203 Set clk81 to 166.6M
686 11:22:46.508743 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 11:22:46.509174 board id: 1
688 11:22:46.516023 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 11:22:46.526763 fw parse done
690 11:22:46.532862 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 11:22:46.575797 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 11:22:46.586886 PIEI prepare done
693 11:22:46.587310 fastboot data load
694 11:22:46.587714 fastboot data verify
695 11:22:46.592607 verify result: 266
696 11:22:46.598202 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 11:22:46.598629 LPDDR4 probe
698 11:22:46.599030 ddr clk to 1584MHz
699 11:22:46.606158 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 11:22:46.643846
701 11:22:46.644304 dmc_version 0001
702 11:22:46.650894 Check phy result
703 11:22:46.656879 INFO : End of CA training
704 11:22:46.657319 INFO : End of initialization
705 11:22:46.662494 INFO : Training has run successfully!
706 11:22:46.662926 Check phy result
707 11:22:46.668069 INFO : End of initialization
708 11:22:46.668499 INFO : End of read enable training
709 11:22:46.673703 INFO : End of fine write leveling
710 11:22:46.679274 INFO : End of Write leveling coarse delay
711 11:22:46.679707 INFO : Training has run successfully!
712 11:22:46.680157 Check phy result
713 11:22:46.684880 INFO : End of initialization
714 11:22:46.685307 INFO : End of read dq deskew training
715 11:22:46.690473 INFO : End of MPR read delay center optimization
716 11:22:46.696107 INFO : End of write delay center optimization
717 11:22:46.701679 INFO : End of read delay center optimization
718 11:22:46.702117 INFO : End of max read latency training
719 11:22:46.707290 INFO : Training has run successfully!
720 11:22:46.707715 1D training succeed
721 11:22:46.716476 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 11:22:46.764726 Check phy result
723 11:22:46.765157 INFO : End of initialization
724 11:22:46.792209 INFO : End of 2D read delay Voltage center optimization
725 11:22:46.816317 INFO : End of 2D read delay Voltage center optimization
726 11:22:46.872989 INFO : End of 2D write delay Voltage center optimization
727 11:22:46.927006 INFO : End of 2D write delay Voltage center optimization
728 11:22:46.932612 INFO : Training has run successfully!
729 11:22:46.933033
730 11:22:46.933434 channel==0
731 11:22:46.938248 RxClkDly_Margin_A0==78 ps 8
732 11:22:46.938670 TxDqDly_Margin_A0==98 ps 10
733 11:22:46.943805 RxClkDly_Margin_A1==88 ps 9
734 11:22:46.944271 TxDqDly_Margin_A1==88 ps 9
735 11:22:46.944681 TrainedVREFDQ_A0==74
736 11:22:46.949395 TrainedVREFDQ_A1==74
737 11:22:46.949824 VrefDac_Margin_A0==23
738 11:22:46.950224 DeviceVref_Margin_A0==40
739 11:22:46.955007 VrefDac_Margin_A1==23
740 11:22:46.955434 DeviceVref_Margin_A1==40
741 11:22:46.955833
742 11:22:46.956266
743 11:22:46.956662 channel==1
744 11:22:46.960599 RxClkDly_Margin_A0==88 ps 9
745 11:22:46.961030 TxDqDly_Margin_A0==98 ps 10
746 11:22:46.966214 RxClkDly_Margin_A1==88 ps 9
747 11:22:46.966648 TxDqDly_Margin_A1==78 ps 8
748 11:22:46.971772 TrainedVREFDQ_A0==78
749 11:22:46.972233 TrainedVREFDQ_A1==75
750 11:22:46.972645 VrefDac_Margin_A0==22
751 11:22:46.977400 DeviceVref_Margin_A0==36
752 11:22:46.977828 VrefDac_Margin_A1==22
753 11:22:46.983015 DeviceVref_Margin_A1==39
754 11:22:46.983439
755 11:22:46.983842 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 11:22:46.984275
757 11:22:47.016602 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000016 dram_vref_reg_value 0x 00000062
758 11:22:47.017056 2D training succeed
759 11:22:47.022256 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 11:22:47.027805 auto size-- 65535DDR cs0 size: 2048MB
761 11:22:47.028268 DDR cs1 size: 2048MB
762 11:22:47.033402 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 11:22:47.033829 cs0 DataBus test pass
764 11:22:47.039005 cs1 DataBus test pass
765 11:22:47.039430 cs0 AddrBus test pass
766 11:22:47.039828 cs1 AddrBus test pass
767 11:22:47.040260
768 11:22:47.044599 100bdlr_step_size ps== 471
769 11:22:47.045042 result report
770 11:22:47.050261 boot times 0Enable ddr reg access
771 11:22:47.055391 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 11:22:47.069325 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 11:22:47.728634 bl2z: ptr: 05129330, size: 00001e40
774 11:22:47.737054 0.0;M3 CHK:0;cm4_sp_mode 0
775 11:22:47.737556 MVN_1=0x00000000
776 11:22:47.737962 MVN_2=0x00000000
777 11:22:47.748531 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 11:22:47.749019 OPS=0x04
779 11:22:47.749411 ring efuse init
780 11:22:47.751415 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 11:22:47.757471 [0.017354 Inits done]
782 11:22:47.757889 secure task start!
783 11:22:47.758276 high task start!
784 11:22:47.758656 low task start!
785 11:22:47.761779 run into bl31
786 11:22:47.770415 NOTICE: BL31: v1.3(release):4fc40b1
787 11:22:47.778260 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 11:22:47.778681 NOTICE: BL31: G12A normal boot!
789 11:22:47.794006 NOTICE: BL31: BL33 decompress pass
790 11:22:47.799670 ERROR: Error initializing runtime service opteed_fast
791 11:22:48.595096
792 11:22:48.595566
793 11:22:48.600472 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 11:22:48.600912
795 11:22:48.603961 Model: Libre Computer AML-S905D3-CC Solitude
796 11:22:48.751003 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 11:22:48.766443 DRAM: 2 GiB (effective 3.8 GiB)
798 11:22:48.867297 Core: 406 devices, 33 uclasses, devicetree: separate
799 11:22:48.873200 WDT: Not starting watchdog@f0d0
800 11:22:48.898256 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 11:22:48.910539 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 11:22:48.915573 ** Bad device specification mmc 0 **
803 11:22:48.925549 Card did not respond to voltage select! : -110
804 11:22:48.933203 ** Bad device specification mmc 0 **
805 11:22:48.933629 Couldn't find partition mmc 0
806 11:22:48.941549 Card did not respond to voltage select! : -110
807 11:22:48.947057 ** Bad device specification mmc 0 **
808 11:22:48.947484 Couldn't find partition mmc 0
809 11:22:48.952142 Error: could not access storage.
810 11:22:49.249650 Net: eth0: ethernet@ff3f0000
811 11:22:49.250098 starting USB...
812 11:22:49.494211 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 11:22:49.494645 Starting the controller
814 11:22:49.501208 USB XHCI 1.10
815 11:22:51.057632 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 11:22:51.065917 scanning usb for storage devices... 0 Storage Device(s) found
818 11:22:51.117667 Hit any key to stop autoboot: 1
819 11:22:51.118520 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 11:22:51.119146 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 11:22:51.119630 Setting prompt string to ['=>']
822 11:22:51.120177 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 11:22:51.131874 0
824 11:22:51.132882 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 11:22:51.233912 => setenv autoload no
827 11:22:51.234747 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 11:22:51.239610 setenv autoload no
830 11:22:51.341057 => setenv initrd_high 0xffffffff
831 11:22:51.341649 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 11:22:51.345942 setenv initrd_high 0xffffffff
834 11:22:51.447316 => setenv fdt_high 0xffffffff
835 11:22:51.447895 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 11:22:51.452185 setenv fdt_high 0xffffffff
838 11:22:51.553576 => dhcp
839 11:22:51.554144 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 11:22:51.558161 dhcp
841 11:22:52.514133 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
842 11:22:52.514624 Speed: 1000, full duplex
843 11:22:52.515039 BOOTP broadcast 1
844 11:22:52.762025 BOOTP broadcast 2
845 11:22:52.789308 DHCP client bound to address 192.168.6.21 (275 ms)
847 11:22:52.890703 => setenv serverip 192.168.6.2
848 11:22:52.891256 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
849 11:22:52.895821 setenv serverip 192.168.6.2
851 11:22:52.997247 => tftpboot 0x01080000 917110/tftp-deploy-d6_w43k3/kernel/uImage
852 11:22:52.997817 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
853 11:22:53.004448 tftpboot 0x01080000 917110/tftp-deploy-d6_w43k3/kernel/uImage
854 11:22:53.004890 Speed: 1000, full duplex
855 11:22:53.005296 Using ethernet@ff3f0000 device
856 11:22:53.010043 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 11:22:53.015422 Filename '917110/tftp-deploy-d6_w43k3/kernel/uImage'.
858 11:22:53.019381 Load address: 0x1080000
859 11:22:55.404906 Loading: *################################################## 36.2 MiB
860 11:22:55.405511 15.2 MiB/s
861 11:22:55.405939 done
862 11:22:55.410008 Bytes transferred = 38009408 (243fa40 hex)
864 11:22:55.511441 => tftpboot 0x08000000 917110/tftp-deploy-d6_w43k3/ramdisk/ramdisk.cpio.gz.uboot
865 11:22:55.512071 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
866 11:22:55.518876 tftpboot 0x08000000 917110/tftp-deploy-d6_w43k3/ramdisk/ramdisk.cpio.gz.uboot
867 11:22:55.519321 Speed: 1000, full duplex
868 11:22:55.519729 Using ethernet@ff3f0000 device
869 11:22:55.524376 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 11:22:55.534055 Filename '917110/tftp-deploy-d6_w43k3/ramdisk/ramdisk.cpio.gz.uboot'.
871 11:22:55.534500 Load address: 0x8000000
872 11:22:57.000725 Loading: *################################################# UDP wrong checksum 00000005 0000e6a3
873 11:23:02.002082 T UDP wrong checksum 00000005 0000e6a3
874 11:23:12.004151 T T UDP wrong checksum 00000005 0000e6a3
875 11:23:32.008167 T T T T UDP wrong checksum 00000005 0000e6a3
876 11:23:52.012955 T T T
877 11:23:52.013580 Retry count exceeded; starting again
879 11:23:52.015009 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
882 11:23:52.016991 end: 2.4 uboot-commands (duration 00:01:20) [common]
884 11:23:52.018397 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
886 11:23:52.019398 end: 2 uboot-action (duration 00:01:20) [common]
888 11:23:52.020967 Cleaning after the job
889 11:23:52.021519 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/ramdisk
890 11:23:52.022877 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/kernel
891 11:23:52.059702 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/dtb
892 11:23:52.060574 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/nfsrootfs
893 11:23:52.222531 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917110/tftp-deploy-d6_w43k3/modules
894 11:23:52.242250 start: 4.1 power-off (timeout 00:00:30) [common]
895 11:23:52.242889 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
896 11:23:52.279097 >> OK - accepted request
897 11:23:52.281339 Returned 0 in 0 seconds
898 11:23:52.382119 end: 4.1 power-off (duration 00:00:00) [common]
900 11:23:52.383101 start: 4.2 read-feedback (timeout 00:10:00) [common]
901 11:23:52.383732 Listened to connection for namespace 'common' for up to 1s
902 11:23:53.384731 Finalising connection for namespace 'common'
903 11:23:53.385240 Disconnecting from shell: Finalise
904 11:23:53.385543 =>
905 11:23:53.486249 end: 4.2 read-feedback (duration 00:00:01) [common]
906 11:23:53.486677 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/917110
907 11:23:56.303738 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/917110
908 11:23:56.304775 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.