Boot log: meson-g12b-a311d-libretech-cc

    1 10:40:50.201483  lava-dispatcher, installed at version: 2024.01
    2 10:40:50.202255  start: 0 validate
    3 10:40:50.202721  Start time: 2024-10-31 10:40:50.202691+00:00 (UTC)
    4 10:40:50.203254  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 10:40:50.203787  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 10:40:50.243609  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 10:40:50.244172  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fkernel%2FImage exists
    8 10:40:50.273011  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 10:40:50.273948  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
   10 10:40:50.304889  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 10:40:50.305369  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 10:40:50.333410  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 10:40:50.333875  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241031%2Farm64%2Fdefconfig%2Fclang-17%2Fmodules.tar.xz exists
   14 10:40:50.372305  validate duration: 0.17
   16 10:40:50.373155  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 10:40:50.373490  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 10:40:50.373819  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 10:40:50.374389  Not decompressing ramdisk as can be used compressed.
   20 10:40:50.374829  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
   21 10:40:50.375115  saving as /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/ramdisk/initrd.cpio.gz
   22 10:40:50.375387  total size: 5628140 (5 MB)
   23 10:40:50.412209  progress   0 % (0 MB)
   24 10:40:50.420102  progress   5 % (0 MB)
   25 10:40:50.428119  progress  10 % (0 MB)
   26 10:40:50.435340  progress  15 % (0 MB)
   27 10:40:50.441848  progress  20 % (1 MB)
   28 10:40:50.445543  progress  25 % (1 MB)
   29 10:40:50.449677  progress  30 % (1 MB)
   30 10:40:50.453832  progress  35 % (1 MB)
   31 10:40:50.457538  progress  40 % (2 MB)
   32 10:40:50.461626  progress  45 % (2 MB)
   33 10:40:50.465436  progress  50 % (2 MB)
   34 10:40:50.469482  progress  55 % (2 MB)
   35 10:40:50.473506  progress  60 % (3 MB)
   36 10:40:50.477221  progress  65 % (3 MB)
   37 10:40:50.481363  progress  70 % (3 MB)
   38 10:40:50.484947  progress  75 % (4 MB)
   39 10:40:50.488966  progress  80 % (4 MB)
   40 10:40:50.492562  progress  85 % (4 MB)
   41 10:40:50.496584  progress  90 % (4 MB)
   42 10:40:50.500561  progress  95 % (5 MB)
   43 10:40:50.503821  progress 100 % (5 MB)
   44 10:40:50.504480  5 MB downloaded in 0.13 s (41.58 MB/s)
   45 10:40:50.505052  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 10:40:50.505958  end: 1.1 download-retry (duration 00:00:00) [common]
   48 10:40:50.506269  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 10:40:50.506558  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 10:40:50.507042  downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/kernel/Image
   51 10:40:50.507293  saving as /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/kernel/Image
   52 10:40:50.507511  total size: 38009344 (36 MB)
   53 10:40:50.507730  No compression specified
   54 10:40:50.542499  progress   0 % (0 MB)
   55 10:40:50.565880  progress   5 % (1 MB)
   56 10:40:50.589306  progress  10 % (3 MB)
   57 10:40:50.612405  progress  15 % (5 MB)
   58 10:40:50.635551  progress  20 % (7 MB)
   59 10:40:50.658580  progress  25 % (9 MB)
   60 10:40:50.682002  progress  30 % (10 MB)
   61 10:40:50.705076  progress  35 % (12 MB)
   62 10:40:50.728071  progress  40 % (14 MB)
   63 10:40:50.751167  progress  45 % (16 MB)
   64 10:40:50.774431  progress  50 % (18 MB)
   65 10:40:50.799637  progress  55 % (19 MB)
   66 10:40:50.822808  progress  60 % (21 MB)
   67 10:40:50.846045  progress  65 % (23 MB)
   68 10:40:50.869326  progress  70 % (25 MB)
   69 10:40:50.892608  progress  75 % (27 MB)
   70 10:40:50.915965  progress  80 % (29 MB)
   71 10:40:50.939130  progress  85 % (30 MB)
   72 10:40:50.964952  progress  90 % (32 MB)
   73 10:40:50.988192  progress  95 % (34 MB)
   74 10:40:51.010891  progress 100 % (36 MB)
   75 10:40:51.011662  36 MB downloaded in 0.50 s (71.90 MB/s)
   76 10:40:51.012193  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 10:40:51.013048  end: 1.2 download-retry (duration 00:00:01) [common]
   79 10:40:51.013336  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 10:40:51.013612  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 10:40:51.014092  downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
   82 10:40:51.014386  saving as /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/dtb/meson-g12b-a311d-libretech-cc.dtb
   83 10:40:51.014598  total size: 54703 (0 MB)
   84 10:40:51.014810  No compression specified
   85 10:40:51.054354  progress  59 % (0 MB)
   86 10:40:51.055199  progress 100 % (0 MB)
   87 10:40:51.055776  0 MB downloaded in 0.04 s (1.27 MB/s)
   88 10:40:51.056285  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 10:40:51.057120  end: 1.3 download-retry (duration 00:00:00) [common]
   91 10:40:51.057393  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 10:40:51.057662  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 10:40:51.058117  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
   94 10:40:51.058378  saving as /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/nfsrootfs/full.rootfs.tar
   95 10:40:51.058583  total size: 474398908 (452 MB)
   96 10:40:51.058792  Using unxz to decompress xz
   97 10:40:51.093514  progress   0 % (0 MB)
   98 10:40:52.270341  progress   5 % (22 MB)
   99 10:40:53.777649  progress  10 % (45 MB)
  100 10:40:54.222856  progress  15 % (67 MB)
  101 10:40:55.052362  progress  20 % (90 MB)
  102 10:40:55.581833  progress  25 % (113 MB)
  103 10:40:55.933269  progress  30 % (135 MB)
  104 10:40:56.531674  progress  35 % (158 MB)
  105 10:40:57.438853  progress  40 % (181 MB)
  106 10:40:58.269554  progress  45 % (203 MB)
  107 10:40:58.822466  progress  50 % (226 MB)
  108 10:40:59.444751  progress  55 % (248 MB)
  109 10:41:00.651754  progress  60 % (271 MB)
  110 10:41:02.070890  progress  65 % (294 MB)
  111 10:41:03.668447  progress  70 % (316 MB)
  112 10:41:06.735385  progress  75 % (339 MB)
  113 10:41:09.166170  progress  80 % (361 MB)
  114 10:41:12.021683  progress  85 % (384 MB)
  115 10:41:15.193834  progress  90 % (407 MB)
  116 10:41:18.354015  progress  95 % (429 MB)
  117 10:41:21.475459  progress 100 % (452 MB)
  118 10:41:21.488850  452 MB downloaded in 30.43 s (14.87 MB/s)
  119 10:41:21.489568  end: 1.4.1 http-download (duration 00:00:30) [common]
  121 10:41:21.491203  end: 1.4 download-retry (duration 00:00:30) [common]
  122 10:41:21.491743  start: 1.5 download-retry (timeout 00:09:29) [common]
  123 10:41:21.492325  start: 1.5.1 http-download (timeout 00:09:29) [common]
  124 10:41:21.493399  downloading http://storage.kernelci.org/next/master/next-20241031/arm64/defconfig/clang-17/modules.tar.xz
  125 10:41:21.493885  saving as /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/modules/modules.tar
  126 10:41:21.494304  total size: 11742820 (11 MB)
  127 10:41:21.494729  Using unxz to decompress xz
  128 10:41:21.534726  progress   0 % (0 MB)
  129 10:41:21.614174  progress   5 % (0 MB)
  130 10:41:21.703176  progress  10 % (1 MB)
  131 10:41:21.798557  progress  15 % (1 MB)
  132 10:41:21.881303  progress  20 % (2 MB)
  133 10:41:21.956982  progress  25 % (2 MB)
  134 10:41:22.036716  progress  30 % (3 MB)
  135 10:41:22.112248  progress  35 % (3 MB)
  136 10:41:22.192043  progress  40 % (4 MB)
  137 10:41:22.276815  progress  45 % (5 MB)
  138 10:41:22.357916  progress  50 % (5 MB)
  139 10:41:22.440974  progress  55 % (6 MB)
  140 10:41:22.523086  progress  60 % (6 MB)
  141 10:41:22.601873  progress  65 % (7 MB)
  142 10:41:22.681971  progress  70 % (7 MB)
  143 10:41:22.767315  progress  75 % (8 MB)
  144 10:41:22.849470  progress  80 % (8 MB)
  145 10:41:22.928761  progress  85 % (9 MB)
  146 10:41:23.002713  progress  90 % (10 MB)
  147 10:41:23.101127  progress  95 % (10 MB)
  148 10:41:23.198469  progress 100 % (11 MB)
  149 10:41:23.210105  11 MB downloaded in 1.72 s (6.53 MB/s)
  150 10:41:23.210698  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 10:41:23.211556  end: 1.5 download-retry (duration 00:00:02) [common]
  153 10:41:23.211839  start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
  154 10:41:23.212292  start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
  155 10:41:38.099017  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/917041/extract-nfsrootfs-icyw2oxl
  156 10:41:38.099625  end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
  157 10:41:38.099925  start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
  158 10:41:38.100684  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma
  159 10:41:38.101155  makedir: /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin
  160 10:41:38.101505  makedir: /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/tests
  161 10:41:38.101831  makedir: /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/results
  162 10:41:38.102171  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-add-keys
  163 10:41:38.102706  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-add-sources
  164 10:41:38.103215  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-background-process-start
  165 10:41:38.103729  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-background-process-stop
  166 10:41:38.104309  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-common-functions
  167 10:41:38.104951  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-echo-ipv4
  168 10:41:38.105500  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-install-packages
  169 10:41:38.106107  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-installed-packages
  170 10:41:38.106605  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-os-build
  171 10:41:38.107093  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-probe-channel
  172 10:41:38.107572  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-probe-ip
  173 10:41:38.108092  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-target-ip
  174 10:41:38.108592  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-target-mac
  175 10:41:38.109076  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-target-storage
  176 10:41:38.109629  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-test-case
  177 10:41:38.110151  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-test-event
  178 10:41:38.110631  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-test-feedback
  179 10:41:38.111114  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-test-raise
  180 10:41:38.111592  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-test-reference
  181 10:41:38.112119  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-test-runner
  182 10:41:38.112627  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-test-set
  183 10:41:38.113108  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-test-shell
  184 10:41:38.113627  Updating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-install-packages (oe)
  185 10:41:38.114190  Updating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/bin/lava-installed-packages (oe)
  186 10:41:38.114642  Creating /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/environment
  187 10:41:38.115017  LAVA metadata
  188 10:41:38.115282  - LAVA_JOB_ID=917041
  189 10:41:38.115499  - LAVA_DISPATCHER_IP=192.168.6.2
  190 10:41:38.115854  start: 1.6.2.1 ssh-authorize (timeout 00:09:12) [common]
  191 10:41:38.116842  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 10:41:38.117165  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:12) [common]
  193 10:41:38.117379  skipped lava-vland-overlay
  194 10:41:38.117620  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 10:41:38.117877  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:12) [common]
  196 10:41:38.118097  skipped lava-multinode-overlay
  197 10:41:38.118339  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 10:41:38.118593  start: 1.6.2.4 test-definition (timeout 00:09:12) [common]
  199 10:41:38.118840  Loading test definitions
  200 10:41:38.119118  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:12) [common]
  201 10:41:38.119342  Using /lava-917041 at stage 0
  202 10:41:38.120489  uuid=917041_1.6.2.4.1 testdef=None
  203 10:41:38.120799  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 10:41:38.121067  start: 1.6.2.4.2 test-overlay (timeout 00:09:12) [common]
  205 10:41:38.122798  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 10:41:38.123592  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:12) [common]
  208 10:41:38.125783  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 10:41:38.126623  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:12) [common]
  211 10:41:38.128703  runner path: /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 917041_1.6.2.4.1
  212 10:41:38.129250  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 10:41:38.130012  Creating lava-test-runner.conf files
  215 10:41:38.130213  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/917041/lava-overlay-e6lvjrma/lava-917041/0 for stage 0
  216 10:41:38.130531  - 0_v4l2-decoder-conformance-vp9
  217 10:41:38.130874  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 10:41:38.131153  start: 1.6.2.5 compress-overlay (timeout 00:09:12) [common]
  219 10:41:38.152380  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 10:41:38.152732  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:12) [common]
  221 10:41:38.152994  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 10:41:38.153260  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 10:41:38.153522  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:12) [common]
  224 10:41:38.762989  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 10:41:38.763461  start: 1.6.4 extract-modules (timeout 00:09:12) [common]
  226 10:41:38.763717  extracting modules file /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917041/extract-nfsrootfs-icyw2oxl
  227 10:41:40.118745  extracting modules file /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/917041/extract-overlay-ramdisk-r66i8qcv/ramdisk
  228 10:41:41.516438  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 10:41:41.516925  start: 1.6.5 apply-overlay-tftp (timeout 00:09:09) [common]
  230 10:41:41.517209  [common] Applying overlay to NFS
  231 10:41:41.517425  [common] Applying overlay /var/lib/lava/dispatcher/tmp/917041/compress-overlay-ge13a_rm/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/917041/extract-nfsrootfs-icyw2oxl
  232 10:41:41.546889  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 10:41:41.547271  start: 1.6.6 prepare-kernel (timeout 00:09:09) [common]
  234 10:41:41.547549  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:09) [common]
  235 10:41:41.547780  Converting downloaded kernel to a uImage
  236 10:41:41.548121  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/kernel/Image /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/kernel/uImage
  237 10:41:41.943301  output: Image Name:   
  238 10:41:41.943720  output: Created:      Thu Oct 31 10:41:41 2024
  239 10:41:41.943931  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 10:41:41.944184  output: Data Size:    38009344 Bytes = 37118.50 KiB = 36.25 MiB
  241 10:41:41.944392  output: Load Address: 01080000
  242 10:41:41.944591  output: Entry Point:  01080000
  243 10:41:41.944787  output: 
  244 10:41:41.945122  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  245 10:41:41.945394  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  246 10:41:41.945667  start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
  247 10:41:41.945925  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 10:41:41.946187  start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
  249 10:41:41.946443  Building ramdisk /var/lib/lava/dispatcher/tmp/917041/extract-overlay-ramdisk-r66i8qcv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/917041/extract-overlay-ramdisk-r66i8qcv/ramdisk
  250 10:41:44.163011  >> 173832 blocks

  251 10:41:51.781905  Adding RAMdisk u-boot header.
  252 10:41:51.782587  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/917041/extract-overlay-ramdisk-r66i8qcv/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/917041/extract-overlay-ramdisk-r66i8qcv/ramdisk.cpio.gz.uboot
  253 10:41:52.026202  output: Image Name:   
  254 10:41:52.026609  output: Created:      Thu Oct 31 10:41:51 2024
  255 10:41:52.026826  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 10:41:52.027035  output: Data Size:    24156413 Bytes = 23590.25 KiB = 23.04 MiB
  257 10:41:52.027236  output: Load Address: 00000000
  258 10:41:52.027436  output: Entry Point:  00000000
  259 10:41:52.027635  output: 
  260 10:41:52.028461  rename /var/lib/lava/dispatcher/tmp/917041/extract-overlay-ramdisk-r66i8qcv/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/ramdisk/ramdisk.cpio.gz.uboot
  261 10:41:52.029262  end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
  262 10:41:52.029868  end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
  263 10:41:52.030486  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:58) [common]
  264 10:41:52.030995  No LXC device requested
  265 10:41:52.031550  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 10:41:52.032148  start: 1.8 deploy-device-env (timeout 00:08:58) [common]
  267 10:41:52.032708  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 10:41:52.033167  Checking files for TFTP limit of 4294967296 bytes.
  269 10:41:52.036107  end: 1 tftp-deploy (duration 00:01:02) [common]
  270 10:41:52.036741  start: 2 uboot-action (timeout 00:05:00) [common]
  271 10:41:52.037320  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 10:41:52.037867  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 10:41:52.038423  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 10:41:52.038996  Using kernel file from prepare-kernel: 917041/tftp-deploy-xk0o0up0/kernel/uImage
  275 10:41:52.039687  substitutions:
  276 10:41:52.040177  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 10:41:52.040628  - {DTB_ADDR}: 0x01070000
  278 10:41:52.041068  - {DTB}: 917041/tftp-deploy-xk0o0up0/dtb/meson-g12b-a311d-libretech-cc.dtb
  279 10:41:52.041504  - {INITRD}: 917041/tftp-deploy-xk0o0up0/ramdisk/ramdisk.cpio.gz.uboot
  280 10:41:52.041942  - {KERNEL_ADDR}: 0x01080000
  281 10:41:52.042372  - {KERNEL}: 917041/tftp-deploy-xk0o0up0/kernel/uImage
  282 10:41:52.042804  - {LAVA_MAC}: None
  283 10:41:52.043275  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/917041/extract-nfsrootfs-icyw2oxl
  284 10:41:52.043716  - {NFS_SERVER_IP}: 192.168.6.2
  285 10:41:52.044185  - {PRESEED_CONFIG}: None
  286 10:41:52.044622  - {PRESEED_LOCAL}: None
  287 10:41:52.045052  - {RAMDISK_ADDR}: 0x08000000
  288 10:41:52.045477  - {RAMDISK}: 917041/tftp-deploy-xk0o0up0/ramdisk/ramdisk.cpio.gz.uboot
  289 10:41:52.045905  - {ROOT_PART}: None
  290 10:41:52.046333  - {ROOT}: None
  291 10:41:52.046756  - {SERVER_IP}: 192.168.6.2
  292 10:41:52.047179  - {TEE_ADDR}: 0x83000000
  293 10:41:52.047607  - {TEE}: None
  294 10:41:52.048061  Parsed boot commands:
  295 10:41:52.048485  - setenv autoload no
  296 10:41:52.048909  - setenv initrd_high 0xffffffff
  297 10:41:52.049335  - setenv fdt_high 0xffffffff
  298 10:41:52.049759  - dhcp
  299 10:41:52.050185  - setenv serverip 192.168.6.2
  300 10:41:52.050607  - tftpboot 0x01080000 917041/tftp-deploy-xk0o0up0/kernel/uImage
  301 10:41:52.051030  - tftpboot 0x08000000 917041/tftp-deploy-xk0o0up0/ramdisk/ramdisk.cpio.gz.uboot
  302 10:41:52.051454  - tftpboot 0x01070000 917041/tftp-deploy-xk0o0up0/dtb/meson-g12b-a311d-libretech-cc.dtb
  303 10:41:52.051882  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/917041/extract-nfsrootfs-icyw2oxl,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 10:41:52.052354  - bootm 0x01080000 0x08000000 0x01070000
  305 10:41:52.052908  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 10:41:52.054541  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 10:41:52.055005  [common] connect-device Connecting to device using 'telnet conserv1 3007'
  309 10:41:52.069817  Setting prompt string to ['lava-test: # ']
  310 10:41:52.071412  end: 2.3 connect-device (duration 00:00:00) [common]
  311 10:41:52.072098  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 10:41:52.072720  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 10:41:52.073335  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 10:41:52.074597  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
  315 10:41:52.110806  >> OK - accepted request

  316 10:41:52.112921  Returned 0 in 0 seconds
  317 10:41:52.214075  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 10:41:52.215769  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 10:41:52.216447  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 10:41:52.217033  Setting prompt string to ['Hit any key to stop autoboot']
  322 10:41:52.217538  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 10:41:52.219198  Trying 192.168.56.21...
  324 10:41:52.219711  Connected to conserv1.
  325 10:41:52.220197  Escape character is '^]'.
  326 10:41:52.220654  
  327 10:41:52.221114  ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  328 10:41:52.221564  
  329 10:42:03.626430  G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  330 10:42:03.627111  bl2_stage_init 0x01
  331 10:42:03.627564  bl2_stage_init 0x81
  332 10:42:03.631961  hw id: 0x0000 - pwm id 0x01
  333 10:42:03.632489  bl2_stage_init 0xc1
  334 10:42:03.632946  bl2_stage_init 0x02
  335 10:42:03.633381  
  336 10:42:03.637467  L0:00000000
  337 10:42:03.637953  L1:20000703
  338 10:42:03.638388  L2:00008067
  339 10:42:03.638817  L3:14000000
  340 10:42:03.640411  B2:00402000
  341 10:42:03.640889  B1:e0f83180
  342 10:42:03.641322  
  343 10:42:03.641758  TE: 58124
  344 10:42:03.642190  
  345 10:42:03.651562  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  346 10:42:03.652061  
  347 10:42:03.652501  Board ID = 1
  348 10:42:03.652932  Set A53 clk to 24M
  349 10:42:03.653360  Set A73 clk to 24M
  350 10:42:03.657179  Set clk81 to 24M
  351 10:42:03.657646  A53 clk: 1200 MHz
  352 10:42:03.658077  A73 clk: 1200 MHz
  353 10:42:03.660861  CLK81: 166.6M
  354 10:42:03.661321  smccc: 00012a92
  355 10:42:03.666419  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  356 10:42:03.671935  board id: 1
  357 10:42:03.676854  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 10:42:03.687391  fw parse done
  359 10:42:03.693343  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 10:42:03.736030  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 10:42:03.747033  PIEI prepare done
  362 10:42:03.747495  fastboot data load
  363 10:42:03.747928  fastboot data verify
  364 10:42:03.752529  verify result: 266
  365 10:42:03.758147  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  366 10:42:03.758636  LPDDR4 probe
  367 10:42:03.759064  ddr clk to 1584MHz
  368 10:42:03.766114  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 10:42:03.803373  
  370 10:42:03.803846  dmc_version 0001
  371 10:42:03.810070  Check phy result
  372 10:42:03.815913  INFO : End of CA training
  373 10:42:03.816402  INFO : End of initialization
  374 10:42:03.821511  INFO : Training has run successfully!
  375 10:42:03.821974  Check phy result
  376 10:42:03.827129  INFO : End of initialization
  377 10:42:03.827591  INFO : End of read enable training
  378 10:42:03.832729  INFO : End of fine write leveling
  379 10:42:03.838310  INFO : End of Write leveling coarse delay
  380 10:42:03.838770  INFO : Training has run successfully!
  381 10:42:03.839203  Check phy result
  382 10:42:03.843910  INFO : End of initialization
  383 10:42:03.844412  INFO : End of read dq deskew training
  384 10:42:03.849521  INFO : End of MPR read delay center optimization
  385 10:42:03.855121  INFO : End of write delay center optimization
  386 10:42:03.860723  INFO : End of read delay center optimization
  387 10:42:03.861187  INFO : End of max read latency training
  388 10:42:03.866325  INFO : Training has run successfully!
  389 10:42:03.866784  1D training succeed
  390 10:42:03.875508  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 10:42:03.923071  Check phy result
  392 10:42:03.923552  INFO : End of initialization
  393 10:42:03.945642  INFO : End of 2D read delay Voltage center optimization
  394 10:42:03.966046  INFO : End of 2D read delay Voltage center optimization
  395 10:42:04.018050  INFO : End of 2D write delay Voltage center optimization
  396 10:42:04.067296  INFO : End of 2D write delay Voltage center optimization
  397 10:42:04.072916  INFO : Training has run successfully!
  398 10:42:04.073385  
  399 10:42:04.073838  channel==0
  400 10:42:04.078480  RxClkDly_Margin_A0==88 ps 9
  401 10:42:04.078939  TxDqDly_Margin_A0==98 ps 10
  402 10:42:04.084072  RxClkDly_Margin_A1==88 ps 9
  403 10:42:04.084546  TxDqDly_Margin_A1==88 ps 9
  404 10:42:04.084984  TrainedVREFDQ_A0==74
  405 10:42:04.089677  TrainedVREFDQ_A1==74
  406 10:42:04.090142  VrefDac_Margin_A0==24
  407 10:42:04.090573  DeviceVref_Margin_A0==40
  408 10:42:04.095325  VrefDac_Margin_A1==25
  409 10:42:04.095783  DeviceVref_Margin_A1==40
  410 10:42:04.096247  
  411 10:42:04.096679  
  412 10:42:04.097107  channel==1
  413 10:42:04.101064  RxClkDly_Margin_A0==98 ps 10
  414 10:42:04.101524  TxDqDly_Margin_A0==98 ps 10
  415 10:42:04.106562  RxClkDly_Margin_A1==98 ps 10
  416 10:42:04.107020  TxDqDly_Margin_A1==88 ps 9
  417 10:42:04.112081  TrainedVREFDQ_A0==77
  418 10:42:04.112543  TrainedVREFDQ_A1==77
  419 10:42:04.112977  VrefDac_Margin_A0==22
  420 10:42:04.117677  DeviceVref_Margin_A0==37
  421 10:42:04.118138  VrefDac_Margin_A1==22
  422 10:42:04.123268  DeviceVref_Margin_A1==37
  423 10:42:04.123722  
  424 10:42:04.124193   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 10:42:04.124629  
  426 10:42:04.156869  soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
  427 10:42:04.157420  2D training succeed
  428 10:42:04.162484  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 10:42:04.168068  auto size-- 65535DDR cs0 size: 2048MB
  430 10:42:04.168530  DDR cs1 size: 2048MB
  431 10:42:04.173656  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 10:42:04.174114  cs0 DataBus test pass
  433 10:42:04.179276  cs1 DataBus test pass
  434 10:42:04.179735  cs0 AddrBus test pass
  435 10:42:04.180215  cs1 AddrBus test pass
  436 10:42:04.180649  
  437 10:42:04.184870  100bdlr_step_size ps== 420
  438 10:42:04.185343  result report
  439 10:42:04.190454  boot times 0Enable ddr reg access
  440 10:42:04.195883  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 10:42:04.209296  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  442 10:42:04.782384  0.0;M3 CHK:0;cm4_sp_mode 0
  443 10:42:04.782888  MVN_1=0x00000000
  444 10:42:04.787834  MVN_2=0x00000000
  445 10:42:04.793575  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  446 10:42:04.794047  OPS=0x10
  447 10:42:04.794484  ring efuse init
  448 10:42:04.794912  chipver efuse init
  449 10:42:04.799168  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  450 10:42:04.804805  [0.018961 Inits done]
  451 10:42:04.805260  secure task start!
  452 10:42:04.805689  high task start!
  453 10:42:04.809348  low task start!
  454 10:42:04.809804  run into bl31
  455 10:42:04.816042  NOTICE:  BL31: v1.3(release):4fc40b1
  456 10:42:04.823814  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  457 10:42:04.824308  NOTICE:  BL31: G12A normal boot!
  458 10:42:04.849158  NOTICE:  BL31: BL33 decompress pass
  459 10:42:04.854860  ERROR:   Error initializing runtime service opteed_fast
  460 10:42:06.087802  
  461 10:42:06.088374  
  462 10:42:06.096319  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  463 10:42:06.096744  
  464 10:42:06.097229  Model: Libre Computer AML-A311D-CC Alta
  465 10:42:06.304832  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  466 10:42:06.328152  DRAM:  2 GiB (effective 3.8 GiB)
  467 10:42:06.471097  Core:  408 devices, 31 uclasses, devicetree: separate
  468 10:42:06.476947  WDT:   Not starting watchdog@f0d0
  469 10:42:06.509208  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  470 10:42:06.522029  Loading Environment from FAT... Card did not respond to voltage select! : -110
  471 10:42:06.526540  ** Bad device specification mmc 0 **
  472 10:42:06.539077  Card did not respond to voltage select! : -110
  473 10:42:06.544564  ** Bad device specification mmc 0 **
  474 10:42:06.544895  Couldn't find partition mmc 0
  475 10:42:06.552883  Card did not respond to voltage select! : -110
  476 10:42:06.558430  ** Bad device specification mmc 0 **
  477 10:42:06.558782  Couldn't find partition mmc 0
  478 10:42:06.563467  Error: could not access storage.
  479 10:42:07.826487  G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  480 10:42:07.827159  bl2_stage_init 0x01
  481 10:42:07.827644  bl2_stage_init 0x81
  482 10:42:07.832042  hw id: 0x0000 - pwm id 0x01
  483 10:42:07.832540  bl2_stage_init 0xc1
  484 10:42:07.833004  bl2_stage_init 0x02
  485 10:42:07.833458  
  486 10:42:07.837615  L0:00000000
  487 10:42:07.838096  L1:20000703
  488 10:42:07.838550  L2:00008067
  489 10:42:07.838996  L3:14000000
  490 10:42:07.840509  B2:00402000
  491 10:42:07.840986  B1:e0f83180
  492 10:42:07.841440  
  493 10:42:07.841889  TE: 58159
  494 10:42:07.842337  
  495 10:42:07.851699  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  496 10:42:07.852234  
  497 10:42:07.852693  Board ID = 1
  498 10:42:07.853138  Set A53 clk to 24M
  499 10:42:07.853579  Set A73 clk to 24M
  500 10:42:07.857311  Set clk81 to 24M
  501 10:42:07.857785  A53 clk: 1200 MHz
  502 10:42:07.858234  A73 clk: 1200 MHz
  503 10:42:07.862909  CLK81: 166.6M
  504 10:42:07.863390  smccc: 00012ab5
  505 10:42:07.868498  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  506 10:42:07.868972  board id: 1
  507 10:42:07.877081  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  508 10:42:07.887750  fw parse done
  509 10:42:07.893710  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  510 10:42:07.936371  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  511 10:42:07.947226  PIEI prepare done
  512 10:42:07.947544  fastboot data load
  513 10:42:07.947773  fastboot data verify
  514 10:42:07.952965  verify result: 266
  515 10:42:07.958494  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  516 10:42:07.958800  LPDDR4 probe
  517 10:42:07.959032  ddr clk to 1584MHz
  518 10:42:07.966504  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  519 10:42:08.003746  
  520 10:42:08.004319  dmc_version 0001
  521 10:42:08.010429  Check phy result
  522 10:42:08.016239  INFO : End of CA training
  523 10:42:08.016540  INFO : End of initialization
  524 10:42:08.021934  INFO : Training has run successfully!
  525 10:42:08.022371  Check phy result
  526 10:42:08.027465  INFO : End of initialization
  527 10:42:08.027763  INFO : End of read enable training
  528 10:42:08.033058  INFO : End of fine write leveling
  529 10:42:08.038625  INFO : End of Write leveling coarse delay
  530 10:42:08.038926  INFO : Training has run successfully!
  531 10:42:08.039148  Check phy result
  532 10:42:08.044260  INFO : End of initialization
  533 10:42:08.044707  INFO : End of read dq deskew training
  534 10:42:08.049828  INFO : End of MPR read delay center optimization
  535 10:42:08.055459  INFO : End of write delay center optimization
  536 10:42:08.061078  INFO : End of read delay center optimization
  537 10:42:08.061377  INFO : End of max read latency training
  538 10:42:08.066670  INFO : Training has run successfully!
  539 10:42:08.067115  1D training succeed
  540 10:42:08.075861  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  541 10:42:08.123600  Check phy result
  542 10:42:08.124020  INFO : End of initialization
  543 10:42:08.145131  INFO : End of 2D read delay Voltage center optimization
  544 10:42:08.164343  INFO : End of 2D read delay Voltage center optimization
  545 10:42:08.216281  INFO : End of 2D write delay Voltage center optimization
  546 10:42:08.265545  INFO : End of 2D write delay Voltage center optimization
  547 10:42:08.271067  INFO : Training has run successfully!
  548 10:42:08.271542  
  549 10:42:08.272052  channel==0
  550 10:42:08.276680  RxClkDly_Margin_A0==88 ps 9
  551 10:42:08.277176  TxDqDly_Margin_A0==98 ps 10
  552 10:42:08.282269  RxClkDly_Margin_A1==88 ps 9
  553 10:42:08.282765  TxDqDly_Margin_A1==98 ps 10
  554 10:42:08.283224  TrainedVREFDQ_A0==74
  555 10:42:08.287878  TrainedVREFDQ_A1==74
  556 10:42:08.288411  VrefDac_Margin_A0==25
  557 10:42:08.288866  DeviceVref_Margin_A0==40
  558 10:42:08.293479  VrefDac_Margin_A1==25
  559 10:42:08.293950  DeviceVref_Margin_A1==40
  560 10:42:08.294395  
  561 10:42:08.294839  
  562 10:42:08.299081  channel==1
  563 10:42:08.299551  RxClkDly_Margin_A0==88 ps 9
  564 10:42:08.300024  TxDqDly_Margin_A0==98 ps 10
  565 10:42:08.304684  RxClkDly_Margin_A1==88 ps 9
  566 10:42:08.305162  TxDqDly_Margin_A1==88 ps 9
  567 10:42:08.310325  TrainedVREFDQ_A0==77
  568 10:42:08.310806  TrainedVREFDQ_A1==77
  569 10:42:08.311262  VrefDac_Margin_A0==23
  570 10:42:08.315876  DeviceVref_Margin_A0==37
  571 10:42:08.316381  VrefDac_Margin_A1==24
  572 10:42:08.321529  DeviceVref_Margin_A1==37
  573 10:42:08.322009  
  574 10:42:08.322460   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  575 10:42:08.322911  
  576 10:42:08.355084  soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000017 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
  577 10:42:08.355619  2D training succeed
  578 10:42:08.360691  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  579 10:42:08.366262  auto size-- 65535DDR cs0 size: 2048MB
  580 10:42:08.366745  DDR cs1 size: 2048MB
  581 10:42:08.371855  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  582 10:42:08.372373  cs0 DataBus test pass
  583 10:42:08.377476  cs1 DataBus test pass
  584 10:42:08.377955  cs0 AddrBus test pass
  585 10:42:08.378403  cs1 AddrBus test pass
  586 10:42:08.378847  
  587 10:42:08.383077  100bdlr_step_size ps== 420
  588 10:42:08.383572  result report
  589 10:42:08.388660  boot times 0Enable ddr reg access
  590 10:42:08.393938  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  591 10:42:08.407399  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  592 10:42:08.979708  0.0;M3 CHK:0;cm4_sp_mode 0
  593 10:42:08.980384  MVN_1=0x00000000
  594 10:42:08.985068  MVN_2=0x00000000
  595 10:42:08.990906  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  596 10:42:08.991429  OPS=0x10
  597 10:42:08.991893  ring efuse init
  598 10:42:08.992425  chipver efuse init
  599 10:42:08.999284  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  600 10:42:08.999855  [0.018961 Inits done]
  601 10:42:09.000346  secure task start!
  602 10:42:09.006752  high task start!
  603 10:42:09.007227  low task start!
  604 10:42:09.007668  run into bl31
  605 10:42:09.013165  NOTICE:  BL31: v1.3(release):4fc40b1
  606 10:42:09.020993  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  607 10:42:09.021461  NOTICE:  BL31: G12A normal boot!
  608 10:42:09.046385  NOTICE:  BL31: BL33 decompress pass
  609 10:42:09.052115  ERROR:   Error initializing runtime service opteed_fast
  610 10:42:10.285267  
  611 10:42:10.285939  
  612 10:42:10.293458  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  613 10:42:10.293964  
  614 10:42:10.294430  Model: Libre Computer AML-A311D-CC Alta
  615 10:42:10.501847  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  616 10:42:10.525232  DRAM:  2 GiB (effective 3.8 GiB)
  617 10:42:10.668432  Core:  408 devices, 31 uclasses, devicetree: separate
  618 10:42:10.674167  WDT:   Not starting watchdog@f0d0
  619 10:42:10.706384  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  620 10:42:10.719045  Loading Environment from FAT... Card did not respond to voltage select! : -110
  621 10:42:10.723774  ** Bad device specification mmc 0 **
  622 10:42:10.734135  Card did not respond to voltage select! : -110
  623 10:42:10.741768  ** Bad device specification mmc 0 **
  624 10:42:10.742257  Couldn't find partition mmc 0
  625 10:42:10.750108  Card did not respond to voltage select! : -110
  626 10:42:10.755574  ** Bad device specification mmc 0 **
  627 10:42:10.756086  Couldn't find partition mmc 0
  628 10:42:10.760685  Error: could not access storage.
  629 10:42:11.103217  Net:   eth0: ethernet@ff3f0000
  630 10:42:11.103789  starting USB...
  631 10:42:11.355066  Bus usb@ff500000: Register 3000140 NbrPorts 3
  632 10:42:11.355596  Starting the controller
  633 10:42:11.361993  USB XHCI 1.10
  634 10:42:13.076586  scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  635 10:42:13.077271  bl2_stage_init 0x01
  636 10:42:13.077746  bl2_stage_init 0x81
  637 10:42:13.082193  hw id: 0x0000 - pwm id 0x01
  638 10:42:13.082693  bl2_stage_init 0xc1
  639 10:42:13.083152  bl2_stage_init 0x02
  640 10:42:13.083603  
  641 10:42:13.087757  L0:00000000
  642 10:42:13.088296  L1:20000703
  643 10:42:13.088757  L2:00008067
  644 10:42:13.089206  L3:14000000
  645 10:42:13.090701  B2:00402000
  646 10:42:13.091182  B1:e0f83180
  647 10:42:13.091636  
  648 10:42:13.092123  TE: 58124
  649 10:42:13.092576  
  650 10:42:13.101843  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  651 10:42:13.102340  
  652 10:42:13.102792  Board ID = 1
  653 10:42:13.103235  Set A53 clk to 24M
  654 10:42:13.103679  Set A73 clk to 24M
  655 10:42:13.107470  Set clk81 to 24M
  656 10:42:13.107952  A53 clk: 1200 MHz
  657 10:42:13.108443  A73 clk: 1200 MHz
  658 10:42:13.113012  CLK81: 166.6M
  659 10:42:13.113495  smccc: 00012a92
  660 10:42:13.118640  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  661 10:42:13.119121  board id: 1
  662 10:42:13.127257  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  663 10:42:13.137892  fw parse done
  664 10:42:13.143876  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  665 10:42:13.187184  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  666 10:42:13.197306  PIEI prepare done
  667 10:42:13.197823  fastboot data load
  668 10:42:13.198280  fastboot data verify
  669 10:42:13.202950  verify result: 266
  670 10:42:13.208545  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  671 10:42:13.209023  LPDDR4 probe
  672 10:42:13.209475  ddr clk to 1584MHz
  673 10:42:13.216573  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  674 10:42:13.253823  
  675 10:42:13.254349  dmc_version 0001
  676 10:42:13.260505  Check phy result
  677 10:42:13.266396  INFO : End of CA training
  678 10:42:13.266875  INFO : End of initialization
  679 10:42:13.271939  INFO : Training has run successfully!
  680 10:42:13.272456  Check phy result
  681 10:42:13.277536  INFO : End of initialization
  682 10:42:13.278018  INFO : End of read enable training
  683 10:42:13.280852  INFO : End of fine write leveling
  684 10:42:13.286363  INFO : End of Write leveling coarse delay
  685 10:42:13.291968  INFO : Training has run successfully!
  686 10:42:13.292490  Check phy result
  687 10:42:13.292946  INFO : End of initialization
  688 10:42:13.297616  INFO : End of read dq deskew training
  689 10:42:13.303158  INFO : End of MPR read delay center optimization
  690 10:42:13.303638  INFO : End of write delay center optimization
  691 10:42:13.308786  INFO : End of read delay center optimization
  692 10:42:13.314364  INFO : End of max read latency training
  693 10:42:13.314847  INFO : Training has run successfully!
  694 10:42:13.319973  1D training succeed
  695 10:42:13.325939  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  696 10:42:13.373526  Check phy result
  697 10:42:13.374021  INFO : End of initialization
  698 10:42:13.395284  INFO : End of 2D read delay Voltage center optimization
  699 10:42:13.415572  INFO : End of 2D read delay Voltage center optimization
  700 10:42:13.467564  INFO : End of 2D write delay Voltage center optimization
  701 10:42:13.517010  INFO : End of 2D write delay Voltage center optimization
  702 10:42:13.522581  INFO : Training has run successfully!
  703 10:42:13.523069  
  704 10:42:13.523526  channel==0
  705 10:42:13.528204  RxClkDly_Margin_A0==88 ps 9
  706 10:42:13.528685  TxDqDly_Margin_A0==98 ps 10
  707 10:42:13.533741  RxClkDly_Margin_A1==78 ps 8
  708 10:42:13.534273  TxDqDly_Margin_A1==98 ps 10
  709 10:42:13.534753  TrainedVREFDQ_A0==74
  710 10:42:13.539396  TrainedVREFDQ_A1==74
  711 10:42:13.539891  VrefDac_Margin_A0==25
  712 10:42:13.540398  DeviceVref_Margin_A0==40
  713 10:42:13.544877  VrefDac_Margin_A1==25
  714 10:42:13.545370  DeviceVref_Margin_A1==40
  715 10:42:13.545825  
  716 10:42:13.546276  
  717 10:42:13.550495  channel==1
  718 10:42:13.550970  RxClkDly_Margin_A0==98 ps 10
  719 10:42:13.551425  TxDqDly_Margin_A0==88 ps 9
  720 10:42:13.556163  RxClkDly_Margin_A1==88 ps 9
  721 10:42:13.556643  TxDqDly_Margin_A1==98 ps 10
  722 10:42:13.561700  TrainedVREFDQ_A0==77
  723 10:42:13.562223  TrainedVREFDQ_A1==78
  724 10:42:13.562683  VrefDac_Margin_A0==22
  725 10:42:13.567352  DeviceVref_Margin_A0==37
  726 10:42:13.567837  VrefDac_Margin_A1==24
  727 10:42:13.573018  DeviceVref_Margin_A1==36
  728 10:42:13.573496  
  729 10:42:13.573946   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  730 10:42:13.574389  
  731 10:42:13.606431  soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 0000001a 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
  732 10:42:13.606965  2D training succeed
  733 10:42:13.612052  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  734 10:42:13.617601  auto size-- 65535DDR cs0 size: 2048MB
  735 10:42:13.618091  DDR cs1 size: 2048MB
  736 10:42:13.623214  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  737 10:42:13.623697  cs0 DataBus test pass
  738 10:42:13.628825  cs1 DataBus test pass
  739 10:42:13.629306  cs0 AddrBus test pass
  740 10:42:13.629753  cs1 AddrBus test pass
  741 10:42:13.630194  
  742 10:42:13.634412  100bdlr_step_size ps== 420
  743 10:42:13.634908  result report
  744 10:42:13.640055  boot times 0Enable ddr reg access
  745 10:42:13.645361  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  746 10:42:13.658859  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  747 10:42:14.232581  0.0;M3 CHK:0;cm4_sp_mode 0
  748 10:42:14.233196  MVN_1=0x00000000
  749 10:42:14.238044  MVN_2=0x00000000
  750 10:42:14.243857  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  751 10:42:14.244491  OPS=0x10
  752 10:42:14.244942  ring efuse init
  753 10:42:14.245379  chipver efuse init
  754 10:42:14.249376  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  755 10:42:14.254964  [0.018961 Inits done]
  756 10:42:14.255436  secure task start!
  757 10:42:14.255871  high task start!
  758 10:42:14.259555  low task start!
  759 10:42:14.260061  run into bl31
  760 10:42:14.266193  NOTICE:  BL31: v1.3(release):4fc40b1
  761 10:42:14.274004  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  762 10:42:14.274479  NOTICE:  BL31: G12A normal boot!
  763 10:42:14.299360  NOTICE:  BL31: BL33 decompress pass
  764 10:42:14.305091  ERROR:   Error initializing runtime service opteed_fast
  765 10:42:15.538092  
  766 10:42:15.538740  
  767 10:42:15.546356  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  768 10:42:15.546855  
  769 10:42:15.547333  Model: Libre Computer AML-A311D-CC Alta
  770 10:42:15.754819  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  771 10:42:15.778166  DRAM:  2 GiB (effective 3.8 GiB)
  772 10:42:15.921252  Core:  408 devices, 31 uclasses, devicetree: separate
  773 10:42:15.927025  WDT:   Not starting watchdog@f0d0
  774 10:42:15.959375  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  775 10:42:15.971736  Loading Environment from FAT... Card did not respond to voltage select! : -110
  776 10:42:15.976710  ** Bad device specification mmc 0 **
  777 10:42:15.987047  Card did not respond to voltage select! : -110
  778 10:42:15.994686  ** Bad device specification mmc 0 **
  779 10:42:15.995176  Couldn't find partition mmc 0
  780 10:42:16.003047  Card did not respond to voltage select! : -110
  781 10:42:16.008582  ** Bad device specification mmc 0 **
  782 10:42:16.009068  Couldn't find partition mmc 0
  783 10:42:16.013618  Error: could not access storage.
  784 10:42:16.356090  Net:   eth0: ethernet@ff3f0000
  785 10:42:16.356688  starting USB...
  786 10:42:16.608146  Bus usb@ff500000: Register 3000140 NbrPorts 3
  787 10:42:16.608811  Starting the controller
  788 10:42:16.614985  USB XHCI 1.10
  789 10:42:18.777075  scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  790 10:42:18.777735  bl2_stage_init 0x01
  791 10:42:18.778205  bl2_stage_init 0x81
  792 10:42:18.782508  hw id: 0x0000 - pwm id 0x01
  793 10:42:18.782999  bl2_stage_init 0xc1
  794 10:42:18.783454  bl2_stage_init 0x02
  795 10:42:18.783898  
  796 10:42:18.788093  L0:00000000
  797 10:42:18.788582  L1:20000703
  798 10:42:18.789037  L2:00008067
  799 10:42:18.789484  L3:14000000
  800 10:42:18.793704  B2:00402000
  801 10:42:18.794182  B1:e0f83180
  802 10:42:18.794627  
  803 10:42:18.795075  TE: 58159
  804 10:42:18.795521  
  805 10:42:18.799235  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  806 10:42:18.799723  
  807 10:42:18.800216  Board ID = 1
  808 10:42:18.804831  Set A53 clk to 24M
  809 10:42:18.805310  Set A73 clk to 24M
  810 10:42:18.805760  Set clk81 to 24M
  811 10:42:18.810482  A53 clk: 1200 MHz
  812 10:42:18.810961  A73 clk: 1200 MHz
  813 10:42:18.811410  CLK81: 166.6M
  814 10:42:18.811852  smccc: 00012ab5
  815 10:42:18.816296  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  816 10:42:18.821759  board id: 1
  817 10:42:18.827705  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  818 10:42:18.838206  fw parse done
  819 10:42:18.844245  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  820 10:42:18.886997  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  821 10:42:18.897659  PIEI prepare done
  822 10:42:18.898191  fastboot data load
  823 10:42:18.898657  fastboot data verify
  824 10:42:18.903227  verify result: 266
  825 10:42:18.908854  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  826 10:42:18.909396  LPDDR4 probe
  827 10:42:18.909860  ddr clk to 1584MHz
  828 10:42:18.916827  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  829 10:42:18.954139  
  830 10:42:18.954665  dmc_version 0001
  831 10:42:18.960801  Check phy result
  832 10:42:18.966626  INFO : End of CA training
  833 10:42:18.967115  INFO : End of initialization
  834 10:42:18.972962  INFO : Training has run successfully!
  835 10:42:18.973449  Check phy result
  836 10:42:18.978474  INFO : End of initialization
  837 10:42:18.978950  INFO : End of read enable training
  838 10:42:18.984150  INFO : End of fine write leveling
  839 10:42:18.984632  INFO : End of Write leveling coarse delay
  840 10:42:18.989726  INFO : Training has run successfully!
  841 10:42:18.990211  Check phy result
  842 10:42:18.995214  INFO : End of initialization
  843 10:42:18.995694  INFO : End of read dq deskew training
  844 10:42:19.000852  INFO : End of MPR read delay center optimization
  845 10:42:19.006430  INFO : End of write delay center optimization
  846 10:42:19.009894  INFO : End of read delay center optimization
  847 10:42:19.015527  INFO : End of max read latency training
  848 10:42:19.016046  INFO : Training has run successfully!
  849 10:42:19.021100  1D training succeed
  850 10:42:19.026294  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  851 10:42:19.073776  Check phy result
  852 10:42:19.074307  INFO : End of initialization
  853 10:42:19.095494  INFO : End of 2D read delay Voltage center optimization
  854 10:42:19.115729  INFO : End of 2D read delay Voltage center optimization
  855 10:42:19.167744  INFO : End of 2D write delay Voltage center optimization
  856 10:42:19.217162  INFO : End of 2D write delay Voltage center optimization
  857 10:42:19.222743  INFO : Training has run successfully!
  858 10:42:19.223221  
  859 10:42:19.223671  channel==0
  860 10:42:19.228310  RxClkDly_Margin_A0==88 ps 9
  861 10:42:19.228802  TxDqDly_Margin_A0==98 ps 10
  862 10:42:19.233930  RxClkDly_Margin_A1==88 ps 9
  863 10:42:19.234402  TxDqDly_Margin_A1==88 ps 9
  864 10:42:19.234872  TrainedVREFDQ_A0==74
  865 10:42:19.239507  TrainedVREFDQ_A1==74
  866 10:42:19.240057  VrefDac_Margin_A0==25
  867 10:42:19.240514  DeviceVref_Margin_A0==40
  868 10:42:19.245105  VrefDac_Margin_A1==25
  869 10:42:19.245609  DeviceVref_Margin_A1==40
  870 10:42:19.246035  
  871 10:42:19.246459  
  872 10:42:19.246882  channel==1
  873 10:42:19.250693  RxClkDly_Margin_A0==98 ps 10
  874 10:42:19.251155  TxDqDly_Margin_A0==88 ps 9
  875 10:42:19.256301  RxClkDly_Margin_A1==98 ps 10
  876 10:42:19.256758  TxDqDly_Margin_A1==88 ps 9
  877 10:42:19.261929  TrainedVREFDQ_A0==77
  878 10:42:19.262387  TrainedVREFDQ_A1==77
  879 10:42:19.262818  VrefDac_Margin_A0==22
  880 10:42:19.267489  DeviceVref_Margin_A0==37
  881 10:42:19.267945  VrefDac_Margin_A1==22
  882 10:42:19.273086  DeviceVref_Margin_A1==37
  883 10:42:19.273543  
  884 10:42:19.273971   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  885 10:42:19.274394  
  886 10:42:19.306741  soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
  887 10:42:19.307232  2D training succeed
  888 10:42:19.312320  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  889 10:42:19.317965  auto size-- 65535DDR cs0 size: 2048MB
  890 10:42:19.318425  DDR cs1 size: 2048MB
  891 10:42:19.323514  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  892 10:42:19.323971  cs0 DataBus test pass
  893 10:42:19.329089  cs1 DataBus test pass
  894 10:42:19.329547  cs0 AddrBus test pass
  895 10:42:19.329976  cs1 AddrBus test pass
  896 10:42:19.330397  
  897 10:42:19.334689  100bdlr_step_size ps== 420
  898 10:42:19.335153  result report
  899 10:42:19.340326  boot times 0Enable ddr reg access
  900 10:42:19.345555  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  901 10:42:19.359073  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  902 10:42:19.932865  0.0;M3 CHK:0;cm4_sp_mode 0
  903 10:42:19.933486  MVN_1=0x00000000
  904 10:42:19.938216  MVN_2=0x00000000
  905 10:42:19.944078  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  906 10:42:19.944563  OPS=0x10
  907 10:42:19.945018  ring efuse init
  908 10:42:19.945462  chipver efuse init
  909 10:42:19.949544  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  910 10:42:19.955141  [0.018961 Inits done]
  911 10:42:19.955616  secure task start!
  912 10:42:19.956098  high task start!
  913 10:42:19.959822  low task start!
  914 10:42:19.960318  run into bl31
  915 10:42:19.966421  NOTICE:  BL31: v1.3(release):4fc40b1
  916 10:42:19.974228  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  917 10:42:19.974709  NOTICE:  BL31: G12A normal boot!
  918 10:42:19.999785  NOTICE:  BL31: BL33 decompress pass
  919 10:42:20.005240  ERROR:   Error initializing runtime service opteed_fast
  920 10:42:21.238200  
  921 10:42:21.238807  
  922 10:42:21.246483  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  923 10:42:21.246968  
  924 10:42:21.247426  Model: Libre Computer AML-A311D-CC Alta
  925 10:42:21.454937  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  926 10:42:21.478392  DRAM:  2 GiB (effective 3.8 GiB)
  927 10:42:21.621362  Core:  408 devices, 31 uclasses, devicetree: separate
  928 10:42:21.627167  WDT:   Not starting watchdog@f0d0
  929 10:42:21.659459  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  930 10:42:21.671887  Loading Environment from FAT... Card did not respond to voltage select! : -110
  931 10:42:21.676853  ** Bad device specification mmc 0 **
  932 10:42:21.687246  Card did not respond to voltage select! : -110
  933 10:42:21.694823  ** Bad device specification mmc 0 **
  934 10:42:21.695303  Couldn't find partition mmc 0
  935 10:42:21.703261  Card did not respond to voltage select! : -110
  936 10:42:21.708684  ** Bad device specification mmc 0 **
  937 10:42:21.709159  Couldn't find partition mmc 0
  938 10:42:21.713738  Error: could not access storage.
  939 10:42:22.056269  Net:   eth0: ethernet@ff3f0000
  940 10:42:22.056799  starting USB...
  941 10:42:22.308088  Bus usb@ff500000: Register 3000140 NbrPorts 3
  942 10:42:22.308601  Starting the controller
  943 10:42:22.314999  USB XHCI 1.10
  944 10:42:23.869185  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  945 10:42:23.877407         scanning usb for storage devices... 0 Storage Device(s) found
  947 10:42:23.929002  Hit any key to stop autoboot:  1 
  948 10:42:23.929881  end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
  949 10:42:23.930518  start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
  950 10:42:23.931049  Setting prompt string to ['=>']
  951 10:42:23.931587  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
  952 10:42:23.944829   0 
  953 10:42:23.945753  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  954 10:42:23.946305  Sending with 10 millisecond of delay
  956 10:42:25.081080  => setenv autoload no
  957 10:42:25.091916  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
  958 10:42:25.097400  setenv autoload no
  959 10:42:25.098177  Sending with 10 millisecond of delay
  961 10:42:26.894933  => setenv initrd_high 0xffffffff
  962 10:42:26.905776  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
  963 10:42:26.906690  setenv initrd_high 0xffffffff
  964 10:42:26.907458  Sending with 10 millisecond of delay
  966 10:42:28.523915  => setenv fdt_high 0xffffffff
  967 10:42:28.534792  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
  968 10:42:28.535653  setenv fdt_high 0xffffffff
  969 10:42:28.536461  Sending with 10 millisecond of delay
  971 10:42:28.828329  => dhcp
  972 10:42:28.839018  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
  973 10:42:28.839855  dhcp
  974 10:42:28.840386  Speed: 1000, full duplex
  975 10:42:28.840842  BOOTP broadcast 1
  976 10:42:28.853718  DHCP client bound to address 192.168.6.27 (14 ms)
  977 10:42:28.854456  Sending with 10 millisecond of delay
  979 10:42:30.531090  => setenv serverip 192.168.6.2
  980 10:42:30.541916  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
  981 10:42:30.542873  setenv serverip 192.168.6.2
  982 10:42:30.543615  Sending with 10 millisecond of delay
  984 10:42:34.267087  => tftpboot 0x01080000 917041/tftp-deploy-xk0o0up0/kernel/uImage
  985 10:42:34.277936  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
  986 10:42:34.278820  tftpboot 0x01080000 917041/tftp-deploy-xk0o0up0/kernel/uImage
  987 10:42:34.279336  Speed: 1000, full duplex
  988 10:42:34.279797  Using ethernet@ff3f0000 device
  989 10:42:34.280915  TFTP from server 192.168.6.2; our IP address is 192.168.6.27
  990 10:42:34.286689  Filename '917041/tftp-deploy-xk0o0up0/kernel/uImage'.
  991 10:42:34.290121  Load address: 0x1080000
  992 10:42:36.591115  Loading: *##################################################  36.2 MiB
  993 10:42:36.591767  	 15.7 MiB/s
  994 10:42:36.592300  done
  995 10:42:36.594804  Bytes transferred = 38009408 (243fa40 hex)
  996 10:42:36.595610  Sending with 10 millisecond of delay
  998 10:42:41.283232  => tftpboot 0x08000000 917041/tftp-deploy-xk0o0up0/ramdisk/ramdisk.cpio.gz.uboot
  999 10:42:41.294076  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
 1000 10:42:41.294941  tftpboot 0x08000000 917041/tftp-deploy-xk0o0up0/ramdisk/ramdisk.cpio.gz.uboot
 1001 10:42:41.295430  Speed: 1000, full duplex
 1002 10:42:41.295886  Using ethernet@ff3f0000 device
 1003 10:42:41.297137  TFTP from server 192.168.6.2; our IP address is 192.168.6.27
 1004 10:42:41.308763  Filename '917041/tftp-deploy-xk0o0up0/ramdisk/ramdisk.cpio.gz.uboot'.
 1005 10:42:41.309274  Load address: 0x8000000
 1006 10:42:48.564984  Loading: *####T ############################################# UDP wrong checksum 00000005 000086c1
 1007 10:42:53.563971  T  UDP wrong checksum 00000005 000086c1
 1008 10:43:03.567222  T T  UDP wrong checksum 00000005 000086c1
 1009 10:43:23.569127  T T T  UDP wrong checksum 00000005 000086c1
 1010 10:43:38.575007  T T T 
 1011 10:43:38.575685  Retry count exceeded; starting again
 1013 10:43:38.577285  end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
 1016 10:43:38.579334  end: 2.4 uboot-commands (duration 00:01:47) [common]
 1018 10:43:38.580908  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
 1020 10:43:38.582035  end: 2 uboot-action (duration 00:01:47) [common]
 1022 10:43:38.583678  Cleaning after the job
 1023 10:43:38.584303  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/ramdisk
 1024 10:43:38.585729  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/kernel
 1025 10:43:38.627834  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/dtb
 1026 10:43:38.629228  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/nfsrootfs
 1027 10:43:38.903520  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/917041/tftp-deploy-xk0o0up0/modules
 1028 10:43:38.922936  start: 4.1 power-off (timeout 00:00:30) [common]
 1029 10:43:38.923570  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
 1030 10:43:38.954505  >> OK - accepted request

 1031 10:43:38.956501  Returned 0 in 0 seconds
 1032 10:43:39.057256  end: 4.1 power-off (duration 00:00:00) [common]
 1034 10:43:39.058212  start: 4.2 read-feedback (timeout 00:10:00) [common]
 1035 10:43:39.058852  Listened to connection for namespace 'common' for up to 1s
 1036 10:43:40.059079  Finalising connection for namespace 'common'
 1037 10:43:40.059893  Disconnecting from shell: Finalise
 1038 10:43:40.060497  => 
 1039 10:43:40.161573  end: 4.2 read-feedback (duration 00:00:01) [common]
 1040 10:43:40.162303  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/917041
 1041 10:43:42.701769  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/917041
 1042 10:43:42.702390  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.