Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:29:01.383806 lava-dispatcher, installed at version: 2024.01
2 09:29:01.384702 start: 0 validate
3 09:29:01.385254 Start time: 2024-11-01 09:29:01.385219+00:00 (UTC)
4 09:29:01.385906 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:29:01.386496 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:29:01.429878 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:29:01.430467 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fkernel%2FImage exists
8 09:29:01.472510 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:29:01.473162 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:29:01.505953 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:29:01.506451 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:29:01.544639 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:29:01.545236 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fmodules.tar.xz exists
14 09:29:01.585121 validate duration: 0.20
16 09:29:01.586085 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:29:01.586433 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:29:01.586834 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:29:01.589178 Not decompressing ramdisk as can be used compressed.
20 09:29:01.590189 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 09:29:01.590610 saving as /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/ramdisk/initrd.cpio.gz
22 09:29:01.590982 total size: 5628182 (5 MB)
23 09:29:01.631882 progress 0 % (0 MB)
24 09:29:01.639904 progress 5 % (0 MB)
25 09:29:01.646817 progress 10 % (0 MB)
26 09:29:01.653231 progress 15 % (0 MB)
27 09:29:01.662108 progress 20 % (1 MB)
28 09:29:01.666719 progress 25 % (1 MB)
29 09:29:01.675372 progress 30 % (1 MB)
30 09:29:01.684142 progress 35 % (1 MB)
31 09:29:01.690775 progress 40 % (2 MB)
32 09:29:01.695951 progress 45 % (2 MB)
33 09:29:01.699964 progress 50 % (2 MB)
34 09:29:01.704322 progress 55 % (2 MB)
35 09:29:01.708734 progress 60 % (3 MB)
36 09:29:01.712685 progress 65 % (3 MB)
37 09:29:01.717106 progress 70 % (3 MB)
38 09:29:01.721133 progress 75 % (4 MB)
39 09:29:01.725636 progress 80 % (4 MB)
40 09:29:01.729778 progress 85 % (4 MB)
41 09:29:01.734184 progress 90 % (4 MB)
42 09:29:01.738493 progress 95 % (5 MB)
43 09:29:01.742579 progress 100 % (5 MB)
44 09:29:01.743358 5 MB downloaded in 0.15 s (35.23 MB/s)
45 09:29:01.743999 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:29:01.745076 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:29:01.745419 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:29:01.745713 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:29:01.755963 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/kernel/Image
51 09:29:01.756442 saving as /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/kernel/Image
52 09:29:01.756693 total size: 39686656 (37 MB)
53 09:29:01.756928 No compression specified
54 09:29:01.815710 progress 0 % (0 MB)
55 09:29:01.841480 progress 5 % (1 MB)
56 09:29:01.867828 progress 10 % (3 MB)
57 09:29:01.893016 progress 15 % (5 MB)
58 09:29:01.918435 progress 20 % (7 MB)
59 09:29:01.943461 progress 25 % (9 MB)
60 09:29:01.968682 progress 30 % (11 MB)
61 09:29:01.994822 progress 35 % (13 MB)
62 09:29:02.020163 progress 40 % (15 MB)
63 09:29:02.045986 progress 45 % (17 MB)
64 09:29:02.071264 progress 50 % (18 MB)
65 09:29:02.097207 progress 55 % (20 MB)
66 09:29:02.123362 progress 60 % (22 MB)
67 09:29:02.154108 progress 65 % (24 MB)
68 09:29:02.184196 progress 70 % (26 MB)
69 09:29:02.212672 progress 75 % (28 MB)
70 09:29:02.239323 progress 80 % (30 MB)
71 09:29:02.266170 progress 85 % (32 MB)
72 09:29:02.292424 progress 90 % (34 MB)
73 09:29:02.318905 progress 95 % (35 MB)
74 09:29:02.344658 progress 100 % (37 MB)
75 09:29:02.345232 37 MB downloaded in 0.59 s (64.31 MB/s)
76 09:29:02.345711 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:29:02.346525 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:29:02.346801 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:29:02.347063 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:29:02.347837 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 09:29:02.348158 saving as /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/dtb/meson-g12b-a311d-libretech-cc.dtb
83 09:29:02.348383 total size: 54703 (0 MB)
84 09:29:02.348606 No compression specified
85 09:29:02.393420 progress 59 % (0 MB)
86 09:29:02.394268 progress 100 % (0 MB)
87 09:29:02.394828 0 MB downloaded in 0.05 s (1.12 MB/s)
88 09:29:02.395285 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:29:02.396146 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:29:02.396440 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:29:02.396709 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:29:02.397313 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 09:29:02.397581 saving as /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/nfsrootfs/full.rootfs.tar
95 09:29:02.397792 total size: 107552908 (102 MB)
96 09:29:02.398012 Using unxz to decompress xz
97 09:29:02.441996 progress 0 % (0 MB)
98 09:29:03.147947 progress 5 % (5 MB)
99 09:29:03.879878 progress 10 % (10 MB)
100 09:29:04.605226 progress 15 % (15 MB)
101 09:29:05.366618 progress 20 % (20 MB)
102 09:29:05.945849 progress 25 % (25 MB)
103 09:29:06.572731 progress 30 % (30 MB)
104 09:29:07.323571 progress 35 % (35 MB)
105 09:29:07.671820 progress 40 % (41 MB)
106 09:29:08.101821 progress 45 % (46 MB)
107 09:29:08.801491 progress 50 % (51 MB)
108 09:29:09.531614 progress 55 % (56 MB)
109 09:29:10.311565 progress 60 % (61 MB)
110 09:29:11.073051 progress 65 % (66 MB)
111 09:29:11.818435 progress 70 % (71 MB)
112 09:29:12.589337 progress 75 % (76 MB)
113 09:29:13.269131 progress 80 % (82 MB)
114 09:29:14.030569 progress 85 % (87 MB)
115 09:29:14.783624 progress 90 % (92 MB)
116 09:29:15.530943 progress 95 % (97 MB)
117 09:29:16.284570 progress 100 % (102 MB)
118 09:29:16.297335 102 MB downloaded in 13.90 s (7.38 MB/s)
119 09:29:16.297957 end: 1.4.1 http-download (duration 00:00:14) [common]
121 09:29:16.298796 end: 1.4 download-retry (duration 00:00:14) [common]
122 09:29:16.299063 start: 1.5 download-retry (timeout 00:09:45) [common]
123 09:29:16.299324 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 09:29:16.299804 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/modules.tar.xz
125 09:29:16.300175 saving as /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/modules/modules.tar
126 09:29:16.300588 total size: 11735240 (11 MB)
127 09:29:16.301001 Using unxz to decompress xz
128 09:29:16.349510 progress 0 % (0 MB)
129 09:29:16.418494 progress 5 % (0 MB)
130 09:29:16.495798 progress 10 % (1 MB)
131 09:29:16.578154 progress 15 % (1 MB)
132 09:29:16.660043 progress 20 % (2 MB)
133 09:29:16.739320 progress 25 % (2 MB)
134 09:29:16.821472 progress 30 % (3 MB)
135 09:29:16.899152 progress 35 % (3 MB)
136 09:29:16.981401 progress 40 % (4 MB)
137 09:29:17.067886 progress 45 % (5 MB)
138 09:29:17.150824 progress 50 % (5 MB)
139 09:29:17.231126 progress 55 % (6 MB)
140 09:29:17.313474 progress 60 % (6 MB)
141 09:29:17.398303 progress 65 % (7 MB)
142 09:29:17.479775 progress 70 % (7 MB)
143 09:29:17.565047 progress 75 % (8 MB)
144 09:29:17.648482 progress 80 % (8 MB)
145 09:29:17.729938 progress 85 % (9 MB)
146 09:29:17.806399 progress 90 % (10 MB)
147 09:29:17.906509 progress 95 % (10 MB)
148 09:29:18.001508 progress 100 % (11 MB)
149 09:29:18.012529 11 MB downloaded in 1.71 s (6.54 MB/s)
150 09:29:18.013138 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:29:18.013965 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:29:18.014237 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 09:29:18.014506 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 09:29:27.707934 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/922089/extract-nfsrootfs-c86kj1gi
156 09:29:27.708547 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 09:29:27.708838 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 09:29:27.709437 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz
159 09:29:27.709876 makedir: /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin
160 09:29:27.710209 makedir: /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/tests
161 09:29:27.710533 makedir: /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/results
162 09:29:27.710858 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-add-keys
163 09:29:27.711386 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-add-sources
164 09:29:27.711897 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-background-process-start
165 09:29:27.712449 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-background-process-stop
166 09:29:27.712984 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-common-functions
167 09:29:27.713491 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-echo-ipv4
168 09:29:27.713984 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-install-packages
169 09:29:27.714538 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-installed-packages
170 09:29:27.715034 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-os-build
171 09:29:27.715537 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-probe-channel
172 09:29:27.716100 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-probe-ip
173 09:29:27.716643 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-target-ip
174 09:29:27.717150 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-target-mac
175 09:29:27.717642 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-target-storage
176 09:29:27.718172 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-test-case
177 09:29:27.718675 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-test-event
178 09:29:27.719163 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-test-feedback
179 09:29:27.719649 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-test-raise
180 09:29:27.720176 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-test-reference
181 09:29:27.720698 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-test-runner
182 09:29:27.721199 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-test-set
183 09:29:27.721698 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-test-shell
184 09:29:27.722203 Updating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-install-packages (oe)
185 09:29:27.722758 Updating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/bin/lava-installed-packages (oe)
186 09:29:27.723217 Creating /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/environment
187 09:29:27.723602 LAVA metadata
188 09:29:27.723867 - LAVA_JOB_ID=922089
189 09:29:27.724120 - LAVA_DISPATCHER_IP=192.168.6.2
190 09:29:27.724505 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 09:29:27.725525 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 09:29:27.725858 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 09:29:27.726074 skipped lava-vland-overlay
194 09:29:27.726320 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 09:29:27.726580 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 09:29:27.726806 skipped lava-multinode-overlay
197 09:29:27.727050 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 09:29:27.727305 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 09:29:27.727560 Loading test definitions
200 09:29:27.727843 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 09:29:27.728106 Using /lava-922089 at stage 0
202 09:29:27.729401 uuid=922089_1.6.2.4.1 testdef=None
203 09:29:27.729720 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 09:29:27.729989 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 09:29:27.731826 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 09:29:27.732640 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 09:29:27.734931 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 09:29:27.735765 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 09:29:27.738045 runner path: /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/0/tests/0_dmesg test_uuid 922089_1.6.2.4.1
212 09:29:27.738630 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 09:29:27.739397 Creating lava-test-runner.conf files
215 09:29:27.739602 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/922089/lava-overlay-q6c12_uz/lava-922089/0 for stage 0
216 09:29:27.739952 - 0_dmesg
217 09:29:27.740356 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 09:29:27.740638 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 09:29:27.762740 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 09:29:27.763169 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 09:29:27.763437 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 09:29:27.763706 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 09:29:27.763971 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 09:29:28.384314 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 09:29:28.384779 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 09:29:28.385024 extracting modules file /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/922089/extract-nfsrootfs-c86kj1gi
227 09:29:29.776164 extracting modules file /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/922089/extract-overlay-ramdisk-md6k2vj9/ramdisk
228 09:29:31.195457 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 09:29:31.195932 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 09:29:31.196243 [common] Applying overlay to NFS
231 09:29:31.196456 [common] Applying overlay /var/lib/lava/dispatcher/tmp/922089/compress-overlay-r6t16f4s/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/922089/extract-nfsrootfs-c86kj1gi
232 09:29:31.226020 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 09:29:31.226427 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 09:29:31.226699 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 09:29:31.226928 Converting downloaded kernel to a uImage
236 09:29:31.227234 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/kernel/Image /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/kernel/uImage
237 09:29:31.675598 output: Image Name:
238 09:29:31.676054 output: Created: Fri Nov 1 09:29:31 2024
239 09:29:31.676272 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 09:29:31.676479 output: Data Size: 39686656 Bytes = 38756.50 KiB = 37.85 MiB
241 09:29:31.676681 output: Load Address: 01080000
242 09:29:31.676881 output: Entry Point: 01080000
243 09:29:31.677078 output:
244 09:29:31.677418 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 09:29:31.677690 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 09:29:31.677958 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 09:29:31.678211 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 09:29:31.678466 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 09:29:31.678723 Building ramdisk /var/lib/lava/dispatcher/tmp/922089/extract-overlay-ramdisk-md6k2vj9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/922089/extract-overlay-ramdisk-md6k2vj9/ramdisk
250 09:29:34.148209 >> 173869 blocks
251 09:29:41.796297 Adding RAMdisk u-boot header.
252 09:29:41.796745 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/922089/extract-overlay-ramdisk-md6k2vj9/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/922089/extract-overlay-ramdisk-md6k2vj9/ramdisk.cpio.gz.uboot
253 09:29:42.045508 output: Image Name:
254 09:29:42.045929 output: Created: Fri Nov 1 09:29:41 2024
255 09:29:42.046145 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 09:29:42.046352 output: Data Size: 24148227 Bytes = 23582.25 KiB = 23.03 MiB
257 09:29:42.046551 output: Load Address: 00000000
258 09:29:42.046748 output: Entry Point: 00000000
259 09:29:42.046943 output:
260 09:29:42.047502 rename /var/lib/lava/dispatcher/tmp/922089/extract-overlay-ramdisk-md6k2vj9/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/ramdisk/ramdisk.cpio.gz.uboot
261 09:29:42.047919 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 09:29:42.048562 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 09:29:42.049174 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 09:29:42.049682 No LXC device requested
265 09:29:42.050242 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 09:29:42.050805 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 09:29:42.051382 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 09:29:42.051845 Checking files for TFTP limit of 4294967296 bytes.
269 09:29:42.054813 end: 1 tftp-deploy (duration 00:00:40) [common]
270 09:29:42.055458 start: 2 uboot-action (timeout 00:05:00) [common]
271 09:29:42.056092 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 09:29:42.056658 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 09:29:42.057229 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 09:29:42.057893 Using kernel file from prepare-kernel: 922089/tftp-deploy-kx0dj3p5/kernel/uImage
275 09:29:42.058614 substitutions:
276 09:29:42.059066 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 09:29:42.059515 - {DTB_ADDR}: 0x01070000
278 09:29:42.059955 - {DTB}: 922089/tftp-deploy-kx0dj3p5/dtb/meson-g12b-a311d-libretech-cc.dtb
279 09:29:42.060457 - {INITRD}: 922089/tftp-deploy-kx0dj3p5/ramdisk/ramdisk.cpio.gz.uboot
280 09:29:42.060899 - {KERNEL_ADDR}: 0x01080000
281 09:29:42.061335 - {KERNEL}: 922089/tftp-deploy-kx0dj3p5/kernel/uImage
282 09:29:42.061772 - {LAVA_MAC}: None
283 09:29:42.062252 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/922089/extract-nfsrootfs-c86kj1gi
284 09:29:42.062693 - {NFS_SERVER_IP}: 192.168.6.2
285 09:29:42.063125 - {PRESEED_CONFIG}: None
286 09:29:42.063555 - {PRESEED_LOCAL}: None
287 09:29:42.064006 - {RAMDISK_ADDR}: 0x08000000
288 09:29:42.064441 - {RAMDISK}: 922089/tftp-deploy-kx0dj3p5/ramdisk/ramdisk.cpio.gz.uboot
289 09:29:42.064872 - {ROOT_PART}: None
290 09:29:42.065301 - {ROOT}: None
291 09:29:42.065730 - {SERVER_IP}: 192.168.6.2
292 09:29:42.066160 - {TEE_ADDR}: 0x83000000
293 09:29:42.066588 - {TEE}: None
294 09:29:42.067018 Parsed boot commands:
295 09:29:42.067438 - setenv autoload no
296 09:29:42.067867 - setenv initrd_high 0xffffffff
297 09:29:42.068329 - setenv fdt_high 0xffffffff
298 09:29:42.068757 - dhcp
299 09:29:42.069182 - setenv serverip 192.168.6.2
300 09:29:42.069605 - tftpboot 0x01080000 922089/tftp-deploy-kx0dj3p5/kernel/uImage
301 09:29:42.070032 - tftpboot 0x08000000 922089/tftp-deploy-kx0dj3p5/ramdisk/ramdisk.cpio.gz.uboot
302 09:29:42.070460 - tftpboot 0x01070000 922089/tftp-deploy-kx0dj3p5/dtb/meson-g12b-a311d-libretech-cc.dtb
303 09:29:42.070888 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/922089/extract-nfsrootfs-c86kj1gi,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 09:29:42.071325 - bootm 0x01080000 0x08000000 0x01070000
305 09:29:42.071895 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 09:29:42.073585 start: 2.3 connect-device (timeout 00:05:00) [common]
308 09:29:42.074049 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 09:29:42.090938 Setting prompt string to ['lava-test: # ']
310 09:29:42.092627 end: 2.3 connect-device (duration 00:00:00) [common]
311 09:29:42.093280 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 09:29:42.093879 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 09:29:42.094440 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 09:29:42.095656 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 09:29:42.133008 >> OK - accepted request
316 09:29:42.135316 Returned 0 in 0 seconds
317 09:29:42.236590 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 09:29:42.238400 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 09:29:42.239019 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 09:29:42.239566 Setting prompt string to ['Hit any key to stop autoboot']
322 09:29:42.240156 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 09:29:42.241880 Trying 192.168.56.21...
324 09:29:42.242409 Connected to conserv1.
325 09:29:42.242868 Escape character is '^]'.
326 09:29:42.243340
327 09:29:42.243815 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 09:29:42.244330
329 09:29:53.975567 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 09:29:53.976268 bl2_stage_init 0x01
331 09:29:53.976747 bl2_stage_init 0x81
332 09:29:53.981116 hw id: 0x0000 - pwm id 0x01
333 09:29:53.981670 bl2_stage_init 0xc1
334 09:29:53.982112 bl2_stage_init 0x02
335 09:29:53.982545
336 09:29:53.986643 L0:00000000
337 09:29:53.987111 L1:20000703
338 09:29:53.987544 L2:00008067
339 09:29:53.987970 L3:14000000
340 09:29:53.992297 B2:00402000
341 09:29:53.992762 B1:e0f83180
342 09:29:53.993207
343 09:29:53.993638 TE: 58124
344 09:29:53.994069
345 09:29:53.997856 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 09:29:53.998324
347 09:29:53.998756 Board ID = 1
348 09:29:54.003448 Set A53 clk to 24M
349 09:29:54.003908 Set A73 clk to 24M
350 09:29:54.004370 Set clk81 to 24M
351 09:29:54.008990 A53 clk: 1200 MHz
352 09:29:54.009440 A73 clk: 1200 MHz
353 09:29:54.009869 CLK81: 166.6M
354 09:29:54.010294 smccc: 00012a92
355 09:29:54.014625 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 09:29:54.020279 board id: 1
357 09:29:54.026113 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 09:29:54.036592 fw parse done
359 09:29:54.042566 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 09:29:54.085192 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 09:29:54.096071 PIEI prepare done
362 09:29:54.096523 fastboot data load
363 09:29:54.096959 fastboot data verify
364 09:29:54.101777 verify result: 266
365 09:29:54.107320 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 09:29:54.107782 LPDDR4 probe
367 09:29:54.108278 ddr clk to 1584MHz
368 09:29:54.115328 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 09:29:54.152720
370 09:29:54.153261 dmc_version 0001
371 09:29:54.159353 Check phy result
372 09:29:54.165159 INFO : End of CA training
373 09:29:54.165621 INFO : End of initialization
374 09:29:54.170787 INFO : Training has run successfully!
375 09:29:54.171251 Check phy result
376 09:29:54.176406 INFO : End of initialization
377 09:29:54.176877 INFO : End of read enable training
378 09:29:54.181967 INFO : End of fine write leveling
379 09:29:54.187615 INFO : End of Write leveling coarse delay
380 09:29:54.188107 INFO : Training has run successfully!
381 09:29:54.188556 Check phy result
382 09:29:54.193222 INFO : End of initialization
383 09:29:54.193706 INFO : End of read dq deskew training
384 09:29:54.198784 INFO : End of MPR read delay center optimization
385 09:29:54.204413 INFO : End of write delay center optimization
386 09:29:54.209996 INFO : End of read delay center optimization
387 09:29:54.210460 INFO : End of max read latency training
388 09:29:54.215520 INFO : Training has run successfully!
389 09:29:54.216034 1D training succeed
390 09:29:54.224806 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 09:29:54.272308 Check phy result
392 09:29:54.272813 INFO : End of initialization
393 09:29:54.294808 INFO : End of 2D read delay Voltage center optimization
394 09:29:54.314890 INFO : End of 2D read delay Voltage center optimization
395 09:29:54.366879 INFO : End of 2D write delay Voltage center optimization
396 09:29:54.416205 INFO : End of 2D write delay Voltage center optimization
397 09:29:54.421708 INFO : Training has run successfully!
398 09:29:54.422219
399 09:29:54.422670 channel==0
400 09:29:54.427283 RxClkDly_Margin_A0==88 ps 9
401 09:29:54.427769 TxDqDly_Margin_A0==98 ps 10
402 09:29:54.432882 RxClkDly_Margin_A1==88 ps 9
403 09:29:54.433349 TxDqDly_Margin_A1==98 ps 10
404 09:29:54.433800 TrainedVREFDQ_A0==74
405 09:29:54.438402 TrainedVREFDQ_A1==75
406 09:29:54.438870 VrefDac_Margin_A0==25
407 09:29:54.439313 DeviceVref_Margin_A0==40
408 09:29:54.444086 VrefDac_Margin_A1==25
409 09:29:54.444555 DeviceVref_Margin_A1==39
410 09:29:54.444998
411 09:29:54.445439
412 09:29:54.449686 channel==1
413 09:29:54.450152 RxClkDly_Margin_A0==98 ps 10
414 09:29:54.450596 TxDqDly_Margin_A0==88 ps 9
415 09:29:54.455276 RxClkDly_Margin_A1==88 ps 9
416 09:29:54.455741 TxDqDly_Margin_A1==88 ps 9
417 09:29:54.460885 TrainedVREFDQ_A0==76
418 09:29:54.461353 TrainedVREFDQ_A1==77
419 09:29:54.461799 VrefDac_Margin_A0==22
420 09:29:54.466397 DeviceVref_Margin_A0==38
421 09:29:54.466858 VrefDac_Margin_A1==24
422 09:29:54.472000 DeviceVref_Margin_A1==37
423 09:29:54.472465
424 09:29:54.472910 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 09:29:54.473346
426 09:29:54.505598 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 09:29:54.506160 2D training succeed
428 09:29:54.511186 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 09:29:54.516805 auto size-- 65535DDR cs0 size: 2048MB
430 09:29:54.517272 DDR cs1 size: 2048MB
431 09:29:54.522460 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 09:29:54.523018 cs0 DataBus test pass
433 09:29:54.528073 cs1 DataBus test pass
434 09:29:54.528595 cs0 AddrBus test pass
435 09:29:54.529053 cs1 AddrBus test pass
436 09:29:54.529498
437 09:29:54.533623 100bdlr_step_size ps== 420
438 09:29:54.534103 result report
439 09:29:54.539180 boot times 0Enable ddr reg access
440 09:29:54.544514 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 09:29:54.557936 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 09:29:55.130117 0.0;M3 CHK:0;cm4_sp_mode 0
443 09:29:55.130758 MVN_1=0x00000000
444 09:29:55.135504 MVN_2=0x00000000
445 09:29:55.141241 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 09:29:55.141715 OPS=0x10
447 09:29:55.142181 ring efuse init
448 09:29:55.142621 chipver efuse init
449 09:29:55.149548 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 09:29:55.150031 [0.018961 Inits done]
451 09:29:55.150474 secure task start!
452 09:29:55.157114 high task start!
453 09:29:55.157576 low task start!
454 09:29:55.158017 run into bl31
455 09:29:55.163632 NOTICE: BL31: v1.3(release):4fc40b1
456 09:29:55.171510 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 09:29:55.172011 NOTICE: BL31: G12A normal boot!
458 09:29:55.196813 NOTICE: BL31: BL33 decompress pass
459 09:29:55.202703 ERROR: Error initializing runtime service opteed_fast
460 09:29:56.435593
461 09:29:56.436319
462 09:29:56.443844 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 09:29:56.444379
464 09:29:56.444830 Model: Libre Computer AML-A311D-CC Alta
465 09:29:56.652325 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 09:29:56.675620 DRAM: 2 GiB (effective 3.8 GiB)
467 09:29:56.818658 Core: 408 devices, 31 uclasses, devicetree: separate
468 09:29:56.824562 WDT: Not starting watchdog@f0d0
469 09:29:56.856723 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 09:29:56.869261 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 09:29:56.876515 ** Bad device specification mmc 0 **
472 09:29:56.884452 Card did not respond to voltage select! : -110
473 09:29:56.892199 ** Bad device specification mmc 0 **
474 09:29:56.892668 Couldn't find partition mmc 0
475 09:29:56.900432 Card did not respond to voltage select! : -110
476 09:29:56.905959 ** Bad device specification mmc 0 **
477 09:29:56.906425 Couldn't find partition mmc 0
478 09:29:56.911042 Error: could not access storage.
479 09:29:58.176203 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 09:29:58.176822 bl2_stage_init 0x01
481 09:29:58.177289 bl2_stage_init 0x81
482 09:29:58.181736 hw id: 0x0000 - pwm id 0x01
483 09:29:58.182226 bl2_stage_init 0xc1
484 09:29:58.182672 bl2_stage_init 0x02
485 09:29:58.183112
486 09:29:58.187338 L0:00000000
487 09:29:58.187802 L1:20000703
488 09:29:58.188305 L2:00008067
489 09:29:58.188751 L3:14000000
490 09:29:58.192929 B2:00402000
491 09:29:58.193405 B1:e0f83180
492 09:29:58.193845
493 09:29:58.194283 TE: 58167
494 09:29:58.194719
495 09:29:58.198488 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 09:29:58.198965
497 09:29:58.199414 Board ID = 1
498 09:29:58.204085 Set A53 clk to 24M
499 09:29:58.204556 Set A73 clk to 24M
500 09:29:58.205002 Set clk81 to 24M
501 09:29:58.209688 A53 clk: 1200 MHz
502 09:29:58.210154 A73 clk: 1200 MHz
503 09:29:58.210600 CLK81: 166.6M
504 09:29:58.211040 smccc: 00012abd
505 09:29:58.215313 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 09:29:58.220878 board id: 1
507 09:29:58.226793 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 09:29:58.237335 fw parse done
509 09:29:58.243481 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 09:29:58.286063 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 09:29:58.296847 PIEI prepare done
512 09:29:58.297315 fastboot data load
513 09:29:58.297763 fastboot data verify
514 09:29:58.302434 verify result: 266
515 09:29:58.308109 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 09:29:58.308573 LPDDR4 probe
517 09:29:58.309017 ddr clk to 1584MHz
518 09:29:58.316092 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 09:29:58.353312
520 09:29:58.353830 dmc_version 0001
521 09:29:58.359949 Check phy result
522 09:29:58.365856 INFO : End of CA training
523 09:29:58.366324 INFO : End of initialization
524 09:29:58.371420 INFO : Training has run successfully!
525 09:29:58.371884 Check phy result
526 09:29:58.377053 INFO : End of initialization
527 09:29:58.377516 INFO : End of read enable training
528 09:29:58.382693 INFO : End of fine write leveling
529 09:29:58.388313 INFO : End of Write leveling coarse delay
530 09:29:58.388775 INFO : Training has run successfully!
531 09:29:58.389219 Check phy result
532 09:29:58.393868 INFO : End of initialization
533 09:29:58.394328 INFO : End of read dq deskew training
534 09:29:58.399451 INFO : End of MPR read delay center optimization
535 09:29:58.405055 INFO : End of write delay center optimization
536 09:29:58.410711 INFO : End of read delay center optimization
537 09:29:58.411200 INFO : End of max read latency training
538 09:29:58.416304 INFO : Training has run successfully!
539 09:29:58.416770 1D training succeed
540 09:29:58.425494 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 09:29:58.473108 Check phy result
542 09:29:58.473618 INFO : End of initialization
543 09:29:58.494817 INFO : End of 2D read delay Voltage center optimization
544 09:29:58.515041 INFO : End of 2D read delay Voltage center optimization
545 09:29:58.567246 INFO : End of 2D write delay Voltage center optimization
546 09:29:58.616636 INFO : End of 2D write delay Voltage center optimization
547 09:29:58.622024 INFO : Training has run successfully!
548 09:29:58.622497
549 09:29:58.622958 channel==0
550 09:29:58.627633 RxClkDly_Margin_A0==88 ps 9
551 09:29:58.628137 TxDqDly_Margin_A0==98 ps 10
552 09:29:58.630978 RxClkDly_Margin_A1==88 ps 9
553 09:29:58.631439 TxDqDly_Margin_A1==98 ps 10
554 09:29:58.636503 TrainedVREFDQ_A0==74
555 09:29:58.636969 TrainedVREFDQ_A1==75
556 09:29:58.642207 VrefDac_Margin_A0==25
557 09:29:58.642725 DeviceVref_Margin_A0==40
558 09:29:58.643185 VrefDac_Margin_A1==23
559 09:29:58.647721 DeviceVref_Margin_A1==39
560 09:29:58.648224
561 09:29:58.648670
562 09:29:58.649108 channel==1
563 09:29:58.649542 RxClkDly_Margin_A0==98 ps 10
564 09:29:58.651204 TxDqDly_Margin_A0==98 ps 10
565 09:29:58.656567 RxClkDly_Margin_A1==88 ps 9
566 09:29:58.657033 TxDqDly_Margin_A1==98 ps 10
567 09:29:58.662213 TrainedVREFDQ_A0==77
568 09:29:58.662681 TrainedVREFDQ_A1==78
569 09:29:58.663128 VrefDac_Margin_A0==22
570 09:29:58.667876 DeviceVref_Margin_A0==37
571 09:29:58.668376 VrefDac_Margin_A1==24
572 09:29:58.668823 DeviceVref_Margin_A1==36
573 09:29:58.669262
574 09:29:58.677007 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 09:29:58.677471
576 09:29:58.704953 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 0000005f
577 09:29:58.705475 2D training succeed
578 09:29:58.716051 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 09:29:58.716532 auto size-- 65535DDR cs0 size: 2048MB
580 09:29:58.716982 DDR cs1 size: 2048MB
581 09:29:58.721610 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 09:29:58.722092 cs0 DataBus test pass
583 09:29:58.727204 cs1 DataBus test pass
584 09:29:58.727684 cs0 AddrBus test pass
585 09:29:58.732840 cs1 AddrBus test pass
586 09:29:58.733310
587 09:29:58.733752 100bdlr_step_size ps== 420
588 09:29:58.734207 result report
589 09:29:58.738426 boot times 0Enable ddr reg access
590 09:29:58.745000 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 09:29:58.758474 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 09:29:59.331563 0.0;M3 CHK:0;cm4_sp_mode 0
593 09:29:59.332240 MVN_1=0x00000000
594 09:29:59.337046 MVN_2=0x00000000
595 09:29:59.342846 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 09:29:59.343365 OPS=0x10
597 09:29:59.343822 ring efuse init
598 09:29:59.344354 chipver efuse init
599 09:29:59.348426 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 09:29:59.354013 [0.018961 Inits done]
601 09:29:59.354485 secure task start!
602 09:29:59.354917 high task start!
603 09:29:59.358587 low task start!
604 09:29:59.359041 run into bl31
605 09:29:59.365193 NOTICE: BL31: v1.3(release):4fc40b1
606 09:29:59.373005 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 09:29:59.373464 NOTICE: BL31: G12A normal boot!
608 09:29:59.398930 NOTICE: BL31: BL33 decompress pass
609 09:29:59.404613 ERROR: Error initializing runtime service opteed_fast
610 09:30:00.637626
611 09:30:00.638282
612 09:30:00.645911 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 09:30:00.646419
614 09:30:00.646894 Model: Libre Computer AML-A311D-CC Alta
615 09:30:00.854447 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 09:30:00.877704 DRAM: 2 GiB (effective 3.8 GiB)
617 09:30:01.020665 Core: 408 devices, 31 uclasses, devicetree: separate
618 09:30:01.026526 WDT: Not starting watchdog@f0d0
619 09:30:01.058812 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 09:30:01.071241 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 09:30:01.076237 ** Bad device specification mmc 0 **
622 09:30:01.086563 Card did not respond to voltage select! : -110
623 09:30:01.094176 ** Bad device specification mmc 0 **
624 09:30:01.094664 Couldn't find partition mmc 0
625 09:30:01.102511 Card did not respond to voltage select! : -110
626 09:30:01.108051 ** Bad device specification mmc 0 **
627 09:30:01.108553 Couldn't find partition mmc 0
628 09:30:01.113076 Error: could not access storage.
629 09:30:01.455722 Net: eth0: ethernet@ff3f0000
630 09:30:01.456440 starting USB...
631 09:30:01.707511 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 09:30:01.708216 Starting the controller
633 09:30:01.714386 USB XHCI 1.10
634 09:30:03.424703 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 09:30:03.425391 bl2_stage_init 0x01
636 09:30:03.425868 bl2_stage_init 0x81
637 09:30:03.430185 hw id: 0x0000 - pwm id 0x01
638 09:30:03.430679 bl2_stage_init 0xc1
639 09:30:03.431136 bl2_stage_init 0x02
640 09:30:03.431582
641 09:30:03.435780 L0:00000000
642 09:30:03.436295 L1:20000703
643 09:30:03.436746 L2:00008067
644 09:30:03.437192 L3:14000000
645 09:30:03.441410 B2:00402000
646 09:30:03.441890 B1:e0f83180
647 09:30:03.442338
648 09:30:03.442782 TE: 58159
649 09:30:03.443226
650 09:30:03.446989 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 09:30:03.447476
652 09:30:03.447925 Board ID = 1
653 09:30:03.452695 Set A53 clk to 24M
654 09:30:03.453173 Set A73 clk to 24M
655 09:30:03.453618 Set clk81 to 24M
656 09:30:03.458199 A53 clk: 1200 MHz
657 09:30:03.458682 A73 clk: 1200 MHz
658 09:30:03.459131 CLK81: 166.6M
659 09:30:03.459572 smccc: 00012ab5
660 09:30:03.463796 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 09:30:03.469402 board id: 1
662 09:30:03.475254 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 09:30:03.485935 fw parse done
664 09:30:03.492680 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 09:30:03.534530 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 09:30:03.545423 PIEI prepare done
667 09:30:03.545955 fastboot data load
668 09:30:03.546416 fastboot data verify
669 09:30:03.551147 verify result: 266
670 09:30:03.556665 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 09:30:03.557164 LPDDR4 probe
672 09:30:03.557618 ddr clk to 1584MHz
673 09:30:03.564625 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 09:30:03.601975
675 09:30:03.602528 dmc_version 0001
676 09:30:03.608605 Check phy result
677 09:30:03.614477 INFO : End of CA training
678 09:30:03.614955 INFO : End of initialization
679 09:30:03.620082 INFO : Training has run successfully!
680 09:30:03.620559 Check phy result
681 09:30:03.626371 INFO : End of initialization
682 09:30:03.626846 INFO : End of read enable training
683 09:30:03.631478 INFO : End of fine write leveling
684 09:30:03.637157 INFO : End of Write leveling coarse delay
685 09:30:03.637649 INFO : Training has run successfully!
686 09:30:03.638101 Check phy result
687 09:30:03.642422 INFO : End of initialization
688 09:30:03.642902 INFO : End of read dq deskew training
689 09:30:03.648574 INFO : End of MPR read delay center optimization
690 09:30:03.653629 INFO : End of write delay center optimization
691 09:30:03.659269 INFO : End of read delay center optimization
692 09:30:03.659746 INFO : End of max read latency training
693 09:30:03.664845 INFO : Training has run successfully!
694 09:30:03.665321 1D training succeed
695 09:30:03.674026 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 09:30:03.721828 Check phy result
697 09:30:03.722385 INFO : End of initialization
698 09:30:03.743552 INFO : End of 2D read delay Voltage center optimization
699 09:30:03.763805 INFO : End of 2D read delay Voltage center optimization
700 09:30:03.816377 INFO : End of 2D write delay Voltage center optimization
701 09:30:03.865171 INFO : End of 2D write delay Voltage center optimization
702 09:30:03.870770 INFO : Training has run successfully!
703 09:30:03.871252
704 09:30:03.871710 channel==0
705 09:30:03.876315 RxClkDly_Margin_A0==88 ps 9
706 09:30:03.876808 TxDqDly_Margin_A0==98 ps 10
707 09:30:03.879632 RxClkDly_Margin_A1==88 ps 9
708 09:30:03.880154 TxDqDly_Margin_A1==88 ps 9
709 09:30:03.885117 TrainedVREFDQ_A0==74
710 09:30:03.885602 TrainedVREFDQ_A1==74
711 09:30:03.886056 VrefDac_Margin_A0==25
712 09:30:03.890748 DeviceVref_Margin_A0==40
713 09:30:03.891226 VrefDac_Margin_A1==25
714 09:30:03.896348 DeviceVref_Margin_A1==40
715 09:30:03.896823
716 09:30:03.897270
717 09:30:03.897716 channel==1
718 09:30:03.898152 RxClkDly_Margin_A0==98 ps 10
719 09:30:03.901950 TxDqDly_Margin_A0==98 ps 10
720 09:30:03.902433 RxClkDly_Margin_A1==88 ps 9
721 09:30:03.912347 TxDqDly_Margin_A1==88 ps 9
722 09:30:03.912839 TrainedVREFDQ_A0==77
723 09:30:03.913293 TrainedVREFDQ_A1==77
724 09:30:03.914088 VrefDac_Margin_A0==22
725 09:30:03.914546 DeviceVref_Margin_A0==37
726 09:30:03.918719 VrefDac_Margin_A1==24
727 09:30:03.919200 DeviceVref_Margin_A1==37
728 09:30:03.919646
729 09:30:03.926057 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 09:30:03.926538
731 09:30:03.952272 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 09:30:03.957870 2D training succeed
733 09:30:03.963473 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 09:30:03.963958 auto size-- 65535DDR cs0 size: 2048MB
735 09:30:03.969122 DDR cs1 size: 2048MB
736 09:30:03.969605 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 09:30:03.974636 cs0 DataBus test pass
738 09:30:03.975113 cs1 DataBus test pass
739 09:30:03.975570 cs0 AddrBus test pass
740 09:30:03.980241 cs1 AddrBus test pass
741 09:30:03.980733
742 09:30:03.981190 100bdlr_step_size ps== 420
743 09:30:03.981638 result report
744 09:30:03.985837 boot times 0Enable ddr reg access
745 09:30:03.993531 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 09:30:04.007008 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 09:30:04.580684 0.0;M3 CHK:0;cm4_sp_mode 0
748 09:30:04.581367 MVN_1=0x00000000
749 09:30:04.586128 MVN_2=0x00000000
750 09:30:04.592028 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 09:30:04.592579 OPS=0x10
752 09:30:04.593025 ring efuse init
753 09:30:04.593454 chipver efuse init
754 09:30:04.597535 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 09:30:04.603185 [0.018961 Inits done]
756 09:30:04.603659 secure task start!
757 09:30:04.604131 high task start!
758 09:30:04.607722 low task start!
759 09:30:04.608217 run into bl31
760 09:30:04.614395 NOTICE: BL31: v1.3(release):4fc40b1
761 09:30:04.622283 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 09:30:04.622867 NOTICE: BL31: G12A normal boot!
763 09:30:04.649456 NOTICE: BL31: BL33 decompress pass
764 09:30:04.653335 ERROR: Error initializing runtime service opteed_fast
765 09:30:05.886285
766 09:30:05.887001
767 09:30:05.894662 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 09:30:05.895332
769 09:30:05.895814 Model: Libre Computer AML-A311D-CC Alta
770 09:30:06.103046 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 09:30:06.126487 DRAM: 2 GiB (effective 3.8 GiB)
772 09:30:06.270100 Core: 408 devices, 31 uclasses, devicetree: separate
773 09:30:06.275330 WDT: Not starting watchdog@f0d0
774 09:30:06.308100 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 09:30:06.320089 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 09:30:06.325060 ** Bad device specification mmc 0 **
777 09:30:06.335731 Card did not respond to voltage select! : -110
778 09:30:06.343020 ** Bad device specification mmc 0 **
779 09:30:06.343597 Couldn't find partition mmc 0
780 09:30:06.351359 Card did not respond to voltage select! : -110
781 09:30:06.356877 ** Bad device specification mmc 0 **
782 09:30:06.357420 Couldn't find partition mmc 0
783 09:30:06.361942 Error: could not access storage.
784 09:30:06.705358 Net: eth0: ethernet@ff3f0000
785 09:30:06.705989 starting USB...
786 09:30:06.957298 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 09:30:06.957959 Starting the controller
788 09:30:06.964236 USB XHCI 1.10
789 09:30:09.045138 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
790 09:30:09.045853 bl2_stage_init 0x81
791 09:30:09.050732 hw id: 0x0000 - pwm id 0x01
792 09:30:09.051317 bl2_stage_init 0xc1
793 09:30:09.051835 bl2_stage_init 0x02
794 09:30:09.052390
795 09:30:09.056264 L0:00000000
796 09:30:09.056837 L1:20000703
797 09:30:09.057309 L2:00008067
798 09:30:09.057780 L3:14000000
799 09:30:09.058232 B2:00402000
800 09:30:09.062025 B1:e0f83180
801 09:30:09.062566
802 09:30:09.063030 TE: 58141
803 09:30:09.063486
804 09:30:09.067483 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 09:30:09.068047
806 09:30:09.068516 Board ID = 1
807 09:30:09.073066 Set A53 clk to 24M
808 09:30:09.073613 Set A73 clk to 24M
809 09:30:09.074070 Set clk81 to 24M
810 09:30:09.078677 A53 clk: 1200 MHz
811 09:30:09.079216 A73 clk: 1200 MHz
812 09:30:09.079669 CLK81: 166.6M
813 09:30:09.080161 smccc: 00012aa3
814 09:30:09.084387 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 09:30:09.089902 board id: 1
816 09:30:09.095910 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 09:30:09.106420 fw parse done
818 09:30:09.112411 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 09:30:09.154772 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 09:30:09.165807 PIEI prepare done
821 09:30:09.166368 fastboot data load
822 09:30:09.166813 fastboot data verify
823 09:30:09.171384 verify result: 266
824 09:30:09.176991 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 09:30:09.177568 LPDDR4 probe
826 09:30:09.178055 ddr clk to 1584MHz
827 09:30:09.184984 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 09:30:09.222308
829 09:30:09.222982 dmc_version 0001
830 09:30:09.228893 Check phy result
831 09:30:09.234773 INFO : End of CA training
832 09:30:09.235341 INFO : End of initialization
833 09:30:09.240359 INFO : Training has run successfully!
834 09:30:09.240923 Check phy result
835 09:30:09.246094 INFO : End of initialization
836 09:30:09.247642 INFO : End of read enable training
837 09:30:09.251691 INFO : End of fine write leveling
838 09:30:09.257220 INFO : End of Write leveling coarse delay
839 09:30:09.257780 INFO : Training has run successfully!
840 09:30:09.258260 Check phy result
841 09:30:09.262699 INFO : End of initialization
842 09:30:09.263225 INFO : End of read dq deskew training
843 09:30:09.268339 INFO : End of MPR read delay center optimization
844 09:30:09.273897 INFO : End of write delay center optimization
845 09:30:09.279535 INFO : End of read delay center optimization
846 09:30:09.280113 INFO : End of max read latency training
847 09:30:09.285246 INFO : Training has run successfully!
848 09:30:09.285832 1D training succeed
849 09:30:09.294311 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 09:30:09.341955 Check phy result
851 09:30:09.342629 INFO : End of initialization
852 09:30:09.364444 INFO : End of 2D read delay Voltage center optimization
853 09:30:09.384542 INFO : End of 2D read delay Voltage center optimization
854 09:30:09.436309 INFO : End of 2D write delay Voltage center optimization
855 09:30:09.485562 INFO : End of 2D write delay Voltage center optimization
856 09:30:09.491086 INFO : Training has run successfully!
857 09:30:09.491500
858 09:30:09.491771 channel==0
859 09:30:09.496791 RxClkDly_Margin_A0==88 ps 9
860 09:30:09.497360 TxDqDly_Margin_A0==98 ps 10
861 09:30:09.502338 RxClkDly_Margin_A1==88 ps 9
862 09:30:09.502722 TxDqDly_Margin_A1==98 ps 10
863 09:30:09.502964 TrainedVREFDQ_A0==74
864 09:30:09.507806 TrainedVREFDQ_A1==74
865 09:30:09.508187 VrefDac_Margin_A0==25
866 09:30:09.508420 DeviceVref_Margin_A0==40
867 09:30:09.513560 VrefDac_Margin_A1==25
868 09:30:09.513919 DeviceVref_Margin_A1==40
869 09:30:09.514144
870 09:30:09.514364
871 09:30:09.519088 channel==1
872 09:30:09.519470 RxClkDly_Margin_A0==98 ps 10
873 09:30:09.519731 TxDqDly_Margin_A0==98 ps 10
874 09:30:09.524659 RxClkDly_Margin_A1==88 ps 9
875 09:30:09.525044 TxDqDly_Margin_A1==88 ps 9
876 09:30:09.530235 TrainedVREFDQ_A0==77
877 09:30:09.530584 TrainedVREFDQ_A1==77
878 09:30:09.530814 VrefDac_Margin_A0==22
879 09:30:09.535866 DeviceVref_Margin_A0==37
880 09:30:09.536239 VrefDac_Margin_A1==24
881 09:30:09.541689 DeviceVref_Margin_A1==37
882 09:30:09.542408
883 09:30:09.543122 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 09:30:09.543642
885 09:30:09.575038 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 0000001a 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
886 09:30:09.575456 2D training succeed
887 09:30:09.580638 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 09:30:09.586269 auto size-- 65535DDR cs0 size: 2048MB
889 09:30:09.586632 DDR cs1 size: 2048MB
890 09:30:09.591838 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 09:30:09.592216 cs0 DataBus test pass
892 09:30:09.597395 cs1 DataBus test pass
893 09:30:09.597733 cs0 AddrBus test pass
894 09:30:09.597977 cs1 AddrBus test pass
895 09:30:09.598201
896 09:30:09.602967 100bdlr_step_size ps== 420
897 09:30:09.603295 result report
898 09:30:09.608633 boot times 0Enable ddr reg access
899 09:30:09.613936 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 09:30:09.627421 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 09:30:10.199544 0.0;M3 CHK:0;cm4_sp_mode 0
902 09:30:10.199945 MVN_1=0x00000000
903 09:30:10.204971 MVN_2=0x00000000
904 09:30:10.210683 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 09:30:10.211213 OPS=0x10
906 09:30:10.211649 ring efuse init
907 09:30:10.212117 chipver efuse init
908 09:30:10.216261 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 09:30:10.221848 [0.018960 Inits done]
910 09:30:10.222340 secure task start!
911 09:30:10.222762 high task start!
912 09:30:10.226436 low task start!
913 09:30:10.226914 run into bl31
914 09:30:10.233074 NOTICE: BL31: v1.3(release):4fc40b1
915 09:30:10.240878 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 09:30:10.241354 NOTICE: BL31: G12A normal boot!
917 09:30:10.266311 NOTICE: BL31: BL33 decompress pass
918 09:30:10.271962 ERROR: Error initializing runtime service opteed_fast
919 09:30:11.504851
920 09:30:11.505468
921 09:30:11.513283 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 09:30:11.513797
923 09:30:11.514241 Model: Libre Computer AML-A311D-CC Alta
924 09:30:11.721768 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 09:30:11.745195 DRAM: 2 GiB (effective 3.8 GiB)
926 09:30:11.888179 Core: 408 devices, 31 uclasses, devicetree: separate
927 09:30:11.893962 WDT: Not starting watchdog@f0d0
928 09:30:11.926267 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 09:30:11.938748 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 09:30:11.943685 ** Bad device specification mmc 0 **
931 09:30:11.954024 Card did not respond to voltage select! : -110
932 09:30:11.961651 ** Bad device specification mmc 0 **
933 09:30:11.962163 Couldn't find partition mmc 0
934 09:30:11.969995 Card did not respond to voltage select! : -110
935 09:30:11.975545 ** Bad device specification mmc 0 **
936 09:30:11.976133 Couldn't find partition mmc 0
937 09:30:11.980554 Error: could not access storage.
938 09:30:12.323128 Net: eth0: ethernet@ff3f0000
939 09:30:12.323722 starting USB...
940 09:30:12.574834 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 09:30:12.575419 Starting the controller
942 09:30:12.581811 USB XHCI 1.10
943 09:30:14.135931 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 09:30:14.144274 scanning usb for storage devices... 0 Storage Device(s) found
946 09:30:14.195974 Hit any key to stop autoboot: 1
947 09:30:14.196949 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 09:30:14.197608 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 09:30:14.198110 Setting prompt string to ['=>']
950 09:30:14.198614 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 09:30:14.212062 0
952 09:30:14.213444 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 09:30:14.213861 Sending with 10 millisecond of delay
955 09:30:15.348689 => setenv autoload no
956 09:30:15.359554 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 09:30:15.365040 setenv autoload no
958 09:30:15.365826 Sending with 10 millisecond of delay
960 09:30:17.162938 => setenv initrd_high 0xffffffff
961 09:30:17.173679 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 09:30:17.174217 setenv initrd_high 0xffffffff
963 09:30:17.174703 Sending with 10 millisecond of delay
965 09:30:18.790413 => setenv fdt_high 0xffffffff
966 09:30:18.801231 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 09:30:18.802088 setenv fdt_high 0xffffffff
968 09:30:18.802854 Sending with 10 millisecond of delay
970 09:30:19.094746 => dhcp
971 09:30:19.105437 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 09:30:19.106278 dhcp
973 09:30:19.106752 Speed: 1000, full duplex
974 09:30:19.107205 BOOTP broadcast 1
975 09:30:19.113871 DHCP client bound to address 192.168.6.27 (9 ms)
976 09:30:19.114614 Sending with 10 millisecond of delay
978 09:30:20.792808 => setenv serverip 192.168.6.2
979 09:30:20.803402 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 09:30:20.804022 setenv serverip 192.168.6.2
981 09:30:20.804510 Sending with 10 millisecond of delay
983 09:30:24.530340 => tftpboot 0x01080000 922089/tftp-deploy-kx0dj3p5/kernel/uImage
984 09:30:24.541095 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 09:30:24.541659 tftpboot 0x01080000 922089/tftp-deploy-kx0dj3p5/kernel/uImage
986 09:30:24.541926 Speed: 1000, full duplex
987 09:30:24.542154 Using ethernet@ff3f0000 device
988 09:30:24.544384 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 09:30:24.550033 Filename '922089/tftp-deploy-kx0dj3p5/kernel/uImage'.
990 09:30:24.553219 Load address: 0x1080000
991 09:30:27.151580 Loading: *################################################## 37.8 MiB
992 09:30:27.152274 14.6 MiB/s
993 09:30:27.152764 done
994 09:30:27.155770 Bytes transferred = 39686720 (25d9240 hex)
995 09:30:27.156688 Sending with 10 millisecond of delay
997 09:30:31.846402 => tftpboot 0x08000000 922089/tftp-deploy-kx0dj3p5/ramdisk/ramdisk.cpio.gz.uboot
998 09:30:31.857307 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
999 09:30:31.858250 tftpboot 0x08000000 922089/tftp-deploy-kx0dj3p5/ramdisk/ramdisk.cpio.gz.uboot
1000 09:30:31.858750 Speed: 1000, full duplex
1001 09:30:31.859214 Using ethernet@ff3f0000 device
1002 09:30:31.860076 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 09:30:31.871851 Filename '922089/tftp-deploy-kx0dj3p5/ramdisk/ramdisk.cpio.gz.uboot'.
1004 09:30:31.872558 Load address: 0x8000000
1005 09:30:38.537592 Loading: *##############################T ################### UDP wrong checksum 00000005 0000eee9
1006 09:30:43.537692 T UDP wrong checksum 00000005 0000eee9
1007 09:30:53.540899 T T UDP wrong checksum 00000005 0000eee9
1008 09:31:08.452842 T T UDP wrong checksum 000000ff 0000c465
1009 09:31:08.529572 UDP wrong checksum 000000ff 00005058
1010 09:31:09.535029 T UDP wrong checksum 000000ff 000035a5
1011 09:31:09.537559 UDP wrong checksum 000000ff 0000c897
1012 09:31:09.573234 UDP wrong checksum 000000ff 00002505
1013 09:31:09.732200 UDP wrong checksum 000000ff 0000b8f7
1014 09:31:13.545946 T UDP wrong checksum 00000005 0000eee9
1015 09:31:14.841125 UDP wrong checksum 000000ff 00001f7b
1016 09:31:14.849359 UDP wrong checksum 000000ff 0000ac6d
1017 09:31:15.463228 UDP wrong checksum 000000ff 00003613
1018 09:31:15.743303 UDP wrong checksum 000000ff 0000bb05
1019 09:31:28.550122 T T
1020 09:31:28.550763 Retry count exceeded; starting again
1022 09:31:28.552349 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1025 09:31:28.554360 end: 2.4 uboot-commands (duration 00:01:46) [common]
1027 09:31:28.556037 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1029 09:31:28.557155 end: 2 uboot-action (duration 00:01:47) [common]
1031 09:31:28.558769 Cleaning after the job
1032 09:31:28.559321 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/ramdisk
1033 09:31:28.560495 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/kernel
1034 09:31:28.567929 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/dtb
1035 09:31:28.569280 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/nfsrootfs
1036 09:31:28.611249 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922089/tftp-deploy-kx0dj3p5/modules
1037 09:31:28.617868 start: 4.1 power-off (timeout 00:00:30) [common]
1038 09:31:28.618418 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1039 09:31:28.655630 >> OK - accepted request
1040 09:31:28.657529 Returned 0 in 0 seconds
1041 09:31:28.758902 end: 4.1 power-off (duration 00:00:00) [common]
1043 09:31:28.760734 start: 4.2 read-feedback (timeout 00:10:00) [common]
1044 09:31:28.762238 Listened to connection for namespace 'common' for up to 1s
1045 09:31:29.762122 Finalising connection for namespace 'common'
1046 09:31:29.762875 Disconnecting from shell: Finalise
1047 09:31:29.763433 =>
1048 09:31:29.864516 end: 4.2 read-feedback (duration 00:00:01) [common]
1049 09:31:29.865242 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/922089
1050 09:31:31.505410 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/922089
1051 09:31:31.506043 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.