Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:44:01.724647 lava-dispatcher, installed at version: 2024.01
2 09:44:01.725454 start: 0 validate
3 09:44:01.725928 Start time: 2024-11-01 09:44:01.725897+00:00 (UTC)
4 09:44:01.726473 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:44:01.727008 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 09:44:01.768590 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:44:01.769198 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 09:44:01.799520 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:44:01.800235 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 09:44:01.829106 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:44:01.829645 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 09:44:01.868492 validate duration: 0.14
14 09:44:01.869371 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 09:44:01.869713 start: 1.1 download-retry (timeout 00:10:00) [common]
16 09:44:01.870031 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 09:44:01.870641 Not decompressing ramdisk as can be used compressed.
18 09:44:01.871090 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 09:44:01.871371 saving as /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/ramdisk/rootfs.cpio.gz
20 09:44:01.871650 total size: 47897469 (45 MB)
21 09:44:01.908723 progress 0 % (0 MB)
22 09:44:01.941485 progress 5 % (2 MB)
23 09:44:01.977628 progress 10 % (4 MB)
24 09:44:02.013863 progress 15 % (6 MB)
25 09:44:02.049594 progress 20 % (9 MB)
26 09:44:02.087108 progress 25 % (11 MB)
27 09:44:02.117188 progress 30 % (13 MB)
28 09:44:02.147087 progress 35 % (16 MB)
29 09:44:02.176869 progress 40 % (18 MB)
30 09:44:02.206816 progress 45 % (20 MB)
31 09:44:02.236613 progress 50 % (22 MB)
32 09:44:02.266390 progress 55 % (25 MB)
33 09:44:02.296585 progress 60 % (27 MB)
34 09:44:02.326641 progress 65 % (29 MB)
35 09:44:02.356565 progress 70 % (32 MB)
36 09:44:02.386415 progress 75 % (34 MB)
37 09:44:02.416534 progress 80 % (36 MB)
38 09:44:02.446670 progress 85 % (38 MB)
39 09:44:02.476391 progress 90 % (41 MB)
40 09:44:02.506209 progress 95 % (43 MB)
41 09:44:02.535866 progress 100 % (45 MB)
42 09:44:02.536651 45 MB downloaded in 0.66 s (68.69 MB/s)
43 09:44:02.537233 end: 1.1.1 http-download (duration 00:00:01) [common]
45 09:44:02.538150 end: 1.1 download-retry (duration 00:00:01) [common]
46 09:44:02.538466 start: 1.2 download-retry (timeout 00:09:59) [common]
47 09:44:02.538754 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 09:44:02.539240 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/kernel/Image
49 09:44:02.539497 saving as /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/kernel/Image
50 09:44:02.539716 total size: 45908480 (43 MB)
51 09:44:02.539935 No compression specified
52 09:44:02.576132 progress 0 % (0 MB)
53 09:44:02.604810 progress 5 % (2 MB)
54 09:44:02.633375 progress 10 % (4 MB)
55 09:44:02.661600 progress 15 % (6 MB)
56 09:44:02.689760 progress 20 % (8 MB)
57 09:44:02.718085 progress 25 % (10 MB)
58 09:44:02.745726 progress 30 % (13 MB)
59 09:44:02.773680 progress 35 % (15 MB)
60 09:44:02.804548 progress 40 % (17 MB)
61 09:44:02.833998 progress 45 % (19 MB)
62 09:44:02.866184 progress 50 % (21 MB)
63 09:44:02.894860 progress 55 % (24 MB)
64 09:44:02.923471 progress 60 % (26 MB)
65 09:44:02.951769 progress 65 % (28 MB)
66 09:44:02.980220 progress 70 % (30 MB)
67 09:44:03.008726 progress 75 % (32 MB)
68 09:44:03.037237 progress 80 % (35 MB)
69 09:44:03.065561 progress 85 % (37 MB)
70 09:44:03.093760 progress 90 % (39 MB)
71 09:44:03.122202 progress 95 % (41 MB)
72 09:44:03.150557 progress 100 % (43 MB)
73 09:44:03.151067 43 MB downloaded in 0.61 s (71.62 MB/s)
74 09:44:03.151548 end: 1.2.1 http-download (duration 00:00:01) [common]
76 09:44:03.152377 end: 1.2 download-retry (duration 00:00:01) [common]
77 09:44:03.152655 start: 1.3 download-retry (timeout 00:09:59) [common]
78 09:44:03.152920 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 09:44:03.153386 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 09:44:03.153631 saving as /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 09:44:03.153834 total size: 53209 (0 MB)
82 09:44:03.154039 No compression specified
83 09:44:03.192070 progress 61 % (0 MB)
84 09:44:03.192916 progress 100 % (0 MB)
85 09:44:03.193436 0 MB downloaded in 0.04 s (1.28 MB/s)
86 09:44:03.193886 end: 1.3.1 http-download (duration 00:00:00) [common]
88 09:44:03.194688 end: 1.3 download-retry (duration 00:00:00) [common]
89 09:44:03.194947 start: 1.4 download-retry (timeout 00:09:59) [common]
90 09:44:03.195210 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 09:44:03.195663 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/modules.tar.xz
92 09:44:03.195902 saving as /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/modules/modules.tar
93 09:44:03.196133 total size: 11594840 (11 MB)
94 09:44:03.196343 Using unxz to decompress xz
95 09:44:03.231163 progress 0 % (0 MB)
96 09:44:03.300115 progress 5 % (0 MB)
97 09:44:03.375853 progress 10 % (1 MB)
98 09:44:03.458226 progress 15 % (1 MB)
99 09:44:03.534488 progress 20 % (2 MB)
100 09:44:03.610263 progress 25 % (2 MB)
101 09:44:03.694920 progress 30 % (3 MB)
102 09:44:03.767328 progress 35 % (3 MB)
103 09:44:03.846557 progress 40 % (4 MB)
104 09:44:03.932103 progress 45 % (5 MB)
105 09:44:04.018100 progress 50 % (5 MB)
106 09:44:04.103770 progress 55 % (6 MB)
107 09:44:04.186209 progress 60 % (6 MB)
108 09:44:04.273367 progress 65 % (7 MB)
109 09:44:04.352264 progress 70 % (7 MB)
110 09:44:04.442189 progress 75 % (8 MB)
111 09:44:04.546520 progress 80 % (8 MB)
112 09:44:04.622943 progress 85 % (9 MB)
113 09:44:04.699148 progress 90 % (9 MB)
114 09:44:04.803060 progress 95 % (10 MB)
115 09:44:04.896149 progress 100 % (11 MB)
116 09:44:04.911289 11 MB downloaded in 1.72 s (6.45 MB/s)
117 09:44:04.911912 end: 1.4.1 http-download (duration 00:00:02) [common]
119 09:44:04.913616 end: 1.4 download-retry (duration 00:00:02) [common]
120 09:44:04.914188 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 09:44:04.914756 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 09:44:04.915296 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 09:44:04.915840 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 09:44:04.917374 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f
125 09:44:04.919412 makedir: /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin
126 09:44:04.920539 makedir: /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/tests
127 09:44:04.921582 makedir: /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/results
128 09:44:04.922307 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-add-keys
129 09:44:04.923800 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-add-sources
130 09:44:04.926015 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-background-process-start
131 09:44:04.927240 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-background-process-stop
132 09:44:04.928723 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-common-functions
133 09:44:04.929927 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-echo-ipv4
134 09:44:04.931482 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-install-packages
135 09:44:04.932742 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-installed-packages
136 09:44:04.933886 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-os-build
137 09:44:04.935329 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-probe-channel
138 09:44:04.936693 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-probe-ip
139 09:44:04.938085 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-target-ip
140 09:44:04.939416 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-target-mac
141 09:44:04.940726 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-target-storage
142 09:44:04.942060 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-test-case
143 09:44:04.943268 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-test-event
144 09:44:04.944475 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-test-feedback
145 09:44:04.945468 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-test-raise
146 09:44:04.946648 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-test-reference
147 09:44:04.947761 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-test-runner
148 09:44:04.950393 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-test-set
149 09:44:04.952347 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-test-shell
150 09:44:04.953208 Updating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-install-packages (oe)
151 09:44:04.954519 Updating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/bin/lava-installed-packages (oe)
152 09:44:04.955147 Creating /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/environment
153 09:44:04.955625 LAVA metadata
154 09:44:04.955920 - LAVA_JOB_ID=921927
155 09:44:04.956279 - LAVA_DISPATCHER_IP=192.168.6.2
156 09:44:04.956936 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 09:44:04.958788 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 09:44:04.959457 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 09:44:04.959874 skipped lava-vland-overlay
160 09:44:04.960398 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 09:44:04.960899 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 09:44:04.961355 skipped lava-multinode-overlay
163 09:44:04.961832 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 09:44:04.962325 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 09:44:04.962780 Loading test definitions
166 09:44:04.963494 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 09:44:04.963962 Using /lava-921927 at stage 0
168 09:44:04.965827 uuid=921927_1.5.2.4.1 testdef=None
169 09:44:04.966246 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 09:44:04.966622 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 09:44:04.968932 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 09:44:04.969936 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 09:44:04.973516 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 09:44:04.974589 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 09:44:04.978117 runner path: /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/0/tests/0_igt-gpu-panfrost test_uuid 921927_1.5.2.4.1
178 09:44:04.979032 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 09:44:04.980087 Creating lava-test-runner.conf files
181 09:44:04.980390 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/921927/lava-overlay-esrad6_f/lava-921927/0 for stage 0
182 09:44:04.980874 - 0_igt-gpu-panfrost
183 09:44:04.981389 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 09:44:04.981801 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 09:44:05.009426 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 09:44:05.009885 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 09:44:05.010177 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 09:44:05.010472 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 09:44:05.010761 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 09:44:11.807081 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 09:44:11.807566 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 09:44:11.807830 extracting modules file /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/921927/extract-overlay-ramdisk-jzyr2j7d/ramdisk
193 09:44:13.192145 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 09:44:13.192619 start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
195 09:44:13.192895 [common] Applying overlay /var/lib/lava/dispatcher/tmp/921927/compress-overlay-pv9mk8y6/overlay-1.5.2.5.tar.gz to ramdisk
196 09:44:13.193109 [common] Applying overlay /var/lib/lava/dispatcher/tmp/921927/compress-overlay-pv9mk8y6/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/921927/extract-overlay-ramdisk-jzyr2j7d/ramdisk
197 09:44:13.223081 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 09:44:13.223447 start: 1.5.6 prepare-kernel (timeout 00:09:49) [common]
199 09:44:13.223717 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:49) [common]
200 09:44:13.223941 Converting downloaded kernel to a uImage
201 09:44:13.224264 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/kernel/Image /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/kernel/uImage
202 09:44:13.705874 output: Image Name:
203 09:44:13.706290 output: Created: Fri Nov 1 09:44:13 2024
204 09:44:13.706500 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 09:44:13.706703 output: Data Size: 45908480 Bytes = 44832.50 KiB = 43.78 MiB
206 09:44:13.706902 output: Load Address: 01080000
207 09:44:13.707100 output: Entry Point: 01080000
208 09:44:13.707296 output:
209 09:44:13.707625 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 09:44:13.707886 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 09:44:13.708202 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 09:44:13.708462 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 09:44:13.708719 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 09:44:13.708985 Building ramdisk /var/lib/lava/dispatcher/tmp/921927/extract-overlay-ramdisk-jzyr2j7d/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/921927/extract-overlay-ramdisk-jzyr2j7d/ramdisk
215 09:44:20.193656 >> 502773 blocks
216 09:44:41.096642 Adding RAMdisk u-boot header.
217 09:44:41.097292 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/921927/extract-overlay-ramdisk-jzyr2j7d/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/921927/extract-overlay-ramdisk-jzyr2j7d/ramdisk.cpio.gz.uboot
218 09:44:41.746968 output: Image Name:
219 09:44:41.747390 output: Created: Fri Nov 1 09:44:41 2024
220 09:44:41.747597 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 09:44:41.747799 output: Data Size: 65729245 Bytes = 64188.72 KiB = 62.68 MiB
222 09:44:41.748077 output: Load Address: 00000000
223 09:44:41.748483 output: Entry Point: 00000000
224 09:44:41.748873 output:
225 09:44:41.749986 rename /var/lib/lava/dispatcher/tmp/921927/extract-overlay-ramdisk-jzyr2j7d/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/ramdisk/ramdisk.cpio.gz.uboot
226 09:44:41.750689 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 09:44:41.751219 end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
228 09:44:41.751730 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:20) [common]
229 09:44:41.752211 No LXC device requested
230 09:44:41.752703 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 09:44:41.753199 start: 1.7 deploy-device-env (timeout 00:09:20) [common]
232 09:44:41.753679 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 09:44:41.754080 Checking files for TFTP limit of 4294967296 bytes.
234 09:44:41.756722 end: 1 tftp-deploy (duration 00:00:40) [common]
235 09:44:41.757286 start: 2 uboot-action (timeout 00:05:00) [common]
236 09:44:41.757803 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 09:44:41.758288 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 09:44:41.758777 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 09:44:41.759292 Using kernel file from prepare-kernel: 921927/tftp-deploy-6hkxdezz/kernel/uImage
240 09:44:41.759906 substitutions:
241 09:44:41.760352 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 09:44:41.760754 - {DTB_ADDR}: 0x01070000
243 09:44:41.761150 - {DTB}: 921927/tftp-deploy-6hkxdezz/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 09:44:41.761549 - {INITRD}: 921927/tftp-deploy-6hkxdezz/ramdisk/ramdisk.cpio.gz.uboot
245 09:44:41.761942 - {KERNEL_ADDR}: 0x01080000
246 09:44:41.762331 - {KERNEL}: 921927/tftp-deploy-6hkxdezz/kernel/uImage
247 09:44:41.762722 - {LAVA_MAC}: None
248 09:44:41.763152 - {PRESEED_CONFIG}: None
249 09:44:41.763547 - {PRESEED_LOCAL}: None
250 09:44:41.763932 - {RAMDISK_ADDR}: 0x08000000
251 09:44:41.764348 - {RAMDISK}: 921927/tftp-deploy-6hkxdezz/ramdisk/ramdisk.cpio.gz.uboot
252 09:44:41.764740 - {ROOT_PART}: None
253 09:44:41.765127 - {ROOT}: None
254 09:44:41.765515 - {SERVER_IP}: 192.168.6.2
255 09:44:41.765904 - {TEE_ADDR}: 0x83000000
256 09:44:41.766289 - {TEE}: None
257 09:44:41.766674 Parsed boot commands:
258 09:44:41.767050 - setenv autoload no
259 09:44:41.767432 - setenv initrd_high 0xffffffff
260 09:44:41.767815 - setenv fdt_high 0xffffffff
261 09:44:41.768220 - dhcp
262 09:44:41.768604 - setenv serverip 192.168.6.2
263 09:44:41.768982 - tftpboot 0x01080000 921927/tftp-deploy-6hkxdezz/kernel/uImage
264 09:44:41.769368 - tftpboot 0x08000000 921927/tftp-deploy-6hkxdezz/ramdisk/ramdisk.cpio.gz.uboot
265 09:44:41.769751 - tftpboot 0x01070000 921927/tftp-deploy-6hkxdezz/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 09:44:41.770143 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 09:44:41.770533 - bootm 0x01080000 0x08000000 0x01070000
268 09:44:41.771034 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 09:44:41.772547 start: 2.3 connect-device (timeout 00:05:00) [common]
271 09:44:41.772994 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 09:44:41.787663 Setting prompt string to ['lava-test: # ']
273 09:44:41.789216 end: 2.3 connect-device (duration 00:00:00) [common]
274 09:44:41.789820 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 09:44:41.790351 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 09:44:41.790866 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 09:44:41.792093 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 09:44:41.828676 >> OK - accepted request
279 09:44:41.830925 Returned 0 in 0 seconds
280 09:44:41.932045 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 09:44:41.933072 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 09:44:41.933422 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 09:44:41.933744 Setting prompt string to ['Hit any key to stop autoboot']
285 09:44:41.934019 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 09:44:41.935010 Trying 192.168.56.21...
287 09:44:41.935319 Connected to conserv1.
288 09:44:41.935573 Escape character is '^]'.
289 09:44:41.935800
290 09:44:41.936067 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 09:44:41.936327
292 09:44:48.946086 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 09:44:48.946724 bl2_stage_init 0x01
294 09:44:48.947150 bl2_stage_init 0x81
295 09:44:48.951564 hw id: 0x0000 - pwm id 0x01
296 09:44:48.952061 bl2_stage_init 0xc1
297 09:44:48.957109 bl2_stage_init 0x02
298 09:44:48.957543
299 09:44:48.957942 L0:00000000
300 09:44:48.958329 L1:00000703
301 09:44:48.958714 L2:00008067
302 09:44:48.959097 L3:15000000
303 09:44:48.962622 S1:00000000
304 09:44:48.963040 B2:20282000
305 09:44:48.963440 B1:a0f83180
306 09:44:48.963826
307 09:44:48.964245 TE: 69062
308 09:44:48.964632
309 09:44:48.968271 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 09:44:48.968690
311 09:44:48.973832 Board ID = 1
312 09:44:48.974241 Set cpu clk to 24M
313 09:44:48.974624 Set clk81 to 24M
314 09:44:48.979455 Use GP1_pll as DSU clk.
315 09:44:48.979870 DSU clk: 1200 Mhz
316 09:44:48.980290 CPU clk: 1200 MHz
317 09:44:48.985046 Set clk81 to 166.6M
318 09:44:48.990652 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 09:44:48.991068 board id: 1
320 09:44:48.997956 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 09:44:49.008795 fw parse done
322 09:44:49.014917 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 09:44:49.057888 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 09:44:49.068992 PIEI prepare done
325 09:44:49.069415 fastboot data load
326 09:44:49.069809 fastboot data verify
327 09:44:49.074539 verify result: 266
328 09:44:49.080189 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 09:44:49.080607 LPDDR4 probe
330 09:44:49.080996 ddr clk to 1584MHz
331 09:44:49.088176 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 09:44:49.125994
333 09:44:49.126414 dmc_version 0001
334 09:44:49.132949 Check phy result
335 09:44:49.139065 INFO : End of CA training
336 09:44:49.139479 INFO : End of initialization
337 09:44:49.144512 INFO : Training has run successfully!
338 09:44:49.144921 Check phy result
339 09:44:49.150119 INFO : End of initialization
340 09:44:49.150524 INFO : End of read enable training
341 09:44:49.155794 INFO : End of fine write leveling
342 09:44:49.161353 INFO : End of Write leveling coarse delay
343 09:44:49.161762 INFO : Training has run successfully!
344 09:44:49.162149 Check phy result
345 09:44:49.167063 INFO : End of initialization
346 09:44:49.167487 INFO : End of read dq deskew training
347 09:44:49.172584 INFO : End of MPR read delay center optimization
348 09:44:49.178180 INFO : End of write delay center optimization
349 09:44:49.183797 INFO : End of read delay center optimization
350 09:44:49.184265 INFO : End of max read latency training
351 09:44:49.189346 INFO : Training has run successfully!
352 09:44:49.189778 1D training succeed
353 09:44:49.198576 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 09:44:49.246893 Check phy result
355 09:44:49.247403 INFO : End of initialization
356 09:44:49.274272 INFO : End of 2D read delay Voltage center optimization
357 09:44:49.298403 INFO : End of 2D read delay Voltage center optimization
358 09:44:49.355097 INFO : End of 2D write delay Voltage center optimization
359 09:44:49.409201 INFO : End of 2D write delay Voltage center optimization
360 09:44:49.414698 INFO : Training has run successfully!
361 09:44:49.415132
362 09:44:49.415539 channel==0
363 09:44:49.420316 RxClkDly_Margin_A0==78 ps 8
364 09:44:49.420778 TxDqDly_Margin_A0==98 ps 10
365 09:44:49.423630 RxClkDly_Margin_A1==78 ps 8
366 09:44:49.424091 TxDqDly_Margin_A1==98 ps 10
367 09:44:49.429190 TrainedVREFDQ_A0==74
368 09:44:49.429617 TrainedVREFDQ_A1==75
369 09:44:49.430020 VrefDac_Margin_A0==24
370 09:44:49.435157 DeviceVref_Margin_A0==40
371 09:44:49.435581 VrefDac_Margin_A1==23
372 09:44:49.440426 DeviceVref_Margin_A1==39
373 09:44:49.440854
374 09:44:49.441257
375 09:44:49.441653 channel==1
376 09:44:49.442046 RxClkDly_Margin_A0==88 ps 9
377 09:44:49.443846 TxDqDly_Margin_A0==98 ps 10
378 09:44:49.449338 RxClkDly_Margin_A1==78 ps 8
379 09:44:49.449810 TxDqDly_Margin_A1==88 ps 9
380 09:44:49.450221 TrainedVREFDQ_A0==78
381 09:44:49.455150 TrainedVREFDQ_A1==78
382 09:44:49.455581 VrefDac_Margin_A0==23
383 09:44:49.460564 DeviceVref_Margin_A0==36
384 09:44:49.460995 VrefDac_Margin_A1==22
385 09:44:49.461392 DeviceVref_Margin_A1==36
386 09:44:49.461784
387 09:44:49.466126 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 09:44:49.466551
389 09:44:49.499663 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 09:44:49.500192 2D training succeed
391 09:44:49.505289 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 09:44:49.510884 auto size-- 65535DDR cs0 size: 2048MB
393 09:44:49.511310 DDR cs1 size: 2048MB
394 09:44:49.516468 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 09:44:49.516889 cs0 DataBus test pass
396 09:44:49.517282 cs1 DataBus test pass
397 09:44:49.522089 cs0 AddrBus test pass
398 09:44:49.522509 cs1 AddrBus test pass
399 09:44:49.522902
400 09:44:49.527689 100bdlr_step_size ps== 485
401 09:44:49.528158 result report
402 09:44:49.528562 boot times 0Enable ddr reg access
403 09:44:49.537395 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 09:44:49.551273 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 09:44:50.210733 bl2z: ptr: 05129330, size: 00001e40
406 09:44:50.218886 0.0;M3 CHK:0;cm4_sp_mode 0
407 09:44:50.219339 MVN_1=0x00000000
408 09:44:50.219742 MVN_2=0x00000000
409 09:44:50.230391 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 09:44:50.230827 OPS=0x04
411 09:44:50.231229 ring efuse init
412 09:44:50.236158 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 09:44:50.236599 [0.017354 Inits done]
414 09:44:50.237001 secure task start!
415 09:44:50.243861 high task start!
416 09:44:50.244315 low task start!
417 09:44:50.244713 run into bl31
418 09:44:50.252523 NOTICE: BL31: v1.3(release):4fc40b1
419 09:44:50.260330 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 09:44:50.260775 NOTICE: BL31: G12A normal boot!
421 09:44:50.275902 NOTICE: BL31: BL33 decompress pass
422 09:44:50.281597 ERROR: Error initializing runtime service opteed_fast
423 09:44:52.999341 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 09:44:53.000133 bl2_stage_init 0x01
425 09:44:53.000805 bl2_stage_init 0x81
426 09:44:53.003609 hw id: 0x0000 - pwm id 0x01
427 09:44:53.004291 bl2_stage_init 0xc1
428 09:44:53.009298 bl2_stage_init 0x02
429 09:44:53.009873
430 09:44:53.010322 L0:00000000
431 09:44:53.010757 L1:00000703
432 09:44:53.011182 L2:00008067
433 09:44:53.011606 L3:15000000
434 09:44:53.014904 S1:00000000
435 09:44:53.015474 B2:20282000
436 09:44:53.015910 B1:a0f83180
437 09:44:53.016384
438 09:44:53.016814 TE: 70643
439 09:44:53.017244
440 09:44:53.020496 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 09:44:53.021083
442 09:44:53.026097 Board ID = 1
443 09:44:53.026654 Set cpu clk to 24M
444 09:44:53.027085 Set clk81 to 24M
445 09:44:53.031805 Use GP1_pll as DSU clk.
446 09:44:53.032511 DSU clk: 1200 Mhz
447 09:44:53.032966 CPU clk: 1200 MHz
448 09:44:53.037459 Set clk81 to 166.6M
449 09:44:53.042779 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 09:44:53.043361 board id: 1
451 09:44:53.050045 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 09:44:53.061373 fw parse done
453 09:44:53.066676 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 09:44:53.109271 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 09:44:53.120356 PIEI prepare done
456 09:44:53.120988 fastboot data load
457 09:44:53.121420 fastboot data verify
458 09:44:53.126095 verify result: 266
459 09:44:53.131337 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 09:44:53.131727 LPDDR4 probe
461 09:44:53.131933 ddr clk to 1584MHz
462 09:44:53.139257 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 09:44:53.176593
464 09:44:53.177010 dmc_version 0001
465 09:44:53.183152 Check phy result
466 09:44:53.188979 INFO : End of CA training
467 09:44:53.189277 INFO : End of initialization
468 09:44:53.194633 INFO : Training has run successfully!
469 09:44:53.194936 Check phy result
470 09:44:53.200240 INFO : End of initialization
471 09:44:53.200542 INFO : End of read enable training
472 09:44:53.205830 INFO : End of fine write leveling
473 09:44:53.211517 INFO : End of Write leveling coarse delay
474 09:44:53.211815 INFO : Training has run successfully!
475 09:44:53.212045 Check phy result
476 09:44:53.217034 INFO : End of initialization
477 09:44:53.217324 INFO : End of read dq deskew training
478 09:44:53.222797 INFO : End of MPR read delay center optimization
479 09:44:53.228422 INFO : End of write delay center optimization
480 09:44:53.234024 INFO : End of read delay center optimization
481 09:44:53.234571 INFO : End of max read latency training
482 09:44:53.239674 INFO : Training has run successfully!
483 09:44:53.240251 1D training succeed
484 09:44:53.248758 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 09:44:53.296420 Check phy result
486 09:44:53.297046 INFO : End of initialization
487 09:44:53.318803 INFO : End of 2D read delay Voltage center optimization
488 09:44:53.337948 INFO : End of 2D read delay Voltage center optimization
489 09:44:53.389865 INFO : End of 2D write delay Voltage center optimization
490 09:44:53.439011 INFO : End of 2D write delay Voltage center optimization
491 09:44:53.444558 INFO : Training has run successfully!
492 09:44:53.445101
493 09:44:53.445546 channel==0
494 09:44:53.450140 RxClkDly_Margin_A0==88 ps 9
495 09:44:53.450689 TxDqDly_Margin_A0==98 ps 10
496 09:44:53.453483 RxClkDly_Margin_A1==88 ps 9
497 09:44:53.454002 TxDqDly_Margin_A1==88 ps 9
498 09:44:53.459011 TrainedVREFDQ_A0==74
499 09:44:53.459559 TrainedVREFDQ_A1==74
500 09:44:53.460099 VrefDac_Margin_A0==24
501 09:44:53.464711 DeviceVref_Margin_A0==40
502 09:44:53.465273 VrefDac_Margin_A1==22
503 09:44:53.470207 DeviceVref_Margin_A1==40
504 09:44:53.470746
505 09:44:53.471185
506 09:44:53.471616 channel==1
507 09:44:53.472081 RxClkDly_Margin_A0==88 ps 9
508 09:44:53.475791 TxDqDly_Margin_A0==98 ps 10
509 09:44:53.476364 RxClkDly_Margin_A1==88 ps 9
510 09:44:53.481447 TxDqDly_Margin_A1==78 ps 8
511 09:44:53.482009 TrainedVREFDQ_A0==78
512 09:44:53.482470 TrainedVREFDQ_A1==75
513 09:44:53.487015 VrefDac_Margin_A0==22
514 09:44:53.487554 DeviceVref_Margin_A0==36
515 09:44:53.492711 VrefDac_Margin_A1==22
516 09:44:53.493246 DeviceVref_Margin_A1==39
517 09:44:53.493686
518 09:44:53.498206 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 09:44:53.498744
520 09:44:53.526220 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
521 09:44:53.531794 2D training succeed
522 09:44:53.537466 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 09:44:53.538008 auto size-- 65535DDR cs0 size: 2048MB
524 09:44:53.543028 DDR cs1 size: 2048MB
525 09:44:53.543566 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 09:44:53.548703 cs0 DataBus test pass
527 09:44:53.549236 cs1 DataBus test pass
528 09:44:53.549679 cs0 AddrBus test pass
529 09:44:53.554190 cs1 AddrBus test pass
530 09:44:53.554724
531 09:44:53.555172 100bdlr_step_size ps== 478
532 09:44:53.555610 result report
533 09:44:53.559793 boot times 0Enable ddr reg access
534 09:44:53.567316 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 09:44:53.581160 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 09:44:54.236302 bl2z: ptr: 05129330, size: 00001e40
537 09:44:54.243267 0.0;M3 CHK:0;cm4_sp_mode 0
538 09:44:54.243825 MVN_1=0x00000000
539 09:44:54.244354 MVN_2=0x00000000
540 09:44:54.254782 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 09:44:54.255336 OPS=0x04
542 09:44:54.255810 ring efuse init
543 09:44:54.260374 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 09:44:54.260924 [0.017319 Inits done]
545 09:44:54.261395 secure task start!
546 09:44:54.268287 high task start!
547 09:44:54.268853 low task start!
548 09:44:54.269332 run into bl31
549 09:44:54.276925 NOTICE: BL31: v1.3(release):4fc40b1
550 09:44:54.284806 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 09:44:54.285368 NOTICE: BL31: G12A normal boot!
552 09:44:54.300359 NOTICE: BL31: BL33 decompress pass
553 09:44:54.306030 ERROR: Error initializing runtime service opteed_fast
554 09:44:55.695057 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 09:44:55.695470 bl2_stage_init 0x01
556 09:44:55.695692 bl2_stage_init 0x81
557 09:44:55.700487 hw id: 0x0000 - pwm id 0x01
558 09:44:55.700777 bl2_stage_init 0xc1
559 09:44:55.705997 bl2_stage_init 0x02
560 09:44:55.706280
561 09:44:55.706503 L0:00000000
562 09:44:55.706712 L1:00000703
563 09:44:55.706918 L2:00008067
564 09:44:55.707127 L3:15000000
565 09:44:55.711644 S1:00000000
566 09:44:55.711934 B2:20282000
567 09:44:55.712185 B1:a0f83180
568 09:44:55.712396
569 09:44:55.712609 TE: 68679
570 09:44:55.712822
571 09:44:55.717342 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 09:44:55.717673
573 09:44:55.723004 Board ID = 1
574 09:44:55.723305 Set cpu clk to 24M
575 09:44:55.723529 Set clk81 to 24M
576 09:44:55.728495 Use GP1_pll as DSU clk.
577 09:44:55.728836 DSU clk: 1200 Mhz
578 09:44:55.729049 CPU clk: 1200 MHz
579 09:44:55.734032 Set clk81 to 166.6M
580 09:44:55.739730 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 09:44:55.740063 board id: 1
582 09:44:55.746805 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 09:44:55.757466 fw parse done
584 09:44:55.763444 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 09:44:55.806065 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 09:44:55.817011 PIEI prepare done
587 09:44:55.817359 fastboot data load
588 09:44:55.817641 fastboot data verify
589 09:44:55.822643 verify result: 266
590 09:44:55.828261 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 09:44:55.828597 LPDDR4 probe
592 09:44:55.828867 ddr clk to 1584MHz
593 09:44:55.836290 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 09:44:55.873545
595 09:44:55.873925 dmc_version 0001
596 09:44:55.880236 Check phy result
597 09:44:55.886130 INFO : End of CA training
598 09:44:55.886684 INFO : End of initialization
599 09:44:55.891818 INFO : Training has run successfully!
600 09:44:55.892356 Check phy result
601 09:44:55.897383 INFO : End of initialization
602 09:44:55.897878 INFO : End of read enable training
603 09:44:55.903047 INFO : End of fine write leveling
604 09:44:55.908552 INFO : End of Write leveling coarse delay
605 09:44:55.909043 INFO : Training has run successfully!
606 09:44:55.909444 Check phy result
607 09:44:55.914151 INFO : End of initialization
608 09:44:55.914639 INFO : End of read dq deskew training
609 09:44:55.919802 INFO : End of MPR read delay center optimization
610 09:44:55.925388 INFO : End of write delay center optimization
611 09:44:55.931048 INFO : End of read delay center optimization
612 09:44:55.931534 INFO : End of max read latency training
613 09:44:55.936521 INFO : Training has run successfully!
614 09:44:55.936854 1D training succeed
615 09:44:55.945688 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 09:44:55.993194 Check phy result
617 09:44:55.993610 INFO : End of initialization
618 09:44:56.015537 INFO : End of 2D read delay Voltage center optimization
619 09:44:56.034766 INFO : End of 2D read delay Voltage center optimization
620 09:44:56.086633 INFO : End of 2D write delay Voltage center optimization
621 09:44:56.135824 INFO : End of 2D write delay Voltage center optimization
622 09:44:56.141354 INFO : Training has run successfully!
623 09:44:56.141836
624 09:44:56.142241 channel==0
625 09:44:56.147036 RxClkDly_Margin_A0==78 ps 8
626 09:44:56.147516 TxDqDly_Margin_A0==88 ps 9
627 09:44:56.152552 RxClkDly_Margin_A1==78 ps 8
628 09:44:56.153023 TxDqDly_Margin_A1==98 ps 10
629 09:44:56.153422 TrainedVREFDQ_A0==74
630 09:44:56.158161 TrainedVREFDQ_A1==75
631 09:44:56.158637 VrefDac_Margin_A0==24
632 09:44:56.159028 DeviceVref_Margin_A0==40
633 09:44:56.163777 VrefDac_Margin_A1==23
634 09:44:56.164285 DeviceVref_Margin_A1==39
635 09:44:56.164677
636 09:44:56.165062
637 09:44:56.165445 channel==1
638 09:44:56.169342 RxClkDly_Margin_A0==88 ps 9
639 09:44:56.169818 TxDqDly_Margin_A0==98 ps 10
640 09:44:56.175028 RxClkDly_Margin_A1==78 ps 8
641 09:44:56.175513 TxDqDly_Margin_A1==88 ps 9
642 09:44:56.180531 TrainedVREFDQ_A0==78
643 09:44:56.181001 TrainedVREFDQ_A1==78
644 09:44:56.181393 VrefDac_Margin_A0==23
645 09:44:56.186133 DeviceVref_Margin_A0==36
646 09:44:56.186601 VrefDac_Margin_A1==22
647 09:44:56.191773 DeviceVref_Margin_A1==36
648 09:44:56.192272
649 09:44:56.192673 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 09:44:56.193061
651 09:44:56.225330 soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
652 09:44:56.225860 2D training succeed
653 09:44:56.231055 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 09:44:56.236552 auto size-- 65535DDR cs0 size: 2048MB
655 09:44:56.237022 DDR cs1 size: 2048MB
656 09:44:56.242174 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 09:44:56.242661 cs0 DataBus test pass
658 09:44:56.247785 cs1 DataBus test pass
659 09:44:56.248314 cs0 AddrBus test pass
660 09:44:56.248709 cs1 AddrBus test pass
661 09:44:56.249091
662 09:44:56.253347 100bdlr_step_size ps== 478
663 09:44:56.253861 result report
664 09:44:56.259016 boot times 0Enable ddr reg access
665 09:44:56.264205 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 09:44:56.278069 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 09:44:56.932912 bl2z: ptr: 05129330, size: 00001e40
668 09:44:56.939222 0.0;M3 CHK:0;cm4_sp_mode 0
669 09:44:56.939685 MVN_1=0x00000000
670 09:44:56.940139 MVN_2=0x00000000
671 09:44:56.950741 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 09:44:56.951194 OPS=0x04
673 09:44:56.951604 ring efuse init
674 09:44:56.956341 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 09:44:56.956792 [0.017319 Inits done]
676 09:44:56.957196 secure task start!
677 09:44:56.964130 high task start!
678 09:44:56.964578 low task start!
679 09:44:56.964985 run into bl31
680 09:44:56.972690 NOTICE: BL31: v1.3(release):4fc40b1
681 09:44:56.980492 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 09:44:56.980933 NOTICE: BL31: G12A normal boot!
683 09:44:56.996088 NOTICE: BL31: BL33 decompress pass
684 09:44:57.001853 ERROR: Error initializing runtime service opteed_fast
685 09:44:57.797289
686 09:44:57.797888
687 09:44:57.802619 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 09:44:57.803080
689 09:44:57.806208 Model: Libre Computer AML-S905D3-CC Solitude
690 09:44:57.953113 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 09:44:57.968511 DRAM: 2 GiB (effective 3.8 GiB)
692 09:44:58.069442 Core: 406 devices, 33 uclasses, devicetree: separate
693 09:44:58.075409 WDT: Not starting watchdog@f0d0
694 09:44:58.100435 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 09:44:58.112675 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 09:44:58.117653 ** Bad device specification mmc 0 **
697 09:44:58.127707 Card did not respond to voltage select! : -110
698 09:44:58.135366 ** Bad device specification mmc 0 **
699 09:44:58.135798 Couldn't find partition mmc 0
700 09:44:58.143679 Card did not respond to voltage select! : -110
701 09:44:58.149224 ** Bad device specification mmc 0 **
702 09:44:58.149647 Couldn't find partition mmc 0
703 09:44:58.154283 Error: could not access storage.
704 09:44:58.450738 Net: eth0: ethernet@ff3f0000
705 09:44:58.451346 starting USB...
706 09:44:58.695425 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 09:44:58.695970 Starting the controller
708 09:44:58.702347 USB XHCI 1.10
709 09:45:00.258639 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 09:45:00.266955 scanning usb for storage devices... 0 Storage Device(s) found
712 09:45:00.318408 Hit any key to stop autoboot: 1
713 09:45:00.319200 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
714 09:45:00.319836 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 09:45:00.320356 Setting prompt string to ['=>']
716 09:45:00.320839 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 09:45:00.332998 0
718 09:45:00.333850 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 09:45:00.435017 => setenv autoload no
721 09:45:00.435836 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 09:45:00.440621 setenv autoload no
724 09:45:00.542030 => setenv initrd_high 0xffffffff
725 09:45:00.542840 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 09:45:00.546989 setenv initrd_high 0xffffffff
728 09:45:00.648394 => setenv fdt_high 0xffffffff
729 09:45:00.649177 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 09:45:00.653376 setenv fdt_high 0xffffffff
732 09:45:00.754775 => dhcp
733 09:45:00.755610 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 09:45:00.759502 dhcp
735 09:45:01.315069 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 09:45:01.315636 Speed: 1000, full duplex
737 09:45:01.316092 BOOTP broadcast 1
738 09:45:01.563449 BOOTP broadcast 2
739 09:45:01.587490 DHCP client bound to address 192.168.6.21 (272 ms)
741 09:45:01.689042 => setenv serverip 192.168.6.2
742 09:45:01.689733 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
743 09:45:01.694330 setenv serverip 192.168.6.2
745 09:45:01.795924 => tftpboot 0x01080000 921927/tftp-deploy-6hkxdezz/kernel/uImage
746 09:45:01.796793 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
747 09:45:01.803543 tftpboot 0x01080000 921927/tftp-deploy-6hkxdezz/kernel/uImage
748 09:45:01.804104 Speed: 1000, full duplex
749 09:45:01.804557 Using ethernet@ff3f0000 device
750 09:45:01.809036 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
751 09:45:01.814531 Filename '921927/tftp-deploy-6hkxdezz/kernel/uImage'.
752 09:45:01.818488 Load address: 0x1080000
753 09:45:04.671931 Loading: *################################################## 43.8 MiB
754 09:45:04.672653 15.3 MiB/s
755 09:45:04.673105 done
756 09:45:04.676236 Bytes transferred = 45908544 (2bc8240 hex)
758 09:45:04.777772 => tftpboot 0x08000000 921927/tftp-deploy-6hkxdezz/ramdisk/ramdisk.cpio.gz.uboot
759 09:45:04.778438 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
760 09:45:04.785291 tftpboot 0x08000000 921927/tftp-deploy-6hkxdezz/ramdisk/ramdisk.cpio.gz.uboot
761 09:45:04.785788 Speed: 1000, full duplex
762 09:45:04.786220 Using ethernet@ff3f0000 device
763 09:45:04.790666 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
764 09:45:04.800455 Filename '921927/tftp-deploy-6hkxdezz/ramdisk/ramdisk.cpio.gz.uboot'.
765 09:45:04.800954 Load address: 0x8000000
766 09:45:14.132247 Loading: *#########################T ######################## UDP wrong checksum 0000000f 0000f19d
767 09:45:19.133499 T UDP wrong checksum 0000000f 0000f19d
768 09:45:24.145367 T UDP wrong checksum 000000ff 00001f34
769 09:45:24.190504 UDP wrong checksum 000000ff 0000aa26
770 09:45:25.021714 UDP wrong checksum 000000ff 00009701
771 09:45:25.035278 UDP wrong checksum 000000ff 00002cf4
772 09:45:29.135392 T UDP wrong checksum 0000000f 0000f19d
773 09:45:39.420129 T T UDP wrong checksum 000000ff 0000f0b7
774 09:45:39.467742 UDP wrong checksum 000000ff 00008aaa
775 09:45:49.139555 T T UDP wrong checksum 0000000f 0000f19d
776 09:45:58.249771 T UDP wrong checksum 000000ff 000050c6
777 09:45:58.299344 UDP wrong checksum 000000ff 0000ecb8
778 09:46:04.143378 T
779 09:46:04.144100 Retry count exceeded; starting again
781 09:46:04.145621 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
784 09:46:04.147618 end: 2.4 uboot-commands (duration 00:01:22) [common]
786 09:46:04.149158 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
788 09:46:04.150291 end: 2 uboot-action (duration 00:01:22) [common]
790 09:46:04.151973 Cleaning after the job
791 09:46:04.152638 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/ramdisk
792 09:46:04.154085 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/kernel
793 09:46:04.203382 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/dtb
794 09:46:04.204295 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921927/tftp-deploy-6hkxdezz/modules
795 09:46:04.223641 start: 4.1 power-off (timeout 00:00:30) [common]
796 09:46:04.224368 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
797 09:46:04.257698 >> OK - accepted request
798 09:46:04.259840 Returned 0 in 0 seconds
799 09:46:04.360889 end: 4.1 power-off (duration 00:00:00) [common]
801 09:46:04.361942 start: 4.2 read-feedback (timeout 00:10:00) [common]
802 09:46:04.362614 Listened to connection for namespace 'common' for up to 1s
803 09:46:05.363589 Finalising connection for namespace 'common'
804 09:46:05.364495 Disconnecting from shell: Finalise
805 09:46:05.365011 =>
806 09:46:05.466085 end: 4.2 read-feedback (duration 00:00:01) [common]
807 09:46:05.466882 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/921927
808 09:46:06.268483 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/921927
809 09:46:06.269121 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.