Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 10:07:02.654238 lava-dispatcher, installed at version: 2024.01
2 10:07:02.655680 start: 0 validate
3 10:07:02.656265 Start time: 2024-11-01 10:07:02.656233+00:00 (UTC)
4 10:07:02.656887 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 10:07:02.657498 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 10:07:02.702606 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 10:07:02.703149 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 10:07:02.737909 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 10:07:02.738530 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 10:07:02.774226 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 10:07:02.774747 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 10:07:02.809741 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 10:07:02.810248 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 10:07:02.854480 validate duration: 0.20
16 10:07:02.855944 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 10:07:02.856570 start: 1.1 download-retry (timeout 00:10:00) [common]
18 10:07:02.857145 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 10:07:02.858072 Not decompressing ramdisk as can be used compressed.
20 10:07:02.858829 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 10:07:02.859330 saving as /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/ramdisk/initrd.cpio.gz
22 10:07:02.859819 total size: 5628169 (5 MB)
23 10:07:02.902758 progress 0 % (0 MB)
24 10:07:02.910512 progress 5 % (0 MB)
25 10:07:02.918210 progress 10 % (0 MB)
26 10:07:02.925010 progress 15 % (0 MB)
27 10:07:02.932507 progress 20 % (1 MB)
28 10:07:02.937803 progress 25 % (1 MB)
29 10:07:02.941760 progress 30 % (1 MB)
30 10:07:02.945727 progress 35 % (1 MB)
31 10:07:02.949343 progress 40 % (2 MB)
32 10:07:02.953238 progress 45 % (2 MB)
33 10:07:02.956760 progress 50 % (2 MB)
34 10:07:02.960736 progress 55 % (2 MB)
35 10:07:02.964603 progress 60 % (3 MB)
36 10:07:02.968074 progress 65 % (3 MB)
37 10:07:02.971926 progress 70 % (3 MB)
38 10:07:02.975398 progress 75 % (4 MB)
39 10:07:02.979266 progress 80 % (4 MB)
40 10:07:02.982607 progress 85 % (4 MB)
41 10:07:02.986183 progress 90 % (4 MB)
42 10:07:02.989872 progress 95 % (5 MB)
43 10:07:02.993080 progress 100 % (5 MB)
44 10:07:02.993715 5 MB downloaded in 0.13 s (40.09 MB/s)
45 10:07:02.994249 end: 1.1.1 http-download (duration 00:00:00) [common]
47 10:07:02.995118 end: 1.1 download-retry (duration 00:00:00) [common]
48 10:07:02.995402 start: 1.2 download-retry (timeout 00:10:00) [common]
49 10:07:02.995671 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 10:07:02.996160 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/kernel/Image
51 10:07:02.996410 saving as /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/kernel/Image
52 10:07:02.996620 total size: 45908480 (43 MB)
53 10:07:02.996830 No compression specified
54 10:07:03.033802 progress 0 % (0 MB)
55 10:07:03.062044 progress 5 % (2 MB)
56 10:07:03.089885 progress 10 % (4 MB)
57 10:07:03.117638 progress 15 % (6 MB)
58 10:07:03.145588 progress 20 % (8 MB)
59 10:07:03.173220 progress 25 % (10 MB)
60 10:07:03.200473 progress 30 % (13 MB)
61 10:07:03.227752 progress 35 % (15 MB)
62 10:07:03.255115 progress 40 % (17 MB)
63 10:07:03.282464 progress 45 % (19 MB)
64 10:07:03.310007 progress 50 % (21 MB)
65 10:07:03.338084 progress 55 % (24 MB)
66 10:07:03.365852 progress 60 % (26 MB)
67 10:07:03.393406 progress 65 % (28 MB)
68 10:07:03.421393 progress 70 % (30 MB)
69 10:07:03.449012 progress 75 % (32 MB)
70 10:07:03.476707 progress 80 % (35 MB)
71 10:07:03.504561 progress 85 % (37 MB)
72 10:07:03.532219 progress 90 % (39 MB)
73 10:07:03.559793 progress 95 % (41 MB)
74 10:07:03.586761 progress 100 % (43 MB)
75 10:07:03.587283 43 MB downloaded in 0.59 s (74.12 MB/s)
76 10:07:03.587751 end: 1.2.1 http-download (duration 00:00:01) [common]
78 10:07:03.588587 end: 1.2 download-retry (duration 00:00:01) [common]
79 10:07:03.588864 start: 1.3 download-retry (timeout 00:09:59) [common]
80 10:07:03.589126 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 10:07:03.589601 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 10:07:03.589851 saving as /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/dtb/meson-g12b-a311d-libretech-cc.dtb
83 10:07:03.590057 total size: 54703 (0 MB)
84 10:07:03.590265 No compression specified
85 10:07:03.633382 progress 59 % (0 MB)
86 10:07:03.634244 progress 100 % (0 MB)
87 10:07:03.634789 0 MB downloaded in 0.04 s (1.17 MB/s)
88 10:07:03.635244 end: 1.3.1 http-download (duration 00:00:00) [common]
90 10:07:03.636088 end: 1.3 download-retry (duration 00:00:00) [common]
91 10:07:03.636361 start: 1.4 download-retry (timeout 00:09:59) [common]
92 10:07:03.636625 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 10:07:03.637078 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 10:07:03.637317 saving as /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/nfsrootfs/full.rootfs.tar
95 10:07:03.637520 total size: 120894716 (115 MB)
96 10:07:03.637729 Using unxz to decompress xz
97 10:07:03.682182 progress 0 % (0 MB)
98 10:07:04.569495 progress 5 % (5 MB)
99 10:07:05.414530 progress 10 % (11 MB)
100 10:07:06.206234 progress 15 % (17 MB)
101 10:07:06.942650 progress 20 % (23 MB)
102 10:07:07.533668 progress 25 % (28 MB)
103 10:07:08.358025 progress 30 % (34 MB)
104 10:07:09.147837 progress 35 % (40 MB)
105 10:07:09.516228 progress 40 % (46 MB)
106 10:07:09.893064 progress 45 % (51 MB)
107 10:07:10.626593 progress 50 % (57 MB)
108 10:07:11.519123 progress 55 % (63 MB)
109 10:07:12.307883 progress 60 % (69 MB)
110 10:07:13.068867 progress 65 % (74 MB)
111 10:07:13.850628 progress 70 % (80 MB)
112 10:07:14.687205 progress 75 % (86 MB)
113 10:07:15.511904 progress 80 % (92 MB)
114 10:07:16.371776 progress 85 % (98 MB)
115 10:07:17.291850 progress 90 % (103 MB)
116 10:07:18.117846 progress 95 % (109 MB)
117 10:07:19.010904 progress 100 % (115 MB)
118 10:07:19.025621 115 MB downloaded in 15.39 s (7.49 MB/s)
119 10:07:19.026592 end: 1.4.1 http-download (duration 00:00:15) [common]
121 10:07:19.028318 end: 1.4 download-retry (duration 00:00:15) [common]
122 10:07:19.028868 start: 1.5 download-retry (timeout 00:09:44) [common]
123 10:07:19.029388 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 10:07:19.030230 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/modules.tar.xz
125 10:07:19.030691 saving as /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/modules/modules.tar
126 10:07:19.031116 total size: 11594840 (11 MB)
127 10:07:19.031576 Using unxz to decompress xz
128 10:07:19.076991 progress 0 % (0 MB)
129 10:07:19.160402 progress 5 % (0 MB)
130 10:07:19.240122 progress 10 % (1 MB)
131 10:07:19.323948 progress 15 % (1 MB)
132 10:07:19.401874 progress 20 % (2 MB)
133 10:07:19.478606 progress 25 % (2 MB)
134 10:07:19.559057 progress 30 % (3 MB)
135 10:07:19.631805 progress 35 % (3 MB)
136 10:07:19.711713 progress 40 % (4 MB)
137 10:07:19.798333 progress 45 % (5 MB)
138 10:07:19.876473 progress 50 % (5 MB)
139 10:07:20.045953 progress 55 % (6 MB)
140 10:07:20.204920 progress 60 % (6 MB)
141 10:07:20.305222 progress 65 % (7 MB)
142 10:07:20.394506 progress 70 % (7 MB)
143 10:07:20.489084 progress 75 % (8 MB)
144 10:07:20.571741 progress 80 % (8 MB)
145 10:07:20.649174 progress 85 % (9 MB)
146 10:07:20.722801 progress 90 % (9 MB)
147 10:07:20.825092 progress 95 % (10 MB)
148 10:07:20.916551 progress 100 % (11 MB)
149 10:07:20.931910 11 MB downloaded in 1.90 s (5.82 MB/s)
150 10:07:20.932935 end: 1.5.1 http-download (duration 00:00:02) [common]
152 10:07:20.934699 end: 1.5 download-retry (duration 00:00:02) [common]
153 10:07:20.935267 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 10:07:20.935833 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 10:07:37.127005 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/921977/extract-nfsrootfs-etew31w8
156 10:07:37.127613 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 10:07:37.127897 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 10:07:37.128651 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_
159 10:07:37.129105 makedir: /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin
160 10:07:37.129429 makedir: /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/tests
161 10:07:37.129746 makedir: /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/results
162 10:07:37.130078 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-add-keys
163 10:07:37.130591 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-add-sources
164 10:07:37.131096 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-background-process-start
165 10:07:37.131590 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-background-process-stop
166 10:07:37.132145 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-common-functions
167 10:07:37.132663 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-echo-ipv4
168 10:07:37.133149 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-install-packages
169 10:07:37.133621 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-installed-packages
170 10:07:37.134087 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-os-build
171 10:07:37.134583 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-probe-channel
172 10:07:37.135120 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-probe-ip
173 10:07:37.135607 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-target-ip
174 10:07:37.136110 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-target-mac
175 10:07:37.136664 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-target-storage
176 10:07:37.137154 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-test-case
177 10:07:37.137639 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-test-event
178 10:07:37.138107 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-test-feedback
179 10:07:37.138600 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-test-raise
180 10:07:37.139105 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-test-reference
181 10:07:37.139578 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-test-runner
182 10:07:37.140169 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-test-set
183 10:07:37.140692 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-test-shell
184 10:07:37.141179 Updating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-add-keys (debian)
185 10:07:37.141701 Updating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-add-sources (debian)
186 10:07:37.142198 Updating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-install-packages (debian)
187 10:07:37.142691 Updating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-installed-packages (debian)
188 10:07:37.143176 Updating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/bin/lava-os-build (debian)
189 10:07:37.143605 Creating /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/environment
190 10:07:37.143967 LAVA metadata
191 10:07:37.144249 - LAVA_JOB_ID=921977
192 10:07:37.144462 - LAVA_DISPATCHER_IP=192.168.6.2
193 10:07:37.144815 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 10:07:37.145756 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 10:07:37.146063 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 10:07:37.146270 skipped lava-vland-overlay
197 10:07:37.146507 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 10:07:37.146757 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 10:07:37.146971 skipped lava-multinode-overlay
200 10:07:37.147209 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 10:07:37.147456 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 10:07:37.147703 Loading test definitions
203 10:07:37.147970 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 10:07:37.148299 Using /lava-921977 at stage 0
205 10:07:37.149407 uuid=921977_1.6.2.4.1 testdef=None
206 10:07:37.149714 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 10:07:37.149972 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 10:07:37.151505 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 10:07:37.152312 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 10:07:37.154199 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 10:07:37.155008 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 10:07:37.156814 runner path: /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/0/tests/0_timesync-off test_uuid 921977_1.6.2.4.1
215 10:07:37.157350 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 10:07:37.158149 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 10:07:37.158366 Using /lava-921977 at stage 0
219 10:07:37.158714 Fetching tests from https://github.com/kernelci/test-definitions.git
220 10:07:37.158998 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/0/tests/1_kselftest-alsa'
221 10:07:40.508750 Running '/usr/bin/git checkout kernelci.org
222 10:07:40.914023 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 10:07:40.915470 uuid=921977_1.6.2.4.5 testdef=None
224 10:07:40.915811 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 10:07:40.917327 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 10:07:40.923228 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 10:07:40.924997 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 10:07:40.932782 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 10:07:40.934580 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 10:07:40.942239 runner path: /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/0/tests/1_kselftest-alsa test_uuid 921977_1.6.2.4.5
234 10:07:40.942808 BOARD='meson-g12b-a311d-libretech-cc'
235 10:07:40.943250 BRANCH='next'
236 10:07:40.943678 SKIPFILE='/dev/null'
237 10:07:40.944139 SKIP_INSTALL='True'
238 10:07:40.944567 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 10:07:40.945003 TST_CASENAME=''
240 10:07:40.945431 TST_CMDFILES='alsa'
241 10:07:40.946520 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 10:07:40.948233 Creating lava-test-runner.conf files
244 10:07:40.948672 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/921977/lava-overlay-3_dnhzy_/lava-921977/0 for stage 0
245 10:07:40.949355 - 0_timesync-off
246 10:07:40.949847 - 1_kselftest-alsa
247 10:07:40.950520 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 10:07:40.951102 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 10:08:04.200215 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 10:08:04.200652 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 10:08:04.200913 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 10:08:04.201179 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 10:08:04.201439 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 10:08:04.818110 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 10:08:04.818600 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 10:08:04.818872 extracting modules file /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/modules/modules.tar to /var/lib/lava/dispatcher/tmp/921977/extract-nfsrootfs-etew31w8
257 10:08:06.182976 extracting modules file /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/modules/modules.tar to /var/lib/lava/dispatcher/tmp/921977/extract-overlay-ramdisk-04byuq_f/ramdisk
258 10:08:07.579216 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 10:08:07.579696 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 10:08:07.579973 [common] Applying overlay to NFS
261 10:08:07.580216 [common] Applying overlay /var/lib/lava/dispatcher/tmp/921977/compress-overlay-5wtly9fk/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/921977/extract-nfsrootfs-etew31w8
262 10:08:10.304965 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 10:08:10.305441 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 10:08:10.305710 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 10:08:10.305937 Converting downloaded kernel to a uImage
266 10:08:10.306243 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/kernel/Image /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/kernel/uImage
267 10:08:10.769598 output: Image Name:
268 10:08:10.770038 output: Created: Fri Nov 1 10:08:10 2024
269 10:08:10.770255 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 10:08:10.770457 output: Data Size: 45908480 Bytes = 44832.50 KiB = 43.78 MiB
271 10:08:10.770656 output: Load Address: 01080000
272 10:08:10.770855 output: Entry Point: 01080000
273 10:08:10.771050 output:
274 10:08:10.771385 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 10:08:10.771650 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 10:08:10.771915 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 10:08:10.772216 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 10:08:10.772479 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 10:08:10.772748 Building ramdisk /var/lib/lava/dispatcher/tmp/921977/extract-overlay-ramdisk-04byuq_f/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/921977/extract-overlay-ramdisk-04byuq_f/ramdisk
280 10:08:12.999761 >> 167186 blocks
281 10:08:20.771771 Adding RAMdisk u-boot header.
282 10:08:20.772463 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/921977/extract-overlay-ramdisk-04byuq_f/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/921977/extract-overlay-ramdisk-04byuq_f/ramdisk.cpio.gz.uboot
283 10:08:21.018738 output: Image Name:
284 10:08:21.019170 output: Created: Fri Nov 1 10:08:20 2024
285 10:08:21.019382 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 10:08:21.019588 output: Data Size: 23443071 Bytes = 22893.62 KiB = 22.36 MiB
287 10:08:21.019793 output: Load Address: 00000000
288 10:08:21.020085 output: Entry Point: 00000000
289 10:08:21.020547 output:
290 10:08:21.021638 rename /var/lib/lava/dispatcher/tmp/921977/extract-overlay-ramdisk-04byuq_f/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/ramdisk/ramdisk.cpio.gz.uboot
291 10:08:21.022409 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 10:08:21.023002 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 10:08:21.023576 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 10:08:21.024111 No LXC device requested
295 10:08:21.024665 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 10:08:21.025223 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 10:08:21.025767 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 10:08:21.026217 Checking files for TFTP limit of 4294967296 bytes.
299 10:08:21.029180 end: 1 tftp-deploy (duration 00:01:18) [common]
300 10:08:21.029810 start: 2 uboot-action (timeout 00:05:00) [common]
301 10:08:21.030385 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 10:08:21.030925 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 10:08:21.031473 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 10:08:21.032075 Using kernel file from prepare-kernel: 921977/tftp-deploy-17mbb7op/kernel/uImage
305 10:08:21.032766 substitutions:
306 10:08:21.033214 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 10:08:21.033658 - {DTB_ADDR}: 0x01070000
308 10:08:21.034098 - {DTB}: 921977/tftp-deploy-17mbb7op/dtb/meson-g12b-a311d-libretech-cc.dtb
309 10:08:21.034544 - {INITRD}: 921977/tftp-deploy-17mbb7op/ramdisk/ramdisk.cpio.gz.uboot
310 10:08:21.034983 - {KERNEL_ADDR}: 0x01080000
311 10:08:21.035415 - {KERNEL}: 921977/tftp-deploy-17mbb7op/kernel/uImage
312 10:08:21.035847 - {LAVA_MAC}: None
313 10:08:21.036394 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/921977/extract-nfsrootfs-etew31w8
314 10:08:21.036841 - {NFS_SERVER_IP}: 192.168.6.2
315 10:08:21.037274 - {PRESEED_CONFIG}: None
316 10:08:21.037707 - {PRESEED_LOCAL}: None
317 10:08:21.038138 - {RAMDISK_ADDR}: 0x08000000
318 10:08:21.038566 - {RAMDISK}: 921977/tftp-deploy-17mbb7op/ramdisk/ramdisk.cpio.gz.uboot
319 10:08:21.038997 - {ROOT_PART}: None
320 10:08:21.039426 - {ROOT}: None
321 10:08:21.039854 - {SERVER_IP}: 192.168.6.2
322 10:08:21.040315 - {TEE_ADDR}: 0x83000000
323 10:08:21.040743 - {TEE}: None
324 10:08:21.041168 Parsed boot commands:
325 10:08:21.041583 - setenv autoload no
326 10:08:21.042010 - setenv initrd_high 0xffffffff
327 10:08:21.042433 - setenv fdt_high 0xffffffff
328 10:08:21.042854 - dhcp
329 10:08:21.043274 - setenv serverip 192.168.6.2
330 10:08:21.043699 - tftpboot 0x01080000 921977/tftp-deploy-17mbb7op/kernel/uImage
331 10:08:21.044153 - tftpboot 0x08000000 921977/tftp-deploy-17mbb7op/ramdisk/ramdisk.cpio.gz.uboot
332 10:08:21.044582 - tftpboot 0x01070000 921977/tftp-deploy-17mbb7op/dtb/meson-g12b-a311d-libretech-cc.dtb
333 10:08:21.045010 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/921977/extract-nfsrootfs-etew31w8,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 10:08:21.045450 - bootm 0x01080000 0x08000000 0x01070000
335 10:08:21.045998 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 10:08:21.047614 start: 2.3 connect-device (timeout 00:05:00) [common]
338 10:08:21.048100 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 10:08:21.063702 Setting prompt string to ['lava-test: # ']
340 10:08:21.065376 end: 2.3 connect-device (duration 00:00:00) [common]
341 10:08:21.066040 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 10:08:21.066671 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 10:08:21.067268 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 10:08:21.068502 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 10:08:21.111064 >> OK - accepted request
346 10:08:21.113446 Returned 0 in 0 seconds
347 10:08:21.214691 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 10:08:21.216636 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 10:08:21.217249 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 10:08:21.217849 Setting prompt string to ['Hit any key to stop autoboot']
352 10:08:21.218353 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 10:08:21.220122 Trying 192.168.56.21...
354 10:08:21.220662 Connected to conserv1.
355 10:08:21.221124 Escape character is '^]'.
356 10:08:21.221568
357 10:08:21.222019 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 10:08:21.222480
359 10:08:32.719704 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
360 10:08:32.720448 bl2_stage_init 0x81
361 10:08:32.725460 hw id: 0x0000 - pwm id 0x01
362 10:08:32.726086 bl2_stage_init 0xc1
363 10:08:32.726545 bl2_stage_init 0x02
364 10:08:32.727008
365 10:08:32.730676 L0:00000000
366 10:08:32.731251 L1:20000703
367 10:08:32.731733 L2:00008067
368 10:08:32.732236 L3:14000000
369 10:08:32.732680 B2:00402000
370 10:08:32.736331 B1:e0f83180
371 10:08:32.736843
372 10:08:32.737304 TE: 58150
373 10:08:32.737754
374 10:08:32.741807 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
375 10:08:32.742299
376 10:08:32.742755 Board ID = 1
377 10:08:32.747409 Set A53 clk to 24M
378 10:08:32.747903 Set A73 clk to 24M
379 10:08:32.748397 Set clk81 to 24M
380 10:08:32.753060 A53 clk: 1200 MHz
381 10:08:32.753545 A73 clk: 1200 MHz
382 10:08:32.753992 CLK81: 166.6M
383 10:08:32.754420 smccc: 00012aac
384 10:08:32.758599 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
385 10:08:32.764330 board id: 1
386 10:08:32.770024 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
387 10:08:32.780698 fw parse done
388 10:08:32.786628 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
389 10:08:32.829378 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
390 10:08:32.840335 PIEI prepare done
391 10:08:32.840907 fastboot data load
392 10:08:32.841347 fastboot data verify
393 10:08:32.845923 verify result: 266
394 10:08:32.851406 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
395 10:08:32.851925 LPDDR4 probe
396 10:08:32.852447 ddr clk to 1584MHz
397 10:08:32.859476 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
398 10:08:32.896727
399 10:08:32.897305 dmc_version 0001
400 10:08:32.903331 Check phy result
401 10:08:32.909179 INFO : End of CA training
402 10:08:32.909654 INFO : End of initialization
403 10:08:32.914778 INFO : Training has run successfully!
404 10:08:32.915274 Check phy result
405 10:08:32.920598 INFO : End of initialization
406 10:08:32.921062 INFO : End of read enable training
407 10:08:32.923661 INFO : End of fine write leveling
408 10:08:32.929244 INFO : End of Write leveling coarse delay
409 10:08:32.934848 INFO : Training has run successfully!
410 10:08:32.935372 Check phy result
411 10:08:32.935842 INFO : End of initialization
412 10:08:32.940385 INFO : End of read dq deskew training
413 10:08:32.946020 INFO : End of MPR read delay center optimization
414 10:08:32.946532 INFO : End of write delay center optimization
415 10:08:32.951650 INFO : End of read delay center optimization
416 10:08:32.957233 INFO : End of max read latency training
417 10:08:32.957745 INFO : Training has run successfully!
418 10:08:32.962833 1D training succeed
419 10:08:32.968809 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
420 10:08:33.016725 Check phy result
421 10:08:33.017330 INFO : End of initialization
422 10:08:33.038247 INFO : End of 2D read delay Voltage center optimization
423 10:08:33.057631 INFO : End of 2D read delay Voltage center optimization
424 10:08:33.109706 INFO : End of 2D write delay Voltage center optimization
425 10:08:33.159418 INFO : End of 2D write delay Voltage center optimization
426 10:08:33.164590 INFO : Training has run successfully!
427 10:08:33.165153
428 10:08:33.165607 channel==0
429 10:08:33.170315 RxClkDly_Margin_A0==88 ps 9
430 10:08:33.170882 TxDqDly_Margin_A0==98 ps 10
431 10:08:33.173620 RxClkDly_Margin_A1==88 ps 9
432 10:08:33.174090 TxDqDly_Margin_A1==98 ps 10
433 10:08:33.179159 TrainedVREFDQ_A0==74
434 10:08:33.179627 TrainedVREFDQ_A1==74
435 10:08:33.180106 VrefDac_Margin_A0==25
436 10:08:33.184767 DeviceVref_Margin_A0==40
437 10:08:33.185278 VrefDac_Margin_A1==25
438 10:08:33.190293 DeviceVref_Margin_A1==40
439 10:08:33.190803
440 10:08:33.191246
441 10:08:33.191695 channel==1
442 10:08:33.192165 RxClkDly_Margin_A0==88 ps 9
443 10:08:33.194006 TxDqDly_Margin_A0==88 ps 9
444 10:08:33.199526 RxClkDly_Margin_A1==88 ps 9
445 10:08:33.200072 TxDqDly_Margin_A1==88 ps 9
446 10:08:33.200548 TrainedVREFDQ_A0==76
447 10:08:33.205066 TrainedVREFDQ_A1==77
448 10:08:33.205567 VrefDac_Margin_A0==23
449 10:08:33.210684 DeviceVref_Margin_A0==38
450 10:08:33.211184 VrefDac_Margin_A1==24
451 10:08:33.211621 DeviceVref_Margin_A1==37
452 10:08:33.212114
453 10:08:33.219891 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
454 10:08:33.220453
455 10:08:33.248811 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
456 10:08:33.249455 2D training succeed
457 10:08:33.254416 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
458 10:08:33.260035 auto size-- 65535DDR cs0 size: 2048MB
459 10:08:33.260557 DDR cs1 size: 2048MB
460 10:08:33.265630 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
461 10:08:33.266157 cs0 DataBus test pass
462 10:08:33.271211 cs1 DataBus test pass
463 10:08:33.271703 cs0 AddrBus test pass
464 10:08:33.272174 cs1 AddrBus test pass
465 10:08:33.272607
466 10:08:33.276777 100bdlr_step_size ps== 420
467 10:08:33.277246 result report
468 10:08:33.277679 boot times 0Enable ddr reg access
469 10:08:33.287234 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
470 10:08:33.300714 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
471 10:08:33.874705 0.0;M3 CHK:0;cm4_sp_mode 0
472 10:08:33.875389 MVN_1=0x00000000
473 10:08:33.879893 MVN_2=0x00000000
474 10:08:33.885629 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
475 10:08:33.886139 OPS=0x10
476 10:08:33.886594 ring efuse init
477 10:08:33.887036 chipver efuse init
478 10:08:33.894031 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
479 10:08:33.894572 [0.018961 Inits done]
480 10:08:33.895023 secure task start!
481 10:08:33.900599 high task start!
482 10:08:33.901176 low task start!
483 10:08:33.901651 run into bl31
484 10:08:33.908241 NOTICE: BL31: v1.3(release):4fc40b1
485 10:08:33.915853 NOTICE: BL31: Built : 15:58:17, May 22 2019
486 10:08:33.916374 NOTICE: BL31: G12A normal boot!
487 10:08:33.941305 NOTICE: BL31: BL33 decompress pass
488 10:08:33.946892 ERROR: Error initializing runtime service opteed_fast
489 10:08:35.179904
490 10:08:35.180604
491 10:08:35.188224 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
492 10:08:35.188716
493 10:08:35.189177 Model: Libre Computer AML-A311D-CC Alta
494 10:08:35.396731 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
495 10:08:35.420077 DRAM: 2 GiB (effective 3.8 GiB)
496 10:08:35.563257 Core: 408 devices, 31 uclasses, devicetree: separate
497 10:08:35.568910 WDT: Not starting watchdog@f0d0
498 10:08:35.601258 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
499 10:08:35.613776 Loading Environment from FAT... Card did not respond to voltage select! : -110
500 10:08:35.618530 ** Bad device specification mmc 0 **
501 10:08:35.629012 Card did not respond to voltage select! : -110
502 10:08:35.636587 ** Bad device specification mmc 0 **
503 10:08:35.637195 Couldn't find partition mmc 0
504 10:08:35.644989 Card did not respond to voltage select! : -110
505 10:08:35.650388 ** Bad device specification mmc 0 **
506 10:08:35.651007 Couldn't find partition mmc 0
507 10:08:35.655444 Error: could not access storage.
508 10:08:36.919905 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
509 10:08:36.920627 bl2_stage_init 0x81
510 10:08:36.925313 hw id: 0x0000 - pwm id 0x01
511 10:08:36.925822 bl2_stage_init 0xc1
512 10:08:36.926282 bl2_stage_init 0x02
513 10:08:36.926732
514 10:08:36.930899 L0:00000000
515 10:08:36.931382 L1:20000703
516 10:08:36.931837 L2:00008067
517 10:08:36.932314 L3:14000000
518 10:08:36.932749 B2:00402000
519 10:08:36.933730 B1:e0f83180
520 10:08:36.934193
521 10:08:36.934638 TE: 58150
522 10:08:36.935124
523 10:08:36.944904 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
524 10:08:36.945457
525 10:08:36.945956 Board ID = 1
526 10:08:36.946686 Set A53 clk to 24M
527 10:08:36.947157 Set A73 clk to 24M
528 10:08:36.950529 Set clk81 to 24M
529 10:08:36.951058 A53 clk: 1200 MHz
530 10:08:36.951542 A73 clk: 1200 MHz
531 10:08:36.956151 CLK81: 166.6M
532 10:08:36.956671 smccc: 00012aac
533 10:08:36.961724 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
534 10:08:36.962211 board id: 1
535 10:08:36.970291 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
536 10:08:36.980954 fw parse done
537 10:08:36.986918 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
538 10:08:37.029603 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
539 10:08:37.040542 PIEI prepare done
540 10:08:37.041056 fastboot data load
541 10:08:37.041514 fastboot data verify
542 10:08:37.046379 verify result: 266
543 10:08:37.051889 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
544 10:08:37.052438 LPDDR4 probe
545 10:08:37.052887 ddr clk to 1584MHz
546 10:08:37.059737 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
547 10:08:37.097021
548 10:08:37.097419 dmc_version 0001
549 10:08:37.103683 Check phy result
550 10:08:37.109525 INFO : End of CA training
551 10:08:37.109980 INFO : End of initialization
552 10:08:37.115141 INFO : Training has run successfully!
553 10:08:37.115476 Check phy result
554 10:08:37.120865 INFO : End of initialization
555 10:08:37.121339 INFO : End of read enable training
556 10:08:37.126328 INFO : End of fine write leveling
557 10:08:37.131929 INFO : End of Write leveling coarse delay
558 10:08:37.132287 INFO : Training has run successfully!
559 10:08:37.132508 Check phy result
560 10:08:37.137740 INFO : End of initialization
561 10:08:37.138076 INFO : End of read dq deskew training
562 10:08:37.143181 INFO : End of MPR read delay center optimization
563 10:08:37.148876 INFO : End of write delay center optimization
564 10:08:37.154443 INFO : End of read delay center optimization
565 10:08:37.154792 INFO : End of max read latency training
566 10:08:37.160133 INFO : Training has run successfully!
567 10:08:37.160709 1D training succeed
568 10:08:37.169145 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 10:08:37.217118 Check phy result
570 10:08:37.217692 INFO : End of initialization
571 10:08:37.238388 INFO : End of 2D read delay Voltage center optimization
572 10:08:37.258523 INFO : End of 2D read delay Voltage center optimization
573 10:08:37.310393 INFO : End of 2D write delay Voltage center optimization
574 10:08:37.359696 INFO : End of 2D write delay Voltage center optimization
575 10:08:37.365190 INFO : Training has run successfully!
576 10:08:37.365679
577 10:08:37.366105 channel==0
578 10:08:37.370776 RxClkDly_Margin_A0==88 ps 9
579 10:08:37.371243 TxDqDly_Margin_A0==98 ps 10
580 10:08:37.376354 RxClkDly_Margin_A1==88 ps 9
581 10:08:37.376815 TxDqDly_Margin_A1==98 ps 10
582 10:08:37.377233 TrainedVREFDQ_A0==74
583 10:08:37.381954 TrainedVREFDQ_A1==74
584 10:08:37.382430 VrefDac_Margin_A0==25
585 10:08:37.382841 DeviceVref_Margin_A0==40
586 10:08:37.387761 VrefDac_Margin_A1==25
587 10:08:37.388311 DeviceVref_Margin_A1==40
588 10:08:37.388738
589 10:08:37.389149
590 10:08:37.393239 channel==1
591 10:08:37.393705 RxClkDly_Margin_A0==98 ps 10
592 10:08:37.394116 TxDqDly_Margin_A0==98 ps 10
593 10:08:37.398740 RxClkDly_Margin_A1==98 ps 10
594 10:08:37.399215 TxDqDly_Margin_A1==98 ps 10
595 10:08:37.404336 TrainedVREFDQ_A0==77
596 10:08:37.404802 TrainedVREFDQ_A1==77
597 10:08:37.405214 VrefDac_Margin_A0==23
598 10:08:37.409956 DeviceVref_Margin_A0==37
599 10:08:37.410413 VrefDac_Margin_A1==22
600 10:08:37.415550 DeviceVref_Margin_A1==37
601 10:08:37.416029
602 10:08:37.416445 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
603 10:08:37.421141
604 10:08:37.449156 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
605 10:08:37.449702 2D training succeed
606 10:08:37.454826 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
607 10:08:37.460398 auto size-- 65535DDR cs0 size: 2048MB
608 10:08:37.460880 DDR cs1 size: 2048MB
609 10:08:37.465979 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
610 10:08:37.466443 cs0 DataBus test pass
611 10:08:37.471572 cs1 DataBus test pass
612 10:08:37.472078 cs0 AddrBus test pass
613 10:08:37.472516 cs1 AddrBus test pass
614 10:08:37.472928
615 10:08:37.477149 100bdlr_step_size ps== 420
616 10:08:37.477624 result report
617 10:08:37.482742 boot times 0Enable ddr reg access
618 10:08:37.488278 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
619 10:08:37.501734 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
620 10:08:38.073837 0.0;M3 CHK:0;cm4_sp_mode 0
621 10:08:38.074481 MVN_1=0x00000000
622 10:08:38.079192 MVN_2=0x00000000
623 10:08:38.084935 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
624 10:08:38.085437 OPS=0x10
625 10:08:38.085850 ring efuse init
626 10:08:38.086261 chipver efuse init
627 10:08:38.090539 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
628 10:08:38.096186 [0.018961 Inits done]
629 10:08:38.096512 secure task start!
630 10:08:38.096808 high task start!
631 10:08:38.100770 low task start!
632 10:08:38.101085 run into bl31
633 10:08:38.107377 NOTICE: BL31: v1.3(release):4fc40b1
634 10:08:38.115206 NOTICE: BL31: Built : 15:58:17, May 22 2019
635 10:08:38.115595 NOTICE: BL31: G12A normal boot!
636 10:08:38.140582 NOTICE: BL31: BL33 decompress pass
637 10:08:38.146292 ERROR: Error initializing runtime service opteed_fast
638 10:08:39.379553
639 10:08:39.380334
640 10:08:39.388051 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
641 10:08:39.389023
642 10:08:39.389938 Model: Libre Computer AML-A311D-CC Alta
643 10:08:39.596309 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
644 10:08:39.619630 DRAM: 2 GiB (effective 3.8 GiB)
645 10:08:39.762741 Core: 408 devices, 31 uclasses, devicetree: separate
646 10:08:39.768590 WDT: Not starting watchdog@f0d0
647 10:08:39.800789 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
648 10:08:39.813063 Loading Environment from FAT... Card did not respond to voltage select! : -110
649 10:08:39.818264 ** Bad device specification mmc 0 **
650 10:08:39.828508 Card did not respond to voltage select! : -110
651 10:08:39.836194 ** Bad device specification mmc 0 **
652 10:08:39.836752 Couldn't find partition mmc 0
653 10:08:39.844568 Card did not respond to voltage select! : -110
654 10:08:39.850122 ** Bad device specification mmc 0 **
655 10:08:39.851099 Couldn't find partition mmc 0
656 10:08:39.855102 Error: could not access storage.
657 10:08:40.197713 Net: eth0: ethernet@ff3f0000
658 10:08:40.198440 starting USB...
659 10:08:40.449476 Bus usb@ff500000: Register 3000140 NbrPorts 3
660 10:08:40.450199 Starting the controller
661 10:08:40.456276 USB XHCI 1.10
662 10:08:42.170018 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
663 10:08:42.170826 bl2_stage_init 0x01
664 10:08:42.171389 bl2_stage_init 0x81
665 10:08:42.175820 hw id: 0x0000 - pwm id 0x01
666 10:08:42.176495 bl2_stage_init 0xc1
667 10:08:42.177108 bl2_stage_init 0x02
668 10:08:42.177639
669 10:08:42.181333 L0:00000000
670 10:08:42.181944 L1:20000703
671 10:08:42.182410 L2:00008067
672 10:08:42.182856 L3:14000000
673 10:08:42.187012 B2:00402000
674 10:08:42.188058 B1:e0f83180
675 10:08:42.188857
676 10:08:42.189775 TE: 58167
677 10:08:42.190551
678 10:08:42.192735 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
679 10:08:42.193653
680 10:08:42.194518 Board ID = 1
681 10:08:42.198172 Set A53 clk to 24M
682 10:08:42.199055 Set A73 clk to 24M
683 10:08:42.199905 Set clk81 to 24M
684 10:08:42.203654 A53 clk: 1200 MHz
685 10:08:42.204236 A73 clk: 1200 MHz
686 10:08:42.204730 CLK81: 166.6M
687 10:08:42.205206 smccc: 00012abe
688 10:08:42.209182 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
689 10:08:42.214899 board id: 1
690 10:08:42.220825 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
691 10:08:42.231451 fw parse done
692 10:08:42.237442 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
693 10:08:42.279934 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
694 10:08:42.290735 PIEI prepare done
695 10:08:42.291047 fastboot data load
696 10:08:42.291291 fastboot data verify
697 10:08:42.296372 verify result: 266
698 10:08:42.301918 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
699 10:08:42.302318 LPDDR4 probe
700 10:08:42.302650 ddr clk to 1584MHz
701 10:08:42.309912 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
702 10:08:42.347401
703 10:08:42.348052 dmc_version 0001
704 10:08:42.354018 Check phy result
705 10:08:42.359905 INFO : End of CA training
706 10:08:42.360460 INFO : End of initialization
707 10:08:42.365543 INFO : Training has run successfully!
708 10:08:42.366065 Check phy result
709 10:08:42.371070 INFO : End of initialization
710 10:08:42.371586 INFO : End of read enable training
711 10:08:42.376799 INFO : End of fine write leveling
712 10:08:42.382243 INFO : End of Write leveling coarse delay
713 10:08:42.382770 INFO : Training has run successfully!
714 10:08:42.383232 Check phy result
715 10:08:42.387821 INFO : End of initialization
716 10:08:42.388359 INFO : End of read dq deskew training
717 10:08:42.393491 INFO : End of MPR read delay center optimization
718 10:08:42.399069 INFO : End of write delay center optimization
719 10:08:42.404755 INFO : End of read delay center optimization
720 10:08:42.405272 INFO : End of max read latency training
721 10:08:42.410296 INFO : Training has run successfully!
722 10:08:42.410816 1D training succeed
723 10:08:42.419451 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
724 10:08:42.467098 Check phy result
725 10:08:42.467687 INFO : End of initialization
726 10:08:42.489616 INFO : End of 2D read delay Voltage center optimization
727 10:08:42.509960 INFO : End of 2D read delay Voltage center optimization
728 10:08:42.561970 INFO : End of 2D write delay Voltage center optimization
729 10:08:42.611399 INFO : End of 2D write delay Voltage center optimization
730 10:08:42.616854 INFO : Training has run successfully!
731 10:08:42.617417
732 10:08:42.617880 channel==0
733 10:08:42.622491 RxClkDly_Margin_A0==88 ps 9
734 10:08:42.623001 TxDqDly_Margin_A0==98 ps 10
735 10:08:42.628157 RxClkDly_Margin_A1==78 ps 8
736 10:08:42.628672 TxDqDly_Margin_A1==88 ps 9
737 10:08:42.629132 TrainedVREFDQ_A0==74
738 10:08:42.633751 TrainedVREFDQ_A1==74
739 10:08:42.634262 VrefDac_Margin_A0==24
740 10:08:42.634710 DeviceVref_Margin_A0==40
741 10:08:42.639343 VrefDac_Margin_A1==25
742 10:08:42.639849 DeviceVref_Margin_A1==40
743 10:08:42.640359
744 10:08:42.640813
745 10:08:42.641262 channel==1
746 10:08:42.644915 RxClkDly_Margin_A0==98 ps 10
747 10:08:42.645430 TxDqDly_Margin_A0==88 ps 9
748 10:08:42.650538 RxClkDly_Margin_A1==88 ps 9
749 10:08:42.651045 TxDqDly_Margin_A1==98 ps 10
750 10:08:42.656165 TrainedVREFDQ_A0==76
751 10:08:42.656674 TrainedVREFDQ_A1==77
752 10:08:42.657132 VrefDac_Margin_A0==22
753 10:08:42.661641 DeviceVref_Margin_A0==38
754 10:08:42.662144 VrefDac_Margin_A1==24
755 10:08:42.667246 DeviceVref_Margin_A1==37
756 10:08:42.667766
757 10:08:42.668270 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
758 10:08:42.668726
759 10:08:42.700832 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000017 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
760 10:08:42.701389 2D training succeed
761 10:08:42.706470 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
762 10:08:42.712026 auto size-- 65535DDR cs0 size: 2048MB
763 10:08:42.712553 DDR cs1 size: 2048MB
764 10:08:42.717597 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
765 10:08:42.718111 cs0 DataBus test pass
766 10:08:42.723174 cs1 DataBus test pass
767 10:08:42.723683 cs0 AddrBus test pass
768 10:08:42.724176 cs1 AddrBus test pass
769 10:08:42.724628
770 10:08:42.728772 100bdlr_step_size ps== 420
771 10:08:42.729287 result report
772 10:08:42.734366 boot times 0Enable ddr reg access
773 10:08:42.739623 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
774 10:08:42.753111 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
775 10:08:43.326158 0.0;M3 CHK:0;cm4_sp_mode 0
776 10:08:43.326793 MVN_1=0x00000000
777 10:08:43.331678 MVN_2=0x00000000
778 10:08:43.337455 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
779 10:08:43.337975 OPS=0x10
780 10:08:43.338420 ring efuse init
781 10:08:43.338852 chipver efuse init
782 10:08:43.343042 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
783 10:08:43.348627 [0.018961 Inits done]
784 10:08:43.349120 secure task start!
785 10:08:43.349555 high task start!
786 10:08:43.353201 low task start!
787 10:08:43.353697 run into bl31
788 10:08:43.359856 NOTICE: BL31: v1.3(release):4fc40b1
789 10:08:43.367685 NOTICE: BL31: Built : 15:58:17, May 22 2019
790 10:08:43.368221 NOTICE: BL31: G12A normal boot!
791 10:08:43.393008 NOTICE: BL31: BL33 decompress pass
792 10:08:43.398713 ERROR: Error initializing runtime service opteed_fast
793 10:08:44.631642
794 10:08:44.632347
795 10:08:44.640106 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
796 10:08:44.640627
797 10:08:44.641088 Model: Libre Computer AML-A311D-CC Alta
798 10:08:44.848452 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
799 10:08:44.871893 DRAM: 2 GiB (effective 3.8 GiB)
800 10:08:45.014895 Core: 408 devices, 31 uclasses, devicetree: separate
801 10:08:45.020757 WDT: Not starting watchdog@f0d0
802 10:08:45.053089 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
803 10:08:45.065483 Loading Environment from FAT... Card did not respond to voltage select! : -110
804 10:08:45.070423 ** Bad device specification mmc 0 **
805 10:08:45.080818 Card did not respond to voltage select! : -110
806 10:08:45.088419 ** Bad device specification mmc 0 **
807 10:08:45.088930 Couldn't find partition mmc 0
808 10:08:45.096807 Card did not respond to voltage select! : -110
809 10:08:45.102299 ** Bad device specification mmc 0 **
810 10:08:45.102805 Couldn't find partition mmc 0
811 10:08:45.107342 Error: could not access storage.
812 10:08:45.450834 Net: eth0: ethernet@ff3f0000
813 10:08:45.451428 starting USB...
814 10:08:45.702636 Bus usb@ff500000: Register 3000140 NbrPorts 3
815 10:08:45.703231 Starting the controller
816 10:08:45.709631 USB XHCI 1.10
817 10:08:47.871665 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
818 10:08:47.872382 bl2_stage_init 0x01
819 10:08:47.872861 bl2_stage_init 0x81
820 10:08:47.877108 hw id: 0x0000 - pwm id 0x01
821 10:08:47.877649 bl2_stage_init 0xc1
822 10:08:47.878109 bl2_stage_init 0x02
823 10:08:47.878563
824 10:08:47.882702 L0:00000000
825 10:08:47.883244 L1:20000703
826 10:08:47.883701 L2:00008067
827 10:08:47.884187 L3:14000000
828 10:08:47.885667 B2:00402000
829 10:08:47.886192 B1:e0f83180
830 10:08:47.886648
831 10:08:47.887100 TE: 58159
832 10:08:47.887552
833 10:08:47.896831 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
834 10:08:47.897424
835 10:08:47.897890 Board ID = 1
836 10:08:47.898336 Set A53 clk to 24M
837 10:08:47.898776 Set A73 clk to 24M
838 10:08:47.902498 Set clk81 to 24M
839 10:08:47.903048 A53 clk: 1200 MHz
840 10:08:47.903506 A73 clk: 1200 MHz
841 10:08:47.905889 CLK81: 166.6M
842 10:08:47.906421 smccc: 00012ab4
843 10:08:47.911481 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
844 10:08:47.917080 board id: 1
845 10:08:47.922209 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
846 10:08:47.932857 fw parse done
847 10:08:47.938829 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
848 10:08:47.981346 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
849 10:08:47.992349 PIEI prepare done
850 10:08:47.992919 fastboot data load
851 10:08:47.993389 fastboot data verify
852 10:08:47.997831 verify result: 266
853 10:08:48.003562 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
854 10:08:48.004159 LPDDR4 probe
855 10:08:48.004625 ddr clk to 1584MHz
856 10:08:48.011454 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
857 10:08:48.048713
858 10:08:48.049306 dmc_version 0001
859 10:08:48.055341 Check phy result
860 10:08:48.061091 INFO : End of CA training
861 10:08:48.061569 INFO : End of initialization
862 10:08:48.066709 INFO : Training has run successfully!
863 10:08:48.067174 Check phy result
864 10:08:48.072416 INFO : End of initialization
865 10:08:48.072879 INFO : End of read enable training
866 10:08:48.075606 INFO : End of fine write leveling
867 10:08:48.081185 INFO : End of Write leveling coarse delay
868 10:08:48.086780 INFO : Training has run successfully!
869 10:08:48.087244 Check phy result
870 10:08:48.087659 INFO : End of initialization
871 10:08:48.092479 INFO : End of read dq deskew training
872 10:08:48.097968 INFO : End of MPR read delay center optimization
873 10:08:48.098437 INFO : End of write delay center optimization
874 10:08:48.103573 INFO : End of read delay center optimization
875 10:08:48.109201 INFO : End of max read latency training
876 10:08:48.109667 INFO : Training has run successfully!
877 10:08:48.114780 1D training succeed
878 10:08:48.120739 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
879 10:08:48.168362 Check phy result
880 10:08:48.168865 INFO : End of initialization
881 10:08:48.190897 INFO : End of 2D read delay Voltage center optimization
882 10:08:48.211137 INFO : End of 2D read delay Voltage center optimization
883 10:08:48.263174 INFO : End of 2D write delay Voltage center optimization
884 10:08:48.312679 INFO : End of 2D write delay Voltage center optimization
885 10:08:48.318122 INFO : Training has run successfully!
886 10:08:48.318593
887 10:08:48.319011 channel==0
888 10:08:48.323715 RxClkDly_Margin_A0==88 ps 9
889 10:08:48.324217 TxDqDly_Margin_A0==98 ps 10
890 10:08:48.329313 RxClkDly_Margin_A1==88 ps 9
891 10:08:48.329779 TxDqDly_Margin_A1==98 ps 10
892 10:08:48.330219 TrainedVREFDQ_A0==74
893 10:08:48.334993 TrainedVREFDQ_A1==74
894 10:08:48.335527 VrefDac_Margin_A0==25
895 10:08:48.335952 DeviceVref_Margin_A0==40
896 10:08:48.340563 VrefDac_Margin_A1==24
897 10:08:48.341085 DeviceVref_Margin_A1==40
898 10:08:48.341532
899 10:08:48.341976
900 10:08:48.346139 channel==1
901 10:08:48.346629 RxClkDly_Margin_A0==98 ps 10
902 10:08:48.347067 TxDqDly_Margin_A0==88 ps 9
903 10:08:48.351669 RxClkDly_Margin_A1==98 ps 10
904 10:08:48.352204 TxDqDly_Margin_A1==98 ps 10
905 10:08:48.357298 TrainedVREFDQ_A0==76
906 10:08:48.357792 TrainedVREFDQ_A1==78
907 10:08:48.358228 VrefDac_Margin_A0==22
908 10:08:48.362880 DeviceVref_Margin_A0==38
909 10:08:48.363363 VrefDac_Margin_A1==22
910 10:08:48.368543 DeviceVref_Margin_A1==36
911 10:08:48.369036
912 10:08:48.369469 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
913 10:08:48.374065
914 10:08:48.401983 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000017 00000018 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
915 10:08:48.402540 2D training succeed
916 10:08:48.407667 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
917 10:08:48.413341 auto size-- 65535DDR cs0 size: 2048MB
918 10:08:48.413925 DDR cs1 size: 2048MB
919 10:08:48.418918 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
920 10:08:48.419495 cs0 DataBus test pass
921 10:08:48.424591 cs1 DataBus test pass
922 10:08:48.425172 cs0 AddrBus test pass
923 10:08:48.425618 cs1 AddrBus test pass
924 10:08:48.426051
925 10:08:48.430057 100bdlr_step_size ps== 420
926 10:08:48.430649 result report
927 10:08:48.435715 boot times 0Enable ddr reg access
928 10:08:48.441156 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
929 10:08:48.454613 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
930 10:08:49.028350 0.0;M3 CHK:0;cm4_sp_mode 0
931 10:08:49.029022 MVN_1=0x00000000
932 10:08:49.033861 MVN_2=0x00000000
933 10:08:49.039694 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
934 10:08:49.040330 OPS=0x10
935 10:08:49.040833 ring efuse init
936 10:08:49.041309 chipver efuse init
937 10:08:49.045265 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
938 10:08:49.050696 [0.018960 Inits done]
939 10:08:49.051274 secure task start!
940 10:08:49.051761 high task start!
941 10:08:49.055358 low task start!
942 10:08:49.055929 run into bl31
943 10:08:49.061961 NOTICE: BL31: v1.3(release):4fc40b1
944 10:08:49.069758 NOTICE: BL31: Built : 15:58:17, May 22 2019
945 10:08:49.070358 NOTICE: BL31: G12A normal boot!
946 10:08:49.095247 NOTICE: BL31: BL33 decompress pass
947 10:08:49.100974 ERROR: Error initializing runtime service opteed_fast
948 10:08:50.333867
949 10:08:50.334512
950 10:08:50.342148 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
951 10:08:50.342700
952 10:08:50.343177 Model: Libre Computer AML-A311D-CC Alta
953 10:08:50.550668 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
954 10:08:50.573974 DRAM: 2 GiB (effective 3.8 GiB)
955 10:08:50.717021 Core: 408 devices, 31 uclasses, devicetree: separate
956 10:08:50.722828 WDT: Not starting watchdog@f0d0
957 10:08:50.755116 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
958 10:08:50.767601 Loading Environment from FAT... Card did not respond to voltage select! : -110
959 10:08:50.772599 ** Bad device specification mmc 0 **
960 10:08:50.782880 Card did not respond to voltage select! : -110
961 10:08:50.790585 ** Bad device specification mmc 0 **
962 10:08:50.791181 Couldn't find partition mmc 0
963 10:08:50.798875 Card did not respond to voltage select! : -110
964 10:08:50.804380 ** Bad device specification mmc 0 **
965 10:08:50.804946 Couldn't find partition mmc 0
966 10:08:50.809458 Error: could not access storage.
967 10:08:51.152988 Net: eth0: ethernet@ff3f0000
968 10:08:51.153632 starting USB...
969 10:08:51.404830 Bus usb@ff500000: Register 3000140 NbrPorts 3
970 10:08:51.405473 Starting the controller
971 10:08:51.411750 USB XHCI 1.10
972 10:08:53.271449 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
973 10:08:53.272235 bl2_stage_init 0x81
974 10:08:53.276986 hw id: 0x0000 - pwm id 0x01
975 10:08:53.277550 bl2_stage_init 0xc1
976 10:08:53.278048 bl2_stage_init 0x02
977 10:08:53.278532
978 10:08:53.282587 L0:00000000
979 10:08:53.283147 L1:20000703
980 10:08:53.283636 L2:00008067
981 10:08:53.284155 L3:14000000
982 10:08:53.284634 B2:00402000
983 10:08:53.288206 B1:e0f83180
984 10:08:53.288731
985 10:08:53.289202 TE: 58150
986 10:08:53.289662
987 10:08:53.293809 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
988 10:08:53.294342
989 10:08:53.294812 Board ID = 1
990 10:08:53.299376 Set A53 clk to 24M
991 10:08:53.299897 Set A73 clk to 24M
992 10:08:53.300384 Set clk81 to 24M
993 10:08:53.304978 A53 clk: 1200 MHz
994 10:08:53.305488 A73 clk: 1200 MHz
995 10:08:53.305934 CLK81: 166.6M
996 10:08:53.306375 smccc: 00012aac
997 10:08:53.310577 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
998 10:08:53.316267 board id: 1
999 10:08:53.322023 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1000 10:08:53.332706 fw parse done
1001 10:08:53.338636 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1002 10:08:53.381250 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1003 10:08:53.392605 PIEI prepare done
1004 10:08:53.393140 fastboot data load
1005 10:08:53.393781 fastboot data verify
1006 10:08:53.397936 verify result: 266
1007 10:08:53.403481 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1008 10:08:53.404158 LPDDR4 probe
1009 10:08:53.404675 ddr clk to 1584MHz
1010 10:08:53.411519 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1011 10:08:53.448983
1012 10:08:53.449951 dmc_version 0001
1013 10:08:53.455504 Check phy result
1014 10:08:53.461359 INFO : End of CA training
1015 10:08:53.461942 INFO : End of initialization
1016 10:08:53.466883 INFO : Training has run successfully!
1017 10:08:53.467467 Check phy result
1018 10:08:53.472685 INFO : End of initialization
1019 10:08:53.473281 INFO : End of read enable training
1020 10:08:53.475869 INFO : End of fine write leveling
1021 10:08:53.481385 INFO : End of Write leveling coarse delay
1022 10:08:53.487212 INFO : Training has run successfully!
1023 10:08:53.487814 Check phy result
1024 10:08:53.488332 INFO : End of initialization
1025 10:08:53.492554 INFO : End of read dq deskew training
1026 10:08:53.496092 INFO : End of MPR read delay center optimization
1027 10:08:53.501621 INFO : End of write delay center optimization
1028 10:08:53.507309 INFO : End of read delay center optimization
1029 10:08:53.507903 INFO : End of max read latency training
1030 10:08:53.512827 INFO : Training has run successfully!
1031 10:08:53.513424 1D training succeed
1032 10:08:53.520863 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1033 10:08:53.568519 Check phy result
1034 10:08:53.569284 INFO : End of initialization
1035 10:08:53.590282 INFO : End of 2D read delay Voltage center optimization
1036 10:08:53.611898 INFO : End of 2D read delay Voltage center optimization
1037 10:08:53.662437 INFO : End of 2D write delay Voltage center optimization
1038 10:08:53.711911 INFO : End of 2D write delay Voltage center optimization
1039 10:08:53.717841 INFO : Training has run successfully!
1040 10:08:53.718975
1041 10:08:53.719230 channel==0
1042 10:08:53.723208 RxClkDly_Margin_A0==88 ps 9
1043 10:08:53.724108 TxDqDly_Margin_A0==98 ps 10
1044 10:08:53.728715 RxClkDly_Margin_A1==88 ps 9
1045 10:08:53.729143 TxDqDly_Margin_A1==98 ps 10
1046 10:08:53.729363 TrainedVREFDQ_A0==74
1047 10:08:53.735211 TrainedVREFDQ_A1==75
1048 10:08:53.736315 VrefDac_Margin_A0==25
1049 10:08:53.736586 DeviceVref_Margin_A0==40
1050 10:08:53.740108 VrefDac_Margin_A1==25
1051 10:08:53.740513 DeviceVref_Margin_A1==39
1052 10:08:53.740756
1053 10:08:53.740987
1054 10:08:53.746142 channel==1
1055 10:08:53.746611 RxClkDly_Margin_A0==98 ps 10
1056 10:08:53.746871 TxDqDly_Margin_A0==98 ps 10
1057 10:08:53.751751 RxClkDly_Margin_A1==88 ps 9
1058 10:08:53.752448 TxDqDly_Margin_A1==98 ps 10
1059 10:08:53.756996 TrainedVREFDQ_A0==77
1060 10:08:53.757593 TrainedVREFDQ_A1==77
1061 10:08:53.758022 VrefDac_Margin_A0==22
1062 10:08:53.762262 DeviceVref_Margin_A0==37
1063 10:08:53.762818 VrefDac_Margin_A1==24
1064 10:08:53.767779 DeviceVref_Margin_A1==37
1065 10:08:53.768349
1066 10:08:53.768769 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1067 10:08:53.773343
1068 10:08:53.801418 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 0000005f
1069 10:08:53.802203 2D training succeed
1070 10:08:53.807131 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1071 10:08:53.812564 auto size-- 65535DDR cs0 size: 2048MB
1072 10:08:53.813329 DDR cs1 size: 2048MB
1073 10:08:53.818121 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1074 10:08:53.818833 cs0 DataBus test pass
1075 10:08:53.823689 cs1 DataBus test pass
1076 10:08:53.824433 cs0 AddrBus test pass
1077 10:08:53.824957 cs1 AddrBus test pass
1078 10:08:53.825466
1079 10:08:53.829505 100bdlr_step_size ps== 420
1080 10:08:53.829893 result report
1081 10:08:53.834924 boot times 0Enable ddr reg access
1082 10:08:53.840360 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1083 10:08:53.853791 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1084 10:08:54.427375 0.0;M3 CHK:0;cm4_sp_mode 0
1085 10:08:54.427801 MVN_1=0x00000000
1086 10:08:54.432820 MVN_2=0x00000000
1087 10:08:54.438538 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1088 10:08:54.438827 OPS=0x10
1089 10:08:54.439122 ring efuse init
1090 10:08:54.439399 chipver efuse init
1091 10:08:54.444205 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1092 10:08:54.449862 [0.018960 Inits done]
1093 10:08:54.450247 secure task start!
1094 10:08:54.450499 high task start!
1095 10:08:54.454325 low task start!
1096 10:08:54.454643 run into bl31
1097 10:08:54.461078 NOTICE: BL31: v1.3(release):4fc40b1
1098 10:08:54.468805 NOTICE: BL31: Built : 15:58:17, May 22 2019
1099 10:08:54.469355 NOTICE: BL31: G12A normal boot!
1100 10:08:54.494246 NOTICE: BL31: BL33 decompress pass
1101 10:08:54.500046 ERROR: Error initializing runtime service opteed_fast
1102 10:08:55.732716
1103 10:08:55.733296
1104 10:08:55.741135 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1105 10:08:55.741468
1106 10:08:55.741690 Model: Libre Computer AML-A311D-CC Alta
1107 10:08:55.950534 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1108 10:08:55.972987 DRAM: 2 GiB (effective 3.8 GiB)
1109 10:08:56.117110 Core: 408 devices, 31 uclasses, devicetree: separate
1110 10:08:56.121791 WDT: Not starting watchdog@f0d0
1111 10:08:56.154932 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1112 10:08:56.166518 Loading Environment from FAT... Card did not respond to voltage select! : -110
1113 10:08:56.172089 ** Bad device specification mmc 0 **
1114 10:08:56.181843 Card did not respond to voltage select! : -110
1115 10:08:56.190385 ** Bad device specification mmc 0 **
1116 10:08:56.191894 Couldn't find partition mmc 0
1117 10:08:56.197799 Card did not respond to voltage select! : -110
1118 10:08:56.203327 ** Bad device specification mmc 0 **
1119 10:08:56.203876 Couldn't find partition mmc 0
1120 10:08:56.208413 Error: could not access storage.
1121 10:08:56.552012 Net: eth0: ethernet@ff3f0000
1122 10:08:56.552722 starting USB...
1123 10:08:56.803765 Bus usb@ff500000: Register 3000140 NbrPorts 3
1124 10:08:56.804488 Starting the controller
1125 10:08:56.810751 USB XHCI 1.10
1126 10:08:58.366977 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1127 10:08:58.375136 scanning usb for storage devices... 0 Storage Device(s) found
1129 10:08:58.426935 Hit any key to stop autoboot: 1
1130 10:08:58.427746 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1131 10:08:58.428398 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1132 10:08:58.428907 Setting prompt string to ['=>']
1133 10:08:58.429418 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1134 10:08:58.442612 0
1135 10:08:58.443566 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1136 10:08:58.444155 Sending with 10 millisecond of delay
1138 10:08:59.579266 => setenv autoload no
1139 10:08:59.590178 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1140 10:08:59.595612 setenv autoload no
1141 10:08:59.596422 Sending with 10 millisecond of delay
1143 10:09:01.394350 => setenv initrd_high 0xffffffff
1144 10:09:01.405218 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1145 10:09:01.406136 setenv initrd_high 0xffffffff
1146 10:09:01.406904 Sending with 10 millisecond of delay
1148 10:09:03.024208 => setenv fdt_high 0xffffffff
1149 10:09:03.035066 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1150 10:09:03.035965 setenv fdt_high 0xffffffff
1151 10:09:03.036793 Sending with 10 millisecond of delay
1153 10:09:03.328765 => dhcp
1154 10:09:03.339612 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1155 10:09:03.340622 dhcp
1156 10:09:03.341117 Speed: 1000, full duplex
1157 10:09:03.341588 BOOTP broadcast 1
1158 10:09:03.581867 DHCP client bound to address 192.168.6.27 (242 ms)
1159 10:09:03.582748 Sending with 10 millisecond of delay
1161 10:09:05.260530 => setenv serverip 192.168.6.2
1162 10:09:05.271432 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1163 10:09:05.272485 setenv serverip 192.168.6.2
1164 10:09:05.273356 Sending with 10 millisecond of delay
1166 10:09:08.999778 => tftpboot 0x01080000 921977/tftp-deploy-17mbb7op/kernel/uImage
1167 10:09:09.010473 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1168 10:09:09.011475 tftpboot 0x01080000 921977/tftp-deploy-17mbb7op/kernel/uImage
1169 10:09:09.011950 Speed: 1000, full duplex
1170 10:09:09.012460 Using ethernet@ff3f0000 device
1171 10:09:09.013390 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1172 10:09:09.018622 Filename '921977/tftp-deploy-17mbb7op/kernel/uImage'.
1173 10:09:09.022605 Load address: 0x1080000
1174 10:09:11.811462 Loading: *################################################## 43.8 MiB
1175 10:09:11.812191 15.7 MiB/s
1176 10:09:11.812686 done
1177 10:09:11.816096 Bytes transferred = 45908544 (2bc8240 hex)
1178 10:09:11.816927 Sending with 10 millisecond of delay
1180 10:09:16.505664 => tftpboot 0x08000000 921977/tftp-deploy-17mbb7op/ramdisk/ramdisk.cpio.gz.uboot
1181 10:09:16.516252 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1182 10:09:16.516799 tftpboot 0x08000000 921977/tftp-deploy-17mbb7op/ramdisk/ramdisk.cpio.gz.uboot
1183 10:09:16.517046 Speed: 1000, full duplex
1184 10:09:16.517264 Using ethernet@ff3f0000 device
1185 10:09:16.519021 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1186 10:09:16.530758 Filename '921977/tftp-deploy-17mbb7op/ramdisk/ramdisk.cpio.gz.uboot'.
1187 10:09:16.531067 Load address: 0x8000000
1188 10:09:23.000877 Loading: *#########################T ######################## UDP wrong checksum 00000005 0000866d
1189 10:09:28.001959 T UDP wrong checksum 00000005 0000866d
1190 10:09:38.004865 T T UDP wrong checksum 00000005 0000866d
1191 10:09:58.008445 T T T T UDP wrong checksum 00000005 0000866d
1192 10:10:13.012769 T T
1193 10:10:13.013197 Retry count exceeded; starting again
1195 10:10:13.014046 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1198 10:10:13.014984 end: 2.4 uboot-commands (duration 00:01:52) [common]
1200 10:10:13.015668 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1202 10:10:13.016278 end: 2 uboot-action (duration 00:01:52) [common]
1204 10:10:13.017108 Cleaning after the job
1205 10:10:13.017423 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/ramdisk
1206 10:10:13.018457 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/kernel
1207 10:10:13.022393 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/dtb
1208 10:10:13.023066 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/nfsrootfs
1209 10:10:13.049517 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921977/tftp-deploy-17mbb7op/modules
1210 10:10:13.056194 start: 4.1 power-off (timeout 00:00:30) [common]
1211 10:10:13.056772 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1212 10:10:13.089708 >> OK - accepted request
1213 10:10:13.091416 Returned 0 in 0 seconds
1214 10:10:13.192179 end: 4.1 power-off (duration 00:00:00) [common]
1216 10:10:13.193162 start: 4.2 read-feedback (timeout 00:10:00) [common]
1217 10:10:13.193819 Listened to connection for namespace 'common' for up to 1s
1218 10:10:14.194726 Finalising connection for namespace 'common'
1219 10:10:14.195212 Disconnecting from shell: Finalise
1220 10:10:14.195510 =>
1221 10:10:14.296200 end: 4.2 read-feedback (duration 00:00:01) [common]
1222 10:10:14.296595 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/921977
1223 10:10:17.291065 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/921977
1224 10:10:17.291678 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.