Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 10:18:23.069849 lava-dispatcher, installed at version: 2024.01
2 10:18:23.070692 start: 0 validate
3 10:18:23.071163 Start time: 2024-11-01 10:18:23.071134+00:00 (UTC)
4 10:18:23.071716 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 10:18:23.072286 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 10:18:23.115152 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 10:18:23.115689 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 10:18:23.144903 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 10:18:23.145507 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 10:18:23.176269 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 10:18:23.176749 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 10:18:23.210334 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 10:18:23.210812 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 10:18:23.253569 validate duration: 0.18
16 10:18:23.255117 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 10:18:23.255750 start: 1.1 download-retry (timeout 00:10:00) [common]
18 10:18:23.256420 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 10:18:23.257380 Not decompressing ramdisk as can be used compressed.
20 10:18:23.258149 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 10:18:23.258680 saving as /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/ramdisk/initrd.cpio.gz
22 10:18:23.259204 total size: 5628140 (5 MB)
23 10:18:23.301742 progress 0 % (0 MB)
24 10:18:23.309630 progress 5 % (0 MB)
25 10:18:23.317581 progress 10 % (0 MB)
26 10:18:23.324675 progress 15 % (0 MB)
27 10:18:23.330358 progress 20 % (1 MB)
28 10:18:23.334093 progress 25 % (1 MB)
29 10:18:23.338204 progress 30 % (1 MB)
30 10:18:23.342302 progress 35 % (1 MB)
31 10:18:23.346015 progress 40 % (2 MB)
32 10:18:23.350079 progress 45 % (2 MB)
33 10:18:23.353770 progress 50 % (2 MB)
34 10:18:23.357786 progress 55 % (2 MB)
35 10:18:23.361955 progress 60 % (3 MB)
36 10:18:23.365563 progress 65 % (3 MB)
37 10:18:23.369540 progress 70 % (3 MB)
38 10:18:23.373161 progress 75 % (4 MB)
39 10:18:23.377189 progress 80 % (4 MB)
40 10:18:23.380804 progress 85 % (4 MB)
41 10:18:23.384721 progress 90 % (4 MB)
42 10:18:23.388574 progress 95 % (5 MB)
43 10:18:23.391872 progress 100 % (5 MB)
44 10:18:23.392569 5 MB downloaded in 0.13 s (40.25 MB/s)
45 10:18:23.393129 end: 1.1.1 http-download (duration 00:00:00) [common]
47 10:18:23.394047 end: 1.1 download-retry (duration 00:00:00) [common]
48 10:18:23.394347 start: 1.2 download-retry (timeout 00:10:00) [common]
49 10:18:23.394625 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 10:18:23.395090 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/kernel/Image
51 10:18:23.395343 saving as /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/kernel/Image
52 10:18:23.395557 total size: 45908480 (43 MB)
53 10:18:23.395772 No compression specified
54 10:18:23.433921 progress 0 % (0 MB)
55 10:18:23.461895 progress 5 % (2 MB)
56 10:18:23.489535 progress 10 % (4 MB)
57 10:18:23.517288 progress 15 % (6 MB)
58 10:18:23.545152 progress 20 % (8 MB)
59 10:18:23.573056 progress 25 % (10 MB)
60 10:18:23.600334 progress 30 % (13 MB)
61 10:18:23.627447 progress 35 % (15 MB)
62 10:18:23.654830 progress 40 % (17 MB)
63 10:18:23.682128 progress 45 % (19 MB)
64 10:18:23.709653 progress 50 % (21 MB)
65 10:18:23.737188 progress 55 % (24 MB)
66 10:18:23.764994 progress 60 % (26 MB)
67 10:18:23.792518 progress 65 % (28 MB)
68 10:18:23.820119 progress 70 % (30 MB)
69 10:18:23.847917 progress 75 % (32 MB)
70 10:18:23.875420 progress 80 % (35 MB)
71 10:18:23.903048 progress 85 % (37 MB)
72 10:18:23.930725 progress 90 % (39 MB)
73 10:18:23.958490 progress 95 % (41 MB)
74 10:18:23.985745 progress 100 % (43 MB)
75 10:18:23.986244 43 MB downloaded in 0.59 s (74.12 MB/s)
76 10:18:23.986733 end: 1.2.1 http-download (duration 00:00:01) [common]
78 10:18:23.987563 end: 1.2 download-retry (duration 00:00:01) [common]
79 10:18:23.987847 start: 1.3 download-retry (timeout 00:09:59) [common]
80 10:18:23.988149 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 10:18:23.988624 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 10:18:23.988878 saving as /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/dtb/meson-g12b-a311d-libretech-cc.dtb
83 10:18:23.989090 total size: 54703 (0 MB)
84 10:18:23.989299 No compression specified
85 10:18:24.031443 progress 59 % (0 MB)
86 10:18:24.032331 progress 100 % (0 MB)
87 10:18:24.032896 0 MB downloaded in 0.04 s (1.19 MB/s)
88 10:18:24.033363 end: 1.3.1 http-download (duration 00:00:00) [common]
90 10:18:24.034193 end: 1.3 download-retry (duration 00:00:00) [common]
91 10:18:24.034458 start: 1.4 download-retry (timeout 00:09:59) [common]
92 10:18:24.034727 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 10:18:24.035175 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 10:18:24.035423 saving as /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/nfsrootfs/full.rootfs.tar
95 10:18:24.035629 total size: 474398908 (452 MB)
96 10:18:24.035840 Using unxz to decompress xz
97 10:18:24.071129 progress 0 % (0 MB)
98 10:18:25.168119 progress 5 % (22 MB)
99 10:18:26.653609 progress 10 % (45 MB)
100 10:18:27.108249 progress 15 % (67 MB)
101 10:18:27.934705 progress 20 % (90 MB)
102 10:18:28.473932 progress 25 % (113 MB)
103 10:18:28.834825 progress 30 % (135 MB)
104 10:18:29.440319 progress 35 % (158 MB)
105 10:18:30.356602 progress 40 % (181 MB)
106 10:18:31.206411 progress 45 % (203 MB)
107 10:18:31.814311 progress 50 % (226 MB)
108 10:18:32.462469 progress 55 % (248 MB)
109 10:18:33.688444 progress 60 % (271 MB)
110 10:18:35.084841 progress 65 % (294 MB)
111 10:18:36.659753 progress 70 % (316 MB)
112 10:18:39.751135 progress 75 % (339 MB)
113 10:18:42.182355 progress 80 % (361 MB)
114 10:18:45.082852 progress 85 % (384 MB)
115 10:18:48.211785 progress 90 % (407 MB)
116 10:18:51.376816 progress 95 % (429 MB)
117 10:18:54.534950 progress 100 % (452 MB)
118 10:18:54.552231 452 MB downloaded in 30.52 s (14.83 MB/s)
119 10:18:54.552932 end: 1.4.1 http-download (duration 00:00:31) [common]
121 10:18:54.555056 end: 1.4 download-retry (duration 00:00:31) [common]
122 10:18:54.555675 start: 1.5 download-retry (timeout 00:09:29) [common]
123 10:18:54.556267 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 10:18:54.557092 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/modules.tar.xz
125 10:18:54.557594 saving as /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/modules/modules.tar
126 10:18:54.558010 total size: 11594840 (11 MB)
127 10:18:54.558435 Using unxz to decompress xz
128 10:18:54.608410 progress 0 % (0 MB)
129 10:18:54.690334 progress 5 % (0 MB)
130 10:18:54.792368 progress 10 % (1 MB)
131 10:18:54.896154 progress 15 % (1 MB)
132 10:18:54.982595 progress 20 % (2 MB)
133 10:18:55.060202 progress 25 % (2 MB)
134 10:18:55.145492 progress 30 % (3 MB)
135 10:18:55.218791 progress 35 % (3 MB)
136 10:18:55.298122 progress 40 % (4 MB)
137 10:18:55.386136 progress 45 % (5 MB)
138 10:18:55.462433 progress 50 % (5 MB)
139 10:18:55.548240 progress 55 % (6 MB)
140 10:18:55.628693 progress 60 % (6 MB)
141 10:18:55.712338 progress 65 % (7 MB)
142 10:18:55.787011 progress 70 % (7 MB)
143 10:18:55.870609 progress 75 % (8 MB)
144 10:18:55.952308 progress 80 % (8 MB)
145 10:18:56.028706 progress 85 % (9 MB)
146 10:18:56.100994 progress 90 % (9 MB)
147 10:18:56.202445 progress 95 % (10 MB)
148 10:18:56.294886 progress 100 % (11 MB)
149 10:18:56.309434 11 MB downloaded in 1.75 s (6.31 MB/s)
150 10:18:56.310057 end: 1.5.1 http-download (duration 00:00:02) [common]
152 10:18:56.310923 end: 1.5 download-retry (duration 00:00:02) [common]
153 10:18:56.311200 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 10:18:56.311473 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 10:19:11.526760 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/922001/extract-nfsrootfs-c04mz73x
156 10:19:11.527371 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 10:19:11.527664 start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
158 10:19:11.528343 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy
159 10:19:11.528818 makedir: /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin
160 10:19:11.529156 makedir: /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/tests
161 10:19:11.529469 makedir: /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/results
162 10:19:11.529808 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-add-keys
163 10:19:11.530345 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-add-sources
164 10:19:11.530860 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-background-process-start
165 10:19:11.531367 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-background-process-stop
166 10:19:11.531896 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-common-functions
167 10:19:11.532440 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-echo-ipv4
168 10:19:11.532935 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-install-packages
169 10:19:11.533430 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-installed-packages
170 10:19:11.534001 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-os-build
171 10:19:11.534500 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-probe-channel
172 10:19:11.534979 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-probe-ip
173 10:19:11.535463 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-target-ip
174 10:19:11.535963 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-target-mac
175 10:19:11.536516 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-target-storage
176 10:19:11.537017 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-test-case
177 10:19:11.537499 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-test-event
178 10:19:11.537975 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-test-feedback
179 10:19:11.538454 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-test-raise
180 10:19:11.538930 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-test-reference
181 10:19:11.539402 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-test-runner
182 10:19:11.539906 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-test-set
183 10:19:11.540465 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-test-shell
184 10:19:11.540966 Updating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-install-packages (oe)
185 10:19:11.541507 Updating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/bin/lava-installed-packages (oe)
186 10:19:11.541952 Creating /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/environment
187 10:19:11.542324 LAVA metadata
188 10:19:11.542585 - LAVA_JOB_ID=922001
189 10:19:11.542801 - LAVA_DISPATCHER_IP=192.168.6.2
190 10:19:11.543157 start: 1.6.2.1 ssh-authorize (timeout 00:09:12) [common]
191 10:19:11.544148 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 10:19:11.544473 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:12) [common]
193 10:19:11.544684 skipped lava-vland-overlay
194 10:19:11.544925 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 10:19:11.545180 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:12) [common]
196 10:19:11.545398 skipped lava-multinode-overlay
197 10:19:11.545641 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 10:19:11.545894 start: 1.6.2.4 test-definition (timeout 00:09:12) [common]
199 10:19:11.546145 Loading test definitions
200 10:19:11.546423 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:12) [common]
201 10:19:11.546643 Using /lava-922001 at stage 0
202 10:19:11.547805 uuid=922001_1.6.2.4.1 testdef=None
203 10:19:11.548137 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 10:19:11.548403 start: 1.6.2.4.2 test-overlay (timeout 00:09:12) [common]
205 10:19:11.550175 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 10:19:11.550975 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:12) [common]
208 10:19:11.553144 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 10:19:11.553980 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:12) [common]
211 10:19:11.556078 runner path: /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 922001_1.6.2.4.1
212 10:19:11.556657 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 10:19:11.557422 Creating lava-test-runner.conf files
215 10:19:11.557624 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/922001/lava-overlay-f5zdc7oy/lava-922001/0 for stage 0
216 10:19:11.557952 - 0_v4l2-decoder-conformance-h265
217 10:19:11.558296 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 10:19:11.558573 start: 1.6.2.5 compress-overlay (timeout 00:09:12) [common]
219 10:19:11.580264 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 10:19:11.580642 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:12) [common]
221 10:19:11.580902 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 10:19:11.581169 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 10:19:11.581433 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:12) [common]
224 10:19:12.196949 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 10:19:12.197424 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 10:19:12.197677 extracting modules file /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/922001/extract-nfsrootfs-c04mz73x
227 10:19:13.560083 extracting modules file /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/922001/extract-overlay-ramdisk-qw6fx0ih/ramdisk
228 10:19:14.954417 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 10:19:14.954913 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 10:19:14.955196 [common] Applying overlay to NFS
231 10:19:14.955414 [common] Applying overlay /var/lib/lava/dispatcher/tmp/922001/compress-overlay-rcp4dbar/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/922001/extract-nfsrootfs-c04mz73x
232 10:19:14.984668 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 10:19:14.985063 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 10:19:14.985335 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 10:19:14.985564 Converting downloaded kernel to a uImage
236 10:19:14.985873 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/kernel/Image /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/kernel/uImage
237 10:19:15.455576 output: Image Name:
238 10:19:15.456029 output: Created: Fri Nov 1 10:19:14 2024
239 10:19:15.456251 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 10:19:15.456459 output: Data Size: 45908480 Bytes = 44832.50 KiB = 43.78 MiB
241 10:19:15.456661 output: Load Address: 01080000
242 10:19:15.456861 output: Entry Point: 01080000
243 10:19:15.457059 output:
244 10:19:15.457391 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 10:19:15.457658 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 10:19:15.457929 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 10:19:15.458183 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 10:19:15.458440 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 10:19:15.458704 Building ramdisk /var/lib/lava/dispatcher/tmp/922001/extract-overlay-ramdisk-qw6fx0ih/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/922001/extract-overlay-ramdisk-qw6fx0ih/ramdisk
250 10:19:17.839320 >> 167186 blocks
251 10:19:25.555054 Adding RAMdisk u-boot header.
252 10:19:25.555717 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/922001/extract-overlay-ramdisk-qw6fx0ih/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/922001/extract-overlay-ramdisk-qw6fx0ih/ramdisk.cpio.gz.uboot
253 10:19:25.811788 output: Image Name:
254 10:19:25.812368 output: Created: Fri Nov 1 10:19:25 2024
255 10:19:25.812796 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 10:19:25.813205 output: Data Size: 23443095 Bytes = 22893.65 KiB = 22.36 MiB
257 10:19:25.813611 output: Load Address: 00000000
258 10:19:25.814007 output: Entry Point: 00000000
259 10:19:25.814399 output:
260 10:19:25.815381 rename /var/lib/lava/dispatcher/tmp/922001/extract-overlay-ramdisk-qw6fx0ih/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/ramdisk/ramdisk.cpio.gz.uboot
261 10:19:25.816120 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 10:19:25.816676 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 10:19:25.817202 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 10:19:25.817664 No LXC device requested
265 10:19:25.818161 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 10:19:25.818671 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 10:19:25.819165 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 10:19:25.819574 Checking files for TFTP limit of 4294967296 bytes.
269 10:19:25.822233 end: 1 tftp-deploy (duration 00:01:03) [common]
270 10:19:25.822804 start: 2 uboot-action (timeout 00:05:00) [common]
271 10:19:25.823326 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 10:19:25.823818 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 10:19:25.824376 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 10:19:25.824903 Using kernel file from prepare-kernel: 922001/tftp-deploy-8j3x8uk8/kernel/uImage
275 10:19:25.825524 substitutions:
276 10:19:25.825924 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 10:19:25.826324 - {DTB_ADDR}: 0x01070000
278 10:19:25.826718 - {DTB}: 922001/tftp-deploy-8j3x8uk8/dtb/meson-g12b-a311d-libretech-cc.dtb
279 10:19:25.827110 - {INITRD}: 922001/tftp-deploy-8j3x8uk8/ramdisk/ramdisk.cpio.gz.uboot
280 10:19:25.827503 - {KERNEL_ADDR}: 0x01080000
281 10:19:25.827895 - {KERNEL}: 922001/tftp-deploy-8j3x8uk8/kernel/uImage
282 10:19:25.828408 - {LAVA_MAC}: None
283 10:19:25.828852 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/922001/extract-nfsrootfs-c04mz73x
284 10:19:25.829258 - {NFS_SERVER_IP}: 192.168.6.2
285 10:19:25.829649 - {PRESEED_CONFIG}: None
286 10:19:25.830040 - {PRESEED_LOCAL}: None
287 10:19:25.830430 - {RAMDISK_ADDR}: 0x08000000
288 10:19:25.830815 - {RAMDISK}: 922001/tftp-deploy-8j3x8uk8/ramdisk/ramdisk.cpio.gz.uboot
289 10:19:25.831205 - {ROOT_PART}: None
290 10:19:25.831592 - {ROOT}: None
291 10:19:25.831977 - {SERVER_IP}: 192.168.6.2
292 10:19:25.832404 - {TEE_ADDR}: 0x83000000
293 10:19:25.832792 - {TEE}: None
294 10:19:25.833178 Parsed boot commands:
295 10:19:25.833554 - setenv autoload no
296 10:19:25.833940 - setenv initrd_high 0xffffffff
297 10:19:25.834323 - setenv fdt_high 0xffffffff
298 10:19:25.834706 - dhcp
299 10:19:25.835088 - setenv serverip 192.168.6.2
300 10:19:25.835473 - tftpboot 0x01080000 922001/tftp-deploy-8j3x8uk8/kernel/uImage
301 10:19:25.835859 - tftpboot 0x08000000 922001/tftp-deploy-8j3x8uk8/ramdisk/ramdisk.cpio.gz.uboot
302 10:19:25.836296 - tftpboot 0x01070000 922001/tftp-deploy-8j3x8uk8/dtb/meson-g12b-a311d-libretech-cc.dtb
303 10:19:25.836683 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/922001/extract-nfsrootfs-c04mz73x,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 10:19:25.837083 - bootm 0x01080000 0x08000000 0x01070000
305 10:19:25.837575 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 10:19:25.839066 start: 2.3 connect-device (timeout 00:05:00) [common]
308 10:19:25.839484 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 10:19:25.854264 Setting prompt string to ['lava-test: # ']
310 10:19:25.855730 end: 2.3 connect-device (duration 00:00:00) [common]
311 10:19:25.856372 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 10:19:25.856959 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 10:19:25.857594 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 10:19:25.858713 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 10:19:25.897795 >> OK - accepted request
316 10:19:25.899878 Returned 0 in 0 seconds
317 10:19:26.000973 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 10:19:26.002502 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 10:19:26.003057 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 10:19:26.003578 Setting prompt string to ['Hit any key to stop autoboot']
322 10:19:26.004069 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 10:19:26.005578 Trying 192.168.56.21...
324 10:19:26.006052 Connected to conserv1.
325 10:19:26.006469 Escape character is '^]'.
326 10:19:26.006880
327 10:19:26.007292 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 10:19:26.007701
329 10:19:36.893539 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 10:19:36.894120 bl2_stage_init 0x01
331 10:19:36.894539 bl2_stage_init 0x81
332 10:19:36.899068 hw id: 0x0000 - pwm id 0x01
333 10:19:36.899562 bl2_stage_init 0xc1
334 10:19:36.899954 bl2_stage_init 0x02
335 10:19:36.900386
336 10:19:36.904660 L0:00000000
337 10:19:36.905129 L1:20000703
338 10:19:36.905520 L2:00008067
339 10:19:36.905902 L3:14000000
340 10:19:36.907615 B2:00402000
341 10:19:36.908109 B1:e0f83180
342 10:19:36.908519
343 10:19:36.908908 TE: 58124
344 10:19:36.909296
345 10:19:36.918672 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 10:19:36.919140
347 10:19:36.919535 Board ID = 1
348 10:19:36.919917 Set A53 clk to 24M
349 10:19:36.920339 Set A73 clk to 24M
350 10:19:36.924326 Set clk81 to 24M
351 10:19:36.924783 A53 clk: 1200 MHz
352 10:19:36.925175 A73 clk: 1200 MHz
353 10:19:36.927622 CLK81: 166.6M
354 10:19:36.928065 smccc: 00012a92
355 10:19:36.933250 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 10:19:36.938814 board id: 1
357 10:19:36.943127 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 10:19:36.954773 fw parse done
359 10:19:36.959774 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 10:19:37.002389 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 10:19:37.014333 PIEI prepare done
362 10:19:37.014780 fastboot data load
363 10:19:37.015172 fastboot data verify
364 10:19:37.019898 verify result: 266
365 10:19:37.025603 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 10:19:37.026059 LPDDR4 probe
367 10:19:37.026470 ddr clk to 1584MHz
368 10:19:37.032636 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 10:19:37.069816
370 10:19:37.070281 dmc_version 0001
371 10:19:37.076471 Check phy result
372 10:19:37.083300 INFO : End of CA training
373 10:19:37.083753 INFO : End of initialization
374 10:19:37.088900 INFO : Training has run successfully!
375 10:19:37.089356 Check phy result
376 10:19:37.094525 INFO : End of initialization
377 10:19:37.094980 INFO : End of read enable training
378 10:19:37.100106 INFO : End of fine write leveling
379 10:19:37.105704 INFO : End of Write leveling coarse delay
380 10:19:37.106155 INFO : Training has run successfully!
381 10:19:37.106567 Check phy result
382 10:19:37.111301 INFO : End of initialization
383 10:19:37.111753 INFO : End of read dq deskew training
384 10:19:37.116894 INFO : End of MPR read delay center optimization
385 10:19:37.122508 INFO : End of write delay center optimization
386 10:19:37.128111 INFO : End of read delay center optimization
387 10:19:37.128565 INFO : End of max read latency training
388 10:19:37.133719 INFO : Training has run successfully!
389 10:19:37.134178 1D training succeed
390 10:19:37.141984 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 10:19:37.189495 Check phy result
392 10:19:37.189982 INFO : End of initialization
393 10:19:37.211253 INFO : End of 2D read delay Voltage center optimization
394 10:19:37.231427 INFO : End of 2D read delay Voltage center optimization
395 10:19:37.283450 INFO : End of 2D write delay Voltage center optimization
396 10:19:37.333805 INFO : End of 2D write delay Voltage center optimization
397 10:19:37.339374 INFO : Training has run successfully!
398 10:19:37.339816
399 10:19:37.340290 channel==0
400 10:19:37.344982 RxClkDly_Margin_A0==88 ps 9
401 10:19:37.345412 TxDqDly_Margin_A0==98 ps 10
402 10:19:37.350603 RxClkDly_Margin_A1==88 ps 9
403 10:19:37.351029 TxDqDly_Margin_A1==98 ps 10
404 10:19:37.351438 TrainedVREFDQ_A0==74
405 10:19:37.356222 TrainedVREFDQ_A1==74
406 10:19:37.356654 VrefDac_Margin_A0==25
407 10:19:37.357058 DeviceVref_Margin_A0==40
408 10:19:37.361795 VrefDac_Margin_A1==25
409 10:19:37.362217 DeviceVref_Margin_A1==40
410 10:19:37.362616
411 10:19:37.363010
412 10:19:37.367376 channel==1
413 10:19:37.367797 RxClkDly_Margin_A0==98 ps 10
414 10:19:37.368239 TxDqDly_Margin_A0==98 ps 10
415 10:19:37.372967 RxClkDly_Margin_A1==98 ps 10
416 10:19:37.373392 TxDqDly_Margin_A1==88 ps 9
417 10:19:37.378598 TrainedVREFDQ_A0==77
418 10:19:37.379021 TrainedVREFDQ_A1==77
419 10:19:37.379422 VrefDac_Margin_A0==22
420 10:19:37.384194 DeviceVref_Margin_A0==37
421 10:19:37.384622 VrefDac_Margin_A1==22
422 10:19:37.389788 DeviceVref_Margin_A1==37
423 10:19:37.390203
424 10:19:37.390602 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 10:19:37.395373
426 10:19:37.423358 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
427 10:19:37.423868 2D training succeed
428 10:19:37.428989 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 10:19:37.434605 auto size-- 65535DDR cs0 size: 2048MB
430 10:19:37.435042 DDR cs1 size: 2048MB
431 10:19:37.440192 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 10:19:37.440620 cs0 DataBus test pass
433 10:19:37.445796 cs1 DataBus test pass
434 10:19:37.446219 cs0 AddrBus test pass
435 10:19:37.446616 cs1 AddrBus test pass
436 10:19:37.447008
437 10:19:37.451366 100bdlr_step_size ps== 420
438 10:19:37.451800 result report
439 10:19:37.456977 boot times 0Enable ddr reg access
440 10:19:37.462426 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 10:19:37.475916 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 10:19:38.049532 0.0;M3 CHK:0;cm4_sp_mode 0
443 10:19:38.050051 MVN_1=0x00000000
444 10:19:38.055051 MVN_2=0x00000000
445 10:19:38.060841 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 10:19:38.061266 OPS=0x10
447 10:19:38.061714 ring efuse init
448 10:19:38.062141 chipver efuse init
449 10:19:38.066421 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 10:19:38.072050 [0.018961 Inits done]
451 10:19:38.072485 secure task start!
452 10:19:38.072886 high task start!
453 10:19:38.076590 low task start!
454 10:19:38.077011 run into bl31
455 10:19:38.083259 NOTICE: BL31: v1.3(release):4fc40b1
456 10:19:38.091045 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 10:19:38.091475 NOTICE: BL31: G12A normal boot!
458 10:19:38.116474 NOTICE: BL31: BL33 decompress pass
459 10:19:38.122178 ERROR: Error initializing runtime service opteed_fast
460 10:19:39.355113
461 10:19:39.355757
462 10:19:39.362540 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 10:19:39.362999
464 10:19:39.363408 Model: Libre Computer AML-A311D-CC Alta
465 10:19:39.571922 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 10:19:39.595271 DRAM: 2 GiB (effective 3.8 GiB)
467 10:19:39.738240 Core: 408 devices, 31 uclasses, devicetree: separate
468 10:19:39.744152 WDT: Not starting watchdog@f0d0
469 10:19:39.776374 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 10:19:39.788879 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 10:19:39.793831 ** Bad device specification mmc 0 **
472 10:19:39.804164 Card did not respond to voltage select! : -110
473 10:19:39.811809 ** Bad device specification mmc 0 **
474 10:19:39.812286 Couldn't find partition mmc 0
475 10:19:39.820159 Card did not respond to voltage select! : -110
476 10:19:39.825667 ** Bad device specification mmc 0 **
477 10:19:39.826099 Couldn't find partition mmc 0
478 10:19:39.830724 Error: could not access storage.
479 10:19:41.093911 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 10:19:41.094449 bl2_stage_init 0x01
481 10:19:41.094866 bl2_stage_init 0x81
482 10:19:41.099489 hw id: 0x0000 - pwm id 0x01
483 10:19:41.099922 bl2_stage_init 0xc1
484 10:19:41.100375 bl2_stage_init 0x02
485 10:19:41.100777
486 10:19:41.105182 L0:00000000
487 10:19:41.105604 L1:20000703
488 10:19:41.106004 L2:00008067
489 10:19:41.106397 L3:14000000
490 10:19:41.110681 B2:00402000
491 10:19:41.111106 B1:e0f83180
492 10:19:41.111501
493 10:19:41.111897 TE: 58159
494 10:19:41.112331
495 10:19:41.116301 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 10:19:41.116732
497 10:19:41.117133 Board ID = 1
498 10:19:41.121884 Set A53 clk to 24M
499 10:19:41.122302 Set A73 clk to 24M
500 10:19:41.122698 Set clk81 to 24M
501 10:19:41.127488 A53 clk: 1200 MHz
502 10:19:41.127908 A73 clk: 1200 MHz
503 10:19:41.128341 CLK81: 166.6M
504 10:19:41.128736 smccc: 00012ab4
505 10:19:41.133148 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 10:19:41.138664 board id: 1
507 10:19:41.144550 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 10:19:41.155240 fw parse done
509 10:19:41.161276 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 10:19:41.203851 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 10:19:41.214720 PIEI prepare done
512 10:19:41.215149 fastboot data load
513 10:19:41.215555 fastboot data verify
514 10:19:41.220435 verify result: 266
515 10:19:41.225988 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 10:19:41.226413 LPDDR4 probe
517 10:19:41.226814 ddr clk to 1584MHz
518 10:19:41.233965 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 10:19:41.271249
520 10:19:41.271706 dmc_version 0001
521 10:19:41.277878 Check phy result
522 10:19:41.283777 INFO : End of CA training
523 10:19:41.284237 INFO : End of initialization
524 10:19:41.289385 INFO : Training has run successfully!
525 10:19:41.289808 Check phy result
526 10:19:41.294963 INFO : End of initialization
527 10:19:41.295380 INFO : End of read enable training
528 10:19:41.298307 INFO : End of fine write leveling
529 10:19:41.303806 INFO : End of Write leveling coarse delay
530 10:19:41.309409 INFO : Training has run successfully!
531 10:19:41.309848 Check phy result
532 10:19:41.310253 INFO : End of initialization
533 10:19:41.315028 INFO : End of read dq deskew training
534 10:19:41.320601 INFO : End of MPR read delay center optimization
535 10:19:41.321022 INFO : End of write delay center optimization
536 10:19:41.326282 INFO : End of read delay center optimization
537 10:19:41.331809 INFO : End of max read latency training
538 10:19:41.332264 INFO : Training has run successfully!
539 10:19:41.337395 1D training succeed
540 10:19:41.342451 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 10:19:41.391099 Check phy result
542 10:19:41.391579 INFO : End of initialization
543 10:19:41.412670 INFO : End of 2D read delay Voltage center optimization
544 10:19:41.432810 INFO : End of 2D read delay Voltage center optimization
545 10:19:41.484711 INFO : End of 2D write delay Voltage center optimization
546 10:19:41.533972 INFO : End of 2D write delay Voltage center optimization
547 10:19:41.539502 INFO : Training has run successfully!
548 10:19:41.539955
549 10:19:41.540623 channel==0
550 10:19:41.545059 RxClkDly_Margin_A0==88 ps 9
551 10:19:41.545526 TxDqDly_Margin_A0==98 ps 10
552 10:19:41.548462 RxClkDly_Margin_A1==88 ps 9
553 10:19:41.548901 TxDqDly_Margin_A1==98 ps 10
554 10:19:41.554008 TrainedVREFDQ_A0==74
555 10:19:41.554464 TrainedVREFDQ_A1==76
556 10:19:41.554875 VrefDac_Margin_A0==25
557 10:19:41.559603 DeviceVref_Margin_A0==40
558 10:19:41.560071 VrefDac_Margin_A1==25
559 10:19:41.565226 DeviceVref_Margin_A1==38
560 10:19:41.565661
561 10:19:41.566068
562 10:19:41.566464 channel==1
563 10:19:41.566855 RxClkDly_Margin_A0==98 ps 10
564 10:19:41.568619 TxDqDly_Margin_A0==98 ps 10
565 10:19:41.574198 RxClkDly_Margin_A1==88 ps 9
566 10:19:41.574623 TxDqDly_Margin_A1==88 ps 9
567 10:19:41.575028 TrainedVREFDQ_A0==77
568 10:19:41.579736 TrainedVREFDQ_A1==77
569 10:19:41.580194 VrefDac_Margin_A0==22
570 10:19:41.585333 DeviceVref_Margin_A0==37
571 10:19:41.585757 VrefDac_Margin_A1==24
572 10:19:41.586157 DeviceVref_Margin_A1==37
573 10:19:41.586551
574 10:19:41.590927 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 10:19:41.591351
576 10:19:41.624555 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
577 10:19:41.625067 2D training succeed
578 10:19:41.630151 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 10:19:41.635744 auto size-- 65535DDR cs0 size: 2048MB
580 10:19:41.636216 DDR cs1 size: 2048MB
581 10:19:41.641367 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 10:19:41.641800 cs0 DataBus test pass
583 10:19:41.642210 cs1 DataBus test pass
584 10:19:41.646931 cs0 AddrBus test pass
585 10:19:41.647365 cs1 AddrBus test pass
586 10:19:41.647768
587 10:19:41.652546 100bdlr_step_size ps== 420
588 10:19:41.652996 result report
589 10:19:41.653400 boot times 0Enable ddr reg access
590 10:19:41.662416 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 10:19:41.675850 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 10:19:42.247741 0.0;M3 CHK:0;cm4_sp_mode 0
593 10:19:42.248355 MVN_1=0x00000000
594 10:19:42.253380 MVN_2=0x00000000
595 10:19:42.259063 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 10:19:42.259606 OPS=0x10
597 10:19:42.260089 ring efuse init
598 10:19:42.260499 chipver efuse init
599 10:19:42.264639 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 10:19:42.270258 [0.018960 Inits done]
601 10:19:42.270803 secure task start!
602 10:19:42.271209 high task start!
603 10:19:42.274823 low task start!
604 10:19:42.275281 run into bl31
605 10:19:42.281486 NOTICE: BL31: v1.3(release):4fc40b1
606 10:19:42.289300 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 10:19:42.289736 NOTICE: BL31: G12A normal boot!
608 10:19:42.314615 NOTICE: BL31: BL33 decompress pass
609 10:19:42.320290 ERROR: Error initializing runtime service opteed_fast
610 10:19:43.553285
611 10:19:43.553877
612 10:19:43.561623 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 10:19:43.562092
614 10:19:43.562543 Model: Libre Computer AML-A311D-CC Alta
615 10:19:43.769977 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 10:19:43.793363 DRAM: 2 GiB (effective 3.8 GiB)
617 10:19:43.936349 Core: 408 devices, 31 uclasses, devicetree: separate
618 10:19:43.942214 WDT: Not starting watchdog@f0d0
619 10:19:43.974458 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 10:19:43.986955 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 10:19:43.990977 ** Bad device specification mmc 0 **
622 10:19:44.002238 Card did not respond to voltage select! : -110
623 10:19:44.009903 ** Bad device specification mmc 0 **
624 10:19:44.010360 Couldn't find partition mmc 0
625 10:19:44.018239 Card did not respond to voltage select! : -110
626 10:19:44.023757 ** Bad device specification mmc 0 **
627 10:19:44.024257 Couldn't find partition mmc 0
628 10:19:44.028814 Error: could not access storage.
629 10:19:44.372296 Net: eth0: ethernet@ff3f0000
630 10:19:44.372793 starting USB...
631 10:19:44.624229 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 10:19:44.624767 Starting the controller
633 10:19:44.631114 USB XHCI 1.10
634 10:19:46.344082 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 10:19:46.344689 bl2_stage_init 0x01
636 10:19:46.345118 bl2_stage_init 0x81
637 10:19:46.349607 hw id: 0x0000 - pwm id 0x01
638 10:19:46.350070 bl2_stage_init 0xc1
639 10:19:46.350475 bl2_stage_init 0x02
640 10:19:46.350877
641 10:19:46.355186 L0:00000000
642 10:19:46.355640 L1:20000703
643 10:19:46.356077 L2:00008067
644 10:19:46.356478 L3:14000000
645 10:19:46.360853 B2:00402000
646 10:19:46.361299 B1:e0f83180
647 10:19:46.361704
648 10:19:46.362099 TE: 58124
649 10:19:46.362491
650 10:19:46.366371 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 10:19:46.366820
652 10:19:46.367223 Board ID = 1
653 10:19:46.372016 Set A53 clk to 24M
654 10:19:46.372455 Set A73 clk to 24M
655 10:19:46.372855 Set clk81 to 24M
656 10:19:46.377731 A53 clk: 1200 MHz
657 10:19:46.378169 A73 clk: 1200 MHz
658 10:19:46.378568 CLK81: 166.6M
659 10:19:46.378963 smccc: 00012a91
660 10:19:46.383182 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 10:19:46.388836 board id: 1
662 10:19:46.394654 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 10:19:46.405309 fw parse done
664 10:19:46.411262 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 10:19:46.453915 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 10:19:46.464894 PIEI prepare done
667 10:19:46.465417 fastboot data load
668 10:19:46.465841 fastboot data verify
669 10:19:46.470587 verify result: 266
670 10:19:46.476038 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 10:19:46.476522 LPDDR4 probe
672 10:19:46.476937 ddr clk to 1584MHz
673 10:19:46.484089 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 10:19:46.521259
675 10:19:46.521800 dmc_version 0001
676 10:19:46.527932 Check phy result
677 10:19:46.533780 INFO : End of CA training
678 10:19:46.534274 INFO : End of initialization
679 10:19:46.539390 INFO : Training has run successfully!
680 10:19:46.539889 Check phy result
681 10:19:46.544982 INFO : End of initialization
682 10:19:46.545465 INFO : End of read enable training
683 10:19:46.550605 INFO : End of fine write leveling
684 10:19:46.556213 INFO : End of Write leveling coarse delay
685 10:19:46.556681 INFO : Training has run successfully!
686 10:19:46.557095 Check phy result
687 10:19:46.561896 INFO : End of initialization
688 10:19:46.562340 INFO : End of read dq deskew training
689 10:19:46.567377 INFO : End of MPR read delay center optimization
690 10:19:46.573155 INFO : End of write delay center optimization
691 10:19:46.578718 INFO : End of read delay center optimization
692 10:19:46.579195 INFO : End of max read latency training
693 10:19:46.584293 INFO : Training has run successfully!
694 10:19:46.584756 1D training succeed
695 10:19:46.593370 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 10:19:46.641043 Check phy result
697 10:19:46.641557 INFO : End of initialization
698 10:19:46.661838 INFO : End of 2D read delay Voltage center optimization
699 10:19:46.683126 INFO : End of 2D read delay Voltage center optimization
700 10:19:46.735185 INFO : End of 2D write delay Voltage center optimization
701 10:19:46.784497 INFO : End of 2D write delay Voltage center optimization
702 10:19:46.790116 INFO : Training has run successfully!
703 10:19:46.790555
704 10:19:46.790961 channel==0
705 10:19:46.795700 RxClkDly_Margin_A0==88 ps 9
706 10:19:46.796172 TxDqDly_Margin_A0==98 ps 10
707 10:19:46.799233 RxClkDly_Margin_A1==88 ps 9
708 10:19:46.799662 TxDqDly_Margin_A1==98 ps 10
709 10:19:46.804769 TrainedVREFDQ_A0==74
710 10:19:46.805204 TrainedVREFDQ_A1==74
711 10:19:46.805613 VrefDac_Margin_A0==25
712 10:19:46.810377 DeviceVref_Margin_A0==40
713 10:19:46.810808 VrefDac_Margin_A1==25
714 10:19:46.816040 DeviceVref_Margin_A1==40
715 10:19:46.816476
716 10:19:46.816882
717 10:19:46.817275 channel==1
718 10:19:46.817666 RxClkDly_Margin_A0==98 ps 10
719 10:19:46.821569 TxDqDly_Margin_A0==98 ps 10
720 10:19:46.822006 RxClkDly_Margin_A1==88 ps 9
721 10:19:46.827169 TxDqDly_Margin_A1==88 ps 9
722 10:19:46.827609 TrainedVREFDQ_A0==77
723 10:19:46.828048 TrainedVREFDQ_A1==77
724 10:19:46.832762 VrefDac_Margin_A0==22
725 10:19:46.833197 DeviceVref_Margin_A0==37
726 10:19:46.838378 VrefDac_Margin_A1==24
727 10:19:46.838808 DeviceVref_Margin_A1==37
728 10:19:46.839203
729 10:19:46.844021 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 10:19:46.844462
731 10:19:46.872385 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
732 10:19:46.877576 2D training succeed
733 10:19:46.883047 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 10:19:46.883484 auto size-- 65535DDR cs0 size: 2048MB
735 10:19:46.888643 DDR cs1 size: 2048MB
736 10:19:46.889081 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 10:19:46.894246 cs0 DataBus test pass
738 10:19:46.894686 cs1 DataBus test pass
739 10:19:46.895090 cs0 AddrBus test pass
740 10:19:46.899927 cs1 AddrBus test pass
741 10:19:46.900399
742 10:19:46.900803 100bdlr_step_size ps== 420
743 10:19:46.901213 result report
744 10:19:46.905454 boot times 0Enable ddr reg access
745 10:19:46.912882 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 10:19:46.926393 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 10:19:47.500070 0.0;M3 CHK:0;cm4_sp_mode 0
748 10:19:47.500600 MVN_1=0x00000000
749 10:19:47.505513 MVN_2=0x00000000
750 10:19:47.511297 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 10:19:47.511810 OPS=0x10
752 10:19:47.512247 ring efuse init
753 10:19:47.512633 chipver efuse init
754 10:19:47.519499 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 10:19:47.520020 [0.018961 Inits done]
756 10:19:47.527193 secure task start!
757 10:19:47.527653 high task start!
758 10:19:47.528074 low task start!
759 10:19:47.528457 run into bl31
760 10:19:47.533719 NOTICE: BL31: v1.3(release):4fc40b1
761 10:19:47.541535 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 10:19:47.541989 NOTICE: BL31: G12A normal boot!
763 10:19:47.566864 NOTICE: BL31: BL33 decompress pass
764 10:19:47.571612 ERROR: Error initializing runtime service opteed_fast
765 10:19:48.805407
766 10:19:48.806014
767 10:19:48.813788 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 10:19:48.814251
769 10:19:48.814670 Model: Libre Computer AML-A311D-CC Alta
770 10:19:49.022223 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 10:19:49.045581 DRAM: 2 GiB (effective 3.8 GiB)
772 10:19:49.188631 Core: 408 devices, 31 uclasses, devicetree: separate
773 10:19:49.194425 WDT: Not starting watchdog@f0d0
774 10:19:49.226817 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 10:19:49.239175 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 10:19:49.244168 ** Bad device specification mmc 0 **
777 10:19:49.254467 Card did not respond to voltage select! : -110
778 10:19:49.262124 ** Bad device specification mmc 0 **
779 10:19:49.262558 Couldn't find partition mmc 0
780 10:19:49.270444 Card did not respond to voltage select! : -110
781 10:19:49.275970 ** Bad device specification mmc 0 **
782 10:19:49.276442 Couldn't find partition mmc 0
783 10:19:49.281024 Error: could not access storage.
784 10:19:49.623516 Net: eth0: ethernet@ff3f0000
785 10:19:49.624042 starting USB...
786 10:19:49.875396 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 10:19:49.875918 Starting the controller
788 10:19:49.882424 USB XHCI 1.10
789 10:19:52.044289 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 10:19:52.044878 bl2_stage_init 0x01
791 10:19:52.045305 bl2_stage_init 0x81
792 10:19:52.049915 hw id: 0x0000 - pwm id 0x01
793 10:19:52.050376 bl2_stage_init 0xc1
794 10:19:52.050796 bl2_stage_init 0x02
795 10:19:52.051203
796 10:19:52.055428 L0:00000000
797 10:19:52.055882 L1:20000703
798 10:19:52.056350 L2:00008067
799 10:19:52.056761 L3:14000000
800 10:19:52.058296 B2:00402000
801 10:19:52.058728 B1:e0f83180
802 10:19:52.059132
803 10:19:52.059535 TE: 58167
804 10:19:52.059938
805 10:19:52.069482 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 10:19:52.069933
807 10:19:52.070341 Board ID = 1
808 10:19:52.070741 Set A53 clk to 24M
809 10:19:52.071141 Set A73 clk to 24M
810 10:19:52.075056 Set clk81 to 24M
811 10:19:52.075499 A53 clk: 1200 MHz
812 10:19:52.075902 A73 clk: 1200 MHz
813 10:19:52.080735 CLK81: 166.6M
814 10:19:52.081176 smccc: 00012abd
815 10:19:52.086417 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 10:19:52.086862 board id: 1
817 10:19:52.095085 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 10:19:52.105448 fw parse done
819 10:19:52.111398 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 10:19:52.154045 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 10:19:52.164991 PIEI prepare done
822 10:19:52.165443 fastboot data load
823 10:19:52.165861 fastboot data verify
824 10:19:52.170616 verify result: 266
825 10:19:52.176262 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 10:19:52.176711 LPDDR4 probe
827 10:19:52.177119 ddr clk to 1584MHz
828 10:19:52.184213 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 10:19:52.221515
830 10:19:52.222026 dmc_version 0001
831 10:19:52.228120 Check phy result
832 10:19:52.233952 INFO : End of CA training
833 10:19:52.234394 INFO : End of initialization
834 10:19:52.239546 INFO : Training has run successfully!
835 10:19:52.240019 Check phy result
836 10:19:52.245134 INFO : End of initialization
837 10:19:52.245583 INFO : End of read enable training
838 10:19:52.250803 INFO : End of fine write leveling
839 10:19:52.256364 INFO : End of Write leveling coarse delay
840 10:19:52.256817 INFO : Training has run successfully!
841 10:19:52.257231 Check phy result
842 10:19:52.261959 INFO : End of initialization
843 10:19:52.262403 INFO : End of read dq deskew training
844 10:19:52.267572 INFO : End of MPR read delay center optimization
845 10:19:52.273161 INFO : End of write delay center optimization
846 10:19:52.278826 INFO : End of read delay center optimization
847 10:19:52.279279 INFO : End of max read latency training
848 10:19:52.284356 INFO : Training has run successfully!
849 10:19:52.284803 1D training succeed
850 10:19:52.293268 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 10:19:52.341154 Check phy result
852 10:19:52.341611 INFO : End of initialization
853 10:19:52.363748 INFO : End of 2D read delay Voltage center optimization
854 10:19:52.383171 INFO : End of 2D read delay Voltage center optimization
855 10:19:52.436092 INFO : End of 2D write delay Voltage center optimization
856 10:19:52.485419 INFO : End of 2D write delay Voltage center optimization
857 10:19:52.491164 INFO : Training has run successfully!
858 10:19:52.491590
859 10:19:52.492027 channel==0
860 10:19:52.496636 RxClkDly_Margin_A0==88 ps 9
861 10:19:52.497084 TxDqDly_Margin_A0==98 ps 10
862 10:19:52.499921 RxClkDly_Margin_A1==88 ps 9
863 10:19:52.500380 TxDqDly_Margin_A1==98 ps 10
864 10:19:52.505560 TrainedVREFDQ_A0==74
865 10:19:52.506034 TrainedVREFDQ_A1==74
866 10:19:52.506443 VrefDac_Margin_A0==24
867 10:19:52.511215 DeviceVref_Margin_A0==40
868 10:19:52.511670 VrefDac_Margin_A1==24
869 10:19:52.516800 DeviceVref_Margin_A1==40
870 10:19:52.517214
871 10:19:52.517599
872 10:19:52.517977 channel==1
873 10:19:52.518350 RxClkDly_Margin_A0==98 ps 10
874 10:19:52.520168 TxDqDly_Margin_A0==88 ps 9
875 10:19:52.525683 RxClkDly_Margin_A1==88 ps 9
876 10:19:52.526095 TxDqDly_Margin_A1==88 ps 9
877 10:19:52.526481 TrainedVREFDQ_A0==77
878 10:19:52.531286 TrainedVREFDQ_A1==77
879 10:19:52.531705 VrefDac_Margin_A0==22
880 10:19:52.536948 DeviceVref_Margin_A0==37
881 10:19:52.537366 VrefDac_Margin_A1==24
882 10:19:52.537751 DeviceVref_Margin_A1==37
883 10:19:52.538132
884 10:19:52.542383 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 10:19:52.542792
886 10:19:52.576032 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 10:19:52.576478 2D training succeed
888 10:19:52.581605 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 10:19:52.587189 auto size-- 65535DDR cs0 size: 2048MB
890 10:19:52.587607 DDR cs1 size: 2048MB
891 10:19:52.592876 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 10:19:52.593291 cs0 DataBus test pass
893 10:19:52.593673 cs1 DataBus test pass
894 10:19:52.598423 cs0 AddrBus test pass
895 10:19:52.598834 cs1 AddrBus test pass
896 10:19:52.599215
897 10:19:52.604055 100bdlr_step_size ps== 420
898 10:19:52.604479 result report
899 10:19:52.604863 boot times 0Enable ddr reg access
900 10:19:52.613819 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 10:19:52.627326 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 10:19:53.201076 0.0;M3 CHK:0;cm4_sp_mode 0
903 10:19:53.201656 MVN_1=0x00000000
904 10:19:53.206476 MVN_2=0x00000000
905 10:19:53.212266 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 10:19:53.212702 OPS=0x10
907 10:19:53.213104 ring efuse init
908 10:19:53.213502 chipver efuse init
909 10:19:53.220464 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 10:19:53.220905 [0.018961 Inits done]
911 10:19:53.228030 secure task start!
912 10:19:53.228456 high task start!
913 10:19:53.228855 low task start!
914 10:19:53.229247 run into bl31
915 10:19:53.234603 NOTICE: BL31: v1.3(release):4fc40b1
916 10:19:53.242402 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 10:19:53.242835 NOTICE: BL31: G12A normal boot!
918 10:19:53.267916 NOTICE: BL31: BL33 decompress pass
919 10:19:53.273500 ERROR: Error initializing runtime service opteed_fast
920 10:19:54.506356
921 10:19:54.506894
922 10:19:54.514784 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 10:19:54.515223
924 10:19:54.515631 Model: Libre Computer AML-A311D-CC Alta
925 10:19:54.723227 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 10:19:54.746575 DRAM: 2 GiB (effective 3.8 GiB)
927 10:19:54.889525 Core: 408 devices, 31 uclasses, devicetree: separate
928 10:19:54.895429 WDT: Not starting watchdog@f0d0
929 10:19:54.927681 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 10:19:54.940169 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 10:19:54.945209 ** Bad device specification mmc 0 **
932 10:19:54.955473 Card did not respond to voltage select! : -110
933 10:19:54.963217 ** Bad device specification mmc 0 **
934 10:19:54.963651 Couldn't find partition mmc 0
935 10:19:54.971457 Card did not respond to voltage select! : -110
936 10:19:54.977015 ** Bad device specification mmc 0 **
937 10:19:54.977446 Couldn't find partition mmc 0
938 10:19:54.982108 Error: could not access storage.
939 10:19:55.324479 Net: eth0: ethernet@ff3f0000
940 10:19:55.324935 starting USB...
941 10:19:55.576272 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 10:19:55.576757 Starting the controller
943 10:19:55.583300 USB XHCI 1.10
944 10:19:57.137276 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 10:19:57.145567 scanning usb for storage devices... 0 Storage Device(s) found
947 10:19:57.196986 Hit any key to stop autoboot: 1
948 10:19:57.197730 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 10:19:57.198306 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
950 10:19:57.198773 Setting prompt string to ['=>']
951 10:19:57.199239 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
952 10:19:57.213013 0
953 10:19:57.213927 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 10:19:57.214418 Sending with 10 millisecond of delay
956 10:19:58.348881 => setenv autoload no
957 10:19:58.359647 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 10:19:58.364569 setenv autoload no
959 10:19:58.365279 Sending with 10 millisecond of delay
961 10:20:00.161824 => setenv initrd_high 0xffffffff
962 10:20:00.172563 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
963 10:20:00.173362 setenv initrd_high 0xffffffff
964 10:20:00.174061 Sending with 10 millisecond of delay
966 10:20:01.789876 => setenv fdt_high 0xffffffff
967 10:20:01.800587 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 10:20:01.801355 setenv fdt_high 0xffffffff
969 10:20:01.802046 Sending with 10 millisecond of delay
971 10:20:02.093750 => dhcp
972 10:20:02.104376 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
973 10:20:02.105118 dhcp
974 10:20:02.105537 Speed: 1000, full duplex
975 10:20:02.105940 BOOTP broadcast 1
976 10:20:02.115167 DHCP client bound to address 192.168.6.27 (11 ms)
977 10:20:02.115842 Sending with 10 millisecond of delay
979 10:20:03.791927 => setenv serverip 192.168.6.2
980 10:20:03.802711 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 10:20:03.803558 setenv serverip 192.168.6.2
982 10:20:03.804262 Sending with 10 millisecond of delay
984 10:20:07.526705 => tftpboot 0x01080000 922001/tftp-deploy-8j3x8uk8/kernel/uImage
985 10:20:07.537455 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 10:20:07.538259 tftpboot 0x01080000 922001/tftp-deploy-8j3x8uk8/kernel/uImage
987 10:20:07.538716 Speed: 1000, full duplex
988 10:20:07.539124 Using ethernet@ff3f0000 device
989 10:20:07.540300 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 10:20:07.545875 Filename '922001/tftp-deploy-8j3x8uk8/kernel/uImage'.
991 10:20:07.548984 Load address: 0x1080000
992 10:20:10.393043 Loading: *################################################## 43.8 MiB
993 10:20:10.393652 15.4 MiB/s
994 10:20:10.394082 done
995 10:20:10.397383 Bytes transferred = 45908544 (2bc8240 hex)
996 10:20:10.398177 Sending with 10 millisecond of delay
998 10:20:15.083575 => tftpboot 0x08000000 922001/tftp-deploy-8j3x8uk8/ramdisk/ramdisk.cpio.gz.uboot
999 10:20:15.094375 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1000 10:20:15.095145 tftpboot 0x08000000 922001/tftp-deploy-8j3x8uk8/ramdisk/ramdisk.cpio.gz.uboot
1001 10:20:15.095583 Speed: 1000, full duplex
1002 10:20:15.096022 Using ethernet@ff3f0000 device
1003 10:20:15.097078 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 10:20:15.105698 Filename '922001/tftp-deploy-8j3x8uk8/ramdisk/ramdisk.cpio.gz.uboot'.
1005 10:20:15.106143 Load address: 0x8000000
1006 10:20:22.237112 Loading: *#################T ################################ UDP wrong checksum 00000005 000081ae
1007 10:20:27.238386 T UDP wrong checksum 00000005 000081ae
1008 10:20:37.241462 T T UDP wrong checksum 00000005 000081ae
1009 10:20:57.245426 T T T T UDP wrong checksum 00000005 000081ae
1010 10:21:12.249662 T T
1011 10:21:12.250316 Retry count exceeded; starting again
1013 10:21:12.251740 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1016 10:21:12.253698 end: 2.4 uboot-commands (duration 00:01:46) [common]
1018 10:21:12.255125 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1020 10:21:12.256192 end: 2 uboot-action (duration 00:01:46) [common]
1022 10:21:12.257701 Cleaning after the job
1023 10:21:12.258239 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/ramdisk
1024 10:21:12.259479 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/kernel
1025 10:21:12.304192 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/dtb
1026 10:21:12.305020 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/nfsrootfs
1027 10:21:12.603546 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/922001/tftp-deploy-8j3x8uk8/modules
1028 10:21:12.626498 start: 4.1 power-off (timeout 00:00:30) [common]
1029 10:21:12.627169 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1030 10:21:12.661761 >> OK - accepted request
1031 10:21:12.663505 Returned 0 in 0 seconds
1032 10:21:12.764304 end: 4.1 power-off (duration 00:00:00) [common]
1034 10:21:12.765325 start: 4.2 read-feedback (timeout 00:10:00) [common]
1035 10:21:12.765983 Listened to connection for namespace 'common' for up to 1s
1036 10:21:13.766920 Finalising connection for namespace 'common'
1037 10:21:13.767403 Disconnecting from shell: Finalise
1038 10:21:13.767690 =>
1039 10:21:13.868305 end: 4.2 read-feedback (duration 00:00:01) [common]
1040 10:21:13.868633 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/922001
1041 10:21:16.488201 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/922001
1042 10:21:16.488814 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.