Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:47:02.041870 lava-dispatcher, installed at version: 2024.01
2 09:47:02.042710 start: 0 validate
3 09:47:02.043190 Start time: 2024-11-01 09:47:02.043159+00:00 (UTC)
4 09:47:02.043770 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:47:02.044321 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:47:02.082292 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:47:02.082848 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 09:47:02.116271 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:47:02.116908 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 09:47:02.151218 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:47:02.151756 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:47:02.185741 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:47:02.186289 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 09:47:02.230352 validate duration: 0.19
16 09:47:02.231865 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:47:02.232551 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:47:02.233128 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:47:02.234105 Not decompressing ramdisk as can be used compressed.
20 09:47:02.234899 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 09:47:02.235410 saving as /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/ramdisk/initrd.cpio.gz
22 09:47:02.235957 total size: 5628140 (5 MB)
23 09:47:02.274023 progress 0 % (0 MB)
24 09:47:02.282000 progress 5 % (0 MB)
25 09:47:02.290408 progress 10 % (0 MB)
26 09:47:02.297902 progress 15 % (0 MB)
27 09:47:02.305267 progress 20 % (1 MB)
28 09:47:02.309261 progress 25 % (1 MB)
29 09:47:02.313599 progress 30 % (1 MB)
30 09:47:02.317991 progress 35 % (1 MB)
31 09:47:02.321702 progress 40 % (2 MB)
32 09:47:02.325785 progress 45 % (2 MB)
33 09:47:02.329491 progress 50 % (2 MB)
34 09:47:02.333682 progress 55 % (2 MB)
35 09:47:02.337757 progress 60 % (3 MB)
36 09:47:02.341474 progress 65 % (3 MB)
37 09:47:02.345790 progress 70 % (3 MB)
38 09:47:02.349509 progress 75 % (4 MB)
39 09:47:02.353550 progress 80 % (4 MB)
40 09:47:02.357230 progress 85 % (4 MB)
41 09:47:02.361349 progress 90 % (4 MB)
42 09:47:02.365346 progress 95 % (5 MB)
43 09:47:02.368703 progress 100 % (5 MB)
44 09:47:02.369389 5 MB downloaded in 0.13 s (40.23 MB/s)
45 09:47:02.369970 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:47:02.370887 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:47:02.371197 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:47:02.371482 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:47:02.372004 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/kernel/Image
51 09:47:02.372278 saving as /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/kernel/Image
52 09:47:02.372498 total size: 45908480 (43 MB)
53 09:47:02.372718 No compression specified
54 09:47:02.412342 progress 0 % (0 MB)
55 09:47:02.440969 progress 5 % (2 MB)
56 09:47:02.469261 progress 10 % (4 MB)
57 09:47:02.499178 progress 15 % (6 MB)
58 09:47:02.527293 progress 20 % (8 MB)
59 09:47:02.555232 progress 25 % (10 MB)
60 09:47:02.582660 progress 30 % (13 MB)
61 09:47:02.610500 progress 35 % (15 MB)
62 09:47:02.638351 progress 40 % (17 MB)
63 09:47:02.665875 progress 45 % (19 MB)
64 09:47:02.693743 progress 50 % (21 MB)
65 09:47:02.721405 progress 55 % (24 MB)
66 09:47:02.749426 progress 60 % (26 MB)
67 09:47:02.777068 progress 65 % (28 MB)
68 09:47:02.804707 progress 70 % (30 MB)
69 09:47:02.832471 progress 75 % (32 MB)
70 09:47:02.860572 progress 80 % (35 MB)
71 09:47:02.888282 progress 85 % (37 MB)
72 09:47:02.915861 progress 90 % (39 MB)
73 09:47:02.943663 progress 95 % (41 MB)
74 09:47:02.971483 progress 100 % (43 MB)
75 09:47:02.972016 43 MB downloaded in 0.60 s (73.03 MB/s)
76 09:47:02.972499 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:47:02.973314 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:47:02.973590 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:47:02.973859 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:47:02.974315 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 09:47:02.974565 saving as /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 09:47:02.974774 total size: 53209 (0 MB)
84 09:47:02.974984 No compression specified
85 09:47:03.013979 progress 61 % (0 MB)
86 09:47:03.014812 progress 100 % (0 MB)
87 09:47:03.015364 0 MB downloaded in 0.04 s (1.25 MB/s)
88 09:47:03.015848 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:47:03.016721 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:47:03.016986 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:47:03.017253 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:47:03.017715 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 09:47:03.017961 saving as /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/nfsrootfs/full.rootfs.tar
95 09:47:03.018167 total size: 474398908 (452 MB)
96 09:47:03.018378 Using unxz to decompress xz
97 09:47:03.053820 progress 0 % (0 MB)
98 09:47:04.160317 progress 5 % (22 MB)
99 09:47:05.594574 progress 10 % (45 MB)
100 09:47:06.025788 progress 15 % (67 MB)
101 09:47:06.870883 progress 20 % (90 MB)
102 09:47:07.418064 progress 25 % (113 MB)
103 09:47:07.823960 progress 30 % (135 MB)
104 09:47:08.456565 progress 35 % (158 MB)
105 09:47:09.378693 progress 40 % (181 MB)
106 09:47:10.256661 progress 45 % (203 MB)
107 09:47:10.833542 progress 50 % (226 MB)
108 09:47:11.475565 progress 55 % (248 MB)
109 09:47:12.687317 progress 60 % (271 MB)
110 09:47:14.173727 progress 65 % (294 MB)
111 09:47:15.850524 progress 70 % (316 MB)
112 09:47:19.160386 progress 75 % (339 MB)
113 09:47:21.589485 progress 80 % (361 MB)
114 09:47:24.522479 progress 85 % (384 MB)
115 09:47:27.719295 progress 90 % (407 MB)
116 09:47:30.923916 progress 95 % (429 MB)
117 09:47:34.130809 progress 100 % (452 MB)
118 09:47:34.144977 452 MB downloaded in 31.13 s (14.53 MB/s)
119 09:47:34.145987 end: 1.4.1 http-download (duration 00:00:31) [common]
121 09:47:34.147742 end: 1.4 download-retry (duration 00:00:31) [common]
122 09:47:34.148457 start: 1.5 download-retry (timeout 00:09:28) [common]
123 09:47:34.149083 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 09:47:34.150127 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/modules.tar.xz
125 09:47:34.150648 saving as /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/modules/modules.tar
126 09:47:34.151097 total size: 11594840 (11 MB)
127 09:47:34.151556 Using unxz to decompress xz
128 09:47:34.202304 progress 0 % (0 MB)
129 09:47:34.271724 progress 5 % (0 MB)
130 09:47:34.348150 progress 10 % (1 MB)
131 09:47:34.430830 progress 15 % (1 MB)
132 09:47:34.511903 progress 20 % (2 MB)
133 09:47:34.587636 progress 25 % (2 MB)
134 09:47:34.666956 progress 30 % (3 MB)
135 09:47:34.738901 progress 35 % (3 MB)
136 09:47:34.817924 progress 40 % (4 MB)
137 09:47:34.903211 progress 45 % (5 MB)
138 09:47:34.979546 progress 50 % (5 MB)
139 09:47:35.062496 progress 55 % (6 MB)
140 09:47:35.142606 progress 60 % (6 MB)
141 09:47:35.226603 progress 65 % (7 MB)
142 09:47:35.301250 progress 70 % (7 MB)
143 09:47:35.385079 progress 75 % (8 MB)
144 09:47:35.466830 progress 80 % (8 MB)
145 09:47:35.542012 progress 85 % (9 MB)
146 09:47:35.614412 progress 90 % (9 MB)
147 09:47:35.714815 progress 95 % (10 MB)
148 09:47:35.805492 progress 100 % (11 MB)
149 09:47:35.820732 11 MB downloaded in 1.67 s (6.62 MB/s)
150 09:47:35.821313 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:47:35.822143 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:47:35.822413 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 09:47:35.822679 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 09:47:51.369375 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/921935/extract-nfsrootfs-x4wm86k7
156 09:47:51.369978 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 09:47:51.370264 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 09:47:51.370871 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu
159 09:47:51.371294 makedir: /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin
160 09:47:51.371622 makedir: /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/tests
161 09:47:51.371962 makedir: /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/results
162 09:47:51.372327 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-add-keys
163 09:47:51.372856 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-add-sources
164 09:47:51.373352 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-background-process-start
165 09:47:51.373833 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-background-process-stop
166 09:47:51.374348 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-common-functions
167 09:47:51.374839 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-echo-ipv4
168 09:47:51.375319 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-install-packages
169 09:47:51.375794 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-installed-packages
170 09:47:51.376338 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-os-build
171 09:47:51.376836 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-probe-channel
172 09:47:51.377314 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-probe-ip
173 09:47:51.377779 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-target-ip
174 09:47:51.378244 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-target-mac
175 09:47:51.378714 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-target-storage
176 09:47:51.379185 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-test-case
177 09:47:51.379652 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-test-event
178 09:47:51.380179 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-test-feedback
179 09:47:51.380674 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-test-raise
180 09:47:51.381142 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-test-reference
181 09:47:51.381612 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-test-runner
182 09:47:51.382078 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-test-set
183 09:47:51.382542 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-test-shell
184 09:47:51.383014 Updating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-install-packages (oe)
185 09:47:51.383612 Updating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/bin/lava-installed-packages (oe)
186 09:47:51.384083 Creating /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/environment
187 09:47:51.384455 LAVA metadata
188 09:47:51.384711 - LAVA_JOB_ID=921935
189 09:47:51.384924 - LAVA_DISPATCHER_IP=192.168.6.2
190 09:47:51.385280 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 09:47:51.386236 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 09:47:51.386555 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 09:47:51.386762 skipped lava-vland-overlay
194 09:47:51.387003 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 09:47:51.387255 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 09:47:51.387474 skipped lava-multinode-overlay
197 09:47:51.387716 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 09:47:51.387968 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 09:47:51.388239 Loading test definitions
200 09:47:51.388519 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 09:47:51.388739 Using /lava-921935 at stage 0
202 09:47:51.389870 uuid=921935_1.6.2.4.1 testdef=None
203 09:47:51.390173 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 09:47:51.390434 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 09:47:51.392183 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 09:47:51.392969 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 09:47:51.395140 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 09:47:51.395967 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 09:47:51.398039 runner path: /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 921935_1.6.2.4.1
212 09:47:51.398605 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 09:47:51.399358 Creating lava-test-runner.conf files
215 09:47:51.399559 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/921935/lava-overlay-qdk98mfu/lava-921935/0 for stage 0
216 09:47:51.399885 - 0_v4l2-decoder-conformance-h265
217 09:47:51.400261 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 09:47:51.400533 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 09:47:51.421594 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 09:47:51.421970 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 09:47:51.422225 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 09:47:51.422490 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 09:47:51.422749 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 09:47:52.040491 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 09:47:52.040942 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 09:47:52.041186 extracting modules file /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/921935/extract-nfsrootfs-x4wm86k7
227 09:47:53.395931 extracting modules file /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/921935/extract-overlay-ramdisk-63g09t7v/ramdisk
228 09:47:54.943802 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 09:47:54.944327 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 09:47:54.944610 [common] Applying overlay to NFS
231 09:47:54.944825 [common] Applying overlay /var/lib/lava/dispatcher/tmp/921935/compress-overlay-axzc68ge/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/921935/extract-nfsrootfs-x4wm86k7
232 09:47:54.974720 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 09:47:54.975186 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 09:47:54.975464 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 09:47:54.975699 Converting downloaded kernel to a uImage
236 09:47:54.976049 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/kernel/Image /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/kernel/uImage
237 09:47:55.496872 output: Image Name:
238 09:47:55.497302 output: Created: Fri Nov 1 09:47:54 2024
239 09:47:55.497516 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 09:47:55.497723 output: Data Size: 45908480 Bytes = 44832.50 KiB = 43.78 MiB
241 09:47:55.497926 output: Load Address: 01080000
242 09:47:55.498124 output: Entry Point: 01080000
243 09:47:55.498319 output:
244 09:47:55.498653 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 09:47:55.498923 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 09:47:55.499187 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 09:47:55.499437 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 09:47:55.499693 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 09:47:55.499946 Building ramdisk /var/lib/lava/dispatcher/tmp/921935/extract-overlay-ramdisk-63g09t7v/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/921935/extract-overlay-ramdisk-63g09t7v/ramdisk
250 09:47:57.759942 >> 167186 blocks
251 09:48:05.633800 Adding RAMdisk u-boot header.
252 09:48:05.634283 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/921935/extract-overlay-ramdisk-63g09t7v/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/921935/extract-overlay-ramdisk-63g09t7v/ramdisk.cpio.gz.uboot
253 09:48:05.879060 output: Image Name:
254 09:48:05.879484 output: Created: Fri Nov 1 09:48:05 2024
255 09:48:05.879695 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 09:48:05.879903 output: Data Size: 23442361 Bytes = 22892.93 KiB = 22.36 MiB
257 09:48:05.880286 output: Load Address: 00000000
258 09:48:05.880733 output: Entry Point: 00000000
259 09:48:05.881170 output:
260 09:48:05.882411 rename /var/lib/lava/dispatcher/tmp/921935/extract-overlay-ramdisk-63g09t7v/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/ramdisk/ramdisk.cpio.gz.uboot
261 09:48:05.883200 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 09:48:05.883797 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 09:48:05.884457 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 09:48:05.884963 No LXC device requested
265 09:48:05.885513 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 09:48:05.886074 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 09:48:05.886617 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 09:48:05.887070 Checking files for TFTP limit of 4294967296 bytes.
269 09:48:05.890012 end: 1 tftp-deploy (duration 00:01:04) [common]
270 09:48:05.890653 start: 2 uboot-action (timeout 00:05:00) [common]
271 09:48:05.891227 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 09:48:05.891770 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 09:48:05.892360 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 09:48:05.892942 Using kernel file from prepare-kernel: 921935/tftp-deploy-wc3q94cn/kernel/uImage
275 09:48:05.893624 substitutions:
276 09:48:05.894069 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 09:48:05.894510 - {DTB_ADDR}: 0x01070000
278 09:48:05.894948 - {DTB}: 921935/tftp-deploy-wc3q94cn/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 09:48:05.895384 - {INITRD}: 921935/tftp-deploy-wc3q94cn/ramdisk/ramdisk.cpio.gz.uboot
280 09:48:05.895821 - {KERNEL_ADDR}: 0x01080000
281 09:48:05.896288 - {KERNEL}: 921935/tftp-deploy-wc3q94cn/kernel/uImage
282 09:48:05.896724 - {LAVA_MAC}: None
283 09:48:05.897196 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/921935/extract-nfsrootfs-x4wm86k7
284 09:48:05.897634 - {NFS_SERVER_IP}: 192.168.6.2
285 09:48:05.898065 - {PRESEED_CONFIG}: None
286 09:48:05.898494 - {PRESEED_LOCAL}: None
287 09:48:05.898921 - {RAMDISK_ADDR}: 0x08000000
288 09:48:05.899350 - {RAMDISK}: 921935/tftp-deploy-wc3q94cn/ramdisk/ramdisk.cpio.gz.uboot
289 09:48:05.899776 - {ROOT_PART}: None
290 09:48:05.900244 - {ROOT}: None
291 09:48:05.900678 - {SERVER_IP}: 192.168.6.2
292 09:48:05.901106 - {TEE_ADDR}: 0x83000000
293 09:48:05.901529 - {TEE}: None
294 09:48:05.901956 Parsed boot commands:
295 09:48:05.902373 - setenv autoload no
296 09:48:05.902796 - setenv initrd_high 0xffffffff
297 09:48:05.903216 - setenv fdt_high 0xffffffff
298 09:48:05.903637 - dhcp
299 09:48:05.904086 - setenv serverip 192.168.6.2
300 09:48:05.904515 - tftpboot 0x01080000 921935/tftp-deploy-wc3q94cn/kernel/uImage
301 09:48:05.904941 - tftpboot 0x08000000 921935/tftp-deploy-wc3q94cn/ramdisk/ramdisk.cpio.gz.uboot
302 09:48:05.905363 - tftpboot 0x01070000 921935/tftp-deploy-wc3q94cn/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 09:48:05.905787 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/921935/extract-nfsrootfs-x4wm86k7,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 09:48:05.906221 - bootm 0x01080000 0x08000000 0x01070000
305 09:48:05.906775 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 09:48:05.908435 start: 2.3 connect-device (timeout 00:05:00) [common]
308 09:48:05.908896 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 09:48:05.924784 Setting prompt string to ['lava-test: # ']
310 09:48:05.926420 end: 2.3 connect-device (duration 00:00:00) [common]
311 09:48:05.927070 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 09:48:05.927667 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 09:48:05.928293 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 09:48:05.929675 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 09:48:05.967251 >> OK - accepted request
316 09:48:05.970278 Returned 0 in 0 seconds
317 09:48:06.071518 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 09:48:06.073432 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 09:48:06.074047 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 09:48:06.074611 Setting prompt string to ['Hit any key to stop autoboot']
322 09:48:06.075120 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 09:48:06.076880 Trying 192.168.56.21...
324 09:48:06.077421 Connected to conserv1.
325 09:48:06.077880 Escape character is '^]'.
326 09:48:06.078333
327 09:48:06.078789 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 09:48:06.079254
329 09:48:13.017907 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 09:48:13.018312 bl2_stage_init 0x01
331 09:48:13.018529 bl2_stage_init 0x81
332 09:48:13.023533 hw id: 0x0000 - pwm id 0x01
333 09:48:13.023834 bl2_stage_init 0xc1
334 09:48:13.029051 bl2_stage_init 0x02
335 09:48:13.029327
336 09:48:13.029537 L0:00000000
337 09:48:13.029739 L1:00000703
338 09:48:13.029949 L2:00008067
339 09:48:13.030144 L3:15000000
340 09:48:13.034538 S1:00000000
341 09:48:13.034787 B2:20282000
342 09:48:13.034999 B1:a0f83180
343 09:48:13.035197
344 09:48:13.035405 TE: 70638
345 09:48:13.035617
346 09:48:13.040378 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 09:48:13.040633
348 09:48:13.045837 Board ID = 1
349 09:48:13.046096 Set cpu clk to 24M
350 09:48:13.046298 Set clk81 to 24M
351 09:48:13.051547 Use GP1_pll as DSU clk.
352 09:48:13.051807 DSU clk: 1200 Mhz
353 09:48:13.052031 CPU clk: 1200 MHz
354 09:48:13.056897 Set clk81 to 166.6M
355 09:48:13.062579 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 09:48:13.062958 board id: 1
357 09:48:13.069750 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 09:48:13.080647 fw parse done
359 09:48:13.086554 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 09:48:13.129106 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 09:48:13.140049 PIEI prepare done
362 09:48:13.140564 fastboot data load
363 09:48:13.141069 fastboot data verify
364 09:48:13.145592 verify result: 266
365 09:48:13.151359 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 09:48:13.151826 LPDDR4 probe
367 09:48:13.152301 ddr clk to 1584MHz
368 09:48:13.159137 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 09:48:13.196529
370 09:48:13.197086 dmc_version 0001
371 09:48:13.203089 Check phy result
372 09:48:13.208956 INFO : End of CA training
373 09:48:13.209417 INFO : End of initialization
374 09:48:13.214634 INFO : Training has run successfully!
375 09:48:13.215096 Check phy result
376 09:48:13.220322 INFO : End of initialization
377 09:48:13.220779 INFO : End of read enable training
378 09:48:13.225847 INFO : End of fine write leveling
379 09:48:13.231438 INFO : End of Write leveling coarse delay
380 09:48:13.231901 INFO : Training has run successfully!
381 09:48:13.232375 Check phy result
382 09:48:13.236992 INFO : End of initialization
383 09:48:13.237447 INFO : End of read dq deskew training
384 09:48:13.242645 INFO : End of MPR read delay center optimization
385 09:48:13.248335 INFO : End of write delay center optimization
386 09:48:13.253801 INFO : End of read delay center optimization
387 09:48:13.254251 INFO : End of max read latency training
388 09:48:13.259390 INFO : Training has run successfully!
389 09:48:13.259859 1D training succeed
390 09:48:13.268552 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 09:48:13.316313 Check phy result
392 09:48:13.316923 INFO : End of initialization
393 09:48:13.338573 INFO : End of 2D read delay Voltage center optimization
394 09:48:13.357760 INFO : End of 2D read delay Voltage center optimization
395 09:48:13.409608 INFO : End of 2D write delay Voltage center optimization
396 09:48:13.458853 INFO : End of 2D write delay Voltage center optimization
397 09:48:13.464371 INFO : Training has run successfully!
398 09:48:13.464598
399 09:48:13.464804 channel==0
400 09:48:13.469956 RxClkDly_Margin_A0==78 ps 8
401 09:48:13.470468 TxDqDly_Margin_A0==98 ps 10
402 09:48:13.473377 RxClkDly_Margin_A1==69 ps 7
403 09:48:13.473878 TxDqDly_Margin_A1==88 ps 9
404 09:48:13.478894 TrainedVREFDQ_A0==74
405 09:48:13.479371 TrainedVREFDQ_A1==75
406 09:48:13.479770 VrefDac_Margin_A0==23
407 09:48:13.484419 DeviceVref_Margin_A0==40
408 09:48:13.484890 VrefDac_Margin_A1==23
409 09:48:13.490086 DeviceVref_Margin_A1==39
410 09:48:13.490554
411 09:48:13.490952
412 09:48:13.491345 channel==1
413 09:48:13.491733 RxClkDly_Margin_A0==88 ps 9
414 09:48:13.493495 TxDqDly_Margin_A0==98 ps 10
415 09:48:13.499188 RxClkDly_Margin_A1==78 ps 8
416 09:48:13.499669 TxDqDly_Margin_A1==88 ps 9
417 09:48:13.500099 TrainedVREFDQ_A0==78
418 09:48:13.504640 TrainedVREFDQ_A1==75
419 09:48:13.505124 VrefDac_Margin_A0==23
420 09:48:13.510234 DeviceVref_Margin_A0==36
421 09:48:13.510721 VrefDac_Margin_A1==22
422 09:48:13.511114 DeviceVref_Margin_A1==39
423 09:48:13.511497
424 09:48:13.519184 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 09:48:13.519512
426 09:48:13.545163 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 09:48:13.550518 2D training succeed
428 09:48:13.554219 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 09:48:13.559583 auto size-- 65535DDR cs0 size: 2048MB
430 09:48:13.560098 DDR cs1 size: 2048MB
431 09:48:13.565313 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 09:48:13.565765 cs0 DataBus test pass
433 09:48:13.570828 cs1 DataBus test pass
434 09:48:13.571287 cs0 AddrBus test pass
435 09:48:13.571676 cs1 AddrBus test pass
436 09:48:13.572090
437 09:48:13.576340 100bdlr_step_size ps== 471
438 09:48:13.576702 result report
439 09:48:13.581983 boot times 0Enable ddr reg access
440 09:48:13.587022 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 09:48:13.600820 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 09:48:14.255314 bl2z: ptr: 05129330, size: 00001e40
443 09:48:14.261755 0.0;M3 CHK:0;cm4_sp_mode 0
444 09:48:14.262594 MVN_1=0x00000000
445 09:48:14.263320 MVN_2=0x00000000
446 09:48:14.273189 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 09:48:14.273594 OPS=0x04
448 09:48:14.273939 ring efuse init
449 09:48:14.278830 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 09:48:14.279253 [0.017319 Inits done]
451 09:48:14.279629 secure task start!
452 09:48:14.286520 high task start!
453 09:48:14.287078 low task start!
454 09:48:14.287488 run into bl31
455 09:48:14.295153 NOTICE: BL31: v1.3(release):4fc40b1
456 09:48:14.302954 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 09:48:14.303472 NOTICE: BL31: G12A normal boot!
458 09:48:14.318502 NOTICE: BL31: BL33 decompress pass
459 09:48:14.324206 ERROR: Error initializing runtime service opteed_fast
460 09:48:15.568740 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 09:48:15.569374 bl2_stage_init 0x01
462 09:48:15.569785 bl2_stage_init 0x81
463 09:48:15.574344 hw id: 0x0000 - pwm id 0x01
464 09:48:15.574840 bl2_stage_init 0xc1
465 09:48:15.579943 bl2_stage_init 0x02
466 09:48:15.580494
467 09:48:15.580898 L0:00000000
468 09:48:15.581286 L1:00000703
469 09:48:15.581681 L2:00008067
470 09:48:15.582072 L3:15000000
471 09:48:15.585634 S1:00000000
472 09:48:15.586184 B2:20282000
473 09:48:15.586581 B1:a0f83180
474 09:48:15.586968
475 09:48:15.587355 TE: 71430
476 09:48:15.587739
477 09:48:15.591203 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 09:48:15.591703
479 09:48:15.596760 Board ID = 1
480 09:48:15.597254 Set cpu clk to 24M
481 09:48:15.597651 Set clk81 to 24M
482 09:48:15.602363 Use GP1_pll as DSU clk.
483 09:48:15.602848 DSU clk: 1200 Mhz
484 09:48:15.603243 CPU clk: 1200 MHz
485 09:48:15.607912 Set clk81 to 166.6M
486 09:48:15.613557 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 09:48:15.614030 board id: 1
488 09:48:15.620698 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 09:48:15.631379 fw parse done
490 09:48:15.637305 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 09:48:15.679967 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 09:48:15.691031 PIEI prepare done
493 09:48:15.691545 fastboot data load
494 09:48:15.691946 fastboot data verify
495 09:48:15.696657 verify result: 266
496 09:48:15.702196 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 09:48:15.702673 LPDDR4 probe
498 09:48:15.703067 ddr clk to 1584MHz
499 09:48:17.068135 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 09:48:17.068778 bl2_stage_init 0x01
501 09:48:17.069210 bl2_stage_init 0x81
502 09:48:17.073811 hw id: 0x0000 - pwm id 0x01
503 09:48:17.074303 bl2_stage_init 0xc1
504 09:48:17.079279 bl2_stage_init 0x02
505 09:48:17.079788
506 09:48:17.080230 L0:00000000
507 09:48:17.080622 L1:00000703
508 09:48:17.081004 L2:00008067
509 09:48:17.081387 L3:15000000
510 09:48:17.084861 S1:00000000
511 09:48:17.085313 B2:20282000
512 09:48:17.085704 B1:a0f83180
513 09:48:17.086085
514 09:48:17.086469 TE: 71172
515 09:48:17.086853
516 09:48:17.090417 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 09:48:17.090891
518 09:48:17.096110 Board ID = 1
519 09:48:17.096628 Set cpu clk to 24M
520 09:48:17.097029 Set clk81 to 24M
521 09:48:17.101783 Use GP1_pll as DSU clk.
522 09:48:17.102238 DSU clk: 1200 Mhz
523 09:48:17.102627 CPU clk: 1200 MHz
524 09:48:17.107234 Set clk81 to 166.6M
525 09:48:17.112893 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 09:48:17.113354 board id: 1
527 09:48:17.121212 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 09:48:17.130959 fw parse done
529 09:48:17.136904 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 09:48:17.180023 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 09:48:17.191210 PIEI prepare done
532 09:48:17.191691 fastboot data load
533 09:48:17.192193 fastboot data verify
534 09:48:17.196923 verify result: 266
535 09:48:17.202509 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 09:48:17.202979 LPDDR4 probe
537 09:48:17.203364 ddr clk to 1584MHz
538 09:48:17.210408 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 09:48:17.248123
540 09:48:17.248603 dmc_version 0001
541 09:48:17.255188 Check phy result
542 09:48:17.261213 INFO : End of CA training
543 09:48:17.261718 INFO : End of initialization
544 09:48:17.266877 INFO : Training has run successfully!
545 09:48:17.267349 Check phy result
546 09:48:17.272383 INFO : End of initialization
547 09:48:17.272856 INFO : End of read enable training
548 09:48:17.277978 INFO : End of fine write leveling
549 09:48:17.283630 INFO : End of Write leveling coarse delay
550 09:48:17.284131 INFO : Training has run successfully!
551 09:48:17.284549 Check phy result
552 09:48:17.289188 INFO : End of initialization
553 09:48:17.289659 INFO : End of read dq deskew training
554 09:48:17.294919 INFO : End of MPR read delay center optimization
555 09:48:17.300392 INFO : End of write delay center optimization
556 09:48:17.306005 INFO : End of read delay center optimization
557 09:48:17.306466 INFO : End of max read latency training
558 09:48:17.311599 INFO : Training has run successfully!
559 09:48:17.312091 1D training succeed
560 09:48:17.320708 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 09:48:17.369095 Check phy result
562 09:48:17.369626 INFO : End of initialization
563 09:48:17.396536 INFO : End of 2D read delay Voltage center optimization
564 09:48:17.420674 INFO : End of 2D read delay Voltage center optimization
565 09:48:17.477265 INFO : End of 2D write delay Voltage center optimization
566 09:48:17.531397 INFO : End of 2D write delay Voltage center optimization
567 09:48:17.536940 INFO : Training has run successfully!
568 09:48:17.537402
569 09:48:17.537817 channel==0
570 09:48:17.542526 RxClkDly_Margin_A0==78 ps 8
571 09:48:17.542985 TxDqDly_Margin_A0==98 ps 10
572 09:48:17.548086 RxClkDly_Margin_A1==88 ps 9
573 09:48:17.548548 TxDqDly_Margin_A1==88 ps 9
574 09:48:17.548960 TrainedVREFDQ_A0==74
575 09:48:17.553694 TrainedVREFDQ_A1==74
576 09:48:17.554161 VrefDac_Margin_A0==23
577 09:48:17.554564 DeviceVref_Margin_A0==40
578 09:48:17.559286 VrefDac_Margin_A1==23
579 09:48:17.559743 DeviceVref_Margin_A1==40
580 09:48:17.560203
581 09:48:17.560611
582 09:48:17.561006 channel==1
583 09:48:17.564886 RxClkDly_Margin_A0==88 ps 9
584 09:48:17.565348 TxDqDly_Margin_A0==98 ps 10
585 09:48:17.570566 RxClkDly_Margin_A1==78 ps 8
586 09:48:17.571027 TxDqDly_Margin_A1==78 ps 8
587 09:48:17.576108 TrainedVREFDQ_A0==78
588 09:48:17.576578 TrainedVREFDQ_A1==75
589 09:48:17.576984 VrefDac_Margin_A0==22
590 09:48:17.581702 DeviceVref_Margin_A0==36
591 09:48:17.582164 VrefDac_Margin_A1==22
592 09:48:17.587315 DeviceVref_Margin_A1==39
593 09:48:17.587778
594 09:48:17.588223 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 09:48:17.588630
596 09:48:17.620903 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
597 09:48:17.621443 2D training succeed
598 09:48:17.626583 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 09:48:17.632100 auto size-- 65535DDR cs0 size: 2048MB
600 09:48:17.632567 DDR cs1 size: 2048MB
601 09:48:17.637679 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 09:48:17.638146 cs0 DataBus test pass
603 09:48:17.643313 cs1 DataBus test pass
604 09:48:17.643776 cs0 AddrBus test pass
605 09:48:17.644225 cs1 AddrBus test pass
606 09:48:17.644626
607 09:48:17.648907 100bdlr_step_size ps== 471
608 09:48:17.649379 result report
609 09:48:17.654564 boot times 0Enable ddr reg access
610 09:48:17.659680 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 09:48:17.673487 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 09:48:18.333292 bl2z: ptr: 05129330, size: 00001e40
613 09:48:18.342037 0.0;M3 CHK:0;cm4_sp_mode 0
614 09:48:18.342543 MVN_1=0x00000000
615 09:48:18.342957 MVN_2=0x00000000
616 09:48:18.353362 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 09:48:18.353847 OPS=0x04
618 09:48:18.354260 ring efuse init
619 09:48:18.356331 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 09:48:18.362863 [0.017354 Inits done]
621 09:48:18.363323 secure task start!
622 09:48:18.363729 high task start!
623 09:48:18.364193 low task start!
624 09:48:18.367149 run into bl31
625 09:48:18.375797 NOTICE: BL31: v1.3(release):4fc40b1
626 09:48:18.383582 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 09:48:18.384083 NOTICE: BL31: G12A normal boot!
628 09:48:18.399232 NOTICE: BL31: BL33 decompress pass
629 09:48:18.406124 ERROR: Error initializing runtime service opteed_fast
630 09:48:19.618061 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 09:48:19.618666 bl2_stage_init 0x01
632 09:48:19.619087 bl2_stage_init 0x81
633 09:48:19.623636 hw id: 0x0000 - pwm id 0x01
634 09:48:19.624147 bl2_stage_init 0xc1
635 09:48:19.629413 bl2_stage_init 0x02
636 09:48:19.629874
637 09:48:19.630292 L0:00000000
638 09:48:19.630693 L1:00000703
639 09:48:19.631088 L2:00008067
640 09:48:19.631482 L3:15000000
641 09:48:19.634981 S1:00000000
642 09:48:19.635454 B2:20282000
643 09:48:19.635864 B1:a0f83180
644 09:48:19.636302
645 09:48:19.636704 TE: 70492
646 09:48:19.637100
647 09:48:19.640488 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 09:48:19.640952
649 09:48:19.646173 Board ID = 1
650 09:48:19.646630 Set cpu clk to 24M
651 09:48:19.647038 Set clk81 to 24M
652 09:48:19.649689 Use GP1_pll as DSU clk.
653 09:48:19.650146 DSU clk: 1200 Mhz
654 09:48:19.655338 CPU clk: 1200 MHz
655 09:48:19.655796 Set clk81 to 166.6M
656 09:48:19.660855 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 09:48:19.661315 board id: 1
658 09:48:19.669979 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 09:48:19.680964 fw parse done
660 09:48:19.686975 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 09:48:19.729922 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 09:48:19.741014 PIEI prepare done
663 09:48:19.741470 fastboot data load
664 09:48:19.741882 fastboot data verify
665 09:48:19.746643 verify result: 266
666 09:48:19.752279 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 09:48:19.752737 LPDDR4 probe
668 09:48:19.753140 ddr clk to 1584MHz
669 09:48:19.760345 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 09:48:19.797955
671 09:48:19.798420 dmc_version 0001
672 09:48:19.805019 Check phy result
673 09:48:19.810953 INFO : End of CA training
674 09:48:19.811408 INFO : End of initialization
675 09:48:19.816581 INFO : Training has run successfully!
676 09:48:19.817040 Check phy result
677 09:48:19.822265 INFO : End of initialization
678 09:48:19.822718 INFO : End of read enable training
679 09:48:19.827817 INFO : End of fine write leveling
680 09:48:19.833410 INFO : End of Write leveling coarse delay
681 09:48:19.833866 INFO : Training has run successfully!
682 09:48:19.834270 Check phy result
683 09:48:19.839026 INFO : End of initialization
684 09:48:19.839485 INFO : End of read dq deskew training
685 09:48:19.844601 INFO : End of MPR read delay center optimization
686 09:48:19.850268 INFO : End of write delay center optimization
687 09:48:19.855786 INFO : End of read delay center optimization
688 09:48:19.856272 INFO : End of max read latency training
689 09:48:19.861423 INFO : Training has run successfully!
690 09:48:19.861884 1D training succeed
691 09:48:19.870560 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 09:48:19.918937 Check phy result
693 09:48:19.919444 INFO : End of initialization
694 09:48:19.946408 INFO : End of 2D read delay Voltage center optimization
695 09:48:19.970383 INFO : End of 2D read delay Voltage center optimization
696 09:48:20.027083 INFO : End of 2D write delay Voltage center optimization
697 09:48:20.081181 INFO : End of 2D write delay Voltage center optimization
698 09:48:20.086799 INFO : Training has run successfully!
699 09:48:20.087259
700 09:48:20.087669 channel==0
701 09:48:20.092355 RxClkDly_Margin_A0==88 ps 9
702 09:48:20.092825 TxDqDly_Margin_A0==98 ps 10
703 09:48:20.097983 RxClkDly_Margin_A1==88 ps 9
704 09:48:20.098438 TxDqDly_Margin_A1==88 ps 9
705 09:48:20.098842 TrainedVREFDQ_A0==74
706 09:48:20.103587 TrainedVREFDQ_A1==74
707 09:48:20.104083 VrefDac_Margin_A0==24
708 09:48:20.104547 DeviceVref_Margin_A0==40
709 09:48:20.109226 VrefDac_Margin_A1==23
710 09:48:20.109717 DeviceVref_Margin_A1==40
711 09:48:20.110135
712 09:48:20.110541
713 09:48:20.110938 channel==1
714 09:48:20.114834 RxClkDly_Margin_A0==88 ps 9
715 09:48:20.115302 TxDqDly_Margin_A0==98 ps 10
716 09:48:20.120378 RxClkDly_Margin_A1==78 ps 8
717 09:48:20.120833 TxDqDly_Margin_A1==78 ps 8
718 09:48:20.126148 TrainedVREFDQ_A0==78
719 09:48:20.126611 TrainedVREFDQ_A1==75
720 09:48:20.127014 VrefDac_Margin_A0==22
721 09:48:20.131621 DeviceVref_Margin_A0==36
722 09:48:20.132107 VrefDac_Margin_A1==22
723 09:48:20.137176 DeviceVref_Margin_A1==38
724 09:48:20.137632
725 09:48:20.138038 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 09:48:20.138436
727 09:48:20.170765 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
728 09:48:20.171273 2D training succeed
729 09:48:20.176485 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 09:48:20.181879 auto size-- 65535DDR cs0 size: 2048MB
731 09:48:20.182340 DDR cs1 size: 2048MB
732 09:48:20.187442 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 09:48:20.187901 cs0 DataBus test pass
734 09:48:20.193059 cs1 DataBus test pass
735 09:48:20.193520 cs0 AddrBus test pass
736 09:48:20.193920 cs1 AddrBus test pass
737 09:48:20.194310
738 09:48:20.198640 100bdlr_step_size ps== 471
739 09:48:20.199114 result report
740 09:48:20.204263 boot times 0Enable ddr reg access
741 09:48:20.209473 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 09:48:20.223287 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 09:48:20.882615 bl2z: ptr: 05129330, size: 00001e40
744 09:48:20.890481 0.0;M3 CHK:0;cm4_sp_mode 0
745 09:48:20.890963 MVN_1=0x00000000
746 09:48:20.891372 MVN_2=0x00000000
747 09:48:20.901909 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 09:48:20.902378 OPS=0x04
749 09:48:20.902793 ring efuse init
750 09:48:20.904891 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 09:48:20.910647 [0.017355 Inits done]
752 09:48:20.911124 secure task start!
753 09:48:20.911535 high task start!
754 09:48:20.911933 low task start!
755 09:48:20.914930 run into bl31
756 09:48:20.923499 NOTICE: BL31: v1.3(release):4fc40b1
757 09:48:20.931431 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 09:48:20.931899 NOTICE: BL31: G12A normal boot!
759 09:48:20.946863 NOTICE: BL31: BL33 decompress pass
760 09:48:20.952579 ERROR: Error initializing runtime service opteed_fast
761 09:48:21.747903
762 09:48:21.748526
763 09:48:21.753470 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 09:48:21.753942
765 09:48:21.756897 Model: Libre Computer AML-S905D3-CC Solitude
766 09:48:21.903908 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 09:48:21.919365 DRAM: 2 GiB (effective 3.8 GiB)
768 09:48:22.020250 Core: 406 devices, 33 uclasses, devicetree: separate
769 09:48:22.027237 WDT: Not starting watchdog@f0d0
770 09:48:22.051196 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 09:48:22.063473 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 09:48:22.068414 ** Bad device specification mmc 0 **
773 09:48:22.078583 Card did not respond to voltage select! : -110
774 09:48:22.086228 ** Bad device specification mmc 0 **
775 09:48:22.086723 Couldn't find partition mmc 0
776 09:48:22.094532 Card did not respond to voltage select! : -110
777 09:48:22.100010 ** Bad device specification mmc 0 **
778 09:48:22.100468 Couldn't find partition mmc 0
779 09:48:22.105018 Error: could not access storage.
780 09:48:22.402704 Net: eth0: ethernet@ff3f0000
781 09:48:22.403290 starting USB...
782 09:48:22.647120 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 09:48:22.647523 Starting the controller
784 09:48:22.654275 USB XHCI 1.10
785 09:48:24.225592 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 09:48:24.228657 scanning usb for storage devices... 0 Storage Device(s) found
788 09:48:24.279715 Hit any key to stop autoboot: 1
789 09:48:24.280674 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 09:48:24.281042 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
791 09:48:24.281310 Setting prompt string to ['=>']
792 09:48:24.281568 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
793 09:48:24.292520 0
794 09:48:24.293146 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 09:48:24.394197 => setenv autoload no
797 09:48:24.395121 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 09:48:24.399163 setenv autoload no
800 09:48:24.500162 => setenv initrd_high 0xffffffff
801 09:48:24.500776 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 09:48:24.504948 setenv initrd_high 0xffffffff
804 09:48:24.607078 => setenv fdt_high 0xffffffff
805 09:48:24.607929 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 09:48:24.612344 setenv fdt_high 0xffffffff
808 09:48:24.714217 => dhcp
809 09:48:24.715054 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 09:48:24.719275 dhcp
811 09:48:25.274883 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
812 09:48:25.275534 Speed: 1000, full duplex
813 09:48:25.276029 BOOTP broadcast 1
814 09:48:25.296170 DHCP client bound to address 192.168.6.21 (21 ms)
816 09:48:25.397713 => setenv serverip 192.168.6.2
817 09:48:25.398471 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
818 09:48:25.402970 setenv serverip 192.168.6.2
820 09:48:25.504552 => tftpboot 0x01080000 921935/tftp-deploy-wc3q94cn/kernel/uImage
821 09:48:25.505333 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
822 09:48:25.512234 tftpboot 0x01080000 921935/tftp-deploy-wc3q94cn/kernel/uImage
823 09:48:25.512773 Speed: 1000, full duplex
824 09:48:25.513218 Using ethernet@ff3f0000 device
825 09:48:25.517780 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
826 09:48:25.523221 Filename '921935/tftp-deploy-wc3q94cn/kernel/uImage'.
827 09:48:25.527140 Load address: 0x1080000
828 09:48:28.677502 Loading: *################################################## 43.8 MiB
829 09:48:28.678129 13.9 MiB/s
830 09:48:28.678535 done
831 09:48:28.681855 Bytes transferred = 45908544 (2bc8240 hex)
833 09:48:28.783295 => tftpboot 0x08000000 921935/tftp-deploy-wc3q94cn/ramdisk/ramdisk.cpio.gz.uboot
834 09:48:28.783977 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
835 09:48:28.790759 tftpboot 0x08000000 921935/tftp-deploy-wc3q94cn/ramdisk/ramdisk.cpio.gz.uboot
836 09:48:28.791212 Speed: 1000, full duplex
837 09:48:28.791607 Using ethernet@ff3f0000 device
838 09:48:28.796483 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
839 09:48:28.806146 Filename '921935/tftp-deploy-wc3q94cn/ramdisk/ramdisk.cpio.gz.uboot'.
840 09:48:28.806614 Load address: 0x8000000
841 09:48:30.442989 Loading: *################################################# UDP wrong checksum 00000005 00005a6e
842 09:48:35.444735 T UDP wrong checksum 00000005 00005a6e
843 09:48:45.446972 T T UDP wrong checksum 00000005 00005a6e
844 09:49:05.448436 T T T UDP wrong checksum 00000005 00005a6e
845 09:49:25.455656 T T T T
846 09:49:25.456334 Retry count exceeded; starting again
848 09:49:25.457747 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
851 09:49:25.459584 end: 2.4 uboot-commands (duration 00:01:20) [common]
853 09:49:25.461010 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
855 09:49:25.462017 end: 2 uboot-action (duration 00:01:20) [common]
857 09:49:25.463518 Cleaning after the job
858 09:49:25.464078 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/ramdisk
859 09:49:25.465501 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/kernel
860 09:49:25.510870 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/dtb
861 09:49:25.511805 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/nfsrootfs
862 09:49:25.590873 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921935/tftp-deploy-wc3q94cn/modules
863 09:49:25.610898 start: 4.1 power-off (timeout 00:00:30) [common]
864 09:49:25.611563 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
865 09:49:25.645084 >> OK - accepted request
866 09:49:25.647064 Returned 0 in 0 seconds
867 09:49:25.747818 end: 4.1 power-off (duration 00:00:00) [common]
869 09:49:25.748801 start: 4.2 read-feedback (timeout 00:10:00) [common]
870 09:49:25.749454 Listened to connection for namespace 'common' for up to 1s
871 09:49:26.750397 Finalising connection for namespace 'common'
872 09:49:26.750888 Disconnecting from shell: Finalise
873 09:49:26.751164 =>
874 09:49:26.851921 end: 4.2 read-feedback (duration 00:00:01) [common]
875 09:49:26.852643 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/921935
876 09:49:29.376930 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/921935
877 09:49:29.377572 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.