Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:50:22.046717 lava-dispatcher, installed at version: 2024.01
2 09:50:22.047508 start: 0 validate
3 09:50:22.048008 Start time: 2024-11-01 09:50:22.047949+00:00 (UTC)
4 09:50:22.048555 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:50:22.049094 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:50:22.092266 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:50:22.092851 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 09:50:22.126519 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:50:22.127182 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 09:50:22.160252 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:50:22.160791 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:50:22.190292 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:50:22.190810 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241101%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 09:50:22.230345 validate duration: 0.18
16 09:50:22.231418 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:50:22.231766 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:50:22.232093 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:50:22.232726 Not decompressing ramdisk as can be used compressed.
20 09:50:22.233233 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 09:50:22.233516 saving as /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/ramdisk/initrd.cpio.gz
22 09:50:22.233797 total size: 5628140 (5 MB)
23 09:50:22.273010 progress 0 % (0 MB)
24 09:50:22.279063 progress 5 % (0 MB)
25 09:50:22.285117 progress 10 % (0 MB)
26 09:50:22.288802 progress 15 % (0 MB)
27 09:50:22.293174 progress 20 % (1 MB)
28 09:50:22.296808 progress 25 % (1 MB)
29 09:50:22.300772 progress 30 % (1 MB)
30 09:50:22.304812 progress 35 % (1 MB)
31 09:50:22.308465 progress 40 % (2 MB)
32 09:50:22.312402 progress 45 % (2 MB)
33 09:50:22.316024 progress 50 % (2 MB)
34 09:50:22.319858 progress 55 % (2 MB)
35 09:50:22.323816 progress 60 % (3 MB)
36 09:50:22.327339 progress 65 % (3 MB)
37 09:50:22.331412 progress 70 % (3 MB)
38 09:50:22.334935 progress 75 % (4 MB)
39 09:50:22.338740 progress 80 % (4 MB)
40 09:50:22.342159 progress 85 % (4 MB)
41 09:50:22.345801 progress 90 % (4 MB)
42 09:50:22.349425 progress 95 % (5 MB)
43 09:50:22.352760 progress 100 % (5 MB)
44 09:50:22.353425 5 MB downloaded in 0.12 s (44.88 MB/s)
45 09:50:22.353998 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:50:22.354917 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:50:22.355237 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:50:22.355530 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:50:22.356046 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/kernel/Image
51 09:50:22.356315 saving as /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/kernel/Image
52 09:50:22.356535 total size: 45908480 (43 MB)
53 09:50:22.356754 No compression specified
54 09:50:22.394838 progress 0 % (0 MB)
55 09:50:22.422361 progress 5 % (2 MB)
56 09:50:22.449741 progress 10 % (4 MB)
57 09:50:22.476652 progress 15 % (6 MB)
58 09:50:22.503734 progress 20 % (8 MB)
59 09:50:22.530629 progress 25 % (10 MB)
60 09:50:22.557244 progress 30 % (13 MB)
61 09:50:22.583577 progress 35 % (15 MB)
62 09:50:22.609930 progress 40 % (17 MB)
63 09:50:22.636467 progress 45 % (19 MB)
64 09:50:22.663494 progress 50 % (21 MB)
65 09:50:22.690329 progress 55 % (24 MB)
66 09:50:22.717082 progress 60 % (26 MB)
67 09:50:22.743932 progress 65 % (28 MB)
68 09:50:22.770713 progress 70 % (30 MB)
69 09:50:22.797524 progress 75 % (32 MB)
70 09:50:22.824688 progress 80 % (35 MB)
71 09:50:22.851777 progress 85 % (37 MB)
72 09:50:22.879032 progress 90 % (39 MB)
73 09:50:22.905817 progress 95 % (41 MB)
74 09:50:22.931950 progress 100 % (43 MB)
75 09:50:22.932473 43 MB downloaded in 0.58 s (76.02 MB/s)
76 09:50:22.932946 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:50:22.933749 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:50:22.934024 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:50:22.934290 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:50:22.934754 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 09:50:22.934996 saving as /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 09:50:22.935202 total size: 53209 (0 MB)
84 09:50:22.935412 No compression specified
85 09:50:22.978571 progress 61 % (0 MB)
86 09:50:22.979410 progress 100 % (0 MB)
87 09:50:22.979943 0 MB downloaded in 0.04 s (1.13 MB/s)
88 09:50:22.980447 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:50:22.981259 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:50:22.981523 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:50:22.981787 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:50:22.982237 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 09:50:22.982481 saving as /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/nfsrootfs/full.rootfs.tar
95 09:50:22.982686 total size: 474398908 (452 MB)
96 09:50:22.982897 Using unxz to decompress xz
97 09:50:23.016044 progress 0 % (0 MB)
98 09:50:24.108205 progress 5 % (22 MB)
99 09:50:25.544191 progress 10 % (45 MB)
100 09:50:25.981414 progress 15 % (67 MB)
101 09:50:26.808867 progress 20 % (90 MB)
102 09:50:27.393431 progress 25 % (113 MB)
103 09:50:27.802691 progress 30 % (135 MB)
104 09:50:28.429141 progress 35 % (158 MB)
105 09:50:29.416442 progress 40 % (181 MB)
106 09:50:30.302490 progress 45 % (203 MB)
107 09:50:31.035200 progress 50 % (226 MB)
108 09:50:31.796348 progress 55 % (248 MB)
109 09:50:33.006887 progress 60 % (271 MB)
110 09:50:34.454155 progress 65 % (294 MB)
111 09:50:36.030548 progress 70 % (316 MB)
112 09:50:39.149667 progress 75 % (339 MB)
113 09:50:41.594452 progress 80 % (361 MB)
114 09:50:44.523459 progress 85 % (384 MB)
115 09:50:47.814976 progress 90 % (407 MB)
116 09:50:51.021242 progress 95 % (429 MB)
117 09:50:54.238173 progress 100 % (452 MB)
118 09:50:54.252618 452 MB downloaded in 31.27 s (14.47 MB/s)
119 09:50:54.253501 end: 1.4.1 http-download (duration 00:00:31) [common]
121 09:50:54.255070 end: 1.4 download-retry (duration 00:00:31) [common]
122 09:50:54.255582 start: 1.5 download-retry (timeout 00:09:28) [common]
123 09:50:54.256131 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 09:50:54.257327 downloading http://storage.kernelci.org/next/master/next-20241101/arm64/defconfig/gcc-12/modules.tar.xz
125 09:50:54.257814 saving as /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/modules/modules.tar
126 09:50:54.258216 total size: 11594840 (11 MB)
127 09:50:54.258630 Using unxz to decompress xz
128 09:50:54.306627 progress 0 % (0 MB)
129 09:50:54.377364 progress 5 % (0 MB)
130 09:50:54.453607 progress 10 % (1 MB)
131 09:50:54.536094 progress 15 % (1 MB)
132 09:50:54.612556 progress 20 % (2 MB)
133 09:50:54.688506 progress 25 % (2 MB)
134 09:50:54.767927 progress 30 % (3 MB)
135 09:50:54.840602 progress 35 % (3 MB)
136 09:50:54.919959 progress 40 % (4 MB)
137 09:50:55.005408 progress 45 % (5 MB)
138 09:50:55.081965 progress 50 % (5 MB)
139 09:50:55.164968 progress 55 % (6 MB)
140 09:50:55.245260 progress 60 % (6 MB)
141 09:50:55.329615 progress 65 % (7 MB)
142 09:50:55.404503 progress 70 % (7 MB)
143 09:50:55.488363 progress 75 % (8 MB)
144 09:50:55.570468 progress 80 % (8 MB)
145 09:50:55.646432 progress 85 % (9 MB)
146 09:50:55.719146 progress 90 % (9 MB)
147 09:50:55.820529 progress 95 % (10 MB)
148 09:50:55.912168 progress 100 % (11 MB)
149 09:50:55.927043 11 MB downloaded in 1.67 s (6.63 MB/s)
150 09:50:55.927638 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:50:55.929027 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:50:55.929552 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 09:50:55.930066 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 09:51:11.506971 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/921952/extract-nfsrootfs-ktuppk8p
156 09:51:11.507584 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 09:51:11.507906 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 09:51:11.508679 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb
159 09:51:11.509235 makedir: /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin
160 09:51:11.509661 makedir: /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/tests
161 09:51:11.510062 makedir: /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/results
162 09:51:11.510443 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-add-keys
163 09:51:11.510993 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-add-sources
164 09:51:11.511584 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-background-process-start
165 09:51:11.512181 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-background-process-stop
166 09:51:11.512723 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-common-functions
167 09:51:11.513260 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-echo-ipv4
168 09:51:11.513748 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-install-packages
169 09:51:11.514237 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-installed-packages
170 09:51:11.514723 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-os-build
171 09:51:11.515204 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-probe-channel
172 09:51:11.515687 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-probe-ip
173 09:51:11.516205 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-target-ip
174 09:51:11.516703 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-target-mac
175 09:51:11.517270 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-target-storage
176 09:51:11.517777 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-test-case
177 09:51:11.518264 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-test-event
178 09:51:11.518740 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-test-feedback
179 09:51:11.519209 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-test-raise
180 09:51:11.519687 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-test-reference
181 09:51:11.520204 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-test-runner
182 09:51:11.520696 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-test-set
183 09:51:11.521165 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-test-shell
184 09:51:11.521674 Updating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-install-packages (oe)
185 09:51:11.522213 Updating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/bin/lava-installed-packages (oe)
186 09:51:11.522673 Creating /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/environment
187 09:51:11.523051 LAVA metadata
188 09:51:11.523311 - LAVA_JOB_ID=921952
189 09:51:11.523524 - LAVA_DISPATCHER_IP=192.168.6.2
190 09:51:11.523885 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 09:51:11.524893 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 09:51:11.525208 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 09:51:11.525416 skipped lava-vland-overlay
194 09:51:11.525656 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 09:51:11.525911 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 09:51:11.526130 skipped lava-multinode-overlay
197 09:51:11.526370 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 09:51:11.526619 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 09:51:11.526869 Loading test definitions
200 09:51:11.527145 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 09:51:11.527363 Using /lava-921952 at stage 0
202 09:51:11.528526 uuid=921952_1.6.2.4.1 testdef=None
203 09:51:11.528832 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 09:51:11.529091 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 09:51:11.530820 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 09:51:11.531609 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 09:51:11.533849 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 09:51:11.534683 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 09:51:11.536803 runner path: /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 921952_1.6.2.4.1
212 09:51:11.537393 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 09:51:11.538152 Creating lava-test-runner.conf files
215 09:51:11.538350 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/921952/lava-overlay-um4lxdtb/lava-921952/0 for stage 0
216 09:51:11.538693 - 0_v4l2-decoder-conformance-vp9
217 09:51:11.539037 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 09:51:11.539307 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 09:51:11.561022 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 09:51:11.561403 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 09:51:11.561660 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 09:51:11.561924 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 09:51:11.562183 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 09:51:12.185420 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 09:51:12.185886 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 09:51:12.186136 extracting modules file /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/921952/extract-nfsrootfs-ktuppk8p
227 09:51:13.620037 extracting modules file /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/921952/extract-overlay-ramdisk-f_7xtnlp/ramdisk
228 09:51:15.050431 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 09:51:15.050928 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 09:51:15.051208 [common] Applying overlay to NFS
231 09:51:15.051424 [common] Applying overlay /var/lib/lava/dispatcher/tmp/921952/compress-overlay-dj9_aim5/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/921952/extract-nfsrootfs-ktuppk8p
232 09:51:15.081895 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 09:51:15.082343 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 09:51:15.082622 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 09:51:15.082858 Converting downloaded kernel to a uImage
236 09:51:15.083168 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/kernel/Image /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/kernel/uImage
237 09:51:15.600004 output: Image Name:
238 09:51:15.600447 output: Created: Fri Nov 1 09:51:15 2024
239 09:51:15.600656 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 09:51:15.600863 output: Data Size: 45908480 Bytes = 44832.50 KiB = 43.78 MiB
241 09:51:15.601065 output: Load Address: 01080000
242 09:51:15.601266 output: Entry Point: 01080000
243 09:51:15.601463 output:
244 09:51:15.601803 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 09:51:15.602077 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 09:51:15.602349 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 09:51:15.602606 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 09:51:15.602865 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 09:51:15.603124 Building ramdisk /var/lib/lava/dispatcher/tmp/921952/extract-overlay-ramdisk-f_7xtnlp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/921952/extract-overlay-ramdisk-f_7xtnlp/ramdisk
250 09:51:17.815936 >> 167186 blocks
251 09:51:25.617934 Adding RAMdisk u-boot header.
252 09:51:25.618635 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/921952/extract-overlay-ramdisk-f_7xtnlp/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/921952/extract-overlay-ramdisk-f_7xtnlp/ramdisk.cpio.gz.uboot
253 09:51:25.873311 output: Image Name:
254 09:51:25.873731 output: Created: Fri Nov 1 09:51:25 2024
255 09:51:25.873946 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 09:51:25.874152 output: Data Size: 23441257 Bytes = 22891.85 KiB = 22.36 MiB
257 09:51:25.874353 output: Load Address: 00000000
258 09:51:25.874552 output: Entry Point: 00000000
259 09:51:25.874749 output:
260 09:51:25.875409 rename /var/lib/lava/dispatcher/tmp/921952/extract-overlay-ramdisk-f_7xtnlp/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/ramdisk/ramdisk.cpio.gz.uboot
261 09:51:25.875831 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 09:51:25.876296 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 09:51:25.876889 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 09:51:25.877391 No LXC device requested
265 09:51:25.877941 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 09:51:25.878503 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 09:51:25.879047 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 09:51:25.879502 Checking files for TFTP limit of 4294967296 bytes.
269 09:51:25.882422 end: 1 tftp-deploy (duration 00:01:04) [common]
270 09:51:25.883048 start: 2 uboot-action (timeout 00:05:00) [common]
271 09:51:25.883625 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 09:51:25.884212 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 09:51:25.884768 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 09:51:25.885336 Using kernel file from prepare-kernel: 921952/tftp-deploy-impegd7c/kernel/uImage
275 09:51:25.886020 substitutions:
276 09:51:25.886464 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 09:51:25.886904 - {DTB_ADDR}: 0x01070000
278 09:51:25.887340 - {DTB}: 921952/tftp-deploy-impegd7c/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 09:51:25.887775 - {INITRD}: 921952/tftp-deploy-impegd7c/ramdisk/ramdisk.cpio.gz.uboot
280 09:51:25.888242 - {KERNEL_ADDR}: 0x01080000
281 09:51:25.888674 - {KERNEL}: 921952/tftp-deploy-impegd7c/kernel/uImage
282 09:51:25.889104 - {LAVA_MAC}: None
283 09:51:25.889576 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/921952/extract-nfsrootfs-ktuppk8p
284 09:51:25.890012 - {NFS_SERVER_IP}: 192.168.6.2
285 09:51:25.890438 - {PRESEED_CONFIG}: None
286 09:51:25.890864 - {PRESEED_LOCAL}: None
287 09:51:25.891294 - {RAMDISK_ADDR}: 0x08000000
288 09:51:25.891717 - {RAMDISK}: 921952/tftp-deploy-impegd7c/ramdisk/ramdisk.cpio.gz.uboot
289 09:51:25.892212 - {ROOT_PART}: None
290 09:51:25.892649 - {ROOT}: None
291 09:51:25.893075 - {SERVER_IP}: 192.168.6.2
292 09:51:25.893500 - {TEE_ADDR}: 0x83000000
293 09:51:25.893927 - {TEE}: None
294 09:51:25.894353 Parsed boot commands:
295 09:51:25.894768 - setenv autoload no
296 09:51:25.895190 - setenv initrd_high 0xffffffff
297 09:51:25.895609 - setenv fdt_high 0xffffffff
298 09:51:25.896058 - dhcp
299 09:51:25.896489 - setenv serverip 192.168.6.2
300 09:51:25.896911 - tftpboot 0x01080000 921952/tftp-deploy-impegd7c/kernel/uImage
301 09:51:25.897337 - tftpboot 0x08000000 921952/tftp-deploy-impegd7c/ramdisk/ramdisk.cpio.gz.uboot
302 09:51:25.897757 - tftpboot 0x01070000 921952/tftp-deploy-impegd7c/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 09:51:25.898179 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/921952/extract-nfsrootfs-ktuppk8p,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 09:51:25.898615 - bootm 0x01080000 0x08000000 0x01070000
305 09:51:25.899152 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 09:51:25.900787 start: 2.3 connect-device (timeout 00:05:00) [common]
308 09:51:25.901247 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 09:51:25.916133 Setting prompt string to ['lava-test: # ']
310 09:51:25.917711 end: 2.3 connect-device (duration 00:00:00) [common]
311 09:51:25.918342 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 09:51:25.918937 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 09:51:25.919507 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 09:51:25.920752 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 09:51:25.958670 >> OK - accepted request
316 09:51:25.960500 Returned 0 in 0 seconds
317 09:51:26.061668 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 09:51:26.063430 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 09:51:26.064111 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 09:51:26.064688 Setting prompt string to ['Hit any key to stop autoboot']
322 09:51:26.065187 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 09:51:26.066871 Trying 192.168.56.21...
324 09:51:26.067400 Connected to conserv1.
325 09:51:26.067855 Escape character is '^]'.
326 09:51:26.068348
327 09:51:26.068808 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 09:51:26.069265
329 09:51:33.239400 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 09:51:33.240096 bl2_stage_init 0x01
331 09:51:33.240565 bl2_stage_init 0x81
332 09:51:33.245006 hw id: 0x0000 - pwm id 0x01
333 09:51:33.245479 bl2_stage_init 0xc1
334 09:51:33.250478 bl2_stage_init 0x02
335 09:51:33.250943
336 09:51:33.251387 L0:00000000
337 09:51:33.251818 L1:00000703
338 09:51:33.252285 L2:00008067
339 09:51:33.252714 L3:15000000
340 09:51:33.256168 S1:00000000
341 09:51:33.256630 B2:20282000
342 09:51:33.257081 B1:a0f83180
343 09:51:33.257510
344 09:51:33.257943 TE: 69570
345 09:51:33.258376
346 09:51:33.261650 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 09:51:33.262113
348 09:51:33.267310 Board ID = 1
349 09:51:33.267769 Set cpu clk to 24M
350 09:51:33.268243 Set clk81 to 24M
351 09:51:33.272935 Use GP1_pll as DSU clk.
352 09:51:33.273397 DSU clk: 1200 Mhz
353 09:51:33.273826 CPU clk: 1200 MHz
354 09:51:33.278457 Set clk81 to 166.6M
355 09:51:33.284159 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 09:51:33.284617 board id: 1
357 09:51:33.291235 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 09:51:33.302180 fw parse done
359 09:51:33.308118 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 09:51:33.351295 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 09:51:33.362478 PIEI prepare done
362 09:51:33.362935 fastboot data load
363 09:51:33.363370 fastboot data verify
364 09:51:33.368028 verify result: 266
365 09:51:33.373695 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 09:51:33.374146 LPDDR4 probe
367 09:51:33.374577 ddr clk to 1584MHz
368 09:51:33.381596 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 09:51:33.419357
370 09:51:33.419838 dmc_version 0001
371 09:51:33.426346 Check phy result
372 09:51:33.432309 INFO : End of CA training
373 09:51:33.432766 INFO : End of initialization
374 09:51:33.437932 INFO : Training has run successfully!
375 09:51:33.438385 Check phy result
376 09:51:33.443503 INFO : End of initialization
377 09:51:33.443954 INFO : End of read enable training
378 09:51:33.446829 INFO : End of fine write leveling
379 09:51:33.452364 INFO : End of Write leveling coarse delay
380 09:51:33.457961 INFO : Training has run successfully!
381 09:51:33.458410 Check phy result
382 09:51:33.458836 INFO : End of initialization
383 09:51:33.463546 INFO : End of read dq deskew training
384 09:51:33.469161 INFO : End of MPR read delay center optimization
385 09:51:33.469623 INFO : End of write delay center optimization
386 09:51:33.474775 INFO : End of read delay center optimization
387 09:51:33.480370 INFO : End of max read latency training
388 09:51:33.480820 INFO : Training has run successfully!
389 09:51:33.485970 1D training succeed
390 09:51:33.491953 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 09:51:33.540221 Check phy result
392 09:51:33.540682 INFO : End of initialization
393 09:51:33.567670 INFO : End of 2D read delay Voltage center optimization
394 09:51:33.591909 INFO : End of 2D read delay Voltage center optimization
395 09:51:33.648458 INFO : End of 2D write delay Voltage center optimization
396 09:51:33.702415 INFO : End of 2D write delay Voltage center optimization
397 09:51:33.708082 INFO : Training has run successfully!
398 09:51:33.708535
399 09:51:33.708983 channel==0
400 09:51:33.713682 RxClkDly_Margin_A0==88 ps 9
401 09:51:33.714139 TxDqDly_Margin_A0==98 ps 10
402 09:51:33.719207 RxClkDly_Margin_A1==78 ps 8
403 09:51:33.719677 TxDqDly_Margin_A1==98 ps 10
404 09:51:33.720161 TrainedVREFDQ_A0==74
405 09:51:33.724901 TrainedVREFDQ_A1==75
406 09:51:33.725357 VrefDac_Margin_A0==23
407 09:51:33.725786 DeviceVref_Margin_A0==40
408 09:51:33.730552 VrefDac_Margin_A1==22
409 09:51:33.731003 DeviceVref_Margin_A1==39
410 09:51:33.731432
411 09:51:33.731861
412 09:51:33.736100 channel==1
413 09:51:33.736555 RxClkDly_Margin_A0==88 ps 9
414 09:51:33.736984 TxDqDly_Margin_A0==98 ps 10
415 09:51:33.741678 RxClkDly_Margin_A1==78 ps 8
416 09:51:33.742129 TxDqDly_Margin_A1==88 ps 9
417 09:51:33.747253 TrainedVREFDQ_A0==78
418 09:51:33.747707 TrainedVREFDQ_A1==75
419 09:51:33.748173 VrefDac_Margin_A0==22
420 09:51:33.752861 DeviceVref_Margin_A0==36
421 09:51:33.753315 VrefDac_Margin_A1==22
422 09:51:33.758522 DeviceVref_Margin_A1==39
423 09:51:33.758971
424 09:51:33.759403 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 09:51:33.759832
426 09:51:33.791925 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 09:51:33.792505 2D training succeed
428 09:51:33.797531 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 09:51:33.803134 auto size-- 65535DDR cs0 size: 2048MB
430 09:51:33.803588 DDR cs1 size: 2048MB
431 09:51:33.808717 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 09:51:33.809172 cs0 DataBus test pass
433 09:51:33.814350 cs1 DataBus test pass
434 09:51:33.814805 cs0 AddrBus test pass
435 09:51:33.815233 cs1 AddrBus test pass
436 09:51:33.815659
437 09:51:33.819947 100bdlr_step_size ps== 471
438 09:51:33.820446 result report
439 09:51:33.825527 boot times 0Enable ddr reg access
440 09:51:33.830797 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 09:51:33.844799 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 09:51:34.504980 bl2z: ptr: 05129330, size: 00001e40
443 09:51:34.513787 0.0;M3 CHK:0;cm4_sp_mode 0
444 09:51:34.514262 MVN_1=0x00000000
445 09:51:34.514695 MVN_2=0x00000000
446 09:51:34.525245 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 09:51:34.525706 OPS=0x04
448 09:51:34.526142 ring efuse init
449 09:51:34.528177 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 09:51:34.533930 [0.017354 Inits done]
451 09:51:34.534384 secure task start!
452 09:51:34.534812 high task start!
453 09:51:34.535236 low task start!
454 09:51:34.538203 run into bl31
455 09:51:34.546893 NOTICE: BL31: v1.3(release):4fc40b1
456 09:51:34.554658 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 09:51:34.555118 NOTICE: BL31: G12A normal boot!
458 09:51:34.570202 NOTICE: BL31: BL33 decompress pass
459 09:51:34.575879 ERROR: Error initializing runtime service opteed_fast
460 09:51:37.287651 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 09:51:37.288262 bl2_stage_init 0x01
462 09:51:37.288731 bl2_stage_init 0x81
463 09:51:37.293270 hw id: 0x0000 - pwm id 0x01
464 09:51:37.293773 bl2_stage_init 0xc1
465 09:51:37.298917 bl2_stage_init 0x02
466 09:51:37.299462
467 09:51:37.299895 L0:00000000
468 09:51:37.300366 L1:00000703
469 09:51:37.300796 L2:00008067
470 09:51:37.301216 L3:15000000
471 09:51:37.304523 S1:00000000
472 09:51:37.304984 B2:20282000
473 09:51:37.305409 B1:a0f83180
474 09:51:37.305827
475 09:51:37.306246 TE: 69334
476 09:51:37.306667
477 09:51:37.310188 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 09:51:37.310646
479 09:51:37.315635 Board ID = 1
480 09:51:37.316117 Set cpu clk to 24M
481 09:51:37.316542 Set clk81 to 24M
482 09:51:37.321281 Use GP1_pll as DSU clk.
483 09:51:37.321734 DSU clk: 1200 Mhz
484 09:51:37.322159 CPU clk: 1200 MHz
485 09:51:37.326964 Set clk81 to 166.6M
486 09:51:37.332541 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 09:51:37.333000 board id: 1
488 09:51:37.339695 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 09:51:37.350368 fw parse done
490 09:51:37.356308 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 09:51:37.398987 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 09:51:37.409956 PIEI prepare done
493 09:51:37.410402 fastboot data load
494 09:51:37.410828 fastboot data verify
495 09:51:37.415461 verify result: 266
496 09:51:37.421226 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 09:51:37.421677 LPDDR4 probe
498 09:51:37.422099 ddr clk to 1584MHz
499 09:51:37.429107 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 09:51:37.466366
501 09:51:37.466815 dmc_version 0001
502 09:51:37.473071 Check phy result
503 09:51:37.478998 INFO : End of CA training
504 09:51:37.479490 INFO : End of initialization
505 09:51:37.484517 INFO : Training has run successfully!
506 09:51:37.484983 Check phy result
507 09:51:37.490261 INFO : End of initialization
508 09:51:37.490718 INFO : End of read enable training
509 09:51:37.495692 INFO : End of fine write leveling
510 09:51:37.501297 INFO : End of Write leveling coarse delay
511 09:51:37.501764 INFO : Training has run successfully!
512 09:51:37.502204 Check phy result
513 09:51:37.506869 INFO : End of initialization
514 09:51:37.507328 INFO : End of read dq deskew training
515 09:51:37.512494 INFO : End of MPR read delay center optimization
516 09:51:37.518108 INFO : End of write delay center optimization
517 09:51:37.523674 INFO : End of read delay center optimization
518 09:51:37.524162 INFO : End of max read latency training
519 09:51:37.529287 INFO : Training has run successfully!
520 09:51:37.529752 1D training succeed
521 09:51:37.538507 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 09:51:37.586091 Check phy result
523 09:51:37.586547 INFO : End of initialization
524 09:51:37.608377 INFO : End of 2D read delay Voltage center optimization
525 09:51:37.627567 INFO : End of 2D read delay Voltage center optimization
526 09:51:37.679485 INFO : End of 2D write delay Voltage center optimization
527 09:51:37.728604 INFO : End of 2D write delay Voltage center optimization
528 09:51:37.734328 INFO : Training has run successfully!
529 09:51:37.734786
530 09:51:37.735227 channel==0
531 09:51:37.739794 RxClkDly_Margin_A0==88 ps 9
532 09:51:37.740298 TxDqDly_Margin_A0==98 ps 10
533 09:51:37.745391 RxClkDly_Margin_A1==88 ps 9
534 09:51:37.745849 TxDqDly_Margin_A1==98 ps 10
535 09:51:37.746293 TrainedVREFDQ_A0==74
536 09:51:37.751012 TrainedVREFDQ_A1==74
537 09:51:37.751476 VrefDac_Margin_A0==22
538 09:51:37.751913 DeviceVref_Margin_A0==40
539 09:51:37.756595 VrefDac_Margin_A1==23
540 09:51:37.757055 DeviceVref_Margin_A1==40
541 09:51:37.757491
542 09:51:37.757923
543 09:51:37.762268 channel==1
544 09:51:37.762746 RxClkDly_Margin_A0==88 ps 9
545 09:51:37.763183 TxDqDly_Margin_A0==98 ps 10
546 09:51:37.767801 RxClkDly_Margin_A1==78 ps 8
547 09:51:37.768295 TxDqDly_Margin_A1==88 ps 9
548 09:51:37.773410 TrainedVREFDQ_A0==78
549 09:51:37.773891 TrainedVREFDQ_A1==75
550 09:51:37.774331 VrefDac_Margin_A0==23
551 09:51:37.779024 DeviceVref_Margin_A0==36
552 09:51:37.779487 VrefDac_Margin_A1==22
553 09:51:37.784583 DeviceVref_Margin_A1==38
554 09:51:37.785057
555 09:51:37.785501 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 09:51:37.785939
557 09:51:37.818284 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 09:51:37.818780 2D training succeed
559 09:51:37.823768 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 09:51:37.829402 auto size-- 65535DDR cs0 size: 2048MB
561 09:51:37.829864 DDR cs1 size: 2048MB
562 09:51:37.835091 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 09:51:37.835550 cs0 DataBus test pass
564 09:51:37.840610 cs1 DataBus test pass
565 09:51:37.841086 cs0 AddrBus test pass
566 09:51:37.841521 cs1 AddrBus test pass
567 09:51:37.841954
568 09:51:37.846290 100bdlr_step_size ps== 478
569 09:51:37.846762 result report
570 09:51:37.851802 boot times 0Enable ddr reg access
571 09:51:37.857100 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 09:51:37.870861 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 09:51:38.524915 bl2z: ptr: 05129330, size: 00001e40
574 09:51:38.531925 0.0;M3 CHK:0;cm4_sp_mode 0
575 09:51:38.532457 MVN_1=0x00000000
576 09:51:38.532897 MVN_2=0x00000000
577 09:51:38.543423 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 09:51:38.543894 OPS=0x04
579 09:51:38.544380 ring efuse init
580 09:51:38.546408 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 09:51:38.552847 [0.017319 Inits done]
582 09:51:38.553309 secure task start!
583 09:51:38.553747 high task start!
584 09:51:38.554184 low task start!
585 09:51:38.557051 run into bl31
586 09:51:38.565640 NOTICE: BL31: v1.3(release):4fc40b1
587 09:51:38.573455 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 09:51:38.573931 NOTICE: BL31: G12A normal boot!
589 09:51:38.588898 NOTICE: BL31: BL33 decompress pass
590 09:51:38.594580 ERROR: Error initializing runtime service opteed_fast
591 09:51:39.838629 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 09:51:39.839193 bl2_stage_init 0x01
593 09:51:39.839648 bl2_stage_init 0x81
594 09:51:39.844266 hw id: 0x0000 - pwm id 0x01
595 09:51:39.844747 bl2_stage_init 0xc1
596 09:51:39.849453 bl2_stage_init 0x02
597 09:51:39.849918
598 09:51:39.850364 L0:00000000
599 09:51:39.850797 L1:00000703
600 09:51:39.851231 L2:00008067
601 09:51:39.855000 L3:15000000
602 09:51:39.855466 S1:00000000
603 09:51:39.855908 B2:20282000
604 09:51:39.856382 B1:a0f83180
605 09:51:39.856819
606 09:51:39.857256 TE: 68657
607 09:51:39.857693
608 09:51:39.860610 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 09:51:39.866181
610 09:51:39.866654 Board ID = 1
611 09:51:39.867108 Set cpu clk to 24M
612 09:51:39.867548 Set clk81 to 24M
613 09:51:39.871696 Use GP1_pll as DSU clk.
614 09:51:39.872192 DSU clk: 1200 Mhz
615 09:51:39.872634 CPU clk: 1200 MHz
616 09:51:39.877315 Set clk81 to 166.6M
617 09:51:39.882933 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 09:51:39.883401 board id: 1
619 09:51:39.890674 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 09:51:39.901208 fw parse done
621 09:51:39.907216 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 09:51:39.949844 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 09:51:39.960772 PIEI prepare done
624 09:51:39.961231 fastboot data load
625 09:51:39.961672 fastboot data verify
626 09:51:39.966373 verify result: 266
627 09:51:39.971899 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 09:51:39.972414 LPDDR4 probe
629 09:51:39.972859 ddr clk to 1584MHz
630 09:51:39.979927 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 09:51:40.017142
632 09:51:40.017608 dmc_version 0001
633 09:51:40.023829 Check phy result
634 09:51:40.029749 INFO : End of CA training
635 09:51:40.030214 INFO : End of initialization
636 09:51:40.035481 INFO : Training has run successfully!
637 09:51:40.035945 Check phy result
638 09:51:40.040922 INFO : End of initialization
639 09:51:40.041387 INFO : End of read enable training
640 09:51:40.046661 INFO : End of fine write leveling
641 09:51:40.052176 INFO : End of Write leveling coarse delay
642 09:51:40.052641 INFO : Training has run successfully!
643 09:51:40.053079 Check phy result
644 09:51:40.057782 INFO : End of initialization
645 09:51:40.058245 INFO : End of read dq deskew training
646 09:51:40.063351 INFO : End of MPR read delay center optimization
647 09:51:40.068938 INFO : End of write delay center optimization
648 09:51:40.074643 INFO : End of read delay center optimization
649 09:51:40.075107 INFO : End of max read latency training
650 09:51:40.080164 INFO : Training has run successfully!
651 09:51:40.080628 1D training succeed
652 09:51:40.089361 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 09:51:40.136892 Check phy result
654 09:51:40.137356 INFO : End of initialization
655 09:51:40.159335 INFO : End of 2D read delay Voltage center optimization
656 09:51:40.178527 INFO : End of 2D read delay Voltage center optimization
657 09:51:40.230251 INFO : End of 2D write delay Voltage center optimization
658 09:51:40.279612 INFO : End of 2D write delay Voltage center optimization
659 09:51:40.285094 INFO : Training has run successfully!
660 09:51:40.285561
661 09:51:40.286005 channel==0
662 09:51:40.290822 RxClkDly_Margin_A0==78 ps 8
663 09:51:40.291283 TxDqDly_Margin_A0==98 ps 10
664 09:51:40.294082 RxClkDly_Margin_A1==88 ps 9
665 09:51:40.294548 TxDqDly_Margin_A1==98 ps 10
666 09:51:40.299777 TrainedVREFDQ_A0==74
667 09:51:40.300274 TrainedVREFDQ_A1==75
668 09:51:40.300716 VrefDac_Margin_A0==24
669 09:51:40.305273 DeviceVref_Margin_A0==40
670 09:51:40.305733 VrefDac_Margin_A1==23
671 09:51:40.310894 DeviceVref_Margin_A1==39
672 09:51:40.311366
673 09:51:40.311808
674 09:51:40.312284 channel==1
675 09:51:40.312723 RxClkDly_Margin_A0==88 ps 9
676 09:51:40.316508 TxDqDly_Margin_A0==98 ps 10
677 09:51:40.316974 RxClkDly_Margin_A1==78 ps 8
678 09:51:40.322047 TxDqDly_Margin_A1==88 ps 9
679 09:51:40.322520 TrainedVREFDQ_A0==78
680 09:51:40.322962 TrainedVREFDQ_A1==75
681 09:51:40.327737 VrefDac_Margin_A0==22
682 09:51:40.328233 DeviceVref_Margin_A0==36
683 09:51:40.333221 VrefDac_Margin_A1==22
684 09:51:40.333689 DeviceVref_Margin_A1==39
685 09:51:40.334129
686 09:51:40.338895 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 09:51:40.339359
688 09:51:40.366766 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
689 09:51:40.372363 2D training succeed
690 09:51:40.377928 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 09:51:40.378396 auto size-- 65535DDR cs0 size: 2048MB
692 09:51:40.383624 DDR cs1 size: 2048MB
693 09:51:40.384131 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 09:51:40.389139 cs0 DataBus test pass
695 09:51:40.389604 cs1 DataBus test pass
696 09:51:40.390046 cs0 AddrBus test pass
697 09:51:40.394719 cs1 AddrBus test pass
698 09:51:40.395185
699 09:51:40.395628 100bdlr_step_size ps== 478
700 09:51:40.396109 result report
701 09:51:40.400369 boot times 0Enable ddr reg access
702 09:51:40.407892 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 09:51:40.421710 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 09:51:41.076746 bl2z: ptr: 05129330, size: 00001e40
705 09:51:41.083103 0.0;M3 CHK:0;cm4_sp_mode 0
706 09:51:41.083599 MVN_1=0x00000000
707 09:51:41.084099 MVN_2=0x00000000
708 09:51:41.094663 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 09:51:41.095146 OPS=0x04
710 09:51:41.095593 ring efuse init
711 09:51:41.097695 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 09:51:41.103662 [0.017319 Inits done]
713 09:51:41.104161 secure task start!
714 09:51:41.104612 high task start!
715 09:51:41.105050 low task start!
716 09:51:41.107819 run into bl31
717 09:51:41.116434 NOTICE: BL31: v1.3(release):4fc40b1
718 09:51:41.124267 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 09:51:41.124746 NOTICE: BL31: G12A normal boot!
720 09:51:41.139719 NOTICE: BL31: BL33 decompress pass
721 09:51:41.145499 ERROR: Error initializing runtime service opteed_fast
722 09:51:41.940983
723 09:51:41.941423
724 09:51:41.946856 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 09:51:41.947263
726 09:51:41.950033 Model: Libre Computer AML-S905D3-CC Solitude
727 09:51:42.097173 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 09:51:42.112228 DRAM: 2 GiB (effective 3.8 GiB)
729 09:51:42.213287 Core: 406 devices, 33 uclasses, devicetree: separate
730 09:51:42.219019 WDT: Not starting watchdog@f0d0
731 09:51:42.244253 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 09:51:42.256284 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 09:51:42.261275 ** Bad device specification mmc 0 **
734 09:51:42.271381 Card did not respond to voltage select! : -110
735 09:51:42.278996 ** Bad device specification mmc 0 **
736 09:51:42.279562 Couldn't find partition mmc 0
737 09:51:42.287294 Card did not respond to voltage select! : -110
738 09:51:42.292895 ** Bad device specification mmc 0 **
739 09:51:42.293413 Couldn't find partition mmc 0
740 09:51:42.297901 Error: could not access storage.
741 09:51:42.594312 Net: eth0: ethernet@ff3f0000
742 09:51:42.594922 starting USB...
743 09:51:42.838983 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 09:51:42.839523 Starting the controller
745 09:51:42.845975 USB XHCI 1.10
746 09:51:44.399438 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 09:51:44.407731 scanning usb for storage devices... 0 Storage Device(s) found
749 09:51:44.459309 Hit any key to stop autoboot: 1
750 09:51:44.460178 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
751 09:51:44.460815 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 09:51:44.461339 Setting prompt string to ['=>']
753 09:51:44.461864 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 09:51:44.473759 0
755 09:51:44.474681 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 09:51:44.575940 => setenv autoload no
758 09:51:44.576669 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 09:51:44.581880 setenv autoload no
761 09:51:44.683377 => setenv initrd_high 0xffffffff
762 09:51:44.684050 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 09:51:44.688322 setenv initrd_high 0xffffffff
765 09:51:44.789789 => setenv fdt_high 0xffffffff
766 09:51:44.790458 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 09:51:44.794777 setenv fdt_high 0xffffffff
769 09:51:44.896290 => dhcp
770 09:51:44.896952 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 09:51:44.900980 dhcp
772 09:51:45.405649 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 09:51:45.406206 Speed: 1000, full duplex
774 09:51:45.406659 BOOTP broadcast 1
775 09:51:45.655128 BOOTP broadcast 2
776 09:51:45.675349 DHCP client bound to address 192.168.6.21 (268 ms)
778 09:51:45.776955 => setenv serverip 192.168.6.2
779 09:51:45.777669 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
780 09:51:45.782314 setenv serverip 192.168.6.2
782 09:51:45.883800 => tftpboot 0x01080000 921952/tftp-deploy-impegd7c/kernel/uImage
783 09:51:45.884541 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
784 09:51:45.891320 tftpboot 0x01080000 921952/tftp-deploy-impegd7c/kernel/uImage
785 09:51:45.891834 Speed: 1000, full duplex
786 09:51:45.892328 Using ethernet@ff3f0000 device
787 09:51:45.896823 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 09:51:45.902309 Filename '921952/tftp-deploy-impegd7c/kernel/uImage'.
789 09:51:45.906264 Load address: 0x1080000
790 09:51:46.344696 Loading: *###### UDP wrong checksum 000000ff 00009dfa
791 09:51:46.357986 UDP wrong checksum 000000ff 000026ed
792 09:51:48.893065 ############################################ 43.8 MiB
793 09:51:48.893709 14.6 MiB/s
794 09:51:48.894198 done
795 09:51:48.896600 Bytes transferred = 45908544 (2bc8240 hex)
797 09:51:48.998350 => tftpboot 0x08000000 921952/tftp-deploy-impegd7c/ramdisk/ramdisk.cpio.gz.uboot
798 09:51:48.999146 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
799 09:51:49.006076 tftpboot 0x08000000 921952/tftp-deploy-impegd7c/ramdisk/ramdisk.cpio.gz.uboot
800 09:51:49.006607 Speed: 1000, full duplex
801 09:51:49.007058 Using ethernet@ff3f0000 device
802 09:51:49.011485 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
803 09:51:49.021333 Filename '921952/tftp-deploy-impegd7c/ramdisk/ramdisk.cpio.gz.uboot'.
804 09:51:49.021869 Load address: 0x8000000
805 09:51:50.599404 Loading: *################################################# UDP wrong checksum 00000005 00008b57
806 09:51:55.600254 T UDP wrong checksum 00000005 00008b57
807 09:51:57.019858 UDP wrong checksum 000000ff 0000b9b2
808 09:51:57.066956 UDP wrong checksum 000000ff 000045a5
809 09:52:05.602030 T T UDP wrong checksum 00000005 00008b57
810 09:52:25.604545 T T T UDP wrong checksum 00000005 00008b57
811 09:52:45.610761 T T T T
812 09:52:45.611178 Retry count exceeded; starting again
814 09:52:45.612951 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
817 09:52:45.614772 end: 2.4 uboot-commands (duration 00:01:20) [common]
819 09:52:45.616134 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
821 09:52:45.617146 end: 2 uboot-action (duration 00:01:20) [common]
823 09:52:45.619728 Cleaning after the job
824 09:52:45.620166 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/ramdisk
825 09:52:45.621014 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/kernel
826 09:52:45.663778 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/dtb
827 09:52:45.664711 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/nfsrootfs
828 09:52:45.774058 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/921952/tftp-deploy-impegd7c/modules
829 09:52:45.793420 start: 4.1 power-off (timeout 00:00:30) [common]
830 09:52:45.794101 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
831 09:52:45.831369 >> OK - accepted request
832 09:52:45.833387 Returned 0 in 0 seconds
833 09:52:45.934208 end: 4.1 power-off (duration 00:00:00) [common]
835 09:52:45.935243 start: 4.2 read-feedback (timeout 00:10:00) [common]
836 09:52:45.936106 Listened to connection for namespace 'common' for up to 1s
837 09:52:46.936466 Finalising connection for namespace 'common'
838 09:52:46.936904 Disconnecting from shell: Finalise
839 09:52:46.937178 =>
840 09:52:47.037854 end: 4.2 read-feedback (duration 00:00:01) [common]
841 09:52:47.038466 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/921952
842 09:52:49.844908 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/921952
843 09:52:49.845520 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.