Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 07:36:25.730505 lava-dispatcher, installed at version: 2024.01
2 07:36:25.731287 start: 0 validate
3 07:36:25.731753 Start time: 2024-11-04 07:36:25.731723+00:00 (UTC)
4 07:36:25.732340 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 07:36:25.732873 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 07:36:25.778629 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 07:36:25.779193 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241104%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 07:36:25.812265 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 07:36:25.812922 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241104%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 07:36:25.842915 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 07:36:25.843432 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 07:36:25.875385 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 07:36:25.875902 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241104%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 07:36:25.913621 validate duration: 0.18
16 07:36:25.914468 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 07:36:25.914782 start: 1.1 download-retry (timeout 00:10:00) [common]
18 07:36:25.915098 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 07:36:25.915675 Not decompressing ramdisk as can be used compressed.
20 07:36:25.916146 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 07:36:25.916429 saving as /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/ramdisk/initrd.cpio.gz
22 07:36:25.916697 total size: 5628169 (5 MB)
23 07:36:25.953145 progress 0 % (0 MB)
24 07:36:25.958107 progress 5 % (0 MB)
25 07:36:25.963354 progress 10 % (0 MB)
26 07:36:25.968147 progress 15 % (0 MB)
27 07:36:25.973243 progress 20 % (1 MB)
28 07:36:25.977822 progress 25 % (1 MB)
29 07:36:25.982961 progress 30 % (1 MB)
30 07:36:25.988028 progress 35 % (1 MB)
31 07:36:25.992470 progress 40 % (2 MB)
32 07:36:25.997519 progress 45 % (2 MB)
33 07:36:26.002159 progress 50 % (2 MB)
34 07:36:26.007053 progress 55 % (2 MB)
35 07:36:26.012040 progress 60 % (3 MB)
36 07:36:26.016566 progress 65 % (3 MB)
37 07:36:26.021567 progress 70 % (3 MB)
38 07:36:26.025959 progress 75 % (4 MB)
39 07:36:26.030865 progress 80 % (4 MB)
40 07:36:26.035461 progress 85 % (4 MB)
41 07:36:26.040400 progress 90 % (4 MB)
42 07:36:26.045249 progress 95 % (5 MB)
43 07:36:26.049265 progress 100 % (5 MB)
44 07:36:26.050039 5 MB downloaded in 0.13 s (40.26 MB/s)
45 07:36:26.050685 end: 1.1.1 http-download (duration 00:00:00) [common]
47 07:36:26.051790 end: 1.1 download-retry (duration 00:00:00) [common]
48 07:36:26.052156 start: 1.2 download-retry (timeout 00:10:00) [common]
49 07:36:26.052498 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 07:36:26.053055 downloading http://storage.kernelci.org/next/master/next-20241104/arm64/defconfig/gcc-12/kernel/Image
51 07:36:26.053348 saving as /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/kernel/Image
52 07:36:26.053600 total size: 46041600 (43 MB)
53 07:36:26.053855 No compression specified
54 07:36:26.088223 progress 0 % (0 MB)
55 07:36:26.116613 progress 5 % (2 MB)
56 07:36:26.144795 progress 10 % (4 MB)
57 07:36:26.172778 progress 15 % (6 MB)
58 07:36:26.201950 progress 20 % (8 MB)
59 07:36:26.230319 progress 25 % (11 MB)
60 07:36:26.258844 progress 30 % (13 MB)
61 07:36:26.287256 progress 35 % (15 MB)
62 07:36:26.316951 progress 40 % (17 MB)
63 07:36:26.346187 progress 45 % (19 MB)
64 07:36:26.376623 progress 50 % (21 MB)
65 07:36:26.406112 progress 55 % (24 MB)
66 07:36:26.437138 progress 60 % (26 MB)
67 07:36:26.465716 progress 65 % (28 MB)
68 07:36:26.494145 progress 70 % (30 MB)
69 07:36:26.522730 progress 75 % (32 MB)
70 07:36:26.551942 progress 80 % (35 MB)
71 07:36:26.580141 progress 85 % (37 MB)
72 07:36:26.608937 progress 90 % (39 MB)
73 07:36:26.637480 progress 95 % (41 MB)
74 07:36:26.665592 progress 100 % (43 MB)
75 07:36:26.666163 43 MB downloaded in 0.61 s (71.68 MB/s)
76 07:36:26.666642 end: 1.2.1 http-download (duration 00:00:01) [common]
78 07:36:26.667457 end: 1.2 download-retry (duration 00:00:01) [common]
79 07:36:26.667732 start: 1.3 download-retry (timeout 00:09:59) [common]
80 07:36:26.668026 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 07:36:26.668489 downloading http://storage.kernelci.org/next/master/next-20241104/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 07:36:26.668741 saving as /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/dtb/meson-g12b-a311d-libretech-cc.dtb
83 07:36:26.668956 total size: 54703 (0 MB)
84 07:36:26.669165 No compression specified
85 07:36:26.708019 progress 59 % (0 MB)
86 07:36:26.708879 progress 100 % (0 MB)
87 07:36:26.709424 0 MB downloaded in 0.04 s (1.29 MB/s)
88 07:36:26.709886 end: 1.3.1 http-download (duration 00:00:00) [common]
90 07:36:26.710704 end: 1.3 download-retry (duration 00:00:00) [common]
91 07:36:26.710968 start: 1.4 download-retry (timeout 00:09:59) [common]
92 07:36:26.711229 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 07:36:26.711668 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 07:36:26.711909 saving as /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/nfsrootfs/full.rootfs.tar
95 07:36:26.712143 total size: 120894716 (115 MB)
96 07:36:26.712358 Using unxz to decompress xz
97 07:36:26.748393 progress 0 % (0 MB)
98 07:36:27.536860 progress 5 % (5 MB)
99 07:36:28.372266 progress 10 % (11 MB)
100 07:36:29.160460 progress 15 % (17 MB)
101 07:36:29.893508 progress 20 % (23 MB)
102 07:36:30.485745 progress 25 % (28 MB)
103 07:36:31.309107 progress 30 % (34 MB)
104 07:36:32.105218 progress 35 % (40 MB)
105 07:36:32.471020 progress 40 % (46 MB)
106 07:36:32.866314 progress 45 % (51 MB)
107 07:36:33.788201 progress 50 % (57 MB)
108 07:36:34.700523 progress 55 % (63 MB)
109 07:36:35.486695 progress 60 % (69 MB)
110 07:36:36.248942 progress 65 % (74 MB)
111 07:36:37.026104 progress 70 % (80 MB)
112 07:36:37.843853 progress 75 % (86 MB)
113 07:36:38.626291 progress 80 % (92 MB)
114 07:36:39.386552 progress 85 % (98 MB)
115 07:36:40.243261 progress 90 % (103 MB)
116 07:36:41.021818 progress 95 % (109 MB)
117 07:36:41.849292 progress 100 % (115 MB)
118 07:36:41.861671 115 MB downloaded in 15.15 s (7.61 MB/s)
119 07:36:41.862237 end: 1.4.1 http-download (duration 00:00:15) [common]
121 07:36:41.863054 end: 1.4 download-retry (duration 00:00:15) [common]
122 07:36:41.863321 start: 1.5 download-retry (timeout 00:09:44) [common]
123 07:36:41.863583 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 07:36:41.864525 downloading http://storage.kernelci.org/next/master/next-20241104/arm64/defconfig/gcc-12/modules.tar.xz
125 07:36:41.865023 saving as /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/modules/modules.tar
126 07:36:41.865431 total size: 11673844 (11 MB)
127 07:36:41.865847 Using unxz to decompress xz
128 07:36:41.909761 progress 0 % (0 MB)
129 07:36:41.976051 progress 5 % (0 MB)
130 07:36:42.049804 progress 10 % (1 MB)
131 07:36:42.146162 progress 15 % (1 MB)
132 07:36:42.246942 progress 20 % (2 MB)
133 07:36:42.325904 progress 25 % (2 MB)
134 07:36:42.396861 progress 30 % (3 MB)
135 07:36:42.474797 progress 35 % (3 MB)
136 07:36:42.550993 progress 40 % (4 MB)
137 07:36:42.626525 progress 45 % (5 MB)
138 07:36:42.709768 progress 50 % (5 MB)
139 07:36:42.786103 progress 55 % (6 MB)
140 07:36:42.870905 progress 60 % (6 MB)
141 07:36:42.951615 progress 65 % (7 MB)
142 07:36:43.031482 progress 70 % (7 MB)
143 07:36:43.115302 progress 75 % (8 MB)
144 07:36:43.199333 progress 80 % (8 MB)
145 07:36:43.274366 progress 85 % (9 MB)
146 07:36:43.355775 progress 90 % (10 MB)
147 07:36:43.432134 progress 95 % (10 MB)
148 07:36:43.508071 progress 100 % (11 MB)
149 07:36:43.518969 11 MB downloaded in 1.65 s (6.73 MB/s)
150 07:36:43.519965 end: 1.5.1 http-download (duration 00:00:02) [common]
152 07:36:43.521801 end: 1.5 download-retry (duration 00:00:02) [common]
153 07:36:43.522374 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 07:36:43.522944 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 07:37:00.869724 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/933147/extract-nfsrootfs-ncrmwjhb
156 07:37:00.870353 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 07:37:00.870649 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 07:37:00.871414 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1
159 07:37:00.871915 makedir: /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin
160 07:37:00.872313 makedir: /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/tests
161 07:37:00.872651 makedir: /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/results
162 07:37:00.873002 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-add-keys
163 07:37:00.873612 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-add-sources
164 07:37:00.874173 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-background-process-start
165 07:37:00.874735 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-background-process-stop
166 07:37:00.875386 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-common-functions
167 07:37:00.875959 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-echo-ipv4
168 07:37:00.876601 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-install-packages
169 07:37:00.877140 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-installed-packages
170 07:37:00.877658 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-os-build
171 07:37:00.878180 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-probe-channel
172 07:37:00.878700 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-probe-ip
173 07:37:00.879219 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-target-ip
174 07:37:00.879739 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-target-mac
175 07:37:00.880394 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-target-storage
176 07:37:00.880971 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-test-case
177 07:37:00.881517 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-test-event
178 07:37:00.882044 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-test-feedback
179 07:37:00.882559 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-test-raise
180 07:37:00.883072 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-test-reference
181 07:37:00.883584 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-test-runner
182 07:37:00.884135 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-test-set
183 07:37:00.884698 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-test-shell
184 07:37:00.885268 Updating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-add-keys (debian)
185 07:37:00.885851 Updating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-add-sources (debian)
186 07:37:00.886423 Updating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-install-packages (debian)
187 07:37:00.886982 Updating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-installed-packages (debian)
188 07:37:00.887537 Updating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/bin/lava-os-build (debian)
189 07:37:00.888052 Creating /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/environment
190 07:37:00.888492 LAVA metadata
191 07:37:00.888769 - LAVA_JOB_ID=933147
192 07:37:00.888986 - LAVA_DISPATCHER_IP=192.168.6.2
193 07:37:00.889385 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 07:37:00.890456 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 07:37:00.890817 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 07:37:00.891027 skipped lava-vland-overlay
197 07:37:00.891267 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 07:37:00.891524 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 07:37:00.891746 skipped lava-multinode-overlay
200 07:37:00.892016 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 07:37:00.892277 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 07:37:00.892538 Loading test definitions
203 07:37:00.892828 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 07:37:00.893052 Using /lava-933147 at stage 0
205 07:37:00.894238 uuid=933147_1.6.2.4.1 testdef=None
206 07:37:00.894592 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 07:37:00.894864 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 07:37:00.896630 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 07:37:00.897462 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 07:37:00.899554 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 07:37:00.900439 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 07:37:00.902339 runner path: /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/0/tests/0_timesync-off test_uuid 933147_1.6.2.4.1
215 07:37:00.902903 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 07:37:00.903723 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 07:37:00.903948 Using /lava-933147 at stage 0
219 07:37:00.904346 Fetching tests from https://github.com/kernelci/test-definitions.git
220 07:37:00.904639 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/0/tests/1_kselftest-alsa'
221 07:37:04.444114 Running '/usr/bin/git checkout kernelci.org
222 07:37:04.806984 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 07:37:04.808546 uuid=933147_1.6.2.4.5 testdef=None
224 07:37:04.808945 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 07:37:04.809710 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 07:37:04.812809 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 07:37:04.813689 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 07:37:04.817723 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 07:37:04.818650 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 07:37:04.822534 runner path: /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/0/tests/1_kselftest-alsa test_uuid 933147_1.6.2.4.5
234 07:37:04.822883 BOARD='meson-g12b-a311d-libretech-cc'
235 07:37:04.823091 BRANCH='next'
236 07:37:04.823291 SKIPFILE='/dev/null'
237 07:37:04.823488 SKIP_INSTALL='True'
238 07:37:04.823683 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241104/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 07:37:04.823884 TST_CASENAME=''
240 07:37:04.824107 TST_CMDFILES='alsa'
241 07:37:04.824774 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 07:37:04.825610 Creating lava-test-runner.conf files
244 07:37:04.825816 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/933147/lava-overlay-i23f98v1/lava-933147/0 for stage 0
245 07:37:04.826197 - 0_timesync-off
246 07:37:04.826449 - 1_kselftest-alsa
247 07:37:04.826808 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 07:37:04.827112 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 07:37:28.711388 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 07:37:28.711853 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 07:37:28.712186 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 07:37:28.712511 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 07:37:28.712818 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 07:37:29.396574 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 07:37:29.397103 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 07:37:29.397410 extracting modules file /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933147/extract-nfsrootfs-ncrmwjhb
257 07:37:30.937545 extracting modules file /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/933147/extract-overlay-ramdisk-vkhkyiyo/ramdisk
258 07:37:32.599732 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 07:37:32.600295 start: 1.6.5 apply-overlay-tftp (timeout 00:08:53) [common]
260 07:37:32.600599 [common] Applying overlay to NFS
261 07:37:32.600825 [common] Applying overlay /var/lib/lava/dispatcher/tmp/933147/compress-overlay-050zic1v/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/933147/extract-nfsrootfs-ncrmwjhb
262 07:37:35.349302 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 07:37:35.349790 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 07:37:35.350065 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 07:37:35.350296 Converting downloaded kernel to a uImage
266 07:37:35.350616 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/kernel/Image /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/kernel/uImage
267 07:37:35.913811 output: Image Name:
268 07:37:35.914316 output: Created: Mon Nov 4 07:37:35 2024
269 07:37:35.914575 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 07:37:35.914833 output: Data Size: 46041600 Bytes = 44962.50 KiB = 43.91 MiB
271 07:37:35.915072 output: Load Address: 01080000
272 07:37:35.915316 output: Entry Point: 01080000
273 07:37:35.915560 output:
274 07:37:35.915976 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 07:37:35.916388 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 07:37:35.916729 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
277 07:37:35.917054 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 07:37:35.917383 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
279 07:37:35.917699 Building ramdisk /var/lib/lava/dispatcher/tmp/933147/extract-overlay-ramdisk-vkhkyiyo/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/933147/extract-overlay-ramdisk-vkhkyiyo/ramdisk
280 07:37:38.237042 >> 168014 blocks
281 07:37:46.127172 Adding RAMdisk u-boot header.
282 07:37:46.127616 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/933147/extract-overlay-ramdisk-vkhkyiyo/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/933147/extract-overlay-ramdisk-vkhkyiyo/ramdisk.cpio.gz.uboot
283 07:37:46.381097 output: Image Name:
284 07:37:46.381534 output: Created: Mon Nov 4 07:37:46 2024
285 07:37:46.381964 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 07:37:46.382388 output: Data Size: 23544759 Bytes = 22992.93 KiB = 22.45 MiB
287 07:37:46.382804 output: Load Address: 00000000
288 07:37:46.383210 output: Entry Point: 00000000
289 07:37:46.383614 output:
290 07:37:46.384653 rename /var/lib/lava/dispatcher/tmp/933147/extract-overlay-ramdisk-vkhkyiyo/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/ramdisk/ramdisk.cpio.gz.uboot
291 07:37:46.385404 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 07:37:46.385963 end: 1.6 prepare-tftp-overlay (duration 00:01:03) [common]
293 07:37:46.386516 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 07:37:46.387003 No LXC device requested
295 07:37:46.387531 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 07:37:46.388098 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 07:37:46.388639 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 07:37:46.389070 Checking files for TFTP limit of 4294967296 bytes.
299 07:37:46.391816 end: 1 tftp-deploy (duration 00:01:20) [common]
300 07:37:46.392494 start: 2 uboot-action (timeout 00:05:00) [common]
301 07:37:46.393046 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 07:37:46.393560 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 07:37:46.394084 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 07:37:46.394634 Using kernel file from prepare-kernel: 933147/tftp-deploy-b39qr8f6/kernel/uImage
305 07:37:46.395284 substitutions:
306 07:37:46.395710 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 07:37:46.396161 - {DTB_ADDR}: 0x01070000
308 07:37:46.396580 - {DTB}: 933147/tftp-deploy-b39qr8f6/dtb/meson-g12b-a311d-libretech-cc.dtb
309 07:37:46.396994 - {INITRD}: 933147/tftp-deploy-b39qr8f6/ramdisk/ramdisk.cpio.gz.uboot
310 07:37:46.397397 - {KERNEL_ADDR}: 0x01080000
311 07:37:46.397800 - {KERNEL}: 933147/tftp-deploy-b39qr8f6/kernel/uImage
312 07:37:46.398239 - {LAVA_MAC}: None
313 07:37:46.398706 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/933147/extract-nfsrootfs-ncrmwjhb
314 07:37:46.399125 - {NFS_SERVER_IP}: 192.168.6.2
315 07:37:46.399526 - {PRESEED_CONFIG}: None
316 07:37:46.399928 - {PRESEED_LOCAL}: None
317 07:37:46.400364 - {RAMDISK_ADDR}: 0x08000000
318 07:37:46.400766 - {RAMDISK}: 933147/tftp-deploy-b39qr8f6/ramdisk/ramdisk.cpio.gz.uboot
319 07:37:46.401163 - {ROOT_PART}: None
320 07:37:46.401557 - {ROOT}: None
321 07:37:46.401953 - {SERVER_IP}: 192.168.6.2
322 07:37:46.402348 - {TEE_ADDR}: 0x83000000
323 07:37:46.402738 - {TEE}: None
324 07:37:46.403130 Parsed boot commands:
325 07:37:46.403511 - setenv autoload no
326 07:37:46.403901 - setenv initrd_high 0xffffffff
327 07:37:46.404324 - setenv fdt_high 0xffffffff
328 07:37:46.404717 - dhcp
329 07:37:46.405108 - setenv serverip 192.168.6.2
330 07:37:46.405501 - tftpboot 0x01080000 933147/tftp-deploy-b39qr8f6/kernel/uImage
331 07:37:46.405898 - tftpboot 0x08000000 933147/tftp-deploy-b39qr8f6/ramdisk/ramdisk.cpio.gz.uboot
332 07:37:46.406295 - tftpboot 0x01070000 933147/tftp-deploy-b39qr8f6/dtb/meson-g12b-a311d-libretech-cc.dtb
333 07:37:46.406688 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/933147/extract-nfsrootfs-ncrmwjhb,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 07:37:46.407096 - bootm 0x01080000 0x08000000 0x01070000
335 07:37:46.407635 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 07:37:46.409206 start: 2.3 connect-device (timeout 00:05:00) [common]
338 07:37:46.409647 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 07:37:46.423466 Setting prompt string to ['lava-test: # ']
340 07:37:46.425027 end: 2.3 connect-device (duration 00:00:00) [common]
341 07:37:46.425645 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 07:37:46.426223 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 07:37:46.426774 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 07:37:46.427906 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 07:37:46.468000 >> OK - accepted request
346 07:37:46.470051 Returned 0 in 0 seconds
347 07:37:46.571060 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 07:37:46.572650 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 07:37:46.573235 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 07:37:46.573761 Setting prompt string to ['Hit any key to stop autoboot']
352 07:37:46.574220 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 07:37:46.575794 Trying 192.168.56.21...
354 07:37:46.576326 Connected to conserv1.
355 07:37:46.576746 Escape character is '^]'.
356 07:37:46.577175
357 07:37:46.577599 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 07:37:46.578024
359 07:37:58.560913 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 07:37:58.561582 bl2_stage_init 0x01
361 07:37:58.562033 bl2_stage_init 0x81
362 07:37:58.566140 hw id: 0x0000 - pwm id 0x01
363 07:37:58.566687 bl2_stage_init 0xc1
364 07:37:58.567108 bl2_stage_init 0x02
365 07:37:58.567523
366 07:37:58.571679 L0:00000000
367 07:37:58.572233 L1:20000703
368 07:37:58.572643 L2:00008067
369 07:37:58.573101 L3:14000000
370 07:37:58.574801 B2:00402000
371 07:37:58.575262 B1:e0f83180
372 07:37:58.575670
373 07:37:58.576093 TE: 58159
374 07:37:58.576490
375 07:37:58.585834 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 07:37:58.586323
377 07:37:58.586718 Board ID = 1
378 07:37:58.587103 Set A53 clk to 24M
379 07:37:58.587489 Set A73 clk to 24M
380 07:37:58.591377 Set clk81 to 24M
381 07:37:58.591822 A53 clk: 1200 MHz
382 07:37:58.592250 A73 clk: 1200 MHz
383 07:37:58.596894 CLK81: 166.6M
384 07:37:58.597354 smccc: 00012ab4
385 07:37:58.602503 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 07:37:58.602972 board id: 1
387 07:37:58.611112 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 07:37:58.621808 fw parse done
389 07:37:58.627806 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 07:37:58.670479 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 07:37:58.681304 PIEI prepare done
392 07:37:58.681813 fastboot data load
393 07:37:58.682217 fastboot data verify
394 07:37:58.686915 verify result: 266
395 07:37:58.692571 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 07:37:58.693097 LPDDR4 probe
397 07:37:58.693508 ddr clk to 1584MHz
398 07:37:58.700490 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 07:37:58.737773
400 07:37:58.738361 dmc_version 0001
401 07:37:58.744473 Check phy result
402 07:37:58.750264 INFO : End of CA training
403 07:37:58.750763 INFO : End of initialization
404 07:37:58.755898 INFO : Training has run successfully!
405 07:37:58.756403 Check phy result
406 07:37:58.761497 INFO : End of initialization
407 07:37:58.761983 INFO : End of read enable training
408 07:37:58.767037 INFO : End of fine write leveling
409 07:37:58.772724 INFO : End of Write leveling coarse delay
410 07:37:58.773202 INFO : Training has run successfully!
411 07:37:58.773621 Check phy result
412 07:37:58.778287 INFO : End of initialization
413 07:37:58.778775 INFO : End of read dq deskew training
414 07:37:58.783866 INFO : End of MPR read delay center optimization
415 07:37:58.789520 INFO : End of write delay center optimization
416 07:37:58.795070 INFO : End of read delay center optimization
417 07:37:58.795545 INFO : End of max read latency training
418 07:37:58.800716 INFO : Training has run successfully!
419 07:37:58.801198 1D training succeed
420 07:37:58.809887 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 07:37:58.857582 Check phy result
422 07:37:58.858175 INFO : End of initialization
423 07:37:58.879067 INFO : End of 2D read delay Voltage center optimization
424 07:37:58.899198 INFO : End of 2D read delay Voltage center optimization
425 07:37:58.951053 INFO : End of 2D write delay Voltage center optimization
426 07:37:59.000310 INFO : End of 2D write delay Voltage center optimization
427 07:37:59.005839 INFO : Training has run successfully!
428 07:37:59.006278
429 07:37:59.006676 channel==0
430 07:37:59.011610 RxClkDly_Margin_A0==88 ps 9
431 07:37:59.012083 TxDqDly_Margin_A0==98 ps 10
432 07:37:59.014920 RxClkDly_Margin_A1==88 ps 9
433 07:37:59.015370 TxDqDly_Margin_A1==98 ps 10
434 07:37:59.020493 TrainedVREFDQ_A0==74
435 07:37:59.020934 TrainedVREFDQ_A1==75
436 07:37:59.021346 VrefDac_Margin_A0==25
437 07:37:59.026051 DeviceVref_Margin_A0==40
438 07:37:59.026479 VrefDac_Margin_A1==25
439 07:37:59.031638 DeviceVref_Margin_A1==39
440 07:37:59.032098
441 07:37:59.032509
442 07:37:59.032909 channel==1
443 07:37:59.033306 RxClkDly_Margin_A0==98 ps 10
444 07:37:59.035107 TxDqDly_Margin_A0==98 ps 10
445 07:37:59.040713 RxClkDly_Margin_A1==88 ps 9
446 07:37:59.041155 TxDqDly_Margin_A1==88 ps 9
447 07:37:59.041565 TrainedVREFDQ_A0==77
448 07:37:59.046273 TrainedVREFDQ_A1==77
449 07:37:59.046713 VrefDac_Margin_A0==22
450 07:37:59.051850 DeviceVref_Margin_A0==37
451 07:37:59.052315 VrefDac_Margin_A1==24
452 07:37:59.052720 DeviceVref_Margin_A1==37
453 07:37:59.053113
454 07:37:59.060930 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 07:37:59.061371
456 07:37:59.086595 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 07:37:59.092177 2D training succeed
458 07:37:59.097689 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 07:37:59.103169 auto size-- 65535DDR cs0 size: 2048MB
460 07:37:59.103608 DDR cs1 size: 2048MB
461 07:37:59.108795 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 07:37:59.109251 cs0 DataBus test pass
463 07:37:59.109659 cs1 DataBus test pass
464 07:37:59.114374 cs0 AddrBus test pass
465 07:37:59.114816 cs1 AddrBus test pass
466 07:37:59.115220
467 07:37:59.115622 100bdlr_step_size ps== 420
468 07:37:59.120009 result report
469 07:37:59.120477 boot times 0Enable ddr reg access
470 07:37:59.128735 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 07:37:59.142223 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 07:37:59.714230 0.0;M3 CHK:0;cm4_sp_mode 0
473 07:37:59.714860 MVN_1=0x00000000
474 07:37:59.719734 MVN_2=0x00000000
475 07:37:59.725579 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 07:37:59.726102 OPS=0x10
477 07:37:59.726559 ring efuse init
478 07:37:59.727018 chipver efuse init
479 07:37:59.731068 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 07:37:59.736688 [0.018961 Inits done]
481 07:37:59.737259 secure task start!
482 07:37:59.737684 high task start!
483 07:37:59.741011 low task start!
484 07:37:59.741550 run into bl31
485 07:37:59.747904 NOTICE: BL31: v1.3(release):4fc40b1
486 07:37:59.755679 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 07:37:59.756305 NOTICE: BL31: G12A normal boot!
488 07:37:59.781668 NOTICE: BL31: BL33 decompress pass
489 07:37:59.786905 ERROR: Error initializing runtime service opteed_fast
490 07:38:01.020111
491 07:38:01.020524
492 07:38:01.027925 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 07:38:01.028286
494 07:38:01.028531 Model: Libre Computer AML-A311D-CC Alta
495 07:38:01.237039 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 07:38:01.260385 DRAM: 2 GiB (effective 3.8 GiB)
497 07:38:01.403342 Core: 408 devices, 31 uclasses, devicetree: separate
498 07:38:01.408383 WDT: Not starting watchdog@f0d0
499 07:38:01.441516 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 07:38:01.453915 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 07:38:01.458250 ** Bad device specification mmc 0 **
502 07:38:01.469238 Card did not respond to voltage select! : -110
503 07:38:01.476029 ** Bad device specification mmc 0 **
504 07:38:01.476342 Couldn't find partition mmc 0
505 07:38:01.485335 Card did not respond to voltage select! : -110
506 07:38:01.490893 ** Bad device specification mmc 0 **
507 07:38:01.491213 Couldn't find partition mmc 0
508 07:38:01.495536 Error: could not access storage.
509 07:38:02.760970 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 07:38:02.761823 bl2_stage_init 0x01
511 07:38:02.762085 bl2_stage_init 0x81
512 07:38:02.766423 hw id: 0x0000 - pwm id 0x01
513 07:38:02.766712 bl2_stage_init 0xc1
514 07:38:02.766946 bl2_stage_init 0x02
515 07:38:02.767168
516 07:38:02.772273 L0:00000000
517 07:38:02.772838 L1:20000703
518 07:38:02.773099 L2:00008067
519 07:38:02.773333 L3:14000000
520 07:38:02.775543 B2:00402000
521 07:38:02.775827 B1:e0f83180
522 07:38:02.776872
523 07:38:02.777126 TE: 58159
524 07:38:02.777745
525 07:38:02.785902 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 07:38:02.787056
527 07:38:02.787457 Board ID = 1
528 07:38:02.787717 Set A53 clk to 24M
529 07:38:02.787948 Set A73 clk to 24M
530 07:38:02.791843 Set clk81 to 24M
531 07:38:02.792684 A53 clk: 1200 MHz
532 07:38:02.792922 A73 clk: 1200 MHz
533 07:38:02.797556 CLK81: 166.6M
534 07:38:02.798217 smccc: 00012ab5
535 07:38:02.802712 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 07:38:02.803018 board id: 1
537 07:38:02.810714 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 07:38:02.822144 fw parse done
539 07:38:02.828125 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 07:38:02.870386 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 07:38:02.881697 PIEI prepare done
542 07:38:02.882296 fastboot data load
543 07:38:02.882793 fastboot data verify
544 07:38:02.887602 verify result: 266
545 07:38:02.892987 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 07:38:02.893625 LPDDR4 probe
547 07:38:02.894120 ddr clk to 1584MHz
548 07:38:02.900212 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 07:38:02.937977
550 07:38:02.938580 dmc_version 0001
551 07:38:02.943964 Check phy result
552 07:38:02.950664 INFO : End of CA training
553 07:38:02.951170 INFO : End of initialization
554 07:38:02.956259 INFO : Training has run successfully!
555 07:38:02.956817 Check phy result
556 07:38:02.961887 INFO : End of initialization
557 07:38:02.962444 INFO : End of read enable training
558 07:38:02.967409 INFO : End of fine write leveling
559 07:38:02.973046 INFO : End of Write leveling coarse delay
560 07:38:02.973597 INFO : Training has run successfully!
561 07:38:02.974067 Check phy result
562 07:38:02.978656 INFO : End of initialization
563 07:38:02.979204 INFO : End of read dq deskew training
564 07:38:02.984241 INFO : End of MPR read delay center optimization
565 07:38:02.990101 INFO : End of write delay center optimization
566 07:38:02.995656 INFO : End of read delay center optimization
567 07:38:02.996210 INFO : End of max read latency training
568 07:38:03.001057 INFO : Training has run successfully!
569 07:38:03.001554 1D training succeed
570 07:38:03.010008 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 07:38:03.056985 Check phy result
572 07:38:03.057575 INFO : End of initialization
573 07:38:03.079855 INFO : End of 2D read delay Voltage center optimization
574 07:38:03.099458 INFO : End of 2D read delay Voltage center optimization
575 07:38:03.152029 INFO : End of 2D write delay Voltage center optimization
576 07:38:03.201250 INFO : End of 2D write delay Voltage center optimization
577 07:38:03.206783 INFO : Training has run successfully!
578 07:38:03.207352
579 07:38:03.207827 channel==0
580 07:38:03.212498 RxClkDly_Margin_A0==88 ps 9
581 07:38:03.213098 TxDqDly_Margin_A0==98 ps 10
582 07:38:03.218472 RxClkDly_Margin_A1==88 ps 9
583 07:38:03.219058 TxDqDly_Margin_A1==98 ps 10
584 07:38:03.219522 TrainedVREFDQ_A0==74
585 07:38:03.223766 TrainedVREFDQ_A1==74
586 07:38:03.224335 VrefDac_Margin_A0==25
587 07:38:03.224790 DeviceVref_Margin_A0==40
588 07:38:03.230011 VrefDac_Margin_A1==25
589 07:38:03.230534 DeviceVref_Margin_A1==40
590 07:38:03.230986
591 07:38:03.231439
592 07:38:03.234860 channel==1
593 07:38:03.235378 RxClkDly_Margin_A0==98 ps 10
594 07:38:03.235837 TxDqDly_Margin_A0==88 ps 9
595 07:38:03.240461 RxClkDly_Margin_A1==88 ps 9
596 07:38:03.241070 TxDqDly_Margin_A1==88 ps 9
597 07:38:03.246162 TrainedVREFDQ_A0==77
598 07:38:03.246700 TrainedVREFDQ_A1==77
599 07:38:03.247166 VrefDac_Margin_A0==22
600 07:38:03.251712 DeviceVref_Margin_A0==37
601 07:38:03.252289 VrefDac_Margin_A1==24
602 07:38:03.257312 DeviceVref_Margin_A1==37
603 07:38:03.257898
604 07:38:03.258391 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 07:38:03.258874
606 07:38:03.290886 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000017 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 07:38:03.291499 2D training succeed
608 07:38:03.296427 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 07:38:03.302053 auto size-- 65535DDR cs0 size: 2048MB
610 07:38:03.302565 DDR cs1 size: 2048MB
611 07:38:03.307578 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 07:38:03.308115 cs0 DataBus test pass
613 07:38:03.313194 cs1 DataBus test pass
614 07:38:03.313704 cs0 AddrBus test pass
615 07:38:03.314162 cs1 AddrBus test pass
616 07:38:03.314608
617 07:38:03.318811 100bdlr_step_size ps== 420
618 07:38:03.319362 result report
619 07:38:03.324403 boot times 0Enable ddr reg access
620 07:38:03.328991 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 07:38:03.342788 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 07:38:03.916867 0.0;M3 CHK:0;cm4_sp_mode 0
623 07:38:03.917536 MVN_1=0x00000000
624 07:38:03.922418 MVN_2=0x00000000
625 07:38:03.928136 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 07:38:03.928675 OPS=0x10
627 07:38:03.929148 ring efuse init
628 07:38:03.929625 chipver efuse init
629 07:38:03.933701 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 07:38:03.939283 [0.018961 Inits done]
631 07:38:03.939758 secure task start!
632 07:38:03.940240 high task start!
633 07:38:03.942947 low task start!
634 07:38:03.943411 run into bl31
635 07:38:03.950523 NOTICE: BL31: v1.3(release):4fc40b1
636 07:38:03.957721 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 07:38:03.958199 NOTICE: BL31: G12A normal boot!
638 07:38:03.983746 NOTICE: BL31: BL33 decompress pass
639 07:38:03.988993 ERROR: Error initializing runtime service opteed_fast
640 07:38:05.222400
641 07:38:05.222817
642 07:38:05.229700 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 07:38:05.230006
644 07:38:05.230225 Model: Libre Computer AML-A311D-CC Alta
645 07:38:05.438654 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 07:38:05.462637 DRAM: 2 GiB (effective 3.8 GiB)
647 07:38:05.605492 Core: 408 devices, 31 uclasses, devicetree: separate
648 07:38:05.610890 WDT: Not starting watchdog@f0d0
649 07:38:05.643640 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 07:38:05.656108 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 07:38:05.660283 ** Bad device specification mmc 0 **
652 07:38:05.671512 Card did not respond to voltage select! : -110
653 07:38:05.678539 ** Bad device specification mmc 0 **
654 07:38:05.678814 Couldn't find partition mmc 0
655 07:38:05.687491 Card did not respond to voltage select! : -110
656 07:38:05.692969 ** Bad device specification mmc 0 **
657 07:38:05.693238 Couldn't find partition mmc 0
658 07:38:05.697505 Error: could not access storage.
659 07:38:06.039808 Net: eth0: ethernet@ff3f0000
660 07:38:06.040228 starting USB...
661 07:38:06.292205 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 07:38:06.292570 Starting the controller
663 07:38:06.298468 USB XHCI 1.10
664 07:38:08.009702 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 07:38:08.010368 bl2_stage_init 0x01
666 07:38:08.010841 bl2_stage_init 0x81
667 07:38:08.015131 hw id: 0x0000 - pwm id 0x01
668 07:38:08.015621 bl2_stage_init 0xc1
669 07:38:08.016217 bl2_stage_init 0x02
670 07:38:08.016687
671 07:38:08.020915 L0:00000000
672 07:38:08.021411 L1:20000703
673 07:38:08.021862 L2:00008067
674 07:38:08.022301 L3:14000000
675 07:38:08.023904 B2:00402000
676 07:38:08.024421 B1:e0f83180
677 07:38:08.024864
678 07:38:08.025304 TE: 58159
679 07:38:08.025742
680 07:38:08.034972 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 07:38:08.035467
682 07:38:08.035917 Board ID = 1
683 07:38:08.036399 Set A53 clk to 24M
684 07:38:08.036834 Set A73 clk to 24M
685 07:38:08.040532 Set clk81 to 24M
686 07:38:08.041013 A53 clk: 1200 MHz
687 07:38:08.041455 A73 clk: 1200 MHz
688 07:38:08.046156 CLK81: 166.6M
689 07:38:08.046635 smccc: 00012ab5
690 07:38:08.051762 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 07:38:08.052275 board id: 1
692 07:38:08.060279 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 07:38:08.070919 fw parse done
694 07:38:08.076873 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 07:38:08.118635 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 07:38:08.130417 PIEI prepare done
697 07:38:08.130914 fastboot data load
698 07:38:08.131368 fastboot data verify
699 07:38:08.136050 verify result: 266
700 07:38:08.141630 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 07:38:08.142106 LPDDR4 probe
702 07:38:08.142551 ddr clk to 1584MHz
703 07:38:08.149608 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 07:38:08.186867
705 07:38:08.187358 dmc_version 0001
706 07:38:08.193552 Check phy result
707 07:38:08.199395 INFO : End of CA training
708 07:38:08.199869 INFO : End of initialization
709 07:38:08.204977 INFO : Training has run successfully!
710 07:38:08.205459 Check phy result
711 07:38:08.210611 INFO : End of initialization
712 07:38:08.211083 INFO : End of read enable training
713 07:38:08.213919 INFO : End of fine write leveling
714 07:38:08.219454 INFO : End of Write leveling coarse delay
715 07:38:08.225092 INFO : Training has run successfully!
716 07:38:08.225575 Check phy result
717 07:38:08.226023 INFO : End of initialization
718 07:38:08.230763 INFO : End of read dq deskew training
719 07:38:08.236284 INFO : End of MPR read delay center optimization
720 07:38:08.236767 INFO : End of write delay center optimization
721 07:38:08.241925 INFO : End of read delay center optimization
722 07:38:08.247522 INFO : End of max read latency training
723 07:38:08.248033 INFO : Training has run successfully!
724 07:38:08.253139 1D training succeed
725 07:38:08.259009 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 07:38:08.306547 Check phy result
727 07:38:08.307027 INFO : End of initialization
728 07:38:08.329203 INFO : End of 2D read delay Voltage center optimization
729 07:38:08.349428 INFO : End of 2D read delay Voltage center optimization
730 07:38:08.401438 INFO : End of 2D write delay Voltage center optimization
731 07:38:08.450980 INFO : End of 2D write delay Voltage center optimization
732 07:38:08.456473 INFO : Training has run successfully!
733 07:38:08.456769
734 07:38:08.456991 channel==0
735 07:38:08.462087 RxClkDly_Margin_A0==88 ps 9
736 07:38:08.462388 TxDqDly_Margin_A0==98 ps 10
737 07:38:08.465412 RxClkDly_Margin_A1==88 ps 9
738 07:38:08.465703 TxDqDly_Margin_A1==88 ps 9
739 07:38:08.471033 TrainedVREFDQ_A0==74
740 07:38:08.471326 TrainedVREFDQ_A1==74
741 07:38:08.471545 VrefDac_Margin_A0==25
742 07:38:08.476705 DeviceVref_Margin_A0==40
743 07:38:08.476999 VrefDac_Margin_A1==24
744 07:38:08.482202 DeviceVref_Margin_A1==40
745 07:38:08.482497
746 07:38:08.482728
747 07:38:08.482946 channel==1
748 07:38:08.483165 RxClkDly_Margin_A0==98 ps 10
749 07:38:08.487813 TxDqDly_Margin_A0==98 ps 10
750 07:38:08.488253 RxClkDly_Margin_A1==98 ps 10
751 07:38:08.493332 TxDqDly_Margin_A1==88 ps 9
752 07:38:08.493635 TrainedVREFDQ_A0==77
753 07:38:08.493855 TrainedVREFDQ_A1==77
754 07:38:08.499038 VrefDac_Margin_A0==22
755 07:38:08.499335 DeviceVref_Margin_A0==37
756 07:38:08.504606 VrefDac_Margin_A1==22
757 07:38:08.505034 DeviceVref_Margin_A1==37
758 07:38:08.505384
759 07:38:08.510156 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 07:38:08.510458
761 07:38:08.538199 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
762 07:38:08.543842 2D training succeed
763 07:38:08.549258 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 07:38:08.549565 auto size-- 65535DDR cs0 size: 2048MB
765 07:38:08.554849 DDR cs1 size: 2048MB
766 07:38:08.555161 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 07:38:08.560445 cs0 DataBus test pass
768 07:38:08.560867 cs1 DataBus test pass
769 07:38:08.561199 cs0 AddrBus test pass
770 07:38:08.566028 cs1 AddrBus test pass
771 07:38:08.566331
772 07:38:08.566561 100bdlr_step_size ps== 420
773 07:38:08.566775 result report
774 07:38:08.571639 boot times 0Enable ddr reg access
775 07:38:08.579249 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 07:38:08.592857 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 07:38:09.166555 0.0;M3 CHK:0;cm4_sp_mode 0
778 07:38:09.167186 MVN_1=0x00000000
779 07:38:09.172146 MVN_2=0x00000000
780 07:38:09.177858 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 07:38:09.178403 OPS=0x10
782 07:38:09.178845 ring efuse init
783 07:38:09.179274 chipver efuse init
784 07:38:09.183474 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 07:38:09.189055 [0.018960 Inits done]
786 07:38:09.189555 secure task start!
787 07:38:09.189992 high task start!
788 07:38:09.193653 low task start!
789 07:38:09.194180 run into bl31
790 07:38:09.200344 NOTICE: BL31: v1.3(release):4fc40b1
791 07:38:09.208121 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 07:38:09.208659 NOTICE: BL31: G12A normal boot!
793 07:38:09.233410 NOTICE: BL31: BL33 decompress pass
794 07:38:09.239113 ERROR: Error initializing runtime service opteed_fast
795 07:38:10.472049
796 07:38:10.472697
797 07:38:10.480401 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 07:38:10.480957
799 07:38:10.481421 Model: Libre Computer AML-A311D-CC Alta
800 07:38:10.688780 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 07:38:10.712330 DRAM: 2 GiB (effective 3.8 GiB)
802 07:38:10.855724 Core: 408 devices, 31 uclasses, devicetree: separate
803 07:38:10.861104 WDT: Not starting watchdog@f0d0
804 07:38:10.893328 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 07:38:10.905697 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 07:38:10.910717 ** Bad device specification mmc 0 **
807 07:38:10.921058 Card did not respond to voltage select! : -110
808 07:38:10.928721 ** Bad device specification mmc 0 **
809 07:38:10.929341 Couldn't find partition mmc 0
810 07:38:10.937128 Card did not respond to voltage select! : -110
811 07:38:10.942613 ** Bad device specification mmc 0 **
812 07:38:10.943133 Couldn't find partition mmc 0
813 07:38:10.947645 Error: could not access storage.
814 07:38:11.290151 Net: eth0: ethernet@ff3f0000
815 07:38:11.290790 starting USB...
816 07:38:11.541858 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 07:38:11.542429 Starting the controller
818 07:38:11.548900 USB XHCI 1.10
819 07:38:13.709755 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 07:38:13.710174 bl2_stage_init 0x01
821 07:38:13.710402 bl2_stage_init 0x81
822 07:38:13.715378 hw id: 0x0000 - pwm id 0x01
823 07:38:13.715821 bl2_stage_init 0xc1
824 07:38:13.716191 bl2_stage_init 0x02
825 07:38:13.716516
826 07:38:13.722344 L0:00000000
827 07:38:13.722672 L1:20000703
828 07:38:13.722889 L2:00008067
829 07:38:13.723098 L3:14000000
830 07:38:13.726808 B2:00402000
831 07:38:13.727099 B1:e0f83180
832 07:38:13.727313
833 07:38:13.727520 TE: 58167
834 07:38:13.727730
835 07:38:13.735013 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 07:38:13.735470
837 07:38:13.735806 Board ID = 1
838 07:38:13.737701 Set A53 clk to 24M
839 07:38:13.737995 Set A73 clk to 24M
840 07:38:13.738209 Set clk81 to 24M
841 07:38:13.743202 A53 clk: 1200 MHz
842 07:38:13.743500 A73 clk: 1200 MHz
843 07:38:13.743711 CLK81: 166.6M
844 07:38:13.743918 smccc: 00012abd
845 07:38:13.749154 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 07:38:13.754544 board id: 1
847 07:38:13.761678 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 07:38:13.771040 fw parse done
849 07:38:13.779630 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 07:38:13.820507 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 07:38:13.833164 PIEI prepare done
852 07:38:13.833506 fastboot data load
853 07:38:13.833724 fastboot data verify
854 07:38:13.836377 verify result: 266
855 07:38:13.842000 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 07:38:13.842308 LPDDR4 probe
857 07:38:13.842528 ddr clk to 1584MHz
858 07:38:13.850960 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 07:38:13.886810
860 07:38:13.887198 dmc_version 0001
861 07:38:13.895449 Check phy result
862 07:38:13.900682 INFO : End of CA training
863 07:38:13.901017 INFO : End of initialization
864 07:38:13.904921 INFO : Training has run successfully!
865 07:38:13.905196 Check phy result
866 07:38:13.913344 INFO : End of initialization
867 07:38:13.913666 INFO : End of read enable training
868 07:38:13.916166 INFO : End of fine write leveling
869 07:38:13.922217 INFO : End of Write leveling coarse delay
870 07:38:13.922520 INFO : Training has run successfully!
871 07:38:13.922739 Check phy result
872 07:38:13.927366 INFO : End of initialization
873 07:38:13.927679 INFO : End of read dq deskew training
874 07:38:13.932909 INFO : End of MPR read delay center optimization
875 07:38:13.938508 INFO : End of write delay center optimization
876 07:38:13.945245 INFO : End of read delay center optimization
877 07:38:13.945569 INFO : End of max read latency training
878 07:38:13.949689 INFO : Training has run successfully!
879 07:38:13.949982 1D training succeed
880 07:38:13.958877 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 07:38:14.007732 Check phy result
882 07:38:14.008158 INFO : End of initialization
883 07:38:14.029207 INFO : End of 2D read delay Voltage center optimization
884 07:38:14.049327 INFO : End of 2D read delay Voltage center optimization
885 07:38:14.101419 INFO : End of 2D write delay Voltage center optimization
886 07:38:14.154619 INFO : End of 2D write delay Voltage center optimization
887 07:38:14.156423 INFO : Training has run successfully!
888 07:38:14.156924
889 07:38:14.157375 channel==0
890 07:38:14.161895 RxClkDly_Margin_A0==88 ps 9
891 07:38:14.162210 TxDqDly_Margin_A0==98 ps 10
892 07:38:14.167584 RxClkDly_Margin_A1==88 ps 9
893 07:38:14.167905 TxDqDly_Margin_A1==98 ps 10
894 07:38:14.168170 TrainedVREFDQ_A0==74
895 07:38:14.173079 TrainedVREFDQ_A1==74
896 07:38:14.173363 VrefDac_Margin_A0==24
897 07:38:14.173573 DeviceVref_Margin_A0==40
898 07:38:14.182319 VrefDac_Margin_A1==25
899 07:38:14.182650 DeviceVref_Margin_A1==40
900 07:38:14.182864
901 07:38:14.183074
902 07:38:14.184263 channel==1
903 07:38:14.184551 RxClkDly_Margin_A0==98 ps 10
904 07:38:14.184761 TxDqDly_Margin_A0==98 ps 10
905 07:38:14.189866 RxClkDly_Margin_A1==88 ps 9
906 07:38:14.190158 TxDqDly_Margin_A1==88 ps 9
907 07:38:14.198588 TrainedVREFDQ_A0==77
908 07:38:14.198916 TrainedVREFDQ_A1==77
909 07:38:14.199130 VrefDac_Margin_A0==22
910 07:38:14.201066 DeviceVref_Margin_A0==37
911 07:38:14.201334 VrefDac_Margin_A1==24
912 07:38:14.207524 DeviceVref_Margin_A1==37
913 07:38:14.207837
914 07:38:14.208080 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 07:38:14.208291
916 07:38:14.243210 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 07:38:14.243598 2D training succeed
918 07:38:14.245856 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 07:38:14.251549 auto size-- 65535DDR cs0 size: 2048MB
920 07:38:14.251842 DDR cs1 size: 2048MB
921 07:38:14.258597 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 07:38:14.258924 cs0 DataBus test pass
923 07:38:14.262681 cs1 DataBus test pass
924 07:38:14.262973 cs0 AddrBus test pass
925 07:38:14.263185 cs1 AddrBus test pass
926 07:38:14.263388
927 07:38:14.270075 100bdlr_step_size ps== 420
928 07:38:14.270418 result report
929 07:38:14.274274 boot times 0Enable ddr reg access
930 07:38:14.279304 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 07:38:14.292727 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 07:38:14.868997 0.0;M3 CHK:0;cm4_sp_mode 0
933 07:38:14.869435 MVN_1=0x00000000
934 07:38:14.874692 MVN_2=0x00000000
935 07:38:14.877682 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 07:38:14.878085 OPS=0x10
937 07:38:14.878332 ring efuse init
938 07:38:14.878543 chipver efuse init
939 07:38:14.883413 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 07:38:14.893524 [0.018961 Inits done]
941 07:38:14.894017 secure task start!
942 07:38:14.894354 high task start!
943 07:38:14.894960 low task start!
944 07:38:14.895219 run into bl31
945 07:38:14.900215 NOTICE: BL31: v1.3(release):4fc40b1
946 07:38:14.908055 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 07:38:14.908647 NOTICE: BL31: G12A normal boot!
948 07:38:14.933350 NOTICE: BL31: BL33 decompress pass
949 07:38:14.939028 ERROR: Error initializing runtime service opteed_fast
950 07:38:16.172082
951 07:38:16.172769
952 07:38:16.180478 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 07:38:16.181055
954 07:38:16.181519 Model: Libre Computer AML-A311D-CC Alta
955 07:38:16.388880 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 07:38:16.412414 DRAM: 2 GiB (effective 3.8 GiB)
957 07:38:16.555303 Core: 408 devices, 31 uclasses, devicetree: separate
958 07:38:16.561109 WDT: Not starting watchdog@f0d0
959 07:38:16.593384 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 07:38:16.605886 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 07:38:16.610871 ** Bad device specification mmc 0 **
962 07:38:16.621131 Card did not respond to voltage select! : -110
963 07:38:16.628814 ** Bad device specification mmc 0 **
964 07:38:16.629443 Couldn't find partition mmc 0
965 07:38:16.637107 Card did not respond to voltage select! : -110
966 07:38:16.642607 ** Bad device specification mmc 0 **
967 07:38:16.643150 Couldn't find partition mmc 0
968 07:38:16.647687 Error: could not access storage.
969 07:38:16.991244 Net: eth0: ethernet@ff3f0000
970 07:38:16.991885 starting USB...
971 07:38:17.243111 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 07:38:17.243758 Starting the controller
973 07:38:17.250001 USB XHCI 1.10
974 07:38:19.109560 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
975 07:38:19.110299 bl2_stage_init 0x81
976 07:38:19.115213 hw id: 0x0000 - pwm id 0x01
977 07:38:19.115775 bl2_stage_init 0xc1
978 07:38:19.116308 bl2_stage_init 0x02
979 07:38:19.116768
980 07:38:19.120741 L0:00000000
981 07:38:19.121255 L1:20000703
982 07:38:19.121707 L2:00008067
983 07:38:19.122151 L3:14000000
984 07:38:19.122586 B2:00402000
985 07:38:19.126502 B1:e0f83180
986 07:38:19.127082
987 07:38:19.127540 TE: 58150
988 07:38:19.128022
989 07:38:19.132571 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
990 07:38:19.133154
991 07:38:19.133606 Board ID = 1
992 07:38:19.137577 Set A53 clk to 24M
993 07:38:19.138099 Set A73 clk to 24M
994 07:38:19.138545 Set clk81 to 24M
995 07:38:19.143578 A53 clk: 1200 MHz
996 07:38:19.144128 A73 clk: 1200 MHz
997 07:38:19.144577 CLK81: 166.6M
998 07:38:19.145045 smccc: 00012aac
999 07:38:19.148641 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1000 07:38:19.154348 board id: 1
1001 07:38:19.160120 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1002 07:38:19.170797 fw parse done
1003 07:38:19.176836 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1004 07:38:19.219421 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1005 07:38:19.230244 PIEI prepare done
1006 07:38:19.230807 fastboot data load
1007 07:38:19.231255 fastboot data verify
1008 07:38:19.235871 verify result: 266
1009 07:38:19.241486 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1010 07:38:19.242042 LPDDR4 probe
1011 07:38:19.242481 ddr clk to 1584MHz
1012 07:38:19.249532 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1013 07:38:19.286743
1014 07:38:19.287314 dmc_version 0001
1015 07:38:19.293501 Check phy result
1016 07:38:19.299268 INFO : End of CA training
1017 07:38:19.299774 INFO : End of initialization
1018 07:38:19.304849 INFO : Training has run successfully!
1019 07:38:19.305355 Check phy result
1020 07:38:19.310463 INFO : End of initialization
1021 07:38:19.310963 INFO : End of read enable training
1022 07:38:19.316109 INFO : End of fine write leveling
1023 07:38:19.321625 INFO : End of Write leveling coarse delay
1024 07:38:19.322117 INFO : Training has run successfully!
1025 07:38:19.322574 Check phy result
1026 07:38:19.327229 INFO : End of initialization
1027 07:38:19.327709 INFO : End of read dq deskew training
1028 07:38:19.332798 INFO : End of MPR read delay center optimization
1029 07:38:19.338350 INFO : End of write delay center optimization
1030 07:38:19.344026 INFO : End of read delay center optimization
1031 07:38:19.344523 INFO : End of max read latency training
1032 07:38:19.349609 INFO : Training has run successfully!
1033 07:38:19.350098 1D training succeed
1034 07:38:19.358839 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1035 07:38:19.406512 Check phy result
1036 07:38:19.407048 INFO : End of initialization
1037 07:38:19.428022 INFO : End of 2D read delay Voltage center optimization
1038 07:38:19.448175 INFO : End of 2D read delay Voltage center optimization
1039 07:38:19.500043 INFO : End of 2D write delay Voltage center optimization
1040 07:38:19.549339 INFO : End of 2D write delay Voltage center optimization
1041 07:38:19.554868 INFO : Training has run successfully!
1042 07:38:19.555360
1043 07:38:19.555825 channel==0
1044 07:38:19.560492 RxClkDly_Margin_A0==88 ps 9
1045 07:38:19.560979 TxDqDly_Margin_A0==98 ps 10
1046 07:38:19.566117 RxClkDly_Margin_A1==88 ps 9
1047 07:38:19.566603 TxDqDly_Margin_A1==98 ps 10
1048 07:38:19.567054 TrainedVREFDQ_A0==74
1049 07:38:19.571642 TrainedVREFDQ_A1==74
1050 07:38:19.572160 VrefDac_Margin_A0==25
1051 07:38:19.572612 DeviceVref_Margin_A0==40
1052 07:38:19.577318 VrefDac_Margin_A1==24
1053 07:38:19.577834 DeviceVref_Margin_A1==40
1054 07:38:19.578285
1055 07:38:19.578759
1056 07:38:19.582894 channel==1
1057 07:38:19.583388 RxClkDly_Margin_A0==98 ps 10
1058 07:38:19.583838 TxDqDly_Margin_A0==88 ps 9
1059 07:38:19.588453 RxClkDly_Margin_A1==88 ps 9
1060 07:38:19.588940 TxDqDly_Margin_A1==88 ps 9
1061 07:38:19.594113 TrainedVREFDQ_A0==76
1062 07:38:19.594599 TrainedVREFDQ_A1==77
1063 07:38:19.595047 VrefDac_Margin_A0==22
1064 07:38:19.599573 DeviceVref_Margin_A0==38
1065 07:38:19.600081 VrefDac_Margin_A1==24
1066 07:38:19.606187 DeviceVref_Margin_A1==37
1067 07:38:19.606751
1068 07:38:19.607219 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1069 07:38:19.607674
1070 07:38:19.638955 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
1071 07:38:19.639593 2D training succeed
1072 07:38:19.644500 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1073 07:38:19.649929 auto size-- 65535DDR cs0 size: 2048MB
1074 07:38:19.650437 DDR cs1 size: 2048MB
1075 07:38:19.655560 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1076 07:38:19.656112 cs0 DataBus test pass
1077 07:38:19.661262 cs1 DataBus test pass
1078 07:38:19.661772 cs0 AddrBus test pass
1079 07:38:19.662224 cs1 AddrBus test pass
1080 07:38:19.662667
1081 07:38:19.666746 100bdlr_step_size ps== 420
1082 07:38:19.667260 result report
1083 07:38:19.672363 boot times 0Enable ddr reg access
1084 07:38:19.677618 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1085 07:38:19.691058 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1086 07:38:20.263109 0.0;M3 CHK:0;cm4_sp_mode 0
1087 07:38:20.263797 MVN_1=0x00000000
1088 07:38:20.271910 MVN_2=0x00000000
1089 07:38:20.274308 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1090 07:38:20.274821 OPS=0x10
1091 07:38:20.275297 ring efuse init
1092 07:38:20.275746 chipver efuse init
1093 07:38:20.279828 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1094 07:38:20.285466 [0.018961 Inits done]
1095 07:38:20.285966 secure task start!
1096 07:38:20.286422 high task start!
1097 07:38:20.290041 low task start!
1098 07:38:20.290523 run into bl31
1099 07:38:20.296703 NOTICE: BL31: v1.3(release):4fc40b1
1100 07:38:20.304586 NOTICE: BL31: Built : 15:58:17, May 22 2019
1101 07:38:20.305135 NOTICE: BL31: G12A normal boot!
1102 07:38:20.330617 NOTICE: BL31: BL33 decompress pass
1103 07:38:20.336232 ERROR: Error initializing runtime service opteed_fast
1104 07:38:21.573547
1105 07:38:21.574267
1106 07:38:21.577716 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1107 07:38:21.578384
1108 07:38:21.578861 Model: Libre Computer AML-A311D-CC Alta
1109 07:38:21.786069 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1110 07:38:21.809935 DRAM: 2 GiB (effective 3.8 GiB)
1111 07:38:21.952533 Core: 408 devices, 31 uclasses, devicetree: separate
1112 07:38:21.958437 WDT: Not starting watchdog@f0d0
1113 07:38:21.990562 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1114 07:38:22.003008 Loading Environment from FAT... Card did not respond to voltage select! : -110
1115 07:38:22.007890 ** Bad device specification mmc 0 **
1116 07:38:22.018322 Card did not respond to voltage select! : -110
1117 07:38:22.025874 ** Bad device specification mmc 0 **
1118 07:38:22.026511 Couldn't find partition mmc 0
1119 07:38:22.034318 Card did not respond to voltage select! : -110
1120 07:38:22.039841 ** Bad device specification mmc 0 **
1121 07:38:22.040561 Couldn't find partition mmc 0
1122 07:38:22.044851 Error: could not access storage.
1123 07:38:22.388460 Net: eth0: ethernet@ff3f0000
1124 07:38:22.388901 starting USB...
1125 07:38:22.640212 Bus usb@ff500000: Register 3000140 NbrPorts 3
1126 07:38:22.640940 Starting the controller
1127 07:38:22.647177 USB XHCI 1.10
1128 07:38:24.201250 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1129 07:38:24.209452 scanning usb for storage devices... 0 Storage Device(s) found
1131 07:38:24.261276 Hit any key to stop autoboot: 1
1132 07:38:24.262184 end: 2.4.2 bootloader-interrupt (duration 00:00:38) [common]
1133 07:38:24.262809 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1134 07:38:24.263314 Setting prompt string to ['=>']
1135 07:38:24.263825 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1136 07:38:24.277025 0
1137 07:38:24.277962 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1138 07:38:24.278481 Sending with 10 millisecond of delay
1140 07:38:25.413571 => setenv autoload no
1141 07:38:25.424429 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1142 07:38:25.429884 setenv autoload no
1143 07:38:25.430676 Sending with 10 millisecond of delay
1145 07:38:27.227954 => setenv initrd_high 0xffffffff
1146 07:38:27.238860 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1147 07:38:27.239725 setenv initrd_high 0xffffffff
1148 07:38:27.240528 Sending with 10 millisecond of delay
1150 07:38:28.857433 => setenv fdt_high 0xffffffff
1151 07:38:28.868311 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1152 07:38:28.869251 setenv fdt_high 0xffffffff
1153 07:38:28.870069 Sending with 10 millisecond of delay
1155 07:38:29.162180 => dhcp
1156 07:38:29.173028 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1157 07:38:29.173909 dhcp
1158 07:38:29.174394 Speed: 1000, full duplex
1159 07:38:29.174850 BOOTP broadcast 1
1160 07:38:29.181934 DHCP client bound to address 192.168.6.27 (9 ms)
1161 07:38:29.182698 Sending with 10 millisecond of delay
1163 07:38:30.859960 => setenv serverip 192.168.6.2
1164 07:38:30.870868 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1165 07:38:30.871862 setenv serverip 192.168.6.2
1166 07:38:30.872647 Sending with 10 millisecond of delay
1168 07:38:34.600063 => tftpboot 0x01080000 933147/tftp-deploy-b39qr8f6/kernel/uImage
1169 07:38:34.610921 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1170 07:38:34.611847 tftpboot 0x01080000 933147/tftp-deploy-b39qr8f6/kernel/uImage
1171 07:38:34.612394 Speed: 1000, full duplex
1172 07:38:34.612851 Using ethernet@ff3f0000 device
1173 07:38:34.613847 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1174 07:38:34.619361 Filename '933147/tftp-deploy-b39qr8f6/kernel/uImage'.
1175 07:38:34.623261 Load address: 0x1080000
1176 07:38:37.532108 Loading: *################################################## 43.9 MiB
1177 07:38:37.532546 15.1 MiB/s
1178 07:38:37.532774 done
1179 07:38:37.532989 Bytes transferred = 46041664 (2be8a40 hex)
1180 07:38:37.533464 Sending with 10 millisecond of delay
1182 07:38:42.223693 => tftpboot 0x08000000 933147/tftp-deploy-b39qr8f6/ramdisk/ramdisk.cpio.gz.uboot
1183 07:38:42.234512 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:04)
1184 07:38:42.235300 tftpboot 0x08000000 933147/tftp-deploy-b39qr8f6/ramdisk/ramdisk.cpio.gz.uboot
1185 07:38:42.235742 Speed: 1000, full duplex
1186 07:38:42.236204 Using ethernet@ff3f0000 device
1187 07:38:42.237330 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1188 07:38:42.249125 Filename '933147/tftp-deploy-b39qr8f6/ramdisk/ramdisk.cpio.gz.uboot'.
1189 07:38:42.249552 Load address: 0x8000000
1190 07:38:49.043035 Loading: *#################T ################################ UDP wrong checksum 00000005 0000f0bf
1191 07:38:49.206568 UDP wrong checksum 000000ff 00009a51
1192 07:38:49.283247 UDP wrong checksum 000000ff 00003644
1193 07:38:54.045236 T UDP wrong checksum 00000005 0000f0bf
1194 07:39:04.047086 T T UDP wrong checksum 00000005 0000f0bf
1195 07:39:24.051168 T T T T UDP wrong checksum 00000005 0000f0bf
1196 07:39:35.144990 T T UDP wrong checksum 000000ff 00009175
1197 07:39:35.186011 UDP wrong checksum 000000ff 00002468
1198 07:39:39.055449
1199 07:39:39.056125 Retry count exceeded; starting again
1201 07:39:39.057558 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1204 07:39:39.059437 end: 2.4 uboot-commands (duration 00:01:53) [common]
1206 07:39:39.061176 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1208 07:39:39.062230 end: 2 uboot-action (duration 00:01:53) [common]
1210 07:39:39.063774 Cleaning after the job
1211 07:39:39.064381 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/ramdisk
1212 07:39:39.065976 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/kernel
1213 07:39:39.091569 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/dtb
1214 07:39:39.092933 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/nfsrootfs
1215 07:39:39.173596 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/933147/tftp-deploy-b39qr8f6/modules
1216 07:39:39.193031 start: 4.1 power-off (timeout 00:00:30) [common]
1217 07:39:39.193688 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1218 07:39:39.226411 >> OK - accepted request
1219 07:39:39.228549 Returned 0 in 0 seconds
1220 07:39:39.329370 end: 4.1 power-off (duration 00:00:00) [common]
1222 07:39:39.330392 start: 4.2 read-feedback (timeout 00:10:00) [common]
1223 07:39:39.331064 Listened to connection for namespace 'common' for up to 1s
1224 07:39:40.332029 Finalising connection for namespace 'common'
1225 07:39:40.332528 Disconnecting from shell: Finalise
1226 07:39:40.332840 =>
1227 07:39:40.433617 end: 4.2 read-feedback (duration 00:00:01) [common]
1228 07:39:40.434270 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/933147
1229 07:39:43.417454 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/933147
1230 07:39:43.418081 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.