Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:22:02.153189 lava-dispatcher, installed at version: 2024.01
2 08:22:02.153969 start: 0 validate
3 08:22:02.154434 Start time: 2024-11-05 08:22:02.154405+00:00 (UTC)
4 08:22:02.154974 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:22:02.155500 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 08:22:02.193591 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:22:02.194317 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241105%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 08:22:02.225727 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:22:02.226475 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241105%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 08:22:03.278541 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:22:03.279025 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241105%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
12 08:22:03.316814 validate duration: 1.16
14 08:22:03.317701 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:22:03.318036 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:22:03.318351 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:22:03.318971 Not decompressing ramdisk as can be used compressed.
18 08:22:03.319422 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 08:22:03.319700 saving as /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/ramdisk/rootfs.cpio.gz
20 08:22:03.320000 total size: 8181887 (7 MB)
21 08:22:03.362613 progress 0 % (0 MB)
22 08:22:03.368912 progress 5 % (0 MB)
23 08:22:03.374514 progress 10 % (0 MB)
24 08:22:03.380643 progress 15 % (1 MB)
25 08:22:03.386156 progress 20 % (1 MB)
26 08:22:03.392158 progress 25 % (1 MB)
27 08:22:03.397653 progress 30 % (2 MB)
28 08:22:03.403701 progress 35 % (2 MB)
29 08:22:03.409213 progress 40 % (3 MB)
30 08:22:03.415134 progress 45 % (3 MB)
31 08:22:03.420570 progress 50 % (3 MB)
32 08:22:03.426275 progress 55 % (4 MB)
33 08:22:03.431646 progress 60 % (4 MB)
34 08:22:03.437258 progress 65 % (5 MB)
35 08:22:03.442445 progress 70 % (5 MB)
36 08:22:03.448063 progress 75 % (5 MB)
37 08:22:03.453270 progress 80 % (6 MB)
38 08:22:03.458885 progress 85 % (6 MB)
39 08:22:03.464085 progress 90 % (7 MB)
40 08:22:03.469576 progress 95 % (7 MB)
41 08:22:03.474309 progress 100 % (7 MB)
42 08:22:03.474944 7 MB downloaded in 0.15 s (50.36 MB/s)
43 08:22:03.475485 end: 1.1.1 http-download (duration 00:00:00) [common]
45 08:22:03.476396 end: 1.1 download-retry (duration 00:00:00) [common]
46 08:22:03.476690 start: 1.2 download-retry (timeout 00:10:00) [common]
47 08:22:03.476959 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 08:22:03.477429 downloading http://storage.kernelci.org/next/master/next-20241105/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/gcc-12/kernel/Image
49 08:22:03.477672 saving as /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/kernel/Image
50 08:22:03.477878 total size: 47784448 (45 MB)
51 08:22:03.478087 No compression specified
52 08:22:03.517990 progress 0 % (0 MB)
53 08:22:03.548668 progress 5 % (2 MB)
54 08:22:03.579333 progress 10 % (4 MB)
55 08:22:03.609391 progress 15 % (6 MB)
56 08:22:03.639848 progress 20 % (9 MB)
57 08:22:03.669844 progress 25 % (11 MB)
58 08:22:03.699756 progress 30 % (13 MB)
59 08:22:03.730195 progress 35 % (15 MB)
60 08:22:03.760399 progress 40 % (18 MB)
61 08:22:03.790605 progress 45 % (20 MB)
62 08:22:03.820549 progress 50 % (22 MB)
63 08:22:03.850743 progress 55 % (25 MB)
64 08:22:03.880078 progress 60 % (27 MB)
65 08:22:03.909495 progress 65 % (29 MB)
66 08:22:03.941637 progress 70 % (31 MB)
67 08:22:03.971773 progress 75 % (34 MB)
68 08:22:04.002040 progress 80 % (36 MB)
69 08:22:04.032069 progress 85 % (38 MB)
70 08:22:04.062048 progress 90 % (41 MB)
71 08:22:04.091928 progress 95 % (43 MB)
72 08:22:04.121034 progress 100 % (45 MB)
73 08:22:04.121617 45 MB downloaded in 0.64 s (70.79 MB/s)
74 08:22:04.122099 end: 1.2.1 http-download (duration 00:00:01) [common]
76 08:22:04.122905 end: 1.2 download-retry (duration 00:00:01) [common]
77 08:22:04.123177 start: 1.3 download-retry (timeout 00:09:59) [common]
78 08:22:04.123437 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 08:22:04.123907 downloading http://storage.kernelci.org/next/master/next-20241105/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 08:22:04.124201 saving as /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 08:22:04.124408 total size: 53209 (0 MB)
82 08:22:04.124614 No compression specified
83 08:22:04.159531 progress 61 % (0 MB)
84 08:22:04.160392 progress 100 % (0 MB)
85 08:22:04.160935 0 MB downloaded in 0.04 s (1.39 MB/s)
86 08:22:04.161396 end: 1.3.1 http-download (duration 00:00:00) [common]
88 08:22:04.162201 end: 1.3 download-retry (duration 00:00:00) [common]
89 08:22:04.162458 start: 1.4 download-retry (timeout 00:09:59) [common]
90 08:22:04.162715 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 08:22:04.163173 downloading http://storage.kernelci.org/next/master/next-20241105/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/gcc-12/modules.tar.xz
92 08:22:04.163413 saving as /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/modules/modules.tar
93 08:22:04.163615 total size: 11680216 (11 MB)
94 08:22:04.163824 Using unxz to decompress xz
95 08:22:04.203889 progress 0 % (0 MB)
96 08:22:04.269683 progress 5 % (0 MB)
97 08:22:04.343875 progress 10 % (1 MB)
98 08:22:04.439065 progress 15 % (1 MB)
99 08:22:04.535081 progress 20 % (2 MB)
100 08:22:04.614822 progress 25 % (2 MB)
101 08:22:04.686363 progress 30 % (3 MB)
102 08:22:04.764529 progress 35 % (3 MB)
103 08:22:04.841647 progress 40 % (4 MB)
104 08:22:04.918085 progress 45 % (5 MB)
105 08:22:05.002432 progress 50 % (5 MB)
106 08:22:05.085549 progress 55 % (6 MB)
107 08:22:05.167303 progress 60 % (6 MB)
108 08:22:05.248085 progress 65 % (7 MB)
109 08:22:05.329443 progress 70 % (7 MB)
110 08:22:05.411696 progress 75 % (8 MB)
111 08:22:05.495195 progress 80 % (8 MB)
112 08:22:05.571106 progress 85 % (9 MB)
113 08:22:05.653687 progress 90 % (10 MB)
114 08:22:05.731325 progress 95 % (10 MB)
115 08:22:05.808580 progress 100 % (11 MB)
116 08:22:05.820532 11 MB downloaded in 1.66 s (6.72 MB/s)
117 08:22:05.821098 end: 1.4.1 http-download (duration 00:00:02) [common]
119 08:22:05.821908 end: 1.4 download-retry (duration 00:00:02) [common]
120 08:22:05.822174 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 08:22:05.822438 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 08:22:05.822681 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 08:22:05.822930 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 08:22:05.823519 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok
125 08:22:05.823977 makedir: /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin
126 08:22:05.824711 makedir: /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/tests
127 08:22:05.825387 makedir: /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/results
128 08:22:05.826048 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-add-keys
129 08:22:05.827078 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-add-sources
130 08:22:05.828102 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-background-process-start
131 08:22:05.829193 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-background-process-stop
132 08:22:05.830313 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-common-functions
133 08:22:05.831299 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-echo-ipv4
134 08:22:05.832308 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-install-packages
135 08:22:05.833283 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-installed-packages
136 08:22:05.834230 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-os-build
137 08:22:05.835231 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-probe-channel
138 08:22:05.836292 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-probe-ip
139 08:22:05.837287 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-target-ip
140 08:22:05.838269 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-target-mac
141 08:22:05.839223 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-target-storage
142 08:22:05.840337 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-test-case
143 08:22:05.841325 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-test-event
144 08:22:05.842271 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-test-feedback
145 08:22:05.843223 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-test-raise
146 08:22:05.844226 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-test-reference
147 08:22:05.845231 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-test-runner
148 08:22:05.846212 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-test-set
149 08:22:05.847159 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-test-shell
150 08:22:05.848155 Updating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-install-packages (oe)
151 08:22:05.849201 Updating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/bin/lava-installed-packages (oe)
152 08:22:05.850076 Creating /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/environment
153 08:22:05.850855 LAVA metadata
154 08:22:05.851411 - LAVA_JOB_ID=938906
155 08:22:05.851886 - LAVA_DISPATCHER_IP=192.168.6.2
156 08:22:05.852609 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 08:22:05.854386 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 08:22:05.854960 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 08:22:05.855367 skipped lava-vland-overlay
160 08:22:05.855846 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 08:22:05.856390 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 08:22:05.856813 skipped lava-multinode-overlay
163 08:22:05.857288 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 08:22:05.857779 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 08:22:05.858246 Loading test definitions
166 08:22:05.858780 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 08:22:05.859212 Using /lava-938906 at stage 0
168 08:22:05.860792 uuid=938906_1.5.2.4.1 testdef=None
169 08:22:05.861099 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 08:22:05.861366 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 08:22:05.863135 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 08:22:05.863921 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 08:22:05.866172 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 08:22:05.867013 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 08:22:05.869207 runner path: /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/0/tests/0_dmesg test_uuid 938906_1.5.2.4.1
178 08:22:05.869769 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 08:22:05.870533 Creating lava-test-runner.conf files
181 08:22:05.870736 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/938906/lava-overlay-c4gip8ok/lava-938906/0 for stage 0
182 08:22:05.871071 - 0_dmesg
183 08:22:05.871411 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 08:22:05.871684 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 08:22:05.895427 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 08:22:05.895826 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 08:22:05.896109 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 08:22:05.896377 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 08:22:05.896638 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 08:22:06.829288 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 08:22:06.830030 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 08:22:06.830520 extracting modules file /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/938906/extract-overlay-ramdisk-ad9g7fhz/ramdisk
193 08:22:08.196742 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 08:22:08.197225 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 08:22:08.197499 [common] Applying overlay /var/lib/lava/dispatcher/tmp/938906/compress-overlay-36s2pcbu/overlay-1.5.2.5.tar.gz to ramdisk
196 08:22:08.197711 [common] Applying overlay /var/lib/lava/dispatcher/tmp/938906/compress-overlay-36s2pcbu/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/938906/extract-overlay-ramdisk-ad9g7fhz/ramdisk
197 08:22:08.227691 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 08:22:08.228135 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 08:22:08.228406 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 08:22:08.228633 Converting downloaded kernel to a uImage
201 08:22:08.228935 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/kernel/Image /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/kernel/uImage
202 08:22:08.692751 output: Image Name:
203 08:22:08.693179 output: Created: Tue Nov 5 08:22:08 2024
204 08:22:08.693391 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 08:22:08.693596 output: Data Size: 47784448 Bytes = 46664.50 KiB = 45.57 MiB
206 08:22:08.693798 output: Load Address: 01080000
207 08:22:08.693998 output: Entry Point: 01080000
208 08:22:08.694194 output:
209 08:22:08.694526 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 08:22:08.694787 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 08:22:08.695053 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 08:22:08.695302 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 08:22:08.695554 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 08:22:08.695803 Building ramdisk /var/lib/lava/dispatcher/tmp/938906/extract-overlay-ramdisk-ad9g7fhz/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/938906/extract-overlay-ramdisk-ad9g7fhz/ramdisk
215 08:22:11.148083 >> 182856 blocks
216 08:22:20.122099 Adding RAMdisk u-boot header.
217 08:22:20.122535 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/938906/extract-overlay-ramdisk-ad9g7fhz/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/938906/extract-overlay-ramdisk-ad9g7fhz/ramdisk.cpio.gz.uboot
218 08:22:20.389001 output: Image Name:
219 08:22:20.389412 output: Created: Tue Nov 5 08:22:20 2024
220 08:22:20.389620 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 08:22:20.389822 output: Data Size: 26157785 Bytes = 25544.71 KiB = 24.95 MiB
222 08:22:20.390021 output: Load Address: 00000000
223 08:22:20.390216 output: Entry Point: 00000000
224 08:22:20.390410 output:
225 08:22:20.391004 rename /var/lib/lava/dispatcher/tmp/938906/extract-overlay-ramdisk-ad9g7fhz/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/ramdisk/ramdisk.cpio.gz.uboot
226 08:22:20.391414 end: 1.5.8 compress-ramdisk (duration 00:00:12) [common]
227 08:22:20.391693 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
228 08:22:20.391959 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 08:22:20.392515 No LXC device requested
230 08:22:20.393079 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 08:22:20.393630 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 08:22:20.394165 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 08:22:20.394608 Checking files for TFTP limit of 4294967296 bytes.
234 08:22:20.397531 end: 1 tftp-deploy (duration 00:00:17) [common]
235 08:22:20.398163 start: 2 uboot-action (timeout 00:05:00) [common]
236 08:22:20.398728 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 08:22:20.399267 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 08:22:20.399808 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 08:22:20.400423 Using kernel file from prepare-kernel: 938906/tftp-deploy-ipavn7e9/kernel/uImage
240 08:22:20.401105 substitutions:
241 08:22:20.401548 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 08:22:20.401986 - {DTB_ADDR}: 0x01070000
243 08:22:20.402416 - {DTB}: 938906/tftp-deploy-ipavn7e9/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 08:22:20.402852 - {INITRD}: 938906/tftp-deploy-ipavn7e9/ramdisk/ramdisk.cpio.gz.uboot
245 08:22:20.403286 - {KERNEL_ADDR}: 0x01080000
246 08:22:20.403714 - {KERNEL}: 938906/tftp-deploy-ipavn7e9/kernel/uImage
247 08:22:20.404183 - {LAVA_MAC}: None
248 08:22:20.404655 - {PRESEED_CONFIG}: None
249 08:22:20.405083 - {PRESEED_LOCAL}: None
250 08:22:20.405507 - {RAMDISK_ADDR}: 0x08000000
251 08:22:20.405930 - {RAMDISK}: 938906/tftp-deploy-ipavn7e9/ramdisk/ramdisk.cpio.gz.uboot
252 08:22:20.406359 - {ROOT_PART}: None
253 08:22:20.406781 - {ROOT}: None
254 08:22:20.407205 - {SERVER_IP}: 192.168.6.2
255 08:22:20.407631 - {TEE_ADDR}: 0x83000000
256 08:22:20.408086 - {TEE}: None
257 08:22:20.408516 Parsed boot commands:
258 08:22:20.408927 - setenv autoload no
259 08:22:20.409347 - setenv initrd_high 0xffffffff
260 08:22:20.409770 - setenv fdt_high 0xffffffff
261 08:22:20.410189 - dhcp
262 08:22:20.410607 - setenv serverip 192.168.6.2
263 08:22:20.411024 - tftpboot 0x01080000 938906/tftp-deploy-ipavn7e9/kernel/uImage
264 08:22:20.411447 - tftpboot 0x08000000 938906/tftp-deploy-ipavn7e9/ramdisk/ramdisk.cpio.gz.uboot
265 08:22:20.411867 - tftpboot 0x01070000 938906/tftp-deploy-ipavn7e9/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 08:22:20.412362 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 08:22:20.412796 - bootm 0x01080000 0x08000000 0x01070000
268 08:22:20.413344 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 08:22:20.414952 start: 2.3 connect-device (timeout 00:05:00) [common]
271 08:22:20.415428 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 08:22:20.430981 Setting prompt string to ['lava-test: # ']
273 08:22:20.432615 end: 2.3 connect-device (duration 00:00:00) [common]
274 08:22:20.433272 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 08:22:20.433865 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 08:22:20.434423 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 08:22:20.435834 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 08:22:20.473067 >> OK - accepted request
279 08:22:20.474951 Returned 0 in 0 seconds
280 08:22:20.576191 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 08:22:20.578002 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 08:22:20.578619 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 08:22:20.579165 Setting prompt string to ['Hit any key to stop autoboot']
285 08:22:20.579653 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 08:22:20.581429 Trying 192.168.56.21...
287 08:22:20.581953 Connected to conserv1.
288 08:22:20.582412 Escape character is '^]'.
289 08:22:20.582880
290 08:22:20.583344 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 08:22:20.583815
292 08:22:27.787548 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 08:22:27.788296 bl2_stage_init 0x01
294 08:22:27.788785 bl2_stage_init 0x81
295 08:22:27.793126 hw id: 0x0000 - pwm id 0x01
296 08:22:27.793695 bl2_stage_init 0xc1
297 08:22:27.798661 bl2_stage_init 0x02
298 08:22:27.799169
299 08:22:27.799628 L0:00000000
300 08:22:27.800103 L1:00000703
301 08:22:27.800553 L2:00008067
302 08:22:27.800985 L3:15000000
303 08:22:27.804186 S1:00000000
304 08:22:27.804660 B2:20282000
305 08:22:27.805108 B1:a0f83180
306 08:22:27.805540
307 08:22:27.805975 TE: 68584
308 08:22:27.806407
309 08:22:27.809892 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 08:22:27.810375
311 08:22:27.815391 Board ID = 1
312 08:22:27.815866 Set cpu clk to 24M
313 08:22:27.816336 Set clk81 to 24M
314 08:22:27.821046 Use GP1_pll as DSU clk.
315 08:22:27.821517 DSU clk: 1200 Mhz
316 08:22:27.821987 CPU clk: 1200 MHz
317 08:22:27.826597 Set clk81 to 166.6M
318 08:22:27.832258 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 08:22:27.832545 board id: 1
320 08:22:27.839320 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 08:22:27.850265 fw parse done
322 08:22:27.856266 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 08:22:27.899359 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 08:22:27.910540 PIEI prepare done
325 08:22:27.911032 fastboot data load
326 08:22:27.911479 fastboot data verify
327 08:22:27.916081 verify result: 266
328 08:22:27.921632 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 08:22:27.922123 LPDDR4 probe
330 08:22:27.922563 ddr clk to 1584MHz
331 08:22:27.929635 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 08:22:27.967484
333 08:22:27.968126 dmc_version 0001
334 08:22:27.974532 Check phy result
335 08:22:27.980452 INFO : End of CA training
336 08:22:27.980940 INFO : End of initialization
337 08:22:27.986003 INFO : Training has run successfully!
338 08:22:27.986500 Check phy result
339 08:22:27.991609 INFO : End of initialization
340 08:22:27.992114 INFO : End of read enable training
341 08:22:27.994932 INFO : End of fine write leveling
342 08:22:28.000505 INFO : End of Write leveling coarse delay
343 08:22:28.006091 INFO : Training has run successfully!
344 08:22:28.006610 Check phy result
345 08:22:28.007070 INFO : End of initialization
346 08:22:28.011602 INFO : End of read dq deskew training
347 08:22:28.017519 INFO : End of MPR read delay center optimization
348 08:22:28.018076 INFO : End of write delay center optimization
349 08:22:28.022871 INFO : End of read delay center optimization
350 08:22:28.028461 INFO : End of max read latency training
351 08:22:28.028946 INFO : Training has run successfully!
352 08:22:28.034108 1D training succeed
353 08:22:28.040137 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 08:22:28.088401 Check phy result
355 08:22:28.089012 INFO : End of initialization
356 08:22:28.115778 INFO : End of 2D read delay Voltage center optimization
357 08:22:28.139857 INFO : End of 2D read delay Voltage center optimization
358 08:22:28.196647 INFO : End of 2D write delay Voltage center optimization
359 08:22:28.250692 INFO : End of 2D write delay Voltage center optimization
360 08:22:28.256165 INFO : Training has run successfully!
361 08:22:28.256708
362 08:22:28.257155 channel==0
363 08:22:28.261711 RxClkDly_Margin_A0==88 ps 9
364 08:22:28.262183 TxDqDly_Margin_A0==98 ps 10
365 08:22:28.267415 RxClkDly_Margin_A1==88 ps 9
366 08:22:28.267887 TxDqDly_Margin_A1==98 ps 10
367 08:22:28.268378 TrainedVREFDQ_A0==76
368 08:22:28.272952 TrainedVREFDQ_A1==74
369 08:22:28.273435 VrefDac_Margin_A0==23
370 08:22:28.273875 DeviceVref_Margin_A0==38
371 08:22:28.278776 VrefDac_Margin_A1==23
372 08:22:28.279142 DeviceVref_Margin_A1==40
373 08:22:28.279395
374 08:22:28.279623
375 08:22:28.284312 channel==1
376 08:22:28.284923 RxClkDly_Margin_A0==78 ps 8
377 08:22:28.285359 TxDqDly_Margin_A0==88 ps 9
378 08:22:28.289812 RxClkDly_Margin_A1==78 ps 8
379 08:22:28.290369 TxDqDly_Margin_A1==88 ps 9
380 08:22:28.295484 TrainedVREFDQ_A0==76
381 08:22:28.296059 TrainedVREFDQ_A1==78
382 08:22:28.296504 VrefDac_Margin_A0==22
383 08:22:28.300922 DeviceVref_Margin_A0==38
384 08:22:28.301455 VrefDac_Margin_A1==22
385 08:22:28.306492 DeviceVref_Margin_A1==36
386 08:22:28.307014
387 08:22:28.307455 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 08:22:28.307875
389 08:22:28.340061 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 08:22:28.340746 2D training succeed
391 08:22:28.345731 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 08:22:28.351297 auto size-- 65535DDR cs0 size: 2048MB
393 08:22:28.351831 DDR cs1 size: 2048MB
394 08:22:28.356939 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 08:22:28.357458 cs0 DataBus test pass
396 08:22:28.362492 cs1 DataBus test pass
397 08:22:28.362985 cs0 AddrBus test pass
398 08:22:28.363388 cs1 AddrBus test pass
399 08:22:28.363778
400 08:22:28.368099 100bdlr_step_size ps== 471
401 08:22:28.368609 result report
402 08:22:28.373734 boot times 0Enable ddr reg access
403 08:22:28.379028 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 08:22:28.392712 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 08:22:29.052080 bl2z: ptr: 05129330, size: 00001e40
406 08:22:29.058613 0.0;M3 CHK:0;cm4_sp_mode 0
407 08:22:29.059137 MVN_1=0x00000000
408 08:22:29.059400 MVN_2=0x00000000
409 08:22:29.070035 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 08:22:29.070357 OPS=0x04
411 08:22:29.070565 ring efuse init
412 08:22:29.075644 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 08:22:29.075905 [0.017354 Inits done]
414 08:22:29.076129 secure task start!
415 08:22:29.083201 high task start!
416 08:22:29.083450 low task start!
417 08:22:29.083654 run into bl31
418 08:22:29.091832 NOTICE: BL31: v1.3(release):4fc40b1
419 08:22:29.099694 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 08:22:29.100170 NOTICE: BL31: G12A normal boot!
421 08:22:29.115311 NOTICE: BL31: BL33 decompress pass
422 08:22:29.121022 ERROR: Error initializing runtime service opteed_fast
423 08:22:31.837759 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 08:22:31.838193 bl2_stage_init 0x01
425 08:22:31.838407 bl2_stage_init 0x81
426 08:22:31.843693 hw id: 0x0000 - pwm id 0x01
427 08:22:31.843969 bl2_stage_init 0xc1
428 08:22:31.848888 bl2_stage_init 0x02
429 08:22:31.849141
430 08:22:31.849347 L0:00000000
431 08:22:31.849546 L1:00000703
432 08:22:31.849743 L2:00008067
433 08:22:31.849936 L3:15000000
434 08:22:31.854471 S1:00000000
435 08:22:31.854717 B2:20282000
436 08:22:31.854916 B1:a0f83180
437 08:22:31.855113
438 08:22:31.855309 TE: 68345
439 08:22:31.855507
440 08:22:31.860236 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 08:22:31.860481
442 08:22:31.865679 Board ID = 1
443 08:22:31.865929 Set cpu clk to 24M
444 08:22:31.866131 Set clk81 to 24M
445 08:22:31.871297 Use GP1_pll as DSU clk.
446 08:22:31.871561 DSU clk: 1200 Mhz
447 08:22:31.871760 CPU clk: 1200 MHz
448 08:22:31.876871 Set clk81 to 166.6M
449 08:22:31.882480 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 08:22:31.882728 board id: 1
451 08:22:31.889688 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 08:22:31.900397 fw parse done
453 08:22:31.906328 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 08:22:31.949317 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 08:22:31.959860 PIEI prepare done
456 08:22:31.960176 fastboot data load
457 08:22:31.960397 fastboot data verify
458 08:22:31.965527 verify result: 266
459 08:22:31.971086 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 08:22:31.971363 LPDDR4 probe
461 08:22:31.971576 ddr clk to 1584MHz
462 08:22:31.978486 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 08:22:32.016499
464 08:22:32.016850 dmc_version 0001
465 08:22:32.022111 Check phy result
466 08:22:32.028980 INFO : End of CA training
467 08:22:32.029275 INFO : End of initialization
468 08:22:32.034566 INFO : Training has run successfully!
469 08:22:32.034846 Check phy result
470 08:22:32.040154 INFO : End of initialization
471 08:22:32.040417 INFO : End of read enable training
472 08:22:32.045741 INFO : End of fine write leveling
473 08:22:32.051349 INFO : End of Write leveling coarse delay
474 08:22:32.051610 INFO : Training has run successfully!
475 08:22:32.051812 Check phy result
476 08:22:32.056918 INFO : End of initialization
477 08:22:32.057174 INFO : End of read dq deskew training
478 08:22:32.062553 INFO : End of MPR read delay center optimization
479 08:22:32.068141 INFO : End of write delay center optimization
480 08:22:32.073710 INFO : End of read delay center optimization
481 08:22:32.073973 INFO : End of max read latency training
482 08:22:32.079378 INFO : Training has run successfully!
483 08:22:32.079648 1D training succeed
484 08:22:32.088520 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 08:22:32.136177 Check phy result
486 08:22:32.136497 INFO : End of initialization
487 08:22:32.158494 INFO : End of 2D read delay Voltage center optimization
488 08:22:32.177614 INFO : End of 2D read delay Voltage center optimization
489 08:22:32.229548 INFO : End of 2D write delay Voltage center optimization
490 08:22:32.278682 INFO : End of 2D write delay Voltage center optimization
491 08:22:32.284347 INFO : Training has run successfully!
492 08:22:32.284606
493 08:22:32.284811 channel==0
494 08:22:32.289799 RxClkDly_Margin_A0==88 ps 9
495 08:22:32.290083 TxDqDly_Margin_A0==98 ps 10
496 08:22:32.293069 RxClkDly_Margin_A1==69 ps 7
497 08:22:32.293328 TxDqDly_Margin_A1==98 ps 10
498 08:22:32.298620 TrainedVREFDQ_A0==74
499 08:22:32.298990 TrainedVREFDQ_A1==74
500 08:22:32.304309 VrefDac_Margin_A0==25
501 08:22:32.304683 DeviceVref_Margin_A0==40
502 08:22:32.304910 VrefDac_Margin_A1==23
503 08:22:32.309814 DeviceVref_Margin_A1==40
504 08:22:32.310087
505 08:22:32.310296
506 08:22:32.310498 channel==1
507 08:22:32.310710 RxClkDly_Margin_A0==78 ps 8
508 08:22:32.315421 TxDqDly_Margin_A0==98 ps 10
509 08:22:32.315799 RxClkDly_Margin_A1==78 ps 8
510 08:22:32.321064 TxDqDly_Margin_A1==88 ps 9
511 08:22:32.321451 TrainedVREFDQ_A0==78
512 08:22:32.321682 TrainedVREFDQ_A1==77
513 08:22:32.326636 VrefDac_Margin_A0==22
514 08:22:32.326910 DeviceVref_Margin_A0==36
515 08:22:32.332318 VrefDac_Margin_A1==22
516 08:22:32.332705 DeviceVref_Margin_A1==37
517 08:22:32.333013
518 08:22:32.337821 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 08:22:32.338091
520 08:22:32.365870 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
521 08:22:32.371398 2D training succeed
522 08:22:32.377085 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 08:22:32.377366 auto size-- 65535DDR cs0 size: 2048MB
524 08:22:32.382615 DDR cs1 size: 2048MB
525 08:22:32.383012 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 08:22:32.388329 cs0 DataBus test pass
527 08:22:32.388735 cs1 DataBus test pass
528 08:22:32.388961 cs0 AddrBus test pass
529 08:22:32.393829 cs1 AddrBus test pass
530 08:22:32.394103
531 08:22:32.394307 100bdlr_step_size ps== 478
532 08:22:32.394507 result report
533 08:22:32.399374 boot times 0Enable ddr reg access
534 08:22:32.407033 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 08:22:32.420910 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 08:22:33.076208 bl2z: ptr: 05129330, size: 00001e40
537 08:22:33.083517 0.0;M3 CHK:0;cm4_sp_mode 0
538 08:22:33.083921 MVN_1=0x00000000
539 08:22:33.084185 MVN_2=0x00000000
540 08:22:33.094957 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 08:22:33.095260 OPS=0x04
542 08:22:33.095466 ring efuse init
543 08:22:33.100582 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 08:22:33.100967 [0.017319 Inits done]
545 08:22:33.101277 secure task start!
546 08:22:33.108073 high task start!
547 08:22:33.108461 low task start!
548 08:22:33.108775 run into bl31
549 08:22:33.116682 NOTICE: BL31: v1.3(release):4fc40b1
550 08:22:33.124478 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 08:22:33.124759 NOTICE: BL31: G12A normal boot!
552 08:22:33.140054 NOTICE: BL31: BL33 decompress pass
553 08:22:33.145677 ERROR: Error initializing runtime service opteed_fast
554 08:22:34.536538 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 08:22:34.537141 bl2_stage_init 0x01
556 08:22:34.537561 bl2_stage_init 0x81
557 08:22:34.542040 hw id: 0x0000 - pwm id 0x01
558 08:22:34.542482 bl2_stage_init 0xc1
559 08:22:34.547530 bl2_stage_init 0x02
560 08:22:34.548047
561 08:22:34.548470 L0:00000000
562 08:22:34.548871 L1:00000703
563 08:22:34.549265 L2:00008067
564 08:22:34.549658 L3:15000000
565 08:22:34.553148 S1:00000000
566 08:22:34.553590 B2:20282000
567 08:22:34.553990 B1:a0f83180
568 08:22:34.554385
569 08:22:34.554786 TE: 68103
570 08:22:34.555182
571 08:22:34.558748 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 08:22:34.559192
573 08:22:34.564263 Board ID = 1
574 08:22:34.564706 Set cpu clk to 24M
575 08:22:34.565107 Set clk81 to 24M
576 08:22:34.569963 Use GP1_pll as DSU clk.
577 08:22:34.570412 DSU clk: 1200 Mhz
578 08:22:34.570816 CPU clk: 1200 MHz
579 08:22:34.575485 Set clk81 to 166.6M
580 08:22:34.581132 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 08:22:34.581569 board id: 1
582 08:22:34.588407 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 08:22:34.599254 fw parse done
584 08:22:34.605316 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 08:22:34.647412 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 08:22:34.659501 PIEI prepare done
587 08:22:34.659955 fastboot data load
588 08:22:34.660424 fastboot data verify
589 08:22:34.665054 verify result: 266
590 08:22:34.670728 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 08:22:34.671162 LPDDR4 probe
592 08:22:34.671564 ddr clk to 1584MHz
593 08:22:34.678629 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 08:22:34.716398
595 08:22:34.716857 dmc_version 0001
596 08:22:34.723378 Check phy result
597 08:22:34.729357 INFO : End of CA training
598 08:22:34.729793 INFO : End of initialization
599 08:22:34.734977 INFO : Training has run successfully!
600 08:22:34.735410 Check phy result
601 08:22:34.740623 INFO : End of initialization
602 08:22:34.741064 INFO : End of read enable training
603 08:22:34.746251 INFO : End of fine write leveling
604 08:22:34.751782 INFO : End of Write leveling coarse delay
605 08:22:34.752246 INFO : Training has run successfully!
606 08:22:34.752656 Check phy result
607 08:22:34.757463 INFO : End of initialization
608 08:22:34.757889 INFO : End of read dq deskew training
609 08:22:34.763009 INFO : End of MPR read delay center optimization
610 08:22:34.768615 INFO : End of write delay center optimization
611 08:22:34.774242 INFO : End of read delay center optimization
612 08:22:34.774671 INFO : End of max read latency training
613 08:22:34.779797 INFO : Training has run successfully!
614 08:22:34.780278 1D training succeed
615 08:22:34.789061 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 08:22:34.837370 Check phy result
617 08:22:34.837831 INFO : End of initialization
618 08:22:34.864790 INFO : End of 2D read delay Voltage center optimization
619 08:22:34.888934 INFO : End of 2D read delay Voltage center optimization
620 08:22:34.945600 INFO : End of 2D write delay Voltage center optimization
621 08:22:34.999871 INFO : End of 2D write delay Voltage center optimization
622 08:22:35.005250 INFO : Training has run successfully!
623 08:22:35.005726
624 08:22:35.006138 channel==0
625 08:22:35.010885 RxClkDly_Margin_A0==88 ps 9
626 08:22:35.011347 TxDqDly_Margin_A0==98 ps 10
627 08:22:35.014171 RxClkDly_Margin_A1==78 ps 8
628 08:22:35.014497 TxDqDly_Margin_A1==98 ps 10
629 08:22:35.019566 TrainedVREFDQ_A0==74
630 08:22:35.019866 TrainedVREFDQ_A1==74
631 08:22:35.025316 VrefDac_Margin_A0==23
632 08:22:35.025624 DeviceVref_Margin_A0==40
633 08:22:35.025840 VrefDac_Margin_A1==23
634 08:22:35.030851 DeviceVref_Margin_A1==40
635 08:22:35.031171
636 08:22:35.031390
637 08:22:35.031595 channel==1
638 08:22:35.031805 RxClkDly_Margin_A0==88 ps 9
639 08:22:35.034639 TxDqDly_Margin_A0==98 ps 10
640 08:22:35.040191 RxClkDly_Margin_A1==78 ps 8
641 08:22:35.040518 TxDqDly_Margin_A1==98 ps 10
642 08:22:35.040743 TrainedVREFDQ_A0==78
643 08:22:35.045951 TrainedVREFDQ_A1==78
644 08:22:35.046286 VrefDac_Margin_A0==22
645 08:22:35.051279 DeviceVref_Margin_A0==36
646 08:22:35.051747 VrefDac_Margin_A1==22
647 08:22:35.052138 DeviceVref_Margin_A1==36
648 08:22:35.052513
649 08:22:35.060444 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 08:22:35.060997
651 08:22:35.086262 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
652 08:22:35.091850 2D training succeed
653 08:22:35.097541 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 08:22:35.098091 auto size-- 65535DDR cs0 size: 2048MB
655 08:22:35.103084 DDR cs1 size: 2048MB
656 08:22:35.103652 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 08:22:35.108788 cs0 DataBus test pass
658 08:22:35.109349 cs1 DataBus test pass
659 08:22:35.109794 cs0 AddrBus test pass
660 08:22:35.114279 cs1 AddrBus test pass
661 08:22:35.114826
662 08:22:35.115308 100bdlr_step_size ps== 471
663 08:22:35.119880 result report
664 08:22:35.120454 boot times 0Enable ddr reg access
665 08:22:35.127076 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 08:22:35.141625 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 08:22:35.801516 bl2z: ptr: 05129330, size: 00001e40
668 08:22:35.809882 0.0;M3 CHK:0;cm4_sp_mode 0
669 08:22:35.810430 MVN_1=0x00000000
670 08:22:35.810862 MVN_2=0x00000000
671 08:22:35.821275 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 08:22:35.821830 OPS=0x04
673 08:22:35.822290 ring efuse init
674 08:22:35.826985 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 08:22:35.827500 [0.017354 Inits done]
676 08:22:35.827922 secure task start!
677 08:22:35.834522 high task start!
678 08:22:35.835032 low task start!
679 08:22:35.835457 run into bl31
680 08:22:35.843125 NOTICE: BL31: v1.3(release):4fc40b1
681 08:22:35.850999 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 08:22:35.851531 NOTICE: BL31: G12A normal boot!
683 08:22:35.866491 NOTICE: BL31: BL33 decompress pass
684 08:22:35.872211 ERROR: Error initializing runtime service opteed_fast
685 08:22:36.667612
686 08:22:36.668278
687 08:22:36.672974 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 08:22:36.673443
689 08:22:36.676399 Model: Libre Computer AML-S905D3-CC Solitude
690 08:22:36.823399 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 08:22:36.838865 DRAM: 2 GiB (effective 3.8 GiB)
692 08:22:36.939811 Core: 406 devices, 33 uclasses, devicetree: separate
693 08:22:36.945798 WDT: Not starting watchdog@f0d0
694 08:22:36.970996 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 08:22:36.983120 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 08:22:36.988291 ** Bad device specification mmc 0 **
697 08:22:36.998142 Card did not respond to voltage select! : -110
698 08:22:37.005809 ** Bad device specification mmc 0 **
699 08:22:37.006332 Couldn't find partition mmc 0
700 08:22:37.014132 Card did not respond to voltage select! : -110
701 08:22:37.019671 ** Bad device specification mmc 0 **
702 08:22:37.020236 Couldn't find partition mmc 0
703 08:22:37.024716 Error: could not access storage.
704 08:22:37.322323 Net: eth0: ethernet@ff3f0000
705 08:22:37.322938 starting USB...
706 08:22:37.566889 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 08:22:37.567504 Starting the controller
708 08:22:37.573843 USB XHCI 1.10
709 08:22:39.130034 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 08:22:39.138368 scanning usb for storage devices... 0 Storage Device(s) found
712 08:22:39.189549 Hit any key to stop autoboot: 1
713 08:22:39.190592 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 08:22:39.190982 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 08:22:39.191253 Setting prompt string to ['=>']
716 08:22:39.191527 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 08:22:39.204500 0
718 08:22:39.205468 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 08:22:39.306709 => setenv autoload no
721 08:22:39.307559 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 08:22:39.312498 setenv autoload no
724 08:22:39.414171 => setenv initrd_high 0xffffffff
725 08:22:39.414946 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 08:22:39.419303 setenv initrd_high 0xffffffff
728 08:22:39.520788 => setenv fdt_high 0xffffffff
729 08:22:39.521488 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 08:22:39.526120 setenv fdt_high 0xffffffff
732 08:22:39.627658 => dhcp
733 08:22:39.628461 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 08:22:39.632566 dhcp
735 08:22:40.338115 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 08:22:40.338714 Speed: 1000, full duplex
737 08:22:40.339144 BOOTP broadcast 1
738 08:22:40.350741 DHCP client bound to address 192.168.6.21 (12 ms)
740 08:22:40.452222 => setenv serverip 192.168.6.2
741 08:22:40.452946 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
742 08:22:40.456904 setenv serverip 192.168.6.2
744 08:22:40.558397 => tftpboot 0x01080000 938906/tftp-deploy-ipavn7e9/kernel/uImage
745 08:22:40.559156 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
746 08:22:40.565690 tftpboot 0x01080000 938906/tftp-deploy-ipavn7e9/kernel/uImage
747 08:22:40.566207 Speed: 1000, full duplex
748 08:22:40.566630 Using ethernet@ff3f0000 device
749 08:22:40.571189 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
750 08:22:40.576705 Filename '938906/tftp-deploy-ipavn7e9/kernel/uImage'.
751 08:22:40.580651 Load address: 0x1080000
752 08:22:43.433100 Loading: *############################################# UDP wrong checksum 000000ff 000081e0
753 08:22:43.445132 # UDP wrong checksum 000000ff 00000ad3
754 08:22:43.693279 #### 45.6 MiB
755 08:22:43.693908 14.6 MiB/s
756 08:22:43.694341 done
757 08:22:43.697637 Bytes transferred = 47784512 (2d92240 hex)
759 08:22:43.799321 => tftpboot 0x08000000 938906/tftp-deploy-ipavn7e9/ramdisk/ramdisk.cpio.gz.uboot
760 08:22:43.800069 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
761 08:22:43.807116 tftpboot 0x08000000 938906/tftp-deploy-ipavn7e9/ramdisk/ramdisk.cpio.gz.uboot
762 08:22:43.807638 Speed: 1000, full duplex
763 08:22:43.808081 Using ethernet@ff3f0000 device
764 08:22:43.812562 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
765 08:22:43.822329 Filename '938906/tftp-deploy-ipavn7e9/ramdisk/ramdisk.cpio.gz.uboot'.
766 08:22:43.822878 Load address: 0x8000000
767 08:22:45.468553 Loading: *################################################# UDP wrong checksum 00000005 0000cb65
768 08:22:50.468744 T UDP wrong checksum 00000005 0000cb65
769 08:23:00.470551 T T UDP wrong checksum 00000005 0000cb65
770 08:23:06.640278 T UDP wrong checksum 00000005 0000f144
771 08:23:20.472369 T T UDP wrong checksum 00000005 0000cb65
772 08:23:23.952084 T UDP wrong checksum 000000ff 000017dc
773 08:23:23.991925 UDP wrong checksum 000000ff 0000a2ce
774 08:23:40.479010 T T T
775 08:23:40.479421 Retry count exceeded; starting again
777 08:23:40.481169 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
780 08:23:40.482143 end: 2.4 uboot-commands (duration 00:01:20) [common]
782 08:23:40.482861 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
784 08:23:40.483430 end: 2 uboot-action (duration 00:01:20) [common]
786 08:23:40.484307 Cleaning after the job
787 08:23:40.484642 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/ramdisk
788 08:23:40.485383 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/kernel
789 08:23:40.517247 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/dtb
790 08:23:40.518144 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938906/tftp-deploy-ipavn7e9/modules
791 08:23:40.538606 start: 4.1 power-off (timeout 00:00:30) [common]
792 08:23:40.539265 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
793 08:23:40.570489 >> OK - accepted request
794 08:23:40.572384 Returned 0 in 0 seconds
795 08:23:40.673404 end: 4.1 power-off (duration 00:00:00) [common]
797 08:23:40.674322 start: 4.2 read-feedback (timeout 00:10:00) [common]
798 08:23:40.674992 Listened to connection for namespace 'common' for up to 1s
799 08:23:41.675921 Finalising connection for namespace 'common'
800 08:23:41.676666 Disconnecting from shell: Finalise
801 08:23:41.677188 =>
802 08:23:41.778139 end: 4.2 read-feedback (duration 00:00:01) [common]
803 08:23:41.778826 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/938906
804 08:23:42.084650 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/938906
805 08:23:42.085233 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.