Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:54:31.864838 lava-dispatcher, installed at version: 2024.01
2 08:54:31.865620 start: 0 validate
3 08:54:31.866099 Start time: 2024-11-06 08:54:31.866069+00:00 (UTC)
4 08:54:31.866636 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:54:31.867169 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:54:31.914664 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:54:31.915220 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241106%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:54:31.942650 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:54:31.943265 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241106%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 08:54:31.976011 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:54:31.976499 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:54:32.007416 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:54:32.007904 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241106%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 08:54:32.042527 validate duration: 0.18
16 08:54:32.043377 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:54:32.043694 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:54:32.044023 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:54:32.044604 Not decompressing ramdisk as can be used compressed.
20 08:54:32.045052 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 08:54:32.045325 saving as /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/ramdisk/initrd.cpio.gz
22 08:54:32.045586 total size: 5628182 (5 MB)
23 08:54:32.088466 progress 0 % (0 MB)
24 08:54:32.096519 progress 5 % (0 MB)
25 08:54:32.104430 progress 10 % (0 MB)
26 08:54:32.111826 progress 15 % (0 MB)
27 08:54:32.116230 progress 20 % (1 MB)
28 08:54:32.120269 progress 25 % (1 MB)
29 08:54:32.124766 progress 30 % (1 MB)
30 08:54:32.129258 progress 35 % (1 MB)
31 08:54:32.133345 progress 40 % (2 MB)
32 08:54:32.137770 progress 45 % (2 MB)
33 08:54:32.141780 progress 50 % (2 MB)
34 08:54:32.148859 progress 55 % (2 MB)
35 08:54:32.153918 progress 60 % (3 MB)
36 08:54:32.158487 progress 65 % (3 MB)
37 08:54:32.163667 progress 70 % (3 MB)
38 08:54:32.168314 progress 75 % (4 MB)
39 08:54:32.173463 progress 80 % (4 MB)
40 08:54:32.178063 progress 85 % (4 MB)
41 08:54:32.183582 progress 90 % (4 MB)
42 08:54:32.188690 progress 95 % (5 MB)
43 08:54:32.192979 progress 100 % (5 MB)
44 08:54:32.193856 5 MB downloaded in 0.15 s (36.21 MB/s)
45 08:54:32.194673 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:54:32.195906 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:54:32.196384 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:54:32.196756 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:54:32.197415 downloading http://storage.kernelci.org/next/master/next-20241106/arm64/defconfig/gcc-12/kernel/Image
51 08:54:32.197797 saving as /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/kernel/Image
52 08:54:32.198070 total size: 46041600 (43 MB)
53 08:54:32.198486 No compression specified
54 08:54:32.237318 progress 0 % (0 MB)
55 08:54:32.265965 progress 5 % (2 MB)
56 08:54:32.294436 progress 10 % (4 MB)
57 08:54:32.322636 progress 15 % (6 MB)
58 08:54:32.351491 progress 20 % (8 MB)
59 08:54:32.380352 progress 25 % (11 MB)
60 08:54:32.409156 progress 30 % (13 MB)
61 08:54:32.437379 progress 35 % (15 MB)
62 08:54:32.466115 progress 40 % (17 MB)
63 08:54:32.494194 progress 45 % (19 MB)
64 08:54:32.522199 progress 50 % (21 MB)
65 08:54:32.550428 progress 55 % (24 MB)
66 08:54:32.578697 progress 60 % (26 MB)
67 08:54:32.606674 progress 65 % (28 MB)
68 08:54:32.634698 progress 70 % (30 MB)
69 08:54:32.662972 progress 75 % (32 MB)
70 08:54:32.691406 progress 80 % (35 MB)
71 08:54:32.719100 progress 85 % (37 MB)
72 08:54:32.747144 progress 90 % (39 MB)
73 08:54:32.775074 progress 95 % (41 MB)
74 08:54:32.803290 progress 100 % (43 MB)
75 08:54:32.803827 43 MB downloaded in 0.61 s (72.49 MB/s)
76 08:54:32.804350 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:54:32.805204 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:54:32.805484 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:54:32.805749 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:54:32.806221 downloading http://storage.kernelci.org/next/master/next-20241106/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 08:54:32.806471 saving as /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/dtb/meson-g12b-a311d-libretech-cc.dtb
83 08:54:32.806678 total size: 54703 (0 MB)
84 08:54:32.806887 No compression specified
85 08:54:32.851154 progress 59 % (0 MB)
86 08:54:32.852057 progress 100 % (0 MB)
87 08:54:32.852645 0 MB downloaded in 0.05 s (1.14 MB/s)
88 08:54:32.853121 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:54:32.853931 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:54:32.854194 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:54:32.854458 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:54:32.854910 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 08:54:32.855163 saving as /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/nfsrootfs/full.rootfs.tar
95 08:54:32.855366 total size: 107552908 (102 MB)
96 08:54:32.855574 Using unxz to decompress xz
97 08:54:32.896586 progress 0 % (0 MB)
98 08:54:33.556669 progress 5 % (5 MB)
99 08:54:34.296879 progress 10 % (10 MB)
100 08:54:35.058843 progress 15 % (15 MB)
101 08:54:35.839874 progress 20 % (20 MB)
102 08:54:36.414419 progress 25 % (25 MB)
103 08:54:37.037865 progress 30 % (30 MB)
104 08:54:37.785035 progress 35 % (35 MB)
105 08:54:38.133524 progress 40 % (41 MB)
106 08:54:38.567926 progress 45 % (46 MB)
107 08:54:39.273487 progress 50 % (51 MB)
108 08:54:39.964825 progress 55 % (56 MB)
109 08:54:40.728198 progress 60 % (61 MB)
110 08:54:41.491645 progress 65 % (66 MB)
111 08:54:42.237441 progress 70 % (71 MB)
112 08:54:43.017681 progress 75 % (76 MB)
113 08:54:43.701848 progress 80 % (82 MB)
114 08:54:44.415364 progress 85 % (87 MB)
115 08:54:45.159643 progress 90 % (92 MB)
116 08:54:45.885225 progress 95 % (97 MB)
117 08:54:46.640538 progress 100 % (102 MB)
118 08:54:46.653448 102 MB downloaded in 13.80 s (7.43 MB/s)
119 08:54:46.654140 end: 1.4.1 http-download (duration 00:00:14) [common]
121 08:54:46.655070 end: 1.4 download-retry (duration 00:00:14) [common]
122 08:54:46.655396 start: 1.5 download-retry (timeout 00:09:45) [common]
123 08:54:46.655694 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 08:54:46.656544 downloading http://storage.kernelci.org/next/master/next-20241106/arm64/defconfig/gcc-12/modules.tar.xz
125 08:54:46.657168 saving as /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/modules/modules.tar
126 08:54:46.657676 total size: 11681704 (11 MB)
127 08:54:46.658140 Using unxz to decompress xz
128 08:54:46.703217 progress 0 % (0 MB)
129 08:54:46.769595 progress 5 % (0 MB)
130 08:54:46.843315 progress 10 % (1 MB)
131 08:54:46.939295 progress 15 % (1 MB)
132 08:54:47.035429 progress 20 % (2 MB)
133 08:54:47.114504 progress 25 % (2 MB)
134 08:54:47.186111 progress 30 % (3 MB)
135 08:54:47.265870 progress 35 % (3 MB)
136 08:54:47.345753 progress 40 % (4 MB)
137 08:54:47.422035 progress 45 % (5 MB)
138 08:54:47.505490 progress 50 % (5 MB)
139 08:54:47.586948 progress 55 % (6 MB)
140 08:54:47.667654 progress 60 % (6 MB)
141 08:54:47.747936 progress 65 % (7 MB)
142 08:54:47.828085 progress 70 % (7 MB)
143 08:54:47.910646 progress 75 % (8 MB)
144 08:54:47.994080 progress 80 % (8 MB)
145 08:54:48.073978 progress 85 % (9 MB)
146 08:54:48.153275 progress 90 % (10 MB)
147 08:54:48.232023 progress 95 % (10 MB)
148 08:54:48.309181 progress 100 % (11 MB)
149 08:54:48.321423 11 MB downloaded in 1.66 s (6.70 MB/s)
150 08:54:48.322198 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:54:48.323309 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:54:48.323669 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 08:54:48.324137 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 08:54:58.100363 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/944970/extract-nfsrootfs-6qfrvrvn
156 08:54:58.100961 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 08:54:58.101252 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 08:54:58.101880 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9
159 08:54:58.102345 makedir: /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin
160 08:54:58.102685 makedir: /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/tests
161 08:54:58.103008 makedir: /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/results
162 08:54:58.103349 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-add-keys
163 08:54:58.103898 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-add-sources
164 08:54:58.104463 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-background-process-start
165 08:54:58.105001 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-background-process-stop
166 08:54:58.105539 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-common-functions
167 08:54:58.106040 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-echo-ipv4
168 08:54:58.106554 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-install-packages
169 08:54:58.107060 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-installed-packages
170 08:54:58.107547 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-os-build
171 08:54:58.108055 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-probe-channel
172 08:54:58.108566 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-probe-ip
173 08:54:58.109074 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-target-ip
174 08:54:58.109557 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-target-mac
175 08:54:58.110036 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-target-storage
176 08:54:58.110519 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-test-case
177 08:54:58.111007 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-test-event
178 08:54:58.111487 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-test-feedback
179 08:54:58.111960 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-test-raise
180 08:54:58.112502 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-test-reference
181 08:54:58.113006 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-test-runner
182 08:54:58.113490 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-test-set
183 08:54:58.113976 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-test-shell
184 08:54:58.114467 Updating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-install-packages (oe)
185 08:54:58.115001 Updating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/bin/lava-installed-packages (oe)
186 08:54:58.115446 Creating /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/environment
187 08:54:58.115825 LAVA metadata
188 08:54:58.116113 - LAVA_JOB_ID=944970
189 08:54:58.116335 - LAVA_DISPATCHER_IP=192.168.6.2
190 08:54:58.116697 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 08:54:58.117730 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 08:54:58.118050 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 08:54:58.118262 skipped lava-vland-overlay
194 08:54:58.118507 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 08:54:58.118766 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 08:54:58.118988 skipped lava-multinode-overlay
197 08:54:58.119234 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 08:54:58.119490 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 08:54:58.119741 Loading test definitions
200 08:54:58.120037 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 08:54:58.120262 Using /lava-944970 at stage 0
202 08:54:58.121481 uuid=944970_1.6.2.4.1 testdef=None
203 08:54:58.121798 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 08:54:58.122066 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 08:54:58.123882 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 08:54:58.124716 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 08:54:58.126981 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 08:54:58.127810 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 08:54:58.129989 runner path: /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/0/tests/0_dmesg test_uuid 944970_1.6.2.4.1
212 08:54:58.130538 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 08:54:58.131296 Creating lava-test-runner.conf files
215 08:54:58.131499 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/944970/lava-overlay-xzfhq6z9/lava-944970/0 for stage 0
216 08:54:58.131837 - 0_dmesg
217 08:54:58.132212 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 08:54:58.132492 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 08:54:58.154019 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 08:54:58.154410 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 08:54:58.154674 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 08:54:58.154944 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 08:54:58.155209 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 08:54:58.769887 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 08:54:58.770405 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 08:54:58.770711 extracting modules file /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/modules/modules.tar to /var/lib/lava/dispatcher/tmp/944970/extract-nfsrootfs-6qfrvrvn
227 08:55:00.202729 extracting modules file /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/modules/modules.tar to /var/lib/lava/dispatcher/tmp/944970/extract-overlay-ramdisk-e4l42q4j/ramdisk
228 08:55:01.613839 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 08:55:01.614316 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 08:55:01.614597 [common] Applying overlay to NFS
231 08:55:01.614811 [common] Applying overlay /var/lib/lava/dispatcher/tmp/944970/compress-overlay-91w90b2z/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/944970/extract-nfsrootfs-6qfrvrvn
232 08:55:01.644078 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 08:55:01.644473 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 08:55:01.644746 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 08:55:01.644976 Converting downloaded kernel to a uImage
236 08:55:01.645284 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/kernel/Image /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/kernel/uImage
237 08:55:02.128272 output: Image Name:
238 08:55:02.128885 output: Created: Wed Nov 6 08:55:01 2024
239 08:55:02.129303 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 08:55:02.129710 output: Data Size: 46041600 Bytes = 44962.50 KiB = 43.91 MiB
241 08:55:02.130111 output: Load Address: 01080000
242 08:55:02.130505 output: Entry Point: 01080000
243 08:55:02.130897 output:
244 08:55:02.131487 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 08:55:02.132070 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 08:55:02.132361 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 08:55:02.132618 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 08:55:02.132877 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 08:55:02.133146 Building ramdisk /var/lib/lava/dispatcher/tmp/944970/extract-overlay-ramdisk-e4l42q4j/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/944970/extract-overlay-ramdisk-e4l42q4j/ramdisk
250 08:55:04.304181 >> 168055 blocks
251 08:55:12.071169 Adding RAMdisk u-boot header.
252 08:55:12.071624 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/944970/extract-overlay-ramdisk-e4l42q4j/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/944970/extract-overlay-ramdisk-e4l42q4j/ramdisk.cpio.gz.uboot
253 08:55:12.313815 output: Image Name:
254 08:55:12.314226 output: Created: Wed Nov 6 08:55:12 2024
255 08:55:12.314441 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 08:55:12.314648 output: Data Size: 23557233 Bytes = 23005.11 KiB = 22.47 MiB
257 08:55:12.314851 output: Load Address: 00000000
258 08:55:12.315049 output: Entry Point: 00000000
259 08:55:12.315247 output:
260 08:55:12.315848 rename /var/lib/lava/dispatcher/tmp/944970/extract-overlay-ramdisk-e4l42q4j/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/ramdisk/ramdisk.cpio.gz.uboot
261 08:55:12.316489 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 08:55:12.317041 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 08:55:12.317569 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 08:55:12.318021 No LXC device requested
265 08:55:12.318521 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 08:55:12.319031 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 08:55:12.319522 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 08:55:12.319932 Checking files for TFTP limit of 4294967296 bytes.
269 08:55:12.322648 end: 1 tftp-deploy (duration 00:00:40) [common]
270 08:55:12.323237 start: 2 uboot-action (timeout 00:05:00) [common]
271 08:55:12.323760 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 08:55:12.324299 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 08:55:12.324803 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 08:55:12.325356 Using kernel file from prepare-kernel: 944970/tftp-deploy-n27ayial/kernel/uImage
275 08:55:12.325986 substitutions:
276 08:55:12.326391 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 08:55:12.326792 - {DTB_ADDR}: 0x01070000
278 08:55:12.327188 - {DTB}: 944970/tftp-deploy-n27ayial/dtb/meson-g12b-a311d-libretech-cc.dtb
279 08:55:12.327584 - {INITRD}: 944970/tftp-deploy-n27ayial/ramdisk/ramdisk.cpio.gz.uboot
280 08:55:12.327976 - {KERNEL_ADDR}: 0x01080000
281 08:55:12.329063 - {KERNEL}: 944970/tftp-deploy-n27ayial/kernel/uImage
282 08:55:12.329304 - {LAVA_MAC}: None
283 08:55:12.329548 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/944970/extract-nfsrootfs-6qfrvrvn
284 08:55:12.329762 - {NFS_SERVER_IP}: 192.168.6.2
285 08:55:12.329972 - {PRESEED_CONFIG}: None
286 08:55:12.330204 - {PRESEED_LOCAL}: None
287 08:55:12.330441 - {RAMDISK_ADDR}: 0x08000000
288 08:55:12.330653 - {RAMDISK}: 944970/tftp-deploy-n27ayial/ramdisk/ramdisk.cpio.gz.uboot
289 08:55:12.330857 - {ROOT_PART}: None
290 08:55:12.331064 - {ROOT}: None
291 08:55:12.331306 - {SERVER_IP}: 192.168.6.2
292 08:55:12.331551 - {TEE_ADDR}: 0x83000000
293 08:55:12.331797 - {TEE}: None
294 08:55:12.332090 Parsed boot commands:
295 08:55:12.332353 - setenv autoload no
296 08:55:12.332597 - setenv initrd_high 0xffffffff
297 08:55:12.332842 - setenv fdt_high 0xffffffff
298 08:55:12.333096 - dhcp
299 08:55:12.333349 - setenv serverip 192.168.6.2
300 08:55:12.333611 - tftpboot 0x01080000 944970/tftp-deploy-n27ayial/kernel/uImage
301 08:55:12.333834 - tftpboot 0x08000000 944970/tftp-deploy-n27ayial/ramdisk/ramdisk.cpio.gz.uboot
302 08:55:12.334047 - tftpboot 0x01070000 944970/tftp-deploy-n27ayial/dtb/meson-g12b-a311d-libretech-cc.dtb
303 08:55:12.334294 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/944970/extract-nfsrootfs-6qfrvrvn,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 08:55:12.334556 - bootm 0x01080000 0x08000000 0x01070000
305 08:55:12.334893 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 08:55:12.335840 start: 2.3 connect-device (timeout 00:05:00) [common]
308 08:55:12.336195 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 08:55:12.351685 Setting prompt string to ['lava-test: # ']
310 08:55:12.353401 end: 2.3 connect-device (duration 00:00:00) [common]
311 08:55:12.354076 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 08:55:12.354643 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 08:55:12.354985 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 08:55:12.356123 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 08:55:12.394087 >> OK - accepted request
316 08:55:12.396555 Returned 0 in 0 seconds
317 08:55:12.497970 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 08:55:12.500068 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 08:55:12.500758 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 08:55:12.501330 Setting prompt string to ['Hit any key to stop autoboot']
322 08:55:12.501847 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 08:55:12.503682 Trying 192.168.56.21...
324 08:55:12.504315 Connected to conserv1.
325 08:55:12.504845 Escape character is '^]'.
326 08:55:12.505549
327 08:55:12.506080 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 08:55:12.506604
329 08:55:24.265525 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 08:55:24.266213 bl2_stage_init 0x01
331 08:55:24.266664 bl2_stage_init 0x81
332 08:55:24.270882 hw id: 0x0000 - pwm id 0x01
333 08:55:24.271443 bl2_stage_init 0xc1
334 08:55:24.271884 bl2_stage_init 0x02
335 08:55:24.272424
336 08:55:24.276535 L0:00000000
337 08:55:24.277051 L1:20000703
338 08:55:24.277494 L2:00008067
339 08:55:24.277931 L3:14000000
340 08:55:24.279423 B2:00402000
341 08:55:24.279921 B1:e0f83180
342 08:55:24.280410
343 08:55:24.280844 TE: 58167
344 08:55:24.281276
345 08:55:24.290475 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 08:55:24.290995
347 08:55:24.291431 Board ID = 1
348 08:55:24.291858 Set A53 clk to 24M
349 08:55:24.292325 Set A73 clk to 24M
350 08:55:24.296129 Set clk81 to 24M
351 08:55:24.296618 A53 clk: 1200 MHz
352 08:55:24.297048 A73 clk: 1200 MHz
353 08:55:24.301615 CLK81: 166.6M
354 08:55:24.302102 smccc: 00012abe
355 08:55:24.307350 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 08:55:24.307858 board id: 1
357 08:55:24.312917 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 08:55:24.326515 fw parse done
359 08:55:24.332547 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 08:55:24.375122 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 08:55:24.385985 PIEI prepare done
362 08:55:24.386487 fastboot data load
363 08:55:24.386922 fastboot data verify
364 08:55:24.391699 verify result: 266
365 08:55:24.397336 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 08:55:24.397884 LPDDR4 probe
367 08:55:24.398322 ddr clk to 1584MHz
368 08:55:24.405296 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 08:55:24.442584
370 08:55:24.443203 dmc_version 0001
371 08:55:24.449172 Check phy result
372 08:55:24.455029 INFO : End of CA training
373 08:55:24.455565 INFO : End of initialization
374 08:55:24.460635 INFO : Training has run successfully!
375 08:55:24.461167 Check phy result
376 08:55:24.466237 INFO : End of initialization
377 08:55:24.466764 INFO : End of read enable training
378 08:55:24.471838 INFO : End of fine write leveling
379 08:55:24.477446 INFO : End of Write leveling coarse delay
380 08:55:24.477973 INFO : Training has run successfully!
381 08:55:24.478408 Check phy result
382 08:55:24.483060 INFO : End of initialization
383 08:55:24.483614 INFO : End of read dq deskew training
384 08:55:24.488683 INFO : End of MPR read delay center optimization
385 08:55:24.494222 INFO : End of write delay center optimization
386 08:55:24.499859 INFO : End of read delay center optimization
387 08:55:24.500424 INFO : End of max read latency training
388 08:55:24.505446 INFO : Training has run successfully!
389 08:55:24.505958 1D training succeed
390 08:55:24.514647 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 08:55:24.562660 Check phy result
392 08:55:24.563301 INFO : End of initialization
393 08:55:24.583871 INFO : End of 2D read delay Voltage center optimization
394 08:55:24.603960 INFO : End of 2D read delay Voltage center optimization
395 08:55:24.655841 INFO : End of 2D write delay Voltage center optimization
396 08:55:24.705090 INFO : End of 2D write delay Voltage center optimization
397 08:55:24.710620 INFO : Training has run successfully!
398 08:55:24.710940
399 08:55:24.711157 channel==0
400 08:55:24.716237 RxClkDly_Margin_A0==88 ps 9
401 08:55:24.716548 TxDqDly_Margin_A0==98 ps 10
402 08:55:24.721775 RxClkDly_Margin_A1==88 ps 9
403 08:55:24.722085 TxDqDly_Margin_A1==98 ps 10
404 08:55:24.722297 TrainedVREFDQ_A0==74
405 08:55:24.727465 TrainedVREFDQ_A1==74
406 08:55:24.727804 VrefDac_Margin_A0==25
407 08:55:24.728065 DeviceVref_Margin_A0==40
408 08:55:24.733032 VrefDac_Margin_A1==25
409 08:55:24.733342 DeviceVref_Margin_A1==40
410 08:55:24.733554
411 08:55:24.733758
412 08:55:24.738614 channel==1
413 08:55:24.738927 RxClkDly_Margin_A0==98 ps 10
414 08:55:24.739136 TxDqDly_Margin_A0==88 ps 9
415 08:55:24.744243 RxClkDly_Margin_A1==88 ps 9
416 08:55:24.744587 TxDqDly_Margin_A1==88 ps 9
417 08:55:24.749822 TrainedVREFDQ_A0==77
418 08:55:24.750153 TrainedVREFDQ_A1==77
419 08:55:24.750391 VrefDac_Margin_A0==22
420 08:55:24.755425 DeviceVref_Margin_A0==37
421 08:55:24.755749 VrefDac_Margin_A1==24
422 08:55:24.761065 DeviceVref_Margin_A1==37
423 08:55:24.761401
424 08:55:24.761628 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 08:55:24.761850
426 08:55:24.794620 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 08:55:24.795075 2D training succeed
428 08:55:24.800206 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 08:55:24.805775 auto size-- 65535DDR cs0 size: 2048MB
430 08:55:24.806086 DDR cs1 size: 2048MB
431 08:55:24.811456 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 08:55:24.811767 cs0 DataBus test pass
433 08:55:24.817005 cs1 DataBus test pass
434 08:55:24.817339 cs0 AddrBus test pass
435 08:55:24.817548 cs1 AddrBus test pass
436 08:55:24.817751
437 08:55:24.822602 100bdlr_step_size ps== 420
438 08:55:24.822951 result report
439 08:55:24.828215 boot times 0Enable ddr reg access
440 08:55:24.833543 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 08:55:24.846908 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 08:55:25.418875 0.0;M3 CHK:0;cm4_sp_mode 0
443 08:55:25.419320 MVN_1=0x00000000
444 08:55:25.424908 MVN_2=0x00000000
445 08:55:25.430150 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 08:55:25.430479 OPS=0x10
447 08:55:25.430698 ring efuse init
448 08:55:25.430902 chipver efuse init
449 08:55:25.435858 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 08:55:25.441346 [0.018960 Inits done]
451 08:55:25.441678 secure task start!
452 08:55:25.441892 high task start!
453 08:55:25.445898 low task start!
454 08:55:25.446208 run into bl31
455 08:55:25.452566 NOTICE: BL31: v1.3(release):4fc40b1
456 08:55:25.460405 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 08:55:25.460749 NOTICE: BL31: G12A normal boot!
458 08:55:25.485833 NOTICE: BL31: BL33 decompress pass
459 08:55:25.491522 ERROR: Error initializing runtime service opteed_fast
460 08:55:26.724521
461 08:55:26.725168
462 08:55:26.732877 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 08:55:26.733466
464 08:55:26.733936 Model: Libre Computer AML-A311D-CC Alta
465 08:55:26.941270 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 08:55:26.964667 DRAM: 2 GiB (effective 3.8 GiB)
467 08:55:27.107680 Core: 408 devices, 31 uclasses, devicetree: separate
468 08:55:27.113597 WDT: Not starting watchdog@f0d0
469 08:55:27.145826 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 08:55:27.158189 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 08:55:27.163122 ** Bad device specification mmc 0 **
472 08:55:27.173569 Card did not respond to voltage select! : -110
473 08:55:27.181110 ** Bad device specification mmc 0 **
474 08:55:27.181562 Couldn't find partition mmc 0
475 08:55:27.189564 Card did not respond to voltage select! : -110
476 08:55:27.195003 ** Bad device specification mmc 0 **
477 08:55:27.195465 Couldn't find partition mmc 0
478 08:55:27.200064 Error: could not access storage.
479 08:55:28.465407 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 08:55:28.465826 bl2_stage_init 0x01
481 08:55:28.466049 bl2_stage_init 0x81
482 08:55:28.470961 hw id: 0x0000 - pwm id 0x01
483 08:55:28.471273 bl2_stage_init 0xc1
484 08:55:28.471487 bl2_stage_init 0x02
485 08:55:28.471692
486 08:55:28.476566 L0:00000000
487 08:55:28.476843 L1:20000703
488 08:55:28.477052 L2:00008067
489 08:55:28.477256 L3:14000000
490 08:55:28.482112 B2:00402000
491 08:55:28.482382 B1:e0f83180
492 08:55:28.482585
493 08:55:28.482788 TE: 58124
494 08:55:28.482993
495 08:55:28.487822 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 08:55:28.488122
497 08:55:28.488355 Board ID = 1
498 08:55:28.493358 Set A53 clk to 24M
499 08:55:28.493637 Set A73 clk to 24M
500 08:55:28.493842 Set clk81 to 24M
501 08:55:28.498966 A53 clk: 1200 MHz
502 08:55:28.499221 A73 clk: 1200 MHz
503 08:55:28.499426 CLK81: 166.6M
504 08:55:28.499629 smccc: 00012a92
505 08:55:28.504589 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 08:55:28.510217 board id: 1
507 08:55:28.516072 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 08:55:28.526745 fw parse done
509 08:55:28.532702 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 08:55:28.575333 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 08:55:28.586239 PIEI prepare done
512 08:55:28.586714 fastboot data load
513 08:55:28.587132 fastboot data verify
514 08:55:28.592081 verify result: 266
515 08:55:28.597496 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 08:55:28.597941 LPDDR4 probe
517 08:55:28.598346 ddr clk to 1584MHz
518 08:55:28.605481 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 08:55:28.642717
520 08:55:28.643170 dmc_version 0001
521 08:55:28.649379 Check phy result
522 08:55:28.655243 INFO : End of CA training
523 08:55:28.655687 INFO : End of initialization
524 08:55:28.660945 INFO : Training has run successfully!
525 08:55:28.661382 Check phy result
526 08:55:28.666498 INFO : End of initialization
527 08:55:28.667026 INFO : End of read enable training
528 08:55:28.672075 INFO : End of fine write leveling
529 08:55:28.677754 INFO : End of Write leveling coarse delay
530 08:55:28.678208 INFO : Training has run successfully!
531 08:55:28.678623 Check phy result
532 08:55:28.683348 INFO : End of initialization
533 08:55:28.683815 INFO : End of read dq deskew training
534 08:55:28.689087 INFO : End of MPR read delay center optimization
535 08:55:28.694610 INFO : End of write delay center optimization
536 08:55:28.700205 INFO : End of read delay center optimization
537 08:55:28.700677 INFO : End of max read latency training
538 08:55:28.705701 INFO : Training has run successfully!
539 08:55:28.706152 1D training succeed
540 08:55:28.714913 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 08:55:28.762443 Check phy result
542 08:55:28.762786 INFO : End of initialization
543 08:55:28.784198 INFO : End of 2D read delay Voltage center optimization
544 08:55:28.804415 INFO : End of 2D read delay Voltage center optimization
545 08:55:28.856475 INFO : End of 2D write delay Voltage center optimization
546 08:55:28.905863 INFO : End of 2D write delay Voltage center optimization
547 08:55:28.911408 INFO : Training has run successfully!
548 08:55:28.911707
549 08:55:28.911922 channel==0
550 08:55:28.917000 RxClkDly_Margin_A0==88 ps 9
551 08:55:28.917409 TxDqDly_Margin_A0==98 ps 10
552 08:55:28.922613 RxClkDly_Margin_A1==88 ps 9
553 08:55:28.923033 TxDqDly_Margin_A1==98 ps 10
554 08:55:28.923358 TrainedVREFDQ_A0==74
555 08:55:28.928187 TrainedVREFDQ_A1==74
556 08:55:28.928486 VrefDac_Margin_A0==25
557 08:55:28.928693 DeviceVref_Margin_A0==40
558 08:55:28.933769 VrefDac_Margin_A1==25
559 08:55:28.934186 DeviceVref_Margin_A1==40
560 08:55:28.934509
561 08:55:28.934827
562 08:55:28.939357 channel==1
563 08:55:28.939641 RxClkDly_Margin_A0==98 ps 10
564 08:55:28.939848 TxDqDly_Margin_A0==98 ps 10
565 08:55:28.945056 RxClkDly_Margin_A1==98 ps 10
566 08:55:28.945399 TxDqDly_Margin_A1==88 ps 9
567 08:55:28.950584 TrainedVREFDQ_A0==77
568 08:55:28.950890 TrainedVREFDQ_A1==77
569 08:55:28.951103 VrefDac_Margin_A0==22
570 08:55:28.956192 DeviceVref_Margin_A0==37
571 08:55:28.956471 VrefDac_Margin_A1==22
572 08:55:28.961794 DeviceVref_Margin_A1==37
573 08:55:28.962078
574 08:55:28.962287 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 08:55:28.967400
576 08:55:28.995409 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000016 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 08:55:28.995770 2D training succeed
578 08:55:29.001019 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 08:55:29.006578 auto size-- 65535DDR cs0 size: 2048MB
580 08:55:29.006856 DDR cs1 size: 2048MB
581 08:55:29.012165 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 08:55:29.012448 cs0 DataBus test pass
583 08:55:29.017759 cs1 DataBus test pass
584 08:55:29.018045 cs0 AddrBus test pass
585 08:55:29.018256 cs1 AddrBus test pass
586 08:55:29.018457
587 08:55:29.023370 100bdlr_step_size ps== 420
588 08:55:29.023668 result report
589 08:55:29.029025 boot times 0Enable ddr reg access
590 08:55:29.034411 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 08:55:29.047973 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 08:55:29.621910 0.0;M3 CHK:0;cm4_sp_mode 0
593 08:55:29.622356 MVN_1=0x00000000
594 08:55:29.627347 MVN_2=0x00000000
595 08:55:29.633091 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 08:55:29.633602 OPS=0x10
597 08:55:29.634176 ring efuse init
598 08:55:29.634589 chipver efuse init
599 08:55:29.641433 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 08:55:29.641949 [0.018961 Inits done]
601 08:55:29.642346 secure task start!
602 08:55:29.648895 high task start!
603 08:55:29.649392 low task start!
604 08:55:29.649784 run into bl31
605 08:55:29.655519 NOTICE: BL31: v1.3(release):4fc40b1
606 08:55:29.663395 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 08:55:29.663919 NOTICE: BL31: G12A normal boot!
608 08:55:29.688706 NOTICE: BL31: BL33 decompress pass
609 08:55:29.694368 ERROR: Error initializing runtime service opteed_fast
610 08:55:30.927361
611 08:55:30.928024
612 08:55:30.935610 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 08:55:30.936126
614 08:55:30.936560 Model: Libre Computer AML-A311D-CC Alta
615 08:55:31.144300 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 08:55:31.167720 DRAM: 2 GiB (effective 3.8 GiB)
617 08:55:31.310542 Core: 408 devices, 31 uclasses, devicetree: separate
618 08:55:31.316363 WDT: Not starting watchdog@f0d0
619 08:55:31.348524 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 08:55:31.361043 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 08:55:31.366030 ** Bad device specification mmc 0 **
622 08:55:31.376324 Card did not respond to voltage select! : -110
623 08:55:31.384039 ** Bad device specification mmc 0 **
624 08:55:31.384495 Couldn't find partition mmc 0
625 08:55:31.392333 Card did not respond to voltage select! : -110
626 08:55:31.397843 ** Bad device specification mmc 0 **
627 08:55:31.398287 Couldn't find partition mmc 0
628 08:55:31.402959 Error: could not access storage.
629 08:55:31.745536 Net: eth0: ethernet@ff3f0000
630 08:55:31.746098 starting USB...
631 08:55:31.997217 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 08:55:31.997767 Starting the controller
633 08:55:32.004391 USB XHCI 1.10
634 08:55:33.585915 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 08:55:33.586547 bl2_stage_init 0x01
636 08:55:33.586977 bl2_stage_init 0x81
637 08:55:33.591249 hw id: 0x0000 - pwm id 0x01
638 08:55:33.591712 bl2_stage_init 0xc1
639 08:55:33.592175 bl2_stage_init 0x02
640 08:55:33.592592
641 08:55:33.596883 L0:00000000
642 08:55:33.597326 L1:20000703
643 08:55:33.597733 L2:00008067
644 08:55:33.598131 L3:14000000
645 08:55:33.599798 B2:00402000
646 08:55:33.600262 B1:e0f83180
647 08:55:33.600666
648 08:55:33.601061 TE: 58159
649 08:55:33.601458
650 08:55:33.610908 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 08:55:33.611350
652 08:55:33.611756 Board ID = 1
653 08:55:33.612189 Set A53 clk to 24M
654 08:55:33.612584 Set A73 clk to 24M
655 08:55:33.616536 Set clk81 to 24M
656 08:55:33.616977 A53 clk: 1200 MHz
657 08:55:33.617375 A73 clk: 1200 MHz
658 08:55:33.620042 CLK81: 166.6M
659 08:55:33.620479 smccc: 00012ab5
660 08:55:33.625701 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 08:55:33.631270 board id: 1
662 08:55:33.636223 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 08:55:33.647030 fw parse done
664 08:55:33.652992 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 08:55:33.695568 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 08:55:33.706463 PIEI prepare done
667 08:55:33.706977 fastboot data load
668 08:55:33.707401 fastboot data verify
669 08:55:33.712005 verify result: 266
670 08:55:33.717658 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 08:55:33.718140 LPDDR4 probe
672 08:55:33.718554 ddr clk to 1584MHz
673 08:55:33.725638 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 08:55:33.762888
675 08:55:33.763341 dmc_version 0001
676 08:55:33.769491 Check phy result
677 08:55:33.775396 INFO : End of CA training
678 08:55:33.775834 INFO : End of initialization
679 08:55:33.780943 INFO : Training has run successfully!
680 08:55:33.781375 Check phy result
681 08:55:33.786647 INFO : End of initialization
682 08:55:33.787127 INFO : End of read enable training
683 08:55:33.792171 INFO : End of fine write leveling
684 08:55:33.797758 INFO : End of Write leveling coarse delay
685 08:55:33.798209 INFO : Training has run successfully!
686 08:55:33.798625 Check phy result
687 08:55:33.803349 INFO : End of initialization
688 08:55:33.803790 INFO : End of read dq deskew training
689 08:55:33.808952 INFO : End of MPR read delay center optimization
690 08:55:33.814650 INFO : End of write delay center optimization
691 08:55:33.820164 INFO : End of read delay center optimization
692 08:55:33.820607 INFO : End of max read latency training
693 08:55:33.825770 INFO : Training has run successfully!
694 08:55:33.826211 1D training succeed
695 08:55:33.834976 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 08:55:33.882722 Check phy result
697 08:55:33.883290 INFO : End of initialization
698 08:55:33.903495 INFO : End of 2D read delay Voltage center optimization
699 08:55:33.924997 INFO : End of 2D read delay Voltage center optimization
700 08:55:33.977057 INFO : End of 2D write delay Voltage center optimization
701 08:55:34.025567 INFO : End of 2D write delay Voltage center optimization
702 08:55:34.031020 INFO : Training has run successfully!
703 08:55:34.031470
704 08:55:34.031882 channel==0
705 08:55:34.036672 RxClkDly_Margin_A0==88 ps 9
706 08:55:34.037123 TxDqDly_Margin_A0==98 ps 10
707 08:55:34.040003 RxClkDly_Margin_A1==88 ps 9
708 08:55:34.040451 TxDqDly_Margin_A1==88 ps 9
709 08:55:34.045419 TrainedVREFDQ_A0==74
710 08:55:34.045864 TrainedVREFDQ_A1==74
711 08:55:34.046273 VrefDac_Margin_A0==25
712 08:55:34.051142 DeviceVref_Margin_A0==40
713 08:55:34.051578 VrefDac_Margin_A1==25
714 08:55:34.056798 DeviceVref_Margin_A1==40
715 08:55:34.057250
716 08:55:34.057656
717 08:55:34.058054 channel==1
718 08:55:34.058446 RxClkDly_Margin_A0==98 ps 10
719 08:55:34.060239 TxDqDly_Margin_A0==98 ps 10
720 08:55:34.065774 RxClkDly_Margin_A1==98 ps 10
721 08:55:34.066201 TxDqDly_Margin_A1==88 ps 9
722 08:55:34.066603 TrainedVREFDQ_A0==77
723 08:55:34.071345 TrainedVREFDQ_A1==77
724 08:55:34.071789 VrefDac_Margin_A0==22
725 08:55:34.077247 DeviceVref_Margin_A0==37
726 08:55:34.077683 VrefDac_Margin_A1==24
727 08:55:34.078087 DeviceVref_Margin_A1==37
728 08:55:34.078487
729 08:55:34.085888 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 08:55:34.086333
731 08:55:34.114049 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 08:55:34.114592 2D training succeed
733 08:55:34.124994 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 08:55:34.125438 auto size-- 65535DDR cs0 size: 2048MB
735 08:55:34.125844 DDR cs1 size: 2048MB
736 08:55:34.130681 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 08:55:34.131116 cs0 DataBus test pass
738 08:55:34.136287 cs1 DataBus test pass
739 08:55:34.136718 cs0 AddrBus test pass
740 08:55:34.142004 cs1 AddrBus test pass
741 08:55:34.142540
742 08:55:34.142993 100bdlr_step_size ps== 420
743 08:55:34.143437 result report
744 08:55:34.147498 boot times 0Enable ddr reg access
745 08:55:34.153995 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 08:55:34.167408 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 08:55:34.739394 0.0;M3 CHK:0;cm4_sp_mode 0
748 08:55:34.740020 MVN_1=0x00000000
749 08:55:34.744925 MVN_2=0x00000000
750 08:55:34.750686 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 08:55:34.751172 OPS=0x10
752 08:55:34.751569 ring efuse init
753 08:55:34.751953 chipver efuse init
754 08:55:34.756239 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 08:55:34.761801 [0.018961 Inits done]
756 08:55:34.762227 secure task start!
757 08:55:34.762615 high task start!
758 08:55:34.766388 low task start!
759 08:55:34.766799 run into bl31
760 08:55:34.773074 NOTICE: BL31: v1.3(release):4fc40b1
761 08:55:34.780916 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 08:55:34.781343 NOTICE: BL31: G12A normal boot!
763 08:55:34.806208 NOTICE: BL31: BL33 decompress pass
764 08:55:34.811913 ERROR: Error initializing runtime service opteed_fast
765 08:55:36.044761
766 08:55:36.045363
767 08:55:36.053196 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 08:55:36.053702
769 08:55:36.054123 Model: Libre Computer AML-A311D-CC Alta
770 08:55:36.261639 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 08:55:36.285064 DRAM: 2 GiB (effective 3.8 GiB)
772 08:55:36.428143 Core: 408 devices, 31 uclasses, devicetree: separate
773 08:55:36.433808 WDT: Not starting watchdog@f0d0
774 08:55:36.466264 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 08:55:36.478558 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 08:55:36.483527 ** Bad device specification mmc 0 **
777 08:55:36.493883 Card did not respond to voltage select! : -110
778 08:55:36.501571 ** Bad device specification mmc 0 **
779 08:55:36.502157 Couldn't find partition mmc 0
780 08:55:36.509899 Card did not respond to voltage select! : -110
781 08:55:36.515375 ** Bad device specification mmc 0 **
782 08:55:36.515922 Couldn't find partition mmc 0
783 08:55:36.520645 Error: could not access storage.
784 08:55:36.862980 Net: eth0: ethernet@ff3f0000
785 08:55:36.863605 starting USB...
786 08:55:37.114803 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 08:55:37.115411 Starting the controller
788 08:55:37.121709 USB XHCI 1.10
789 08:55:39.285943 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 08:55:39.286560 bl2_stage_init 0x01
791 08:55:39.286989 bl2_stage_init 0x81
792 08:55:39.291565 hw id: 0x0000 - pwm id 0x01
793 08:55:39.292091 bl2_stage_init 0xc1
794 08:55:39.292514 bl2_stage_init 0x02
795 08:55:39.292919
796 08:55:39.297109 L0:00000000
797 08:55:39.297726 L1:20000703
798 08:55:39.298200 L2:00008067
799 08:55:39.298670 L3:14000000
800 08:55:39.300106 B2:00402000
801 08:55:39.300646 B1:e0f83180
802 08:55:39.301113
803 08:55:39.301574 TE: 58167
804 08:55:39.302028
805 08:55:39.311184 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 08:55:39.311786
807 08:55:39.312308 Board ID = 1
808 08:55:39.312772 Set A53 clk to 24M
809 08:55:39.313222 Set A73 clk to 24M
810 08:55:39.316748 Set clk81 to 24M
811 08:55:39.317308 A53 clk: 1200 MHz
812 08:55:39.317771 A73 clk: 1200 MHz
813 08:55:39.322417 CLK81: 166.6M
814 08:55:39.323029 smccc: 00012abe
815 08:55:39.328060 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 08:55:39.328639 board id: 1
817 08:55:39.336806 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 08:55:39.347184 fw parse done
819 08:55:39.353120 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 08:55:39.395760 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 08:55:39.406830 PIEI prepare done
822 08:55:39.407495 fastboot data load
823 08:55:39.408058 fastboot data verify
824 08:55:39.412463 verify result: 266
825 08:55:39.418062 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 08:55:39.418740 LPDDR4 probe
827 08:55:39.419242 ddr clk to 1584MHz
828 08:55:39.426024 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 08:55:39.463254
830 08:55:39.463950 dmc_version 0001
831 08:55:39.470000 Check phy result
832 08:55:39.475693 INFO : End of CA training
833 08:55:39.476130 INFO : End of initialization
834 08:55:39.481268 INFO : Training has run successfully!
835 08:55:39.481668 Check phy result
836 08:55:39.487009 INFO : End of initialization
837 08:55:39.487598 INFO : End of read enable training
838 08:55:39.490255 INFO : End of fine write leveling
839 08:55:39.495744 INFO : End of Write leveling coarse delay
840 08:55:39.501413 INFO : Training has run successfully!
841 08:55:39.501992 Check phy result
842 08:55:39.502468 INFO : End of initialization
843 08:55:39.507062 INFO : End of read dq deskew training
844 08:55:39.512648 INFO : End of MPR read delay center optimization
845 08:55:39.513225 INFO : End of write delay center optimization
846 08:55:39.518188 INFO : End of read delay center optimization
847 08:55:39.523821 INFO : End of max read latency training
848 08:55:39.524456 INFO : Training has run successfully!
849 08:55:39.529410 1D training succeed
850 08:55:39.535405 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 08:55:39.582866 Check phy result
852 08:55:39.583487 INFO : End of initialization
853 08:55:39.605587 INFO : End of 2D read delay Voltage center optimization
854 08:55:39.625689 INFO : End of 2D read delay Voltage center optimization
855 08:55:39.677734 INFO : End of 2D write delay Voltage center optimization
856 08:55:39.727125 INFO : End of 2D write delay Voltage center optimization
857 08:55:39.732673 INFO : Training has run successfully!
858 08:55:39.733028
859 08:55:39.733303 channel==0
860 08:55:39.738440 RxClkDly_Margin_A0==88 ps 9
861 08:55:39.738860 TxDqDly_Margin_A0==98 ps 10
862 08:55:39.744279 RxClkDly_Margin_A1==88 ps 9
863 08:55:39.744874 TxDqDly_Margin_A1==98 ps 10
864 08:55:39.745300 TrainedVREFDQ_A0==74
865 08:55:39.749982 TrainedVREFDQ_A1==74
866 08:55:39.750580 VrefDac_Margin_A0==24
867 08:55:39.751001 DeviceVref_Margin_A0==40
868 08:55:39.755412 VrefDac_Margin_A1==24
869 08:55:39.755965 DeviceVref_Margin_A1==40
870 08:55:39.756474
871 08:55:39.756926
872 08:55:39.760914 channel==1
873 08:55:39.761560 RxClkDly_Margin_A0==98 ps 10
874 08:55:39.762044 TxDqDly_Margin_A0==98 ps 10
875 08:55:39.766482 RxClkDly_Margin_A1==98 ps 10
876 08:55:39.767103 TxDqDly_Margin_A1==88 ps 9
877 08:55:39.771909 TrainedVREFDQ_A0==77
878 08:55:39.772425 TrainedVREFDQ_A1==77
879 08:55:39.772648 VrefDac_Margin_A0==22
880 08:55:39.777620 DeviceVref_Margin_A0==37
881 08:55:39.777994 VrefDac_Margin_A1==22
882 08:55:39.783084 DeviceVref_Margin_A1==37
883 08:55:39.783468
884 08:55:39.783679 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 08:55:39.788623
886 08:55:39.817343 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 08:55:39.818023 2D training succeed
888 08:55:39.822566 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 08:55:39.828009 auto size-- 65535DDR cs0 size: 2048MB
890 08:55:39.828568 DDR cs1 size: 2048MB
891 08:55:39.833742 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 08:55:39.834135 cs0 DataBus test pass
893 08:55:39.839204 cs1 DataBus test pass
894 08:55:39.839591 cs0 AddrBus test pass
895 08:55:39.839846 cs1 AddrBus test pass
896 08:55:39.840110
897 08:55:39.844787 100bdlr_step_size ps== 420
898 08:55:39.845149 result report
899 08:55:39.850258 boot times 0Enable ddr reg access
900 08:55:39.855976 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 08:55:39.869299 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 08:55:40.442422 0.0;M3 CHK:0;cm4_sp_mode 0
903 08:55:40.442862 MVN_1=0x00000000
904 08:55:40.460533 MVN_2=0x00000000
905 08:55:40.460970 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 08:55:40.461186 OPS=0x10
907 08:55:40.461391 ring efuse init
908 08:55:40.461594 chipver efuse init
909 08:55:40.462946 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 08:55:40.464964 [0.018961 Inits done]
911 08:55:40.465743 secure task start!
912 08:55:40.467021 high task start!
913 08:55:40.499836 low task start!
914 08:55:40.500560 run into bl31
915 08:55:40.501004 NOTICE: BL31: v1.3(release):4fc40b1
916 08:55:40.501251 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 08:55:40.501479 NOTICE: BL31: G12A normal boot!
918 08:55:40.509328 NOTICE: BL31: BL33 decompress pass
919 08:55:40.514919 ERROR: Error initializing runtime service opteed_fast
920 08:55:41.748049
921 08:55:41.748727
922 08:55:41.756209 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 08:55:41.756560
924 08:55:41.756804 Model: Libre Computer AML-A311D-CC Alta
925 08:55:41.964756 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 08:55:41.987432 DRAM: 2 GiB (effective 3.8 GiB)
927 08:55:42.131094 Core: 408 devices, 31 uclasses, devicetree: separate
928 08:55:42.136793 WDT: Not starting watchdog@f0d0
929 08:55:42.169234 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 08:55:42.181561 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 08:55:42.186646 ** Bad device specification mmc 0 **
932 08:55:42.197122 Card did not respond to voltage select! : -110
933 08:55:42.204645 ** Bad device specification mmc 0 **
934 08:55:42.205218 Couldn't find partition mmc 0
935 08:55:42.213161 Card did not respond to voltage select! : -110
936 08:55:42.218512 ** Bad device specification mmc 0 **
937 08:55:42.219077 Couldn't find partition mmc 0
938 08:55:42.223569 Error: could not access storage.
939 08:55:42.566038 Net: eth0: ethernet@ff3f0000
940 08:55:42.566655 starting USB...
941 08:55:42.817775 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 08:55:42.818386 Starting the controller
943 08:55:42.824063 USB XHCI 1.10
944 08:55:44.378542 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 08:55:44.386912 scanning usb for storage devices... 0 Storage Device(s) found
947 08:55:44.438124 Hit any key to stop autoboot: 1
948 08:55:44.439006 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 08:55:44.439386 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 08:55:44.439682 Setting prompt string to ['=>']
951 08:55:44.440011 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 08:55:44.454433 0
953 08:55:44.455226 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 08:55:44.455728 Sending with 10 millisecond of delay
956 08:55:45.590591 => setenv autoload no
957 08:55:45.601452 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 08:55:45.606518 setenv autoload no
959 08:55:45.607318 Sending with 10 millisecond of delay
961 08:55:47.405358 => setenv initrd_high 0xffffffff
962 08:55:47.416200 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 08:55:47.416820 setenv initrd_high 0xffffffff
964 08:55:47.417315 Sending with 10 millisecond of delay
966 08:55:49.034684 => setenv fdt_high 0xffffffff
967 08:55:49.045565 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 08:55:49.046538 setenv fdt_high 0xffffffff
969 08:55:49.047307 Sending with 10 millisecond of delay
971 08:55:49.339355 => dhcp
972 08:55:49.350230 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 08:55:49.351175 dhcp
974 08:55:49.351677 Speed: 1000, full duplex
975 08:55:49.352181 BOOTP broadcast 1
976 08:55:49.358343 DHCP client bound to address 192.168.6.27 (8 ms)
977 08:55:49.359122 Sending with 10 millisecond of delay
979 08:55:51.035921 => setenv serverip 192.168.6.2
980 08:55:51.046831 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 08:55:51.047835 setenv serverip 192.168.6.2
982 08:55:51.048623 Sending with 10 millisecond of delay
984 08:55:54.773167 => tftpboot 0x01080000 944970/tftp-deploy-n27ayial/kernel/uImage
985 08:55:54.784039 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 08:55:54.785079 tftpboot 0x01080000 944970/tftp-deploy-n27ayial/kernel/uImage
987 08:55:54.785577 Speed: 1000, full duplex
988 08:55:54.786034 Using ethernet@ff3f0000 device
989 08:55:54.786810 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 08:55:54.792189 Filename '944970/tftp-deploy-n27ayial/kernel/uImage'.
991 08:55:54.796110 Load address: 0x1080000
992 08:55:57.786310 Loading: *################################################## 43.9 MiB
993 08:55:57.786689 14.7 MiB/s
994 08:55:57.787109 done
995 08:55:57.790744 Bytes transferred = 46041664 (2be8a40 hex)
996 08:55:57.791586 Sending with 10 millisecond of delay
998 08:56:02.477866 => tftpboot 0x08000000 944970/tftp-deploy-n27ayial/ramdisk/ramdisk.cpio.gz.uboot
999 08:56:02.488845 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 08:56:02.489651 tftpboot 0x08000000 944970/tftp-deploy-n27ayial/ramdisk/ramdisk.cpio.gz.uboot
1001 08:56:02.489937 Speed: 1000, full duplex
1002 08:56:02.490203 Using ethernet@ff3f0000 device
1003 08:56:02.491485 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 08:56:02.503237 Filename '944970/tftp-deploy-n27ayial/ramdisk/ramdisk.cpio.gz.uboot'.
1005 08:56:02.503655 Load address: 0x8000000
1006 08:56:09.267837 Loading: *############T ##################################### UDP wrong checksum 00000005 00007b06
1007 08:56:13.324796 UDP wrong checksum 000000ff 0000c4bc
1008 08:56:13.377455 UDP wrong checksum 000000ff 000055af
1009 08:56:14.270642 T UDP wrong checksum 00000005 00007b06
1010 08:56:16.476753 UDP wrong checksum 000000ff 00003166
1011 08:56:16.496224 UDP wrong checksum 000000ff 0000ba58
1012 08:56:24.272634 T T UDP wrong checksum 00000005 00007b06
1013 08:56:32.325619 T UDP wrong checksum 000000ff 0000ef84
1014 08:56:32.368066 UDP wrong checksum 000000ff 00007a77
1015 08:56:44.275286 T T T UDP wrong checksum 00000005 00007b06
1016 08:56:53.546185 T UDP wrong checksum 000000ff 0000d89f
1017 08:56:53.566176 UDP wrong checksum 000000ff 00006f92
1018 08:56:59.279878 T
1019 08:56:59.280339 Retry count exceeded; starting again
1021 08:56:59.281222 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1024 08:56:59.282158 end: 2.4 uboot-commands (duration 00:01:47) [common]
1026 08:56:59.282869 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1028 08:56:59.283423 end: 2 uboot-action (duration 00:01:47) [common]
1030 08:56:59.284324 Cleaning after the job
1031 08:56:59.284665 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/ramdisk
1032 08:56:59.285613 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/kernel
1033 08:56:59.289642 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/dtb
1034 08:56:59.290375 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/nfsrootfs
1035 08:56:59.314913 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/944970/tftp-deploy-n27ayial/modules
1036 08:56:59.322355 start: 4.1 power-off (timeout 00:00:30) [common]
1037 08:56:59.322967 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1038 08:56:59.355651 >> OK - accepted request
1039 08:56:59.357758 Returned 0 in 0 seconds
1040 08:56:59.458502 end: 4.1 power-off (duration 00:00:00) [common]
1042 08:56:59.459506 start: 4.2 read-feedback (timeout 00:10:00) [common]
1043 08:56:59.460198 Listened to connection for namespace 'common' for up to 1s
1044 08:57:00.461058 Finalising connection for namespace 'common'
1045 08:57:00.461533 Disconnecting from shell: Finalise
1046 08:57:00.461824 =>
1047 08:57:00.562410 end: 4.2 read-feedback (duration 00:00:01) [common]
1048 08:57:00.562790 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/944970
1049 08:57:02.175735 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/944970
1050 08:57:02.176375 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.