Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 14:57:54.989214 lava-dispatcher, installed at version: 2024.01
2 14:57:54.990050 start: 0 validate
3 14:57:54.990518 Start time: 2024-11-07 14:57:54.990486+00:00 (UTC)
4 14:57:54.991050 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 14:57:54.991555 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 14:57:55.032423 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 14:57:55.033003 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 14:57:55.064299 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 14:57:55.064908 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 14:57:55.095321 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 14:57:55.096084 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 14:57:55.126453 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 14:57:55.126918 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
14 14:57:55.164152 validate duration: 0.17
16 14:57:55.165007 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 14:57:55.165359 start: 1.1 download-retry (timeout 00:10:00) [common]
18 14:57:55.165684 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 14:57:55.166289 Not decompressing ramdisk as can be used compressed.
20 14:57:55.166760 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 14:57:55.167047 saving as /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/ramdisk/initrd.cpio.gz
22 14:57:55.167343 total size: 5628182 (5 MB)
23 14:57:55.202559 progress 0 % (0 MB)
24 14:57:55.210119 progress 5 % (0 MB)
25 14:57:55.218051 progress 10 % (0 MB)
26 14:57:55.222698 progress 15 % (0 MB)
27 14:57:55.226772 progress 20 % (1 MB)
28 14:57:55.230432 progress 25 % (1 MB)
29 14:57:55.234435 progress 30 % (1 MB)
30 14:57:55.238470 progress 35 % (1 MB)
31 14:57:55.242143 progress 40 % (2 MB)
32 14:57:55.246164 progress 45 % (2 MB)
33 14:57:55.249785 progress 50 % (2 MB)
34 14:57:55.253877 progress 55 % (2 MB)
35 14:57:55.257943 progress 60 % (3 MB)
36 14:57:55.261668 progress 65 % (3 MB)
37 14:57:55.265911 progress 70 % (3 MB)
38 14:57:55.269578 progress 75 % (4 MB)
39 14:57:55.273772 progress 80 % (4 MB)
40 14:57:55.279054 progress 85 % (4 MB)
41 14:57:55.283687 progress 90 % (4 MB)
42 14:57:55.287795 progress 95 % (5 MB)
43 14:57:55.291186 progress 100 % (5 MB)
44 14:57:55.291851 5 MB downloaded in 0.12 s (43.12 MB/s)
45 14:57:55.292446 end: 1.1.1 http-download (duration 00:00:00) [common]
47 14:57:55.293353 end: 1.1 download-retry (duration 00:00:00) [common]
48 14:57:55.293647 start: 1.2 download-retry (timeout 00:10:00) [common]
49 14:57:55.293918 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 14:57:55.294396 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/kernel/Image
51 14:57:55.294647 saving as /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/kernel/Image
52 14:57:55.294860 total size: 44546056 (42 MB)
53 14:57:55.295071 No compression specified
54 14:57:55.331516 progress 0 % (0 MB)
55 14:57:55.359092 progress 5 % (2 MB)
56 14:57:55.388455 progress 10 % (4 MB)
57 14:57:55.416726 progress 15 % (6 MB)
58 14:57:55.444763 progress 20 % (8 MB)
59 14:57:55.473082 progress 25 % (10 MB)
60 14:57:55.500770 progress 30 % (12 MB)
61 14:57:55.531633 progress 35 % (14 MB)
62 14:57:55.559707 progress 40 % (17 MB)
63 14:57:55.587940 progress 45 % (19 MB)
64 14:57:55.616396 progress 50 % (21 MB)
65 14:57:55.643965 progress 55 % (23 MB)
66 14:57:55.673800 progress 60 % (25 MB)
67 14:57:55.701845 progress 65 % (27 MB)
68 14:57:55.729487 progress 70 % (29 MB)
69 14:57:55.757684 progress 75 % (31 MB)
70 14:57:55.785449 progress 80 % (34 MB)
71 14:57:55.813822 progress 85 % (36 MB)
72 14:57:55.843565 progress 90 % (38 MB)
73 14:57:55.872239 progress 95 % (40 MB)
74 14:57:55.900711 progress 100 % (42 MB)
75 14:57:55.901364 42 MB downloaded in 0.61 s (70.05 MB/s)
76 14:57:55.901868 end: 1.2.1 http-download (duration 00:00:01) [common]
78 14:57:55.902708 end: 1.2 download-retry (duration 00:00:01) [common]
79 14:57:55.902988 start: 1.3 download-retry (timeout 00:09:59) [common]
80 14:57:55.903257 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 14:57:55.903723 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 14:57:55.904030 saving as /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 14:57:55.904247 total size: 53209 (0 MB)
84 14:57:55.904458 No compression specified
85 14:57:55.949415 progress 61 % (0 MB)
86 14:57:55.950264 progress 100 % (0 MB)
87 14:57:55.950797 0 MB downloaded in 0.05 s (1.09 MB/s)
88 14:57:55.951273 end: 1.3.1 http-download (duration 00:00:00) [common]
90 14:57:55.952168 end: 1.3 download-retry (duration 00:00:00) [common]
91 14:57:55.952450 start: 1.4 download-retry (timeout 00:09:59) [common]
92 14:57:55.952719 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 14:57:55.953193 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 14:57:55.953449 saving as /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/nfsrootfs/full.rootfs.tar
95 14:57:55.953661 total size: 107552908 (102 MB)
96 14:57:55.953881 Using unxz to decompress xz
97 14:57:55.994373 progress 0 % (0 MB)
98 14:57:56.655709 progress 5 % (5 MB)
99 14:57:57.388806 progress 10 % (10 MB)
100 14:57:58.109507 progress 15 % (15 MB)
101 14:57:58.859467 progress 20 % (20 MB)
102 14:57:59.443175 progress 25 % (25 MB)
103 14:58:00.066139 progress 30 % (30 MB)
104 14:58:00.798291 progress 35 % (35 MB)
105 14:58:01.142065 progress 40 % (41 MB)
106 14:58:01.566166 progress 45 % (46 MB)
107 14:58:02.258580 progress 50 % (51 MB)
108 14:58:02.945485 progress 55 % (56 MB)
109 14:58:03.700692 progress 60 % (61 MB)
110 14:58:04.457833 progress 65 % (66 MB)
111 14:58:05.188948 progress 70 % (71 MB)
112 14:58:06.049817 progress 75 % (76 MB)
113 14:58:06.905033 progress 80 % (82 MB)
114 14:58:07.670416 progress 85 % (87 MB)
115 14:58:08.413061 progress 90 % (92 MB)
116 14:58:09.125417 progress 95 % (97 MB)
117 14:58:09.886983 progress 100 % (102 MB)
118 14:58:09.899830 102 MB downloaded in 13.95 s (7.35 MB/s)
119 14:58:09.900760 end: 1.4.1 http-download (duration 00:00:14) [common]
121 14:58:09.902405 end: 1.4 download-retry (duration 00:00:14) [common]
122 14:58:09.902935 start: 1.5 download-retry (timeout 00:09:45) [common]
123 14:58:09.903457 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 14:58:09.904377 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/modules.tar.xz
125 14:58:09.904857 saving as /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/modules/modules.tar
126 14:58:09.905275 total size: 11532804 (10 MB)
127 14:58:09.905703 Using unxz to decompress xz
128 14:58:09.948741 progress 0 % (0 MB)
129 14:58:10.017099 progress 5 % (0 MB)
130 14:58:10.094086 progress 10 % (1 MB)
131 14:58:10.188278 progress 15 % (1 MB)
132 14:58:10.288018 progress 20 % (2 MB)
133 14:58:10.366324 progress 25 % (2 MB)
134 14:58:10.443311 progress 30 % (3 MB)
135 14:58:10.522490 progress 35 % (3 MB)
136 14:58:10.596528 progress 40 % (4 MB)
137 14:58:10.673180 progress 45 % (4 MB)
138 14:58:10.755266 progress 50 % (5 MB)
139 14:58:10.838359 progress 55 % (6 MB)
140 14:58:10.926151 progress 60 % (6 MB)
141 14:58:11.003266 progress 65 % (7 MB)
142 14:58:11.086030 progress 70 % (7 MB)
143 14:58:11.164870 progress 75 % (8 MB)
144 14:58:11.249137 progress 80 % (8 MB)
145 14:58:11.330184 progress 85 % (9 MB)
146 14:58:11.410298 progress 90 % (9 MB)
147 14:58:11.489159 progress 95 % (10 MB)
148 14:58:11.562405 progress 100 % (10 MB)
149 14:58:11.578172 10 MB downloaded in 1.67 s (6.57 MB/s)
150 14:58:11.578782 end: 1.5.1 http-download (duration 00:00:02) [common]
152 14:58:11.579600 end: 1.5 download-retry (duration 00:00:02) [common]
153 14:58:11.579867 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 14:58:11.580368 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 14:58:21.287586 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953111/extract-nfsrootfs-9tlb13my
156 14:58:21.288211 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 14:58:21.288509 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 14:58:21.289143 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m
159 14:58:21.289579 makedir: /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin
160 14:58:21.289911 makedir: /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/tests
161 14:58:21.290233 makedir: /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/results
162 14:58:21.290580 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-add-keys
163 14:58:21.291145 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-add-sources
164 14:58:21.291667 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-background-process-start
165 14:58:21.292203 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-background-process-stop
166 14:58:21.292767 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-common-functions
167 14:58:21.293293 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-echo-ipv4
168 14:58:21.293782 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-install-packages
169 14:58:21.294268 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-installed-packages
170 14:58:21.294749 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-os-build
171 14:58:21.295231 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-probe-channel
172 14:58:21.295715 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-probe-ip
173 14:58:21.296232 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-target-ip
174 14:58:21.296735 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-target-mac
175 14:58:21.297245 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-target-storage
176 14:58:21.297737 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-test-case
177 14:58:21.298224 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-test-event
178 14:58:21.298699 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-test-feedback
179 14:58:21.299178 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-test-raise
180 14:58:21.299652 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-test-reference
181 14:58:21.300187 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-test-runner
182 14:58:21.300709 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-test-set
183 14:58:21.301208 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-test-shell
184 14:58:21.301707 Updating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-install-packages (oe)
185 14:58:21.302242 Updating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/bin/lava-installed-packages (oe)
186 14:58:21.302756 Creating /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/environment
187 14:58:21.303152 LAVA metadata
188 14:58:21.303418 - LAVA_JOB_ID=953111
189 14:58:21.303635 - LAVA_DISPATCHER_IP=192.168.6.2
190 14:58:21.304015 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 14:58:21.304967 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 14:58:21.305279 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 14:58:21.305490 skipped lava-vland-overlay
194 14:58:21.305733 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 14:58:21.305991 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 14:58:21.306209 skipped lava-multinode-overlay
197 14:58:21.306452 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 14:58:21.306705 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 14:58:21.306956 Loading test definitions
200 14:58:21.307234 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 14:58:21.307459 Using /lava-953111 at stage 0
202 14:58:21.308673 uuid=953111_1.6.2.4.1 testdef=None
203 14:58:21.308988 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 14:58:21.309255 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 14:58:21.311035 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 14:58:21.311820 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 14:58:21.314107 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 14:58:21.314931 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 14:58:21.317112 runner path: /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/0/tests/0_dmesg test_uuid 953111_1.6.2.4.1
212 14:58:21.317662 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 14:58:21.318415 Creating lava-test-runner.conf files
215 14:58:21.318619 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953111/lava-overlay-uq11er6m/lava-953111/0 for stage 0
216 14:58:21.318952 - 0_dmesg
217 14:58:21.319288 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 14:58:21.319563 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 14:58:21.340862 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 14:58:21.341214 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 14:58:21.341479 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 14:58:21.341742 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 14:58:21.342004 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 14:58:21.961877 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 14:58:21.962343 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 14:58:21.962618 extracting modules file /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953111/extract-nfsrootfs-9tlb13my
227 14:58:23.318679 extracting modules file /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953111/extract-overlay-ramdisk-y8p5e4z4/ramdisk
228 14:58:24.720778 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 14:58:24.721273 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 14:58:24.721552 [common] Applying overlay to NFS
231 14:58:24.721769 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953111/compress-overlay-xtgc_ykq/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953111/extract-nfsrootfs-9tlb13my
232 14:58:24.751079 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 14:58:24.751450 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 14:58:24.751725 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 14:58:24.751953 Converting downloaded kernel to a uImage
236 14:58:24.752292 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/kernel/Image /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/kernel/uImage
237 14:58:25.285823 output: Image Name:
238 14:58:25.286243 output: Created: Thu Nov 7 14:58:24 2024
239 14:58:25.286453 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 14:58:25.286659 output: Data Size: 44546056 Bytes = 43502.01 KiB = 42.48 MiB
241 14:58:25.286863 output: Load Address: 01080000
242 14:58:25.287064 output: Entry Point: 01080000
243 14:58:25.287263 output:
244 14:58:25.287600 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 14:58:25.287868 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 14:58:25.288183 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 14:58:25.288445 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 14:58:25.288704 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 14:58:25.288959 Building ramdisk /var/lib/lava/dispatcher/tmp/953111/extract-overlay-ramdisk-y8p5e4z4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953111/extract-overlay-ramdisk-y8p5e4z4/ramdisk
250 14:58:27.443055 >> 166417 blocks
251 14:58:36.007735 Adding RAMdisk u-boot header.
252 14:58:36.008461 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953111/extract-overlay-ramdisk-y8p5e4z4/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953111/extract-overlay-ramdisk-y8p5e4z4/ramdisk.cpio.gz.uboot
253 14:58:36.258732 output: Image Name:
254 14:58:36.259143 output: Created: Thu Nov 7 14:58:36 2024
255 14:58:36.259676 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 14:58:36.260203 output: Data Size: 23705943 Bytes = 23150.33 KiB = 22.61 MiB
257 14:58:36.260667 output: Load Address: 00000000
258 14:58:36.261115 output: Entry Point: 00000000
259 14:58:36.261554 output:
260 14:58:36.262778 rename /var/lib/lava/dispatcher/tmp/953111/extract-overlay-ramdisk-y8p5e4z4/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/ramdisk/ramdisk.cpio.gz.uboot
261 14:58:36.263566 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 14:58:36.264216 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 14:58:36.264852 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 14:58:36.265385 No LXC device requested
265 14:58:36.265948 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 14:58:36.266517 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 14:58:36.267073 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 14:58:36.267536 Checking files for TFTP limit of 4294967296 bytes.
269 14:58:36.270480 end: 1 tftp-deploy (duration 00:00:41) [common]
270 14:58:36.271115 start: 2 uboot-action (timeout 00:05:00) [common]
271 14:58:36.271706 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 14:58:36.272317 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 14:58:36.272884 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 14:58:36.273470 Using kernel file from prepare-kernel: 953111/tftp-deploy-ba8digsk/kernel/uImage
275 14:58:36.274170 substitutions:
276 14:58:36.274620 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 14:58:36.275074 - {DTB_ADDR}: 0x01070000
278 14:58:36.275520 - {DTB}: 953111/tftp-deploy-ba8digsk/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 14:58:36.275964 - {INITRD}: 953111/tftp-deploy-ba8digsk/ramdisk/ramdisk.cpio.gz.uboot
280 14:58:36.276444 - {KERNEL_ADDR}: 0x01080000
281 14:58:36.276885 - {KERNEL}: 953111/tftp-deploy-ba8digsk/kernel/uImage
282 14:58:36.277324 - {LAVA_MAC}: None
283 14:58:36.277805 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953111/extract-nfsrootfs-9tlb13my
284 14:58:36.278248 - {NFS_SERVER_IP}: 192.168.6.2
285 14:58:36.278683 - {PRESEED_CONFIG}: None
286 14:58:36.279116 - {PRESEED_LOCAL}: None
287 14:58:36.279548 - {RAMDISK_ADDR}: 0x08000000
288 14:58:36.280003 - {RAMDISK}: 953111/tftp-deploy-ba8digsk/ramdisk/ramdisk.cpio.gz.uboot
289 14:58:36.280456 - {ROOT_PART}: None
290 14:58:36.280896 - {ROOT}: None
291 14:58:36.281333 - {SERVER_IP}: 192.168.6.2
292 14:58:36.281766 - {TEE_ADDR}: 0x83000000
293 14:58:36.282197 - {TEE}: None
294 14:58:36.282629 Parsed boot commands:
295 14:58:36.283053 - setenv autoload no
296 14:58:36.283484 - setenv initrd_high 0xffffffff
297 14:58:36.283916 - setenv fdt_high 0xffffffff
298 14:58:36.284413 - dhcp
299 14:58:36.284853 - setenv serverip 192.168.6.2
300 14:58:36.285291 - tftpboot 0x01080000 953111/tftp-deploy-ba8digsk/kernel/uImage
301 14:58:36.285728 - tftpboot 0x08000000 953111/tftp-deploy-ba8digsk/ramdisk/ramdisk.cpio.gz.uboot
302 14:58:36.286163 - tftpboot 0x01070000 953111/tftp-deploy-ba8digsk/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 14:58:36.286599 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953111/extract-nfsrootfs-9tlb13my,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 14:58:36.287047 - bootm 0x01080000 0x08000000 0x01070000
305 14:58:36.287623 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 14:58:36.289345 start: 2.3 connect-device (timeout 00:05:00) [common]
308 14:58:36.289824 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 14:58:36.305747 Setting prompt string to ['lava-test: # ']
310 14:58:36.307374 end: 2.3 connect-device (duration 00:00:00) [common]
311 14:58:36.308110 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 14:58:36.308776 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 14:58:36.309497 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 14:58:36.310777 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 14:58:36.345621 >> OK - accepted request
316 14:58:36.347767 Returned 0 in 0 seconds
317 14:58:36.448999 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 14:58:36.450754 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 14:58:36.451398 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 14:58:36.452041 Setting prompt string to ['Hit any key to stop autoboot']
322 14:58:36.452586 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 14:58:36.454301 Trying 192.168.56.21...
324 14:58:36.454834 Connected to conserv1.
325 14:58:36.455313 Escape character is '^]'.
326 14:58:36.455788
327 14:58:36.456325 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 14:58:36.456814
329 14:58:43.793383 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 14:58:43.794065 bl2_stage_init 0x01
331 14:58:43.794528 bl2_stage_init 0x81
332 14:58:43.798809 hw id: 0x0000 - pwm id 0x01
333 14:58:43.799309 bl2_stage_init 0xc1
334 14:58:43.802927 bl2_stage_init 0x02
335 14:58:43.803398
336 14:58:43.803861 L0:00000000
337 14:58:43.804351 L1:00000703
338 14:58:43.804785 L2:00008067
339 14:58:43.808533 L3:15000000
340 14:58:43.809023 S1:00000000
341 14:58:43.809473 B2:20282000
342 14:58:43.809915 B1:a0f83180
343 14:58:43.810347
344 14:58:43.814117 TE: 70359
345 14:58:43.814588
346 14:58:43.819752 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 14:58:43.820289
348 14:58:43.820734 Board ID = 1
349 14:58:43.821166 Set cpu clk to 24M
350 14:58:43.823136 Set clk81 to 24M
351 14:58:43.823600 Use GP1_pll as DSU clk.
352 14:58:43.828647 DSU clk: 1200 Mhz
353 14:58:43.829126 CPU clk: 1200 MHz
354 14:58:43.829559 Set clk81 to 166.6M
355 14:58:43.834234 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 14:58:43.839856 board id: 1
357 14:58:43.844254 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 14:58:43.856182 fw parse done
359 14:58:43.861512 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 14:58:43.904374 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 14:58:43.916399 PIEI prepare done
362 14:58:43.916940 fastboot data load
363 14:58:43.917383 fastboot data verify
364 14:58:43.922082 verify result: 266
365 14:58:43.927650 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 14:58:43.928256 LPDDR4 probe
367 14:58:43.928716 ddr clk to 1584MHz
368 14:58:43.934613 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 14:58:43.973504
370 14:58:43.974124 dmc_version 0001
371 14:58:43.979413 Check phy result
372 14:58:43.986431 INFO : End of CA training
373 14:58:43.986993 INFO : End of initialization
374 14:58:43.991953 INFO : Training has run successfully!
375 14:58:43.992580 Check phy result
376 14:58:43.997638 INFO : End of initialization
377 14:58:43.998242 INFO : End of read enable training
378 14:58:44.003133 INFO : End of fine write leveling
379 14:58:44.008672 INFO : End of Write leveling coarse delay
380 14:58:44.009183 INFO : Training has run successfully!
381 14:58:44.009625 Check phy result
382 14:58:44.014272 INFO : End of initialization
383 14:58:44.014739 INFO : End of read dq deskew training
384 14:58:44.020013 INFO : End of MPR read delay center optimization
385 14:58:44.025577 INFO : End of write delay center optimization
386 14:58:44.031264 INFO : End of read delay center optimization
387 14:58:44.031803 INFO : End of max read latency training
388 14:58:44.036708 INFO : Training has run successfully!
389 14:58:44.037217 1D training succeed
390 14:58:44.045877 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 14:58:44.093482 Check phy result
392 14:58:44.094007 INFO : End of initialization
393 14:58:44.120597 INFO : End of 2D read delay Voltage center optimization
394 14:58:44.144780 INFO : End of 2D read delay Voltage center optimization
395 14:58:44.201737 INFO : End of 2D write delay Voltage center optimization
396 14:58:44.256428 INFO : End of 2D write delay Voltage center optimization
397 14:58:44.262101 INFO : Training has run successfully!
398 14:58:44.262580
399 14:58:44.263023 channel==0
400 14:58:44.267624 RxClkDly_Margin_A0==88 ps 9
401 14:58:44.268129 TxDqDly_Margin_A0==98 ps 10
402 14:58:44.273249 RxClkDly_Margin_A1==88 ps 9
403 14:58:44.273708 TxDqDly_Margin_A1==88 ps 9
404 14:58:44.274151 TrainedVREFDQ_A0==74
405 14:58:44.278788 TrainedVREFDQ_A1==74
406 14:58:44.279259 VrefDac_Margin_A0==24
407 14:58:44.279691 DeviceVref_Margin_A0==40
408 14:58:44.284394 VrefDac_Margin_A1==23
409 14:58:44.284900 DeviceVref_Margin_A1==40
410 14:58:44.285335
411 14:58:44.285771
412 14:58:44.286203 channel==1
413 14:58:44.290004 RxClkDly_Margin_A0==78 ps 8
414 14:58:44.290502 TxDqDly_Margin_A0==98 ps 10
415 14:58:44.295581 RxClkDly_Margin_A1==78 ps 8
416 14:58:44.296079 TxDqDly_Margin_A1==88 ps 9
417 14:58:44.301255 TrainedVREFDQ_A0==78
418 14:58:44.301726 TrainedVREFDQ_A1==75
419 14:58:44.302162 VrefDac_Margin_A0==22
420 14:58:44.306948 DeviceVref_Margin_A0==36
421 14:58:44.307410 VrefDac_Margin_A1==22
422 14:58:44.312410 DeviceVref_Margin_A1==39
423 14:58:44.312868
424 14:58:44.313302 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 14:58:44.313734
426 14:58:44.346008 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 14:58:44.346588 2D training succeed
428 14:58:44.351594 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 14:58:44.357257 auto size-- 65535DDR cs0 size: 2048MB
430 14:58:44.357726 DDR cs1 size: 2048MB
431 14:58:44.362892 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 14:58:44.363353 cs0 DataBus test pass
433 14:58:44.368404 cs1 DataBus test pass
434 14:58:44.368860 cs0 AddrBus test pass
435 14:58:44.369294 cs1 AddrBus test pass
436 14:58:44.369722
437 14:58:44.374003 100bdlr_step_size ps== 478
438 14:58:44.374463 result report
439 14:58:44.379613 boot times 0Enable ddr reg access
440 14:58:44.384800 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 14:58:44.398628 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 14:58:45.059057 bl2z: ptr: 05129330, size: 00001e40
443 14:58:45.067421 0.0;M3 CHK:0;cm4_sp_mode 0
444 14:58:45.067971 MVN_1=0x00000000
445 14:58:45.068459 MVN_2=0x00000000
446 14:58:45.078768 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 14:58:45.079250 OPS=0x04
448 14:58:45.079692 ring efuse init
449 14:58:45.084393 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 14:58:45.084874 [0.017354 Inits done]
451 14:58:45.085307 secure task start!
452 14:58:45.092304 high task start!
453 14:58:45.092768 low task start!
454 14:58:45.093200 run into bl31
455 14:58:45.100973 NOTICE: BL31: v1.3(release):4fc40b1
456 14:58:45.108686 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 14:58:45.109198 NOTICE: BL31: G12A normal boot!
458 14:58:45.124205 NOTICE: BL31: BL33 decompress pass
459 14:58:45.129890 ERROR: Error initializing runtime service opteed_fast
460 14:58:47.842382 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 14:58:47.843028 bl2_stage_init 0x01
462 14:58:47.843503 bl2_stage_init 0x81
463 14:58:47.847949 hw id: 0x0000 - pwm id 0x01
464 14:58:47.848501 bl2_stage_init 0xc1
465 14:58:47.853714 bl2_stage_init 0x02
466 14:58:47.854240
467 14:58:47.854684 L0:00000000
468 14:58:47.855116 L1:00000703
469 14:58:47.855548 L2:00008067
470 14:58:47.855970 L3:15000000
471 14:58:47.859262 S1:00000000
472 14:58:47.859713 B2:20282000
473 14:58:47.860201 B1:a0f83180
474 14:58:47.860627
475 14:58:47.861049 TE: 69443
476 14:58:47.861473
477 14:58:47.864862 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 14:58:47.865334
479 14:58:47.870493 Board ID = 1
480 14:58:47.870951 Set cpu clk to 24M
481 14:58:47.871376 Set clk81 to 24M
482 14:58:47.875926 Use GP1_pll as DSU clk.
483 14:58:47.876415 DSU clk: 1200 Mhz
484 14:58:47.876845 CPU clk: 1200 MHz
485 14:58:47.881782 Set clk81 to 166.6M
486 14:58:47.887326 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 14:58:47.887814 board id: 1
488 14:58:47.894315 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 14:58:47.905205 fw parse done
490 14:58:47.911166 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 14:58:47.954302 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 14:58:47.965411 PIEI prepare done
493 14:58:47.965894 fastboot data load
494 14:58:47.966324 fastboot data verify
495 14:58:47.971017 verify result: 266
496 14:58:47.976605 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 14:58:47.977060 LPDDR4 probe
498 14:58:47.977485 ddr clk to 1584MHz
499 14:58:47.984585 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 14:58:48.022379
501 14:58:48.022907 dmc_version 0001
502 14:58:48.029443 Check phy result
503 14:58:48.035418 INFO : End of CA training
504 14:58:48.035902 INFO : End of initialization
505 14:58:48.041042 INFO : Training has run successfully!
506 14:58:48.041522 Check phy result
507 14:58:48.046620 INFO : End of initialization
508 14:58:48.047084 INFO : End of read enable training
509 14:58:48.049929 INFO : End of fine write leveling
510 14:58:48.055456 INFO : End of Write leveling coarse delay
511 14:58:48.061036 INFO : Training has run successfully!
512 14:58:48.061501 Check phy result
513 14:58:48.061945 INFO : End of initialization
514 14:58:48.066617 INFO : End of read dq deskew training
515 14:58:48.070149 INFO : End of MPR read delay center optimization
516 14:58:48.075838 INFO : End of write delay center optimization
517 14:58:48.081304 INFO : End of read delay center optimization
518 14:58:48.081773 INFO : End of max read latency training
519 14:58:48.086925 INFO : Training has run successfully!
520 14:58:48.087390 1D training succeed
521 14:58:48.095007 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 14:58:48.143162 Check phy result
523 14:58:48.143650 INFO : End of initialization
524 14:58:48.170520 INFO : End of 2D read delay Voltage center optimization
525 14:58:48.194642 INFO : End of 2D read delay Voltage center optimization
526 14:58:48.251322 INFO : End of 2D write delay Voltage center optimization
527 14:58:48.305302 INFO : End of 2D write delay Voltage center optimization
528 14:58:48.310878 INFO : Training has run successfully!
529 14:58:48.311344
530 14:58:48.311791 channel==0
531 14:58:48.316462 RxClkDly_Margin_A0==88 ps 9
532 14:58:48.316930 TxDqDly_Margin_A0==98 ps 10
533 14:58:48.322055 RxClkDly_Margin_A1==88 ps 9
534 14:58:48.322519 TxDqDly_Margin_A1==98 ps 10
535 14:58:48.322967 TrainedVREFDQ_A0==74
536 14:58:48.327801 TrainedVREFDQ_A1==74
537 14:58:48.328313 VrefDac_Margin_A0==23
538 14:58:48.328758 DeviceVref_Margin_A0==40
539 14:58:48.333288 VrefDac_Margin_A1==23
540 14:58:48.333752 DeviceVref_Margin_A1==40
541 14:58:48.334194
542 14:58:48.334634
543 14:58:48.338874 channel==1
544 14:58:48.339349 RxClkDly_Margin_A0==78 ps 8
545 14:58:48.339792 TxDqDly_Margin_A0==88 ps 9
546 14:58:48.344429 RxClkDly_Margin_A1==78 ps 8
547 14:58:48.344893 TxDqDly_Margin_A1==78 ps 8
548 14:58:48.350046 TrainedVREFDQ_A0==75
549 14:58:48.350525 TrainedVREFDQ_A1==75
550 14:58:48.350970 VrefDac_Margin_A0==22
551 14:58:48.355784 DeviceVref_Margin_A0==39
552 14:58:48.356287 VrefDac_Margin_A1==22
553 14:58:48.361304 DeviceVref_Margin_A1==39
554 14:58:48.361769
555 14:58:48.362211 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 14:58:48.362646
557 14:58:48.394838 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 14:58:48.395401 2D training succeed
559 14:58:48.400460 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 14:58:48.406070 auto size-- 65535DDR cs0 size: 2048MB
561 14:58:48.406545 DDR cs1 size: 2048MB
562 14:58:48.411908 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 14:58:48.412421 cs0 DataBus test pass
564 14:58:48.417386 cs1 DataBus test pass
565 14:58:48.417883 cs0 AddrBus test pass
566 14:58:48.418335 cs1 AddrBus test pass
567 14:58:48.418777
568 14:58:48.422874 100bdlr_step_size ps== 471
569 14:58:48.423355 result report
570 14:58:48.428477 boot times 0Enable ddr reg access
571 14:58:48.433636 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 14:58:48.447495 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 14:58:49.107360 bl2z: ptr: 05129330, size: 00001e40
574 14:58:49.115587 0.0;M3 CHK:0;cm4_sp_mode 0
575 14:58:49.116137 MVN_1=0x00000000
576 14:58:49.116598 MVN_2=0x00000000
577 14:58:49.127060 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 14:58:49.127546 OPS=0x04
579 14:58:49.128034 ring efuse init
580 14:58:49.129967 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 14:58:49.136268 [0.017354 Inits done]
582 14:58:49.136745 secure task start!
583 14:58:49.137198 high task start!
584 14:58:49.137640 low task start!
585 14:58:49.140583 run into bl31
586 14:58:49.149189 NOTICE: BL31: v1.3(release):4fc40b1
587 14:58:49.157015 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 14:58:49.157495 NOTICE: BL31: G12A normal boot!
589 14:58:49.172555 NOTICE: BL31: BL33 decompress pass
590 14:58:49.178251 ERROR: Error initializing runtime service opteed_fast
591 14:58:50.544136 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 14:58:50.544784 bl2_stage_init 0x01
593 14:58:50.545251 bl2_stage_init 0x81
594 14:58:50.549642 hw id: 0x0000 - pwm id 0x01
595 14:58:50.550133 bl2_stage_init 0xc1
596 14:58:50.550588 bl2_stage_init 0x02
597 14:58:50.551036
598 14:58:50.555211 L0:00000000
599 14:58:50.555690 L1:00000703
600 14:58:50.556183 L2:00008067
601 14:58:50.556631 L3:15000000
602 14:58:50.557070 S1:00000000
603 14:58:50.560851 B2:20282000
604 14:58:50.561328 B1:a0f83180
605 14:58:50.561774
606 14:58:50.562212 TE: 70050
607 14:58:50.562656
608 14:58:50.566436 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 14:58:50.566939
610 14:58:50.572121 Board ID = 1
611 14:58:50.572603 Set cpu clk to 24M
612 14:58:50.573050 Set clk81 to 24M
613 14:58:50.577620 Use GP1_pll as DSU clk.
614 14:58:50.578096 DSU clk: 1200 Mhz
615 14:58:50.578546 CPU clk: 1200 MHz
616 14:58:50.578984 Set clk81 to 166.6M
617 14:58:50.588850 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 14:58:50.589343 board id: 1
619 14:58:50.594327 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 14:58:50.605902 fw parse done
621 14:58:50.611853 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 14:58:50.654548 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 14:58:50.665410 PIEI prepare done
624 14:58:50.665905 fastboot data load
625 14:58:50.666362 fastboot data verify
626 14:58:50.671106 verify result: 266
627 14:58:50.676614 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 14:58:50.677088 LPDDR4 probe
629 14:58:50.677535 ddr clk to 1584MHz
630 14:58:50.684574 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 14:58:50.721815
632 14:58:50.722311 dmc_version 0001
633 14:58:50.728492 Check phy result
634 14:58:50.734420 INFO : End of CA training
635 14:58:50.734891 INFO : End of initialization
636 14:58:50.740136 INFO : Training has run successfully!
637 14:58:50.740614 Check phy result
638 14:58:50.745618 INFO : End of initialization
639 14:58:50.746085 INFO : End of read enable training
640 14:58:50.751233 INFO : End of fine write leveling
641 14:58:50.756824 INFO : End of Write leveling coarse delay
642 14:58:50.757298 INFO : Training has run successfully!
643 14:58:50.757744 Check phy result
644 14:58:50.762413 INFO : End of initialization
645 14:58:50.762881 INFO : End of read dq deskew training
646 14:58:50.768141 INFO : End of MPR read delay center optimization
647 14:58:50.773619 INFO : End of write delay center optimization
648 14:58:50.779222 INFO : End of read delay center optimization
649 14:58:50.779705 INFO : End of max read latency training
650 14:58:50.784804 INFO : Training has run successfully!
651 14:58:50.785274 1D training succeed
652 14:58:50.793989 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 14:58:50.841566 Check phy result
654 14:58:50.842058 INFO : End of initialization
655 14:58:50.863931 INFO : End of 2D read delay Voltage center optimization
656 14:58:50.882309 INFO : End of 2D read delay Voltage center optimization
657 14:58:50.935101 INFO : End of 2D write delay Voltage center optimization
658 14:58:50.984302 INFO : End of 2D write delay Voltage center optimization
659 14:58:50.989801 INFO : Training has run successfully!
660 14:58:50.990273
661 14:58:50.990720 channel==0
662 14:58:50.995339 RxClkDly_Margin_A0==78 ps 8
663 14:58:50.995806 TxDqDly_Margin_A0==88 ps 9
664 14:58:51.000994 RxClkDly_Margin_A1==69 ps 7
665 14:58:51.001469 TxDqDly_Margin_A1==98 ps 10
666 14:58:51.001918 TrainedVREFDQ_A0==74
667 14:58:51.006529 TrainedVREFDQ_A1==74
668 14:58:51.006999 VrefDac_Margin_A0==23
669 14:58:51.007443 DeviceVref_Margin_A0==40
670 14:58:51.012196 VrefDac_Margin_A1==23
671 14:58:51.012666 DeviceVref_Margin_A1==40
672 14:58:51.013112
673 14:58:51.013550
674 14:58:51.013986 channel==1
675 14:58:51.017805 RxClkDly_Margin_A0==78 ps 8
676 14:58:51.018291 TxDqDly_Margin_A0==88 ps 9
677 14:58:51.023345 RxClkDly_Margin_A1==78 ps 8
678 14:58:51.023836 TxDqDly_Margin_A1==88 ps 9
679 14:58:51.028907 TrainedVREFDQ_A0==78
680 14:58:51.029394 TrainedVREFDQ_A1==77
681 14:58:51.029841 VrefDac_Margin_A0==22
682 14:58:51.034528 DeviceVref_Margin_A0==36
683 14:58:51.034999 VrefDac_Margin_A1==22
684 14:58:51.035446 DeviceVref_Margin_A1==37
685 14:58:51.040206
686 14:58:51.040692 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 14:58:51.041140
688 14:58:51.073801 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 14:58:51.074312 2D training succeed
690 14:58:51.079348 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 14:58:51.084946 auto size-- 65535DDR cs0 size: 2048MB
692 14:58:51.085419 DDR cs1 size: 2048MB
693 14:58:51.090547 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 14:58:51.091021 cs0 DataBus test pass
695 14:58:51.096212 cs1 DataBus test pass
696 14:58:51.096684 cs0 AddrBus test pass
697 14:58:51.097127 cs1 AddrBus test pass
698 14:58:51.097565
699 14:58:51.101788 100bdlr_step_size ps== 478
700 14:58:51.102275 result report
701 14:58:51.107346 boot times 0Enable ddr reg access
702 14:58:51.112449 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 14:58:51.126303 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 14:58:51.780641 bl2z: ptr: 05129330, size: 00001e40
705 14:58:51.788301 0.0;M3 CHK:0;cm4_sp_mode 0
706 14:58:51.788799 MVN_1=0x00000000
707 14:58:51.789247 MVN_2=0x00000000
708 14:58:51.799649 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 14:58:51.800188 OPS=0x04
710 14:58:51.800648 ring efuse init
711 14:58:51.805283 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 14:58:51.805769 [0.017319 Inits done]
713 14:58:51.806214 secure task start!
714 14:58:51.812508 high task start!
715 14:58:51.812982 low task start!
716 14:58:51.813427 run into bl31
717 14:58:51.821078 NOTICE: BL31: v1.3(release):4fc40b1
718 14:58:51.828506 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 14:58:51.828989 NOTICE: BL31: G12A normal boot!
720 14:58:51.844415 NOTICE: BL31: BL33 decompress pass
721 14:58:51.849799 ERROR: Error initializing runtime service opteed_fast
722 14:58:52.645525
723 14:58:52.646156
724 14:58:52.650894 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 14:58:52.651412
726 14:58:52.653485 Model: Libre Computer AML-S905D3-CC Solitude
727 14:58:52.800957 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 14:58:52.816027 DRAM: 2 GiB (effective 3.8 GiB)
729 14:58:52.917757 Core: 406 devices, 33 uclasses, devicetree: separate
730 14:58:52.923333 WDT: Not starting watchdog@f0d0
731 14:58:52.948685 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 14:58:52.960981 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 14:58:52.965049 ** Bad device specification mmc 0 **
734 14:58:52.975920 Card did not respond to voltage select! : -110
735 14:58:52.982684 ** Bad device specification mmc 0 **
736 14:58:52.983220 Couldn't find partition mmc 0
737 14:58:52.991915 Card did not respond to voltage select! : -110
738 14:58:52.997454 ** Bad device specification mmc 0 **
739 14:58:52.997982 Couldn't find partition mmc 0
740 14:58:53.002295 Error: could not access storage.
741 14:58:53.298937 Net: eth0: ethernet@ff3f0000
742 14:58:53.299574 starting USB...
743 14:58:53.543680 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 14:58:53.544348 Starting the controller
745 14:58:53.550469 USB XHCI 1.10
746 14:58:55.108087 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 14:58:55.114702 scanning usb for storage devices... 0 Storage Device(s) found
749 14:58:55.166317 Hit any key to stop autoboot: 1
750 14:58:55.167505 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 14:58:55.168183 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 14:58:55.168687 Setting prompt string to ['=>']
753 14:58:55.169184 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 14:58:55.180793 0
755 14:58:55.181742 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 14:58:55.283063 => setenv autoload no
758 14:58:55.284152 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 14:58:55.289186 setenv autoload no
761 14:58:55.390765 => setenv initrd_high 0xffffffff
762 14:58:55.391545 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 14:58:55.396064 setenv initrd_high 0xffffffff
765 14:58:55.498544 => setenv fdt_high 0xffffffff
766 14:58:55.499377 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 14:58:55.503217 setenv fdt_high 0xffffffff
769 14:58:55.604889 => dhcp
770 14:58:55.605634 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 14:58:55.609148 dhcp
772 14:58:56.114473 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 14:58:56.115092 Speed: 1000, full duplex
774 14:58:56.115504 BOOTP broadcast 1
775 14:58:56.125163 DHCP client bound to address 192.168.6.21 (9 ms)
777 14:58:56.226648 => setenv serverip 192.168.6.2
778 14:58:56.227321 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
779 14:58:56.231000 setenv serverip 192.168.6.2
781 14:58:56.332061 => tftpboot 0x01080000 953111/tftp-deploy-ba8digsk/kernel/uImage
782 14:58:56.332599 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
783 14:58:56.339328 tftpboot 0x01080000 953111/tftp-deploy-ba8digsk/kernel/uImage
784 14:58:56.339663 Speed: 1000, full duplex
785 14:58:56.339878 Using ethernet@ff3f0000 device
786 14:58:56.344794 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 14:58:56.350303 Filename '953111/tftp-deploy-ba8digsk/kernel/uImage'.
788 14:58:56.354374 Load address: 0x1080000
789 14:58:59.111842 Loading: *################################################## 42.5 MiB
790 14:58:59.112575 15.4 MiB/s
791 14:58:59.113034 done
792 14:58:59.116177 Bytes transferred = 44546120 (2a7b848 hex)
794 14:58:59.217739 => tftpboot 0x08000000 953111/tftp-deploy-ba8digsk/ramdisk/ramdisk.cpio.gz.uboot
795 14:58:59.218510 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
796 14:58:59.225299 tftpboot 0x08000000 953111/tftp-deploy-ba8digsk/ramdisk/ramdisk.cpio.gz.uboot
797 14:58:59.225801 Speed: 1000, full duplex
798 14:58:59.226244 Using ethernet@ff3f0000 device
799 14:58:59.230760 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 14:58:59.240521 Filename '953111/tftp-deploy-ba8digsk/ramdisk/ramdisk.cpio.gz.uboot'.
801 14:58:59.241049 Load address: 0x8000000
802 14:59:00.773921 Loading: *################################################# UDP wrong checksum 00000005 00009242
803 14:59:05.774684 T UDP wrong checksum 00000005 00009242
804 14:59:15.776543 T T UDP wrong checksum 00000005 00009242
805 14:59:19.954519 UDP wrong checksum 000000ff 000047cd
806 14:59:20.001731 UDP wrong checksum 000000ff 0000d3bf
807 14:59:26.165879 T T UDP wrong checksum 000000ff 0000b1d2
808 14:59:26.245927 UDP wrong checksum 000000ff 00004ac5
809 14:59:35.779252 T UDP wrong checksum 00000005 00009242
810 14:59:43.087449 T T UDP wrong checksum 000000ff 00001f44
811 14:59:43.094768 UDP wrong checksum 000000ff 000077bf
812 14:59:55.786293 T T
813 14:59:55.786952 Retry count exceeded; starting again
815 14:59:55.788607 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
818 14:59:55.790717 end: 2.4 uboot-commands (duration 00:01:19) [common]
820 14:59:55.792331 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
822 14:59:55.793501 end: 2 uboot-action (duration 00:01:20) [common]
824 14:59:55.795222 Cleaning after the job
825 14:59:55.795824 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/ramdisk
826 14:59:55.797191 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/kernel
827 14:59:55.843433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/dtb
828 14:59:55.844226 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/nfsrootfs
829 14:59:56.003278 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953111/tftp-deploy-ba8digsk/modules
830 14:59:56.025716 start: 4.1 power-off (timeout 00:00:30) [common]
831 14:59:56.026405 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
832 14:59:56.060805 >> OK - accepted request
833 14:59:56.062876 Returned 0 in 0 seconds
834 14:59:56.163669 end: 4.1 power-off (duration 00:00:00) [common]
836 14:59:56.164728 start: 4.2 read-feedback (timeout 00:10:00) [common]
837 14:59:56.165406 Listened to connection for namespace 'common' for up to 1s
838 14:59:57.166338 Finalising connection for namespace 'common'
839 14:59:57.166807 Disconnecting from shell: Finalise
840 14:59:57.167082 =>
841 14:59:57.267844 end: 4.2 read-feedback (duration 00:00:01) [common]
842 14:59:57.268339 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953111
843 14:59:59.325465 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953111
844 14:59:59.326193 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.