Boot log: meson-sm1-s905d3-libretech-cc

    1 15:00:35.285627  lava-dispatcher, installed at version: 2024.01
    2 15:00:35.286437  start: 0 validate
    3 15:00:35.286898  Start time: 2024-11-07 15:00:35.286868+00:00 (UTC)
    4 15:00:35.287445  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 15:00:35.287963  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 15:00:35.327033  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 15:00:35.327564  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 15:00:35.359873  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 15:00:35.360528  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 15:00:35.393549  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 15:00:35.394013  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 15:00:35.432593  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 15:00:35.433081  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 15:00:35.476487  validate duration: 0.19
   16 15:00:35.477851  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 15:00:35.478394  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 15:00:35.478981  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 15:00:35.480009  Not decompressing ramdisk as can be used compressed.
   20 15:00:35.480803  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
   21 15:00:35.481306  saving as /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/ramdisk/initrd.cpio.gz
   22 15:00:35.481832  total size: 5628182 (5 MB)
   23 15:00:35.525086  progress   0 % (0 MB)
   24 15:00:35.532094  progress   5 % (0 MB)
   25 15:00:35.539034  progress  10 % (0 MB)
   26 15:00:35.544167  progress  15 % (0 MB)
   27 15:00:35.549757  progress  20 % (1 MB)
   28 15:00:35.554992  progress  25 % (1 MB)
   29 15:00:35.560556  progress  30 % (1 MB)
   30 15:00:35.566074  progress  35 % (1 MB)
   31 15:00:35.571293  progress  40 % (2 MB)
   32 15:00:35.577093  progress  45 % (2 MB)
   33 15:00:35.583257  progress  50 % (2 MB)
   34 15:00:35.587640  progress  55 % (2 MB)
   35 15:00:35.591586  progress  60 % (3 MB)
   36 15:00:35.595041  progress  65 % (3 MB)
   37 15:00:35.598990  progress  70 % (3 MB)
   38 15:00:35.602551  progress  75 % (4 MB)
   39 15:00:35.606424  progress  80 % (4 MB)
   40 15:00:35.609818  progress  85 % (4 MB)
   41 15:00:35.613456  progress  90 % (4 MB)
   42 15:00:35.617248  progress  95 % (5 MB)
   43 15:00:35.620573  progress 100 % (5 MB)
   44 15:00:35.621261  5 MB downloaded in 0.14 s (38.50 MB/s)
   45 15:00:35.621851  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 15:00:35.622757  end: 1.1 download-retry (duration 00:00:00) [common]
   48 15:00:35.623051  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 15:00:35.623323  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 15:00:35.623777  downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/kernel/Image
   51 15:00:35.624061  saving as /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/kernel/Image
   52 15:00:35.624273  total size: 46121472 (43 MB)
   53 15:00:35.624483  No compression specified
   54 15:00:35.657736  progress   0 % (0 MB)
   55 15:00:35.685674  progress   5 % (2 MB)
   56 15:00:35.713671  progress  10 % (4 MB)
   57 15:00:35.741684  progress  15 % (6 MB)
   58 15:00:35.769502  progress  20 % (8 MB)
   59 15:00:35.797394  progress  25 % (11 MB)
   60 15:00:35.825426  progress  30 % (13 MB)
   61 15:00:35.853313  progress  35 % (15 MB)
   62 15:00:35.881321  progress  40 % (17 MB)
   63 15:00:35.909252  progress  45 % (19 MB)
   64 15:00:35.937001  progress  50 % (22 MB)
   65 15:00:35.965078  progress  55 % (24 MB)
   66 15:00:35.993375  progress  60 % (26 MB)
   67 15:00:36.021214  progress  65 % (28 MB)
   68 15:00:36.049853  progress  70 % (30 MB)
   69 15:00:36.078300  progress  75 % (33 MB)
   70 15:00:36.106828  progress  80 % (35 MB)
   71 15:00:36.134827  progress  85 % (37 MB)
   72 15:00:36.162542  progress  90 % (39 MB)
   73 15:00:36.190879  progress  95 % (41 MB)
   74 15:00:36.217743  progress 100 % (43 MB)
   75 15:00:36.218447  43 MB downloaded in 0.59 s (74.03 MB/s)
   76 15:00:36.218935  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 15:00:36.219753  end: 1.2 download-retry (duration 00:00:01) [common]
   79 15:00:36.220054  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 15:00:36.220332  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 15:00:36.220903  downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 15:00:36.221174  saving as /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 15:00:36.221382  total size: 53209 (0 MB)
   84 15:00:36.221590  No compression specified
   85 15:00:36.256812  progress  61 % (0 MB)
   86 15:00:36.257701  progress 100 % (0 MB)
   87 15:00:36.258247  0 MB downloaded in 0.04 s (1.38 MB/s)
   88 15:00:36.258721  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 15:00:36.259535  end: 1.3 download-retry (duration 00:00:00) [common]
   91 15:00:36.259798  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 15:00:36.260105  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 15:00:36.260602  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
   94 15:00:36.260851  saving as /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/nfsrootfs/full.rootfs.tar
   95 15:00:36.261054  total size: 107552908 (102 MB)
   96 15:00:36.261265  Using unxz to decompress xz
   97 15:00:36.299741  progress   0 % (0 MB)
   98 15:00:37.011095  progress   5 % (5 MB)
   99 15:00:37.867626  progress  10 % (10 MB)
  100 15:00:38.725226  progress  15 % (15 MB)
  101 15:00:39.504072  progress  20 % (20 MB)
  102 15:00:40.074834  progress  25 % (25 MB)
  103 15:00:40.695429  progress  30 % (30 MB)
  104 15:00:41.443163  progress  35 % (35 MB)
  105 15:00:41.811470  progress  40 % (41 MB)
  106 15:00:42.246810  progress  45 % (46 MB)
  107 15:00:42.954998  progress  50 % (51 MB)
  108 15:00:43.651240  progress  55 % (56 MB)
  109 15:00:44.405182  progress  60 % (61 MB)
  110 15:00:45.156081  progress  65 % (66 MB)
  111 15:00:45.885512  progress  70 % (71 MB)
  112 15:00:46.644431  progress  75 % (76 MB)
  113 15:00:47.321536  progress  80 % (82 MB)
  114 15:00:48.034877  progress  85 % (87 MB)
  115 15:00:48.765185  progress  90 % (92 MB)
  116 15:00:49.486897  progress  95 % (97 MB)
  117 15:00:50.234968  progress 100 % (102 MB)
  118 15:00:50.246731  102 MB downloaded in 13.99 s (7.33 MB/s)
  119 15:00:50.247680  end: 1.4.1 http-download (duration 00:00:14) [common]
  121 15:00:50.249530  end: 1.4 download-retry (duration 00:00:14) [common]
  122 15:00:50.250111  start: 1.5 download-retry (timeout 00:09:45) [common]
  123 15:00:50.250688  start: 1.5.1 http-download (timeout 00:09:45) [common]
  124 15:00:50.251573  downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/modules.tar.xz
  125 15:00:50.252118  saving as /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/modules/modules.tar
  126 15:00:50.252577  total size: 11684868 (11 MB)
  127 15:00:50.253045  Using unxz to decompress xz
  128 15:00:50.300088  progress   0 % (0 MB)
  129 15:00:50.365783  progress   5 % (0 MB)
  130 15:00:50.439283  progress  10 % (1 MB)
  131 15:00:50.535423  progress  15 % (1 MB)
  132 15:00:50.631122  progress  20 % (2 MB)
  133 15:00:50.709838  progress  25 % (2 MB)
  134 15:00:50.780751  progress  30 % (3 MB)
  135 15:00:50.858117  progress  35 % (3 MB)
  136 15:00:50.934273  progress  40 % (4 MB)
  137 15:00:51.009875  progress  45 % (5 MB)
  138 15:00:51.094435  progress  50 % (5 MB)
  139 15:00:51.177430  progress  55 % (6 MB)
  140 15:00:51.258848  progress  60 % (6 MB)
  141 15:00:51.338768  progress  65 % (7 MB)
  142 15:00:51.422527  progress  70 % (7 MB)
  143 15:00:51.504520  progress  75 % (8 MB)
  144 15:00:51.588176  progress  80 % (8 MB)
  145 15:00:51.667801  progress  85 % (9 MB)
  146 15:00:51.745696  progress  90 % (10 MB)
  147 15:00:51.824297  progress  95 % (10 MB)
  148 15:00:51.900293  progress 100 % (11 MB)
  149 15:00:51.913074  11 MB downloaded in 1.66 s (6.71 MB/s)
  150 15:00:51.913658  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 15:00:51.914490  end: 1.5 download-retry (duration 00:00:02) [common]
  153 15:00:51.914762  start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
  154 15:00:51.915030  start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
  155 15:01:01.654877  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953270/extract-nfsrootfs-u153re30
  156 15:01:01.655498  end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
  157 15:01:01.655802  start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
  158 15:01:01.656638  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0
  159 15:01:01.657141  makedir: /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin
  160 15:01:01.657496  makedir: /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/tests
  161 15:01:01.657851  makedir: /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/results
  162 15:01:01.658221  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-add-keys
  163 15:01:01.658830  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-add-sources
  164 15:01:01.659414  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-background-process-start
  165 15:01:01.660019  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-background-process-stop
  166 15:01:01.660721  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-common-functions
  167 15:01:01.661335  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-echo-ipv4
  168 15:01:01.661941  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-install-packages
  169 15:01:01.662582  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-installed-packages
  170 15:01:01.663122  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-os-build
  171 15:01:01.663651  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-probe-channel
  172 15:01:01.664210  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-probe-ip
  173 15:01:01.664743  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-target-ip
  174 15:01:01.665274  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-target-mac
  175 15:01:01.665910  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-target-storage
  176 15:01:01.666514  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-test-case
  177 15:01:01.667076  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-test-event
  178 15:01:01.667597  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-test-feedback
  179 15:01:01.668102  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-test-raise
  180 15:01:01.668620  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-test-reference
  181 15:01:01.669182  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-test-runner
  182 15:01:01.669737  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-test-set
  183 15:01:01.670296  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-test-shell
  184 15:01:01.670847  Updating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-install-packages (oe)
  185 15:01:01.671431  Updating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/bin/lava-installed-packages (oe)
  186 15:01:01.671928  Creating /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/environment
  187 15:01:01.672486  LAVA metadata
  188 15:01:01.672780  - LAVA_JOB_ID=953270
  189 15:01:01.672999  - LAVA_DISPATCHER_IP=192.168.6.2
  190 15:01:01.673389  start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
  191 15:01:01.674475  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 15:01:01.674846  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
  193 15:01:01.675067  skipped lava-vland-overlay
  194 15:01:01.675316  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 15:01:01.675581  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
  196 15:01:01.675810  skipped lava-multinode-overlay
  197 15:01:01.676087  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 15:01:01.676354  start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
  199 15:01:01.676627  Loading test definitions
  200 15:01:01.676916  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
  201 15:01:01.677142  Using /lava-953270 at stage 0
  202 15:01:01.678651  uuid=953270_1.6.2.4.1 testdef=None
  203 15:01:01.679029  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 15:01:01.679312  start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
  205 15:01:01.681421  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 15:01:01.682318  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
  208 15:01:01.686029  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 15:01:01.686916  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
  211 15:01:01.689259  runner path: /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/0/tests/0_dmesg test_uuid 953270_1.6.2.4.1
  212 15:01:01.689906  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 15:01:01.690712  Creating lava-test-runner.conf files
  215 15:01:01.690919  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953270/lava-overlay-sv1gr3d0/lava-953270/0 for stage 0
  216 15:01:01.691286  - 0_dmesg
  217 15:01:01.691671  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 15:01:01.691964  start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
  219 15:01:01.716911  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 15:01:01.717352  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
  221 15:01:01.717624  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 15:01:01.717901  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 15:01:01.718170  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
  224 15:01:02.454041  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 15:01:02.454549  start: 1.6.4 extract-modules (timeout 00:09:33) [common]
  226 15:01:02.454802  extracting modules file /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953270/extract-nfsrootfs-u153re30
  227 15:01:03.865886  extracting modules file /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953270/extract-overlay-ramdisk-o6iqsnan/ramdisk
  228 15:01:05.283785  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 15:01:05.284281  start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
  230 15:01:05.284562  [common] Applying overlay to NFS
  231 15:01:05.284772  [common] Applying overlay /var/lib/lava/dispatcher/tmp/953270/compress-overlay-e49lqqyf/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953270/extract-nfsrootfs-u153re30
  232 15:01:05.314120  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 15:01:05.314505  start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
  234 15:01:05.314776  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
  235 15:01:05.315005  Converting downloaded kernel to a uImage
  236 15:01:05.315309  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/kernel/Image /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/kernel/uImage
  237 15:01:05.790133  output: Image Name:   
  238 15:01:05.790547  output: Created:      Thu Nov  7 15:01:05 2024
  239 15:01:05.790757  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 15:01:05.790963  output: Data Size:    46121472 Bytes = 45040.50 KiB = 43.98 MiB
  241 15:01:05.791165  output: Load Address: 01080000
  242 15:01:05.791365  output: Entry Point:  01080000
  243 15:01:05.791561  output: 
  244 15:01:05.791896  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  245 15:01:05.792206  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  246 15:01:05.792477  start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
  247 15:01:05.792729  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 15:01:05.792985  start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
  249 15:01:05.793241  Building ramdisk /var/lib/lava/dispatcher/tmp/953270/extract-overlay-ramdisk-o6iqsnan/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953270/extract-overlay-ramdisk-o6iqsnan/ramdisk
  250 15:01:08.002320  >> 168069 blocks

  251 15:01:15.771961  Adding RAMdisk u-boot header.
  252 15:01:15.772677  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953270/extract-overlay-ramdisk-o6iqsnan/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953270/extract-overlay-ramdisk-o6iqsnan/ramdisk.cpio.gz.uboot
  253 15:01:16.022033  output: Image Name:   
  254 15:01:16.022478  output: Created:      Thu Nov  7 15:01:15 2024
  255 15:01:16.022794  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 15:01:16.023220  output: Data Size:    23559817 Bytes = 23007.63 KiB = 22.47 MiB
  257 15:01:16.023625  output: Load Address: 00000000
  258 15:01:16.024075  output: Entry Point:  00000000
  259 15:01:16.024485  output: 
  260 15:01:16.025543  rename /var/lib/lava/dispatcher/tmp/953270/extract-overlay-ramdisk-o6iqsnan/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/ramdisk/ramdisk.cpio.gz.uboot
  261 15:01:16.026285  end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
  262 15:01:16.026852  end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
  263 15:01:16.027431  start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
  264 15:01:16.027904  No LXC device requested
  265 15:01:16.028465  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 15:01:16.028993  start: 1.8 deploy-device-env (timeout 00:09:19) [common]
  267 15:01:16.029497  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 15:01:16.029913  Checking files for TFTP limit of 4294967296 bytes.
  269 15:01:16.032656  end: 1 tftp-deploy (duration 00:00:41) [common]
  270 15:01:16.033259  start: 2 uboot-action (timeout 00:05:00) [common]
  271 15:01:16.033792  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 15:01:16.034296  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 15:01:16.034804  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 15:01:16.035337  Using kernel file from prepare-kernel: 953270/tftp-deploy-znlsmp8f/kernel/uImage
  275 15:01:16.035966  substitutions:
  276 15:01:16.036439  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 15:01:16.036852  - {DTB_ADDR}: 0x01070000
  278 15:01:16.037252  - {DTB}: 953270/tftp-deploy-znlsmp8f/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 15:01:16.037650  - {INITRD}: 953270/tftp-deploy-znlsmp8f/ramdisk/ramdisk.cpio.gz.uboot
  280 15:01:16.038046  - {KERNEL_ADDR}: 0x01080000
  281 15:01:16.038440  - {KERNEL}: 953270/tftp-deploy-znlsmp8f/kernel/uImage
  282 15:01:16.038834  - {LAVA_MAC}: None
  283 15:01:16.039270  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953270/extract-nfsrootfs-u153re30
  284 15:01:16.039672  - {NFS_SERVER_IP}: 192.168.6.2
  285 15:01:16.040097  - {PRESEED_CONFIG}: None
  286 15:01:16.040495  - {PRESEED_LOCAL}: None
  287 15:01:16.040884  - {RAMDISK_ADDR}: 0x08000000
  288 15:01:16.041273  - {RAMDISK}: 953270/tftp-deploy-znlsmp8f/ramdisk/ramdisk.cpio.gz.uboot
  289 15:01:16.041661  - {ROOT_PART}: None
  290 15:01:16.042050  - {ROOT}: None
  291 15:01:16.042439  - {SERVER_IP}: 192.168.6.2
  292 15:01:16.042835  - {TEE_ADDR}: 0x83000000
  293 15:01:16.043229  - {TEE}: None
  294 15:01:16.043622  Parsed boot commands:
  295 15:01:16.044027  - setenv autoload no
  296 15:01:16.044428  - setenv initrd_high 0xffffffff
  297 15:01:16.044816  - setenv fdt_high 0xffffffff
  298 15:01:16.045202  - dhcp
  299 15:01:16.045587  - setenv serverip 192.168.6.2
  300 15:01:16.045972  - tftpboot 0x01080000 953270/tftp-deploy-znlsmp8f/kernel/uImage
  301 15:01:16.046356  - tftpboot 0x08000000 953270/tftp-deploy-znlsmp8f/ramdisk/ramdisk.cpio.gz.uboot
  302 15:01:16.046743  - tftpboot 0x01070000 953270/tftp-deploy-znlsmp8f/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 15:01:16.047129  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953270/extract-nfsrootfs-u153re30,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 15:01:16.047533  - bootm 0x01080000 0x08000000 0x01070000
  305 15:01:16.048071  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 15:01:16.049581  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 15:01:16.050005  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 15:01:16.065011  Setting prompt string to ['lava-test: # ']
  310 15:01:16.066506  end: 2.3 connect-device (duration 00:00:00) [common]
  311 15:01:16.067118  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 15:01:16.067685  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 15:01:16.068302  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 15:01:16.069470  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 15:01:16.108286  >> OK - accepted request

  316 15:01:16.110025  Returned 0 in 0 seconds
  317 15:01:16.211103  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 15:01:16.212783  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 15:01:16.213373  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 15:01:16.213926  Setting prompt string to ['Hit any key to stop autoboot']
  322 15:01:16.214410  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 15:01:16.215964  Trying 192.168.56.21...
  324 15:01:16.216499  Connected to conserv1.
  325 15:01:16.216930  Escape character is '^]'.
  326 15:01:16.217355  
  327 15:01:16.217782  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  328 15:01:16.218209  
  329 15:01:23.594162  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 15:01:23.594595  bl2_stage_init 0x01
  331 15:01:23.594819  bl2_stage_init 0x81
  332 15:01:23.599528  hw id: 0x0000 - pwm id 0x01
  333 15:01:23.599829  bl2_stage_init 0xc1
  334 15:01:23.605252  bl2_stage_init 0x02
  335 15:01:23.605618  
  336 15:01:23.605874  L0:00000000
  337 15:01:23.606091  L1:00000703
  338 15:01:23.606313  L2:00008067
  339 15:01:23.606524  L3:15000000
  340 15:01:23.610925  S1:00000000
  341 15:01:23.611283  B2:20282000
  342 15:01:23.611506  B1:a0f83180
  343 15:01:23.611713  
  344 15:01:23.611923  TE: 69807
  345 15:01:23.612161  
  346 15:01:23.616496  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 15:01:23.616801  
  348 15:01:23.622869  Board ID = 1
  349 15:01:23.623161  Set cpu clk to 24M
  350 15:01:23.623377  Set clk81 to 24M
  351 15:01:23.627477  Use GP1_pll as DSU clk.
  352 15:01:23.627763  DSU clk: 1200 Mhz
  353 15:01:23.627969  CPU clk: 1200 MHz
  354 15:01:23.633066  Set clk81 to 166.6M
  355 15:01:23.638610  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 15:01:23.638953  board id: 1
  357 15:01:23.645807  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 15:01:23.656527  fw parse done
  359 15:01:23.662551  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 15:01:23.705231  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 15:01:23.716184  PIEI prepare done
  362 15:01:23.716609  fastboot data load
  363 15:01:23.716830  fastboot data verify
  364 15:01:23.721959  verify result: 266
  365 15:01:23.727450  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 15:01:23.727864  LPDDR4 probe
  367 15:01:23.728145  ddr clk to 1584MHz
  368 15:01:23.735519  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 15:01:23.772636  
  370 15:01:23.773057  dmc_version 0001
  371 15:01:23.781699  Check phy result
  372 15:01:23.785106  INFO : End of CA training
  373 15:01:23.785437  INFO : End of initialization
  374 15:01:23.790753  INFO : Training has run successfully!
  375 15:01:23.791109  Check phy result
  376 15:01:23.796520  INFO : End of initialization
  377 15:01:23.796886  INFO : End of read enable training
  378 15:01:23.799616  INFO : End of fine write leveling
  379 15:01:23.805242  INFO : End of Write leveling coarse delay
  380 15:01:23.810862  INFO : Training has run successfully!
  381 15:01:23.811276  Check phy result
  382 15:01:23.811492  INFO : End of initialization
  383 15:01:23.816491  INFO : End of read dq deskew training
  384 15:01:23.822025  INFO : End of MPR read delay center optimization
  385 15:01:23.822370  INFO : End of write delay center optimization
  386 15:01:23.827589  INFO : End of read delay center optimization
  387 15:01:23.833139  INFO : End of max read latency training
  388 15:01:23.833461  INFO : Training has run successfully!
  389 15:01:23.838713  1D training succeed
  390 15:01:23.844722  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 15:01:23.892267  Check phy result
  392 15:01:23.892695  INFO : End of initialization
  393 15:01:23.915184  INFO : End of 2D read delay Voltage center optimization
  394 15:01:23.932963  INFO : End of 2D read delay Voltage center optimization
  395 15:01:23.985766  INFO : End of 2D write delay Voltage center optimization
  396 15:01:24.035070  INFO : End of 2D write delay Voltage center optimization
  397 15:01:24.040732  INFO : Training has run successfully!
  398 15:01:24.041231  
  399 15:01:24.041640  channel==0
  400 15:01:24.046205  RxClkDly_Margin_A0==78 ps 8
  401 15:01:24.046663  TxDqDly_Margin_A0==98 ps 10
  402 15:01:24.049399  RxClkDly_Margin_A1==88 ps 9
  403 15:01:24.049859  TxDqDly_Margin_A1==98 ps 10
  404 15:01:24.055020  TrainedVREFDQ_A0==74
  405 15:01:24.055493  TrainedVREFDQ_A1==75
  406 15:01:24.060669  VrefDac_Margin_A0==24
  407 15:01:24.061149  DeviceVref_Margin_A0==40
  408 15:01:24.061550  VrefDac_Margin_A1==23
  409 15:01:24.066142  DeviceVref_Margin_A1==39
  410 15:01:24.066604  
  411 15:01:24.067002  
  412 15:01:24.067397  channel==1
  413 15:01:24.067786  RxClkDly_Margin_A0==78 ps 8
  414 15:01:24.069745  TxDqDly_Margin_A0==98 ps 10
  415 15:01:24.075416  RxClkDly_Margin_A1==78 ps 8
  416 15:01:24.075879  TxDqDly_Margin_A1==98 ps 10
  417 15:01:24.076324  TrainedVREFDQ_A0==78
  418 15:01:24.080870  TrainedVREFDQ_A1==77
  419 15:01:24.081335  VrefDac_Margin_A0==22
  420 15:01:24.086586  DeviceVref_Margin_A0==36
  421 15:01:24.087051  VrefDac_Margin_A1==22
  422 15:01:24.087445  DeviceVref_Margin_A1==37
  423 15:01:24.087829  
  424 15:01:24.092039   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 15:01:24.092488  
  426 15:01:24.125632  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  427 15:01:24.126204  2D training succeed
  428 15:01:24.131230  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 15:01:24.136787  auto size-- 65535DDR cs0 size: 2048MB
  430 15:01:24.137249  DDR cs1 size: 2048MB
  431 15:01:24.142502  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 15:01:24.142949  cs0 DataBus test pass
  433 15:01:24.143346  cs1 DataBus test pass
  434 15:01:24.148020  cs0 AddrBus test pass
  435 15:01:24.148457  cs1 AddrBus test pass
  436 15:01:24.148849  
  437 15:01:24.153644  100bdlr_step_size ps== 471
  438 15:01:24.154107  result report
  439 15:01:24.154504  boot times 0Enable ddr reg access
  440 15:01:24.163394  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 15:01:24.177228  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 15:01:24.831366  bl2z: ptr: 05129330, size: 00001e40
  443 15:01:24.838933  0.0;M3 CHK:0;cm4_sp_mode 0
  444 15:01:24.839429  MVN_1=0x00000000
  445 15:01:24.839845  MVN_2=0x00000000
  446 15:01:24.850334  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 15:01:24.850805  OPS=0x04
  448 15:01:24.851236  ring efuse init
  449 15:01:24.853303  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 15:01:24.859080  [0.017319 Inits done]
  451 15:01:24.859570  secure task start!
  452 15:01:24.860030  high task start!
  453 15:01:24.860453  low task start!
  454 15:01:24.862399  run into bl31
  455 15:01:24.872040  NOTICE:  BL31: v1.3(release):4fc40b1
  456 15:01:24.878872  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 15:01:24.879351  NOTICE:  BL31: G12A normal boot!
  458 15:01:24.895439  NOTICE:  BL31: BL33 decompress pass
  459 15:01:24.900129  ERROR:   Error initializing runtime service opteed_fast
  460 15:01:27.644991  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 15:01:27.645662  bl2_stage_init 0x01
  462 15:01:27.646109  bl2_stage_init 0x81
  463 15:01:27.650443  hw id: 0x0000 - pwm id 0x01
  464 15:01:27.651002  bl2_stage_init 0xc1
  465 15:01:27.656062  bl2_stage_init 0x02
  466 15:01:27.656656  
  467 15:01:27.657062  L0:00000000
  468 15:01:27.657454  L1:00000703
  469 15:01:27.657844  L2:00008067
  470 15:01:27.658227  L3:15000000
  471 15:01:27.661574  S1:00000000
  472 15:01:27.662009  B2:20282000
  473 15:01:27.662398  B1:a0f83180
  474 15:01:27.662781  
  475 15:01:27.663168  TE: 71017
  476 15:01:27.663553  
  477 15:01:27.667196  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 15:01:27.667627  
  479 15:01:27.672833  Board ID = 1
  480 15:01:27.673306  Set cpu clk to 24M
  481 15:01:27.673698  Set clk81 to 24M
  482 15:01:27.678385  Use GP1_pll as DSU clk.
  483 15:01:27.678842  DSU clk: 1200 Mhz
  484 15:01:27.679233  CPU clk: 1200 MHz
  485 15:01:27.684021  Set clk81 to 166.6M
  486 15:01:27.689663  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 15:01:27.690103  board id: 1
  488 15:01:27.696996  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 15:01:27.707919  fw parse done
  490 15:01:27.713649  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 15:01:27.756970  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 15:01:27.767923  PIEI prepare done
  493 15:01:27.768390  fastboot data load
  494 15:01:27.768782  fastboot data verify
  495 15:01:27.773505  verify result: 266
  496 15:01:27.779125  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 15:01:27.779553  LPDDR4 probe
  498 15:01:27.779940  ddr clk to 1584MHz
  499 15:01:27.787129  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 15:01:27.824989  
  501 15:01:27.825489  dmc_version 0001
  502 15:01:27.831965  Check phy result
  503 15:01:27.837929  INFO : End of CA training
  504 15:01:27.838376  INFO : End of initialization
  505 15:01:27.843409  INFO : Training has run successfully!
  506 15:01:27.843838  Check phy result
  507 15:01:27.849003  INFO : End of initialization
  508 15:01:27.849431  INFO : End of read enable training
  509 15:01:27.854632  INFO : End of fine write leveling
  510 15:01:27.860268  INFO : End of Write leveling coarse delay
  511 15:01:27.860705  INFO : Training has run successfully!
  512 15:01:27.861111  Check phy result
  513 15:01:27.865881  INFO : End of initialization
  514 15:01:27.866304  INFO : End of read dq deskew training
  515 15:01:27.871395  INFO : End of MPR read delay center optimization
  516 15:01:27.877006  INFO : End of write delay center optimization
  517 15:01:27.882665  INFO : End of read delay center optimization
  518 15:01:27.883094  INFO : End of max read latency training
  519 15:01:27.888388  INFO : Training has run successfully!
  520 15:01:27.888813  1D training succeed
  521 15:01:27.897454  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 15:01:27.945736  Check phy result
  523 15:01:27.946164  INFO : End of initialization
  524 15:01:27.973100  INFO : End of 2D read delay Voltage center optimization
  525 15:01:27.997234  INFO : End of 2D read delay Voltage center optimization
  526 15:01:28.053883  INFO : End of 2D write delay Voltage center optimization
  527 15:01:28.107863  INFO : End of 2D write delay Voltage center optimization
  528 15:01:28.113450  INFO : Training has run successfully!
  529 15:01:28.113888  
  530 15:01:28.114297  channel==0
  531 15:01:28.118961  RxClkDly_Margin_A0==69 ps 7
  532 15:01:28.119393  TxDqDly_Margin_A0==98 ps 10
  533 15:01:28.124551  RxClkDly_Margin_A1==88 ps 9
  534 15:01:28.124997  TxDqDly_Margin_A1==88 ps 9
  535 15:01:28.125408  TrainedVREFDQ_A0==74
  536 15:01:28.130168  TrainedVREFDQ_A1==74
  537 15:01:28.130613  VrefDac_Margin_A0==24
  538 15:01:28.131016  DeviceVref_Margin_A0==40
  539 15:01:28.135717  VrefDac_Margin_A1==23
  540 15:01:28.136170  DeviceVref_Margin_A1==40
  541 15:01:28.136574  
  542 15:01:28.136968  
  543 15:01:28.137377  channel==1
  544 15:01:28.141441  RxClkDly_Margin_A0==78 ps 8
  545 15:01:28.141865  TxDqDly_Margin_A0==98 ps 10
  546 15:01:28.146949  RxClkDly_Margin_A1==78 ps 8
  547 15:01:28.147375  TxDqDly_Margin_A1==98 ps 10
  548 15:01:28.152546  TrainedVREFDQ_A0==78
  549 15:01:28.152974  TrainedVREFDQ_A1==78
  550 15:01:28.153374  VrefDac_Margin_A0==22
  551 15:01:28.158191  DeviceVref_Margin_A0==36
  552 15:01:28.158618  VrefDac_Margin_A1==22
  553 15:01:28.163722  DeviceVref_Margin_A1==36
  554 15:01:28.164169  
  555 15:01:28.164572   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 15:01:28.164966  
  557 15:01:28.197441  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  558 15:01:28.197952  2D training succeed
  559 15:01:28.202988  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 15:01:28.208606  auto size-- 65535DDR cs0 size: 2048MB
  561 15:01:28.209036  DDR cs1 size: 2048MB
  562 15:01:28.214170  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 15:01:28.214615  cs0 DataBus test pass
  564 15:01:28.219751  cs1 DataBus test pass
  565 15:01:28.220243  cs0 AddrBus test pass
  566 15:01:28.220654  cs1 AddrBus test pass
  567 15:01:28.221052  
  568 15:01:28.225429  100bdlr_step_size ps== 485
  569 15:01:28.225867  result report
  570 15:01:28.230963  boot times 0Enable ddr reg access
  571 15:01:28.236253  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 15:01:28.250099  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 15:01:28.909007  bl2z: ptr: 05129330, size: 00001e40
  574 15:01:28.917140  0.0;M3 CHK:0;cm4_sp_mode 0
  575 15:01:28.917622  MVN_1=0x00000000
  576 15:01:28.918036  MVN_2=0x00000000
  577 15:01:28.928519  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 15:01:28.928975  OPS=0x04
  579 15:01:28.929394  ring efuse init
  580 15:01:28.931506  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 15:01:28.938954  [0.017354 Inits done]
  582 15:01:28.939400  secure task start!
  583 15:01:28.939806  high task start!
  584 15:01:28.940254  low task start!
  585 15:01:28.942692  run into bl31
  586 15:01:28.950725  NOTICE:  BL31: v1.3(release):4fc40b1
  587 15:01:28.958547  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 15:01:28.958996  NOTICE:  BL31: G12A normal boot!
  589 15:01:28.974252  NOTICE:  BL31: BL33 decompress pass
  590 15:01:28.979808  ERROR:   Error initializing runtime service opteed_fast
  591 15:01:30.344020  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 15:01:30.344642  bl2_stage_init 0x01
  593 15:01:30.345075  bl2_stage_init 0x81
  594 15:01:30.349255  hw id: 0x0000 - pwm id 0x01
  595 15:01:30.349720  bl2_stage_init 0xc1
  596 15:01:30.355005  bl2_stage_init 0x02
  597 15:01:30.355446  
  598 15:01:30.355858  L0:00000000
  599 15:01:30.356323  L1:00000703
  600 15:01:30.356727  L2:00008067
  601 15:01:30.357124  L3:15000000
  602 15:01:30.360501  S1:00000000
  603 15:01:30.360929  B2:20282000
  604 15:01:30.361329  B1:a0f83180
  605 15:01:30.361722  
  606 15:01:30.362116  TE: 69330
  607 15:01:30.362518  
  608 15:01:30.366102  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 15:01:30.366557  
  610 15:01:30.371749  Board ID = 1
  611 15:01:30.372214  Set cpu clk to 24M
  612 15:01:30.372617  Set clk81 to 24M
  613 15:01:30.377130  Use GP1_pll as DSU clk.
  614 15:01:30.377581  DSU clk: 1200 Mhz
  615 15:01:30.377986  CPU clk: 1200 MHz
  616 15:01:30.382962  Set clk81 to 166.6M
  617 15:01:30.388327  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 15:01:30.388800  board id: 1
  619 15:01:30.395528  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 15:01:30.406480  fw parse done
  621 15:01:30.412251  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 15:01:30.453934  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 15:01:30.465712  PIEI prepare done
  624 15:01:30.466157  fastboot data load
  625 15:01:30.466565  fastboot data verify
  626 15:01:30.471318  verify result: 266
  627 15:01:30.476787  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 15:01:30.477227  LPDDR4 probe
  629 15:01:30.477634  ddr clk to 1584MHz
  630 15:01:30.484979  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 15:01:30.522191  
  632 15:01:30.522685  dmc_version 0001
  633 15:01:30.528803  Check phy result
  634 15:01:30.534777  INFO : End of CA training
  635 15:01:30.535229  INFO : End of initialization
  636 15:01:30.540600  INFO : Training has run successfully!
  637 15:01:30.541054  Check phy result
  638 15:01:30.546066  INFO : End of initialization
  639 15:01:30.546501  INFO : End of read enable training
  640 15:01:30.549394  INFO : End of fine write leveling
  641 15:01:30.554871  INFO : End of Write leveling coarse delay
  642 15:01:30.560523  INFO : Training has run successfully!
  643 15:01:30.560958  Check phy result
  644 15:01:30.561364  INFO : End of initialization
  645 15:01:30.566090  INFO : End of read dq deskew training
  646 15:01:30.571727  INFO : End of MPR read delay center optimization
  647 15:01:30.572229  INFO : End of write delay center optimization
  648 15:01:30.577320  INFO : End of read delay center optimization
  649 15:01:30.582892  INFO : End of max read latency training
  650 15:01:30.583319  INFO : Training has run successfully!
  651 15:01:30.588467  1D training succeed
  652 15:01:30.594517  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 15:01:30.641962  Check phy result
  654 15:01:30.642422  INFO : End of initialization
  655 15:01:30.663326  INFO : End of 2D read delay Voltage center optimization
  656 15:01:30.683383  INFO : End of 2D read delay Voltage center optimization
  657 15:01:30.735324  INFO : End of 2D write delay Voltage center optimization
  658 15:01:30.784376  INFO : End of 2D write delay Voltage center optimization
  659 15:01:30.789948  INFO : Training has run successfully!
  660 15:01:30.790388  
  661 15:01:30.790797  channel==0
  662 15:01:30.795582  RxClkDly_Margin_A0==88 ps 9
  663 15:01:30.796054  TxDqDly_Margin_A0==98 ps 10
  664 15:01:30.798830  RxClkDly_Margin_A1==88 ps 9
  665 15:01:30.799263  TxDqDly_Margin_A1==88 ps 9
  666 15:01:30.804491  TrainedVREFDQ_A0==74
  667 15:01:30.804931  TrainedVREFDQ_A1==74
  668 15:01:30.805336  VrefDac_Margin_A0==23
  669 15:01:30.810005  DeviceVref_Margin_A0==40
  670 15:01:30.810438  VrefDac_Margin_A1==23
  671 15:01:30.815557  DeviceVref_Margin_A1==40
  672 15:01:30.816019  
  673 15:01:30.816429  
  674 15:01:30.816828  channel==1
  675 15:01:30.817220  RxClkDly_Margin_A0==78 ps 8
  676 15:01:30.821312  TxDqDly_Margin_A0==98 ps 10
  677 15:01:30.821744  RxClkDly_Margin_A1==88 ps 9
  678 15:01:30.826789  TxDqDly_Margin_A1==98 ps 10
  679 15:01:30.827226  TrainedVREFDQ_A0==78
  680 15:01:30.827632  TrainedVREFDQ_A1==78
  681 15:01:30.832356  VrefDac_Margin_A0==22
  682 15:01:30.832786  DeviceVref_Margin_A0==36
  683 15:01:30.837956  VrefDac_Margin_A1==22
  684 15:01:30.838381  DeviceVref_Margin_A1==36
  685 15:01:30.838784  
  686 15:01:30.843572   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 15:01:30.844040  
  688 15:01:30.871585  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000018 00000018 00000015 00000018 00000015 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000016 dram_vref_reg_value 0x 00000061
  689 15:01:30.877306  2D training succeed
  690 15:01:30.882826  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 15:01:30.883262  auto size-- 65535DDR cs0 size: 2048MB
  692 15:01:30.888322  DDR cs1 size: 2048MB
  693 15:01:30.888783  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 15:01:30.893936  cs0 DataBus test pass
  695 15:01:30.894362  cs1 DataBus test pass
  696 15:01:30.894763  cs0 AddrBus test pass
  697 15:01:30.899566  cs1 AddrBus test pass
  698 15:01:30.900023  
  699 15:01:30.900437  100bdlr_step_size ps== 464
  700 15:01:30.900847  result report
  701 15:01:30.905414  boot times 0Enable ddr reg access
  702 15:01:30.913010  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 15:01:30.926653  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 15:01:31.582591  bl2z: ptr: 05129330, size: 00001e40
  705 15:01:31.590916  0.0;M3 CHK:0;cm4_sp_mode 0
  706 15:01:31.591372  MVN_1=0x00000000
  707 15:01:31.591784  MVN_2=0x00000000
  708 15:01:31.602386  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 15:01:31.602822  OPS=0x04
  710 15:01:31.603228  ring efuse init
  711 15:01:31.605434  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 15:01:31.611704  [0.017319 Inits done]
  713 15:01:31.612163  secure task start!
  714 15:01:31.612568  high task start!
  715 15:01:31.612963  low task start!
  716 15:01:31.615843  run into bl31
  717 15:01:31.624437  NOTICE:  BL31: v1.3(release):4fc40b1
  718 15:01:31.632276  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 15:01:31.632708  NOTICE:  BL31: G12A normal boot!
  720 15:01:31.647711  NOTICE:  BL31: BL33 decompress pass
  721 15:01:31.653460  ERROR:   Error initializing runtime service opteed_fast
  722 15:01:32.449055  
  723 15:01:32.449665  
  724 15:01:32.454286  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 15:01:32.454730  
  726 15:01:32.457872  Model: Libre Computer AML-S905D3-CC Solitude
  727 15:01:32.604855  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 15:01:32.619356  DRAM:  2 GiB (effective 3.8 GiB)
  729 15:01:32.721254  Core:  406 devices, 33 uclasses, devicetree: separate
  730 15:01:32.726996  WDT:   Not starting watchdog@f0d0
  731 15:01:32.752107  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 15:01:32.764271  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 15:01:32.769260  ** Bad device specification mmc 0 **
  734 15:01:32.779324  Card did not respond to voltage select! : -110
  735 15:01:32.786942  ** Bad device specification mmc 0 **
  736 15:01:32.787373  Couldn't find partition mmc 0
  737 15:01:32.795260  Card did not respond to voltage select! : -110
  738 15:01:32.800802  ** Bad device specification mmc 0 **
  739 15:01:32.801219  Couldn't find partition mmc 0
  740 15:01:32.805886  Error: could not access storage.
  741 15:01:33.103337  Net:   eth0: ethernet@ff3f0000
  742 15:01:33.103929  starting USB...
  743 15:01:33.348151  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 15:01:33.348656  Starting the controller
  745 15:01:33.354962  USB XHCI 1.10
  746 15:01:34.909081  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 15:01:34.917375         scanning usb for storage devices... 0 Storage Device(s) found
  749 15:01:34.968866  Hit any key to stop autoboot:  1 
  750 15:01:34.969648  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  751 15:01:34.970242  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  752 15:01:34.970722  Setting prompt string to ['=>']
  753 15:01:34.971205  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  754 15:01:34.982808   0 
  755 15:01:34.983675  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 15:01:35.084993  => setenv autoload no
  758 15:01:35.085741  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  759 15:01:35.090556  setenv autoload no
  761 15:01:35.192097  => setenv initrd_high 0xffffffff
  762 15:01:35.192854  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  763 15:01:35.197220  setenv initrd_high 0xffffffff
  765 15:01:35.298724  => setenv fdt_high 0xffffffff
  766 15:01:35.299743  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  767 15:01:35.304057  setenv fdt_high 0xffffffff
  769 15:01:35.405586  => dhcp
  770 15:01:35.406539  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  771 15:01:35.410493  dhcp
  772 15:01:36.466548  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  773 15:01:36.467180  Speed: 1000, full duplex
  774 15:01:36.467605  BOOTP broadcast 1
  775 15:01:36.714858  BOOTP broadcast 2
  776 15:01:36.727152  DHCP client bound to address 192.168.6.21 (260 ms)
  778 15:01:36.828713  => setenv serverip 192.168.6.2
  779 15:01:36.829695  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  780 15:01:36.834074  setenv serverip 192.168.6.2
  782 15:01:36.935511  => tftpboot 0x01080000 953270/tftp-deploy-znlsmp8f/kernel/uImage
  783 15:01:36.936464  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  784 15:01:36.943000  tftpboot 0x01080000 953270/tftp-deploy-znlsmp8f/kernel/uImage
  785 15:01:36.943479  Speed: 1000, full duplex
  786 15:01:36.943890  Using ethernet@ff3f0000 device
  787 15:01:36.948567  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  788 15:01:36.954003  Filename '953270/tftp-deploy-znlsmp8f/kernel/uImage'.
  789 15:01:36.962279  Load address: 0x1080000
  790 15:01:36.962734  Loading: * UDP wrong checksum 00000005 00009242
  791 15:01:39.778374  ##################################################  44 MiB
  792 15:01:39.778995  	 15.6 MiB/s
  793 15:01:39.779430  done
  794 15:01:39.782730  Bytes transferred = 46121536 (2bfc240 hex)
  796 15:01:39.884298  => tftpboot 0x08000000 953270/tftp-deploy-znlsmp8f/ramdisk/ramdisk.cpio.gz.uboot
  797 15:01:39.885057  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
  798 15:01:39.891846  tftpboot 0x08000000 953270/tftp-deploy-znlsmp8f/ramdisk/ramdisk.cpio.gz.uboot
  799 15:01:39.892342  Speed: 1000, full duplex
  800 15:01:39.892743  Using ethernet@ff3f0000 device
  801 15:01:39.897331  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  802 15:01:39.907177  Filename '953270/tftp-deploy-znlsmp8f/ramdisk/ramdisk.cpio.gz.uboot'.
  803 15:01:39.907614  Load address: 0x8000000
  804 15:01:41.332577  Loading: *################################################# UDP wrong checksum 00000005 0000612e
  805 15:01:46.332781  T  UDP wrong checksum 00000005 0000612e
  806 15:01:50.943721   UDP wrong checksum 000000ff 0000d94a
  807 15:01:50.981644   UDP wrong checksum 000000ff 00006a3d
  808 15:01:56.333587  T  UDP wrong checksum 00000005 0000612e
  809 15:02:16.338650  T T T T T  UDP wrong checksum 00000005 0000612e
  810 15:02:22.940948  T  UDP wrong checksum 000000ff 0000abee
  811 15:02:23.001013   UDP wrong checksum 000000ff 00003be1
  812 15:02:36.343582  T T 
  813 15:02:36.344211  Retry count exceeded; starting again
  815 15:02:36.345626  end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
  818 15:02:36.347471  end: 2.4 uboot-commands (duration 00:01:20) [common]
  820 15:02:36.349672  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  822 15:02:36.350915  end: 2 uboot-action (duration 00:01:20) [common]
  824 15:02:36.352701  Cleaning after the job
  825 15:02:36.353309  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/ramdisk
  826 15:02:36.354730  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/kernel
  827 15:02:36.385221  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/dtb
  828 15:02:36.386842  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/nfsrootfs
  829 15:02:36.434173  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953270/tftp-deploy-znlsmp8f/modules
  830 15:02:36.440907  start: 4.1 power-off (timeout 00:00:30) [common]
  831 15:02:36.441559  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  832 15:02:36.474936  >> OK - accepted request

  833 15:02:36.476819  Returned 0 in 0 seconds
  834 15:02:36.577602  end: 4.1 power-off (duration 00:00:00) [common]
  836 15:02:36.578821  start: 4.2 read-feedback (timeout 00:10:00) [common]
  837 15:02:36.579482  Listened to connection for namespace 'common' for up to 1s
  838 15:02:37.580446  Finalising connection for namespace 'common'
  839 15:02:37.581071  Disconnecting from shell: Finalise
  840 15:02:37.581480  => 
  841 15:02:37.682376  end: 4.2 read-feedback (duration 00:00:01) [common]
  842 15:02:37.682946  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953270
  843 15:02:39.814331  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953270
  844 15:02:39.814943  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.