Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 17:40:40.982053 lava-dispatcher, installed at version: 2024.01
2 17:40:40.982874 start: 0 validate
3 17:40:40.983384 Start time: 2024-11-07 17:40:40.983350+00:00 (UTC)
4 17:40:40.984029 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 17:40:40.984623 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 17:40:41.030360 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 17:40:41.031002 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 17:40:41.067183 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 17:40:41.067896 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 17:40:41.104624 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 17:40:41.105128 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 17:40:41.136412 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 17:40:41.136954 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 17:40:41.180244 validate duration: 0.20
16 17:40:41.181056 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 17:40:41.181376 start: 1.1 download-retry (timeout 00:10:00) [common]
18 17:40:41.181665 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 17:40:41.182394 Not decompressing ramdisk as can be used compressed.
20 17:40:41.182879 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 17:40:41.183174 saving as /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/ramdisk/initrd.cpio.gz
22 17:40:41.183477 total size: 5628169 (5 MB)
23 17:40:41.222956 progress 0 % (0 MB)
24 17:40:41.228494 progress 5 % (0 MB)
25 17:40:41.234062 progress 10 % (0 MB)
26 17:40:41.239010 progress 15 % (0 MB)
27 17:40:41.244446 progress 20 % (1 MB)
28 17:40:41.249327 progress 25 % (1 MB)
29 17:40:41.254577 progress 30 % (1 MB)
30 17:40:41.260023 progress 35 % (1 MB)
31 17:40:41.264932 progress 40 % (2 MB)
32 17:40:41.270252 progress 45 % (2 MB)
33 17:40:41.275026 progress 50 % (2 MB)
34 17:40:41.280398 progress 55 % (2 MB)
35 17:40:41.285634 progress 60 % (3 MB)
36 17:40:41.290383 progress 65 % (3 MB)
37 17:40:41.295724 progress 70 % (3 MB)
38 17:40:41.300634 progress 75 % (4 MB)
39 17:40:41.306033 progress 80 % (4 MB)
40 17:40:41.310817 progress 85 % (4 MB)
41 17:40:41.315913 progress 90 % (4 MB)
42 17:40:41.320850 progress 95 % (5 MB)
43 17:40:41.325158 progress 100 % (5 MB)
44 17:40:41.325998 5 MB downloaded in 0.14 s (37.67 MB/s)
45 17:40:41.326738 end: 1.1.1 http-download (duration 00:00:00) [common]
47 17:40:41.327960 end: 1.1 download-retry (duration 00:00:00) [common]
48 17:40:41.328430 start: 1.2 download-retry (timeout 00:10:00) [common]
49 17:40:41.328808 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 17:40:41.329626 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/kernel/Image
51 17:40:41.330009 saving as /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/kernel/Image
52 17:40:41.330308 total size: 46121472 (43 MB)
53 17:40:41.330641 No compression specified
54 17:40:41.370288 progress 0 % (0 MB)
55 17:40:41.407491 progress 5 % (2 MB)
56 17:40:41.445071 progress 10 % (4 MB)
57 17:40:41.480643 progress 15 % (6 MB)
58 17:40:41.516085 progress 20 % (8 MB)
59 17:40:41.551546 progress 25 % (11 MB)
60 17:40:41.587158 progress 30 % (13 MB)
61 17:40:41.622515 progress 35 % (15 MB)
62 17:40:41.658175 progress 40 % (17 MB)
63 17:40:41.693373 progress 45 % (19 MB)
64 17:40:41.728543 progress 50 % (22 MB)
65 17:40:41.764393 progress 55 % (24 MB)
66 17:40:41.799507 progress 60 % (26 MB)
67 17:40:41.834598 progress 65 % (28 MB)
68 17:40:41.870192 progress 70 % (30 MB)
69 17:40:41.905698 progress 75 % (33 MB)
70 17:40:41.941286 progress 80 % (35 MB)
71 17:40:41.976659 progress 85 % (37 MB)
72 17:40:42.011955 progress 90 % (39 MB)
73 17:40:42.048228 progress 95 % (41 MB)
74 17:40:42.082978 progress 100 % (43 MB)
75 17:40:42.083781 43 MB downloaded in 0.75 s (58.38 MB/s)
76 17:40:42.084477 end: 1.2.1 http-download (duration 00:00:01) [common]
78 17:40:42.085579 end: 1.2 download-retry (duration 00:00:01) [common]
79 17:40:42.085956 start: 1.3 download-retry (timeout 00:09:59) [common]
80 17:40:42.086326 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 17:40:42.087095 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 17:40:42.087469 saving as /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 17:40:42.087808 total size: 53209 (0 MB)
84 17:40:42.088165 No compression specified
85 17:40:42.130625 progress 61 % (0 MB)
86 17:40:42.131735 progress 100 % (0 MB)
87 17:40:42.132523 0 MB downloaded in 0.04 s (1.14 MB/s)
88 17:40:42.133146 end: 1.3.1 http-download (duration 00:00:00) [common]
90 17:40:42.134241 end: 1.3 download-retry (duration 00:00:00) [common]
91 17:40:42.134609 start: 1.4 download-retry (timeout 00:09:59) [common]
92 17:40:42.134976 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 17:40:42.135725 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 17:40:42.136109 saving as /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/nfsrootfs/full.rootfs.tar
95 17:40:42.136437 total size: 120894716 (115 MB)
96 17:40:42.136730 Using unxz to decompress xz
97 17:40:42.178505 progress 0 % (0 MB)
98 17:40:42.973501 progress 5 % (5 MB)
99 17:40:43.810407 progress 10 % (11 MB)
100 17:40:44.606676 progress 15 % (17 MB)
101 17:40:45.343342 progress 20 % (23 MB)
102 17:40:45.934122 progress 25 % (28 MB)
103 17:40:46.763697 progress 30 % (34 MB)
104 17:40:47.558934 progress 35 % (40 MB)
105 17:40:47.927251 progress 40 % (46 MB)
106 17:40:48.301897 progress 45 % (51 MB)
107 17:40:49.017397 progress 50 % (57 MB)
108 17:40:49.905514 progress 55 % (63 MB)
109 17:40:50.692267 progress 60 % (69 MB)
110 17:40:51.449819 progress 65 % (74 MB)
111 17:40:52.230432 progress 70 % (80 MB)
112 17:40:53.051076 progress 75 % (86 MB)
113 17:40:53.835222 progress 80 % (92 MB)
114 17:40:54.595391 progress 85 % (98 MB)
115 17:40:55.441989 progress 90 % (103 MB)
116 17:40:56.210033 progress 95 % (109 MB)
117 17:40:57.034229 progress 100 % (115 MB)
118 17:40:57.046702 115 MB downloaded in 14.91 s (7.73 MB/s)
119 17:40:57.047557 end: 1.4.1 http-download (duration 00:00:15) [common]
121 17:40:57.049192 end: 1.4 download-retry (duration 00:00:15) [common]
122 17:40:57.049703 start: 1.5 download-retry (timeout 00:09:44) [common]
123 17:40:57.050206 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 17:40:57.051443 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/modules.tar.xz
125 17:40:57.051942 saving as /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/modules/modules.tar
126 17:40:57.052415 total size: 11684868 (11 MB)
127 17:40:57.052855 Using unxz to decompress xz
128 17:40:57.100825 progress 0 % (0 MB)
129 17:40:57.167185 progress 5 % (0 MB)
130 17:40:57.240971 progress 10 % (1 MB)
131 17:40:57.336995 progress 15 % (1 MB)
132 17:40:57.433691 progress 20 % (2 MB)
133 17:40:57.513049 progress 25 % (2 MB)
134 17:40:57.587318 progress 30 % (3 MB)
135 17:40:57.665052 progress 35 % (3 MB)
136 17:40:57.741459 progress 40 % (4 MB)
137 17:40:57.816886 progress 45 % (5 MB)
138 17:40:57.900198 progress 50 % (5 MB)
139 17:40:57.984762 progress 55 % (6 MB)
140 17:40:58.065737 progress 60 % (6 MB)
141 17:40:58.145820 progress 65 % (7 MB)
142 17:40:58.226131 progress 70 % (7 MB)
143 17:40:58.307657 progress 75 % (8 MB)
144 17:40:58.390753 progress 80 % (8 MB)
145 17:40:58.471764 progress 85 % (9 MB)
146 17:40:58.550823 progress 90 % (10 MB)
147 17:40:58.628979 progress 95 % (10 MB)
148 17:40:58.707300 progress 100 % (11 MB)
149 17:40:58.720154 11 MB downloaded in 1.67 s (6.68 MB/s)
150 17:40:58.721026 end: 1.5.1 http-download (duration 00:00:02) [common]
152 17:40:58.722630 end: 1.5 download-retry (duration 00:00:02) [common]
153 17:40:58.723151 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 17:40:58.723667 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 17:41:15.114121 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953207/extract-nfsrootfs-0d_d6905
156 17:41:15.114743 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 17:41:15.115033 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 17:41:15.115652 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw
159 17:41:15.116108 makedir: /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin
160 17:41:15.116443 makedir: /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/tests
161 17:41:15.116759 makedir: /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/results
162 17:41:15.117088 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-add-keys
163 17:41:15.117619 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-add-sources
164 17:41:15.118120 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-background-process-start
165 17:41:15.118643 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-background-process-stop
166 17:41:15.119215 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-common-functions
167 17:41:15.119715 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-echo-ipv4
168 17:41:15.120224 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-install-packages
169 17:41:15.120704 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-installed-packages
170 17:41:15.121171 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-os-build
171 17:41:15.121642 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-probe-channel
172 17:41:15.122108 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-probe-ip
173 17:41:15.122615 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-target-ip
174 17:41:15.123102 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-target-mac
175 17:41:15.123575 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-target-storage
176 17:41:15.124088 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-test-case
177 17:41:15.124575 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-test-event
178 17:41:15.125048 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-test-feedback
179 17:41:15.125520 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-test-raise
180 17:41:15.125988 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-test-reference
181 17:41:15.126479 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-test-runner
182 17:41:15.126972 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-test-set
183 17:41:15.127440 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-test-shell
184 17:41:15.127918 Updating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-add-keys (debian)
185 17:41:15.128481 Updating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-add-sources (debian)
186 17:41:15.128985 Updating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-install-packages (debian)
187 17:41:15.129480 Updating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-installed-packages (debian)
188 17:41:15.130036 Updating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/bin/lava-os-build (debian)
189 17:41:15.130478 Creating /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/environment
190 17:41:15.130841 LAVA metadata
191 17:41:15.131099 - LAVA_JOB_ID=953207
192 17:41:15.131315 - LAVA_DISPATCHER_IP=192.168.6.2
193 17:41:15.131665 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 17:41:15.132618 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 17:41:15.132929 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 17:41:15.133135 skipped lava-vland-overlay
197 17:41:15.133375 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 17:41:15.133628 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 17:41:15.133847 skipped lava-multinode-overlay
200 17:41:15.134089 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 17:41:15.134340 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 17:41:15.134584 Loading test definitions
203 17:41:15.134858 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 17:41:15.135077 Using /lava-953207 at stage 0
205 17:41:15.136192 uuid=953207_1.6.2.4.1 testdef=None
206 17:41:15.136501 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 17:41:15.136763 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 17:41:15.138298 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 17:41:15.139083 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 17:41:15.141020 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 17:41:15.141839 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 17:41:15.143635 runner path: /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/0/tests/0_timesync-off test_uuid 953207_1.6.2.4.1
215 17:41:15.144194 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 17:41:15.145015 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 17:41:15.145238 Using /lava-953207 at stage 0
219 17:41:15.145582 Fetching tests from https://github.com/kernelci/test-definitions.git
220 17:41:15.145873 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/0/tests/1_kselftest-alsa'
221 17:41:18.687034 Running '/usr/bin/git checkout kernelci.org
222 17:41:19.143622 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 17:41:19.145119 uuid=953207_1.6.2.4.5 testdef=None
224 17:41:19.145465 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 17:41:19.146211 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 17:41:19.149075 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 17:41:19.149888 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 17:41:19.153631 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 17:41:19.154481 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 17:41:19.158052 runner path: /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/0/tests/1_kselftest-alsa test_uuid 953207_1.6.2.4.5
234 17:41:19.158330 BOARD='meson-sm1-s905d3-libretech-cc'
235 17:41:19.158535 BRANCH='next'
236 17:41:19.158732 SKIPFILE='/dev/null'
237 17:41:19.158928 SKIP_INSTALL='True'
238 17:41:19.159122 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 17:41:19.159321 TST_CASENAME=''
240 17:41:19.159515 TST_CMDFILES='alsa'
241 17:41:19.160063 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 17:41:19.160850 Creating lava-test-runner.conf files
244 17:41:19.161055 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953207/lava-overlay-a4wxhvcw/lava-953207/0 for stage 0
245 17:41:19.161410 - 0_timesync-off
246 17:41:19.161653 - 1_kselftest-alsa
247 17:41:19.161982 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 17:41:19.162262 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 17:41:42.641098 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 17:41:42.641545 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 17:41:42.641813 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 17:41:42.642085 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 17:41:42.642351 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 17:41:43.402485 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 17:41:43.402978 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 17:41:43.403234 extracting modules file /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953207/extract-nfsrootfs-0d_d6905
257 17:41:44.768704 extracting modules file /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953207/extract-overlay-ramdisk-h698wo13/ramdisk
258 17:41:46.169615 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 17:41:46.170098 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 17:41:46.170381 [common] Applying overlay to NFS
261 17:41:46.170597 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953207/compress-overlay-x8evpbhq/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953207/extract-nfsrootfs-0d_d6905
262 17:41:48.933694 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 17:41:48.934165 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 17:41:48.934440 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 17:41:48.934671 Converting downloaded kernel to a uImage
266 17:41:48.934994 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/kernel/Image /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/kernel/uImage
267 17:41:49.417546 output: Image Name:
268 17:41:49.417965 output: Created: Thu Nov 7 17:41:48 2024
269 17:41:49.418177 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 17:41:49.418385 output: Data Size: 46121472 Bytes = 45040.50 KiB = 43.98 MiB
271 17:41:49.418586 output: Load Address: 01080000
272 17:41:49.418788 output: Entry Point: 01080000
273 17:41:49.418986 output:
274 17:41:49.419319 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 17:41:49.419588 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 17:41:49.419859 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 17:41:49.420167 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 17:41:49.420434 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 17:41:49.420693 Building ramdisk /var/lib/lava/dispatcher/tmp/953207/extract-overlay-ramdisk-h698wo13/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953207/extract-overlay-ramdisk-h698wo13/ramdisk
280 17:41:51.611374 >> 168069 blocks
281 17:41:59.380852 Adding RAMdisk u-boot header.
282 17:41:59.381535 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953207/extract-overlay-ramdisk-h698wo13/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953207/extract-overlay-ramdisk-h698wo13/ramdisk.cpio.gz.uboot
283 17:41:59.650376 output: Image Name:
284 17:41:59.650810 output: Created: Thu Nov 7 17:41:59 2024
285 17:41:59.651025 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 17:41:59.651231 output: Data Size: 23558563 Bytes = 23006.41 KiB = 22.47 MiB
287 17:41:59.651434 output: Load Address: 00000000
288 17:41:59.651635 output: Entry Point: 00000000
289 17:41:59.651836 output:
290 17:41:59.652727 rename /var/lib/lava/dispatcher/tmp/953207/extract-overlay-ramdisk-h698wo13/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/ramdisk/ramdisk.cpio.gz.uboot
291 17:41:59.653469 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 17:41:59.654008 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 17:41:59.654535 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 17:41:59.654997 No LXC device requested
295 17:41:59.655495 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 17:41:59.656035 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 17:41:59.656546 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 17:41:59.656961 Checking files for TFTP limit of 4294967296 bytes.
299 17:41:59.659615 end: 1 tftp-deploy (duration 00:01:18) [common]
300 17:41:59.660208 start: 2 uboot-action (timeout 00:05:00) [common]
301 17:41:59.660733 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 17:41:59.661225 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 17:41:59.661727 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 17:41:59.662250 Using kernel file from prepare-kernel: 953207/tftp-deploy-2q3k7c3y/kernel/uImage
305 17:41:59.662875 substitutions:
306 17:41:59.663284 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 17:41:59.663687 - {DTB_ADDR}: 0x01070000
308 17:41:59.664129 - {DTB}: 953207/tftp-deploy-2q3k7c3y/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 17:41:59.664536 - {INITRD}: 953207/tftp-deploy-2q3k7c3y/ramdisk/ramdisk.cpio.gz.uboot
310 17:41:59.664933 - {KERNEL_ADDR}: 0x01080000
311 17:41:59.665326 - {KERNEL}: 953207/tftp-deploy-2q3k7c3y/kernel/uImage
312 17:41:59.665719 - {LAVA_MAC}: None
313 17:41:59.666144 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953207/extract-nfsrootfs-0d_d6905
314 17:41:59.666538 - {NFS_SERVER_IP}: 192.168.6.2
315 17:41:59.666930 - {PRESEED_CONFIG}: None
316 17:41:59.667320 - {PRESEED_LOCAL}: None
317 17:41:59.667712 - {RAMDISK_ADDR}: 0x08000000
318 17:41:59.668136 - {RAMDISK}: 953207/tftp-deploy-2q3k7c3y/ramdisk/ramdisk.cpio.gz.uboot
319 17:41:59.668531 - {ROOT_PART}: None
320 17:41:59.668918 - {ROOT}: None
321 17:41:59.669303 - {SERVER_IP}: 192.168.6.2
322 17:41:59.669685 - {TEE_ADDR}: 0x83000000
323 17:41:59.670069 - {TEE}: None
324 17:41:59.670454 Parsed boot commands:
325 17:41:59.670829 - setenv autoload no
326 17:41:59.671210 - setenv initrd_high 0xffffffff
327 17:41:59.671591 - setenv fdt_high 0xffffffff
328 17:41:59.671973 - dhcp
329 17:41:59.672382 - setenv serverip 192.168.6.2
330 17:41:59.672768 - tftpboot 0x01080000 953207/tftp-deploy-2q3k7c3y/kernel/uImage
331 17:41:59.673156 - tftpboot 0x08000000 953207/tftp-deploy-2q3k7c3y/ramdisk/ramdisk.cpio.gz.uboot
332 17:41:59.673543 - tftpboot 0x01070000 953207/tftp-deploy-2q3k7c3y/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 17:41:59.673933 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953207/extract-nfsrootfs-0d_d6905,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 17:41:59.674336 - bootm 0x01080000 0x08000000 0x01070000
335 17:41:59.674827 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 17:41:59.676339 start: 2.3 connect-device (timeout 00:05:00) [common]
338 17:41:59.676758 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 17:41:59.692022 Setting prompt string to ['lava-test: # ']
340 17:41:59.693499 end: 2.3 connect-device (duration 00:00:00) [common]
341 17:41:59.694096 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 17:41:59.694637 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 17:41:59.695180 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 17:41:59.696548 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 17:41:59.734251 >> OK - accepted request
346 17:41:59.736437 Returned 0 in 0 seconds
347 17:41:59.837516 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 17:41:59.839064 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 17:41:59.839609 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 17:41:59.840180 Setting prompt string to ['Hit any key to stop autoboot']
352 17:41:59.840633 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 17:41:59.842163 Trying 192.168.56.21...
354 17:41:59.842632 Connected to conserv1.
355 17:41:59.843042 Escape character is '^]'.
356 17:41:59.843444
357 17:41:59.843857 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 17:41:59.844310
359 17:42:06.612108 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 17:42:06.612752 bl2_stage_init 0x01
361 17:42:06.613181 bl2_stage_init 0x81
362 17:42:06.617640 hw id: 0x0000 - pwm id 0x01
363 17:42:06.618128 bl2_stage_init 0xc1
364 17:42:06.622406 bl2_stage_init 0x02
365 17:42:06.622877
366 17:42:06.623308 L0:00000000
367 17:42:06.623721 L1:00000703
368 17:42:06.624162 L2:00008067
369 17:42:06.627819 L3:15000000
370 17:42:06.628299 S1:00000000
371 17:42:06.628710 B2:20282000
372 17:42:06.629103 B1:a0f83180
373 17:42:06.629489
374 17:42:06.629879 TE: 70306
375 17:42:06.630270
376 17:42:06.639194 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 17:42:06.639649
378 17:42:06.640076 Board ID = 1
379 17:42:06.640470 Set cpu clk to 24M
380 17:42:06.640860 Set clk81 to 24M
381 17:42:06.642619 Use GP1_pll as DSU clk.
382 17:42:06.643066 DSU clk: 1200 Mhz
383 17:42:06.648154 CPU clk: 1200 MHz
384 17:42:06.648596 Set clk81 to 166.6M
385 17:42:06.653771 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 17:42:06.654217 board id: 1
387 17:42:06.662899 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 17:42:06.674825 fw parse done
389 17:42:06.680802 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 17:42:06.724075 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 17:42:06.735084 PIEI prepare done
392 17:42:06.735520 fastboot data load
393 17:42:06.735916 fastboot data verify
394 17:42:06.740646 verify result: 266
395 17:42:06.746246 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 17:42:06.746686 LPDDR4 probe
397 17:42:06.747080 ddr clk to 1584MHz
398 17:42:06.754197 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 17:42:06.791946
400 17:42:06.792415 dmc_version 0001
401 17:42:06.798972 Check phy result
402 17:42:06.804932 INFO : End of CA training
403 17:42:06.805359 INFO : End of initialization
404 17:42:06.810525 INFO : Training has run successfully!
405 17:42:06.810954 Check phy result
406 17:42:06.816260 INFO : End of initialization
407 17:42:06.816685 INFO : End of read enable training
408 17:42:06.819417 INFO : End of fine write leveling
409 17:42:06.824959 INFO : End of Write leveling coarse delay
410 17:42:06.830569 INFO : Training has run successfully!
411 17:42:06.831003 Check phy result
412 17:42:06.831408 INFO : End of initialization
413 17:42:06.836246 INFO : End of read dq deskew training
414 17:42:06.839571 INFO : End of MPR read delay center optimization
415 17:42:06.845103 INFO : End of write delay center optimization
416 17:42:06.850706 INFO : End of read delay center optimization
417 17:42:06.851136 INFO : End of max read latency training
418 17:42:06.856369 INFO : Training has run successfully!
419 17:42:06.856803 1D training succeed
420 17:42:06.864547 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 17:42:06.912798 Check phy result
422 17:42:06.913223 INFO : End of initialization
423 17:42:06.940255 INFO : End of 2D read delay Voltage center optimization
424 17:42:06.964385 INFO : End of 2D read delay Voltage center optimization
425 17:42:07.021116 INFO : End of 2D write delay Voltage center optimization
426 17:42:07.075223 INFO : End of 2D write delay Voltage center optimization
427 17:42:07.080747 INFO : Training has run successfully!
428 17:42:07.081187
429 17:42:07.081587 channel==0
430 17:42:07.086442 RxClkDly_Margin_A0==88 ps 9
431 17:42:07.086872 TxDqDly_Margin_A0==88 ps 9
432 17:42:07.091842 RxClkDly_Margin_A1==88 ps 9
433 17:42:07.092302 TxDqDly_Margin_A1==88 ps 9
434 17:42:07.092698 TrainedVREFDQ_A0==74
435 17:42:07.097513 TrainedVREFDQ_A1==74
436 17:42:07.097947 VrefDac_Margin_A0==24
437 17:42:07.098341 DeviceVref_Margin_A0==40
438 17:42:07.103700 VrefDac_Margin_A1==23
439 17:42:07.104160 DeviceVref_Margin_A1==40
440 17:42:07.104554
441 17:42:07.104943
442 17:42:07.105331 channel==1
443 17:42:07.109552 RxClkDly_Margin_A0==88 ps 9
444 17:42:07.109987 TxDqDly_Margin_A0==88 ps 9
445 17:42:07.114942 RxClkDly_Margin_A1==78 ps 8
446 17:42:07.115374 TxDqDly_Margin_A1==88 ps 9
447 17:42:07.115769 TrainedVREFDQ_A0==75
448 17:42:07.120517 TrainedVREFDQ_A1==75
449 17:42:07.120949 VrefDac_Margin_A0==23
450 17:42:07.122485 DeviceVref_Margin_A0==38
451 17:42:07.128066 VrefDac_Margin_A1==22
452 17:42:07.128497 DeviceVref_Margin_A1==39
453 17:42:07.128888
454 17:42:07.133598 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 17:42:07.134026
456 17:42:07.161640 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
457 17:42:07.167221 2D training succeed
458 17:42:07.172730 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 17:42:07.173164 auto size-- 65535DDR cs0 size: 2048MB
460 17:42:07.178317 DDR cs1 size: 2048MB
461 17:42:07.178741 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 17:42:07.183916 cs0 DataBus test pass
463 17:42:07.184386 cs1 DataBus test pass
464 17:42:07.184779 cs0 AddrBus test pass
465 17:42:07.189546 cs1 AddrBus test pass
466 17:42:07.189977
467 17:42:07.190370 100bdlr_step_size ps== 485
468 17:42:07.195227 result report
469 17:42:07.195664 boot times 0Enable ddr reg access
470 17:42:07.203187 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 17:42:07.217050 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 17:42:07.876460 bl2z: ptr: 05129330, size: 00001e40
473 17:42:07.884087 0.0;M3 CHK:0;cm4_sp_mode 0
474 17:42:07.884585 MVN_1=0x00000000
475 17:42:07.885005 MVN_2=0x00000000
476 17:42:07.895527 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 17:42:07.896064 OPS=0x04
478 17:42:07.896489 ring efuse init
479 17:42:07.901299 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 17:42:07.901776 [0.017355 Inits done]
481 17:42:07.902189 secure task start!
482 17:42:07.908653 high task start!
483 17:42:07.909124 low task start!
484 17:42:07.909534 run into bl31
485 17:42:07.917303 NOTICE: BL31: v1.3(release):4fc40b1
486 17:42:07.925087 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 17:42:07.925559 NOTICE: BL31: G12A normal boot!
488 17:42:07.940714 NOTICE: BL31: BL33 decompress pass
489 17:42:07.946441 ERROR: Error initializing runtime service opteed_fast
490 17:42:09.156390 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0
491 17:42:09.157009 bl2_stage_init 0x01
492 17:42:09.157428 bl2_stage_init 0x81
493 17:42:09.161955 hw id: 0x0000 - pwm id 0x01
494 17:42:09.162413 bl2_stage_init 0xc1
495 17:42:09.167523 bl2_stage_init 0x02
496 17:42:09.167976
497 17:42:09.168440 L0:00000000
498 17:42:09.168852 L1:00000703
499 17:42:09.169255 L2:00008067
500 17:42:09.169654 L3:15000000
501 17:42:09.173121 S1:00000000
502 17:42:09.173572 B2:20282000
503 17:42:09.173977 B1:a0f83180
504 17:42:09.174377
505 17:42:09.174777 TE: 64467
506 17:42:09.175172
507 17:42:09.178734 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 17:42:09.179184
509 17:42:09.184351 Board ID = 1
510 17:42:09.184806 Set cpu clk to 24M
511 17:42:09.185216 Set clk81 to 24M
512 17:42:09.189924 Use GP1_pll as DSU clk.
513 17:42:09.190377 DSU clk: 1200 Mhz
514 17:42:09.190786 CPU clk: 1200 MHz
515 17:42:09.195499 Set clk81 to 166.6M
516 17:42:09.473882 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 17:42:09.474501 board id: 1
518 17:42:09.474922 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 17:42:09.475335 fw parse done
520 17:42:09.475738 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 17:42:09.476210 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 17:42:09.476853 PIEI prepare done
523 17:42:09.477284 fastboot data load
524 17:42:09.477692 fastboot data verify
525 17:42:09.478094 verify result: 266
526 17:42:09.478490 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 17:42:09.478887 LPDDR4 probe
528 17:42:09.479280 ddr clk to 1584MHz
529 17:42:09.480027 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 17:42:10.662145 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
531 17:42:10.662775 bl2_stage_init 0x01
532 17:42:10.663210 bl2_stage_init 0x81
533 17:42:10.667802 hw id: 0x0000 - pwm id 0x01
534 17:42:10.668373 bl2_stage_init 0xc1
535 17:42:10.673349 bl2_stage_init 0x02
536 17:42:10.673849
537 17:42:10.674249 L0:00000000
538 17:42:10.674639 L1:00000703
539 17:42:10.675024 L2:00008067
540 17:42:10.675407 L3:15000000
541 17:42:10.678897 S1:00000000
542 17:42:10.679343 B2:20282000
543 17:42:10.679736 B1:a0f83180
544 17:42:10.680162
545 17:42:10.680552 TE: 70676
546 17:42:10.680937
547 17:42:10.684515 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
548 17:42:10.684962
549 17:42:10.690077 Board ID = 1
550 17:42:10.690523 Set cpu clk to 24M
551 17:42:10.690915 Set clk81 to 24M
552 17:42:10.695684 Use GP1_pll as DSU clk.
553 17:42:10.696173 DSU clk: 1200 Mhz
554 17:42:10.696563 CPU clk: 1200 MHz
555 17:42:10.701297 Set clk81 to 166.6M
556 17:42:10.706921 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
557 17:42:10.707377 board id: 1
558 17:42:10.714125 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
559 17:42:10.724785 fw parse done
560 17:42:10.730727 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 17:42:10.773377 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
562 17:42:10.784299 PIEI prepare done
563 17:42:10.784762 fastboot data load
564 17:42:10.785155 fastboot data verify
565 17:42:10.789965 verify result: 266
566 17:42:10.795550 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
567 17:42:10.796047 LPDDR4 probe
568 17:42:10.796446 ddr clk to 1584MHz
569 17:42:10.803557 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
570 17:42:10.840800
571 17:42:10.841270 dmc_version 0001
572 17:42:10.847480 Check phy result
573 17:42:10.853368 INFO : End of CA training
574 17:42:10.853818 INFO : End of initialization
575 17:42:10.858992 INFO : Training has run successfully!
576 17:42:10.859441 Check phy result
577 17:42:10.864570 INFO : End of initialization
578 17:42:10.865022 INFO : End of read enable training
579 17:42:10.870167 INFO : End of fine write leveling
580 17:42:10.875760 INFO : End of Write leveling coarse delay
581 17:42:10.876239 INFO : Training has run successfully!
582 17:42:10.876640 Check phy result
583 17:42:10.881385 INFO : End of initialization
584 17:42:10.881865 INFO : End of read dq deskew training
585 17:42:10.886964 INFO : End of MPR read delay center optimization
586 17:42:10.892563 INFO : End of write delay center optimization
587 17:42:10.898166 INFO : End of read delay center optimization
588 17:42:10.898612 INFO : End of max read latency training
589 17:42:10.903777 INFO : Training has run successfully!
590 17:42:10.904279 1D training succeed
591 17:42:10.912931 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
592 17:42:10.960544 Check phy result
593 17:42:10.961012 INFO : End of initialization
594 17:42:10.982894 INFO : End of 2D read delay Voltage center optimization
595 17:42:11.002072 INFO : End of 2D read delay Voltage center optimization
596 17:42:11.053927 INFO : End of 2D write delay Voltage center optimization
597 17:42:11.103152 INFO : End of 2D write delay Voltage center optimization
598 17:42:11.108751 INFO : Training has run successfully!
599 17:42:11.109229
600 17:42:11.109631 channel==0
601 17:42:11.114320 RxClkDly_Margin_A0==78 ps 8
602 17:42:11.114765 TxDqDly_Margin_A0==98 ps 10
603 17:42:11.119890 RxClkDly_Margin_A1==88 ps 9
604 17:42:11.120384 TxDqDly_Margin_A1==98 ps 10
605 17:42:11.120784 TrainedVREFDQ_A0==74
606 17:42:11.125513 TrainedVREFDQ_A1==74
607 17:42:11.125958 VrefDac_Margin_A0==23
608 17:42:11.126349 DeviceVref_Margin_A0==40
609 17:42:11.131114 VrefDac_Margin_A1==22
610 17:42:11.131562 DeviceVref_Margin_A1==40
611 17:42:11.131954
612 17:42:11.132384
613 17:42:11.136732 channel==1
614 17:42:11.137177 RxClkDly_Margin_A0==78 ps 8
615 17:42:11.137573 TxDqDly_Margin_A0==88 ps 9
616 17:42:11.142328 RxClkDly_Margin_A1==78 ps 8
617 17:42:11.142775 TxDqDly_Margin_A1==88 ps 9
618 17:42:11.147912 TrainedVREFDQ_A0==75
619 17:42:11.148392 TrainedVREFDQ_A1==75
620 17:42:11.148793 VrefDac_Margin_A0==22
621 17:42:11.153534 DeviceVref_Margin_A0==39
622 17:42:11.154005 VrefDac_Margin_A1==22
623 17:42:11.159139 DeviceVref_Margin_A1==39
624 17:42:11.159610
625 17:42:11.160035 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
626 17:42:11.160429
627 17:42:11.192683 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
628 17:42:11.193275 2D training succeed
629 17:42:11.198394 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
630 17:42:11.203967 auto size-- 65535DDR cs0 size: 2048MB
631 17:42:11.204503 DDR cs1 size: 2048MB
632 17:42:11.209559 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
633 17:42:11.210056 cs0 DataBus test pass
634 17:42:11.215174 cs1 DataBus test pass
635 17:42:11.215681 cs0 AddrBus test pass
636 17:42:11.216113 cs1 AddrBus test pass
637 17:42:11.216508
638 17:42:11.220764 100bdlr_step_size ps== 478
639 17:42:11.221257 result report
640 17:42:11.226361 boot times 0Enable ddr reg access
641 17:42:11.231520 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
642 17:42:11.245317 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
643 17:42:11.900293 bl2z: ptr: 05129330, size: 00001e40
644 17:42:11.907307 0.0;M3 CHK:0;cm4_sp_mode 0
645 17:42:11.907779 MVN_1=0x00000000
646 17:42:11.908249 MVN_2=0x00000000
647 17:42:11.918752 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
648 17:42:11.919212 OPS=0x04
649 17:42:11.919623 ring efuse init
650 17:42:11.924405 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
651 17:42:11.924865 [0.017319 Inits done]
652 17:42:11.925271 secure task start!
653 17:42:11.932426 high task start!
654 17:42:11.932878 low task start!
655 17:42:11.933286 run into bl31
656 17:42:11.941058 NOTICE: BL31: v1.3(release):4fc40b1
657 17:42:11.948852 NOTICE: BL31: Built : 15:57:33, May 22 2019
658 17:42:11.949302 NOTICE: BL31: G12A normal boot!
659 17:42:11.964447 NOTICE: BL31: BL33 decompress pass
660 17:42:11.970150 ERROR: Error initializing runtime service opteed_fast
661 17:42:13.210547 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
662 17:42:13.211159 bl2_stage_init 0x01
663 17:42:13.211582 bl2_stage_init 0x81
664 17:42:13.216208 hw id: 0x0000 - pwm id 0x01
665 17:42:13.216672 bl2_stage_init 0xc1
666 17:42:13.221764 bl2_stage_init 0x02
667 17:42:13.222221
668 17:42:13.222636 L0:00000000
669 17:42:13.223036 L1:00000703
670 17:42:13.223434 L2:00008067
671 17:42:13.223824 L3:15000000
672 17:42:13.227424 S1:00000000
673 17:42:13.227878 B2:20282000
674 17:42:13.228321 B1:a0f83180
675 17:42:13.228727
676 17:42:13.229126 TE: 68736
677 17:42:13.229525
678 17:42:13.233025 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
679 17:42:13.233484
680 17:42:13.238599 Board ID = 1
681 17:42:13.239050 Set cpu clk to 24M
682 17:42:13.239458 Set clk81 to 24M
683 17:42:13.244203 Use GP1_pll as DSU clk.
684 17:42:13.244655 DSU clk: 1200 Mhz
685 17:42:13.245060 CPU clk: 1200 MHz
686 17:42:13.249745 Set clk81 to 166.6M
687 17:42:13.255389 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
688 17:42:13.255843 board id: 1
689 17:42:13.262629 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
690 17:42:13.273415 fw parse done
691 17:42:13.279553 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 17:42:13.322486 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
693 17:42:13.333670 PIEI prepare done
694 17:42:13.334120 fastboot data load
695 17:42:13.334531 fastboot data verify
696 17:42:13.339295 verify result: 266
697 17:42:13.344855 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
698 17:42:13.345312 LPDDR4 probe
699 17:42:13.345721 ddr clk to 1584MHz
700 17:42:13.352861 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
701 17:42:13.390617
702 17:42:13.391096 dmc_version 0001
703 17:42:13.397659 Check phy result
704 17:42:13.403626 INFO : End of CA training
705 17:42:13.404114 INFO : End of initialization
706 17:42:13.409268 INFO : Training has run successfully!
707 17:42:13.409766 Check phy result
708 17:42:13.414923 INFO : End of initialization
709 17:42:13.415682 INFO : End of read enable training
710 17:42:13.418209 INFO : End of fine write leveling
711 17:42:13.423670 INFO : End of Write leveling coarse delay
712 17:42:13.429312 INFO : Training has run successfully!
713 17:42:13.429763 Check phy result
714 17:42:13.430167 INFO : End of initialization
715 17:42:13.434884 INFO : End of read dq deskew training
716 17:42:13.440479 INFO : End of MPR read delay center optimization
717 17:42:13.440927 INFO : End of write delay center optimization
718 17:42:13.446116 INFO : End of read delay center optimization
719 17:42:13.451710 INFO : End of max read latency training
720 17:42:13.452201 INFO : Training has run successfully!
721 17:42:13.457335 1D training succeed
722 17:42:13.463252 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
723 17:42:13.511550 Check phy result
724 17:42:13.512071 INFO : End of initialization
725 17:42:13.539029 INFO : End of 2D read delay Voltage center optimization
726 17:42:13.563131 INFO : End of 2D read delay Voltage center optimization
727 17:42:13.619817 INFO : End of 2D write delay Voltage center optimization
728 17:42:13.673807 INFO : End of 2D write delay Voltage center optimization
729 17:42:13.679388 INFO : Training has run successfully!
730 17:42:13.679838
731 17:42:13.680297 channel==0
732 17:42:13.684950 RxClkDly_Margin_A0==78 ps 8
733 17:42:13.685401 TxDqDly_Margin_A0==98 ps 10
734 17:42:13.690617 RxClkDly_Margin_A1==88 ps 9
735 17:42:13.691068 TxDqDly_Margin_A1==98 ps 10
736 17:42:13.691479 TrainedVREFDQ_A0==74
737 17:42:13.696268 TrainedVREFDQ_A1==74
738 17:42:13.696725 VrefDac_Margin_A0==24
739 17:42:13.697134 DeviceVref_Margin_A0==40
740 17:42:13.701811 VrefDac_Margin_A1==23
741 17:42:13.702260 DeviceVref_Margin_A1==40
742 17:42:13.702663
743 17:42:13.703060
744 17:42:13.707412 channel==1
745 17:42:13.707864 RxClkDly_Margin_A0==78 ps 8
746 17:42:13.708307 TxDqDly_Margin_A0==98 ps 10
747 17:42:13.713006 RxClkDly_Margin_A1==78 ps 8
748 17:42:13.713459 TxDqDly_Margin_A1==88 ps 9
749 17:42:13.718626 TrainedVREFDQ_A0==75
750 17:42:13.719083 TrainedVREFDQ_A1==77
751 17:42:13.719495 VrefDac_Margin_A0==22
752 17:42:13.724225 DeviceVref_Margin_A0==39
753 17:42:13.724677 VrefDac_Margin_A1==22
754 17:42:13.729823 DeviceVref_Margin_A1==37
755 17:42:13.730272
756 17:42:13.730680 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
757 17:42:13.731082
758 17:42:13.763257 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
759 17:42:13.763738 2D training succeed
760 17:42:13.768956 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
761 17:42:13.774455 auto size-- 65535DDR cs0 size: 2048MB
762 17:42:13.774906 DDR cs1 size: 2048MB
763 17:42:13.780083 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
764 17:42:13.780536 cs0 DataBus test pass
765 17:42:13.785675 cs1 DataBus test pass
766 17:42:13.786122 cs0 AddrBus test pass
767 17:42:13.786526 cs1 AddrBus test pass
768 17:42:13.786920
769 17:42:13.791263 100bdlr_step_size ps== 471
770 17:42:13.791719 result report
771 17:42:13.796858 boot times 0Enable ddr reg access
772 17:42:13.802141 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
773 17:42:13.815962 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
774 17:42:14.475920 bl2z: ptr: 05129330, size: 00001e40
775 17:42:14.484059 0.0;M3 CHK:0;cm4_sp_mode 0
776 17:42:14.484617 MVN_1=0x00000000
777 17:42:14.485033 MVN_2=0x00000000
778 17:42:14.495475 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
779 17:42:14.496105 OPS=0x04
780 17:42:14.496536 ring efuse init
781 17:42:14.498387 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
782 17:42:14.504324 [0.017355 Inits done]
783 17:42:14.504875 secure task start!
784 17:42:14.505294 high task start!
785 17:42:14.505703 low task start!
786 17:42:14.508596 run into bl31
787 17:42:14.517619 NOTICE: BL31: v1.3(release):4fc40b1
788 17:42:14.525066 NOTICE: BL31: Built : 15:57:33, May 22 2019
789 17:42:14.525680 NOTICE: BL31: G12A normal boot!
790 17:42:14.540599 NOTICE: BL31: BL33 decompress pass
791 17:42:14.546232 ERROR: Error initializing runtime service opteed_fast
792 17:42:15.341738
793 17:42:15.342372
794 17:42:15.347074 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
795 17:42:15.347543
796 17:42:15.350558 Model: Libre Computer AML-S905D3-CC Solitude
797 17:42:15.497675 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
798 17:42:15.513017 DRAM: 2 GiB (effective 3.8 GiB)
799 17:42:15.613979 Core: 406 devices, 33 uclasses, devicetree: separate
800 17:42:15.619824 WDT: Not starting watchdog@f0d0
801 17:42:15.644884 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
802 17:42:15.657119 Loading Environment from FAT... Card did not respond to voltage select! : -110
803 17:42:15.662120 ** Bad device specification mmc 0 **
804 17:42:15.672240 Card did not respond to voltage select! : -110
805 17:42:15.679855 ** Bad device specification mmc 0 **
806 17:42:15.680372 Couldn't find partition mmc 0
807 17:42:15.688190 Card did not respond to voltage select! : -110
808 17:42:15.693659 ** Bad device specification mmc 0 **
809 17:42:15.694112 Couldn't find partition mmc 0
810 17:42:15.698707 Error: could not access storage.
811 17:42:15.995100 Net: eth0: ethernet@ff3f0000
812 17:42:15.995657 starting USB...
813 17:42:16.239813 Bus usb@ff500000: Register 3000140 NbrPorts 3
814 17:42:16.240384 Starting the controller
815 17:42:16.246781 USB XHCI 1.10
816 17:42:17.802989 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
817 17:42:17.811268 scanning usb for storage devices... 0 Storage Device(s) found
819 17:42:17.862745 Hit any key to stop autoboot: 1
820 17:42:17.863622 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
821 17:42:17.864314 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
822 17:42:17.864807 Setting prompt string to ['=>']
823 17:42:17.865292 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
824 17:42:17.877300 0
825 17:42:17.878173 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
827 17:42:17.979340 => setenv autoload no
828 17:42:17.980191 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
829 17:42:17.985015 setenv autoload no
831 17:42:18.086460 => setenv initrd_high 0xffffffff
832 17:42:18.087337 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
833 17:42:18.091514 setenv initrd_high 0xffffffff
835 17:42:18.192946 => setenv fdt_high 0xffffffff
836 17:42:18.193737 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
837 17:42:18.197931 setenv fdt_high 0xffffffff
839 17:42:18.299350 => dhcp
840 17:42:18.300119 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
841 17:42:18.304054 dhcp
842 17:42:19.360251 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
843 17:42:19.360881 Speed: 1000, full duplex
844 17:42:19.361294 BOOTP broadcast 1
845 17:42:19.370092 DHCP client bound to address 192.168.6.21 (9 ms)
847 17:42:19.471681 => setenv serverip 192.168.6.2
848 17:42:19.472454 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
849 17:42:19.476969 setenv serverip 192.168.6.2
851 17:42:19.578422 => tftpboot 0x01080000 953207/tftp-deploy-2q3k7c3y/kernel/uImage
852 17:42:19.578977 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
853 17:42:19.585641 tftpboot 0x01080000 953207/tftp-deploy-2q3k7c3y/kernel/uImage
854 17:42:19.585957 Speed: 1000, full duplex
855 17:42:19.586170 Using ethernet@ff3f0000 device
856 17:42:19.591405 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 17:42:19.596811 Filename '953207/tftp-deploy-2q3k7c3y/kernel/uImage'.
858 17:42:19.600841 Load address: 0x1080000
859 17:42:22.489037 Loading: *################################################## 44 MiB
860 17:42:22.489656 15.2 MiB/s
861 17:42:22.490062 done
862 17:42:22.493308 Bytes transferred = 46121536 (2bfc240 hex)
864 17:42:22.594745 => tftpboot 0x08000000 953207/tftp-deploy-2q3k7c3y/ramdisk/ramdisk.cpio.gz.uboot
865 17:42:22.595280 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
866 17:42:22.601915 tftpboot 0x08000000 953207/tftp-deploy-2q3k7c3y/ramdisk/ramdisk.cpio.gz.uboot
867 17:42:22.602159 Speed: 1000, full duplex
868 17:42:22.602360 Using ethernet@ff3f0000 device
869 17:42:22.607428 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 17:42:22.617298 Filename '953207/tftp-deploy-2q3k7c3y/ramdisk/ramdisk.cpio.gz.uboot'.
871 17:42:22.617747 Load address: 0x8000000
872 17:42:24.105778 Loading: *################################################# UDP wrong checksum 00000005 0000e1a3
873 17:42:29.107653 T UDP wrong checksum 00000005 0000e1a3
874 17:42:39.109695 T T UDP wrong checksum 00000005 0000e1a3
875 17:42:59.113731 T T T T UDP wrong checksum 00000005 0000e1a3
876 17:43:19.118423 T T T
877 17:43:19.119054 Retry count exceeded; starting again
879 17:43:19.120515 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
882 17:43:19.122363 end: 2.4 uboot-commands (duration 00:01:19) [common]
884 17:43:19.123749 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
886 17:43:19.124742 end: 2 uboot-action (duration 00:01:19) [common]
888 17:43:19.126238 Cleaning after the job
889 17:43:19.126772 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/ramdisk
890 17:43:19.128230 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/kernel
891 17:43:19.173538 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/dtb
892 17:43:19.174294 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/nfsrootfs
893 17:43:19.345621 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953207/tftp-deploy-2q3k7c3y/modules
894 17:43:19.366815 start: 4.1 power-off (timeout 00:00:30) [common]
895 17:43:19.367452 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
896 17:43:19.401187 >> OK - accepted request
897 17:43:19.403061 Returned 0 in 0 seconds
898 17:43:19.504145 end: 4.1 power-off (duration 00:00:00) [common]
900 17:43:19.505162 start: 4.2 read-feedback (timeout 00:10:00) [common]
901 17:43:19.505933 Listened to connection for namespace 'common' for up to 1s
902 17:43:20.506764 Finalising connection for namespace 'common'
903 17:43:20.507266 Disconnecting from shell: Finalise
904 17:43:20.507559 =>
905 17:43:20.608445 end: 4.2 read-feedback (duration 00:00:01) [common]
906 17:43:20.609153 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953207
907 17:43:23.774413 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953207
908 17:43:23.775203 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.