Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 17:55:21.545970 lava-dispatcher, installed at version: 2024.01
2 17:55:21.546803 start: 0 validate
3 17:55:21.547277 Start time: 2024-11-07 17:55:21.547247+00:00 (UTC)
4 17:55:21.547842 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 17:55:21.548415 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 17:55:21.591623 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 17:55:21.592209 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 17:55:21.619586 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 17:55:21.620439 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 17:55:21.654013 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 17:55:21.654477 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 17:55:21.685437 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 17:55:21.685900 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 17:55:21.725276 validate duration: 0.18
16 17:55:21.726086 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 17:55:21.726412 start: 1.1 download-retry (timeout 00:10:00) [common]
18 17:55:21.726702 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 17:55:21.727345 Not decompressing ramdisk as can be used compressed.
20 17:55:21.727815 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 17:55:21.728112 saving as /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/ramdisk/initrd.cpio.gz
22 17:55:21.728390 total size: 5628169 (5 MB)
23 17:55:21.766766 progress 0 % (0 MB)
24 17:55:21.774642 progress 5 % (0 MB)
25 17:55:21.782492 progress 10 % (0 MB)
26 17:55:21.789585 progress 15 % (0 MB)
27 17:55:21.794913 progress 20 % (1 MB)
28 17:55:21.798632 progress 25 % (1 MB)
29 17:55:21.802610 progress 30 % (1 MB)
30 17:55:21.806653 progress 35 % (1 MB)
31 17:55:21.810280 progress 40 % (2 MB)
32 17:55:21.814271 progress 45 % (2 MB)
33 17:55:21.817867 progress 50 % (2 MB)
34 17:55:21.821925 progress 55 % (2 MB)
35 17:55:21.825909 progress 60 % (3 MB)
36 17:55:21.829497 progress 65 % (3 MB)
37 17:55:21.833582 progress 70 % (3 MB)
38 17:55:21.837202 progress 75 % (4 MB)
39 17:55:21.841173 progress 80 % (4 MB)
40 17:55:21.844729 progress 85 % (4 MB)
41 17:55:21.848691 progress 90 % (4 MB)
42 17:55:21.852534 progress 95 % (5 MB)
43 17:55:21.855773 progress 100 % (5 MB)
44 17:55:21.856431 5 MB downloaded in 0.13 s (41.93 MB/s)
45 17:55:21.856966 end: 1.1.1 http-download (duration 00:00:00) [common]
47 17:55:21.857849 end: 1.1 download-retry (duration 00:00:00) [common]
48 17:55:21.858140 start: 1.2 download-retry (timeout 00:10:00) [common]
49 17:55:21.858411 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 17:55:21.858876 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/kernel/Image
51 17:55:21.859120 saving as /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/kernel/Image
52 17:55:21.859328 total size: 46121472 (43 MB)
53 17:55:21.859536 No compression specified
54 17:55:21.899131 progress 0 % (0 MB)
55 17:55:21.928159 progress 5 % (2 MB)
56 17:55:21.956663 progress 10 % (4 MB)
57 17:55:21.985995 progress 15 % (6 MB)
58 17:55:22.014663 progress 20 % (8 MB)
59 17:55:22.043905 progress 25 % (11 MB)
60 17:55:22.072877 progress 30 % (13 MB)
61 17:55:22.101467 progress 35 % (15 MB)
62 17:55:22.131120 progress 40 % (17 MB)
63 17:55:22.159528 progress 45 % (19 MB)
64 17:55:22.188497 progress 50 % (22 MB)
65 17:55:22.217685 progress 55 % (24 MB)
66 17:55:22.246409 progress 60 % (26 MB)
67 17:55:22.275863 progress 65 % (28 MB)
68 17:55:22.304911 progress 70 % (30 MB)
69 17:55:22.334100 progress 75 % (33 MB)
70 17:55:22.362955 progress 80 % (35 MB)
71 17:55:22.391927 progress 85 % (37 MB)
72 17:55:22.421085 progress 90 % (39 MB)
73 17:55:22.450185 progress 95 % (41 MB)
74 17:55:22.478561 progress 100 % (43 MB)
75 17:55:22.479217 43 MB downloaded in 0.62 s (70.96 MB/s)
76 17:55:22.479736 end: 1.2.1 http-download (duration 00:00:01) [common]
78 17:55:22.480628 end: 1.2 download-retry (duration 00:00:01) [common]
79 17:55:22.480927 start: 1.3 download-retry (timeout 00:09:59) [common]
80 17:55:22.481210 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 17:55:22.481701 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 17:55:22.481968 saving as /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 17:55:22.482184 total size: 53209 (0 MB)
84 17:55:22.482399 No compression specified
85 17:55:22.520946 progress 61 % (0 MB)
86 17:55:22.521877 progress 100 % (0 MB)
87 17:55:22.522456 0 MB downloaded in 0.04 s (1.26 MB/s)
88 17:55:22.522955 end: 1.3.1 http-download (duration 00:00:00) [common]
90 17:55:22.523814 end: 1.3 download-retry (duration 00:00:00) [common]
91 17:55:22.524127 start: 1.4 download-retry (timeout 00:09:59) [common]
92 17:55:22.524413 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 17:55:22.524891 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 17:55:22.525155 saving as /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/nfsrootfs/full.rootfs.tar
95 17:55:22.525371 total size: 120894716 (115 MB)
96 17:55:22.525589 Using unxz to decompress xz
97 17:55:22.557698 progress 0 % (0 MB)
98 17:55:23.338822 progress 5 % (5 MB)
99 17:55:24.170760 progress 10 % (11 MB)
100 17:55:24.955919 progress 15 % (17 MB)
101 17:55:25.690695 progress 20 % (23 MB)
102 17:55:26.281110 progress 25 % (28 MB)
103 17:55:27.114194 progress 30 % (34 MB)
104 17:55:27.899198 progress 35 % (40 MB)
105 17:55:28.263390 progress 40 % (46 MB)
106 17:55:28.648202 progress 45 % (51 MB)
107 17:55:29.361859 progress 50 % (57 MB)
108 17:55:30.247387 progress 55 % (63 MB)
109 17:55:31.033876 progress 60 % (69 MB)
110 17:55:31.788051 progress 65 % (74 MB)
111 17:55:32.570308 progress 70 % (80 MB)
112 17:55:33.396958 progress 75 % (86 MB)
113 17:55:34.178611 progress 80 % (92 MB)
114 17:55:34.934733 progress 85 % (98 MB)
115 17:55:35.886242 progress 90 % (103 MB)
116 17:55:36.715706 progress 95 % (109 MB)
117 17:55:37.543344 progress 100 % (115 MB)
118 17:55:37.555848 115 MB downloaded in 15.03 s (7.67 MB/s)
119 17:55:37.556482 end: 1.4.1 http-download (duration 00:00:15) [common]
121 17:55:37.557394 end: 1.4 download-retry (duration 00:00:15) [common]
122 17:55:37.557703 start: 1.5 download-retry (timeout 00:09:44) [common]
123 17:55:37.558009 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 17:55:37.558793 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/modules.tar.xz
125 17:55:37.559087 saving as /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/modules/modules.tar
126 17:55:37.559304 total size: 11684868 (11 MB)
127 17:55:37.559531 Using unxz to decompress xz
128 17:55:37.605447 progress 0 % (0 MB)
129 17:55:37.677475 progress 5 % (0 MB)
130 17:55:37.767634 progress 10 % (1 MB)
131 17:55:37.884845 progress 15 % (1 MB)
132 17:55:38.002407 progress 20 % (2 MB)
133 17:55:38.087445 progress 25 % (2 MB)
134 17:55:38.158084 progress 30 % (3 MB)
135 17:55:38.235005 progress 35 % (3 MB)
136 17:55:38.311096 progress 40 % (4 MB)
137 17:55:38.386339 progress 45 % (5 MB)
138 17:55:38.469649 progress 50 % (5 MB)
139 17:55:38.550493 progress 55 % (6 MB)
140 17:55:38.630938 progress 60 % (6 MB)
141 17:55:38.710559 progress 65 % (7 MB)
142 17:55:38.789983 progress 70 % (7 MB)
143 17:55:38.870584 progress 75 % (8 MB)
144 17:55:38.952870 progress 80 % (8 MB)
145 17:55:39.031825 progress 85 % (9 MB)
146 17:55:39.109228 progress 90 % (10 MB)
147 17:55:39.185796 progress 95 % (10 MB)
148 17:55:39.261122 progress 100 % (11 MB)
149 17:55:39.273629 11 MB downloaded in 1.71 s (6.50 MB/s)
150 17:55:39.274538 end: 1.5.1 http-download (duration 00:00:02) [common]
152 17:55:39.276320 end: 1.5 download-retry (duration 00:00:02) [common]
153 17:55:39.276891 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 17:55:39.277453 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 17:55:55.504477 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953269/extract-nfsrootfs-u344i7gk
156 17:55:55.505067 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 17:55:55.505350 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 17:55:55.505954 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2
159 17:55:55.506373 makedir: /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin
160 17:55:55.506698 makedir: /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/tests
161 17:55:55.507008 makedir: /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/results
162 17:55:55.507334 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-add-keys
163 17:55:55.507853 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-add-sources
164 17:55:55.508384 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-background-process-start
165 17:55:55.508905 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-background-process-stop
166 17:55:55.509544 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-common-functions
167 17:55:55.510096 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-echo-ipv4
168 17:55:55.510580 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-install-packages
169 17:55:55.511049 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-installed-packages
170 17:55:55.511510 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-os-build
171 17:55:55.511973 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-probe-channel
172 17:55:55.512492 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-probe-ip
173 17:55:55.512987 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-target-ip
174 17:55:55.513484 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-target-mac
175 17:55:55.513961 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-target-storage
176 17:55:55.514439 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-test-case
177 17:55:55.514908 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-test-event
178 17:55:55.515450 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-test-feedback
179 17:55:55.515928 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-test-raise
180 17:55:55.516437 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-test-reference
181 17:55:55.516936 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-test-runner
182 17:55:55.517433 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-test-set
183 17:55:55.517897 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-test-shell
184 17:55:55.518373 Updating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-add-keys (debian)
185 17:55:55.518894 Updating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-add-sources (debian)
186 17:55:55.519393 Updating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-install-packages (debian)
187 17:55:55.519886 Updating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-installed-packages (debian)
188 17:55:55.520410 Updating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/bin/lava-os-build (debian)
189 17:55:55.520839 Creating /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/environment
190 17:55:55.521209 LAVA metadata
191 17:55:55.521467 - LAVA_JOB_ID=953269
192 17:55:55.521678 - LAVA_DISPATCHER_IP=192.168.6.2
193 17:55:55.522041 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 17:55:55.522986 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 17:55:55.523296 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 17:55:55.523501 skipped lava-vland-overlay
197 17:55:55.523739 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 17:55:55.524009 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 17:55:55.524231 skipped lava-multinode-overlay
200 17:55:55.524473 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 17:55:55.524722 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 17:55:55.524965 Loading test definitions
203 17:55:55.525240 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 17:55:55.525458 Using /lava-953269 at stage 0
205 17:55:55.526539 uuid=953269_1.6.2.4.1 testdef=None
206 17:55:55.526846 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 17:55:55.527107 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 17:55:55.528661 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 17:55:55.529448 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 17:55:55.531385 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 17:55:55.532241 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 17:55:55.534079 runner path: /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/0/tests/0_timesync-off test_uuid 953269_1.6.2.4.1
215 17:55:55.534668 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 17:55:55.535486 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 17:55:55.535709 Using /lava-953269 at stage 0
219 17:55:55.536085 Fetching tests from https://github.com/kernelci/test-definitions.git
220 17:55:55.536380 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/0/tests/1_kselftest-rtc'
221 17:55:59.060882 Running '/usr/bin/git checkout kernelci.org
222 17:55:59.142779 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 17:55:59.144490 uuid=953269_1.6.2.4.5 testdef=None
224 17:55:59.145155 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 17:55:59.146751 start: 1.6.2.4.6 test-overlay (timeout 00:09:23) [common]
227 17:55:59.152677 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 17:55:59.154410 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:23) [common]
230 17:55:59.162260 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 17:55:59.164092 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:23) [common]
233 17:55:59.171703 runner path: /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/0/tests/1_kselftest-rtc test_uuid 953269_1.6.2.4.5
234 17:55:59.172304 BOARD='meson-sm1-s905d3-libretech-cc'
235 17:55:59.172751 BRANCH='next'
236 17:55:59.173182 SKIPFILE='/dev/null'
237 17:55:59.173612 SKIP_INSTALL='True'
238 17:55:59.174038 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 17:55:59.174472 TST_CASENAME=''
240 17:55:59.174901 TST_CMDFILES='rtc'
241 17:55:59.175945 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 17:55:59.177649 Creating lava-test-runner.conf files
244 17:55:59.178089 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953269/lava-overlay-pqoaxaj2/lava-953269/0 for stage 0
245 17:55:59.178788 - 0_timesync-off
246 17:55:59.179297 - 1_kselftest-rtc
247 17:55:59.179977 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 17:55:59.180614 start: 1.6.2.5 compress-overlay (timeout 00:09:23) [common]
249 17:56:22.482938 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 17:56:22.483372 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 17:56:22.483636 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 17:56:22.483902 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 17:56:22.484192 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 17:56:23.176112 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 17:56:23.176600 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 17:56:23.176869 extracting modules file /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953269/extract-nfsrootfs-u344i7gk
257 17:56:24.522868 extracting modules file /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953269/extract-overlay-ramdisk-woqn0so4/ramdisk
258 17:56:25.888402 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 17:56:25.888876 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 17:56:25.889166 [common] Applying overlay to NFS
261 17:56:25.889390 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953269/compress-overlay-y5gqrmm8/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953269/extract-nfsrootfs-u344i7gk
262 17:56:28.621431 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 17:56:28.621901 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 17:56:28.622205 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 17:56:28.622461 Converting downloaded kernel to a uImage
266 17:56:28.622786 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/kernel/Image /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/kernel/uImage
267 17:56:29.101717 output: Image Name:
268 17:56:29.102151 output: Created: Thu Nov 7 17:56:28 2024
269 17:56:29.102374 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 17:56:29.102588 output: Data Size: 46121472 Bytes = 45040.50 KiB = 43.98 MiB
271 17:56:29.102794 output: Load Address: 01080000
272 17:56:29.102997 output: Entry Point: 01080000
273 17:56:29.103198 output:
274 17:56:29.103537 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 17:56:29.103815 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 17:56:29.104135 start: 1.6.7 configure-preseed-file (timeout 00:08:53) [common]
277 17:56:29.104408 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 17:56:29.104677 start: 1.6.8 compress-ramdisk (timeout 00:08:53) [common]
279 17:56:29.104939 Building ramdisk /var/lib/lava/dispatcher/tmp/953269/extract-overlay-ramdisk-woqn0so4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953269/extract-overlay-ramdisk-woqn0so4/ramdisk
280 17:56:31.258250 >> 168069 blocks
281 17:56:38.994792 Adding RAMdisk u-boot header.
282 17:56:38.995461 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953269/extract-overlay-ramdisk-woqn0so4/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953269/extract-overlay-ramdisk-woqn0so4/ramdisk.cpio.gz.uboot
283 17:56:39.250640 output: Image Name:
284 17:56:39.251063 output: Created: Thu Nov 7 17:56:38 2024
285 17:56:39.251274 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 17:56:39.251476 output: Data Size: 23559801 Bytes = 23007.62 KiB = 22.47 MiB
287 17:56:39.251677 output: Load Address: 00000000
288 17:56:39.251875 output: Entry Point: 00000000
289 17:56:39.252298 output:
290 17:56:39.253380 rename /var/lib/lava/dispatcher/tmp/953269/extract-overlay-ramdisk-woqn0so4/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/ramdisk/ramdisk.cpio.gz.uboot
291 17:56:39.254150 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 17:56:39.254744 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 17:56:39.255321 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 17:56:39.255823 No LXC device requested
295 17:56:39.256419 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 17:56:39.256986 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 17:56:39.257527 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 17:56:39.257974 Checking files for TFTP limit of 4294967296 bytes.
299 17:56:39.260928 end: 1 tftp-deploy (duration 00:01:18) [common]
300 17:56:39.261549 start: 2 uboot-action (timeout 00:05:00) [common]
301 17:56:39.262125 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 17:56:39.262668 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 17:56:39.263220 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 17:56:39.263794 Using kernel file from prepare-kernel: 953269/tftp-deploy-2hq4ewh0/kernel/uImage
305 17:56:39.264518 substitutions:
306 17:56:39.264967 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 17:56:39.265411 - {DTB_ADDR}: 0x01070000
308 17:56:39.265847 - {DTB}: 953269/tftp-deploy-2hq4ewh0/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 17:56:39.266291 - {INITRD}: 953269/tftp-deploy-2hq4ewh0/ramdisk/ramdisk.cpio.gz.uboot
310 17:56:39.266724 - {KERNEL_ADDR}: 0x01080000
311 17:56:39.267156 - {KERNEL}: 953269/tftp-deploy-2hq4ewh0/kernel/uImage
312 17:56:39.267591 - {LAVA_MAC}: None
313 17:56:39.268090 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953269/extract-nfsrootfs-u344i7gk
314 17:56:39.268539 - {NFS_SERVER_IP}: 192.168.6.2
315 17:56:39.268970 - {PRESEED_CONFIG}: None
316 17:56:39.269402 - {PRESEED_LOCAL}: None
317 17:56:39.269831 - {RAMDISK_ADDR}: 0x08000000
318 17:56:39.270256 - {RAMDISK}: 953269/tftp-deploy-2hq4ewh0/ramdisk/ramdisk.cpio.gz.uboot
319 17:56:39.270682 - {ROOT_PART}: None
320 17:56:39.271106 - {ROOT}: None
321 17:56:39.271531 - {SERVER_IP}: 192.168.6.2
322 17:56:39.271953 - {TEE_ADDR}: 0x83000000
323 17:56:39.272446 - {TEE}: None
324 17:56:39.272875 Parsed boot commands:
325 17:56:39.273293 - setenv autoload no
326 17:56:39.273720 - setenv initrd_high 0xffffffff
327 17:56:39.274146 - setenv fdt_high 0xffffffff
328 17:56:39.274569 - dhcp
329 17:56:39.274988 - setenv serverip 192.168.6.2
330 17:56:39.275415 - tftpboot 0x01080000 953269/tftp-deploy-2hq4ewh0/kernel/uImage
331 17:56:39.275847 - tftpboot 0x08000000 953269/tftp-deploy-2hq4ewh0/ramdisk/ramdisk.cpio.gz.uboot
332 17:56:39.276307 - tftpboot 0x01070000 953269/tftp-deploy-2hq4ewh0/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 17:56:39.276739 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953269/extract-nfsrootfs-u344i7gk,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 17:56:39.277181 - bootm 0x01080000 0x08000000 0x01070000
335 17:56:39.277724 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 17:56:39.279352 start: 2.3 connect-device (timeout 00:05:00) [common]
338 17:56:39.279809 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 17:56:39.294281 Setting prompt string to ['lava-test: # ']
340 17:56:39.295889 end: 2.3 connect-device (duration 00:00:00) [common]
341 17:56:39.296595 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 17:56:39.297210 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 17:56:39.297813 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 17:56:39.299277 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 17:56:39.336553 >> OK - accepted request
346 17:56:39.338794 Returned 0 in 0 seconds
347 17:56:39.440026 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 17:56:39.441794 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 17:56:39.442401 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 17:56:39.442961 Setting prompt string to ['Hit any key to stop autoboot']
352 17:56:39.443495 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 17:56:39.445270 Trying 192.168.56.21...
354 17:56:39.445803 Connected to conserv1.
355 17:56:39.446252 Escape character is '^]'.
356 17:56:39.446695
357 17:56:39.447146 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 17:56:39.447603
359 17:56:46.908878 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 17:56:46.909553 bl2_stage_init 0x01
361 17:56:46.910022 bl2_stage_init 0x81
362 17:56:46.914401 hw id: 0x0000 - pwm id 0x01
363 17:56:46.914922 bl2_stage_init 0xc1
364 17:56:46.919571 bl2_stage_init 0x02
365 17:56:46.920138
366 17:56:46.920612 L0:00000000
367 17:56:46.921073 L1:00000703
368 17:56:46.921525 L2:00008067
369 17:56:46.925005 L3:15000000
370 17:56:46.925529 S1:00000000
371 17:56:46.925989 B2:20282000
372 17:56:46.926425 B1:a0f83180
373 17:56:46.926856
374 17:56:46.927290 TE: 71540
375 17:56:46.927723
376 17:56:46.936260 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 17:56:46.936764
378 17:56:46.937205 Board ID = 1
379 17:56:46.937633 Set cpu clk to 24M
380 17:56:46.938060 Set clk81 to 24M
381 17:56:46.939813 Use GP1_pll as DSU clk.
382 17:56:46.940331 DSU clk: 1200 Mhz
383 17:56:46.945346 CPU clk: 1200 MHz
384 17:56:46.945834 Set clk81 to 166.6M
385 17:56:46.950933 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 17:56:46.951425 board id: 1
387 17:56:46.960788 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 17:56:46.971446 fw parse done
389 17:56:46.977373 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 17:56:47.020134 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 17:56:47.030928 PIEI prepare done
392 17:56:47.031427 fastboot data load
393 17:56:47.031870 fastboot data verify
394 17:56:47.036580 verify result: 266
395 17:56:47.042104 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 17:56:47.042594 LPDDR4 probe
397 17:56:47.043032 ddr clk to 1584MHz
398 17:56:47.050065 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 17:56:47.087317
400 17:56:47.087822 dmc_version 0001
401 17:56:47.095046 Check phy result
402 17:56:47.099898 INFO : End of CA training
403 17:56:47.100409 INFO : End of initialization
404 17:56:47.105599 INFO : Training has run successfully!
405 17:56:47.106078 Check phy result
406 17:56:47.111132 INFO : End of initialization
407 17:56:47.111606 INFO : End of read enable training
408 17:56:47.116790 INFO : End of fine write leveling
409 17:56:47.122310 INFO : End of Write leveling coarse delay
410 17:56:47.122788 INFO : Training has run successfully!
411 17:56:47.123225 Check phy result
412 17:56:47.127941 INFO : End of initialization
413 17:56:47.128465 INFO : End of read dq deskew training
414 17:56:47.133589 INFO : End of MPR read delay center optimization
415 17:56:47.139156 INFO : End of write delay center optimization
416 17:56:47.144727 INFO : End of read delay center optimization
417 17:56:47.145227 INFO : End of max read latency training
418 17:56:47.150359 INFO : Training has run successfully!
419 17:56:47.150849 1D training succeed
420 17:56:47.159566 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 17:56:47.207108 Check phy result
422 17:56:47.207616 INFO : End of initialization
423 17:56:47.229499 INFO : End of 2D read delay Voltage center optimization
424 17:56:47.248726 INFO : End of 2D read delay Voltage center optimization
425 17:56:47.300621 INFO : End of 2D write delay Voltage center optimization
426 17:56:47.349752 INFO : End of 2D write delay Voltage center optimization
427 17:56:47.355342 INFO : Training has run successfully!
428 17:56:47.355833
429 17:56:47.356367 channel==0
430 17:56:47.360932 RxClkDly_Margin_A0==78 ps 8
431 17:56:47.361413 TxDqDly_Margin_A0==98 ps 10
432 17:56:47.366645 RxClkDly_Margin_A1==88 ps 9
433 17:56:47.367123 TxDqDly_Margin_A1==88 ps 9
434 17:56:47.367560 TrainedVREFDQ_A0==74
435 17:56:47.372213 TrainedVREFDQ_A1==74
436 17:56:47.372702 VrefDac_Margin_A0==24
437 17:56:47.373140 DeviceVref_Margin_A0==40
438 17:56:47.377743 VrefDac_Margin_A1==23
439 17:56:47.378224 DeviceVref_Margin_A1==40
440 17:56:47.378661
441 17:56:47.379098
442 17:56:47.379533 channel==1
443 17:56:47.383344 RxClkDly_Margin_A0==78 ps 8
444 17:56:47.383833 TxDqDly_Margin_A0==98 ps 10
445 17:56:47.388932 RxClkDly_Margin_A1==78 ps 8
446 17:56:47.389413 TxDqDly_Margin_A1==88 ps 9
447 17:56:47.394576 TrainedVREFDQ_A0==78
448 17:56:47.395079 TrainedVREFDQ_A1==78
449 17:56:47.395513 VrefDac_Margin_A0==22
450 17:56:47.400148 DeviceVref_Margin_A0==36
451 17:56:47.400633 VrefDac_Margin_A1==22
452 17:56:47.405730 DeviceVref_Margin_A1==36
453 17:56:47.406210
454 17:56:47.406650 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 17:56:47.407083
456 17:56:47.439314 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
457 17:56:47.439919 2D training succeed
458 17:56:47.444986 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 17:56:47.450478 auto size-- 65535DDR cs0 size: 2048MB
460 17:56:47.450965 DDR cs1 size: 2048MB
461 17:56:47.456040 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 17:56:47.456532 cs0 DataBus test pass
463 17:56:47.461598 cs1 DataBus test pass
464 17:56:47.462080 cs0 AddrBus test pass
465 17:56:47.462517 cs1 AddrBus test pass
466 17:56:47.462948
467 17:56:47.467190 100bdlr_step_size ps== 478
468 17:56:47.467680 result report
469 17:56:47.472791 boot times 0Enable ddr reg access
470 17:56:47.477950 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 17:56:47.491793 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 17:56:48.146973 bl2z: ptr: 05129330, size: 00001e40
473 17:56:48.153081 0.0;M3 CHK:0;cm4_sp_mode 0
474 17:56:48.153633 MVN_1=0x00000000
475 17:56:48.154080 MVN_2=0x00000000
476 17:56:48.164590 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 17:56:48.165092 OPS=0x04
478 17:56:48.165537 ring efuse init
479 17:56:48.170177 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 17:56:48.170683 [0.017319 Inits done]
481 17:56:48.171122 secure task start!
482 17:56:48.177928 high task start!
483 17:56:48.178417 low task start!
484 17:56:48.178862 run into bl31
485 17:56:48.186629 NOTICE: BL31: v1.3(release):4fc40b1
486 17:56:48.194342 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 17:56:48.194839 NOTICE: BL31: G12A normal boot!
488 17:56:48.209959 NOTICE: BL31: BL33 decompress pass
489 17:56:48.215711 ERROR: Error initializing runtime service opteed_fast
490 17:56:49.459900 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 17:56:49.460585 bl2_stage_init 0x01
492 17:56:49.461034 bl2_stage_init 0x81
493 17:56:49.465487 hw id: 0x0000 - pwm id 0x01
494 17:56:49.466016 bl2_stage_init 0xc1
495 17:56:49.466470 bl2_stage_init 0x02
496 17:56:49.466906
497 17:56:49.471106 L0:00000000
498 17:56:49.471734 L1:00000703
499 17:56:49.472236 L2:00008067
500 17:56:49.472679 L3:15000000
501 17:56:49.473138 S1:00000000
502 17:56:49.473994 B2:20282000
503 17:56:49.478384 B1:a0f83180
504 17:56:49.478884
505 17:56:49.479325 TE: 71724
506 17:56:49.479776
507 17:56:49.484005 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 17:56:49.484516
509 17:56:49.484959 Board ID = 1
510 17:56:49.489609 Set cpu clk to 24M
511 17:56:49.490114 Set clk81 to 24M
512 17:56:49.490550 Use GP1_pll as DSU clk.
513 17:56:49.495197 DSU clk: 1200 Mhz
514 17:56:49.495694 CPU clk: 1200 MHz
515 17:56:49.496162 Set clk81 to 166.6M
516 17:56:49.501047 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 17:56:49.501567 board id: 1
518 17:56:49.510888 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 17:56:49.522050 fw parse done
520 17:56:49.527880 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 17:56:49.571167 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 17:56:49.582276 PIEI prepare done
523 17:56:49.582783 fastboot data load
524 17:56:49.583222 fastboot data verify
525 17:56:49.587952 verify result: 266
526 17:56:49.596233 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 17:56:49.596738 LPDDR4 probe
528 17:56:49.597170 ddr clk to 1584MHz
529 17:56:50.959139 Load ddrfw from SPI, s SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 17:56:50.959819 bl2_stage_init 0x01
531 17:56:50.960354 bl2_stage_init 0x81
532 17:56:50.964929 hw id: 0x0000 - pwm id 0x01
533 17:56:50.965569 bl2_stage_init 0xc1
534 17:56:50.970460 bl2_stage_init 0x02
535 17:56:50.971060
536 17:56:50.971553 L0:00000000
537 17:56:50.972076 L1:00000703
538 17:56:50.972593 L2:00008067
539 17:56:50.973074 L3:15000000
540 17:56:50.976210 S1:00000000
541 17:56:50.976907 B2:20282000
542 17:56:50.977461 B1:a0f83180
543 17:56:50.977981
544 17:56:50.978500 TE: 70815
545 17:56:50.979022
546 17:56:50.981663 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 17:56:50.982359
548 17:56:50.987239 Board ID = 1
549 17:56:50.988237 Set cpu clk to 24M
550 17:56:50.988857 Set clk81 to 24M
551 17:56:50.992876 Use GP1_pll as DSU clk.
552 17:56:50.993782 DSU clk: 1200 Mhz
553 17:56:50.994376 CPU clk: 1200 MHz
554 17:56:50.998480 Set clk81 to 166.6M
555 17:56:51.004102 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 17:56:51.004800 board id: 1
557 17:56:51.011238 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 17:56:51.022101 fw parse done
559 17:56:51.028027 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 17:56:51.071078 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 17:56:51.082280 PIEI prepare done
562 17:56:51.082782 fastboot data load
563 17:56:51.083240 fastboot data verify
564 17:56:51.087817 verify result: 266
565 17:56:51.093392 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 17:56:51.093885 LPDDR4 probe
567 17:56:51.094336 ddr clk to 1584MHz
568 17:56:51.101422 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 17:56:51.139191
570 17:56:51.139699 dmc_version 0001
571 17:56:51.146175 Check phy result
572 17:56:51.152184 INFO : End of CA training
573 17:56:51.152675 INFO : End of initialization
574 17:56:51.157744 INFO : Training has run successfully!
575 17:56:51.158227 Check phy result
576 17:56:51.163348 INFO : End of initialization
577 17:56:51.163833 INFO : End of read enable training
578 17:56:51.168969 INFO : End of fine write leveling
579 17:56:51.174525 INFO : End of Write leveling coarse delay
580 17:56:51.175008 INFO : Training has run successfully!
581 17:56:51.175457 Check phy result
582 17:56:51.180146 INFO : End of initialization
583 17:56:51.180635 INFO : End of read dq deskew training
584 17:56:51.185754 INFO : End of MPR read delay center optimization
585 17:56:51.191352 INFO : End of write delay center optimization
586 17:56:51.196963 INFO : End of read delay center optimization
587 17:56:51.197448 INFO : End of max read latency training
588 17:56:51.202572 INFO : Training has run successfully!
589 17:56:51.203060 1D training succeed
590 17:56:51.211688 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 17:56:51.260093 Check phy result
592 17:56:51.260601 INFO : End of initialization
593 17:56:51.287378 INFO : End of 2D read delay Voltage center optimization
594 17:56:51.311541 INFO : End of 2D read delay Voltage center optimization
595 17:56:51.368285 INFO : End of 2D write delay Voltage center optimization
596 17:56:51.422293 INFO : End of 2D write delay Voltage center optimization
597 17:56:51.427767 INFO : Training has run successfully!
598 17:56:51.428308
599 17:56:51.428762 channel==0
600 17:56:51.433398 RxClkDly_Margin_A0==78 ps 8
601 17:56:51.433884 TxDqDly_Margin_A0==98 ps 10
602 17:56:51.438995 RxClkDly_Margin_A1==69 ps 7
603 17:56:51.439484 TxDqDly_Margin_A1==88 ps 9
604 17:56:51.439929 TrainedVREFDQ_A0==74
605 17:56:51.444628 TrainedVREFDQ_A1==74
606 17:56:51.445147 VrefDac_Margin_A0==22
607 17:56:51.445600 DeviceVref_Margin_A0==40
608 17:56:51.450209 VrefDac_Margin_A1==23
609 17:56:51.450698 DeviceVref_Margin_A1==40
610 17:56:51.451145
611 17:56:51.451591
612 17:56:51.452068 channel==1
613 17:56:51.455749 RxClkDly_Margin_A0==78 ps 8
614 17:56:51.456271 TxDqDly_Margin_A0==98 ps 10
615 17:56:51.461386 RxClkDly_Margin_A1==78 ps 8
616 17:56:51.461877 TxDqDly_Margin_A1==88 ps 9
617 17:56:51.467019 TrainedVREFDQ_A0==78
618 17:56:51.467508 TrainedVREFDQ_A1==78
619 17:56:51.467959 VrefDac_Margin_A0==22
620 17:56:51.472554 DeviceVref_Margin_A0==36
621 17:56:51.473043 VrefDac_Margin_A1==22
622 17:56:51.478179 DeviceVref_Margin_A1==36
623 17:56:51.478669
624 17:56:51.479118 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 17:56:51.479562
626 17:56:51.511769 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
627 17:56:51.512380 2D training succeed
628 17:56:51.517390 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 17:56:51.523039 auto size-- 65535DDR cs0 size: 2048MB
630 17:56:51.523540 DDR cs1 size: 2048MB
631 17:56:51.528580 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 17:56:51.529088 cs0 DataBus test pass
633 17:56:51.534243 cs1 DataBus test pass
634 17:56:51.534761 cs0 AddrBus test pass
635 17:56:51.535214 cs1 AddrBus test pass
636 17:56:51.535656
637 17:56:51.539770 100bdlr_step_size ps== 478
638 17:56:51.540323 result report
639 17:56:51.545379 boot times 0Enable ddr reg access
640 17:56:51.550548 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 17:56:51.564393 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 17:56:52.224308 bl2z: ptr: 05129330, size: 00001e40
643 17:56:52.232231 0.0;M3 CHK:0;cm4_sp_mode 0
644 17:56:52.232772 MVN_1=0x00000000
645 17:56:52.233229 MVN_2=0x00000000
646 17:56:52.243540 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 17:56:52.244108 OPS=0x04
648 17:56:52.244575 ring efuse init
649 17:56:52.249209 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 17:56:52.249724 [0.017355 Inits done]
651 17:56:52.250180 secure task start!
652 17:56:52.256982 high task start!
653 17:56:52.257485 low task start!
654 17:56:52.257938 run into bl31
655 17:56:52.265600 NOTICE: BL31: v1.3(release):4fc40b1
656 17:56:52.273418 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 17:56:52.273923 NOTICE: BL31: G12A normal boot!
658 17:56:52.288956 NOTICE: BL31: BL33 decompress pass
659 17:56:52.294651 ERROR: Error initializing runtime service opteed_fast
660 17:56:53.660025 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 17:56:53.660689 bl2_stage_init 0x01
662 17:56:53.661175 bl2_stage_init 0x81
663 17:56:53.665556 hw id: 0x0000 - pwm id 0x01
664 17:56:53.666066 bl2_stage_init 0xc1
665 17:56:53.670499 bl2_stage_init 0x02
666 17:56:53.671004
667 17:56:53.671465 L0:00000000
668 17:56:53.671913 L1:00000703
669 17:56:53.672408 L2:00008067
670 17:56:53.676014 L3:15000000
671 17:56:53.676510 S1:00000000
672 17:56:53.676958 B2:20282000
673 17:56:53.677397 B1:a0f83180
674 17:56:53.677834
675 17:56:53.678274 TE: 72465
676 17:56:53.678711
677 17:56:53.687078 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 17:56:53.687591
679 17:56:53.688076 Board ID = 1
680 17:56:53.688523 Set cpu clk to 24M
681 17:56:53.688961 Set clk81 to 24M
682 17:56:53.692812 Use GP1_pll as DSU clk.
683 17:56:53.693316 DSU clk: 1200 Mhz
684 17:56:53.693766 CPU clk: 1200 MHz
685 17:56:53.698474 Set clk81 to 166.6M
686 17:56:53.704012 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 17:56:53.704515 board id: 1
688 17:56:53.711999 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 17:56:53.722836 fw parse done
690 17:56:53.728818 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 17:56:53.771807 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 17:56:53.783035 PIEI prepare done
693 17:56:53.783537 fastboot data load
694 17:56:53.784021 fastboot data verify
695 17:56:53.788572 verify result: 266
696 17:56:53.794236 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 17:56:53.794743 LPDDR4 probe
698 17:56:53.795197 ddr clk to 1584MHz
699 17:56:53.802133 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 17:56:53.839936
701 17:56:53.840500 dmc_version 0001
702 17:56:53.846901 Check phy result
703 17:56:53.852918 INFO : End of CA training
704 17:56:53.853408 INFO : End of initialization
705 17:56:53.858535 INFO : Training has run successfully!
706 17:56:53.859030 Check phy result
707 17:56:53.864156 INFO : End of initialization
708 17:56:53.864645 INFO : End of read enable training
709 17:56:53.867562 INFO : End of fine write leveling
710 17:56:53.873087 INFO : End of Write leveling coarse delay
711 17:56:53.878659 INFO : Training has run successfully!
712 17:56:53.879152 Check phy result
713 17:56:53.879596 INFO : End of initialization
714 17:56:53.884247 INFO : End of read dq deskew training
715 17:56:53.889815 INFO : End of MPR read delay center optimization
716 17:56:53.890304 INFO : End of write delay center optimization
717 17:56:53.895511 INFO : End of read delay center optimization
718 17:56:53.901045 INFO : End of max read latency training
719 17:56:53.901539 INFO : Training has run successfully!
720 17:56:53.906646 1D training succeed
721 17:56:53.912593 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 17:56:53.960801 Check phy result
723 17:56:53.961320 INFO : End of initialization
724 17:56:53.988243 INFO : End of 2D read delay Voltage center optimization
725 17:56:54.012419 INFO : End of 2D read delay Voltage center optimization
726 17:56:54.069069 INFO : End of 2D write delay Voltage center optimization
727 17:56:54.123061 INFO : End of 2D write delay Voltage center optimization
728 17:56:54.128642 INFO : Training has run successfully!
729 17:56:54.129131
730 17:56:54.129582 channel==0
731 17:56:54.134210 RxClkDly_Margin_A0==78 ps 8
732 17:56:54.134701 TxDqDly_Margin_A0==98 ps 10
733 17:56:54.137549 RxClkDly_Margin_A1==88 ps 9
734 17:56:54.138041 TxDqDly_Margin_A1==98 ps 10
735 17:56:54.143046 TrainedVREFDQ_A0==74
736 17:56:54.143542 TrainedVREFDQ_A1==75
737 17:56:54.148653 VrefDac_Margin_A0==23
738 17:56:54.149143 DeviceVref_Margin_A0==40
739 17:56:54.149588 VrefDac_Margin_A1==23
740 17:56:54.154245 DeviceVref_Margin_A1==39
741 17:56:54.154755
742 17:56:54.155207
743 17:56:54.155645 channel==1
744 17:56:54.156118 RxClkDly_Margin_A0==78 ps 8
745 17:56:54.159876 TxDqDly_Margin_A0==98 ps 10
746 17:56:54.160409 RxClkDly_Margin_A1==78 ps 8
747 17:56:54.165516 TxDqDly_Margin_A1==88 ps 9
748 17:56:54.166010 TrainedVREFDQ_A0==75
749 17:56:54.166456 TrainedVREFDQ_A1==75
750 17:56:54.171054 VrefDac_Margin_A0==22
751 17:56:54.171547 DeviceVref_Margin_A0==39
752 17:56:54.176671 VrefDac_Margin_A1==22
753 17:56:54.177177 DeviceVref_Margin_A1==38
754 17:56:54.177623
755 17:56:54.182276 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 17:56:54.182769
757 17:56:54.210230 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 17:56:54.215865 2D training succeed
759 17:56:54.221524 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 17:56:54.222024 auto size-- 65535DDR cs0 size: 2048MB
761 17:56:54.227050 DDR cs1 size: 2048MB
762 17:56:54.227540 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 17:56:54.232678 cs0 DataBus test pass
764 17:56:54.233173 cs1 DataBus test pass
765 17:56:54.233620 cs0 AddrBus test pass
766 17:56:54.238282 cs1 AddrBus test pass
767 17:56:54.238773
768 17:56:54.239220 100bdlr_step_size ps== 471
769 17:56:54.239668 result report
770 17:56:54.243824 boot times 0Enable ddr reg access
771 17:56:54.251457 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 17:56:54.265326 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 17:56:54.926105 bl2z: ptr: 05129330, size: 00001e40
774 17:56:54.934066 0.0;M3 CHK:0;cm4_sp_mode 0
775 17:56:54.934626 MVN_1=0x00000000
776 17:56:54.935074 MVN_2=0x00000000
777 17:56:54.945574 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 17:56:54.946127 OPS=0x04
779 17:56:54.946565 ring efuse init
780 17:56:54.951131 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 17:56:54.951631 [0.017354 Inits done]
782 17:56:54.952120 secure task start!
783 17:56:54.958921 high task start!
784 17:56:54.959411 low task start!
785 17:56:54.959844 run into bl31
786 17:56:54.967562 NOTICE: BL31: v1.3(release):4fc40b1
787 17:56:54.975342 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 17:56:54.975842 NOTICE: BL31: G12A normal boot!
789 17:56:54.990856 NOTICE: BL31: BL33 decompress pass
790 17:56:54.996661 ERROR: Error initializing runtime service opteed_fast
791 17:56:55.792103
792 17:56:55.792757
793 17:56:55.797383 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 17:56:55.797897
795 17:56:55.800899 Model: Libre Computer AML-S905D3-CC Solitude
796 17:56:55.947872 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 17:56:55.963311 DRAM: 2 GiB (effective 3.8 GiB)
798 17:56:56.064274 Core: 406 devices, 33 uclasses, devicetree: separate
799 17:56:56.070177 WDT: Not starting watchdog@f0d0
800 17:56:56.095229 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 17:56:56.107460 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 17:56:56.112434 ** Bad device specification mmc 0 **
803 17:56:56.122489 Card did not respond to voltage select! : -110
804 17:56:56.130147 ** Bad device specification mmc 0 **
805 17:56:56.130657 Couldn't find partition mmc 0
806 17:56:56.138506 Card did not respond to voltage select! : -110
807 17:56:56.144015 ** Bad device specification mmc 0 **
808 17:56:56.144522 Couldn't find partition mmc 0
809 17:56:56.149085 Error: could not access storage.
810 17:56:56.446651 Net: eth0: ethernet@ff3f0000
811 17:56:56.447326 starting USB...
812 17:56:56.691195 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 17:56:56.691797 Starting the controller
814 17:56:56.698190 USB XHCI 1.10
815 17:56:58.254336 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 17:56:58.262584 scanning usb for storage devices... 0 Storage Device(s) found
818 17:56:58.314274 Hit any key to stop autoboot: 1
819 17:56:58.315178 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 17:56:58.316027 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 17:56:58.316569 Setting prompt string to ['=>']
822 17:56:58.317105 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 17:56:58.328627 0
824 17:56:58.329573 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 17:56:58.430927 => setenv autoload no
827 17:56:58.431819 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 17:56:58.437235 setenv autoload no
830 17:56:58.538858 => setenv initrd_high 0xffffffff
831 17:56:58.539928 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 17:56:58.544227 setenv initrd_high 0xffffffff
834 17:56:58.646002 => setenv fdt_high 0xffffffff
835 17:56:58.647056 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 17:56:58.651290 setenv fdt_high 0xffffffff
838 17:56:58.753158 => dhcp
839 17:56:58.754205 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 17:56:58.758280 dhcp
841 17:56:59.313807 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 17:56:59.314466 Speed: 1000, full duplex
843 17:56:59.314934 BOOTP broadcast 1
844 17:56:59.561935 BOOTP broadcast 2
845 17:56:59.581926 DHCP client bound to address 192.168.6.21 (268 ms)
847 17:56:59.683522 => setenv serverip 192.168.6.2
848 17:56:59.684591 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
849 17:56:59.689351 setenv serverip 192.168.6.2
851 17:56:59.791003 => tftpboot 0x01080000 953269/tftp-deploy-2hq4ewh0/kernel/uImage
852 17:56:59.791930 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
853 17:56:59.799572 tftpboot 0x01080000 953269/tftp-deploy-2hq4ewh0/kernel/uImage
854 17:56:59.800205 Speed: 1000, full duplex
855 17:56:59.800680 Using ethernet@ff3f0000 device
856 17:56:59.805040 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 17:56:59.811403 Filename '953269/tftp-deploy-2hq4ewh0/kernel/uImage'.
858 17:56:59.814722 Load address: 0x1080000
859 17:57:02.709860 Loading: *################################################## 44 MiB
860 17:57:02.710555 15.2 MiB/s
861 17:57:02.711011 done
862 17:57:02.714093 Bytes transferred = 46121536 (2bfc240 hex)
864 17:57:02.815658 => tftpboot 0x08000000 953269/tftp-deploy-2hq4ewh0/ramdisk/ramdisk.cpio.gz.uboot
865 17:57:02.816478 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
866 17:57:02.823263 tftpboot 0x08000000 953269/tftp-deploy-2hq4ewh0/ramdisk/ramdisk.cpio.gz.uboot
867 17:57:02.823760 Speed: 1000, full duplex
868 17:57:02.824241 Using ethernet@ff3f0000 device
869 17:57:02.828832 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 17:57:02.838586 Filename '953269/tftp-deploy-2hq4ewh0/ramdisk/ramdisk.cpio.gz.uboot'.
871 17:57:02.839008 Load address: 0x8000000
872 17:57:04.262134 Loading: *################################################# UDP wrong checksum 00000005 000070b6
873 17:57:09.262750 T UDP wrong checksum 00000005 000070b6
874 17:57:19.264830 T T UDP wrong checksum 00000005 000070b6
875 17:57:39.269012 T T T T UDP wrong checksum 00000005 000070b6
876 17:57:59.273690 T T T
877 17:57:59.274375 Retry count exceeded; starting again
879 17:57:59.275915 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
882 17:57:59.277986 end: 2.4 uboot-commands (duration 00:01:20) [common]
884 17:57:59.279451 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
886 17:57:59.280590 end: 2 uboot-action (duration 00:01:20) [common]
888 17:57:59.282248 Cleaning after the job
889 17:57:59.282846 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/ramdisk
890 17:57:59.284290 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/kernel
891 17:57:59.329307 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/dtb
892 17:57:59.330141 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/nfsrootfs
893 17:57:59.487165 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953269/tftp-deploy-2hq4ewh0/modules
894 17:57:59.506158 start: 4.1 power-off (timeout 00:00:30) [common]
895 17:57:59.506851 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
896 17:57:59.540488 >> OK - accepted request
897 17:57:59.542503 Returned 0 in 0 seconds
898 17:57:59.643303 end: 4.1 power-off (duration 00:00:00) [common]
900 17:57:59.644334 start: 4.2 read-feedback (timeout 00:10:00) [common]
901 17:57:59.644986 Listened to connection for namespace 'common' for up to 1s
902 17:58:00.645927 Finalising connection for namespace 'common'
903 17:58:00.646416 Disconnecting from shell: Finalise
904 17:58:00.646700 =>
905 17:58:00.747490 end: 4.2 read-feedback (duration 00:00:01) [common]
906 17:58:00.748157 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953269
907 17:58:03.747209 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953269
908 17:58:03.747800 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.