Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 17:49:01.295608 lava-dispatcher, installed at version: 2024.01
2 17:49:01.296417 start: 0 validate
3 17:49:01.296879 Start time: 2024-11-07 17:49:01.296847+00:00 (UTC)
4 17:49:01.297444 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 17:49:01.297977 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 17:49:01.342178 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 17:49:01.342733 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 17:49:01.374663 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 17:49:01.375293 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 17:49:01.405995 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 17:49:01.406656 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 17:49:01.439229 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 17:49:01.439707 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241107%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 17:49:01.480805 validate duration: 0.18
16 17:49:01.481676 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 17:49:01.482028 start: 1.1 download-retry (timeout 00:10:00) [common]
18 17:49:01.482342 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 17:49:01.482962 Not decompressing ramdisk as can be used compressed.
20 17:49:01.483502 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 17:49:01.483814 saving as /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/ramdisk/initrd.cpio.gz
22 17:49:01.484120 total size: 5628140 (5 MB)
23 17:49:01.523193 progress 0 % (0 MB)
24 17:49:01.531871 progress 5 % (0 MB)
25 17:49:01.539603 progress 10 % (0 MB)
26 17:49:01.546571 progress 15 % (0 MB)
27 17:49:01.551284 progress 20 % (1 MB)
28 17:49:01.554861 progress 25 % (1 MB)
29 17:49:01.558899 progress 30 % (1 MB)
30 17:49:01.562979 progress 35 % (1 MB)
31 17:49:01.566569 progress 40 % (2 MB)
32 17:49:01.570622 progress 45 % (2 MB)
33 17:49:01.574259 progress 50 % (2 MB)
34 17:49:01.578251 progress 55 % (2 MB)
35 17:49:01.582231 progress 60 % (3 MB)
36 17:49:01.585767 progress 65 % (3 MB)
37 17:49:01.589768 progress 70 % (3 MB)
38 17:49:01.593329 progress 75 % (4 MB)
39 17:49:01.597241 progress 80 % (4 MB)
40 17:49:01.600591 progress 85 % (4 MB)
41 17:49:01.604234 progress 90 % (4 MB)
42 17:49:01.607856 progress 95 % (5 MB)
43 17:49:01.611261 progress 100 % (5 MB)
44 17:49:01.611928 5 MB downloaded in 0.13 s (42.00 MB/s)
45 17:49:01.612541 end: 1.1.1 http-download (duration 00:00:00) [common]
47 17:49:01.613484 end: 1.1 download-retry (duration 00:00:00) [common]
48 17:49:01.613806 start: 1.2 download-retry (timeout 00:10:00) [common]
49 17:49:01.614099 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 17:49:01.614592 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/kernel/Image
51 17:49:01.614852 saving as /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/kernel/Image
52 17:49:01.615077 total size: 46121472 (43 MB)
53 17:49:01.615297 No compression specified
54 17:49:01.654042 progress 0 % (0 MB)
55 17:49:01.681467 progress 5 % (2 MB)
56 17:49:01.708772 progress 10 % (4 MB)
57 17:49:01.736354 progress 15 % (6 MB)
58 17:49:01.763690 progress 20 % (8 MB)
59 17:49:01.791499 progress 25 % (11 MB)
60 17:49:01.819912 progress 30 % (13 MB)
61 17:49:01.848259 progress 35 % (15 MB)
62 17:49:01.876839 progress 40 % (17 MB)
63 17:49:01.905371 progress 45 % (19 MB)
64 17:49:01.933409 progress 50 % (22 MB)
65 17:49:01.961912 progress 55 % (24 MB)
66 17:49:01.990154 progress 60 % (26 MB)
67 17:49:02.018585 progress 65 % (28 MB)
68 17:49:02.047006 progress 70 % (30 MB)
69 17:49:02.077468 progress 75 % (33 MB)
70 17:49:02.105597 progress 80 % (35 MB)
71 17:49:02.133099 progress 85 % (37 MB)
72 17:49:02.160367 progress 90 % (39 MB)
73 17:49:02.188160 progress 95 % (41 MB)
74 17:49:02.214294 progress 100 % (43 MB)
75 17:49:02.214937 43 MB downloaded in 0.60 s (73.33 MB/s)
76 17:49:02.215423 end: 1.2.1 http-download (duration 00:00:01) [common]
78 17:49:02.216265 end: 1.2 download-retry (duration 00:00:01) [common]
79 17:49:02.216542 start: 1.3 download-retry (timeout 00:09:59) [common]
80 17:49:02.216807 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 17:49:02.217277 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 17:49:02.217523 saving as /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 17:49:02.217730 total size: 53209 (0 MB)
84 17:49:02.217939 No compression specified
85 17:49:02.258054 progress 61 % (0 MB)
86 17:49:02.258948 progress 100 % (0 MB)
87 17:49:02.259518 0 MB downloaded in 0.04 s (1.21 MB/s)
88 17:49:02.260039 end: 1.3.1 http-download (duration 00:00:00) [common]
90 17:49:02.260905 end: 1.3 download-retry (duration 00:00:00) [common]
91 17:49:02.261189 start: 1.4 download-retry (timeout 00:09:59) [common]
92 17:49:02.261472 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 17:49:02.261950 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 17:49:02.262210 saving as /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/nfsrootfs/full.rootfs.tar
95 17:49:02.262430 total size: 474398908 (452 MB)
96 17:49:02.262653 Using unxz to decompress xz
97 17:49:02.296264 progress 0 % (0 MB)
98 17:49:03.386252 progress 5 % (22 MB)
99 17:49:04.813722 progress 10 % (45 MB)
100 17:49:05.251733 progress 15 % (67 MB)
101 17:49:06.081214 progress 20 % (90 MB)
102 17:49:06.614661 progress 25 % (113 MB)
103 17:49:06.960576 progress 30 % (135 MB)
104 17:49:07.568745 progress 35 % (158 MB)
105 17:49:08.479326 progress 40 % (181 MB)
106 17:49:09.320283 progress 45 % (203 MB)
107 17:49:10.037801 progress 50 % (226 MB)
108 17:49:10.768199 progress 55 % (248 MB)
109 17:49:11.974396 progress 60 % (271 MB)
110 17:49:13.420424 progress 65 % (294 MB)
111 17:49:15.056264 progress 70 % (316 MB)
112 17:49:18.127457 progress 75 % (339 MB)
113 17:49:20.550221 progress 80 % (361 MB)
114 17:49:23.455855 progress 85 % (384 MB)
115 17:49:26.643349 progress 90 % (407 MB)
116 17:49:29.842999 progress 95 % (429 MB)
117 17:49:33.047338 progress 100 % (452 MB)
118 17:49:33.060837 452 MB downloaded in 30.80 s (14.69 MB/s)
119 17:49:33.061536 end: 1.4.1 http-download (duration 00:00:31) [common]
121 17:49:33.062745 end: 1.4 download-retry (duration 00:00:31) [common]
122 17:49:33.063322 start: 1.5 download-retry (timeout 00:09:28) [common]
123 17:49:33.063861 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 17:49:33.064741 downloading http://storage.kernelci.org/next/master/next-20241107/arm64/defconfig/gcc-12/modules.tar.xz
125 17:49:33.065232 saving as /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/modules/modules.tar
126 17:49:33.065650 total size: 11684868 (11 MB)
127 17:49:33.066085 Using unxz to decompress xz
128 17:49:33.108512 progress 0 % (0 MB)
129 17:49:33.176107 progress 5 % (0 MB)
130 17:49:33.253634 progress 10 % (1 MB)
131 17:49:33.354159 progress 15 % (1 MB)
132 17:49:33.454404 progress 20 % (2 MB)
133 17:49:33.538548 progress 25 % (2 MB)
134 17:49:33.611099 progress 30 % (3 MB)
135 17:49:33.689991 progress 35 % (3 MB)
136 17:49:33.767023 progress 40 % (4 MB)
137 17:49:33.843318 progress 45 % (5 MB)
138 17:49:33.927015 progress 50 % (5 MB)
139 17:49:34.010341 progress 55 % (6 MB)
140 17:49:34.093870 progress 60 % (6 MB)
141 17:49:34.174638 progress 65 % (7 MB)
142 17:49:34.255201 progress 70 % (7 MB)
143 17:49:34.337318 progress 75 % (8 MB)
144 17:49:34.422409 progress 80 % (8 MB)
145 17:49:34.502591 progress 85 % (9 MB)
146 17:49:34.581877 progress 90 % (10 MB)
147 17:49:34.659675 progress 95 % (10 MB)
148 17:49:34.736269 progress 100 % (11 MB)
149 17:49:34.749235 11 MB downloaded in 1.68 s (6.62 MB/s)
150 17:49:34.749820 end: 1.5.1 http-download (duration 00:00:02) [common]
152 17:49:34.750640 end: 1.5 download-retry (duration 00:00:02) [common]
153 17:49:34.750909 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 17:49:34.751174 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 17:49:50.662192 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/953262/extract-nfsrootfs-h12fxv3n
156 17:49:50.662797 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 17:49:50.663087 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 17:49:50.663683 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0
159 17:49:50.664205 makedir: /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin
160 17:49:50.664594 makedir: /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/tests
161 17:49:50.664923 makedir: /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/results
162 17:49:50.665254 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-add-keys
163 17:49:50.665783 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-add-sources
164 17:49:50.666315 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-background-process-start
165 17:49:50.666848 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-background-process-stop
166 17:49:50.667390 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-common-functions
167 17:49:50.667902 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-echo-ipv4
168 17:49:50.668452 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-install-packages
169 17:49:50.668967 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-installed-packages
170 17:49:50.669461 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-os-build
171 17:49:50.669959 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-probe-channel
172 17:49:50.670451 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-probe-ip
173 17:49:50.670942 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-target-ip
174 17:49:50.671444 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-target-mac
175 17:49:50.671928 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-target-storage
176 17:49:50.672514 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-test-case
177 17:49:50.673015 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-test-event
178 17:49:50.673513 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-test-feedback
179 17:49:50.673996 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-test-raise
180 17:49:50.674476 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-test-reference
181 17:49:50.674958 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-test-runner
182 17:49:50.675462 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-test-set
183 17:49:50.675947 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-test-shell
184 17:49:50.676509 Updating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-install-packages (oe)
185 17:49:50.677055 Updating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/bin/lava-installed-packages (oe)
186 17:49:50.677510 Creating /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/environment
187 17:49:50.677886 LAVA metadata
188 17:49:50.678144 - LAVA_JOB_ID=953262
189 17:49:50.678357 - LAVA_DISPATCHER_IP=192.168.6.2
190 17:49:50.678720 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 17:49:50.679680 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 17:49:50.680013 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 17:49:50.680233 skipped lava-vland-overlay
194 17:49:50.680476 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 17:49:50.680731 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 17:49:50.680947 skipped lava-multinode-overlay
197 17:49:50.681189 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 17:49:50.681440 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 17:49:50.681692 Loading test definitions
200 17:49:50.681966 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 17:49:50.682185 Using /lava-953262 at stage 0
202 17:49:50.683403 uuid=953262_1.6.2.4.1 testdef=None
203 17:49:50.683709 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 17:49:50.683971 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 17:49:50.685758 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 17:49:50.686550 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 17:49:50.688866 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 17:49:50.689702 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 17:49:50.691858 runner path: /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 953262_1.6.2.4.1
212 17:49:50.692489 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 17:49:50.693253 Creating lava-test-runner.conf files
215 17:49:50.693455 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/953262/lava-overlay-p9z93xq0/lava-953262/0 for stage 0
216 17:49:50.693802 - 0_v4l2-decoder-conformance-h265
217 17:49:50.694149 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 17:49:50.694425 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 17:49:50.716113 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 17:49:50.716500 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 17:49:50.716758 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 17:49:50.717023 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 17:49:50.717284 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 17:49:51.336970 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 17:49:51.337444 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 17:49:51.337695 extracting modules file /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953262/extract-nfsrootfs-h12fxv3n
227 17:49:52.727360 extracting modules file /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/953262/extract-overlay-ramdisk-lppyx7sc/ramdisk
228 17:49:54.137727 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 17:49:54.138214 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 17:49:54.138492 [common] Applying overlay to NFS
231 17:49:54.138707 [common] Applying overlay /var/lib/lava/dispatcher/tmp/953262/compress-overlay-c1kvi5mj/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/953262/extract-nfsrootfs-h12fxv3n
232 17:49:54.168272 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 17:49:54.168708 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 17:49:54.168981 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 17:49:54.169211 Converting downloaded kernel to a uImage
236 17:49:54.169539 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/kernel/Image /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/kernel/uImage
237 17:49:54.691491 output: Image Name:
238 17:49:54.691917 output: Created: Thu Nov 7 17:49:54 2024
239 17:49:54.692167 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 17:49:54.692375 output: Data Size: 46121472 Bytes = 45040.50 KiB = 43.98 MiB
241 17:49:54.692577 output: Load Address: 01080000
242 17:49:54.692773 output: Entry Point: 01080000
243 17:49:54.692968 output:
244 17:49:54.693302 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 17:49:54.693565 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 17:49:54.693830 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 17:49:54.694081 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 17:49:54.694335 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 17:49:54.694597 Building ramdisk /var/lib/lava/dispatcher/tmp/953262/extract-overlay-ramdisk-lppyx7sc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/953262/extract-overlay-ramdisk-lppyx7sc/ramdisk
250 17:49:56.880262 >> 168069 blocks
251 17:50:04.607038 Adding RAMdisk u-boot header.
252 17:50:04.607486 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/953262/extract-overlay-ramdisk-lppyx7sc/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/953262/extract-overlay-ramdisk-lppyx7sc/ramdisk.cpio.gz.uboot
253 17:50:04.879661 output: Image Name:
254 17:50:04.880160 output: Created: Thu Nov 7 17:50:04 2024
255 17:50:04.880590 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 17:50:04.880997 output: Data Size: 23558819 Bytes = 23006.66 KiB = 22.47 MiB
257 17:50:04.881398 output: Load Address: 00000000
258 17:50:04.881795 output: Entry Point: 00000000
259 17:50:04.882189 output:
260 17:50:04.883171 rename /var/lib/lava/dispatcher/tmp/953262/extract-overlay-ramdisk-lppyx7sc/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/ramdisk/ramdisk.cpio.gz.uboot
261 17:50:04.883880 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 17:50:04.884460 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 17:50:04.884982 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 17:50:04.885443 No LXC device requested
265 17:50:04.885939 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 17:50:04.886446 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 17:50:04.886935 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 17:50:04.887342 Checking files for TFTP limit of 4294967296 bytes.
269 17:50:04.890005 end: 1 tftp-deploy (duration 00:01:03) [common]
270 17:50:04.890576 start: 2 uboot-action (timeout 00:05:00) [common]
271 17:50:04.891094 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 17:50:04.891585 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 17:50:04.892107 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 17:50:04.892643 Using kernel file from prepare-kernel: 953262/tftp-deploy-uszde3zh/kernel/uImage
275 17:50:04.893280 substitutions:
276 17:50:04.893684 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 17:50:04.894083 - {DTB_ADDR}: 0x01070000
278 17:50:04.894479 - {DTB}: 953262/tftp-deploy-uszde3zh/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 17:50:04.894872 - {INITRD}: 953262/tftp-deploy-uszde3zh/ramdisk/ramdisk.cpio.gz.uboot
280 17:50:04.895265 - {KERNEL_ADDR}: 0x01080000
281 17:50:04.895655 - {KERNEL}: 953262/tftp-deploy-uszde3zh/kernel/uImage
282 17:50:04.896073 - {LAVA_MAC}: None
283 17:50:04.896504 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/953262/extract-nfsrootfs-h12fxv3n
284 17:50:04.896904 - {NFS_SERVER_IP}: 192.168.6.2
285 17:50:04.897295 - {PRESEED_CONFIG}: None
286 17:50:04.897679 - {PRESEED_LOCAL}: None
287 17:50:04.898062 - {RAMDISK_ADDR}: 0x08000000
288 17:50:04.898442 - {RAMDISK}: 953262/tftp-deploy-uszde3zh/ramdisk/ramdisk.cpio.gz.uboot
289 17:50:04.898825 - {ROOT_PART}: None
290 17:50:04.899208 - {ROOT}: None
291 17:50:04.899588 - {SERVER_IP}: 192.168.6.2
292 17:50:04.899970 - {TEE_ADDR}: 0x83000000
293 17:50:04.900379 - {TEE}: None
294 17:50:04.900764 Parsed boot commands:
295 17:50:04.901140 - setenv autoload no
296 17:50:04.901524 - setenv initrd_high 0xffffffff
297 17:50:04.901906 - setenv fdt_high 0xffffffff
298 17:50:04.902285 - dhcp
299 17:50:04.902666 - setenv serverip 192.168.6.2
300 17:50:04.903048 - tftpboot 0x01080000 953262/tftp-deploy-uszde3zh/kernel/uImage
301 17:50:04.903433 - tftpboot 0x08000000 953262/tftp-deploy-uszde3zh/ramdisk/ramdisk.cpio.gz.uboot
302 17:50:04.903815 - tftpboot 0x01070000 953262/tftp-deploy-uszde3zh/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 17:50:04.904222 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/953262/extract-nfsrootfs-h12fxv3n,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 17:50:04.904622 - bootm 0x01080000 0x08000000 0x01070000
305 17:50:04.905119 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 17:50:04.906604 start: 2.3 connect-device (timeout 00:05:00) [common]
308 17:50:04.907019 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 17:50:04.921879 Setting prompt string to ['lava-test: # ']
310 17:50:04.923393 end: 2.3 connect-device (duration 00:00:00) [common]
311 17:50:04.924009 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 17:50:04.924562 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 17:50:04.925105 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 17:50:04.926422 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 17:50:04.960301 >> OK - accepted request
316 17:50:04.962112 Returned 0 in 0 seconds
317 17:50:05.063199 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 17:50:05.064932 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 17:50:05.065507 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 17:50:05.066027 Setting prompt string to ['Hit any key to stop autoboot']
322 17:50:05.066495 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 17:50:05.068077 Trying 192.168.56.21...
324 17:50:05.068570 Connected to conserv1.
325 17:50:05.068986 Escape character is '^]'.
326 17:50:05.069407
327 17:50:05.069823 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 17:50:05.070238
329 17:50:12.094028 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 17:50:12.094486 bl2_stage_init 0x01
331 17:50:12.094713 bl2_stage_init 0x81
332 17:50:12.099554 hw id: 0x0000 - pwm id 0x01
333 17:50:12.100170 bl2_stage_init 0xc1
334 17:50:12.105206 bl2_stage_init 0x02
335 17:50:12.105804
336 17:50:12.106084 L0:00000000
337 17:50:12.106300 L1:00000703
338 17:50:12.106506 L2:00008067
339 17:50:12.106715 L3:15000000
340 17:50:12.110891 S1:00000000
341 17:50:12.111317 B2:20282000
342 17:50:12.111586 B1:a0f83180
343 17:50:12.111825
344 17:50:12.112089 TE: 69087
345 17:50:12.112312
346 17:50:12.116377 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 17:50:12.116764
348 17:50:12.122200 Board ID = 1
349 17:50:12.122683 Set cpu clk to 24M
350 17:50:12.122937 Set clk81 to 24M
351 17:50:12.127500 Use GP1_pll as DSU clk.
352 17:50:12.127854 DSU clk: 1200 Mhz
353 17:50:12.128099 CPU clk: 1200 MHz
354 17:50:12.133116 Set clk81 to 166.6M
355 17:50:12.138667 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 17:50:12.139008 board id: 1
357 17:50:12.146147 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 17:50:12.156497 fw parse done
359 17:50:12.162390 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 17:50:12.205160 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 17:50:12.216063 PIEI prepare done
362 17:50:12.216624 fastboot data load
363 17:50:12.217057 fastboot data verify
364 17:50:12.221685 verify result: 266
365 17:50:12.227285 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 17:50:12.227881 LPDDR4 probe
367 17:50:12.228339 ddr clk to 1584MHz
368 17:50:12.235284 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 17:50:12.272450
370 17:50:12.272901 dmc_version 0001
371 17:50:12.279103 Check phy result
372 17:50:12.284995 INFO : End of CA training
373 17:50:12.285391 INFO : End of initialization
374 17:50:12.290578 INFO : Training has run successfully!
375 17:50:12.290979 Check phy result
376 17:50:12.296232 INFO : End of initialization
377 17:50:12.296628 INFO : End of read enable training
378 17:50:12.301812 INFO : End of fine write leveling
379 17:50:12.307550 INFO : End of Write leveling coarse delay
380 17:50:12.308165 INFO : Training has run successfully!
381 17:50:12.309402 Check phy result
382 17:50:12.312988 INFO : End of initialization
383 17:50:12.313371 INFO : End of read dq deskew training
384 17:50:12.318615 INFO : End of MPR read delay center optimization
385 17:50:12.324170 INFO : End of write delay center optimization
386 17:50:12.329798 INFO : End of read delay center optimization
387 17:50:12.330167 INFO : End of max read latency training
388 17:50:12.335414 INFO : Training has run successfully!
389 17:50:12.335820 1D training succeed
390 17:50:12.354446 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 17:50:12.392155 Check phy result
392 17:50:12.392597 INFO : End of initialization
393 17:50:12.414479 INFO : End of 2D read delay Voltage center optimization
394 17:50:12.433462 INFO : End of 2D read delay Voltage center optimization
395 17:50:12.485478 INFO : End of 2D write delay Voltage center optimization
396 17:50:12.534684 INFO : End of 2D write delay Voltage center optimization
397 17:50:12.540239 INFO : Training has run successfully!
398 17:50:12.540639
399 17:50:12.540871 channel==0
400 17:50:12.545872 RxClkDly_Margin_A0==78 ps 8
401 17:50:12.546225 TxDqDly_Margin_A0==88 ps 9
402 17:50:12.551397 RxClkDly_Margin_A1==69 ps 7
403 17:50:12.551758 TxDqDly_Margin_A1==88 ps 9
404 17:50:12.552015 TrainedVREFDQ_A0==75
405 17:50:12.556959 TrainedVREFDQ_A1==74
406 17:50:12.557285 VrefDac_Margin_A0==23
407 17:50:12.557505 DeviceVref_Margin_A0==39
408 17:50:12.562546 VrefDac_Margin_A1==22
409 17:50:12.562856 DeviceVref_Margin_A1==40
410 17:50:12.563073
411 17:50:12.563283
412 17:50:12.563489 channel==1
413 17:50:12.568191 RxClkDly_Margin_A0==78 ps 8
414 17:50:12.568538 TxDqDly_Margin_A0==98 ps 10
415 17:50:12.573716 RxClkDly_Margin_A1==78 ps 8
416 17:50:12.574024 TxDqDly_Margin_A1==98 ps 10
417 17:50:12.579352 TrainedVREFDQ_A0==78
418 17:50:12.579671 TrainedVREFDQ_A1==78
419 17:50:12.579887 VrefDac_Margin_A0==22
420 17:50:12.584974 DeviceVref_Margin_A0==36
421 17:50:12.585289 VrefDac_Margin_A1==22
422 17:50:12.590549 DeviceVref_Margin_A1==36
423 17:50:12.590843
424 17:50:12.591062 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 17:50:12.591270
426 17:50:12.624193 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 17:50:12.624671 2D training succeed
428 17:50:12.629753 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 17:50:12.635358 auto size-- 65535DDR cs0 size: 2048MB
430 17:50:12.635693 DDR cs1 size: 2048MB
431 17:50:12.640965 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 17:50:12.641286 cs0 DataBus test pass
433 17:50:12.646521 cs1 DataBus test pass
434 17:50:12.646821 cs0 AddrBus test pass
435 17:50:12.647040 cs1 AddrBus test pass
436 17:50:12.647247
437 17:50:12.652193 100bdlr_step_size ps== 478
438 17:50:12.652533 result report
439 17:50:12.657787 boot times 0Enable ddr reg access
440 17:50:12.662952 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 17:50:12.676790 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 17:50:13.333244 bl2z: ptr: 05129330, size: 00001e40
443 17:50:13.339561 0.0;M3 CHK:0;cm4_sp_mode 0
444 17:50:13.340159 MVN_1=0x00000000
445 17:50:13.340629 MVN_2=0x00000000
446 17:50:13.351027 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 17:50:13.351561 OPS=0x04
448 17:50:13.352053 ring efuse init
449 17:50:13.354026 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 17:50:13.359686 [0.017318 Inits done]
451 17:50:13.360213 secure task start!
452 17:50:13.360670 high task start!
453 17:50:13.361109 low task start!
454 17:50:13.364061 run into bl31
455 17:50:13.372586 NOTICE: BL31: v1.3(release):4fc40b1
456 17:50:13.380433 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 17:50:13.380958 NOTICE: BL31: G12A normal boot!
458 17:50:13.395906 NOTICE: BL31: BL33 decompress pass
459 17:50:13.401550 ERROR: Error initializing runtime service opteed_fast
460 17:50:14.643186 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 17:50:14.643857 bl2_stage_init 0x01
462 17:50:14.644411 bl2_stage_init 0x81
463 17:50:14.648677 hw id: 0x0000 - pwm id 0x01
464 17:50:14.649213 bl2_stage_init 0xc1
465 17:50:14.654283 bl2_stage_init 0x02
466 17:50:14.654832
467 17:50:14.655293 L0:00000000
468 17:50:14.655735 L1:00000703
469 17:50:14.656227 L2:00008067
470 17:50:14.656671 L3:15000000
471 17:50:14.659854 S1:00000000
472 17:50:14.660370 B2:20282000
473 17:50:14.660820 B1:a0f83180
474 17:50:14.661256
475 17:50:14.661694 TE: 68156
476 17:50:14.662133
477 17:50:14.665420 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 17:50:14.665901
479 17:50:14.671047 Board ID = 1
480 17:50:14.671524 Set cpu clk to 24M
481 17:50:14.671967 Set clk81 to 24M
482 17:50:14.676671 Use GP1_pll as DSU clk.
483 17:50:14.677159 DSU clk: 1200 Mhz
484 17:50:14.677601 CPU clk: 1200 MHz
485 17:50:14.682255 Set clk81 to 166.6M
486 17:50:14.687831 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 17:50:14.688345 board id: 1
488 17:50:14.695035 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 17:50:14.705930 fw parse done
490 17:50:14.711927 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 17:50:14.755032 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 17:50:14.766204 PIEI prepare done
493 17:50:14.766729 fastboot data load
494 17:50:14.767188 fastboot data verify
495 17:50:14.771719 verify result: 266
496 17:50:14.777344 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 17:50:14.777840 LPDDR4 probe
498 17:50:14.778286 ddr clk to 1584MHz
499 17:50:16.147202 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 17:50:16.147888 bl2_stage_init 0x01
501 17:50:16.148421 bl2_stage_init 0x81
502 17:50:16.152693 hw id: 0x0000 - pwm id 0x01
503 17:50:16.153201 bl2_stage_init 0xc1
504 17:50:16.158439 bl2_stage_init 0x02
505 17:50:16.158972
506 17:50:16.159411 L0:00000000
507 17:50:16.159833 L1:00000703
508 17:50:16.160303 L2:00008067
509 17:50:16.160729 L3:15000000
510 17:50:16.163912 S1:00000000
511 17:50:16.164407 B2:20282000
512 17:50:16.164838 B1:a0f83180
513 17:50:16.165262
514 17:50:16.165687 TE: 71567
515 17:50:16.166138
516 17:50:16.169492 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 17:50:16.169965
518 17:50:16.175084 Board ID = 1
519 17:50:16.175547 Set cpu clk to 24M
520 17:50:16.175976 Set clk81 to 24M
521 17:50:16.180667 Use GP1_pll as DSU clk.
522 17:50:16.181130 DSU clk: 1200 Mhz
523 17:50:16.181556 CPU clk: 1200 MHz
524 17:50:16.186348 Set clk81 to 166.6M
525 17:50:16.191853 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 17:50:16.192355 board id: 1
527 17:50:16.199076 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 17:50:16.209770 fw parse done
529 17:50:16.215687 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 17:50:16.258358 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 17:50:16.269301 PIEI prepare done
532 17:50:16.269768 fastboot data load
533 17:50:16.270204 fastboot data verify
534 17:50:16.274848 verify result: 266
535 17:50:16.280451 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 17:50:16.280912 LPDDR4 probe
537 17:50:16.281338 ddr clk to 1584MHz
538 17:50:16.288456 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 17:50:16.325680
540 17:50:16.326164 dmc_version 0001
541 17:50:16.332379 Check phy result
542 17:50:16.338355 INFO : End of CA training
543 17:50:16.338819 INFO : End of initialization
544 17:50:16.343939 INFO : Training has run successfully!
545 17:50:16.344466 Check phy result
546 17:50:16.349484 INFO : End of initialization
547 17:50:16.349960 INFO : End of read enable training
548 17:50:16.355060 INFO : End of fine write leveling
549 17:50:16.360674 INFO : End of Write leveling coarse delay
550 17:50:16.361144 INFO : Training has run successfully!
551 17:50:16.361598 Check phy result
552 17:50:16.366272 INFO : End of initialization
553 17:50:16.366758 INFO : End of read dq deskew training
554 17:50:16.371868 INFO : End of MPR read delay center optimization
555 17:50:16.377480 INFO : End of write delay center optimization
556 17:50:16.383063 INFO : End of read delay center optimization
557 17:50:16.383553 INFO : End of max read latency training
558 17:50:16.388686 INFO : Training has run successfully!
559 17:50:16.389175 1D training succeed
560 17:50:16.397877 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 17:50:16.445719 Check phy result
562 17:50:16.446320 INFO : End of initialization
563 17:50:16.467842 INFO : End of 2D read delay Voltage center optimization
564 17:50:16.486952 INFO : End of 2D read delay Voltage center optimization
565 17:50:16.538950 INFO : End of 2D write delay Voltage center optimization
566 17:50:16.588061 INFO : End of 2D write delay Voltage center optimization
567 17:50:16.593617 INFO : Training has run successfully!
568 17:50:16.594111
569 17:50:16.594566 channel==0
570 17:50:16.599188 RxClkDly_Margin_A0==78 ps 8
571 17:50:16.599675 TxDqDly_Margin_A0==98 ps 10
572 17:50:16.604795 RxClkDly_Margin_A1==88 ps 9
573 17:50:16.605280 TxDqDly_Margin_A1==98 ps 10
574 17:50:16.605730 TrainedVREFDQ_A0==74
575 17:50:16.610461 TrainedVREFDQ_A1==74
576 17:50:16.610942 VrefDac_Margin_A0==24
577 17:50:16.611393 DeviceVref_Margin_A0==40
578 17:50:16.615971 VrefDac_Margin_A1==22
579 17:50:16.616476 DeviceVref_Margin_A1==40
580 17:50:16.616922
581 17:50:16.617367
582 17:50:16.621600 channel==1
583 17:50:16.622081 RxClkDly_Margin_A0==78 ps 8
584 17:50:16.622528 TxDqDly_Margin_A0==98 ps 10
585 17:50:16.627143 RxClkDly_Margin_A1==78 ps 8
586 17:50:16.627607 TxDqDly_Margin_A1==98 ps 10
587 17:50:16.632813 TrainedVREFDQ_A0==78
588 17:50:16.633369 TrainedVREFDQ_A1==78
589 17:50:16.633829 VrefDac_Margin_A0==22
590 17:50:16.638459 DeviceVref_Margin_A0==36
591 17:50:16.638953 VrefDac_Margin_A1==22
592 17:50:16.644020 DeviceVref_Margin_A1==36
593 17:50:16.644515
594 17:50:16.644961 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 17:50:16.645408
596 17:50:16.677604 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 17:50:16.678189 2D training succeed
598 17:50:16.683195 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 17:50:16.688780 auto size-- 65535DDR cs0 size: 2048MB
600 17:50:16.689272 DDR cs1 size: 2048MB
601 17:50:16.694453 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 17:50:16.694944 cs0 DataBus test pass
603 17:50:16.700012 cs1 DataBus test pass
604 17:50:16.700520 cs0 AddrBus test pass
605 17:50:16.700978 cs1 AddrBus test pass
606 17:50:16.701420
607 17:50:16.705572 100bdlr_step_size ps== 478
608 17:50:16.706072 result report
609 17:50:16.711196 boot times 0Enable ddr reg access
610 17:50:16.716586 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 17:50:16.730421 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 17:50:17.385419 bl2z: ptr: 05129330, size: 00001e40
613 17:50:17.391264 0.0;M3 CHK:0;cm4_sp_mode 0
614 17:50:17.391788 MVN_1=0x00000000
615 17:50:17.392308 MVN_2=0x00000000
616 17:50:17.402696 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 17:50:17.403208 OPS=0x04
618 17:50:17.403670 ring efuse init
619 17:50:17.408242 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 17:50:17.408752 [0.017319 Inits done]
621 17:50:17.409200 secure task start!
622 17:50:17.416498 high task start!
623 17:50:17.417025 low task start!
624 17:50:17.417483 run into bl31
625 17:50:17.424990 NOTICE: BL31: v1.3(release):4fc40b1
626 17:50:17.432793 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 17:50:17.433369 NOTICE: BL31: G12A normal boot!
628 17:50:17.448243 NOTICE: BL31: BL33 decompress pass
629 17:50:17.453973 ERROR: Error initializing runtime service opteed_fast
630 17:50:18.844101 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 17:50:18.844752 bl2_stage_init 0x01
632 17:50:18.845216 bl2_stage_init 0x81
633 17:50:18.849678 hw id: 0x0000 - pwm id 0x01
634 17:50:18.850164 bl2_stage_init 0xc1
635 17:50:18.853987 bl2_stage_init 0x02
636 17:50:18.854469
637 17:50:18.854925 L0:00000000
638 17:50:18.855369 L1:00000703
639 17:50:18.855813 L2:00008067
640 17:50:18.859483 L3:15000000
641 17:50:18.859963 S1:00000000
642 17:50:18.860446 B2:20282000
643 17:50:18.860887 B1:a0f83180
644 17:50:18.861322
645 17:50:18.861760 TE: 69089
646 17:50:18.865070
647 17:50:18.870660 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 17:50:18.871141
649 17:50:18.871588 Board ID = 1
650 17:50:18.872060 Set cpu clk to 24M
651 17:50:18.874288 Set clk81 to 24M
652 17:50:18.874761 Use GP1_pll as DSU clk.
653 17:50:18.879942 DSU clk: 1200 Mhz
654 17:50:18.880447 CPU clk: 1200 MHz
655 17:50:18.880892 Set clk81 to 166.6M
656 17:50:18.885393 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 17:50:18.890929 board id: 1
658 17:50:18.894988 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 17:50:18.906861 fw parse done
660 17:50:18.912862 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 17:50:18.955947 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 17:50:18.967048 PIEI prepare done
663 17:50:18.967536 fastboot data load
664 17:50:18.968026 fastboot data verify
665 17:50:18.972670 verify result: 266
666 17:50:18.978263 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 17:50:18.978739 LPDDR4 probe
668 17:50:18.979188 ddr clk to 1584MHz
669 17:50:18.986248 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 17:50:19.024009
671 17:50:19.024532 dmc_version 0001
672 17:50:19.030868 Check phy result
673 17:50:19.036982 INFO : End of CA training
674 17:50:19.037464 INFO : End of initialization
675 17:50:19.042621 INFO : Training has run successfully!
676 17:50:19.043221 Check phy result
677 17:50:19.048243 INFO : End of initialization
678 17:50:19.048784 INFO : End of read enable training
679 17:50:19.053770 INFO : End of fine write leveling
680 17:50:19.059370 INFO : End of Write leveling coarse delay
681 17:50:19.059858 INFO : Training has run successfully!
682 17:50:19.060368 Check phy result
683 17:50:19.064990 INFO : End of initialization
684 17:50:19.065475 INFO : End of read dq deskew training
685 17:50:19.070565 INFO : End of MPR read delay center optimization
686 17:50:19.076240 INFO : End of write delay center optimization
687 17:50:19.081823 INFO : End of read delay center optimization
688 17:50:19.082301 INFO : End of max read latency training
689 17:50:19.087396 INFO : Training has run successfully!
690 17:50:19.087872 1D training succeed
691 17:50:19.096612 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 17:50:19.145041 Check phy result
693 17:50:19.145649 INFO : End of initialization
694 17:50:19.172225 INFO : End of 2D read delay Voltage center optimization
695 17:50:19.196596 INFO : End of 2D read delay Voltage center optimization
696 17:50:19.253192 INFO : End of 2D write delay Voltage center optimization
697 17:50:19.307194 INFO : End of 2D write delay Voltage center optimization
698 17:50:19.312721 INFO : Training has run successfully!
699 17:50:19.313242
700 17:50:19.313719 channel==0
701 17:50:19.318278 RxClkDly_Margin_A0==78 ps 8
702 17:50:19.318755 TxDqDly_Margin_A0==88 ps 9
703 17:50:19.323959 RxClkDly_Margin_A1==69 ps 7
704 17:50:19.324462 TxDqDly_Margin_A1==88 ps 9
705 17:50:19.324917 TrainedVREFDQ_A0==74
706 17:50:19.329547 TrainedVREFDQ_A1==74
707 17:50:19.330037 VrefDac_Margin_A0==23
708 17:50:19.330486 DeviceVref_Margin_A0==40
709 17:50:19.335162 VrefDac_Margin_A1==23
710 17:50:19.335653 DeviceVref_Margin_A1==40
711 17:50:19.336137
712 17:50:19.336586
713 17:50:19.337029 channel==1
714 17:50:19.340659 RxClkDly_Margin_A0==88 ps 9
715 17:50:19.341219 TxDqDly_Margin_A0==88 ps 9
716 17:50:19.346332 RxClkDly_Margin_A1==78 ps 8
717 17:50:19.346855 TxDqDly_Margin_A1==78 ps 8
718 17:50:19.351895 TrainedVREFDQ_A0==75
719 17:50:19.352422 TrainedVREFDQ_A1==75
720 17:50:19.352884 VrefDac_Margin_A0==22
721 17:50:19.357473 DeviceVref_Margin_A0==38
722 17:50:19.357955 VrefDac_Margin_A1==22
723 17:50:19.358408 DeviceVref_Margin_A1==38
724 17:50:19.363077
725 17:50:19.363569 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 17:50:19.364058
727 17:50:19.396571 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
728 17:50:19.397134 2D training succeed
729 17:50:19.402178 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 17:50:19.407864 auto size-- 65535DDR cs0 size: 2048MB
731 17:50:19.408405 DDR cs1 size: 2048MB
732 17:50:19.413526 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 17:50:19.414024 cs0 DataBus test pass
734 17:50:19.419083 cs1 DataBus test pass
735 17:50:19.419582 cs0 AddrBus test pass
736 17:50:19.420077 cs1 AddrBus test pass
737 17:50:19.420534
738 17:50:19.424622 100bdlr_step_size ps== 471
739 17:50:19.425140 result report
740 17:50:19.430205 boot times 0Enable ddr reg access
741 17:50:19.435188 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 17:50:19.449095 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 17:50:20.110267 bl2z: ptr: 05129330, size: 00001e40
744 17:50:20.117414 0.0;M3 CHK:0;cm4_sp_mode 0
745 17:50:20.117917 MVN_1=0x00000000
746 17:50:20.118373 MVN_2=0x00000000
747 17:50:20.128965 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 17:50:20.129459 OPS=0x04
749 17:50:20.129919 ring efuse init
750 17:50:20.131895 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 17:50:20.137499 [0.017354 Inits done]
752 17:50:20.137977 secure task start!
753 17:50:20.138427 high task start!
754 17:50:20.138866 low task start!
755 17:50:20.141723 run into bl31
756 17:50:20.150319 NOTICE: BL31: v1.3(release):4fc40b1
757 17:50:20.158128 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 17:50:20.158635 NOTICE: BL31: G12A normal boot!
759 17:50:20.173787 NOTICE: BL31: BL33 decompress pass
760 17:50:20.179496 ERROR: Error initializing runtime service opteed_fast
761 17:50:20.974915
762 17:50:20.975601
763 17:50:20.980279 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 17:50:20.980816
765 17:50:20.983706 Model: Libre Computer AML-S905D3-CC Solitude
766 17:50:21.130813 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 17:50:21.146167 DRAM: 2 GiB (effective 3.8 GiB)
768 17:50:21.247154 Core: 406 devices, 33 uclasses, devicetree: separate
769 17:50:21.253001 WDT: Not starting watchdog@f0d0
770 17:50:21.278100 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 17:50:21.290310 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 17:50:21.295235 ** Bad device specification mmc 0 **
773 17:50:21.305292 Card did not respond to voltage select! : -110
774 17:50:21.312939 ** Bad device specification mmc 0 **
775 17:50:21.313411 Couldn't find partition mmc 0
776 17:50:21.321274 Card did not respond to voltage select! : -110
777 17:50:21.326788 ** Bad device specification mmc 0 **
778 17:50:21.327252 Couldn't find partition mmc 0
779 17:50:21.331849 Error: could not access storage.
780 17:50:21.629514 Net: eth0: ethernet@ff3f0000
781 17:50:21.630168 starting USB...
782 17:50:21.874162 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 17:50:21.874815 Starting the controller
784 17:50:21.881062 USB XHCI 1.10
785 17:50:23.435354 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 17:50:23.443506 scanning usb for storage devices... 0 Storage Device(s) found
788 17:50:23.495130 Hit any key to stop autoboot: 1
789 17:50:23.496102 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 17:50:23.496752 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 17:50:23.497282 Setting prompt string to ['=>']
792 17:50:23.497815 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 17:50:23.509537 0
794 17:50:23.510499 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 17:50:23.611848 => setenv autoload no
797 17:50:23.612624 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 17:50:23.616733 setenv autoload no
800 17:50:23.717827 => setenv initrd_high 0xffffffff
801 17:50:23.718570 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 17:50:23.722628 setenv initrd_high 0xffffffff
804 17:50:23.823735 => setenv fdt_high 0xffffffff
805 17:50:23.824504 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 17:50:23.828551 setenv fdt_high 0xffffffff
808 17:50:23.929676 => dhcp
809 17:50:23.930364 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 17:50:23.934229 dhcp
811 17:50:24.790304 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 17:50:24.790969 Speed: 1000, full duplex
813 17:50:24.791437 BOOTP broadcast 1
814 17:50:25.038922 BOOTP broadcast 2
815 17:50:25.064924 DHCP client bound to address 192.168.6.21 (274 ms)
817 17:50:25.166652 => setenv serverip 192.168.6.2
818 17:50:25.167438 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
819 17:50:25.171944 setenv serverip 192.168.6.2
821 17:50:25.273531 => tftpboot 0x01080000 953262/tftp-deploy-uszde3zh/kernel/uImage
822 17:50:25.274311 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
823 17:50:25.281009 tftpboot 0x01080000 953262/tftp-deploy-uszde3zh/kernel/uImage
824 17:50:25.281546 Speed: 1000, full duplex
825 17:50:25.282005 Using ethernet@ff3f0000 device
826 17:50:25.286526 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
827 17:50:25.292091 Filename '953262/tftp-deploy-uszde3zh/kernel/uImage'.
828 17:50:25.295888 Load address: 0x1080000
829 17:50:28.100743 Loading: *################################################## 44 MiB
830 17:50:28.101401 15.7 MiB/s
831 17:50:28.101879 done
832 17:50:28.105076 Bytes transferred = 46121536 (2bfc240 hex)
834 17:50:28.206714 => tftpboot 0x08000000 953262/tftp-deploy-uszde3zh/ramdisk/ramdisk.cpio.gz.uboot
835 17:50:28.207503 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
836 17:50:28.214223 tftpboot 0x08000000 953262/tftp-deploy-uszde3zh/ramdisk/ramdisk.cpio.gz.uboot
837 17:50:28.214750 Speed: 1000, full duplex
838 17:50:28.215189 Using ethernet@ff3f0000 device
839 17:50:28.219698 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
840 17:50:28.229527 Filename '953262/tftp-deploy-uszde3zh/ramdisk/ramdisk.cpio.gz.uboot'.
841 17:50:28.230013 Load address: 0x8000000
842 17:50:29.688153 Loading: *################################################# UDP wrong checksum 00000005 000045b9
843 17:50:34.688946 T UDP wrong checksum 00000005 000045b9
844 17:50:44.690899 T T UDP wrong checksum 00000005 000045b9
845 17:51:04.692677 T T T UDP wrong checksum 00000005 000045b9
846 17:51:24.463657 T T T T UDP wrong checksum 000000ff 00005f45
847 17:51:24.475343 UDP wrong checksum 000000ff 0000e837
848 17:51:24.699580
849 17:51:24.700005 Retry count exceeded; starting again
851 17:51:24.700870 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
854 17:51:24.701827 end: 2.4 uboot-commands (duration 00:01:20) [common]
856 17:51:24.702554 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
858 17:51:24.703125 end: 2 uboot-action (duration 00:01:20) [common]
860 17:51:24.703956 Cleaning after the job
861 17:51:24.704301 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/ramdisk
862 17:51:24.705125 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/kernel
863 17:51:24.732169 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/dtb
864 17:51:24.733610 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/nfsrootfs
865 17:51:24.793987 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/953262/tftp-deploy-uszde3zh/modules
866 17:51:24.801767 start: 4.1 power-off (timeout 00:00:30) [common]
867 17:51:24.802401 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
868 17:51:24.837292 >> OK - accepted request
869 17:51:24.839277 Returned 0 in 0 seconds
870 17:51:24.940117 end: 4.1 power-off (duration 00:00:00) [common]
872 17:51:24.941093 start: 4.2 read-feedback (timeout 00:10:00) [common]
873 17:51:24.941736 Listened to connection for namespace 'common' for up to 1s
874 17:51:25.942774 Finalising connection for namespace 'common'
875 17:51:25.943534 Disconnecting from shell: Finalise
876 17:51:25.944070 =>
877 17:51:26.045145 end: 4.2 read-feedback (duration 00:00:01) [common]
878 17:51:26.045904 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/953262
879 17:51:28.525037 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/953262
880 17:51:28.525657 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.