Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 11:00:07.470515 lava-dispatcher, installed at version: 2024.01
2 11:00:07.471343 start: 0 validate
3 11:00:07.471819 Start time: 2024-11-11 11:00:07.471790+00:00 (UTC)
4 11:00:07.472414 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 11:00:07.472964 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:00:07.510037 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 11:00:07.510783 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241111%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 11:00:07.541857 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 11:00:07.542499 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241111%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 11:00:07.570822 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 11:00:07.571333 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:00:07.602440 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 11:00:07.603005 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241111%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 11:00:07.641781 validate duration: 0.17
16 11:00:07.642646 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:00:07.642975 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:00:07.643301 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:00:07.643928 Not decompressing ramdisk as can be used compressed.
20 11:00:07.644466 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 11:00:07.644776 saving as /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/ramdisk/initrd.cpio.gz
22 11:00:07.645054 total size: 5628182 (5 MB)
23 11:00:07.684902 progress 0 % (0 MB)
24 11:00:07.689110 progress 5 % (0 MB)
25 11:00:07.693591 progress 10 % (0 MB)
26 11:00:07.697511 progress 15 % (0 MB)
27 11:00:07.701919 progress 20 % (1 MB)
28 11:00:07.705728 progress 25 % (1 MB)
29 11:00:07.710084 progress 30 % (1 MB)
30 11:00:07.714428 progress 35 % (1 MB)
31 11:00:07.718314 progress 40 % (2 MB)
32 11:00:07.722574 progress 45 % (2 MB)
33 11:00:07.726452 progress 50 % (2 MB)
34 11:00:07.730725 progress 55 % (2 MB)
35 11:00:07.734887 progress 60 % (3 MB)
36 11:00:07.738672 progress 65 % (3 MB)
37 11:00:07.742724 progress 70 % (3 MB)
38 11:00:07.746514 progress 75 % (4 MB)
39 11:00:07.750611 progress 80 % (4 MB)
40 11:00:07.754459 progress 85 % (4 MB)
41 11:00:07.758627 progress 90 % (4 MB)
42 11:00:07.762732 progress 95 % (5 MB)
43 11:00:07.766131 progress 100 % (5 MB)
44 11:00:07.766821 5 MB downloaded in 0.12 s (44.09 MB/s)
45 11:00:07.767392 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:00:07.768355 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:00:07.768670 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:00:07.768957 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:00:07.769443 downloading http://storage.kernelci.org/next/master/next-20241111/arm64/defconfig+debug/gcc-12/kernel/Image
51 11:00:07.769693 saving as /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/kernel/Image
52 11:00:07.769910 total size: 172022272 (164 MB)
53 11:00:07.770127 No compression specified
54 11:00:07.804732 progress 0 % (0 MB)
55 11:00:07.909417 progress 5 % (8 MB)
56 11:00:08.013088 progress 10 % (16 MB)
57 11:00:08.117538 progress 15 % (24 MB)
58 11:00:08.222362 progress 20 % (32 MB)
59 11:00:08.327564 progress 25 % (41 MB)
60 11:00:08.433339 progress 30 % (49 MB)
61 11:00:08.538406 progress 35 % (57 MB)
62 11:00:08.642549 progress 40 % (65 MB)
63 11:00:08.748754 progress 45 % (73 MB)
64 11:00:08.853404 progress 50 % (82 MB)
65 11:00:08.957795 progress 55 % (90 MB)
66 11:00:09.062481 progress 60 % (98 MB)
67 11:00:09.169327 progress 65 % (106 MB)
68 11:00:09.276652 progress 70 % (114 MB)
69 11:00:09.384604 progress 75 % (123 MB)
70 11:00:09.490088 progress 80 % (131 MB)
71 11:00:09.597348 progress 85 % (139 MB)
72 11:00:09.703726 progress 90 % (147 MB)
73 11:00:09.810021 progress 95 % (155 MB)
74 11:00:09.915565 progress 100 % (164 MB)
75 11:00:09.916333 164 MB downloaded in 2.15 s (76.43 MB/s)
76 11:00:09.916817 end: 1.2.1 http-download (duration 00:00:02) [common]
78 11:00:09.917634 end: 1.2 download-retry (duration 00:00:02) [common]
79 11:00:09.917906 start: 1.3 download-retry (timeout 00:09:58) [common]
80 11:00:09.918171 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 11:00:09.918650 downloading http://storage.kernelci.org/next/master/next-20241111/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 11:00:09.918913 saving as /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/dtb/meson-g12b-a311d-libretech-cc.dtb
83 11:00:09.919121 total size: 54703 (0 MB)
84 11:00:09.919331 No compression specified
85 11:00:09.954384 progress 59 % (0 MB)
86 11:00:09.955283 progress 100 % (0 MB)
87 11:00:09.955912 0 MB downloaded in 0.04 s (1.42 MB/s)
88 11:00:09.956448 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:00:09.957271 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:00:09.957604 start: 1.4 download-retry (timeout 00:09:58) [common]
92 11:00:09.957871 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 11:00:09.958350 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 11:00:09.958597 saving as /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/nfsrootfs/full.rootfs.tar
95 11:00:09.958865 total size: 107552908 (102 MB)
96 11:00:09.959081 Using unxz to decompress xz
97 11:00:09.991806 progress 0 % (0 MB)
98 11:00:10.637547 progress 5 % (5 MB)
99 11:00:11.362034 progress 10 % (10 MB)
100 11:00:12.087312 progress 15 % (15 MB)
101 11:00:12.847331 progress 20 % (20 MB)
102 11:00:13.422307 progress 25 % (25 MB)
103 11:00:14.107837 progress 30 % (30 MB)
104 11:00:14.889607 progress 35 % (35 MB)
105 11:00:15.261868 progress 40 % (41 MB)
106 11:00:15.724442 progress 45 % (46 MB)
107 11:00:16.417912 progress 50 % (51 MB)
108 11:00:17.115483 progress 55 % (56 MB)
109 11:00:17.878399 progress 60 % (61 MB)
110 11:00:18.648740 progress 65 % (66 MB)
111 11:00:19.388922 progress 70 % (71 MB)
112 11:00:20.164251 progress 75 % (76 MB)
113 11:00:20.954260 progress 80 % (82 MB)
114 11:00:21.686014 progress 85 % (87 MB)
115 11:00:22.482422 progress 90 % (92 MB)
116 11:00:23.236594 progress 95 % (97 MB)
117 11:00:24.003113 progress 100 % (102 MB)
118 11:00:24.015574 102 MB downloaded in 14.06 s (7.30 MB/s)
119 11:00:24.016607 end: 1.4.1 http-download (duration 00:00:14) [common]
121 11:00:24.018263 end: 1.4 download-retry (duration 00:00:14) [common]
122 11:00:24.018787 start: 1.5 download-retry (timeout 00:09:44) [common]
123 11:00:24.019300 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 11:00:24.020346 downloading http://storage.kernelci.org/next/master/next-20241111/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 11:00:24.020845 saving as /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/modules/modules.tar
126 11:00:24.021254 total size: 27877612 (26 MB)
127 11:00:24.021674 Using unxz to decompress xz
128 11:00:24.074059 progress 0 % (0 MB)
129 11:00:24.262005 progress 5 % (1 MB)
130 11:00:24.464548 progress 10 % (2 MB)
131 11:00:24.694386 progress 15 % (4 MB)
132 11:00:24.932501 progress 20 % (5 MB)
133 11:00:25.132404 progress 25 % (6 MB)
134 11:00:25.338463 progress 30 % (8 MB)
135 11:00:25.540313 progress 35 % (9 MB)
136 11:00:25.739639 progress 40 % (10 MB)
137 11:00:25.929482 progress 45 % (11 MB)
138 11:00:26.143352 progress 50 % (13 MB)
139 11:00:26.342993 progress 55 % (14 MB)
140 11:00:26.562910 progress 60 % (15 MB)
141 11:00:26.768251 progress 65 % (17 MB)
142 11:00:26.975462 progress 70 % (18 MB)
143 11:00:27.191268 progress 75 % (19 MB)
144 11:00:27.398335 progress 80 % (21 MB)
145 11:00:27.618300 progress 85 % (22 MB)
146 11:00:27.830578 progress 90 % (23 MB)
147 11:00:28.045640 progress 95 % (25 MB)
148 11:00:28.248556 progress 100 % (26 MB)
149 11:00:28.262762 26 MB downloaded in 4.24 s (6.27 MB/s)
150 11:00:28.263610 end: 1.5.1 http-download (duration 00:00:04) [common]
152 11:00:28.264691 end: 1.5 download-retry (duration 00:00:04) [common]
153 11:00:28.265038 start: 1.6 prepare-tftp-overlay (timeout 00:09:39) [common]
154 11:00:28.265373 start: 1.6.1 extract-nfsrootfs (timeout 00:09:39) [common]
155 11:00:40.025600 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/974734/extract-nfsrootfs-vcpywi8m
156 11:00:40.026335 end: 1.6.1 extract-nfsrootfs (duration 00:00:12) [common]
157 11:00:40.026698 start: 1.6.2 lava-overlay (timeout 00:09:28) [common]
158 11:00:40.027527 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u
159 11:00:40.028116 makedir: /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin
160 11:00:40.028537 makedir: /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/tests
161 11:00:40.028956 makedir: /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/results
162 11:00:40.029378 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-add-keys
163 11:00:40.030054 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-add-sources
164 11:00:40.030682 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-background-process-start
165 11:00:40.031278 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-background-process-stop
166 11:00:40.031915 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-common-functions
167 11:00:40.032571 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-echo-ipv4
168 11:00:40.033160 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-install-packages
169 11:00:40.033758 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-installed-packages
170 11:00:40.034331 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-os-build
171 11:00:40.034943 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-probe-channel
172 11:00:40.035535 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-probe-ip
173 11:00:40.036162 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-target-ip
174 11:00:40.036763 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-target-mac
175 11:00:40.037352 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-target-storage
176 11:00:40.037953 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-test-case
177 11:00:40.038544 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-test-event
178 11:00:40.039116 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-test-feedback
179 11:00:40.039695 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-test-raise
180 11:00:40.040333 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-test-reference
181 11:00:40.040944 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-test-runner
182 11:00:40.041545 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-test-set
183 11:00:40.042136 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-test-shell
184 11:00:40.042740 Updating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-install-packages (oe)
185 11:00:40.043385 Updating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/bin/lava-installed-packages (oe)
186 11:00:40.043921 Creating /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/environment
187 11:00:40.044406 LAVA metadata
188 11:00:40.044727 - LAVA_JOB_ID=974734
189 11:00:40.044989 - LAVA_DISPATCHER_IP=192.168.6.2
190 11:00:40.045441 start: 1.6.2.1 ssh-authorize (timeout 00:09:28) [common]
191 11:00:40.046613 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 11:00:40.047009 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:28) [common]
193 11:00:40.047271 skipped lava-vland-overlay
194 11:00:40.047572 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 11:00:40.047935 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:28) [common]
196 11:00:40.048263 skipped lava-multinode-overlay
197 11:00:40.048573 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 11:00:40.048892 start: 1.6.2.4 test-definition (timeout 00:09:28) [common]
199 11:00:40.049207 Loading test definitions
200 11:00:40.049550 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:28) [common]
201 11:00:40.049820 Using /lava-974734 at stage 0
202 11:00:40.051334 uuid=974734_1.6.2.4.1 testdef=None
203 11:00:40.051746 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 11:00:40.052117 start: 1.6.2.4.2 test-overlay (timeout 00:09:28) [common]
205 11:00:40.054402 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 11:00:40.055377 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:28) [common]
208 11:00:40.058244 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 11:00:40.059259 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:28) [common]
211 11:00:40.061974 runner path: /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/0/tests/0_dmesg test_uuid 974734_1.6.2.4.1
212 11:00:40.062676 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 11:00:40.063602 Creating lava-test-runner.conf files
215 11:00:40.063851 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/974734/lava-overlay-d_bhbi2u/lava-974734/0 for stage 0
216 11:00:40.064302 - 0_dmesg
217 11:00:40.064728 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 11:00:40.065070 start: 1.6.2.5 compress-overlay (timeout 00:09:28) [common]
219 11:00:40.091639 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 11:00:40.092193 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:28) [common]
221 11:00:40.092522 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 11:00:40.092847 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 11:00:40.093170 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:28) [common]
224 11:00:40.870168 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 11:00:40.870647 start: 1.6.4 extract-modules (timeout 00:09:27) [common]
226 11:00:40.870897 extracting modules file /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974734/extract-nfsrootfs-vcpywi8m
227 11:00:42.567515 extracting modules file /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974734/extract-overlay-ramdisk-7658ouks/ramdisk
228 11:00:44.309720 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 11:00:44.310205 start: 1.6.5 apply-overlay-tftp (timeout 00:09:23) [common]
230 11:00:44.310484 [common] Applying overlay to NFS
231 11:00:44.310696 [common] Applying overlay /var/lib/lava/dispatcher/tmp/974734/compress-overlay-ymy859il/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/974734/extract-nfsrootfs-vcpywi8m
232 11:00:44.339884 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 11:00:44.340336 start: 1.6.6 prepare-kernel (timeout 00:09:23) [common]
234 11:00:44.340611 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:23) [common]
235 11:00:44.340844 Converting downloaded kernel to a uImage
236 11:00:44.341154 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/kernel/Image /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/kernel/uImage
237 11:00:46.321927 output: Image Name:
238 11:00:46.322344 output: Created: Mon Nov 11 11:00:44 2024
239 11:00:46.322556 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 11:00:46.322760 output: Data Size: 172022272 Bytes = 167990.50 KiB = 164.05 MiB
241 11:00:46.322962 output: Load Address: 01080000
242 11:00:46.323164 output: Entry Point: 01080000
243 11:00:46.323363 output:
244 11:00:46.323700 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 11:00:46.323963 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 11:00:46.324281 start: 1.6.7 configure-preseed-file (timeout 00:09:21) [common]
247 11:00:46.324539 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 11:00:46.324795 start: 1.6.8 compress-ramdisk (timeout 00:09:21) [common]
249 11:00:46.325049 Building ramdisk /var/lib/lava/dispatcher/tmp/974734/extract-overlay-ramdisk-7658ouks/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/974734/extract-overlay-ramdisk-7658ouks/ramdisk
250 11:00:52.040176 >> 430763 blocks
251 11:01:09.876665 Adding RAMdisk u-boot header.
252 11:01:09.877127 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/974734/extract-overlay-ramdisk-7658ouks/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/974734/extract-overlay-ramdisk-7658ouks/ramdisk.cpio.gz.uboot
253 11:01:10.398387 output: Image Name:
254 11:01:10.398825 output: Created: Mon Nov 11 11:01:09 2024
255 11:01:10.399323 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 11:01:10.399754 output: Data Size: 51475021 Bytes = 50268.58 KiB = 49.09 MiB
257 11:01:10.400270 output: Load Address: 00000000
258 11:01:10.400693 output: Entry Point: 00000000
259 11:01:10.401103 output:
260 11:01:10.402290 rename /var/lib/lava/dispatcher/tmp/974734/extract-overlay-ramdisk-7658ouks/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/ramdisk/ramdisk.cpio.gz.uboot
261 11:01:10.403078 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 11:01:10.403653 end: 1.6 prepare-tftp-overlay (duration 00:00:42) [common]
263 11:01:10.404280 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 11:01:10.404774 No LXC device requested
265 11:01:10.405309 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 11:01:10.405848 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 11:01:10.406363 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 11:01:10.406795 Checking files for TFTP limit of 4294967296 bytes.
269 11:01:10.409803 end: 1 tftp-deploy (duration 00:01:03) [common]
270 11:01:10.410550 start: 2 uboot-action (timeout 00:05:00) [common]
271 11:01:10.411145 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 11:01:10.411751 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 11:01:10.412436 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 11:01:10.413085 Using kernel file from prepare-kernel: 974734/tftp-deploy-wsjiqr8f/kernel/uImage
275 11:01:10.413821 substitutions:
276 11:01:10.414562 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 11:01:10.415123 - {DTB_ADDR}: 0x01070000
278 11:01:10.415610 - {DTB}: 974734/tftp-deploy-wsjiqr8f/dtb/meson-g12b-a311d-libretech-cc.dtb
279 11:01:10.416086 - {INITRD}: 974734/tftp-deploy-wsjiqr8f/ramdisk/ramdisk.cpio.gz.uboot
280 11:01:10.416542 - {KERNEL_ADDR}: 0x01080000
281 11:01:10.416956 - {KERNEL}: 974734/tftp-deploy-wsjiqr8f/kernel/uImage
282 11:01:10.417364 - {LAVA_MAC}: None
283 11:01:10.417827 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/974734/extract-nfsrootfs-vcpywi8m
284 11:01:10.418245 - {NFS_SERVER_IP}: 192.168.6.2
285 11:01:10.418644 - {PRESEED_CONFIG}: None
286 11:01:10.419044 - {PRESEED_LOCAL}: None
287 11:01:10.419441 - {RAMDISK_ADDR}: 0x08000000
288 11:01:10.419834 - {RAMDISK}: 974734/tftp-deploy-wsjiqr8f/ramdisk/ramdisk.cpio.gz.uboot
289 11:01:10.420272 - {ROOT_PART}: None
290 11:01:10.420682 - {ROOT}: None
291 11:01:10.421083 - {SERVER_IP}: 192.168.6.2
292 11:01:10.421480 - {TEE_ADDR}: 0x83000000
293 11:01:10.421875 - {TEE}: None
294 11:01:10.422277 Parsed boot commands:
295 11:01:10.422668 - setenv autoload no
296 11:01:10.423066 - setenv initrd_high 0xffffffff
297 11:01:10.423465 - setenv fdt_high 0xffffffff
298 11:01:10.423857 - dhcp
299 11:01:10.424281 - setenv serverip 192.168.6.2
300 11:01:10.424686 - tftpboot 0x01080000 974734/tftp-deploy-wsjiqr8f/kernel/uImage
301 11:01:10.425083 - tftpboot 0x08000000 974734/tftp-deploy-wsjiqr8f/ramdisk/ramdisk.cpio.gz.uboot
302 11:01:10.425485 - tftpboot 0x01070000 974734/tftp-deploy-wsjiqr8f/dtb/meson-g12b-a311d-libretech-cc.dtb
303 11:01:10.425883 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/974734/extract-nfsrootfs-vcpywi8m,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 11:01:10.426292 - bootm 0x01080000 0x08000000 0x01070000
305 11:01:10.426848 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 11:01:10.428463 start: 2.3 connect-device (timeout 00:05:00) [common]
308 11:01:10.428918 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 11:01:10.444191 Setting prompt string to ['lava-test: # ']
310 11:01:10.445906 end: 2.3 connect-device (duration 00:00:00) [common]
311 11:01:10.446539 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 11:01:10.447118 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 11:01:10.447689 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 11:01:10.448885 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 11:01:10.491710 >> OK - accepted request
316 11:01:10.493967 Returned 0 in 0 seconds
317 11:01:10.595088 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 11:01:10.596810 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 11:01:10.597398 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 11:01:10.597931 Setting prompt string to ['Hit any key to stop autoboot']
322 11:01:10.598408 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 11:01:10.599962 Trying 192.168.56.21...
324 11:01:10.600480 Connected to conserv1.
325 11:01:10.600911 Escape character is '^]'.
326 11:01:10.601350
327 11:01:10.601779 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 11:01:10.602204
329 11:01:22.280286 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 11:01:22.280944 bl2_stage_init 0x01
331 11:01:22.281404 bl2_stage_init 0x81
332 11:01:22.285671 hw id: 0x0000 - pwm id 0x01
333 11:01:22.286197 bl2_stage_init 0xc1
334 11:01:22.286642 bl2_stage_init 0x02
335 11:01:22.287097
336 11:01:22.291277 L0:00000000
337 11:01:22.291776 L1:20000703
338 11:01:22.292269 L2:00008067
339 11:01:22.292718 L3:14000000
340 11:01:22.296879 B2:00402000
341 11:01:22.297385 B1:e0f83180
342 11:01:22.297825
343 11:01:22.298262 TE: 58124
344 11:01:22.298705
345 11:01:22.302419 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 11:01:22.302939
347 11:01:22.303385 Board ID = 1
348 11:01:22.308150 Set A53 clk to 24M
349 11:01:22.308659 Set A73 clk to 24M
350 11:01:22.309098 Set clk81 to 24M
351 11:01:22.313603 A53 clk: 1200 MHz
352 11:01:22.314102 A73 clk: 1200 MHz
353 11:01:22.314537 CLK81: 166.6M
354 11:01:22.314968 smccc: 00012a91
355 11:01:22.319106 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 11:01:22.324975 board id: 1
357 11:01:22.329948 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 11:01:22.341248 fw parse done
359 11:01:22.346539 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 11:01:22.389499 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 11:01:22.400759 PIEI prepare done
362 11:01:22.401338 fastboot data load
363 11:01:22.401837 fastboot data verify
364 11:01:22.406513 verify result: 266
365 11:01:22.412157 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 11:01:22.412731 LPDDR4 probe
367 11:01:22.413234 ddr clk to 1584MHz
368 11:01:22.419236 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 11:01:22.456388
370 11:01:22.457035 dmc_version 0001
371 11:01:22.463029 Check phy result
372 11:01:22.469795 INFO : End of CA training
373 11:01:22.470352 INFO : End of initialization
374 11:01:22.475354 INFO : Training has run successfully!
375 11:01:22.475907 Check phy result
376 11:01:22.481029 INFO : End of initialization
377 11:01:22.481589 INFO : End of read enable training
378 11:01:22.486569 INFO : End of fine write leveling
379 11:01:22.495903 INFO : End of Write leveling coarse delay
380 11:01:22.496626 INFO : Training has run successfully!
381 11:01:22.497090 Check phy result
382 11:01:22.498131 INFO : End of initialization
383 11:01:22.498718 INFO : End of read dq deskew training
384 11:01:22.503489 INFO : End of MPR read delay center optimization
385 11:01:22.509191 INFO : End of write delay center optimization
386 11:01:22.514770 INFO : End of read delay center optimization
387 11:01:22.515342 INFO : End of max read latency training
388 11:01:22.520271 INFO : Training has run successfully!
389 11:01:22.520852 1D training succeed
390 11:01:22.528440 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 11:01:22.576500 Check phy result
392 11:01:22.577167 INFO : End of initialization
393 11:01:22.598184 INFO : End of 2D read delay Voltage center optimization
394 11:01:22.618583 INFO : End of 2D read delay Voltage center optimization
395 11:01:22.670102 INFO : End of 2D write delay Voltage center optimization
396 11:01:22.720484 INFO : End of 2D write delay Voltage center optimization
397 11:01:22.726059 INFO : Training has run successfully!
398 11:01:22.726685
399 11:01:22.727208 channel==0
400 11:01:22.731584 RxClkDly_Margin_A0==88 ps 9
401 11:01:22.732183 TxDqDly_Margin_A0==98 ps 10
402 11:01:22.734941 RxClkDly_Margin_A1==88 ps 9
403 11:01:22.735513 TxDqDly_Margin_A1==98 ps 10
404 11:01:22.751648 TrainedVREFDQ_A0==74
405 11:01:22.752157 TrainedVREFDQ_A1==74
406 11:01:22.752485 VrefDac_Margin_A0==25
407 11:01:22.752786 DeviceVref_Margin_A0==40
408 11:01:22.753084 VrefDac_Margin_A1==25
409 11:01:22.753388 DeviceVref_Margin_A1==40
410 11:01:22.753684
411 11:01:22.753981
412 11:01:22.754269 channel==1
413 11:01:22.754986 RxClkDly_Margin_A0==98 ps 10
414 11:01:22.755742 TxDqDly_Margin_A0==98 ps 10
415 11:01:22.760313 RxClkDly_Margin_A1==88 ps 9
416 11:01:22.761147 TxDqDly_Margin_A1==88 ps 9
417 11:01:22.765975 TrainedVREFDQ_A0==77
418 11:01:22.766389 TrainedVREFDQ_A1==77
419 11:01:22.766878 VrefDac_Margin_A0==22
420 11:01:22.771475 DeviceVref_Margin_A0==37
421 11:01:22.771932 VrefDac_Margin_A1==24
422 11:01:22.772481 DeviceVref_Margin_A1==37
423 11:01:22.773246
424 11:01:22.777036 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 11:01:22.777432
426 11:01:22.810729 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 11:01:22.811678 2D training succeed
428 11:01:22.816243 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 11:01:22.821807 auto size-- 65535DDR cs0 size: 2048MB
430 11:01:22.822330 DDR cs1 size: 2048MB
431 11:01:22.827399 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 11:01:22.827934 cs0 DataBus test pass
433 11:01:22.828820 cs1 DataBus test pass
434 11:01:22.833030 cs0 AddrBus test pass
435 11:01:22.833479 cs1 AddrBus test pass
436 11:01:22.833844
437 11:01:22.838681 100bdlr_step_size ps== 420
438 11:01:22.839092 result report
439 11:01:22.839425 boot times 0Enable ddr reg access
440 11:01:22.847917 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 11:01:22.861746 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 11:01:23.436090 0.0;M3 CHK:0;cm4_sp_mode 0
443 11:01:23.436750 MVN_1=0x00000000
444 11:01:23.441582 MVN_2=0x00000000
445 11:01:23.447358 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 11:01:23.447904 OPS=0x10
447 11:01:23.448409 ring efuse init
448 11:01:23.448858 chipver efuse init
449 11:01:23.452881 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 11:01:23.458469 [0.018961 Inits done]
451 11:01:23.458991 secure task start!
452 11:01:23.459438 high task start!
453 11:01:23.462869 low task start!
454 11:01:23.463370 run into bl31
455 11:01:23.472246 NOTICE: BL31: v1.3(release):4fc40b1
456 11:01:23.472779 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 11:01:23.477007 NOTICE: BL31: G12A normal boot!
458 11:01:23.502904 NOTICE: BL31: BL33 decompress pass
459 11:01:23.507573 ERROR: Error initializing runtime service opteed_fast
460 11:01:24.741458
461 11:01:24.742137
462 11:01:24.749167 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 11:01:24.749687
464 11:01:24.750144 Model: Libre Computer AML-A311D-CC Alta
465 11:01:24.957432 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 11:01:24.981445 DRAM: 2 GiB (effective 3.8 GiB)
467 11:01:25.124679 Core: 408 devices, 31 uclasses, devicetree: separate
468 11:01:25.130596 WDT: Not starting watchdog@f0d0
469 11:01:25.162819 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 11:01:25.175339 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 11:01:25.180223 ** Bad device specification mmc 0 **
472 11:01:25.190605 Card did not respond to voltage select! : -110
473 11:01:25.197595 ** Bad device specification mmc 0 **
474 11:01:25.198112 Couldn't find partition mmc 0
475 11:01:25.206563 Card did not respond to voltage select! : -110
476 11:01:25.212134 ** Bad device specification mmc 0 **
477 11:01:25.212655 Couldn't find partition mmc 0
478 11:01:25.217225 Error: could not access storage.
479 11:01:26.480693 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 11:01:26.481334 bl2_stage_init 0x01
481 11:01:26.481791 bl2_stage_init 0x81
482 11:01:26.486091 hw id: 0x0000 - pwm id 0x01
483 11:01:26.486622 bl2_stage_init 0xc1
484 11:01:26.487076 bl2_stage_init 0x02
485 11:01:26.487516
486 11:01:26.491671 L0:00000000
487 11:01:26.492223 L1:20000703
488 11:01:26.492669 L2:00008067
489 11:01:26.493106 L3:14000000
490 11:01:26.497281 B2:00402000
491 11:01:26.497789 B1:e0f83180
492 11:01:26.498235
493 11:01:26.498676 TE: 58124
494 11:01:26.499115
495 11:01:26.502857 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 11:01:26.503370
497 11:01:26.503819 Board ID = 1
498 11:01:26.508553 Set A53 clk to 24M
499 11:01:26.509056 Set A73 clk to 24M
500 11:01:26.509500 Set clk81 to 24M
501 11:01:26.514049 A53 clk: 1200 MHz
502 11:01:26.514550 A73 clk: 1200 MHz
503 11:01:26.514989 CLK81: 166.6M
504 11:01:26.515425 smccc: 00012a91
505 11:01:26.519662 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 11:01:26.525287 board id: 1
507 11:01:26.531171 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 11:01:26.541814 fw parse done
509 11:01:26.547794 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 11:01:26.590382 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 11:01:26.601305 PIEI prepare done
512 11:01:26.601806 fastboot data load
513 11:01:26.602252 fastboot data verify
514 11:01:26.607014 verify result: 266
515 11:01:26.612647 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 11:01:26.613155 LPDDR4 probe
517 11:01:26.613599 ddr clk to 1584MHz
518 11:01:26.620580 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 11:01:26.657809
520 11:01:26.658332 dmc_version 0001
521 11:01:26.664487 Check phy result
522 11:01:26.670407 INFO : End of CA training
523 11:01:26.670907 INFO : End of initialization
524 11:01:26.675926 INFO : Training has run successfully!
525 11:01:26.676467 Check phy result
526 11:01:26.681660 INFO : End of initialization
527 11:01:26.682155 INFO : End of read enable training
528 11:01:26.687164 INFO : End of fine write leveling
529 11:01:26.692777 INFO : End of Write leveling coarse delay
530 11:01:26.693293 INFO : Training has run successfully!
531 11:01:26.693740 Check phy result
532 11:01:26.698423 INFO : End of initialization
533 11:01:26.698915 INFO : End of read dq deskew training
534 11:01:26.703950 INFO : End of MPR read delay center optimization
535 11:01:26.709645 INFO : End of write delay center optimization
536 11:01:26.715162 INFO : End of read delay center optimization
537 11:01:26.715666 INFO : End of max read latency training
538 11:01:26.720806 INFO : Training has run successfully!
539 11:01:26.721323 1D training succeed
540 11:01:26.729954 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 11:01:26.777554 Check phy result
542 11:01:26.778090 INFO : End of initialization
543 11:01:26.799144 INFO : End of 2D read delay Voltage center optimization
544 11:01:26.819258 INFO : End of 2D read delay Voltage center optimization
545 11:01:26.870186 INFO : End of 2D write delay Voltage center optimization
546 11:01:26.920408 INFO : End of 2D write delay Voltage center optimization
547 11:01:26.925939 INFO : Training has run successfully!
548 11:01:26.926443
549 11:01:26.926904 channel==0
550 11:01:26.931608 RxClkDly_Margin_A0==88 ps 9
551 11:01:26.932177 TxDqDly_Margin_A0==98 ps 10
552 11:01:26.937146 RxClkDly_Margin_A1==88 ps 9
553 11:01:26.937655 TxDqDly_Margin_A1==98 ps 10
554 11:01:26.938105 TrainedVREFDQ_A0==74
555 11:01:26.942766 TrainedVREFDQ_A1==74
556 11:01:26.943279 VrefDac_Margin_A0==25
557 11:01:26.943723 DeviceVref_Margin_A0==40
558 11:01:26.948351 VrefDac_Margin_A1==25
559 11:01:26.948857 DeviceVref_Margin_A1==40
560 11:01:26.949298
561 11:01:26.949731
562 11:01:26.954018 channel==1
563 11:01:26.954556 RxClkDly_Margin_A0==98 ps 10
564 11:01:26.955000 TxDqDly_Margin_A0==88 ps 9
565 11:01:26.959722 RxClkDly_Margin_A1==98 ps 10
566 11:01:26.960269 TxDqDly_Margin_A1==88 ps 9
567 11:01:26.965192 TrainedVREFDQ_A0==76
568 11:01:26.965703 TrainedVREFDQ_A1==77
569 11:01:26.966151 VrefDac_Margin_A0==22
570 11:01:26.970759 DeviceVref_Margin_A0==38
571 11:01:26.971262 VrefDac_Margin_A1==23
572 11:01:26.976373 DeviceVref_Margin_A1==37
573 11:01:26.976874
574 11:01:26.977320 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 11:01:26.977756
576 11:01:27.009955 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 11:01:27.010558 2D training succeed
578 11:01:27.015547 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 11:01:27.021174 auto size-- 65535DDR cs0 size: 2048MB
580 11:01:27.021736 DDR cs1 size: 2048MB
581 11:01:27.026777 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 11:01:27.027296 cs0 DataBus test pass
583 11:01:27.032408 cs1 DataBus test pass
584 11:01:27.032930 cs0 AddrBus test pass
585 11:01:27.033377 cs1 AddrBus test pass
586 11:01:27.033814
587 11:01:27.037938 100bdlr_step_size ps== 420
588 11:01:27.038459 result report
589 11:01:27.043526 boot times 0Enable ddr reg access
590 11:01:27.048924 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 11:01:27.062320 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 11:01:27.634323 0.0;M3 CHK:0;cm4_sp_mode 0
593 11:01:27.634975 MVN_1=0x00000000
594 11:01:27.639845 MVN_2=0x00000000
595 11:01:27.645574 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 11:01:27.646083 OPS=0x10
597 11:01:27.646528 ring efuse init
598 11:01:27.646981 chipver efuse init
599 11:01:27.653760 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 11:01:27.654294 [0.018961 Inits done]
601 11:01:27.660347 secure task start!
602 11:01:27.660846 high task start!
603 11:01:27.661284 low task start!
604 11:01:27.661719 run into bl31
605 11:01:27.668050 NOTICE: BL31: v1.3(release):4fc40b1
606 11:01:27.674868 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 11:01:27.675393 NOTICE: BL31: G12A normal boot!
608 11:01:27.701171 NOTICE: BL31: BL33 decompress pass
609 11:01:27.705884 ERROR: Error initializing runtime service opteed_fast
610 11:01:28.939691
611 11:01:28.940405
612 11:01:28.948182 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 11:01:28.948730
614 11:01:28.949202 Model: Libre Computer AML-A311D-CC Alta
615 11:01:29.156554 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 11:01:29.179191 DRAM: 2 GiB (effective 3.8 GiB)
617 11:01:29.322874 Core: 408 devices, 31 uclasses, devicetree: separate
618 11:01:29.328740 WDT: Not starting watchdog@f0d0
619 11:01:29.361104 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 11:01:29.373523 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 11:01:29.378492 ** Bad device specification mmc 0 **
622 11:01:29.388889 Card did not respond to voltage select! : -110
623 11:01:29.396552 ** Bad device specification mmc 0 **
624 11:01:29.397090 Couldn't find partition mmc 0
625 11:01:29.404919 Card did not respond to voltage select! : -110
626 11:01:29.410426 ** Bad device specification mmc 0 **
627 11:01:29.411017 Couldn't find partition mmc 0
628 11:01:29.415546 Error: could not access storage.
629 11:01:29.757927 Net: eth0: ethernet@ff3f0000
630 11:01:29.758584 starting USB...
631 11:01:30.009811 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 11:01:30.010465 Starting the controller
633 11:01:30.016695 USB XHCI 1.10
634 11:01:31.730734 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 11:01:31.731391 bl2_stage_init 0x01
636 11:01:31.731862 bl2_stage_init 0x81
637 11:01:31.736409 hw id: 0x0000 - pwm id 0x01
638 11:01:31.736946 bl2_stage_init 0xc1
639 11:01:31.737410 bl2_stage_init 0x02
640 11:01:31.737865
641 11:01:31.741894 L0:00000000
642 11:01:31.742423 L1:20000703
643 11:01:31.742891 L2:00008067
644 11:01:31.743340 L3:14000000
645 11:01:31.744765 B2:00402000
646 11:01:31.745278 B1:e0f83180
647 11:01:31.745736
648 11:01:31.746186 TE: 58159
649 11:01:31.746635
650 11:01:31.755879 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 11:01:31.756458
652 11:01:31.756924 Board ID = 1
653 11:01:31.757382 Set A53 clk to 24M
654 11:01:31.757829 Set A73 clk to 24M
655 11:01:31.761559 Set clk81 to 24M
656 11:01:31.762073 A53 clk: 1200 MHz
657 11:01:31.762531 A73 clk: 1200 MHz
658 11:01:31.767174 CLK81: 166.6M
659 11:01:31.767691 smccc: 00012ab4
660 11:01:31.772747 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 11:01:31.773265 board id: 1
662 11:01:31.781465 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 11:01:31.792069 fw parse done
664 11:01:31.797961 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 11:01:31.840583 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 11:01:31.851521 PIEI prepare done
667 11:01:31.852078 fastboot data load
668 11:01:31.852548 fastboot data verify
669 11:01:31.857141 verify result: 266
670 11:01:31.862698 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 11:01:31.863217 LPDDR4 probe
672 11:01:31.863679 ddr clk to 1584MHz
673 11:01:31.870056 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 11:01:31.907943
675 11:01:31.908513 dmc_version 0001
676 11:01:31.914668 Check phy result
677 11:01:31.920507 INFO : End of CA training
678 11:01:31.921056 INFO : End of initialization
679 11:01:31.926077 INFO : Training has run successfully!
680 11:01:31.926591 Check phy result
681 11:01:31.931672 INFO : End of initialization
682 11:01:31.932212 INFO : End of read enable training
683 11:01:31.937404 INFO : End of fine write leveling
684 11:01:31.942903 INFO : End of Write leveling coarse delay
685 11:01:31.943422 INFO : Training has run successfully!
686 11:01:31.943878 Check phy result
687 11:01:31.948479 INFO : End of initialization
688 11:01:31.948996 INFO : End of read dq deskew training
689 11:01:31.954161 INFO : End of MPR read delay center optimization
690 11:01:31.959691 INFO : End of write delay center optimization
691 11:01:31.965447 INFO : End of read delay center optimization
692 11:01:31.965962 INFO : End of max read latency training
693 11:01:31.970927 INFO : Training has run successfully!
694 11:01:31.971438 1D training succeed
695 11:01:31.979175 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 11:01:32.027757 Check phy result
697 11:01:32.028368 INFO : End of initialization
698 11:01:32.049278 INFO : End of 2D read delay Voltage center optimization
699 11:01:32.069391 INFO : End of 2D read delay Voltage center optimization
700 11:01:32.121272 INFO : End of 2D write delay Voltage center optimization
701 11:01:32.170544 INFO : End of 2D write delay Voltage center optimization
702 11:01:32.176141 INFO : Training has run successfully!
703 11:01:32.176660
704 11:01:32.177129 channel==0
705 11:01:32.181722 RxClkDly_Margin_A0==88 ps 9
706 11:01:32.182245 TxDqDly_Margin_A0==98 ps 10
707 11:01:32.184965 RxClkDly_Margin_A1==88 ps 9
708 11:01:32.185477 TxDqDly_Margin_A1==88 ps 9
709 11:01:32.190513 TrainedVREFDQ_A0==74
710 11:01:32.191021 TrainedVREFDQ_A1==74
711 11:01:32.191483 VrefDac_Margin_A0==25
712 11:01:32.196105 DeviceVref_Margin_A0==40
713 11:01:32.196620 VrefDac_Margin_A1==25
714 11:01:32.201704 DeviceVref_Margin_A1==40
715 11:01:32.202215
716 11:01:32.202673
717 11:01:32.203125 channel==1
718 11:01:32.203564 RxClkDly_Margin_A0==98 ps 10
719 11:01:32.205049 TxDqDly_Margin_A0==88 ps 9
720 11:01:32.210631 RxClkDly_Margin_A1==98 ps 10
721 11:01:32.211142 TxDqDly_Margin_A1==88 ps 9
722 11:01:32.211602 TrainedVREFDQ_A0==75
723 11:01:32.216320 TrainedVREFDQ_A1==77
724 11:01:32.216880 VrefDac_Margin_A0==22
725 11:01:32.221835 DeviceVref_Margin_A0==38
726 11:01:32.222346 VrefDac_Margin_A1==22
727 11:01:32.222798 DeviceVref_Margin_A1==37
728 11:01:32.223242
729 11:01:32.227440 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 11:01:32.227960
731 11:01:32.260973 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
732 11:01:32.261542 2D training succeed
733 11:01:32.266666 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 11:01:32.272270 auto size-- 65535DDR cs0 size: 2048MB
735 11:01:32.272779 DDR cs1 size: 2048MB
736 11:01:32.277824 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 11:01:32.278331 cs0 DataBus test pass
738 11:01:32.278787 cs1 DataBus test pass
739 11:01:32.283507 cs0 AddrBus test pass
740 11:01:32.284047 cs1 AddrBus test pass
741 11:01:32.284509
742 11:01:32.289051 100bdlr_step_size ps== 420
743 11:01:32.289568 result report
744 11:01:32.290018 boot times 0Enable ddr reg access
745 11:01:32.298894 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 11:01:32.312320 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 11:01:32.887062 0.0;M3 CHK:0;cm4_sp_mode 0
748 11:01:32.888572 MVN_1=0x00000000
749 11:01:32.889100 MVN_2=0x00000000
750 11:01:32.894109 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 11:01:32.894633 OPS=0x10
752 11:01:32.895096 ring efuse init
753 11:01:32.899579 chipver efuse init
754 11:01:32.905287 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 11:01:32.905796 [0.018961 Inits done]
756 11:01:32.906240 secure task start!
757 11:01:32.911556 high task start!
758 11:01:32.912081 low task start!
759 11:01:32.912521 run into bl31
760 11:01:32.918165 NOTICE: BL31: v1.3(release):4fc40b1
761 11:01:32.925968 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 11:01:32.926469 NOTICE: BL31: G12A normal boot!
763 11:01:32.951297 NOTICE: BL31: BL33 decompress pass
764 11:01:32.957191 ERROR: Error initializing runtime service opteed_fast
765 11:01:34.189944
766 11:01:34.190601
767 11:01:34.198491 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 11:01:34.199018
769 11:01:34.199485 Model: Libre Computer AML-A311D-CC Alta
770 11:01:34.406978 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 11:01:34.430265 DRAM: 2 GiB (effective 3.8 GiB)
772 11:01:34.573131 Core: 408 devices, 31 uclasses, devicetree: separate
773 11:01:34.578680 WDT: Not starting watchdog@f0d0
774 11:01:34.611411 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 11:01:34.623771 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 11:01:34.628793 ** Bad device specification mmc 0 **
777 11:01:34.638988 Card did not respond to voltage select! : -110
778 11:01:34.646669 ** Bad device specification mmc 0 **
779 11:01:34.647211 Couldn't find partition mmc 0
780 11:01:34.654975 Card did not respond to voltage select! : -110
781 11:01:34.660567 ** Bad device specification mmc 0 **
782 11:01:34.661145 Couldn't find partition mmc 0
783 11:01:34.665681 Error: could not access storage.
784 11:01:35.009216 Net: eth0: ethernet@ff3f0000
785 11:01:35.009828 starting USB...
786 11:01:35.260951 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 11:01:35.261568 Starting the controller
788 11:01:35.267657 USB XHCI 1.10
789 11:01:37.461249 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 11:01:37.461833 bl2_stage_init 0x01
791 11:01:37.462265 bl2_stage_init 0x81
792 11:01:37.466387 hw id: 0x0000 - pwm id 0x01
793 11:01:37.466835 bl2_stage_init 0xc1
794 11:01:37.467250 bl2_stage_init 0x02
795 11:01:37.467657
796 11:01:37.472214 L0:00000000
797 11:01:37.472677 L1:20000703
798 11:01:37.473099 L2:00008067
799 11:01:37.473508 L3:14000000
800 11:01:37.475152 B2:00402000
801 11:01:37.475589 B1:e0f83180
802 11:01:37.476035
803 11:01:37.476452 TE: 58167
804 11:01:37.476858
805 11:01:37.486226 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 11:01:37.486672
807 11:01:37.487083 Board ID = 1
808 11:01:37.487481 Set A53 clk to 24M
809 11:01:37.487877 Set A73 clk to 24M
810 11:01:37.491820 Set clk81 to 24M
811 11:01:37.492295 A53 clk: 1200 MHz
812 11:01:37.492704 A73 clk: 1200 MHz
813 11:01:37.495620 CLK81: 166.6M
814 11:01:37.496069 smccc: 00012abe
815 11:01:37.501015 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 11:01:37.506822 board id: 1
817 11:01:37.510694 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 11:01:37.522197 fw parse done
819 11:01:37.527581 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 11:01:37.569975 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 11:01:37.581814 PIEI prepare done
822 11:01:37.582636 fastboot data load
823 11:01:37.583393 fastboot data verify
824 11:01:37.587306 verify result: 266
825 11:01:37.593004 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 11:01:37.593807 LPDDR4 probe
827 11:01:37.594448 ddr clk to 1584MHz
828 11:01:37.600870 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 11:01:37.637371
830 11:01:37.638147 dmc_version 0001
831 11:01:37.644030 Check phy result
832 11:01:37.650750 INFO : End of CA training
833 11:01:37.651513 INFO : End of initialization
834 11:01:37.656352 INFO : Training has run successfully!
835 11:01:37.656944 Check phy result
836 11:01:37.661902 INFO : End of initialization
837 11:01:37.662490 INFO : End of read enable training
838 11:01:37.665184 INFO : End of fine write leveling
839 11:01:37.670631 INFO : End of Write leveling coarse delay
840 11:01:37.676314 INFO : Training has run successfully!
841 11:01:37.676899 Check phy result
842 11:01:37.677400 INFO : End of initialization
843 11:01:37.681861 INFO : End of read dq deskew training
844 11:01:37.685373 INFO : End of MPR read delay center optimization
845 11:01:37.690839 INFO : End of write delay center optimization
846 11:01:37.696504 INFO : End of read delay center optimization
847 11:01:37.697090 INFO : End of max read latency training
848 11:01:37.702060 INFO : Training has run successfully!
849 11:01:37.702659 1D training succeed
850 11:01:37.709349 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 11:01:37.757885 Check phy result
852 11:01:37.758719 INFO : End of initialization
853 11:01:37.779433 INFO : End of 2D read delay Voltage center optimization
854 11:01:37.798919 INFO : End of 2D read delay Voltage center optimization
855 11:01:37.851082 INFO : End of 2D write delay Voltage center optimization
856 11:01:37.901271 INFO : End of 2D write delay Voltage center optimization
857 11:01:37.906913 INFO : Training has run successfully!
858 11:01:37.907684
859 11:01:37.908440 channel==0
860 11:01:37.912528 RxClkDly_Margin_A0==78 ps 8
861 11:01:37.913294 TxDqDly_Margin_A0==98 ps 10
862 11:01:37.915742 RxClkDly_Margin_A1==88 ps 9
863 11:01:37.916533 TxDqDly_Margin_A1==88 ps 9
864 11:01:37.921368 TrainedVREFDQ_A0==74
865 11:01:37.922131 TrainedVREFDQ_A1==74
866 11:01:37.922763 VrefDac_Margin_A0==25
867 11:01:37.926996 DeviceVref_Margin_A0==40
868 11:01:37.927709 VrefDac_Margin_A1==24
869 11:01:37.932604 DeviceVref_Margin_A1==40
870 11:01:37.933361
871 11:01:37.933994
872 11:01:37.934620 channel==1
873 11:01:37.935234 RxClkDly_Margin_A0==98 ps 10
874 11:01:37.938134 TxDqDly_Margin_A0==98 ps 10
875 11:01:37.938855 RxClkDly_Margin_A1==98 ps 10
876 11:01:37.943795 TxDqDly_Margin_A1==88 ps 9
877 11:01:37.944725 TrainedVREFDQ_A0==77
878 11:01:37.945372 TrainedVREFDQ_A1==77
879 11:01:37.949309 VrefDac_Margin_A0==22
880 11:01:37.950023 DeviceVref_Margin_A0==37
881 11:01:37.954945 VrefDac_Margin_A1==22
882 11:01:37.955667 DeviceVref_Margin_A1==37
883 11:01:37.956388
884 11:01:37.960545 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 11:01:37.961315
886 11:01:37.988495 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
887 11:01:37.994112 2D training succeed
888 11:01:37.999732 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 11:01:38.000533 auto size-- 65535DDR cs0 size: 2048MB
890 11:01:38.005305 DDR cs1 size: 2048MB
891 11:01:38.006061 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 11:01:38.010924 cs0 DataBus test pass
893 11:01:38.011693 cs1 DataBus test pass
894 11:01:38.012378 cs0 AddrBus test pass
895 11:01:38.016468 cs1 AddrBus test pass
896 11:01:38.017250
897 11:01:38.017897 100bdlr_step_size ps== 420
898 11:01:38.018473 result report
899 11:01:38.022157 boot times 0Enable ddr reg access
900 11:01:38.028963 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 11:01:38.043063 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 11:01:38.616907 0.0;M3 CHK:0;cm4_sp_mode 0
903 11:01:38.617600 MVN_1=0x00000000
904 11:01:38.622486 MVN_2=0x00000000
905 11:01:38.628331 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 11:01:38.629098 OPS=0x10
907 11:01:38.629741 ring efuse init
908 11:01:38.630416 chipver efuse init
909 11:01:38.633788 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 11:01:38.639378 [0.018961 Inits done]
911 11:01:38.640184 secure task start!
912 11:01:38.640873 high task start!
913 11:01:38.643465 low task start!
914 11:01:38.644276 run into bl31
915 11:01:38.650690 NOTICE: BL31: v1.3(release):4fc40b1
916 11:01:38.657676 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 11:01:38.658437 NOTICE: BL31: G12A normal boot!
918 11:01:38.684484 NOTICE: BL31: BL33 decompress pass
919 11:01:38.689183 ERROR: Error initializing runtime service opteed_fast
920 11:01:39.922957
921 11:01:39.923590
922 11:01:39.931376 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 11:01:39.931914
924 11:01:39.932405 Model: Libre Computer AML-A311D-CC Alta
925 11:01:40.139772 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 11:01:40.163177 DRAM: 2 GiB (effective 3.8 GiB)
927 11:01:40.306125 Core: 408 devices, 31 uclasses, devicetree: separate
928 11:01:40.312060 WDT: Not starting watchdog@f0d0
929 11:01:40.344247 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 11:01:40.356684 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 11:01:40.360765 ** Bad device specification mmc 0 **
932 11:01:40.372038 Card did not respond to voltage select! : -110
933 11:01:40.379687 ** Bad device specification mmc 0 **
934 11:01:40.380243 Couldn't find partition mmc 0
935 11:01:40.388073 Card did not respond to voltage select! : -110
936 11:01:40.393564 ** Bad device specification mmc 0 **
937 11:01:40.394092 Couldn't find partition mmc 0
938 11:01:40.398572 Error: could not access storage.
939 11:01:40.740204 Net: eth0: ethernet@ff3f0000
940 11:01:40.740831 starting USB...
941 11:01:40.992896 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 11:01:40.993488 Starting the controller
943 11:01:40.999873 USB XHCI 1.10
944 11:01:42.860647 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
945 11:01:42.861268 bl2_stage_init 0x01
946 11:01:42.861716 bl2_stage_init 0x81
947 11:01:42.866201 hw id: 0x0000 - pwm id 0x01
948 11:01:42.866704 bl2_stage_init 0xc1
949 11:01:42.867149 bl2_stage_init 0x02
950 11:01:42.867590
951 11:01:42.871882 L0:00000000
952 11:01:42.872420 L1:20000703
953 11:01:42.872860 L2:00008067
954 11:01:42.873294 L3:14000000
955 11:01:42.877389 B2:00402000
956 11:01:42.877890 B1:e0f83180
957 11:01:42.878332
958 11:01:42.878775 TE: 58167
959 11:01:42.879213
960 11:01:42.883040 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
961 11:01:42.883546
962 11:01:42.884020 Board ID = 1
963 11:01:42.888610 Set A53 clk to 24M
964 11:01:42.889106 Set A73 clk to 24M
965 11:01:42.889548 Set clk81 to 24M
966 11:01:42.894214 A53 clk: 1200 MHz
967 11:01:42.894716 A73 clk: 1200 MHz
968 11:01:42.895160 CLK81: 166.6M
969 11:01:42.895594 smccc: 00012abe
970 11:01:42.899900 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
971 11:01:42.905418 board id: 1
972 11:01:42.911313 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
973 11:01:42.921896 fw parse done
974 11:01:42.927947 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
975 11:01:42.970010 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
976 11:01:42.981420 PIEI prepare done
977 11:01:42.981931 fastboot data load
978 11:01:42.982370 fastboot data verify
979 11:01:42.987194 verify result: 266
980 11:01:42.992800 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
981 11:01:42.993294 LPDDR4 probe
982 11:01:42.993725 ddr clk to 1584MHz
983 11:01:43.000657 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
984 11:01:43.038075
985 11:01:43.038599 dmc_version 0001
986 11:01:43.044599 Check phy result
987 11:01:43.050477 INFO : End of CA training
988 11:01:43.050983 INFO : End of initialization
989 11:01:43.056100 INFO : Training has run successfully!
990 11:01:43.056601 Check phy result
991 11:01:43.061705 INFO : End of initialization
992 11:01:43.062207 INFO : End of read enable training
993 11:01:43.067290 INFO : End of fine write leveling
994 11:01:43.072957 INFO : End of Write leveling coarse delay
995 11:01:43.073455 INFO : Training has run successfully!
996 11:01:43.073896 Check phy result
997 11:01:43.078496 INFO : End of initialization
998 11:01:43.078989 INFO : End of read dq deskew training
999 11:01:43.084087 INFO : End of MPR read delay center optimization
1000 11:01:43.089704 INFO : End of write delay center optimization
1001 11:01:43.095309 INFO : End of read delay center optimization
1002 11:01:43.095811 INFO : End of max read latency training
1003 11:01:43.100989 INFO : Training has run successfully!
1004 11:01:43.101487 1D training succeed
1005 11:01:43.110093 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1006 11:01:43.157622 Check phy result
1007 11:01:43.158116 INFO : End of initialization
1008 11:01:43.179378 INFO : End of 2D read delay Voltage center optimization
1009 11:01:43.199683 INFO : End of 2D read delay Voltage center optimization
1010 11:01:43.251661 INFO : End of 2D write delay Voltage center optimization
1011 11:01:43.301102 INFO : End of 2D write delay Voltage center optimization
1012 11:01:43.306744 INFO : Training has run successfully!
1013 11:01:43.307243
1014 11:01:43.307689 channel==0
1015 11:01:43.312348 RxClkDly_Margin_A0==88 ps 9
1016 11:01:43.312847 TxDqDly_Margin_A0==98 ps 10
1017 11:01:43.315686 RxClkDly_Margin_A1==88 ps 9
1018 11:01:43.316212 TxDqDly_Margin_A1==98 ps 10
1019 11:01:43.321205 TrainedVREFDQ_A0==74
1020 11:01:43.321705 TrainedVREFDQ_A1==74
1021 11:01:43.322156 VrefDac_Margin_A0==25
1022 11:01:43.326841 DeviceVref_Margin_A0==40
1023 11:01:43.327335 VrefDac_Margin_A1==25
1024 11:01:43.332520 DeviceVref_Margin_A1==40
1025 11:01:43.333021
1026 11:01:43.333465
1027 11:01:43.333904 channel==1
1028 11:01:43.334334 RxClkDly_Margin_A0==98 ps 10
1029 11:01:43.335932 TxDqDly_Margin_A0==98 ps 10
1030 11:01:43.341659 RxClkDly_Margin_A1==88 ps 9
1031 11:01:43.342178 TxDqDly_Margin_A1==88 ps 9
1032 11:01:43.342626 TrainedVREFDQ_A0==76
1033 11:01:43.347063 TrainedVREFDQ_A1==77
1034 11:01:43.347560 VrefDac_Margin_A0==22
1035 11:01:43.352792 DeviceVref_Margin_A0==38
1036 11:01:43.353287 VrefDac_Margin_A1==24
1037 11:01:43.353725 DeviceVref_Margin_A1==37
1038 11:01:43.354152
1039 11:01:43.360305 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1040 11:01:43.360805
1041 11:01:43.387810 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
1042 11:01:43.393473 2D training succeed
1043 11:01:43.399005 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1044 11:01:43.399528 auto size-- 65535DDR cs0 size: 2048MB
1045 11:01:43.404589 DDR cs1 size: 2048MB
1046 11:01:43.405121 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1047 11:01:43.410212 cs0 DataBus test pass
1048 11:01:43.410755 cs1 DataBus test pass
1049 11:01:43.411211 cs0 AddrBus test pass
1050 11:01:43.415825 cs1 AddrBus test pass
1051 11:01:43.416448
1052 11:01:43.416920 100bdlr_step_size ps== 420
1053 11:01:43.421360 result report
1054 11:01:43.421871 boot times 0Enable ddr reg access
1055 11:01:43.429474 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1056 11:01:43.442996 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1057 11:01:44.016099 0.0;M3 CHK:0;cm4_sp_mode 0
1058 11:01:44.016707 MVN_1=0x00000000
1059 11:01:44.021489 MVN_2=0x00000000
1060 11:01:44.027256 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1061 11:01:44.027768 OPS=0x10
1062 11:01:44.028253 ring efuse init
1063 11:01:44.028691 chipver efuse init
1064 11:01:44.032949 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1065 11:01:44.038368 [0.018961 Inits done]
1066 11:01:44.038862 secure task start!
1067 11:01:44.039302 high task start!
1068 11:01:44.042990 low task start!
1069 11:01:44.043485 run into bl31
1070 11:01:44.049682 NOTICE: BL31: v1.3(release):4fc40b1
1071 11:01:44.056539 NOTICE: BL31: Built : 15:58:17, May 22 2019
1072 11:01:44.057050 NOTICE: BL31: G12A normal boot!
1073 11:01:44.082796 NOTICE: BL31: BL33 decompress pass
1074 11:01:44.088473 ERROR: Error initializing runtime service opteed_fast
1075 11:01:45.321362
1076 11:01:45.322009
1077 11:01:45.328909 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1078 11:01:45.329432
1079 11:01:45.329896 Model: Libre Computer AML-A311D-CC Alta
1080 11:01:45.537863 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1081 11:01:45.561065 DRAM: 2 GiB (effective 3.8 GiB)
1082 11:01:45.704583 Core: 408 devices, 31 uclasses, devicetree: separate
1083 11:01:45.710447 WDT: Not starting watchdog@f0d0
1084 11:01:45.742668 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1085 11:01:45.755166 Loading Environment from FAT... Card did not respond to voltage select! : -110
1086 11:01:45.760176 ** Bad device specification mmc 0 **
1087 11:01:45.770485 Card did not respond to voltage select! : -110
1088 11:01:45.778111 ** Bad device specification mmc 0 **
1089 11:01:45.778618 Couldn't find partition mmc 0
1090 11:01:45.786482 Card did not respond to voltage select! : -110
1091 11:01:45.791956 ** Bad device specification mmc 0 **
1092 11:01:45.792511 Couldn't find partition mmc 0
1093 11:01:45.797524 Error: could not access storage.
1094 11:01:46.139504 Net: eth0: ethernet@ff3f0000
1095 11:01:46.140162 starting USB...
1096 11:01:46.391423 Bus usb@ff500000: Register 3000140 NbrPorts 3
1097 11:01:46.392111 Starting the controller
1098 11:01:46.397985 USB XHCI 1.10
1099 11:01:47.952380 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1100 11:01:47.960516 scanning usb for storage devices... 0 Storage Device(s) found
1102 11:01:48.012226 Hit any key to stop autoboot: 1
1103 11:01:48.013179 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1104 11:01:48.013870 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1105 11:01:48.014389 Setting prompt string to ['=>']
1106 11:01:48.014905 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1107 11:01:48.028230 0
1108 11:01:48.029218 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1109 11:01:48.029762 Sending with 10 millisecond of delay
1111 11:01:49.164704 => setenv autoload no
1112 11:01:49.175530 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1113 11:01:49.180978 setenv autoload no
1114 11:01:49.181768 Sending with 10 millisecond of delay
1116 11:01:50.979288 => setenv initrd_high 0xffffffff
1117 11:01:50.990219 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1118 11:01:50.991259 setenv initrd_high 0xffffffff
1119 11:01:50.992087 Sending with 10 millisecond of delay
1121 11:01:52.609084 => setenv fdt_high 0xffffffff
1122 11:01:52.619923 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1123 11:01:52.620888 setenv fdt_high 0xffffffff
1124 11:01:52.621655 Sending with 10 millisecond of delay
1126 11:01:52.913635 => dhcp
1127 11:01:52.924683 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1128 11:01:52.925919 dhcp
1129 11:01:52.926861 Speed: 1000, full duplex
1130 11:01:52.927766 BOOTP broadcast 1
1131 11:01:52.937558 DHCP client bound to address 192.168.6.27 (12 ms)
1132 11:01:52.938445 Sending with 10 millisecond of delay
1134 11:01:54.617227 => setenv serverip 192.168.6.2
1135 11:01:54.628073 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1136 11:01:54.629035 setenv serverip 192.168.6.2
1137 11:01:54.629781 Sending with 10 millisecond of delay
1139 11:01:58.354389 => tftpboot 0x01080000 974734/tftp-deploy-wsjiqr8f/kernel/uImage
1140 11:01:58.365277 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1141 11:01:58.366154 tftpboot 0x01080000 974734/tftp-deploy-wsjiqr8f/kernel/uImage
1142 11:01:58.366608 Speed: 1000, full duplex
1143 11:01:58.367025 Using ethernet@ff3f0000 device
1144 11:01:58.368104 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1145 11:01:58.373573 Filename '974734/tftp-deploy-wsjiqr8f/kernel/uImage'.
1146 11:01:58.377630 Load address: 0x1080000
1147 11:02:00.318378 Loading: *######### UDP wrong checksum 000000ff 0000b4c2
1148 11:02:00.342571 UDP wrong checksum 000000ff 000049b5
1149 11:02:02.677938 ##########
1150 11:02:02.678557 TFTP error: trying to overwrite reserved memory...
1152 11:02:02.679914 end: 2.4.3 bootloader-commands (duration 00:00:15) [common]
1155 11:02:02.681781 end: 2.4 uboot-commands (duration 00:00:52) [common]
1157 11:02:02.683133 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
1159 11:02:02.684215 end: 2 uboot-action (duration 00:00:52) [common]
1161 11:02:02.685774 Cleaning after the job
1162 11:02:02.686334 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/ramdisk
1163 11:02:02.716720 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/kernel
1164 11:02:02.766667 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/dtb
1165 11:02:02.767546 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/nfsrootfs
1166 11:02:02.793813 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974734/tftp-deploy-wsjiqr8f/modules
1167 11:02:02.806455 start: 4.1 power-off (timeout 00:00:30) [common]
1168 11:02:02.807092 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1169 11:02:02.839680 >> OK - accepted request
1170 11:02:02.842606 Returned 0 in 0 seconds
1171 11:02:02.943479 end: 4.1 power-off (duration 00:00:00) [common]
1173 11:02:02.944581 start: 4.2 read-feedback (timeout 00:10:00) [common]
1174 11:02:02.945260 Listened to connection for namespace 'common' for up to 1s
1175 11:02:03.945782 Finalising connection for namespace 'common'
1176 11:02:03.946274 Disconnecting from shell: Finalise
1177 11:02:03.946562 =>
1178 11:02:04.047277 end: 4.2 read-feedback (duration 00:00:01) [common]
1179 11:02:04.047912 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/974734
1180 11:02:06.017337 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/974734
1181 11:02:06.017948 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.