Boot log: meson-sm1-s905d3-libretech-cc

    1 11:00:28.010979  lava-dispatcher, installed at version: 2024.01
    2 11:00:28.011818  start: 0 validate
    3 11:00:28.012347  Start time: 2024-11-11 11:00:28.012312+00:00 (UTC)
    4 11:00:28.012953  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 11:00:28.013529  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 11:00:28.050293  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 11:00:28.050907  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241111%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
    8 11:00:28.082803  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 11:00:28.083502  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241111%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 11:00:28.115760  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 11:00:28.116287  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 11:00:28.157279  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 11:00:28.157781  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241111%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
   14 11:00:28.197988  validate duration: 0.19
   16 11:00:28.200448  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 11:00:28.200914  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 11:00:28.201300  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 11:00:28.202052  Not decompressing ramdisk as can be used compressed.
   20 11:00:28.202695  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
   21 11:00:28.203053  saving as /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/ramdisk/initrd.cpio.gz
   22 11:00:28.203365  total size: 5628182 (5 MB)
   23 11:00:28.245475  progress   0 % (0 MB)
   24 11:00:28.250265  progress   5 % (0 MB)
   25 11:00:28.254775  progress  10 % (0 MB)
   26 11:00:28.258635  progress  15 % (0 MB)
   27 11:00:28.262842  progress  20 % (1 MB)
   28 11:00:28.266548  progress  25 % (1 MB)
   29 11:00:28.270606  progress  30 % (1 MB)
   30 11:00:28.274657  progress  35 % (1 MB)
   31 11:00:28.278319  progress  40 % (2 MB)
   32 11:00:28.282468  progress  45 % (2 MB)
   33 11:00:28.286052  progress  50 % (2 MB)
   34 11:00:28.290034  progress  55 % (2 MB)
   35 11:00:28.294108  progress  60 % (3 MB)
   36 11:00:28.297838  progress  65 % (3 MB)
   37 11:00:28.301891  progress  70 % (3 MB)
   38 11:00:28.305742  progress  75 % (4 MB)
   39 11:00:28.309613  progress  80 % (4 MB)
   40 11:00:28.313056  progress  85 % (4 MB)
   41 11:00:28.316723  progress  90 % (4 MB)
   42 11:00:28.320380  progress  95 % (5 MB)
   43 11:00:28.323700  progress 100 % (5 MB)
   44 11:00:28.324420  5 MB downloaded in 0.12 s (44.35 MB/s)
   45 11:00:28.325036  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 11:00:28.325940  end: 1.1 download-retry (duration 00:00:00) [common]
   48 11:00:28.326239  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 11:00:28.326514  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 11:00:28.326983  downloading http://storage.kernelci.org/next/master/next-20241111/arm64/defconfig+debug/gcc-12/kernel/Image
   51 11:00:28.327239  saving as /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/kernel/Image
   52 11:00:28.327450  total size: 172022272 (164 MB)
   53 11:00:28.327663  No compression specified
   54 11:00:28.363257  progress   0 % (0 MB)
   55 11:00:28.466335  progress   5 % (8 MB)
   56 11:00:28.567815  progress  10 % (16 MB)
   57 11:00:28.668155  progress  15 % (24 MB)
   58 11:00:28.765529  progress  20 % (32 MB)
   59 11:00:28.863761  progress  25 % (41 MB)
   60 11:00:28.960995  progress  30 % (49 MB)
   61 11:00:29.060643  progress  35 % (57 MB)
   62 11:00:29.157899  progress  40 % (65 MB)
   63 11:00:29.256283  progress  45 % (73 MB)
   64 11:00:29.355007  progress  50 % (82 MB)
   65 11:00:29.453044  progress  55 % (90 MB)
   66 11:00:29.550059  progress  60 % (98 MB)
   67 11:00:29.649494  progress  65 % (106 MB)
   68 11:00:29.748464  progress  70 % (114 MB)
   69 11:00:29.848402  progress  75 % (123 MB)
   70 11:00:29.946529  progress  80 % (131 MB)
   71 11:00:30.048468  progress  85 % (139 MB)
   72 11:00:30.148121  progress  90 % (147 MB)
   73 11:00:30.247247  progress  95 % (155 MB)
   74 11:00:30.344968  progress 100 % (164 MB)
   75 11:00:30.345709  164 MB downloaded in 2.02 s (81.29 MB/s)
   76 11:00:30.346189  end: 1.2.1 http-download (duration 00:00:02) [common]
   78 11:00:30.347006  end: 1.2 download-retry (duration 00:00:02) [common]
   79 11:00:30.347277  start: 1.3 download-retry (timeout 00:09:58) [common]
   80 11:00:30.347542  start: 1.3.1 http-download (timeout 00:09:58) [common]
   81 11:00:30.348018  downloading http://storage.kernelci.org/next/master/next-20241111/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 11:00:30.348299  saving as /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 11:00:30.348509  total size: 53209 (0 MB)
   84 11:00:30.348719  No compression specified
   85 11:00:30.388205  progress  61 % (0 MB)
   86 11:00:30.389090  progress 100 % (0 MB)
   87 11:00:30.389673  0 MB downloaded in 0.04 s (1.23 MB/s)
   88 11:00:30.390210  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 11:00:30.391041  end: 1.3 download-retry (duration 00:00:00) [common]
   91 11:00:30.391303  start: 1.4 download-retry (timeout 00:09:58) [common]
   92 11:00:30.391566  start: 1.4.1 http-download (timeout 00:09:58) [common]
   93 11:00:30.392038  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
   94 11:00:30.392288  saving as /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/nfsrootfs/full.rootfs.tar
   95 11:00:30.392492  total size: 107552908 (102 MB)
   96 11:00:30.392703  Using unxz to decompress xz
   97 11:00:30.428262  progress   0 % (0 MB)
   98 11:00:31.187957  progress   5 % (5 MB)
   99 11:00:32.054331  progress  10 % (10 MB)
  100 11:00:32.887288  progress  15 % (15 MB)
  101 11:00:33.748794  progress  20 % (20 MB)
  102 11:00:34.433651  progress  25 % (25 MB)
  103 11:00:35.088360  progress  30 % (30 MB)
  104 11:00:35.858465  progress  35 % (35 MB)
  105 11:00:36.224904  progress  40 % (41 MB)
  106 11:00:36.701035  progress  45 % (46 MB)
  107 11:00:37.434219  progress  50 % (51 MB)
  108 11:00:38.171046  progress  55 % (56 MB)
  109 11:00:38.934614  progress  60 % (61 MB)
  110 11:00:39.686004  progress  65 % (66 MB)
  111 11:00:40.415755  progress  70 % (71 MB)
  112 11:00:41.176957  progress  75 % (76 MB)
  113 11:00:41.853440  progress  80 % (82 MB)
  114 11:00:42.576052  progress  85 % (87 MB)
  115 11:00:43.311309  progress  90 % (92 MB)
  116 11:00:44.026321  progress  95 % (97 MB)
  117 11:00:44.782705  progress 100 % (102 MB)
  118 11:00:44.794939  102 MB downloaded in 14.40 s (7.12 MB/s)
  119 11:00:44.795611  end: 1.4.1 http-download (duration 00:00:14) [common]
  121 11:00:44.797003  end: 1.4 download-retry (duration 00:00:14) [common]
  122 11:00:44.797536  start: 1.5 download-retry (timeout 00:09:43) [common]
  123 11:00:44.798045  start: 1.5.1 http-download (timeout 00:09:43) [common]
  124 11:00:44.798850  downloading http://storage.kernelci.org/next/master/next-20241111/arm64/defconfig+debug/gcc-12/modules.tar.xz
  125 11:00:44.799322  saving as /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/modules/modules.tar
  126 11:00:44.799731  total size: 27877612 (26 MB)
  127 11:00:44.800186  Using unxz to decompress xz
  128 11:00:44.844106  progress   0 % (0 MB)
  129 11:00:45.032636  progress   5 % (1 MB)
  130 11:00:45.241691  progress  10 % (2 MB)
  131 11:00:45.474632  progress  15 % (4 MB)
  132 11:00:45.716693  progress  20 % (5 MB)
  133 11:00:45.920156  progress  25 % (6 MB)
  134 11:00:46.128605  progress  30 % (8 MB)
  135 11:00:46.330915  progress  35 % (9 MB)
  136 11:00:46.534365  progress  40 % (10 MB)
  137 11:00:46.733870  progress  45 % (11 MB)
  138 11:00:46.950139  progress  50 % (13 MB)
  139 11:00:47.151255  progress  55 % (14 MB)
  140 11:00:47.377489  progress  60 % (15 MB)
  141 11:00:47.590043  progress  65 % (17 MB)
  142 11:00:47.799842  progress  70 % (18 MB)
  143 11:00:48.016063  progress  75 % (19 MB)
  144 11:00:48.218598  progress  80 % (21 MB)
  145 11:00:48.433569  progress  85 % (22 MB)
  146 11:00:48.643941  progress  90 % (23 MB)
  147 11:00:48.850020  progress  95 % (25 MB)
  148 11:00:49.047108  progress 100 % (26 MB)
  149 11:00:49.060866  26 MB downloaded in 4.26 s (6.24 MB/s)
  150 11:00:49.061465  end: 1.5.1 http-download (duration 00:00:04) [common]
  152 11:00:49.062288  end: 1.5 download-retry (duration 00:00:04) [common]
  153 11:00:49.062554  start: 1.6 prepare-tftp-overlay (timeout 00:09:39) [common]
  154 11:00:49.062816  start: 1.6.1 extract-nfsrootfs (timeout 00:09:39) [common]
  155 11:00:59.114164  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/974704/extract-nfsrootfs-7j6tbf73
  156 11:00:59.114779  end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
  157 11:00:59.115095  start: 1.6.2 lava-overlay (timeout 00:09:29) [common]
  158 11:00:59.115829  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3
  159 11:00:59.116335  makedir: /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin
  160 11:00:59.116697  makedir: /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/tests
  161 11:00:59.117051  makedir: /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/results
  162 11:00:59.117412  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-add-keys
  163 11:00:59.117972  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-add-sources
  164 11:00:59.118497  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-background-process-start
  165 11:00:59.119018  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-background-process-stop
  166 11:00:59.119569  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-common-functions
  167 11:00:59.120107  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-echo-ipv4
  168 11:00:59.120644  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-install-packages
  169 11:00:59.121169  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-installed-packages
  170 11:00:59.121678  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-os-build
  171 11:00:59.122184  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-probe-channel
  172 11:00:59.122683  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-probe-ip
  173 11:00:59.123183  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-target-ip
  174 11:00:59.123685  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-target-mac
  175 11:00:59.124209  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-target-storage
  176 11:00:59.124737  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-test-case
  177 11:00:59.125254  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-test-event
  178 11:00:59.125828  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-test-feedback
  179 11:00:59.126343  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-test-raise
  180 11:00:59.126846  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-test-reference
  181 11:00:59.127348  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-test-runner
  182 11:00:59.127850  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-test-set
  183 11:00:59.128396  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-test-shell
  184 11:00:59.128928  Updating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-install-packages (oe)
  185 11:00:59.129495  Updating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/bin/lava-installed-packages (oe)
  186 11:00:59.129957  Creating /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/environment
  187 11:00:59.130346  LAVA metadata
  188 11:00:59.130617  - LAVA_JOB_ID=974704
  189 11:00:59.130841  - LAVA_DISPATCHER_IP=192.168.6.2
  190 11:00:59.131210  start: 1.6.2.1 ssh-authorize (timeout 00:09:29) [common]
  191 11:00:59.132211  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 11:00:59.132534  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:29) [common]
  193 11:00:59.132758  skipped lava-vland-overlay
  194 11:00:59.133014  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 11:00:59.133283  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:29) [common]
  196 11:00:59.133513  skipped lava-multinode-overlay
  197 11:00:59.133767  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 11:00:59.134029  start: 1.6.2.4 test-definition (timeout 00:09:29) [common]
  199 11:00:59.134289  Loading test definitions
  200 11:00:59.134577  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:29) [common]
  201 11:00:59.134807  Using /lava-974704 at stage 0
  202 11:00:59.135996  uuid=974704_1.6.2.4.1 testdef=None
  203 11:00:59.136309  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 11:00:59.136585  start: 1.6.2.4.2 test-overlay (timeout 00:09:29) [common]
  205 11:00:59.138414  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 11:00:59.139219  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:29) [common]
  208 11:00:59.141492  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 11:00:59.142360  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:29) [common]
  211 11:00:59.144718  runner path: /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/0/tests/0_dmesg test_uuid 974704_1.6.2.4.1
  212 11:00:59.145329  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 11:00:59.146094  Creating lava-test-runner.conf files
  215 11:00:59.146294  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/974704/lava-overlay-8tkz7rn3/lava-974704/0 for stage 0
  216 11:00:59.146641  - 0_dmesg
  217 11:00:59.146980  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 11:00:59.147251  start: 1.6.2.5 compress-overlay (timeout 00:09:29) [common]
  219 11:00:59.168521  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 11:00:59.168890  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:29) [common]
  221 11:00:59.169145  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 11:00:59.169408  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 11:00:59.169669  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:29) [common]
  224 11:00:59.816826  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 11:00:59.817310  start: 1.6.4 extract-modules (timeout 00:09:28) [common]
  226 11:00:59.817580  extracting modules file /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974704/extract-nfsrootfs-7j6tbf73
  227 11:01:01.519210  extracting modules file /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974704/extract-overlay-ramdisk-brghpjig/ramdisk
  228 11:01:03.260363  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 11:01:03.260829  start: 1.6.5 apply-overlay-tftp (timeout 00:09:25) [common]
  230 11:01:03.261118  [common] Applying overlay to NFS
  231 11:01:03.261339  [common] Applying overlay /var/lib/lava/dispatcher/tmp/974704/compress-overlay-fzue4l8j/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/974704/extract-nfsrootfs-7j6tbf73
  232 11:01:03.290463  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 11:01:03.290853  start: 1.6.6 prepare-kernel (timeout 00:09:25) [common]
  234 11:01:03.291143  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:25) [common]
  235 11:01:03.291381  Converting downloaded kernel to a uImage
  236 11:01:03.291694  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/kernel/Image /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/kernel/uImage
  237 11:01:05.153519  output: Image Name:   
  238 11:01:05.153953  output: Created:      Mon Nov 11 11:01:03 2024
  239 11:01:05.154179  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 11:01:05.154401  output: Data Size:    172022272 Bytes = 167990.50 KiB = 164.05 MiB
  241 11:01:05.154622  output: Load Address: 01080000
  242 11:01:05.154836  output: Entry Point:  01080000
  243 11:01:05.155041  output: 
  244 11:01:05.155373  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
  245 11:01:05.155643  end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
  246 11:01:05.155927  start: 1.6.7 configure-preseed-file (timeout 00:09:23) [common]
  247 11:01:05.156266  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 11:01:05.156566  start: 1.6.8 compress-ramdisk (timeout 00:09:23) [common]
  249 11:01:05.156857  Building ramdisk /var/lib/lava/dispatcher/tmp/974704/extract-overlay-ramdisk-brghpjig/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/974704/extract-overlay-ramdisk-brghpjig/ramdisk
  250 11:01:10.762074  >> 430763 blocks

  251 11:01:28.765214  Adding RAMdisk u-boot header.
  252 11:01:28.765718  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/974704/extract-overlay-ramdisk-brghpjig/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/974704/extract-overlay-ramdisk-brghpjig/ramdisk.cpio.gz.uboot
  253 11:01:29.296121  output: Image Name:   
  254 11:01:29.296548  output: Created:      Mon Nov 11 11:01:28 2024
  255 11:01:29.296794  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 11:01:29.297029  output: Data Size:    51474062 Bytes = 50267.64 KiB = 49.09 MiB
  257 11:01:29.297252  output: Load Address: 00000000
  258 11:01:29.297470  output: Entry Point:  00000000
  259 11:01:29.297686  output: 
  260 11:01:29.298330  rename /var/lib/lava/dispatcher/tmp/974704/extract-overlay-ramdisk-brghpjig/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/ramdisk/ramdisk.cpio.gz.uboot
  261 11:01:29.298773  end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
  262 11:01:29.299103  end: 1.6 prepare-tftp-overlay (duration 00:00:40) [common]
  263 11:01:29.299451  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:59) [common]
  264 11:01:29.299738  No LXC device requested
  265 11:01:29.300068  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 11:01:29.300379  start: 1.8 deploy-device-env (timeout 00:08:59) [common]
  267 11:01:29.300676  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 11:01:29.300916  Checking files for TFTP limit of 4294967296 bytes.
  269 11:01:29.302497  end: 1 tftp-deploy (duration 00:01:01) [common]
  270 11:01:29.302845  start: 2 uboot-action (timeout 00:05:00) [common]
  271 11:01:29.303148  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 11:01:29.303432  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 11:01:29.303721  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 11:01:29.304045  Using kernel file from prepare-kernel: 974704/tftp-deploy-61edxdz2/kernel/uImage
  275 11:01:29.304414  substitutions:
  276 11:01:29.304658  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 11:01:29.304886  - {DTB_ADDR}: 0x01070000
  278 11:01:29.305118  - {DTB}: 974704/tftp-deploy-61edxdz2/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 11:01:29.305346  - {INITRD}: 974704/tftp-deploy-61edxdz2/ramdisk/ramdisk.cpio.gz.uboot
  280 11:01:29.305563  - {KERNEL_ADDR}: 0x01080000
  281 11:01:29.305775  - {KERNEL}: 974704/tftp-deploy-61edxdz2/kernel/uImage
  282 11:01:29.305996  - {LAVA_MAC}: None
  283 11:01:29.306241  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/974704/extract-nfsrootfs-7j6tbf73
  284 11:01:29.306473  - {NFS_SERVER_IP}: 192.168.6.2
  285 11:01:29.306699  - {PRESEED_CONFIG}: None
  286 11:01:29.306913  - {PRESEED_LOCAL}: None
  287 11:01:29.307130  - {RAMDISK_ADDR}: 0x08000000
  288 11:01:29.307345  - {RAMDISK}: 974704/tftp-deploy-61edxdz2/ramdisk/ramdisk.cpio.gz.uboot
  289 11:01:29.307562  - {ROOT_PART}: None
  290 11:01:29.307777  - {ROOT}: None
  291 11:01:29.308011  - {SERVER_IP}: 192.168.6.2
  292 11:01:29.308238  - {TEE_ADDR}: 0x83000000
  293 11:01:29.308454  - {TEE}: None
  294 11:01:29.308675  Parsed boot commands:
  295 11:01:29.308892  - setenv autoload no
  296 11:01:29.309107  - setenv initrd_high 0xffffffff
  297 11:01:29.309327  - setenv fdt_high 0xffffffff
  298 11:01:29.309542  - dhcp
  299 11:01:29.309755  - setenv serverip 192.168.6.2
  300 11:01:29.309971  - tftpboot 0x01080000 974704/tftp-deploy-61edxdz2/kernel/uImage
  301 11:01:29.310183  - tftpboot 0x08000000 974704/tftp-deploy-61edxdz2/ramdisk/ramdisk.cpio.gz.uboot
  302 11:01:29.310395  - tftpboot 0x01070000 974704/tftp-deploy-61edxdz2/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 11:01:29.310607  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/974704/extract-nfsrootfs-7j6tbf73,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 11:01:29.310824  - bootm 0x01080000 0x08000000 0x01070000
  305 11:01:29.311116  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 11:01:29.311956  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 11:01:29.312236  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 11:01:29.324252  Setting prompt string to ['lava-test: # ']
  310 11:01:29.325177  end: 2.3 connect-device (duration 00:00:00) [common]
  311 11:01:29.325548  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 11:01:29.325881  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 11:01:29.326202  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 11:01:29.326878  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 11:01:29.360413  >> OK - accepted request

  316 11:01:29.362925  Returned 0 in 0 seconds
  317 11:01:29.463724  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 11:01:29.464827  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 11:01:29.465193  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 11:01:29.465522  Setting prompt string to ['Hit any key to stop autoboot']
  322 11:01:29.465809  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 11:01:29.466789  Trying 192.168.56.21...
  324 11:01:29.467076  Connected to conserv1.
  325 11:01:29.467322  Escape character is '^]'.
  326 11:01:29.467564  
  327 11:01:29.467804  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  328 11:01:29.468080  
  329 11:01:37.447848  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 11:01:37.448556  bl2_stage_init 0x01
  331 11:01:37.449022  bl2_stage_init 0x81
  332 11:01:37.453524  hw id: 0x0000 - pwm id 0x01
  333 11:01:37.454029  bl2_stage_init 0xc1
  334 11:01:37.459199  bl2_stage_init 0x02
  335 11:01:37.459715  
  336 11:01:37.460238  L0:00000000
  337 11:01:37.460689  L1:00000703
  338 11:01:37.461128  L2:00008067
  339 11:01:37.461573  L3:15000000
  340 11:01:37.462322  S1:00000000
  341 11:01:37.465648  B2:20282000
  342 11:01:37.466134  B1:a0f83180
  343 11:01:37.466585  
  344 11:01:37.467028  TE: 70246
  345 11:01:37.467465  
  346 11:01:37.471134  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 11:01:37.471632  
  348 11:01:37.472116  Board ID = 1
  349 11:01:37.476746  Set cpu clk to 24M
  350 11:01:37.477230  Set clk81 to 24M
  351 11:01:37.477670  Use GP1_pll as DSU clk.
  352 11:01:37.480550  DSU clk: 1200 Mhz
  353 11:01:37.481036  CPU clk: 1200 MHz
  354 11:01:37.486156  Set clk81 to 166.6M
  355 11:01:37.491823  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 11:01:37.492359  board id: 1
  357 11:01:37.498912  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 11:01:37.510488  fw parse done
  359 11:01:37.516213  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 11:01:37.558169  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 11:01:37.569950  PIEI prepare done
  362 11:01:37.570488  fastboot data load
  363 11:01:37.570944  fastboot data verify
  364 11:01:37.575513  verify result: 266
  365 11:01:37.581111  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 11:01:37.581627  LPDDR4 probe
  367 11:01:37.582070  ddr clk to 1584MHz
  368 11:01:37.588225  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 11:01:37.625401  
  370 11:01:37.625909  dmc_version 0001
  371 11:01:37.632639  Check phy result
  372 11:01:37.638893  INFO : End of CA training
  373 11:01:37.639397  INFO : End of initialization
  374 11:01:37.644567  INFO : Training has run successfully!
  375 11:01:37.645084  Check phy result
  376 11:01:37.650106  INFO : End of initialization
  377 11:01:37.650603  INFO : End of read enable training
  378 11:01:37.653500  INFO : End of fine write leveling
  379 11:01:37.658825  INFO : End of Write leveling coarse delay
  380 11:01:37.664526  INFO : Training has run successfully!
  381 11:01:37.665025  Check phy result
  382 11:01:37.665466  INFO : End of initialization
  383 11:01:37.670064  INFO : End of read dq deskew training
  384 11:01:37.673614  INFO : End of MPR read delay center optimization
  385 11:01:37.679147  INFO : End of write delay center optimization
  386 11:01:37.684759  INFO : End of read delay center optimization
  387 11:01:37.685252  INFO : End of max read latency training
  388 11:01:37.690419  INFO : Training has run successfully!
  389 11:01:37.690925  1D training succeed
  390 11:01:37.697624  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 11:01:37.745549  Check phy result
  392 11:01:37.746112  INFO : End of initialization
  393 11:01:37.768308  INFO : End of 2D read delay Voltage center optimization
  394 11:01:37.786890  INFO : End of 2D read delay Voltage center optimization
  395 11:01:37.839192  INFO : End of 2D write delay Voltage center optimization
  396 11:01:37.888714  INFO : End of 2D write delay Voltage center optimization
  397 11:01:37.894229  INFO : Training has run successfully!
  398 11:01:37.894723  
  399 11:01:37.895165  channel==0
  400 11:01:37.899861  RxClkDly_Margin_A0==78 ps 8
  401 11:01:37.900394  TxDqDly_Margin_A0==98 ps 10
  402 11:01:37.905439  RxClkDly_Margin_A1==88 ps 9
  403 11:01:37.905937  TxDqDly_Margin_A1==88 ps 9
  404 11:01:37.906384  TrainedVREFDQ_A0==74
  405 11:01:37.911102  TrainedVREFDQ_A1==74
  406 11:01:37.911604  VrefDac_Margin_A0==24
  407 11:01:37.912073  DeviceVref_Margin_A0==40
  408 11:01:37.916607  VrefDac_Margin_A1==23
  409 11:01:37.917101  DeviceVref_Margin_A1==40
  410 11:01:37.917539  
  411 11:01:37.917972  
  412 11:01:37.918408  channel==1
  413 11:01:37.922247  RxClkDly_Margin_A0==88 ps 9
  414 11:01:37.922738  TxDqDly_Margin_A0==98 ps 10
  415 11:01:37.927852  RxClkDly_Margin_A1==78 ps 8
  416 11:01:37.928387  TxDqDly_Margin_A1==88 ps 9
  417 11:01:37.933494  TrainedVREFDQ_A0==78
  418 11:01:37.934000  TrainedVREFDQ_A1==75
  419 11:01:37.934458  VrefDac_Margin_A0==23
  420 11:01:37.939095  DeviceVref_Margin_A0==36
  421 11:01:37.939591  VrefDac_Margin_A1==22
  422 11:01:37.944704  DeviceVref_Margin_A1==38
  423 11:01:37.945227  
  424 11:01:37.945686   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 11:01:37.946132  
  426 11:01:37.978227  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  427 11:01:37.978834  2D training succeed
  428 11:01:37.983878  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 11:01:37.989459  auto size-- 65535DDR cs0 size: 2048MB
  430 11:01:37.989964  DDR cs1 size: 2048MB
  431 11:01:37.995051  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 11:01:37.995549  cs0 DataBus test pass
  433 11:01:38.000642  cs1 DataBus test pass
  434 11:01:38.001146  cs0 AddrBus test pass
  435 11:01:38.001600  cs1 AddrBus test pass
  436 11:01:38.002048  
  437 11:01:38.006262  100bdlr_step_size ps== 478
  438 11:01:38.006772  result report
  439 11:01:38.011941  boot times 0Enable ddr reg access
  440 11:01:38.016378  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 11:01:38.030167  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 11:01:38.684798  bl2z: ptr: 05129330, size: 00001e40
  443 11:01:38.692332  0.0;M3 CHK:0;cm4_sp_mode 0
  444 11:01:38.692853  MVN_1=0x00000000
  445 11:01:38.693313  MVN_2=0x00000000
  446 11:01:38.703745  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 11:01:38.704301  OPS=0x04
  448 11:01:38.704765  ring efuse init
  449 11:01:38.709517  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 11:01:38.710020  [0.017319 Inits done]
  451 11:01:38.710468  secure task start!
  452 11:01:38.716977  high task start!
  453 11:01:38.717475  low task start!
  454 11:01:38.717930  run into bl31
  455 11:01:38.725597  NOTICE:  BL31: v1.3(release):4fc40b1
  456 11:01:38.733362  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 11:01:38.733864  NOTICE:  BL31: G12A normal boot!
  458 11:01:38.749023  NOTICE:  BL31: BL33 decompress pass
  459 11:01:38.754621  ERROR:   Error initializing runtime service opteed_fast
  460 11:01:41.497558  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 11:01:41.498211  bl2_stage_init 0x01
  462 11:01:41.498687  bl2_stage_init 0x81
  463 11:01:41.503127  hw id: 0x0000 - pwm id 0x01
  464 11:01:41.503669  bl2_stage_init 0xc1
  465 11:01:41.508739  bl2_stage_init 0x02
  466 11:01:41.509304  
  467 11:01:41.509751  L0:00000000
  468 11:01:41.510185  L1:00000703
  469 11:01:41.510621  L2:00008067
  470 11:01:41.511046  L3:15000000
  471 11:01:41.514294  S1:00000000
  472 11:01:41.514797  B2:20282000
  473 11:01:41.515230  B1:a0f83180
  474 11:01:41.515656  
  475 11:01:41.516123  TE: 71749
  476 11:01:41.516558  
  477 11:01:41.519839  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 11:01:41.520376  
  479 11:01:41.525426  Board ID = 1
  480 11:01:41.525923  Set cpu clk to 24M
  481 11:01:41.526359  Set clk81 to 24M
  482 11:01:41.531112  Use GP1_pll as DSU clk.
  483 11:01:41.531648  DSU clk: 1200 Mhz
  484 11:01:41.532122  CPU clk: 1200 MHz
  485 11:01:41.536650  Set clk81 to 166.6M
  486 11:01:41.542240  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 11:01:41.542765  board id: 1
  488 11:01:41.549407  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 11:01:41.560298  fw parse done
  490 11:01:41.565293  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 11:01:41.608492  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 11:01:41.619781  PIEI prepare done
  493 11:01:41.620371  fastboot data load
  494 11:01:41.620834  fastboot data verify
  495 11:01:41.625309  verify result: 266
  496 11:01:41.630951  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 11:01:41.631454  LPDDR4 probe
  498 11:01:41.631892  ddr clk to 1584MHz
  499 11:01:41.638876  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 11:01:41.676199  
  501 11:01:41.676764  dmc_version 0001
  502 11:01:41.682821  Check phy result
  503 11:01:41.688784  INFO : End of CA training
  504 11:01:41.689321  INFO : End of initialization
  505 11:01:41.694366  INFO : Training has run successfully!
  506 11:01:41.694918  Check phy result
  507 11:01:41.700054  INFO : End of initialization
  508 11:01:41.700585  INFO : End of read enable training
  509 11:01:41.705563  INFO : End of fine write leveling
  510 11:01:41.711255  INFO : End of Write leveling coarse delay
  511 11:01:41.712100  INFO : Training has run successfully!
  512 11:01:41.712626  Check phy result
  513 11:01:41.716816  INFO : End of initialization
  514 11:01:41.717362  INFO : End of read dq deskew training
  515 11:01:41.722356  INFO : End of MPR read delay center optimization
  516 11:01:41.728065  INFO : End of write delay center optimization
  517 11:01:41.733566  INFO : End of read delay center optimization
  518 11:01:41.734095  INFO : End of max read latency training
  519 11:01:41.739144  INFO : Training has run successfully!
  520 11:01:41.739670  1D training succeed
  521 11:01:41.747360  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 11:01:41.795860  Check phy result
  523 11:01:41.796518  INFO : End of initialization
  524 11:01:41.818315  INFO : End of 2D read delay Voltage center optimization
  525 11:01:41.836509  INFO : End of 2D read delay Voltage center optimization
  526 11:01:41.889362  INFO : End of 2D write delay Voltage center optimization
  527 11:01:41.938509  INFO : End of 2D write delay Voltage center optimization
  528 11:01:41.944108  INFO : Training has run successfully!
  529 11:01:41.944659  
  530 11:01:41.945121  channel==0
  531 11:01:41.949700  RxClkDly_Margin_A0==78 ps 8
  532 11:01:41.950222  TxDqDly_Margin_A0==88 ps 9
  533 11:01:41.953059  RxClkDly_Margin_A1==69 ps 7
  534 11:01:41.953571  TxDqDly_Margin_A1==88 ps 9
  535 11:01:41.958610  TrainedVREFDQ_A0==74
  536 11:01:41.959126  TrainedVREFDQ_A1==74
  537 11:01:41.959583  VrefDac_Margin_A0==24
  538 11:01:41.964299  DeviceVref_Margin_A0==40
  539 11:01:41.964857  VrefDac_Margin_A1==23
  540 11:01:41.969851  DeviceVref_Margin_A1==40
  541 11:01:41.970405  
  542 11:01:41.970863  
  543 11:01:41.971311  channel==1
  544 11:01:41.971753  RxClkDly_Margin_A0==88 ps 9
  545 11:01:41.975439  TxDqDly_Margin_A0==88 ps 9
  546 11:01:41.975950  RxClkDly_Margin_A1==88 ps 9
  547 11:01:41.981065  TxDqDly_Margin_A1==88 ps 9
  548 11:01:41.981592  TrainedVREFDQ_A0==75
  549 11:01:41.982049  TrainedVREFDQ_A1==76
  550 11:01:41.986614  VrefDac_Margin_A0==22
  551 11:01:41.987122  DeviceVref_Margin_A0==39
  552 11:01:41.987572  VrefDac_Margin_A1==22
  553 11:01:41.992213  DeviceVref_Margin_A1==38
  554 11:01:41.992721  
  555 11:01:41.997788   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 11:01:41.998295  
  557 11:01:42.025837  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  558 11:01:42.031366  2D training succeed
  559 11:01:42.037032  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 11:01:42.037588  auto size-- 65535DDR cs0 size: 2048MB
  561 11:01:42.042588  DDR cs1 size: 2048MB
  562 11:01:42.043103  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 11:01:42.048217  cs0 DataBus test pass
  564 11:01:42.048739  cs1 DataBus test pass
  565 11:01:42.049211  cs0 AddrBus test pass
  566 11:01:42.053815  cs1 AddrBus test pass
  567 11:01:42.054334  
  568 11:01:42.054792  100bdlr_step_size ps== 478
  569 11:01:42.055247  result report
  570 11:01:42.059361  boot times 0Enable ddr reg access
  571 11:01:42.066683  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 11:01:42.080420  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 11:01:42.734871  bl2z: ptr: 05129330, size: 00001e40
  574 11:01:42.743254  0.0;M3 CHK:0;cm4_sp_mode 0
  575 11:01:42.743778  MVN_1=0x00000000
  576 11:01:42.744291  MVN_2=0x00000000
  577 11:01:42.754871  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 11:01:42.755381  OPS=0x04
  579 11:01:42.755836  ring efuse init
  580 11:01:42.757833  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 11:01:42.763733  [0.017319 Inits done]
  582 11:01:42.764261  secure task start!
  583 11:01:42.764714  high task start!
  584 11:01:42.765156  low task start!
  585 11:01:42.767869  run into bl31
  586 11:01:42.776676  NOTICE:  BL31: v1.3(release):4fc40b1
  587 11:01:42.784346  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 11:01:42.784853  NOTICE:  BL31: G12A normal boot!
  589 11:01:42.799621  NOTICE:  BL31: BL33 decompress pass
  590 11:01:42.805311  ERROR:   Error initializing runtime service opteed_fast
  591 11:01:44.194907  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 11:01:44.195528  bl2_stage_init 0x01
  593 11:01:44.196055  bl2_stage_init 0x81
  594 11:01:44.200513  hw id: 0x0000 - pwm id 0x01
  595 11:01:44.201027  bl2_stage_init 0xc1
  596 11:01:44.206101  bl2_stage_init 0x02
  597 11:01:44.206602  
  598 11:01:44.207066  L0:00000000
  599 11:01:44.207513  L1:00000703
  600 11:01:44.207953  L2:00008067
  601 11:01:44.208440  L3:15000000
  602 11:01:44.211748  S1:00000000
  603 11:01:44.212287  B2:20282000
  604 11:01:44.212745  B1:a0f83180
  605 11:01:44.213190  
  606 11:01:44.213631  TE: 68948
  607 11:01:44.214073  
  608 11:01:44.217313  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 11:01:44.217818  
  610 11:01:44.222904  Board ID = 1
  611 11:01:44.223407  Set cpu clk to 24M
  612 11:01:44.223859  Set clk81 to 24M
  613 11:01:44.228505  Use GP1_pll as DSU clk.
  614 11:01:44.229012  DSU clk: 1200 Mhz
  615 11:01:44.229466  CPU clk: 1200 MHz
  616 11:01:44.234101  Set clk81 to 166.6M
  617 11:01:44.239793  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 11:01:44.240323  board id: 1
  619 11:01:44.245918  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 11:01:44.257872  fw parse done
  621 11:01:44.262734  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 11:01:44.305888  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 11:01:44.318079  PIEI prepare done
  624 11:01:44.318595  fastboot data load
  625 11:01:44.319056  fastboot data verify
  626 11:01:44.323685  verify result: 266
  627 11:01:44.329356  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 11:01:44.329858  LPDDR4 probe
  629 11:01:44.330311  ddr clk to 1584MHz
  630 11:01:44.336255  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 11:01:44.374100  
  632 11:01:44.374609  dmc_version 0001
  633 11:01:44.381198  Check phy result
  634 11:01:44.388045  INFO : End of CA training
  635 11:01:44.388561  INFO : End of initialization
  636 11:01:44.393644  INFO : Training has run successfully!
  637 11:01:44.394151  Check phy result
  638 11:01:44.399297  INFO : End of initialization
  639 11:01:44.399797  INFO : End of read enable training
  640 11:01:44.404870  INFO : End of fine write leveling
  641 11:01:44.410453  INFO : End of Write leveling coarse delay
  642 11:01:44.410967  INFO : Training has run successfully!
  643 11:01:44.411423  Check phy result
  644 11:01:44.416051  INFO : End of initialization
  645 11:01:44.416585  INFO : End of read dq deskew training
  646 11:01:44.421649  INFO : End of MPR read delay center optimization
  647 11:01:44.427233  INFO : End of write delay center optimization
  648 11:01:44.432864  INFO : End of read delay center optimization
  649 11:01:44.433373  INFO : End of max read latency training
  650 11:01:44.438475  INFO : Training has run successfully!
  651 11:01:44.438975  1D training succeed
  652 11:01:44.446609  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 11:01:44.495136  Check phy result
  654 11:01:44.495685  INFO : End of initialization
  655 11:01:44.522804  INFO : End of 2D read delay Voltage center optimization
  656 11:01:44.546520  INFO : End of 2D read delay Voltage center optimization
  657 11:01:44.603295  INFO : End of 2D write delay Voltage center optimization
  658 11:01:44.658187  INFO : End of 2D write delay Voltage center optimization
  659 11:01:44.663677  INFO : Training has run successfully!
  660 11:01:44.664220  
  661 11:01:44.664684  channel==0
  662 11:01:44.669388  RxClkDly_Margin_A0==69 ps 7
  663 11:01:44.669889  TxDqDly_Margin_A0==98 ps 10
  664 11:01:44.674871  RxClkDly_Margin_A1==88 ps 9
  665 11:01:44.675372  TxDqDly_Margin_A1==88 ps 9
  666 11:01:44.675826  TrainedVREFDQ_A0==74
  667 11:01:44.680520  TrainedVREFDQ_A1==74
  668 11:01:44.681042  VrefDac_Margin_A0==24
  669 11:01:44.681500  DeviceVref_Margin_A0==40
  670 11:01:44.686124  VrefDac_Margin_A1==22
  671 11:01:44.686626  DeviceVref_Margin_A1==40
  672 11:01:44.687084  
  673 11:01:44.687536  
  674 11:01:44.688009  channel==1
  675 11:01:44.691706  RxClkDly_Margin_A0==78 ps 8
  676 11:01:44.692243  TxDqDly_Margin_A0==98 ps 10
  677 11:01:44.697399  RxClkDly_Margin_A1==78 ps 8
  678 11:01:44.697898  TxDqDly_Margin_A1==88 ps 9
  679 11:01:44.702897  TrainedVREFDQ_A0==78
  680 11:01:44.703402  TrainedVREFDQ_A1==75
  681 11:01:44.703856  VrefDac_Margin_A0==22
  682 11:01:44.708503  DeviceVref_Margin_A0==36
  683 11:01:44.709001  VrefDac_Margin_A1==22
  684 11:01:44.714089  DeviceVref_Margin_A1==38
  685 11:01:44.714584  
  686 11:01:44.715039   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 11:01:44.715481  
  688 11:01:44.747629  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000060
  689 11:01:44.748198  2D training succeed
  690 11:01:44.753429  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 11:01:44.758905  auto size-- 65535DDR cs0 size: 2048MB
  692 11:01:44.759408  DDR cs1 size: 2048MB
  693 11:01:44.764501  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 11:01:44.765000  cs0 DataBus test pass
  695 11:01:44.770089  cs1 DataBus test pass
  696 11:01:44.770585  cs0 AddrBus test pass
  697 11:01:44.771035  cs1 AddrBus test pass
  698 11:01:44.771473  
  699 11:01:44.775710  100bdlr_step_size ps== 478
  700 11:01:44.776272  result report
  701 11:01:44.781460  boot times 0Enable ddr reg access
  702 11:01:44.786503  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 11:01:44.800454  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 11:01:45.459071  bl2z: ptr: 05129330, size: 00001e40
  705 11:01:45.468489  0.0;M3 CHK:0;cm4_sp_mode 0
  706 11:01:45.469016  MVN_1=0x00000000
  707 11:01:45.469476  MVN_2=0x00000000
  708 11:01:45.479928  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 11:01:45.480516  OPS=0x04
  710 11:01:45.481027  ring efuse init
  711 11:01:45.485603  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 11:01:45.486136  [0.017354 Inits done]
  713 11:01:45.486577  secure task start!
  714 11:01:45.492904  high task start!
  715 11:01:45.493401  low task start!
  716 11:01:45.493837  run into bl31
  717 11:01:45.501503  NOTICE:  BL31: v1.3(release):4fc40b1
  718 11:01:45.510520  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 11:01:45.511033  NOTICE:  BL31: G12A normal boot!
  720 11:01:45.524943  NOTICE:  BL31: BL33 decompress pass
  721 11:01:45.529668  ERROR:   Error initializing runtime service opteed_fast
  722 11:01:46.325959  
  723 11:01:46.326588  
  724 11:01:46.331403  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 11:01:46.331910  
  726 11:01:46.334911  Model: Libre Computer AML-S905D3-CC Solitude
  727 11:01:46.481886  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 11:01:46.496430  DRAM:  2 GiB (effective 3.8 GiB)
  729 11:01:46.598238  Core:  406 devices, 33 uclasses, devicetree: separate
  730 11:01:46.603244  WDT:   Not starting watchdog@f0d0
  731 11:01:46.629247  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 11:01:46.641544  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 11:01:46.645508  ** Bad device specification mmc 0 **
  734 11:01:46.656568  Card did not respond to voltage select! : -110
  735 11:01:46.663132  ** Bad device specification mmc 0 **
  736 11:01:46.663639  Couldn't find partition mmc 0
  737 11:01:46.672573  Card did not respond to voltage select! : -110
  738 11:01:46.677996  ** Bad device specification mmc 0 **
  739 11:01:46.678487  Couldn't find partition mmc 0
  740 11:01:46.682705  Error: could not access storage.
  741 11:01:46.979391  Net:   eth0: ethernet@ff3f0000
  742 11:01:46.980022  starting USB...
  743 11:01:47.224208  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 11:01:47.224892  Starting the controller
  745 11:01:47.230338  USB XHCI 1.10
  746 11:01:48.929086  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 11:01:48.931339         scanning usb for storage devices... 0 Storage Device(s) found
  749 11:01:48.982979  Hit any key to stop autoboot:  1 
  750 11:01:48.984190  end: 2.4.2 bootloader-interrupt (duration 00:00:20) [common]
  751 11:01:48.984892  start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
  752 11:01:48.985433  Setting prompt string to ['=>']
  753 11:01:48.985964  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
  754 11:01:48.990934   0 
  755 11:01:48.991886  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 11:01:49.093267  => setenv autoload no
  758 11:01:49.094264  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  759 11:01:49.099652  setenv autoload no
  761 11:01:49.201247  => setenv initrd_high 0xffffffff
  762 11:01:49.202157  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  763 11:01:49.206831  setenv initrd_high 0xffffffff
  765 11:01:49.308396  => setenv fdt_high 0xffffffff
  766 11:01:49.309294  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  767 11:01:49.313750  setenv fdt_high 0xffffffff
  769 11:01:49.415353  => dhcp
  770 11:01:49.416466  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  771 11:01:49.419778  dhcp
  772 11:01:50.776774  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete... done
  773 11:01:50.777443  Speed: 1000, full duplex
  774 11:01:50.777915  BOOTP broadcast 1
  775 11:01:50.786340  DHCP client bound to address 192.168.6.21 (9 ms)
  777 11:01:50.888027  => setenv serverip 192.168.6.2
  778 11:01:50.889056  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:38)
  779 11:01:50.893543  setenv serverip 192.168.6.2
  781 11:01:50.995166  => tftpboot 0x01080000 974704/tftp-deploy-61edxdz2/kernel/uImage
  782 11:01:50.996028  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:38)
  783 11:01:51.002819  tftpboot 0x01080000 974704/tftp-deploy-61edxdz2/kernel/uImage
  784 11:01:51.003407  Speed: 1000, full duplex
  785 11:01:51.003854  Using ethernet@ff3f0000 device
  786 11:01:51.008347  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  787 11:01:51.013966  Filename '974704/tftp-deploy-61edxdz2/kernel/uImage'.
  788 11:01:51.017869  Load address: 0x1080000
  789 11:01:53.064348  Loading: *######### UDP wrong checksum 000000ff 00008aed
  790 11:01:53.083598   UDP wrong checksum 000000ff 000020e0
  791 11:01:55.231191  ##########
  792 11:01:55.231816  TFTP error: trying to overwrite reserved memory...
  794 11:01:55.233336  end: 2.4.3 bootloader-commands (duration 00:00:06) [common]
  797 11:01:55.235344  end: 2.4 uboot-commands (duration 00:00:26) [common]
  799 11:01:55.236899  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
  801 11:01:55.238083  end: 2 uboot-action (duration 00:00:26) [common]
  803 11:01:55.239795  Cleaning after the job
  804 11:01:55.240441  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/ramdisk
  805 11:01:55.272344  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/kernel
  806 11:01:55.325238  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/dtb
  807 11:01:55.326024  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/nfsrootfs
  808 11:01:55.386955  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974704/tftp-deploy-61edxdz2/modules
  809 11:01:55.442785  start: 4.1 power-off (timeout 00:00:30) [common]
  810 11:01:55.443471  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  811 11:01:55.476556  >> OK - accepted request

  812 11:01:55.478941  Returned 0 in 0 seconds
  813 11:01:55.579726  end: 4.1 power-off (duration 00:00:00) [common]
  815 11:01:55.580761  start: 4.2 read-feedback (timeout 00:10:00) [common]
  816 11:01:55.581412  Listened to connection for namespace 'common' for up to 1s
  817 11:01:56.581645  Finalising connection for namespace 'common'
  818 11:01:56.582376  Disconnecting from shell: Finalise
  819 11:01:56.582888  => 
  820 11:01:56.683877  end: 4.2 read-feedback (duration 00:00:01) [common]
  821 11:01:56.684536  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/974704
  822 11:01:58.788730  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/974704
  823 11:01:58.789367  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.