Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 10:19:25.801393 lava-dispatcher, installed at version: 2024.01
2 10:19:25.802161 start: 0 validate
3 10:19:25.802684 Start time: 2024-11-11 10:19:25.802654+00:00 (UTC)
4 10:19:25.803221 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 10:19:25.803743 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 10:19:25.843499 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 10:19:25.844097 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241111%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fkernel%2FImage exists
8 10:19:25.875629 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 10:19:25.876308 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241111%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 10:19:25.906682 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 10:19:25.907151 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 10:19:25.937307 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 10:19:25.937770 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241111%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fmodules.tar.xz exists
14 10:19:25.974289 validate duration: 0.17
16 10:19:25.975140 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 10:19:25.975488 start: 1.1 download-retry (timeout 00:10:00) [common]
18 10:19:25.975797 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 10:19:25.976439 Not decompressing ramdisk as can be used compressed.
20 10:19:25.976911 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 10:19:25.977207 saving as /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/ramdisk/initrd.cpio.gz
22 10:19:25.977485 total size: 5628182 (5 MB)
23 10:19:26.011606 progress 0 % (0 MB)
24 10:19:26.019498 progress 5 % (0 MB)
25 10:19:26.027681 progress 10 % (0 MB)
26 10:19:26.035004 progress 15 % (0 MB)
27 10:19:26.039767 progress 20 % (1 MB)
28 10:19:26.043398 progress 25 % (1 MB)
29 10:19:26.047412 progress 30 % (1 MB)
30 10:19:26.051494 progress 35 % (1 MB)
31 10:19:26.055164 progress 40 % (2 MB)
32 10:19:26.059214 progress 45 % (2 MB)
33 10:19:26.062915 progress 50 % (2 MB)
34 10:19:26.066970 progress 55 % (2 MB)
35 10:19:26.071053 progress 60 % (3 MB)
36 10:19:26.074664 progress 65 % (3 MB)
37 10:19:26.078772 progress 70 % (3 MB)
38 10:19:26.082505 progress 75 % (4 MB)
39 10:19:26.086533 progress 80 % (4 MB)
40 10:19:26.090243 progress 85 % (4 MB)
41 10:19:26.094236 progress 90 % (4 MB)
42 10:19:26.097880 progress 95 % (5 MB)
43 10:19:26.101211 progress 100 % (5 MB)
44 10:19:26.101877 5 MB downloaded in 0.12 s (43.16 MB/s)
45 10:19:26.102432 end: 1.1.1 http-download (duration 00:00:00) [common]
47 10:19:26.103340 end: 1.1 download-retry (duration 00:00:00) [common]
48 10:19:26.103634 start: 1.2 download-retry (timeout 00:10:00) [common]
49 10:19:26.103906 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 10:19:26.104408 downloading http://storage.kernelci.org/next/master/next-20241111/arm64/defconfig+kselftest/gcc-12/kernel/Image
51 10:19:26.104660 saving as /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/kernel/Image
52 10:19:26.104869 total size: 66980352 (63 MB)
53 10:19:26.105081 No compression specified
54 10:19:26.138774 progress 0 % (0 MB)
55 10:19:26.179614 progress 5 % (3 MB)
56 10:19:26.220237 progress 10 % (6 MB)
57 10:19:26.260976 progress 15 % (9 MB)
58 10:19:26.301350 progress 20 % (12 MB)
59 10:19:26.342398 progress 25 % (16 MB)
60 10:19:26.383082 progress 30 % (19 MB)
61 10:19:26.424054 progress 35 % (22 MB)
62 10:19:26.464375 progress 40 % (25 MB)
63 10:19:26.505610 progress 45 % (28 MB)
64 10:19:26.551954 progress 50 % (31 MB)
65 10:19:26.593844 progress 55 % (35 MB)
66 10:19:26.634805 progress 60 % (38 MB)
67 10:19:26.675235 progress 65 % (41 MB)
68 10:19:26.715322 progress 70 % (44 MB)
69 10:19:26.756324 progress 75 % (47 MB)
70 10:19:26.796512 progress 80 % (51 MB)
71 10:19:26.836851 progress 85 % (54 MB)
72 10:19:26.877349 progress 90 % (57 MB)
73 10:19:26.917580 progress 95 % (60 MB)
74 10:19:26.958002 progress 100 % (63 MB)
75 10:19:26.958560 63 MB downloaded in 0.85 s (74.83 MB/s)
76 10:19:26.959039 end: 1.2.1 http-download (duration 00:00:01) [common]
78 10:19:26.959848 end: 1.2 download-retry (duration 00:00:01) [common]
79 10:19:26.960151 start: 1.3 download-retry (timeout 00:09:59) [common]
80 10:19:26.960418 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 10:19:26.961004 downloading http://storage.kernelci.org/next/master/next-20241111/arm64/defconfig+kselftest/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 10:19:26.961306 saving as /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 10:19:26.961523 total size: 53209 (0 MB)
84 10:19:26.961742 No compression specified
85 10:19:27.001229 progress 61 % (0 MB)
86 10:19:27.002108 progress 100 % (0 MB)
87 10:19:27.002676 0 MB downloaded in 0.04 s (1.23 MB/s)
88 10:19:27.003166 end: 1.3.1 http-download (duration 00:00:00) [common]
90 10:19:27.004053 end: 1.3 download-retry (duration 00:00:00) [common]
91 10:19:27.004353 start: 1.4 download-retry (timeout 00:09:59) [common]
92 10:19:27.004638 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 10:19:27.005113 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 10:19:27.005372 saving as /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/nfsrootfs/full.rootfs.tar
95 10:19:27.005593 total size: 107552908 (102 MB)
96 10:19:27.005815 Using unxz to decompress xz
97 10:19:27.040288 progress 0 % (0 MB)
98 10:19:27.688192 progress 5 % (5 MB)
99 10:19:28.406077 progress 10 % (10 MB)
100 10:19:29.123393 progress 15 % (15 MB)
101 10:19:29.876373 progress 20 % (20 MB)
102 10:19:30.445280 progress 25 % (25 MB)
103 10:19:31.064167 progress 30 % (30 MB)
104 10:19:31.800912 progress 35 % (35 MB)
105 10:19:32.183246 progress 40 % (41 MB)
106 10:19:32.607586 progress 45 % (46 MB)
107 10:19:33.293269 progress 50 % (51 MB)
108 10:19:33.968411 progress 55 % (56 MB)
109 10:19:34.717715 progress 60 % (61 MB)
110 10:19:35.464353 progress 65 % (66 MB)
111 10:19:36.190263 progress 70 % (71 MB)
112 10:19:36.953337 progress 75 % (76 MB)
113 10:19:37.638465 progress 80 % (82 MB)
114 10:19:38.337299 progress 85 % (87 MB)
115 10:19:39.058604 progress 90 % (92 MB)
116 10:19:39.760379 progress 95 % (97 MB)
117 10:19:40.491813 progress 100 % (102 MB)
118 10:19:40.503795 102 MB downloaded in 13.50 s (7.60 MB/s)
119 10:19:40.504721 end: 1.4.1 http-download (duration 00:00:14) [common]
121 10:19:40.506347 end: 1.4 download-retry (duration 00:00:14) [common]
122 10:19:40.506877 start: 1.5 download-retry (timeout 00:09:45) [common]
123 10:19:40.507401 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 10:19:40.508217 downloading http://storage.kernelci.org/next/master/next-20241111/arm64/defconfig+kselftest/gcc-12/modules.tar.xz
125 10:19:40.508685 saving as /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/modules/modules.tar
126 10:19:40.509103 total size: 16288464 (15 MB)
127 10:19:40.509528 Using unxz to decompress xz
128 10:19:40.555622 progress 0 % (0 MB)
129 10:19:40.656356 progress 5 % (0 MB)
130 10:19:40.768587 progress 10 % (1 MB)
131 10:19:40.889074 progress 15 % (2 MB)
132 10:19:41.017227 progress 20 % (3 MB)
133 10:19:41.157395 progress 25 % (3 MB)
134 10:19:41.268335 progress 30 % (4 MB)
135 10:19:41.373952 progress 35 % (5 MB)
136 10:19:41.486815 progress 40 % (6 MB)
137 10:19:41.594939 progress 45 % (7 MB)
138 10:19:41.712618 progress 50 % (7 MB)
139 10:19:41.824477 progress 55 % (8 MB)
140 10:19:41.943010 progress 60 % (9 MB)
141 10:19:42.059776 progress 65 % (10 MB)
142 10:19:42.168713 progress 70 % (10 MB)
143 10:19:42.287148 progress 75 % (11 MB)
144 10:19:42.405395 progress 80 % (12 MB)
145 10:19:42.518377 progress 85 % (13 MB)
146 10:19:42.630037 progress 90 % (14 MB)
147 10:19:42.734880 progress 95 % (14 MB)
148 10:19:42.853874 progress 100 % (15 MB)
149 10:19:42.864248 15 MB downloaded in 2.36 s (6.60 MB/s)
150 10:19:42.865265 end: 1.5.1 http-download (duration 00:00:02) [common]
152 10:19:42.867029 end: 1.5 download-retry (duration 00:00:02) [common]
153 10:19:42.867772 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 10:19:42.868432 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 10:19:52.424351 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/974373/extract-nfsrootfs-tvpd9y5b
156 10:19:52.424977 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 10:19:52.425275 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 10:19:52.425909 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc
159 10:19:52.426354 makedir: /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin
160 10:19:52.426690 makedir: /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/tests
161 10:19:52.427010 makedir: /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/results
162 10:19:52.427348 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-add-keys
163 10:19:52.427874 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-add-sources
164 10:19:52.428450 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-background-process-start
165 10:19:52.428967 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-background-process-stop
166 10:19:52.429497 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-common-functions
167 10:19:52.429987 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-echo-ipv4
168 10:19:52.430465 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-install-packages
169 10:19:52.430961 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-installed-packages
170 10:19:52.431537 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-os-build
171 10:19:52.432124 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-probe-channel
172 10:19:52.432664 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-probe-ip
173 10:19:52.433168 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-target-ip
174 10:19:52.433661 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-target-mac
175 10:19:52.434160 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-target-storage
176 10:19:52.434665 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-test-case
177 10:19:52.435158 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-test-event
178 10:19:52.435633 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-test-feedback
179 10:19:52.436132 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-test-raise
180 10:19:52.436634 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-test-reference
181 10:19:52.437131 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-test-runner
182 10:19:52.437620 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-test-set
183 10:19:52.438105 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-test-shell
184 10:19:52.438602 Updating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-install-packages (oe)
185 10:19:52.439134 Updating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/bin/lava-installed-packages (oe)
186 10:19:52.439582 Creating /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/environment
187 10:19:52.439956 LAVA metadata
188 10:19:52.440250 - LAVA_JOB_ID=974373
189 10:19:52.440471 - LAVA_DISPATCHER_IP=192.168.6.2
190 10:19:52.440844 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 10:19:52.441811 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 10:19:52.442126 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 10:19:52.442337 skipped lava-vland-overlay
194 10:19:52.442580 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 10:19:52.442837 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 10:19:52.443056 skipped lava-multinode-overlay
197 10:19:52.443298 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 10:19:52.443550 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 10:19:52.443797 Loading test definitions
200 10:19:52.444118 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 10:19:52.444349 Using /lava-974373 at stage 0
202 10:19:52.445627 uuid=974373_1.6.2.4.1 testdef=None
203 10:19:52.445940 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 10:19:52.446203 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 10:19:52.447969 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 10:19:52.448784 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 10:19:52.451012 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 10:19:52.451838 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 10:19:52.454006 runner path: /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/0/tests/0_dmesg test_uuid 974373_1.6.2.4.1
212 10:19:52.454554 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 10:19:52.455306 Creating lava-test-runner.conf files
215 10:19:52.455510 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/974373/lava-overlay-nnj7xcbc/lava-974373/0 for stage 0
216 10:19:52.455854 - 0_dmesg
217 10:19:52.456240 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 10:19:52.456520 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 10:19:52.477899 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 10:19:52.478286 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 10:19:52.478552 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 10:19:52.478819 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 10:19:52.479082 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 10:19:53.101666 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 10:19:53.102146 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 10:19:53.102432 extracting modules file /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974373/extract-nfsrootfs-tvpd9y5b
227 10:19:54.712629 extracting modules file /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/974373/extract-overlay-ramdisk-z5iu9db2/ramdisk
228 10:19:56.296531 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 10:19:56.296983 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 10:19:56.297263 [common] Applying overlay to NFS
231 10:19:56.297478 [common] Applying overlay /var/lib/lava/dispatcher/tmp/974373/compress-overlay-5gfl3qrj/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/974373/extract-nfsrootfs-tvpd9y5b
232 10:19:56.326523 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 10:19:56.326883 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 10:19:56.327151 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 10:19:56.327382 Converting downloaded kernel to a uImage
236 10:19:56.327685 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/kernel/Image /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/kernel/uImage
237 10:19:57.061116 output: Image Name:
238 10:19:57.061543 output: Created: Mon Nov 11 10:19:56 2024
239 10:19:57.061753 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 10:19:57.061958 output: Data Size: 66980352 Bytes = 65410.50 KiB = 63.88 MiB
241 10:19:57.062161 output: Load Address: 01080000
242 10:19:57.062361 output: Entry Point: 01080000
243 10:19:57.062557 output:
244 10:19:57.062889 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 10:19:57.063153 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 10:19:57.063423 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 10:19:57.063677 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 10:19:57.063937 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 10:19:57.064232 Building ramdisk /var/lib/lava/dispatcher/tmp/974373/extract-overlay-ramdisk-z5iu9db2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/974373/extract-overlay-ramdisk-z5iu9db2/ramdisk
250 10:20:00.235603 >> 243527 blocks
251 10:20:10.587256 Adding RAMdisk u-boot header.
252 10:20:10.587921 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/974373/extract-overlay-ramdisk-z5iu9db2/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/974373/extract-overlay-ramdisk-z5iu9db2/ramdisk.cpio.gz.uboot
253 10:20:10.925758 output: Image Name:
254 10:20:10.926163 output: Created: Mon Nov 11 10:20:10 2024
255 10:20:10.926376 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 10:20:10.926580 output: Data Size: 31325995 Bytes = 30591.79 KiB = 29.87 MiB
257 10:20:10.926780 output: Load Address: 00000000
258 10:20:10.926978 output: Entry Point: 00000000
259 10:20:10.927173 output:
260 10:20:10.927763 rename /var/lib/lava/dispatcher/tmp/974373/extract-overlay-ramdisk-z5iu9db2/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/ramdisk/ramdisk.cpio.gz.uboot
261 10:20:10.928313 end: 1.6.8 compress-ramdisk (duration 00:00:14) [common]
262 10:20:10.928866 end: 1.6 prepare-tftp-overlay (duration 00:00:28) [common]
263 10:20:10.929387 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:15) [common]
264 10:20:10.929836 No LXC device requested
265 10:20:10.930331 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 10:20:10.930834 start: 1.8 deploy-device-env (timeout 00:09:15) [common]
267 10:20:10.931323 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 10:20:10.931731 Checking files for TFTP limit of 4294967296 bytes.
269 10:20:10.934415 end: 1 tftp-deploy (duration 00:00:45) [common]
270 10:20:10.934976 start: 2 uboot-action (timeout 00:05:00) [common]
271 10:20:10.935491 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 10:20:10.936013 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 10:20:10.936523 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 10:20:10.937048 Using kernel file from prepare-kernel: 974373/tftp-deploy-09iji5xj/kernel/uImage
275 10:20:10.937667 substitutions:
276 10:20:10.938070 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 10:20:10.938473 - {DTB_ADDR}: 0x01070000
278 10:20:10.938867 - {DTB}: 974373/tftp-deploy-09iji5xj/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 10:20:10.939262 - {INITRD}: 974373/tftp-deploy-09iji5xj/ramdisk/ramdisk.cpio.gz.uboot
280 10:20:10.939654 - {KERNEL_ADDR}: 0x01080000
281 10:20:10.940074 - {KERNEL}: 974373/tftp-deploy-09iji5xj/kernel/uImage
282 10:20:10.940471 - {LAVA_MAC}: None
283 10:20:10.940898 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/974373/extract-nfsrootfs-tvpd9y5b
284 10:20:10.941292 - {NFS_SERVER_IP}: 192.168.6.2
285 10:20:10.941681 - {PRESEED_CONFIG}: None
286 10:20:10.942068 - {PRESEED_LOCAL}: None
287 10:20:10.942449 - {RAMDISK_ADDR}: 0x08000000
288 10:20:10.942831 - {RAMDISK}: 974373/tftp-deploy-09iji5xj/ramdisk/ramdisk.cpio.gz.uboot
289 10:20:10.943217 - {ROOT_PART}: None
290 10:20:10.943601 - {ROOT}: None
291 10:20:10.944005 - {SERVER_IP}: 192.168.6.2
292 10:20:10.944396 - {TEE_ADDR}: 0x83000000
293 10:20:10.944779 - {TEE}: None
294 10:20:10.945166 Parsed boot commands:
295 10:20:10.945543 - setenv autoload no
296 10:20:10.945932 - setenv initrd_high 0xffffffff
297 10:20:10.946318 - setenv fdt_high 0xffffffff
298 10:20:10.946704 - dhcp
299 10:20:10.947085 - setenv serverip 192.168.6.2
300 10:20:10.947468 - tftpboot 0x01080000 974373/tftp-deploy-09iji5xj/kernel/uImage
301 10:20:10.947853 - tftpboot 0x08000000 974373/tftp-deploy-09iji5xj/ramdisk/ramdisk.cpio.gz.uboot
302 10:20:10.948269 - tftpboot 0x01070000 974373/tftp-deploy-09iji5xj/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 10:20:10.948658 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/974373/extract-nfsrootfs-tvpd9y5b,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 10:20:10.949057 - bootm 0x01080000 0x08000000 0x01070000
305 10:20:10.949544 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 10:20:10.951014 start: 2.3 connect-device (timeout 00:05:00) [common]
308 10:20:10.951429 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 10:20:10.965540 Setting prompt string to ['lava-test: # ']
310 10:20:10.967045 end: 2.3 connect-device (duration 00:00:00) [common]
311 10:20:10.967634 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 10:20:10.968206 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 10:20:10.968721 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 10:20:10.969846 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 10:20:11.005807 >> OK - accepted request
316 10:20:11.007921 Returned 0 in 0 seconds
317 10:20:11.109074 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 10:20:11.110645 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 10:20:11.111189 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 10:20:11.111701 Setting prompt string to ['Hit any key to stop autoboot']
322 10:20:11.112208 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 10:20:11.113756 Trying 192.168.56.21...
324 10:20:11.114231 Connected to conserv1.
325 10:20:11.114642 Escape character is '^]'.
326 10:20:11.115059
327 10:20:11.115475 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 10:20:11.115890
329 10:20:18.712563 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 10:20:18.713190 bl2_stage_init 0x01
331 10:20:18.713620 bl2_stage_init 0x81
332 10:20:18.718176 hw id: 0x0000 - pwm id 0x01
333 10:20:18.718631 bl2_stage_init 0xc1
334 10:20:18.723761 bl2_stage_init 0x02
335 10:20:18.724250
336 10:20:18.724677 L0:00000000
337 10:20:18.725076 L1:00000703
338 10:20:18.725472 L2:00008067
339 10:20:18.725865 L3:15000000
340 10:20:18.729468 S1:00000000
341 10:20:18.729899 B2:20282000
342 10:20:18.730299 B1:a0f83180
343 10:20:18.730695
344 10:20:18.731097 TE: 70768
345 10:20:18.731494
346 10:20:18.734904 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 10:20:18.735343
348 10:20:18.740523 Board ID = 1
349 10:20:18.740953 Set cpu clk to 24M
350 10:20:18.741355 Set clk81 to 24M
351 10:20:18.746065 Use GP1_pll as DSU clk.
352 10:20:18.746488 DSU clk: 1200 Mhz
353 10:20:18.746889 CPU clk: 1200 MHz
354 10:20:18.751745 Set clk81 to 166.6M
355 10:20:18.757448 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 10:20:18.757877 board id: 1
357 10:20:18.764467 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 10:20:18.775360 fw parse done
359 10:20:18.781294 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 10:20:18.824462 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 10:20:18.835780 PIEI prepare done
362 10:20:18.836241 fastboot data load
363 10:20:18.836653 fastboot data verify
364 10:20:18.841174 verify result: 266
365 10:20:18.846776 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 10:20:18.847199 LPDDR4 probe
367 10:20:18.847595 ddr clk to 1584MHz
368 10:20:18.854792 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 10:20:18.892670
370 10:20:18.893155 dmc_version 0001
371 10:20:18.899655 Check phy result
372 10:20:18.905571 INFO : End of CA training
373 10:20:18.905995 INFO : End of initialization
374 10:20:18.911183 INFO : Training has run successfully!
375 10:20:18.911604 Check phy result
376 10:20:18.916735 INFO : End of initialization
377 10:20:18.917158 INFO : End of read enable training
378 10:20:18.920064 INFO : End of fine write leveling
379 10:20:18.925593 INFO : End of Write leveling coarse delay
380 10:20:18.931229 INFO : Training has run successfully!
381 10:20:18.931646 Check phy result
382 10:20:18.932068 INFO : End of initialization
383 10:20:18.936828 INFO : End of read dq deskew training
384 10:20:18.942394 INFO : End of MPR read delay center optimization
385 10:20:18.942821 INFO : End of write delay center optimization
386 10:20:18.948062 INFO : End of read delay center optimization
387 10:20:18.953726 INFO : End of max read latency training
388 10:20:18.954148 INFO : Training has run successfully!
389 10:20:18.959220 1D training succeed
390 10:20:18.965153 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 10:20:19.013381 Check phy result
392 10:20:19.013830 INFO : End of initialization
393 10:20:19.040935 INFO : End of 2D read delay Voltage center optimization
394 10:20:19.065022 INFO : End of 2D read delay Voltage center optimization
395 10:20:19.121631 INFO : End of 2D write delay Voltage center optimization
396 10:20:19.175671 INFO : End of 2D write delay Voltage center optimization
397 10:20:19.181147 INFO : Training has run successfully!
398 10:20:19.181581
399 10:20:19.181987 channel==0
400 10:20:19.186812 RxClkDly_Margin_A0==78 ps 8
401 10:20:19.187233 TxDqDly_Margin_A0==98 ps 10
402 10:20:19.190034 RxClkDly_Margin_A1==88 ps 9
403 10:20:19.190469 TxDqDly_Margin_A1==98 ps 10
404 10:20:19.195598 TrainedVREFDQ_A0==74
405 10:20:19.196055 TrainedVREFDQ_A1==75
406 10:20:19.196463 VrefDac_Margin_A0==25
407 10:20:19.201261 DeviceVref_Margin_A0==40
408 10:20:19.201681 VrefDac_Margin_A1==23
409 10:20:19.206838 DeviceVref_Margin_A1==39
410 10:20:19.207252
411 10:20:19.207654
412 10:20:19.208088 channel==1
413 10:20:19.208484 RxClkDly_Margin_A0==88 ps 9
414 10:20:19.210319 TxDqDly_Margin_A0==98 ps 10
415 10:20:19.215817 RxClkDly_Margin_A1==78 ps 8
416 10:20:19.216270 TxDqDly_Margin_A1==88 ps 9
417 10:20:19.216678 TrainedVREFDQ_A0==78
418 10:20:19.221543 TrainedVREFDQ_A1==75
419 10:20:19.221965 VrefDac_Margin_A0==23
420 10:20:19.226989 DeviceVref_Margin_A0==36
421 10:20:19.227407 VrefDac_Margin_A1==22
422 10:20:19.227808 DeviceVref_Margin_A1==39
423 10:20:19.228238
424 10:20:19.235789 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 10:20:19.236242
426 10:20:19.263886 soc_vref_reg_value 0x 00000019 00000018 00000019 00000016 00000018 00000015 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 10:20:19.264455 2D training succeed
428 10:20:19.274856 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 10:20:19.275318 auto size-- 65535DDR cs0 size: 2048MB
430 10:20:19.280489 DDR cs1 size: 2048MB
431 10:20:19.281022 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 10:20:19.281448 cs0 DataBus test pass
433 10:20:19.286012 cs1 DataBus test pass
434 10:20:19.286470 cs0 AddrBus test pass
435 10:20:19.291766 cs1 AddrBus test pass
436 10:20:19.292264
437 10:20:19.292686 100bdlr_step_size ps== 478
438 10:20:19.293101 result report
439 10:20:19.297219 boot times 0Enable ddr reg access
440 10:20:19.303931 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 10:20:19.317826 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 10:20:19.976611 bl2z: ptr: 05129330, size: 00001e40
443 10:20:19.983540 0.0;M3 CHK:0;cm4_sp_mode 0
444 10:20:19.984036 MVN_1=0x00000000
445 10:20:19.984463 MVN_2=0x00000000
446 10:20:19.994954 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 10:20:19.995398 OPS=0x04
448 10:20:19.995811 ring efuse init
449 10:20:20.000608 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 10:20:20.001050 [0.017354 Inits done]
451 10:20:20.001455 secure task start!
452 10:20:20.007845 high task start!
453 10:20:20.008314 low task start!
454 10:20:20.008721 run into bl31
455 10:20:20.016347 NOTICE: BL31: v1.3(release):4fc40b1
456 10:20:20.024170 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 10:20:20.024634 NOTICE: BL31: G12A normal boot!
458 10:20:20.039822 NOTICE: BL31: BL33 decompress pass
459 10:20:20.045418 ERROR: Error initializing runtime service opteed_fast
460 10:20:22.758442 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 10:20:22.759043 bl2_stage_init 0x01
462 10:20:22.759483 bl2_stage_init 0x81
463 10:20:22.763973 hw id: 0x0000 - pwm id 0x01
464 10:20:22.764471 bl2_stage_init 0xc1
465 10:20:22.769639 bl2_stage_init 0x02
466 10:20:22.770108
467 10:20:22.770511 L0:00000000
468 10:20:22.770899 L1:00000703
469 10:20:22.771287 L2:00008067
470 10:20:22.771669 L3:15000000
471 10:20:22.775195 S1:00000000
472 10:20:22.775635 B2:20282000
473 10:20:22.776056 B1:a0f83180
474 10:20:22.776452
475 10:20:22.776852 TE: 68023
476 10:20:22.777262
477 10:20:22.780791 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 10:20:22.781219
479 10:20:22.786388 Board ID = 1
480 10:20:22.786804 Set cpu clk to 24M
481 10:20:22.787193 Set clk81 to 24M
482 10:20:22.791968 Use GP1_pll as DSU clk.
483 10:20:22.792412 DSU clk: 1200 Mhz
484 10:20:22.792801 CPU clk: 1200 MHz
485 10:20:22.797576 Set clk81 to 166.6M
486 10:20:22.803208 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 10:20:22.803663 board id: 1
488 10:20:22.810412 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 10:20:22.821331 fw parse done
490 10:20:22.827298 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 10:20:22.870387 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 10:20:22.881603 PIEI prepare done
493 10:20:22.882067 fastboot data load
494 10:20:22.882459 fastboot data verify
495 10:20:22.887192 verify result: 266
496 10:20:22.892701 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 10:20:22.893114 LPDDR4 probe
498 10:20:22.893499 ddr clk to 1584MHz
499 10:20:22.900714 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 10:20:22.938531
501 10:20:22.938971 dmc_version 0001
502 10:20:22.945467 Check phy result
503 10:20:22.951468 INFO : End of CA training
504 10:20:22.951931 INFO : End of initialization
505 10:20:22.957035 INFO : Training has run successfully!
506 10:20:22.957460 Check phy result
507 10:20:22.962646 INFO : End of initialization
508 10:20:22.963067 INFO : End of read enable training
509 10:20:22.965965 INFO : End of fine write leveling
510 10:20:22.971569 INFO : End of Write leveling coarse delay
511 10:20:22.977221 INFO : Training has run successfully!
512 10:20:22.977646 Check phy result
513 10:20:22.978047 INFO : End of initialization
514 10:20:22.982777 INFO : End of read dq deskew training
515 10:20:22.988376 INFO : End of MPR read delay center optimization
516 10:20:22.988801 INFO : End of write delay center optimization
517 10:20:22.993965 INFO : End of read delay center optimization
518 10:20:22.999563 INFO : End of max read latency training
519 10:20:23.000014 INFO : Training has run successfully!
520 10:20:23.005228 1D training succeed
521 10:20:23.011131 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 10:20:23.059358 Check phy result
523 10:20:23.059816 INFO : End of initialization
524 10:20:23.085784 INFO : End of 2D read delay Voltage center optimization
525 10:20:23.110927 INFO : End of 2D read delay Voltage center optimization
526 10:20:23.166759 INFO : End of 2D write delay Voltage center optimization
527 10:20:23.221676 INFO : End of 2D write delay Voltage center optimization
528 10:20:23.227270 INFO : Training has run successfully!
529 10:20:23.227693
530 10:20:23.228142 channel==0
531 10:20:23.232807 RxClkDly_Margin_A0==78 ps 8
532 10:20:23.233234 TxDqDly_Margin_A0==98 ps 10
533 10:20:23.238394 RxClkDly_Margin_A1==88 ps 9
534 10:20:23.238812 TxDqDly_Margin_A1==88 ps 9
535 10:20:23.239217 TrainedVREFDQ_A0==74
536 10:20:23.244027 TrainedVREFDQ_A1==74
537 10:20:23.244455 VrefDac_Margin_A0==24
538 10:20:23.244854 DeviceVref_Margin_A0==40
539 10:20:23.249581 VrefDac_Margin_A1==23
540 10:20:23.250011 DeviceVref_Margin_A1==40
541 10:20:23.250414
542 10:20:23.250814
543 10:20:23.251210 channel==1
544 10:20:23.255254 RxClkDly_Margin_A0==88 ps 9
545 10:20:23.255678 TxDqDly_Margin_A0==98 ps 10
546 10:20:23.260779 RxClkDly_Margin_A1==88 ps 9
547 10:20:23.261209 TxDqDly_Margin_A1==88 ps 9
548 10:20:23.266392 TrainedVREFDQ_A0==75
549 10:20:23.266817 TrainedVREFDQ_A1==77
550 10:20:23.267217 VrefDac_Margin_A0==22
551 10:20:23.272017 DeviceVref_Margin_A0==38
552 10:20:23.272437 VrefDac_Margin_A1==22
553 10:20:23.277573 DeviceVref_Margin_A1==37
554 10:20:23.277992
555 10:20:23.278392 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 10:20:23.278784
557 10:20:23.311268 soc_vref_reg_value 0x 0000001a 00000019 00000019 00000017 00000019 00000016 00000018 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000018 00000017 00000019 00000016 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000019 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
558 10:20:23.311738 2D training succeed
559 10:20:23.316822 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 10:20:23.322411 auto size-- 65535DDR cs0 size: 2048MB
561 10:20:23.322836 DDR cs1 size: 2048MB
562 10:20:23.328037 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 10:20:23.328466 cs0 DataBus test pass
564 10:20:23.333564 cs1 DataBus test pass
565 10:20:23.333984 cs0 AddrBus test pass
566 10:20:23.334376 cs1 AddrBus test pass
567 10:20:23.334767
568 10:20:23.339299 100bdlr_step_size ps== 471
569 10:20:23.339730 result report
570 10:20:23.344769 boot times 0Enable ddr reg access
571 10:20:23.349979 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 10:20:23.363837 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 10:20:24.024161 bl2z: ptr: 05129330, size: 00001e40
574 10:20:24.031571 0.0;M3 CHK:0;cm4_sp_mode 0
575 10:20:24.032085 MVN_1=0x00000000
576 10:20:24.032504 MVN_2=0x00000000
577 10:20:24.043072 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 10:20:24.043541 OPS=0x04
579 10:20:24.043963 ring efuse init
580 10:20:24.045986 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 10:20:24.051704 [0.017354 Inits done]
582 10:20:24.052222 secure task start!
583 10:20:24.052634 high task start!
584 10:20:24.053037 low task start!
585 10:20:24.056061 run into bl31
586 10:20:24.064648 NOTICE: BL31: v1.3(release):4fc40b1
587 10:20:24.072453 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 10:20:24.072906 NOTICE: BL31: G12A normal boot!
589 10:20:24.087969 NOTICE: BL31: BL33 decompress pass
590 10:20:24.093645 ERROR: Error initializing runtime service opteed_fast
591 10:20:25.459582 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 10:20:25.460250 bl2_stage_init 0x01
593 10:20:25.460693 bl2_stage_init 0x81
594 10:20:25.465094 hw id: 0x0000 - pwm id 0x01
595 10:20:25.465791 bl2_stage_init 0xc1
596 10:20:25.470720 bl2_stage_init 0x02
597 10:20:25.471255
598 10:20:25.471717 L0:00000000
599 10:20:25.472200 L1:00000703
600 10:20:25.472640 L2:00008067
601 10:20:25.473063 L3:15000000
602 10:20:25.476375 S1:00000000
603 10:20:25.476885 B2:20282000
604 10:20:25.477300 B1:a0f83180
605 10:20:25.477701
606 10:20:25.478098 TE: 68725
607 10:20:25.478524
608 10:20:25.482105 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 10:20:25.482839
610 10:20:25.487644 Board ID = 1
611 10:20:25.488731 Set cpu clk to 24M
612 10:20:25.489479 Set clk81 to 24M
613 10:20:25.493453 Use GP1_pll as DSU clk.
614 10:20:25.494130 DSU clk: 1200 Mhz
615 10:20:25.494679 CPU clk: 1200 MHz
616 10:20:25.498842 Set clk81 to 166.6M
617 10:20:25.504466 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 10:20:25.505159 board id: 1
619 10:20:25.511619 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 10:20:25.522331 fw parse done
621 10:20:25.528252 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 10:20:25.570801 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 10:20:25.581712 PIEI prepare done
624 10:20:25.582284 fastboot data load
625 10:20:25.582709 fastboot data verify
626 10:20:25.587256 verify result: 266
627 10:20:25.592812 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 10:20:25.593318 LPDDR4 probe
629 10:20:25.593734 ddr clk to 1584MHz
630 10:20:25.600854 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 10:20:25.638132
632 10:20:25.638720 dmc_version 0001
633 10:20:25.644852 Check phy result
634 10:20:25.650775 INFO : End of CA training
635 10:20:25.651272 INFO : End of initialization
636 10:20:25.656276 INFO : Training has run successfully!
637 10:20:25.656772 Check phy result
638 10:20:25.661827 INFO : End of initialization
639 10:20:25.662309 INFO : End of read enable training
640 10:20:25.665148 INFO : End of fine write leveling
641 10:20:25.670773 INFO : End of Write leveling coarse delay
642 10:20:25.676319 INFO : Training has run successfully!
643 10:20:25.676810 Check phy result
644 10:20:25.677222 INFO : End of initialization
645 10:20:25.681894 INFO : End of read dq deskew training
646 10:20:25.687497 INFO : End of MPR read delay center optimization
647 10:20:25.688022 INFO : End of write delay center optimization
648 10:20:25.693157 INFO : End of read delay center optimization
649 10:20:25.698784 INFO : End of max read latency training
650 10:20:25.699266 INFO : Training has run successfully!
651 10:20:25.704322 1D training succeed
652 10:20:25.710326 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 10:20:25.757987 Check phy result
654 10:20:25.758605 INFO : End of initialization
655 10:20:25.780308 INFO : End of 2D read delay Voltage center optimization
656 10:20:25.798497 INFO : End of 2D read delay Voltage center optimization
657 10:20:25.851384 INFO : End of 2D write delay Voltage center optimization
658 10:20:25.900438 INFO : End of 2D write delay Voltage center optimization
659 10:20:25.905998 INFO : Training has run successfully!
660 10:20:25.906509
661 10:20:25.906932 channel==0
662 10:20:25.911549 RxClkDly_Margin_A0==69 ps 7
663 10:20:25.912078 TxDqDly_Margin_A0==88 ps 9
664 10:20:25.914975 RxClkDly_Margin_A1==88 ps 9
665 10:20:25.915479 TxDqDly_Margin_A1==98 ps 10
666 10:20:25.920580 TrainedVREFDQ_A0==74
667 10:20:25.921118 TrainedVREFDQ_A1==74
668 10:20:25.921538 VrefDac_Margin_A0==24
669 10:20:25.926173 DeviceVref_Margin_A0==40
670 10:20:25.926733 VrefDac_Margin_A1==23
671 10:20:25.931914 DeviceVref_Margin_A1==40
672 10:20:25.932494
673 10:20:25.932916
674 10:20:25.933322 channel==1
675 10:20:25.933722 RxClkDly_Margin_A0==78 ps 8
676 10:20:25.937359 TxDqDly_Margin_A0==88 ps 9
677 10:20:25.937856 RxClkDly_Margin_A1==88 ps 9
678 10:20:25.942925 TxDqDly_Margin_A1==78 ps 8
679 10:20:25.943437 TrainedVREFDQ_A0==77
680 10:20:25.943859 TrainedVREFDQ_A1==75
681 10:20:25.948618 VrefDac_Margin_A0==22
682 10:20:25.949165 DeviceVref_Margin_A0==37
683 10:20:25.949584 VrefDac_Margin_A1==22
684 10:20:25.954142 DeviceVref_Margin_A1==39
685 10:20:25.954684
686 10:20:25.959868 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 10:20:25.960433
688 10:20:25.987771 soc_vref_reg_value 0x 0000001a 00000019 00000019 00000017 00000018 00000016 00000018 00000016 00000018 00000017 00000017 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000016 dram_vref_reg_value 0x 00000061
689 10:20:25.993339 2D training succeed
690 10:20:25.998816 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 10:20:25.999314 auto size-- 65535DDR cs0 size: 2048MB
692 10:20:26.004653 DDR cs1 size: 2048MB
693 10:20:26.005244 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 10:20:26.010054 cs0 DataBus test pass
695 10:20:26.010586 cs1 DataBus test pass
696 10:20:26.011040 cs0 AddrBus test pass
697 10:20:26.015867 cs1 AddrBus test pass
698 10:20:26.016241
699 10:20:26.016524 100bdlr_step_size ps== 478
700 10:20:26.016782 result report
701 10:20:26.021316 boot times 0Enable ddr reg access
702 10:20:26.028725 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 10:20:26.042436 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 10:20:26.697470 bl2z: ptr: 05129330, size: 00001e40
705 10:20:26.705031 0.0;M3 CHK:0;cm4_sp_mode 0
706 10:20:26.705384 MVN_1=0x00000000
707 10:20:26.705610 MVN_2=0x00000000
708 10:20:26.716528 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 10:20:26.716995 OPS=0x04
710 10:20:26.717331 ring efuse init
711 10:20:26.722115 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 10:20:26.722549 [0.017320 Inits done]
713 10:20:26.722863 secure task start!
714 10:20:26.729604 high task start!
715 10:20:26.729919 low task start!
716 10:20:26.730131 run into bl31
717 10:20:26.738287 NOTICE: BL31: v1.3(release):4fc40b1
718 10:20:26.745918 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 10:20:26.746376 NOTICE: BL31: G12A normal boot!
720 10:20:26.761492 NOTICE: BL31: BL33 decompress pass
721 10:20:26.767127 ERROR: Error initializing runtime service opteed_fast
722 10:20:27.562547
723 10:20:27.562984
724 10:20:27.567896 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 10:20:27.568261
726 10:20:27.571633 Model: Libre Computer AML-S905D3-CC Solitude
727 10:20:27.718501 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 10:20:27.733913 DRAM: 2 GiB (effective 3.8 GiB)
729 10:20:27.834932 Core: 406 devices, 33 uclasses, devicetree: separate
730 10:20:27.841453 WDT: Not starting watchdog@f0d0
731 10:20:27.865896 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 10:20:27.878004 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 10:20:27.883203 ** Bad device specification mmc 0 **
734 10:20:27.893022 Card did not respond to voltage select! : -110
735 10:20:27.900693 ** Bad device specification mmc 0 **
736 10:20:27.901217 Couldn't find partition mmc 0
737 10:20:27.909011 Card did not respond to voltage select! : -110
738 10:20:27.914528 ** Bad device specification mmc 0 **
739 10:20:27.915035 Couldn't find partition mmc 0
740 10:20:27.919567 Error: could not access storage.
741 10:20:28.217070 Net: eth0: ethernet@ff3f0000
742 10:20:28.217688 starting USB...
743 10:20:28.461970 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 10:20:28.462576 Starting the controller
745 10:20:28.468669 USB XHCI 1.10
746 10:20:30.023065 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 10:20:30.031429 scanning usb for storage devices... 0 Storage Device(s) found
749 10:20:30.083186 Hit any key to stop autoboot: 1
750 10:20:30.084231 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 10:20:30.084894 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 10:20:30.085484 Setting prompt string to ['=>']
753 10:20:30.086053 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 10:20:30.097420 0
755 10:20:30.098415 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 10:20:30.199764 => setenv autoload no
758 10:20:30.201591 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 10:20:30.207065 setenv autoload no
761 10:20:30.308775 => setenv initrd_high 0xffffffff
762 10:20:30.309656 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 10:20:30.314262 setenv initrd_high 0xffffffff
765 10:20:30.415840 => setenv fdt_high 0xffffffff
766 10:20:30.416739 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 10:20:30.421077 setenv fdt_high 0xffffffff
769 10:20:30.522705 => dhcp
770 10:20:30.523514 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 10:20:30.527546 dhcp
772 10:20:31.033146 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 10:20:31.033820 Speed: 1000, full duplex
774 10:20:31.034269 BOOTP broadcast 1
775 10:20:31.067228 DHCP client bound to address 192.168.6.21 (33 ms)
777 10:20:31.168959 => setenv serverip 192.168.6.2
778 10:20:31.169784 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
779 10:20:31.174332 setenv serverip 192.168.6.2
781 10:20:31.275836 => tftpboot 0x01080000 974373/tftp-deploy-09iji5xj/kernel/uImage
782 10:20:31.276594 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
783 10:20:31.283358 tftpboot 0x01080000 974373/tftp-deploy-09iji5xj/kernel/uImage
784 10:20:31.283872 Speed: 1000, full duplex
785 10:20:31.284358 Using ethernet@ff3f0000 device
786 10:20:31.288816 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 10:20:31.294559 Filename '974373/tftp-deploy-09iji5xj/kernel/uImage'.
788 10:20:31.298341 Load address: 0x1080000
789 10:20:35.355027 Loading: *#################################################
790 10:20:35.355837 TFTP error: trying to overwrite reserved memory...
792 10:20:35.357588 end: 2.4.3 bootloader-commands (duration 00:00:05) [common]
795 10:20:35.359856 end: 2.4 uboot-commands (duration 00:00:24) [common]
797 10:20:35.361654 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
799 10:20:35.363063 end: 2 uboot-action (duration 00:00:24) [common]
801 10:20:35.365168 Cleaning after the job
802 10:20:35.365859 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/ramdisk
803 10:20:35.386457 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/kernel
804 10:20:35.417664 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/dtb
805 10:20:35.418598 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/nfsrootfs
806 10:20:35.583177 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/974373/tftp-deploy-09iji5xj/modules
807 10:20:35.617209 start: 4.1 power-off (timeout 00:00:30) [common]
808 10:20:35.618041 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
809 10:20:35.652373 >> OK - accepted request
810 10:20:35.654413 Returned 0 in 0 seconds
811 10:20:35.755241 end: 4.1 power-off (duration 00:00:00) [common]
813 10:20:35.756401 start: 4.2 read-feedback (timeout 00:10:00) [common]
814 10:20:35.757186 Listened to connection for namespace 'common' for up to 1s
815 10:20:36.757436 Finalising connection for namespace 'common'
816 10:20:36.758393 Disconnecting from shell: Finalise
817 10:20:36.759024 =>
818 10:20:36.860337 end: 4.2 read-feedback (duration 00:00:01) [common]
819 10:20:36.861259 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/974373
820 10:20:38.890367 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/974373
821 10:20:38.890978 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.