Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 07:18:54.062330 lava-dispatcher, installed at version: 2024.01
2 07:18:54.063092 start: 0 validate
3 07:18:54.063563 Start time: 2024-11-12 07:18:54.063533+00:00 (UTC)
4 07:18:54.064128 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 07:18:54.064683 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 07:18:54.103797 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 07:18:54.104414 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241112%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fkernel%2FImage exists
8 07:18:54.134117 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 07:18:54.134775 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241112%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 07:18:54.167214 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 07:18:54.167782 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 07:18:54.197092 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 07:18:54.197644 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241112%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fmodules.tar.xz exists
14 07:18:54.231798 validate duration: 0.17
16 07:18:54.232667 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 07:18:54.232978 start: 1.1 download-retry (timeout 00:10:00) [common]
18 07:18:54.233278 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 07:18:54.233870 Not decompressing ramdisk as can be used compressed.
20 07:18:54.234316 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 07:18:54.234583 saving as /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/ramdisk/initrd.cpio.gz
22 07:18:54.234842 total size: 5628182 (5 MB)
23 07:18:54.268584 progress 0 % (0 MB)
24 07:18:54.273097 progress 5 % (0 MB)
25 07:18:54.278192 progress 10 % (0 MB)
26 07:18:54.282184 progress 15 % (0 MB)
27 07:18:54.286690 progress 20 % (1 MB)
28 07:18:54.290572 progress 25 % (1 MB)
29 07:18:54.294740 progress 30 % (1 MB)
30 07:18:54.298909 progress 35 % (1 MB)
31 07:18:54.302854 progress 40 % (2 MB)
32 07:18:54.307157 progress 45 % (2 MB)
33 07:18:54.311117 progress 50 % (2 MB)
34 07:18:54.315721 progress 55 % (2 MB)
35 07:18:54.320349 progress 60 % (3 MB)
36 07:18:54.324220 progress 65 % (3 MB)
37 07:18:54.328601 progress 70 % (3 MB)
38 07:18:54.332912 progress 75 % (4 MB)
39 07:18:54.337270 progress 80 % (4 MB)
40 07:18:54.341312 progress 85 % (4 MB)
41 07:18:54.345786 progress 90 % (4 MB)
42 07:18:54.350350 progress 95 % (5 MB)
43 07:18:54.353849 progress 100 % (5 MB)
44 07:18:54.354601 5 MB downloaded in 0.12 s (44.83 MB/s)
45 07:18:54.355181 end: 1.1.1 http-download (duration 00:00:00) [common]
47 07:18:54.356110 end: 1.1 download-retry (duration 00:00:00) [common]
48 07:18:54.356411 start: 1.2 download-retry (timeout 00:10:00) [common]
49 07:18:54.356684 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 07:18:54.357188 downloading http://storage.kernelci.org/next/master/next-20241112/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/kernel/Image
51 07:18:54.357484 saving as /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/kernel/Image
52 07:18:54.357732 total size: 39834112 (37 MB)
53 07:18:54.357985 No compression specified
54 07:18:54.392589 progress 0 % (0 MB)
55 07:18:54.418033 progress 5 % (1 MB)
56 07:18:54.443448 progress 10 % (3 MB)
57 07:18:54.468363 progress 15 % (5 MB)
58 07:18:54.493499 progress 20 % (7 MB)
59 07:18:54.518050 progress 25 % (9 MB)
60 07:18:54.542785 progress 30 % (11 MB)
61 07:18:54.568297 progress 35 % (13 MB)
62 07:18:54.593766 progress 40 % (15 MB)
63 07:18:54.618767 progress 45 % (17 MB)
64 07:18:54.643892 progress 50 % (19 MB)
65 07:18:54.669830 progress 55 % (20 MB)
66 07:18:54.694896 progress 60 % (22 MB)
67 07:18:54.720738 progress 65 % (24 MB)
68 07:18:54.745853 progress 70 % (26 MB)
69 07:18:54.771037 progress 75 % (28 MB)
70 07:18:54.796680 progress 80 % (30 MB)
71 07:18:54.822074 progress 85 % (32 MB)
72 07:18:54.847413 progress 90 % (34 MB)
73 07:18:54.872459 progress 95 % (36 MB)
74 07:18:54.897148 progress 100 % (37 MB)
75 07:18:54.897856 37 MB downloaded in 0.54 s (70.33 MB/s)
76 07:18:54.898337 end: 1.2.1 http-download (duration 00:00:01) [common]
78 07:18:54.899148 end: 1.2 download-retry (duration 00:00:01) [common]
79 07:18:54.899421 start: 1.3 download-retry (timeout 00:09:59) [common]
80 07:18:54.899686 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 07:18:54.900187 downloading http://storage.kernelci.org/next/master/next-20241112/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 07:18:54.900467 saving as /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/dtb/meson-g12b-a311d-libretech-cc.dtb
83 07:18:54.900674 total size: 54703 (0 MB)
84 07:18:54.900884 No compression specified
85 07:18:54.934702 progress 59 % (0 MB)
86 07:18:54.935557 progress 100 % (0 MB)
87 07:18:54.936173 0 MB downloaded in 0.04 s (1.47 MB/s)
88 07:18:54.936663 end: 1.3.1 http-download (duration 00:00:00) [common]
90 07:18:54.937478 end: 1.3 download-retry (duration 00:00:00) [common]
91 07:18:54.937740 start: 1.4 download-retry (timeout 00:09:59) [common]
92 07:18:54.938005 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 07:18:54.938458 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 07:18:54.938696 saving as /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/nfsrootfs/full.rootfs.tar
95 07:18:54.938899 total size: 107552908 (102 MB)
96 07:18:54.939109 Using unxz to decompress xz
97 07:18:54.973268 progress 0 % (0 MB)
98 07:18:55.630039 progress 5 % (5 MB)
99 07:18:56.359273 progress 10 % (10 MB)
100 07:18:57.089506 progress 15 % (15 MB)
101 07:18:57.855406 progress 20 % (20 MB)
102 07:18:58.440090 progress 25 % (25 MB)
103 07:18:59.085152 progress 30 % (30 MB)
104 07:18:59.836885 progress 35 % (35 MB)
105 07:19:00.264111 progress 40 % (41 MB)
106 07:19:00.709276 progress 45 % (46 MB)
107 07:19:01.424801 progress 50 % (51 MB)
108 07:19:02.118523 progress 55 % (56 MB)
109 07:19:02.879793 progress 60 % (61 MB)
110 07:19:03.638858 progress 65 % (66 MB)
111 07:19:04.377895 progress 70 % (71 MB)
112 07:19:05.148834 progress 75 % (76 MB)
113 07:19:05.831175 progress 80 % (82 MB)
114 07:19:06.552856 progress 85 % (87 MB)
115 07:19:07.309405 progress 90 % (92 MB)
116 07:19:08.065915 progress 95 % (97 MB)
117 07:19:08.853286 progress 100 % (102 MB)
118 07:19:08.865192 102 MB downloaded in 13.93 s (7.37 MB/s)
119 07:19:08.865818 end: 1.4.1 http-download (duration 00:00:14) [common]
121 07:19:08.866653 end: 1.4 download-retry (duration 00:00:14) [common]
122 07:19:08.866918 start: 1.5 download-retry (timeout 00:09:45) [common]
123 07:19:08.867176 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 07:19:08.867801 downloading http://storage.kernelci.org/next/master/next-20241112/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/modules.tar.xz
125 07:19:08.868176 saving as /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/modules/modules.tar
126 07:19:08.868634 total size: 11828672 (11 MB)
127 07:19:08.869093 Using unxz to decompress xz
128 07:19:08.910175 progress 0 % (0 MB)
129 07:19:08.988700 progress 5 % (0 MB)
130 07:19:09.069156 progress 10 % (1 MB)
131 07:19:09.197069 progress 15 % (1 MB)
132 07:19:09.303925 progress 20 % (2 MB)
133 07:19:09.384522 progress 25 % (2 MB)
134 07:19:09.463778 progress 30 % (3 MB)
135 07:19:09.545883 progress 35 % (3 MB)
136 07:19:09.627858 progress 40 % (4 MB)
137 07:19:09.704977 progress 45 % (5 MB)
138 07:19:09.791453 progress 50 % (5 MB)
139 07:19:09.875740 progress 55 % (6 MB)
140 07:19:09.965197 progress 60 % (6 MB)
141 07:19:10.048748 progress 65 % (7 MB)
142 07:19:10.133300 progress 70 % (7 MB)
143 07:19:10.218158 progress 75 % (8 MB)
144 07:19:10.302987 progress 80 % (9 MB)
145 07:19:10.386879 progress 85 % (9 MB)
146 07:19:10.473038 progress 90 % (10 MB)
147 07:19:10.554535 progress 95 % (10 MB)
148 07:19:10.632465 progress 100 % (11 MB)
149 07:19:10.647536 11 MB downloaded in 1.78 s (6.34 MB/s)
150 07:19:10.648312 end: 1.5.1 http-download (duration 00:00:02) [common]
152 07:19:10.650156 end: 1.5 download-retry (duration 00:00:02) [common]
153 07:19:10.650749 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 07:19:10.651319 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 07:19:20.699719 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/978308/extract-nfsrootfs-l21xbmnr
156 07:19:20.700339 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 07:19:20.700630 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 07:19:20.701363 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80
159 07:19:20.701879 makedir: /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin
160 07:19:20.702240 makedir: /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/tests
161 07:19:20.702564 makedir: /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/results
162 07:19:20.702891 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-add-keys
163 07:19:20.703415 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-add-sources
164 07:19:20.703933 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-background-process-start
165 07:19:20.704510 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-background-process-stop
166 07:19:20.705060 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-common-functions
167 07:19:20.705570 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-echo-ipv4
168 07:19:20.706064 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-install-packages
169 07:19:20.706575 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-installed-packages
170 07:19:20.707071 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-os-build
171 07:19:20.707564 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-probe-channel
172 07:19:20.708086 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-probe-ip
173 07:19:20.708603 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-target-ip
174 07:19:20.709097 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-target-mac
175 07:19:20.709616 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-target-storage
176 07:19:20.710181 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-test-case
177 07:19:20.710696 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-test-event
178 07:19:20.711204 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-test-feedback
179 07:19:20.711714 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-test-raise
180 07:19:20.712242 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-test-reference
181 07:19:20.712768 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-test-runner
182 07:19:20.713291 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-test-set
183 07:19:20.713791 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-test-shell
184 07:19:20.714297 Updating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-install-packages (oe)
185 07:19:20.714845 Updating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/bin/lava-installed-packages (oe)
186 07:19:20.715298 Creating /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/environment
187 07:19:20.715710 LAVA metadata
188 07:19:20.716003 - LAVA_JOB_ID=978308
189 07:19:20.716229 - LAVA_DISPATCHER_IP=192.168.6.2
190 07:19:20.716614 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 07:19:20.717630 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 07:19:20.717963 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 07:19:20.718173 skipped lava-vland-overlay
194 07:19:20.718416 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 07:19:20.718671 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 07:19:20.718892 skipped lava-multinode-overlay
197 07:19:20.719135 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 07:19:20.719386 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 07:19:20.719641 Loading test definitions
200 07:19:20.719926 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 07:19:20.720183 Using /lava-978308 at stage 0
202 07:19:20.721470 uuid=978308_1.6.2.4.1 testdef=None
203 07:19:20.721799 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 07:19:20.722063 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 07:19:20.724024 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 07:19:20.724853 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 07:19:20.727302 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 07:19:20.728196 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 07:19:20.730708 runner path: /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/0/tests/0_dmesg test_uuid 978308_1.6.2.4.1
212 07:19:20.731693 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 07:19:20.732522 Creating lava-test-runner.conf files
215 07:19:20.732726 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/978308/lava-overlay-33s4sf80/lava-978308/0 for stage 0
216 07:19:20.733088 - 0_dmesg
217 07:19:20.733461 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 07:19:20.733749 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 07:19:20.756572 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 07:19:20.757025 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 07:19:20.757288 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 07:19:20.757558 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 07:19:20.757822 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 07:19:21.466155 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 07:19:21.466636 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 07:19:21.466899 extracting modules file /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/978308/extract-nfsrootfs-l21xbmnr
227 07:19:22.984825 extracting modules file /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/978308/extract-overlay-ramdisk-gscyppp5/ramdisk
228 07:19:24.493597 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 07:19:24.494087 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 07:19:24.494373 [common] Applying overlay to NFS
231 07:19:24.494590 [common] Applying overlay /var/lib/lava/dispatcher/tmp/978308/compress-overlay-l8_ts9bk/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/978308/extract-nfsrootfs-l21xbmnr
232 07:19:24.528039 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 07:19:24.528503 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 07:19:24.528780 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 07:19:24.529016 Converting downloaded kernel to a uImage
236 07:19:24.529332 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/kernel/Image /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/kernel/uImage
237 07:19:24.968970 output: Image Name:
238 07:19:24.969507 output: Created: Tue Nov 12 07:19:24 2024
239 07:19:24.969767 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 07:19:24.970017 output: Data Size: 39834112 Bytes = 38900.50 KiB = 37.99 MiB
241 07:19:24.970268 output: Load Address: 01080000
242 07:19:24.970512 output: Entry Point: 01080000
243 07:19:24.970755 output:
244 07:19:24.971167 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 07:19:24.971501 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 07:19:24.971832 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 07:19:24.972197 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 07:19:24.972527 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 07:19:24.972848 Building ramdisk /var/lib/lava/dispatcher/tmp/978308/extract-overlay-ramdisk-gscyppp5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/978308/extract-overlay-ramdisk-gscyppp5/ramdisk
250 07:19:27.483039 >> 174906 blocks
251 07:19:35.188196 Adding RAMdisk u-boot header.
252 07:19:35.188667 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/978308/extract-overlay-ramdisk-gscyppp5/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/978308/extract-overlay-ramdisk-gscyppp5/ramdisk.cpio.gz.uboot
253 07:19:35.441494 output: Image Name:
254 07:19:35.441915 output: Created: Tue Nov 12 07:19:35 2024
255 07:19:35.442127 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 07:19:35.442333 output: Data Size: 24271855 Bytes = 23702.98 KiB = 23.15 MiB
257 07:19:35.442535 output: Load Address: 00000000
258 07:19:35.442733 output: Entry Point: 00000000
259 07:19:35.442929 output:
260 07:19:35.443637 rename /var/lib/lava/dispatcher/tmp/978308/extract-overlay-ramdisk-gscyppp5/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/ramdisk/ramdisk.cpio.gz.uboot
261 07:19:35.444183 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 07:19:35.444768 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 07:19:35.445345 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 07:19:35.445822 No LXC device requested
265 07:19:35.446343 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 07:19:35.446866 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 07:19:35.447365 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 07:19:35.447780 Checking files for TFTP limit of 4294967296 bytes.
269 07:19:35.450640 end: 1 tftp-deploy (duration 00:00:41) [common]
270 07:19:35.451290 start: 2 uboot-action (timeout 00:05:00) [common]
271 07:19:35.451828 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 07:19:35.452386 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 07:19:35.452897 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 07:19:35.453445 Using kernel file from prepare-kernel: 978308/tftp-deploy-jog3h3i0/kernel/uImage
275 07:19:35.454094 substitutions:
276 07:19:35.454509 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 07:19:35.454915 - {DTB_ADDR}: 0x01070000
278 07:19:35.455311 - {DTB}: 978308/tftp-deploy-jog3h3i0/dtb/meson-g12b-a311d-libretech-cc.dtb
279 07:19:35.455711 - {INITRD}: 978308/tftp-deploy-jog3h3i0/ramdisk/ramdisk.cpio.gz.uboot
280 07:19:35.456140 - {KERNEL_ADDR}: 0x01080000
281 07:19:35.456537 - {KERNEL}: 978308/tftp-deploy-jog3h3i0/kernel/uImage
282 07:19:35.456930 - {LAVA_MAC}: None
283 07:19:35.457362 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/978308/extract-nfsrootfs-l21xbmnr
284 07:19:35.457756 - {NFS_SERVER_IP}: 192.168.6.2
285 07:19:35.458145 - {PRESEED_CONFIG}: None
286 07:19:35.458535 - {PRESEED_LOCAL}: None
287 07:19:35.458919 - {RAMDISK_ADDR}: 0x08000000
288 07:19:35.459301 - {RAMDISK}: 978308/tftp-deploy-jog3h3i0/ramdisk/ramdisk.cpio.gz.uboot
289 07:19:35.459689 - {ROOT_PART}: None
290 07:19:35.460111 - {ROOT}: None
291 07:19:35.460506 - {SERVER_IP}: 192.168.6.2
292 07:19:35.460897 - {TEE_ADDR}: 0x83000000
293 07:19:35.461283 - {TEE}: None
294 07:19:35.461674 Parsed boot commands:
295 07:19:35.462051 - setenv autoload no
296 07:19:35.462435 - setenv initrd_high 0xffffffff
297 07:19:35.462821 - setenv fdt_high 0xffffffff
298 07:19:35.463207 - dhcp
299 07:19:35.463589 - setenv serverip 192.168.6.2
300 07:19:35.463972 - tftpboot 0x01080000 978308/tftp-deploy-jog3h3i0/kernel/uImage
301 07:19:35.464391 - tftpboot 0x08000000 978308/tftp-deploy-jog3h3i0/ramdisk/ramdisk.cpio.gz.uboot
302 07:19:35.464780 - tftpboot 0x01070000 978308/tftp-deploy-jog3h3i0/dtb/meson-g12b-a311d-libretech-cc.dtb
303 07:19:35.465164 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/978308/extract-nfsrootfs-l21xbmnr,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 07:19:35.465560 - bootm 0x01080000 0x08000000 0x01070000
305 07:19:35.466074 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 07:19:35.467557 start: 2.3 connect-device (timeout 00:05:00) [common]
308 07:19:35.467970 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 07:19:35.482558 Setting prompt string to ['lava-test: # ']
310 07:19:35.484119 end: 2.3 connect-device (duration 00:00:00) [common]
311 07:19:35.484712 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 07:19:35.485257 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 07:19:35.485761 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 07:19:35.486872 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 07:19:35.526108 >> OK - accepted request
316 07:19:35.528302 Returned 0 in 0 seconds
317 07:19:35.629402 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 07:19:35.630369 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 07:19:35.630670 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 07:19:35.630952 Setting prompt string to ['Hit any key to stop autoboot']
322 07:19:35.631230 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 07:19:35.632246 Trying 192.168.56.21...
324 07:19:35.632677 Connected to conserv1.
325 07:19:35.632932 Escape character is '^]'.
326 07:19:35.633182
327 07:19:35.633456 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 07:19:35.633717
329 07:19:47.439484 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 07:19:47.440182 bl2_stage_init 0x01
331 07:19:47.440640 bl2_stage_init 0x81
332 07:19:47.444985 hw id: 0x0000 - pwm id 0x01
333 07:19:47.445498 bl2_stage_init 0xc1
334 07:19:47.445936 bl2_stage_init 0x02
335 07:19:47.446364
336 07:19:47.450575 L0:00000000
337 07:19:47.451064 L1:20000703
338 07:19:47.451494 L2:00008067
339 07:19:47.451918 L3:14000000
340 07:19:47.456179 B2:00402000
341 07:19:47.456659 B1:e0f83180
342 07:19:47.457102
343 07:19:47.457533 TE: 58159
344 07:19:47.457966
345 07:19:47.461765 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 07:19:47.462251
347 07:19:47.462686 Board ID = 1
348 07:19:47.467360 Set A53 clk to 24M
349 07:19:47.467838 Set A73 clk to 24M
350 07:19:47.468309 Set clk81 to 24M
351 07:19:47.472962 A53 clk: 1200 MHz
352 07:19:47.473435 A73 clk: 1200 MHz
353 07:19:47.473864 CLK81: 166.6M
354 07:19:47.474285 smccc: 00012ab5
355 07:19:47.478565 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 07:19:47.484164 board id: 1
357 07:19:47.490050 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 07:19:47.500720 fw parse done
359 07:19:47.506706 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 07:19:47.549271 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 07:19:47.560203 PIEI prepare done
362 07:19:47.560687 fastboot data load
363 07:19:47.561119 fastboot data verify
364 07:19:47.565879 verify result: 266
365 07:19:47.571458 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 07:19:47.571939 LPDDR4 probe
367 07:19:47.572448 ddr clk to 1584MHz
368 07:19:47.579485 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 07:19:47.616739
370 07:19:47.617263 dmc_version 0001
371 07:19:47.623396 Check phy result
372 07:19:47.629270 INFO : End of CA training
373 07:19:47.629752 INFO : End of initialization
374 07:19:47.634841 INFO : Training has run successfully!
375 07:19:47.635318 Check phy result
376 07:19:47.640451 INFO : End of initialization
377 07:19:47.640933 INFO : End of read enable training
378 07:19:47.646035 INFO : End of fine write leveling
379 07:19:47.651652 INFO : End of Write leveling coarse delay
380 07:19:47.652170 INFO : Training has run successfully!
381 07:19:47.652618 Check phy result
382 07:19:47.657257 INFO : End of initialization
383 07:19:47.657753 INFO : End of read dq deskew training
384 07:19:47.662847 INFO : End of MPR read delay center optimization
385 07:19:47.668453 INFO : End of write delay center optimization
386 07:19:47.674055 INFO : End of read delay center optimization
387 07:19:47.674534 INFO : End of max read latency training
388 07:19:47.679658 INFO : Training has run successfully!
389 07:19:47.680181 1D training succeed
390 07:19:47.688825 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 07:19:47.736456 Check phy result
392 07:19:47.736975 INFO : End of initialization
393 07:19:47.758040 INFO : End of 2D read delay Voltage center optimization
394 07:19:47.778164 INFO : End of 2D read delay Voltage center optimization
395 07:19:47.830092 INFO : End of 2D write delay Voltage center optimization
396 07:19:47.879311 INFO : End of 2D write delay Voltage center optimization
397 07:19:47.884871 INFO : Training has run successfully!
398 07:19:47.885362
399 07:19:47.885814 channel==0
400 07:19:47.890466 RxClkDly_Margin_A0==88 ps 9
401 07:19:47.890948 TxDqDly_Margin_A0==98 ps 10
402 07:19:47.893802 RxClkDly_Margin_A1==88 ps 9
403 07:19:47.894285 TxDqDly_Margin_A1==98 ps 10
404 07:19:47.899383 TrainedVREFDQ_A0==74
405 07:19:47.899861 TrainedVREFDQ_A1==74
406 07:19:47.900358 VrefDac_Margin_A0==25
407 07:19:47.904989 DeviceVref_Margin_A0==40
408 07:19:47.905468 VrefDac_Margin_A1==25
409 07:19:47.910644 DeviceVref_Margin_A1==40
410 07:19:47.911149
411 07:19:47.911600
412 07:19:47.912079 channel==1
413 07:19:47.912519 RxClkDly_Margin_A0==98 ps 10
414 07:19:47.916214 TxDqDly_Margin_A0==98 ps 10
415 07:19:47.916703 RxClkDly_Margin_A1==98 ps 10
416 07:19:47.921831 TxDqDly_Margin_A1==88 ps 9
417 07:19:47.922315 TrainedVREFDQ_A0==77
418 07:19:47.922762 TrainedVREFDQ_A1==77
419 07:19:47.927397 VrefDac_Margin_A0==22
420 07:19:47.927888 DeviceVref_Margin_A0==37
421 07:19:47.932997 VrefDac_Margin_A1==22
422 07:19:47.933474 DeviceVref_Margin_A1==37
423 07:19:47.933914
424 07:19:47.938589 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 07:19:47.939070
426 07:19:47.966556 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 07:19:47.972181 2D training succeed
428 07:19:47.977810 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 07:19:47.978293 auto size-- 65535DDR cs0 size: 2048MB
430 07:19:47.983376 DDR cs1 size: 2048MB
431 07:19:47.983851 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 07:19:47.989001 cs0 DataBus test pass
433 07:19:47.989483 cs1 DataBus test pass
434 07:19:47.989927 cs0 AddrBus test pass
435 07:19:47.994592 cs1 AddrBus test pass
436 07:19:47.995068
437 07:19:47.995513 100bdlr_step_size ps== 420
438 07:19:47.995957 result report
439 07:19:48.000210 boot times 0Enable ddr reg access
440 07:19:48.007948 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 07:19:48.021382 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 07:19:48.593321 0.0;M3 CHK:0;cm4_sp_mode 0
443 07:19:48.593966 MVN_1=0x00000000
444 07:19:48.598877 MVN_2=0x00000000
445 07:19:48.604618 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 07:19:48.605124 OPS=0x10
447 07:19:48.605601 ring efuse init
448 07:19:48.606045 chipver efuse init
449 07:19:48.612875 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 07:19:48.613403 [0.018961 Inits done]
451 07:19:48.619504 secure task start!
452 07:19:48.620028 high task start!
453 07:19:48.620487 low task start!
454 07:19:48.620930 run into bl31
455 07:19:48.626994 NOTICE: BL31: v1.3(release):4fc40b1
456 07:19:48.634808 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 07:19:48.635312 NOTICE: BL31: G12A normal boot!
458 07:19:48.660204 NOTICE: BL31: BL33 decompress pass
459 07:19:48.664981 ERROR: Error initializing runtime service opteed_fast
460 07:19:49.898830
461 07:19:49.899777
462 07:19:49.907219 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 07:19:49.908018
464 07:19:49.908679 Model: Libre Computer AML-A311D-CC Alta
465 07:19:50.115797 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 07:19:50.139273 DRAM: 2 GiB (effective 3.8 GiB)
467 07:19:50.282327 Core: 408 devices, 31 uclasses, devicetree: separate
468 07:19:50.288130 WDT: Not starting watchdog@f0d0
469 07:19:50.320408 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 07:19:50.332983 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 07:19:50.337847 ** Bad device specification mmc 0 **
472 07:19:50.348193 Card did not respond to voltage select! : -110
473 07:19:50.355879 ** Bad device specification mmc 0 **
474 07:19:50.356743 Couldn't find partition mmc 0
475 07:19:50.364098 Card did not respond to voltage select! : -110
476 07:19:50.369565 ** Bad device specification mmc 0 **
477 07:19:50.370341 Couldn't find partition mmc 0
478 07:19:50.374686 Error: could not access storage.
479 07:19:51.640032 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 07:19:51.640672 bl2_stage_init 0x01
481 07:19:51.641128 bl2_stage_init 0x81
482 07:19:51.645534 hw id: 0x0000 - pwm id 0x01
483 07:19:51.646036 bl2_stage_init 0xc1
484 07:19:51.646477 bl2_stage_init 0x02
485 07:19:51.646910
486 07:19:51.651110 L0:00000000
487 07:19:51.651593 L1:20000703
488 07:19:51.652068 L2:00008067
489 07:19:51.652505 L3:14000000
490 07:19:51.653967 B2:00402000
491 07:19:51.654442 B1:e0f83180
492 07:19:51.654871
493 07:19:51.655301 TE: 58124
494 07:19:51.655731
495 07:19:51.665089 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 07:19:51.665579
497 07:19:51.666014 Board ID = 1
498 07:19:51.666440 Set A53 clk to 24M
499 07:19:51.666868 Set A73 clk to 24M
500 07:19:51.670698 Set clk81 to 24M
501 07:19:51.671179 A53 clk: 1200 MHz
502 07:19:51.671615 A73 clk: 1200 MHz
503 07:19:51.674118 CLK81: 166.6M
504 07:19:51.674599 smccc: 00012a92
505 07:19:51.679559 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 07:19:51.685221 board id: 1
507 07:19:51.689596 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 07:19:51.701226 fw parse done
509 07:19:51.706205 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 07:19:51.749021 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 07:19:51.760710 PIEI prepare done
512 07:19:51.761187 fastboot data load
513 07:19:51.761625 fastboot data verify
514 07:19:51.766308 verify result: 266
515 07:19:51.771889 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 07:19:51.772406 LPDDR4 probe
517 07:19:51.772840 ddr clk to 1584MHz
518 07:19:51.779912 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 07:19:51.817132
520 07:19:51.817610 dmc_version 0001
521 07:19:51.823855 Check phy result
522 07:19:51.829802 INFO : End of CA training
523 07:19:51.830399 INFO : End of initialization
524 07:19:51.835410 INFO : Training has run successfully!
525 07:19:51.836039 Check phy result
526 07:19:51.840975 INFO : End of initialization
527 07:19:51.841483 INFO : End of read enable training
528 07:19:51.846558 INFO : End of fine write leveling
529 07:19:51.852178 INFO : End of Write leveling coarse delay
530 07:19:51.852678 INFO : Training has run successfully!
531 07:19:51.853118 Check phy result
532 07:19:51.857748 INFO : End of initialization
533 07:19:51.858242 INFO : End of read dq deskew training
534 07:19:51.863351 INFO : End of MPR read delay center optimization
535 07:19:51.868880 INFO : End of write delay center optimization
536 07:19:51.874493 INFO : End of read delay center optimization
537 07:19:51.874985 INFO : End of max read latency training
538 07:19:51.880123 INFO : Training has run successfully!
539 07:19:51.880603 1D training succeed
540 07:19:51.889340 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 07:19:51.937093 Check phy result
542 07:19:51.937631 INFO : End of initialization
543 07:19:51.959729 INFO : End of 2D read delay Voltage center optimization
544 07:19:51.979935 INFO : End of 2D read delay Voltage center optimization
545 07:19:52.032088 INFO : End of 2D write delay Voltage center optimization
546 07:19:52.081395 INFO : End of 2D write delay Voltage center optimization
547 07:19:52.086891 INFO : Training has run successfully!
548 07:19:52.087371
549 07:19:52.087808 channel==0
550 07:19:52.092456 RxClkDly_Margin_A0==78 ps 8
551 07:19:52.092949 TxDqDly_Margin_A0==98 ps 10
552 07:19:52.098090 RxClkDly_Margin_A1==88 ps 9
553 07:19:52.098570 TxDqDly_Margin_A1==98 ps 10
554 07:19:52.099009 TrainedVREFDQ_A0==74
555 07:19:52.103712 TrainedVREFDQ_A1==74
556 07:19:52.104239 VrefDac_Margin_A0==26
557 07:19:52.104673 DeviceVref_Margin_A0==40
558 07:19:52.109355 VrefDac_Margin_A1==25
559 07:19:52.109844 DeviceVref_Margin_A1==40
560 07:19:52.110283
561 07:19:52.110713
562 07:19:52.114852 channel==1
563 07:19:52.115333 RxClkDly_Margin_A0==88 ps 9
564 07:19:52.115778 TxDqDly_Margin_A0==88 ps 9
565 07:19:52.120517 RxClkDly_Margin_A1==88 ps 9
566 07:19:52.120998 TxDqDly_Margin_A1==98 ps 10
567 07:19:52.126344 TrainedVREFDQ_A0==76
568 07:19:52.126818 TrainedVREFDQ_A1==78
569 07:19:52.127252 VrefDac_Margin_A0==23
570 07:19:52.131739 DeviceVref_Margin_A0==38
571 07:19:52.132295 VrefDac_Margin_A1==24
572 07:19:52.137231 DeviceVref_Margin_A1==36
573 07:19:52.137712
574 07:19:52.138150 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 07:19:52.138580
576 07:19:52.170873 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
577 07:19:52.171411 2D training succeed
578 07:19:52.176487 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 07:19:52.182034 auto size-- 65535DDR cs0 size: 2048MB
580 07:19:52.182516 DDR cs1 size: 2048MB
581 07:19:52.187665 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 07:19:52.188177 cs0 DataBus test pass
583 07:19:52.193245 cs1 DataBus test pass
584 07:19:52.193725 cs0 AddrBus test pass
585 07:19:52.194157 cs1 AddrBus test pass
586 07:19:52.194583
587 07:19:52.198821 100bdlr_step_size ps== 420
588 07:19:52.199315 result report
589 07:19:52.204467 boot times 0Enable ddr reg access
590 07:19:52.209618 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 07:19:52.223091 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 07:19:52.796759 0.0;M3 CHK:0;cm4_sp_mode 0
593 07:19:52.797394 MVN_1=0x00000000
594 07:19:52.802228 MVN_2=0x00000000
595 07:19:52.807977 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 07:19:52.808546 OPS=0x10
597 07:19:52.809019 ring efuse init
598 07:19:52.809497 chipver efuse init
599 07:19:52.813548 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 07:19:52.819137 [0.018961 Inits done]
601 07:19:52.819635 secure task start!
602 07:19:52.820110 high task start!
603 07:19:52.823742 low task start!
604 07:19:52.824262 run into bl31
605 07:19:52.830438 NOTICE: BL31: v1.3(release):4fc40b1
606 07:19:52.838201 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 07:19:52.838727 NOTICE: BL31: G12A normal boot!
608 07:19:52.863484 NOTICE: BL31: BL33 decompress pass
609 07:19:52.869212 ERROR: Error initializing runtime service opteed_fast
610 07:19:54.102187
611 07:19:54.102862
612 07:19:54.110485 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 07:19:54.111003
614 07:19:54.111465 Model: Libre Computer AML-A311D-CC Alta
615 07:19:54.318888 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 07:19:54.342367 DRAM: 2 GiB (effective 3.8 GiB)
617 07:19:54.485398 Core: 408 devices, 31 uclasses, devicetree: separate
618 07:19:54.491196 WDT: Not starting watchdog@f0d0
619 07:19:54.523409 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 07:19:54.535857 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 07:19:54.540866 ** Bad device specification mmc 0 **
622 07:19:54.551324 Card did not respond to voltage select! : -110
623 07:19:54.558937 ** Bad device specification mmc 0 **
624 07:19:54.559549 Couldn't find partition mmc 0
625 07:19:54.567199 Card did not respond to voltage select! : -110
626 07:19:54.572714 ** Bad device specification mmc 0 **
627 07:19:54.573243 Couldn't find partition mmc 0
628 07:19:54.577783 Error: could not access storage.
629 07:19:54.920248 Net: eth0: ethernet@ff3f0000
630 07:19:54.920863 starting USB...
631 07:19:55.172116 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 07:19:55.172685 Starting the controller
633 07:19:55.179024 USB XHCI 1.10
634 07:19:56.892155 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 07:19:56.892831 bl2_stage_init 0x01
636 07:19:56.893296 bl2_stage_init 0x81
637 07:19:56.897551 hw id: 0x0000 - pwm id 0x01
638 07:19:56.898057 bl2_stage_init 0xc1
639 07:19:56.898508 bl2_stage_init 0x02
640 07:19:56.898949
641 07:19:56.903007 L0:00000000
642 07:19:56.903503 L1:20000703
643 07:19:56.903951 L2:00008067
644 07:19:56.904449 L3:14000000
645 07:19:56.908467 B2:00402000
646 07:19:56.908958 B1:e0f83180
647 07:19:56.909404
648 07:19:56.909843 TE: 58124
649 07:19:56.910286
650 07:19:56.914292 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 07:19:56.914793
652 07:19:56.915243 Board ID = 1
653 07:19:56.919734 Set A53 clk to 24M
654 07:19:56.920260 Set A73 clk to 24M
655 07:19:56.920710 Set clk81 to 24M
656 07:19:56.925402 A53 clk: 1200 MHz
657 07:19:56.925895 A73 clk: 1200 MHz
658 07:19:56.926340 CLK81: 166.6M
659 07:19:56.926782 smccc: 00012a92
660 07:19:56.930942 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 07:19:56.936507 board id: 1
662 07:19:56.942358 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 07:19:56.952879 fw parse done
664 07:19:56.957900 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 07:19:57.001452 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 07:19:57.012385 PIEI prepare done
667 07:19:57.012880 fastboot data load
668 07:19:57.013333 fastboot data verify
669 07:19:57.018159 verify result: 266
670 07:19:57.023698 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 07:19:57.024256 LPDDR4 probe
672 07:19:57.024717 ddr clk to 1584MHz
673 07:19:57.031659 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 07:19:57.068465
675 07:19:57.068966 dmc_version 0001
676 07:19:57.075535 Check phy result
677 07:19:57.081413 INFO : End of CA training
678 07:19:57.081897 INFO : End of initialization
679 07:19:57.087085 INFO : Training has run successfully!
680 07:19:57.087575 Check phy result
681 07:19:57.092604 INFO : End of initialization
682 07:19:57.093091 INFO : End of read enable training
683 07:19:57.098222 INFO : End of fine write leveling
684 07:19:57.103808 INFO : End of Write leveling coarse delay
685 07:19:57.104324 INFO : Training has run successfully!
686 07:19:57.104778 Check phy result
687 07:19:57.109408 INFO : End of initialization
688 07:19:57.109890 INFO : End of read dq deskew training
689 07:19:57.115002 INFO : End of MPR read delay center optimization
690 07:19:57.120613 INFO : End of write delay center optimization
691 07:19:57.126297 INFO : End of read delay center optimization
692 07:19:57.126789 INFO : End of max read latency training
693 07:19:57.131801 INFO : Training has run successfully!
694 07:19:57.132331 1D training succeed
695 07:19:57.140951 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 07:19:57.188616 Check phy result
697 07:19:57.189151 INFO : End of initialization
698 07:19:57.211195 INFO : End of 2D read delay Voltage center optimization
699 07:19:57.230992 INFO : End of 2D read delay Voltage center optimization
700 07:19:57.282594 INFO : End of 2D write delay Voltage center optimization
701 07:19:57.332912 INFO : End of 2D write delay Voltage center optimization
702 07:19:57.338374 INFO : Training has run successfully!
703 07:19:57.338705
704 07:19:57.338923 channel==0
705 07:19:57.344099 RxClkDly_Margin_A0==88 ps 9
706 07:19:57.344475 TxDqDly_Margin_A0==98 ps 10
707 07:19:57.349638 RxClkDly_Margin_A1==88 ps 9
708 07:19:57.349970 TxDqDly_Margin_A1==98 ps 10
709 07:19:57.350208 TrainedVREFDQ_A0==74
710 07:19:57.355155 TrainedVREFDQ_A1==74
711 07:19:57.355475 VrefDac_Margin_A0==25
712 07:19:57.355712 DeviceVref_Margin_A0==40
713 07:19:57.360869 VrefDac_Margin_A1==25
714 07:19:57.361212 DeviceVref_Margin_A1==40
715 07:19:57.361446
716 07:19:57.361660
717 07:19:57.366374 channel==1
718 07:19:57.366698 RxClkDly_Margin_A0==98 ps 10
719 07:19:57.366931 TxDqDly_Margin_A0==98 ps 10
720 07:19:57.372000 RxClkDly_Margin_A1==98 ps 10
721 07:19:57.372319 TxDqDly_Margin_A1==98 ps 10
722 07:19:57.377541 TrainedVREFDQ_A0==77
723 07:19:57.377841 TrainedVREFDQ_A1==77
724 07:19:57.378069 VrefDac_Margin_A0==22
725 07:19:57.383149 DeviceVref_Margin_A0==37
726 07:19:57.383469 VrefDac_Margin_A1==23
727 07:19:57.388943 DeviceVref_Margin_A1==37
728 07:19:57.389639
729 07:19:57.390514 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 07:19:57.394293
731 07:19:57.422193 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000017 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 07:19:57.422606 2D training succeed
733 07:19:57.427798 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 07:19:57.433436 auto size-- 65535DDR cs0 size: 2048MB
735 07:19:57.433773 DDR cs1 size: 2048MB
736 07:19:57.439081 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 07:19:57.439407 cs0 DataBus test pass
738 07:19:57.444686 cs1 DataBus test pass
739 07:19:57.445010 cs0 AddrBus test pass
740 07:19:57.445266 cs1 AddrBus test pass
741 07:19:57.445514
742 07:19:57.450308 100bdlr_step_size ps== 420
743 07:19:57.450625 result report
744 07:19:57.455929 boot times 0Enable ddr reg access
745 07:19:57.461415 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 07:19:57.474906 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 07:19:58.048631 0.0;M3 CHK:0;cm4_sp_mode 0
748 07:19:58.049073 MVN_1=0x00000000
749 07:19:58.054055 MVN_2=0x00000000
750 07:19:58.059846 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 07:19:58.060187 OPS=0x10
752 07:19:58.060430 ring efuse init
753 07:19:58.060657 chipver efuse init
754 07:19:58.065473 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 07:19:58.071078 [0.018961 Inits done]
756 07:19:58.071365 secure task start!
757 07:19:58.071597 high task start!
758 07:19:58.075636 low task start!
759 07:19:58.075919 run into bl31
760 07:19:58.082316 NOTICE: BL31: v1.3(release):4fc40b1
761 07:19:58.090251 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 07:19:58.090849 NOTICE: BL31: G12A normal boot!
763 07:19:58.115516 NOTICE: BL31: BL33 decompress pass
764 07:19:58.121268 ERROR: Error initializing runtime service opteed_fast
765 07:19:59.354036
766 07:19:59.354489
767 07:19:59.362565 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 07:19:59.363194
769 07:19:59.363707 Model: Libre Computer AML-A311D-CC Alta
770 07:19:59.570953 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 07:19:59.594284 DRAM: 2 GiB (effective 3.8 GiB)
772 07:19:59.737305 Core: 408 devices, 31 uclasses, devicetree: separate
773 07:19:59.742131 WDT: Not starting watchdog@f0d0
774 07:19:59.775403 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 07:19:59.787859 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 07:19:59.791890 ** Bad device specification mmc 0 **
777 07:19:59.803230 Card did not respond to voltage select! : -110
778 07:19:59.810770 ** Bad device specification mmc 0 **
779 07:19:59.811407 Couldn't find partition mmc 0
780 07:19:59.819134 Card did not respond to voltage select! : -110
781 07:19:59.824628 ** Bad device specification mmc 0 **
782 07:19:59.825256 Couldn't find partition mmc 0
783 07:19:59.829690 Error: could not access storage.
784 07:20:00.172146 Net: eth0: ethernet@ff3f0000
785 07:20:00.172897 starting USB...
786 07:20:00.423975 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 07:20:00.424737 Starting the controller
788 07:20:00.430936 USB XHCI 1.10
789 07:20:02.611610 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
790 07:20:02.612261 bl2_stage_init 0x81
791 07:20:02.617162 hw id: 0x0000 - pwm id 0x01
792 07:20:02.617690 bl2_stage_init 0xc1
793 07:20:02.618128 bl2_stage_init 0x02
794 07:20:02.618551
795 07:20:02.622727 L0:00000000
796 07:20:02.623087 L1:20000703
797 07:20:02.623364 L2:00008067
798 07:20:02.623622 L3:14000000
799 07:20:02.623890 B2:00402000
800 07:20:02.628326 B1:e0f83180
801 07:20:02.628691
802 07:20:02.628972 TE: 58150
803 07:20:02.629243
804 07:20:02.634011 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 07:20:02.634363
806 07:20:02.634639 Board ID = 1
807 07:20:02.639537 Set A53 clk to 24M
808 07:20:02.639883 Set A73 clk to 24M
809 07:20:02.640478 Set clk81 to 24M
810 07:20:02.645198 A53 clk: 1200 MHz
811 07:20:02.645715 A73 clk: 1200 MHz
812 07:20:02.646158 CLK81: 166.6M
813 07:20:02.646590 smccc: 00012aac
814 07:20:02.650794 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 07:20:02.656325 board id: 1
816 07:20:02.661145 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 07:20:02.672807 fw parse done
818 07:20:02.677912 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 07:20:02.720471 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 07:20:02.732329 PIEI prepare done
821 07:20:02.732864 fastboot data load
822 07:20:02.733307 fastboot data verify
823 07:20:02.738083 verify result: 266
824 07:20:02.743590 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 07:20:02.744146 LPDDR4 probe
826 07:20:02.744591 ddr clk to 1584MHz
827 07:20:02.750599 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 07:20:02.787906
829 07:20:02.788467 dmc_version 0001
830 07:20:02.794551 Check phy result
831 07:20:02.801361 INFO : End of CA training
832 07:20:02.801871 INFO : End of initialization
833 07:20:02.806954 INFO : Training has run successfully!
834 07:20:02.807465 Check phy result
835 07:20:02.812603 INFO : End of initialization
836 07:20:02.813113 INFO : End of read enable training
837 07:20:02.818168 INFO : End of fine write leveling
838 07:20:02.823836 INFO : End of Write leveling coarse delay
839 07:20:02.824379 INFO : Training has run successfully!
840 07:20:02.824823 Check phy result
841 07:20:02.829338 INFO : End of initialization
842 07:20:02.829846 INFO : End of read dq deskew training
843 07:20:02.834997 INFO : End of MPR read delay center optimization
844 07:20:02.840543 INFO : End of write delay center optimization
845 07:20:02.846138 INFO : End of read delay center optimization
846 07:20:02.846647 INFO : End of max read latency training
847 07:20:02.851830 INFO : Training has run successfully!
848 07:20:02.852393 1D training succeed
849 07:20:02.860013 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 07:20:02.908280 Check phy result
851 07:20:02.908810 INFO : End of initialization
852 07:20:02.930182 INFO : End of 2D read delay Voltage center optimization
853 07:20:02.950493 INFO : End of 2D read delay Voltage center optimization
854 07:20:03.002706 INFO : End of 2D write delay Voltage center optimization
855 07:20:03.052956 INFO : End of 2D write delay Voltage center optimization
856 07:20:03.058545 INFO : Training has run successfully!
857 07:20:03.059132
858 07:20:03.059574 channel==0
859 07:20:03.064160 RxClkDly_Margin_A0==78 ps 8
860 07:20:03.064750 TxDqDly_Margin_A0==98 ps 10
861 07:20:03.067378 RxClkDly_Margin_A1==88 ps 9
862 07:20:03.067940 TxDqDly_Margin_A1==98 ps 10
863 07:20:03.073027 TrainedVREFDQ_A0==74
864 07:20:03.073598 TrainedVREFDQ_A1==74
865 07:20:03.078545 VrefDac_Margin_A0==25
866 07:20:03.079110 DeviceVref_Margin_A0==40
867 07:20:03.079548 VrefDac_Margin_A1==25
868 07:20:03.084162 DeviceVref_Margin_A1==40
869 07:20:03.084731
870 07:20:03.085167
871 07:20:03.085593 channel==1
872 07:20:03.086014 RxClkDly_Margin_A0==98 ps 10
873 07:20:03.087501 TxDqDly_Margin_A0==98 ps 10
874 07:20:03.093030 RxClkDly_Margin_A1==88 ps 9
875 07:20:03.093571 TxDqDly_Margin_A1==88 ps 9
876 07:20:03.094007 TrainedVREFDQ_A0==77
877 07:20:03.098620 TrainedVREFDQ_A1==77
878 07:20:03.099164 VrefDac_Margin_A0==22
879 07:20:03.104271 DeviceVref_Margin_A0==37
880 07:20:03.104806 VrefDac_Margin_A1==24
881 07:20:03.105239 DeviceVref_Margin_A1==37
882 07:20:03.105664
883 07:20:03.109862 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 07:20:03.110394
885 07:20:03.143401 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
886 07:20:03.144022 2D training succeed
887 07:20:03.149054 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 07:20:03.154683 auto size-- 65535DDR cs0 size: 2048MB
889 07:20:03.155253 DDR cs1 size: 2048MB
890 07:20:03.160273 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 07:20:03.160821 cs0 DataBus test pass
892 07:20:03.161261 cs1 DataBus test pass
893 07:20:03.165812 cs0 AddrBus test pass
894 07:20:03.166350 cs1 AddrBus test pass
895 07:20:03.166781
896 07:20:03.171474 100bdlr_step_size ps== 420
897 07:20:03.172047 result report
898 07:20:03.172485 boot times 0Enable ddr reg access
899 07:20:03.180463 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 07:20:03.193983 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 07:20:03.768465 0.0;M3 CHK:0;cm4_sp_mode 0
902 07:20:03.769119 MVN_1=0x00000000
903 07:20:03.774048 MVN_2=0x00000000
904 07:20:03.779765 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 07:20:03.780374 OPS=0x10
906 07:20:03.780848 ring efuse init
907 07:20:03.781296 chipver efuse init
908 07:20:03.788041 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 07:20:03.788611 [0.018961 Inits done]
910 07:20:03.794644 secure task start!
911 07:20:03.795195 high task start!
912 07:20:03.795660 low task start!
913 07:20:03.796151 run into bl31
914 07:20:03.802280 NOTICE: BL31: v1.3(release):4fc40b1
915 07:20:03.809102 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 07:20:03.809664 NOTICE: BL31: G12A normal boot!
917 07:20:03.835385 NOTICE: BL31: BL33 decompress pass
918 07:20:03.840181 ERROR: Error initializing runtime service opteed_fast
919 07:20:05.073933
920 07:20:05.074604
921 07:20:05.082407 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 07:20:05.082966
923 07:20:05.083441 Model: Libre Computer AML-A311D-CC Alta
924 07:20:05.290726 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 07:20:05.314181 DRAM: 2 GiB (effective 3.8 GiB)
926 07:20:05.457125 Core: 408 devices, 31 uclasses, devicetree: separate
927 07:20:05.462999 WDT: Not starting watchdog@f0d0
928 07:20:05.495255 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 07:20:05.507684 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 07:20:05.512689 ** Bad device specification mmc 0 **
931 07:20:05.523036 Card did not respond to voltage select! : -110
932 07:20:05.530685 ** Bad device specification mmc 0 **
933 07:20:05.531230 Couldn't find partition mmc 0
934 07:20:05.539045 Card did not respond to voltage select! : -110
935 07:20:05.544558 ** Bad device specification mmc 0 **
936 07:20:05.545099 Couldn't find partition mmc 0
937 07:20:05.549608 Error: could not access storage.
938 07:20:05.892074 Net: eth0: ethernet@ff3f0000
939 07:20:05.892688 starting USB...
940 07:20:06.143896 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 07:20:06.144559 Starting the controller
942 07:20:06.150906 USB XHCI 1.10
943 07:20:07.705074 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 07:20:07.713428 scanning usb for storage devices... 0 Storage Device(s) found
946 07:20:07.765160 Hit any key to stop autoboot: 1
947 07:20:07.766004 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 07:20:07.766822 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 07:20:07.767372 Setting prompt string to ['=>']
950 07:20:07.767918 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 07:20:07.780933 0
952 07:20:07.781903 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 07:20:07.782458 Sending with 10 millisecond of delay
955 07:20:08.917223 => setenv autoload no
956 07:20:08.928084 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 07:20:08.933422 setenv autoload no
958 07:20:08.934203 Sending with 10 millisecond of delay
960 07:20:10.731017 => setenv initrd_high 0xffffffff
961 07:20:10.741819 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 07:20:10.742748 setenv initrd_high 0xffffffff
963 07:20:10.743520 Sending with 10 millisecond of delay
965 07:20:12.362050 => setenv fdt_high 0xffffffff
966 07:20:12.372874 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 07:20:12.373823 setenv fdt_high 0xffffffff
968 07:20:12.374599 Sending with 10 millisecond of delay
970 07:20:12.666486 => dhcp
971 07:20:12.677213 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 07:20:12.678092 dhcp
973 07:20:12.678573 Speed: 1000, full duplex
974 07:20:12.679027 BOOTP broadcast 1
975 07:20:12.685566 DHCP client bound to address 192.168.6.27 (8 ms)
976 07:20:12.686352 Sending with 10 millisecond of delay
978 07:20:14.362775 => setenv serverip 192.168.6.2
979 07:20:14.373628 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 07:20:14.374637 setenv serverip 192.168.6.2
981 07:20:14.375382 Sending with 10 millisecond of delay
983 07:20:18.098676 => tftpboot 0x01080000 978308/tftp-deploy-jog3h3i0/kernel/uImage
984 07:20:18.109510 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
985 07:20:18.110436 tftpboot 0x01080000 978308/tftp-deploy-jog3h3i0/kernel/uImage
986 07:20:18.110926 Speed: 1000, full duplex
987 07:20:18.111380 Using ethernet@ff3f0000 device
988 07:20:18.112305 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 07:20:18.117731 Filename '978308/tftp-deploy-jog3h3i0/kernel/uImage'.
990 07:20:18.121547 Load address: 0x1080000
991 07:20:18.989064 Loading: *################# UDP wrong checksum 000000ff 00001049
992 07:20:19.027170 # UDP wrong checksum 000000ff 0000a03b
993 07:20:20.573068 ################################ 38 MiB
994 07:20:20.573673 15.5 MiB/s
995 07:20:20.574141 done
996 07:20:20.577462 Bytes transferred = 39834176 (25fd240 hex)
997 07:20:20.578311 Sending with 10 millisecond of delay
999 07:20:25.267705 => tftpboot 0x08000000 978308/tftp-deploy-jog3h3i0/ramdisk/ramdisk.cpio.gz.uboot
1000 07:20:25.278501 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1001 07:20:25.279297 tftpboot 0x08000000 978308/tftp-deploy-jog3h3i0/ramdisk/ramdisk.cpio.gz.uboot
1002 07:20:25.279743 Speed: 1000, full duplex
1003 07:20:25.280196 Using ethernet@ff3f0000 device
1004 07:20:25.280989 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1005 07:20:25.292789 Filename '978308/tftp-deploy-jog3h3i0/ramdisk/ramdisk.cpio.gz.uboot'.
1006 07:20:25.293273 Load address: 0x8000000
1007 07:20:25.834933 Loading: * UDP wrong checksum 000000ff 0000e422
1008 07:20:25.844373 UDP wrong checksum 000000ff 00007215
1009 07:20:32.278575 T ################################################# UDP wrong checksum 00000005 00006162
1010 07:20:37.280101 T UDP wrong checksum 00000005 00006162
1011 07:20:47.281957 T T UDP wrong checksum 00000005 00006162
1012 07:21:07.285173 T T T UDP wrong checksum 00000005 00006162
1013 07:21:09.079643 T UDP wrong checksum 000000ff 0000ad1f
1014 07:21:09.092323 UDP wrong checksum 000000ff 00003612
1015 07:21:22.291208 T T
1016 07:21:22.291857 Retry count exceeded; starting again
1018 07:21:22.293359 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1021 07:21:22.295250 end: 2.4 uboot-commands (duration 00:01:47) [common]
1023 07:21:22.296722 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1025 07:21:22.297714 end: 2 uboot-action (duration 00:01:47) [common]
1027 07:21:22.299192 Cleaning after the job
1028 07:21:22.299727 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/ramdisk
1029 07:21:22.300921 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/kernel
1030 07:21:22.322562 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/dtb
1031 07:21:22.323433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/nfsrootfs
1032 07:21:22.470607 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978308/tftp-deploy-jog3h3i0/modules
1033 07:21:22.491536 start: 4.1 power-off (timeout 00:00:30) [common]
1034 07:21:22.492288 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1035 07:21:22.526862 >> OK - accepted request
1036 07:21:22.528985 Returned 0 in 0 seconds
1037 07:21:22.629734 end: 4.1 power-off (duration 00:00:00) [common]
1039 07:21:22.630743 start: 4.2 read-feedback (timeout 00:10:00) [common]
1040 07:21:22.631389 Listened to connection for namespace 'common' for up to 1s
1041 07:21:23.632342 Finalising connection for namespace 'common'
1042 07:21:23.632844 Disconnecting from shell: Finalise
1043 07:21:23.633123 =>
1044 07:21:23.733776 end: 4.2 read-feedback (duration 00:00:01) [common]
1045 07:21:23.734156 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/978308
1046 07:21:25.403182 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/978308
1047 07:21:25.403815 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.