Boot log: meson-sm1-s905d3-libretech-cc

    1 07:30:15.023578  lava-dispatcher, installed at version: 2024.01
    2 07:30:15.024462  start: 0 validate
    3 07:30:15.024950  Start time: 2024-11-12 07:30:15.024919+00:00 (UTC)
    4 07:30:15.025534  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 07:30:15.026067  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 07:30:15.060939  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 07:30:15.061499  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241112%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fkernel%2FImage exists
    8 07:30:15.093019  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 07:30:15.093709  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241112%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 07:30:15.122767  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 07:30:15.123256  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 07:30:15.157068  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 07:30:15.157708  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241112%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fmodules.tar.xz exists
   14 07:30:15.194827  validate duration: 0.17
   16 07:30:15.195906  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 07:30:15.196374  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 07:30:15.196767  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 07:30:15.197519  Not decompressing ramdisk as can be used compressed.
   20 07:30:15.198090  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
   21 07:30:15.198438  saving as /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/ramdisk/initrd.cpio.gz
   22 07:30:15.198786  total size: 5628182 (5 MB)
   23 07:30:15.234564  progress   0 % (0 MB)
   24 07:30:15.239794  progress   5 % (0 MB)
   25 07:30:15.245083  progress  10 % (0 MB)
   26 07:30:15.249669  progress  15 % (0 MB)
   27 07:30:15.254824  progress  20 % (1 MB)
   28 07:30:15.259431  progress  25 % (1 MB)
   29 07:30:15.264617  progress  30 % (1 MB)
   30 07:30:15.269652  progress  35 % (1 MB)
   31 07:30:15.274254  progress  40 % (2 MB)
   32 07:30:15.279302  progress  45 % (2 MB)
   33 07:30:15.283732  progress  50 % (2 MB)
   34 07:30:15.288642  progress  55 % (2 MB)
   35 07:30:15.293611  progress  60 % (3 MB)
   36 07:30:15.298051  progress  65 % (3 MB)
   37 07:30:15.303075  progress  70 % (3 MB)
   38 07:30:15.307921  progress  75 % (4 MB)
   39 07:30:15.313518  progress  80 % (4 MB)
   40 07:30:15.318362  progress  85 % (4 MB)
   41 07:30:15.323561  progress  90 % (4 MB)
   42 07:30:15.328693  progress  95 % (5 MB)
   43 07:30:15.332984  progress 100 % (5 MB)
   44 07:30:15.333871  5 MB downloaded in 0.14 s (39.74 MB/s)
   45 07:30:15.334739  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 07:30:15.335958  end: 1.1 download-retry (duration 00:00:00) [common]
   48 07:30:15.336421  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 07:30:15.336804  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 07:30:15.337452  downloading http://storage.kernelci.org/next/master/next-20241112/arm64/defconfig+kselftest/gcc-12/kernel/Image
   51 07:30:15.337783  saving as /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/kernel/Image
   52 07:30:15.338064  total size: 66982400 (63 MB)
   53 07:30:15.338352  No compression specified
   54 07:30:15.373699  progress   0 % (0 MB)
   55 07:30:15.416498  progress   5 % (3 MB)
   56 07:30:15.458114  progress  10 % (6 MB)
   57 07:30:15.500426  progress  15 % (9 MB)
   58 07:30:15.541826  progress  20 % (12 MB)
   59 07:30:15.584661  progress  25 % (16 MB)
   60 07:30:15.626207  progress  30 % (19 MB)
   61 07:30:15.667494  progress  35 % (22 MB)
   62 07:30:15.708797  progress  40 % (25 MB)
   63 07:30:15.750589  progress  45 % (28 MB)
   64 07:30:15.793489  progress  50 % (31 MB)
   65 07:30:15.835533  progress  55 % (35 MB)
   66 07:30:15.877883  progress  60 % (38 MB)
   67 07:30:15.920902  progress  65 % (41 MB)
   68 07:30:15.963053  progress  70 % (44 MB)
   69 07:30:16.006068  progress  75 % (47 MB)
   70 07:30:16.048490  progress  80 % (51 MB)
   71 07:30:16.092285  progress  85 % (54 MB)
   72 07:30:16.134178  progress  90 % (57 MB)
   73 07:30:16.175713  progress  95 % (60 MB)
   74 07:30:16.217762  progress 100 % (63 MB)
   75 07:30:16.218330  63 MB downloaded in 0.88 s (72.57 MB/s)
   76 07:30:16.218815  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 07:30:16.219646  end: 1.2 download-retry (duration 00:00:01) [common]
   79 07:30:16.219921  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 07:30:16.220230  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 07:30:16.220713  downloading http://storage.kernelci.org/next/master/next-20241112/arm64/defconfig+kselftest/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 07:30:16.220980  saving as /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 07:30:16.221189  total size: 53209 (0 MB)
   84 07:30:16.221400  No compression specified
   85 07:30:16.261012  progress  61 % (0 MB)
   86 07:30:16.261861  progress 100 % (0 MB)
   87 07:30:16.262421  0 MB downloaded in 0.04 s (1.23 MB/s)
   88 07:30:16.262917  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 07:30:16.263750  end: 1.3 download-retry (duration 00:00:00) [common]
   91 07:30:16.264052  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 07:30:16.264371  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 07:30:16.264912  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
   94 07:30:16.265202  saving as /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/nfsrootfs/full.rootfs.tar
   95 07:30:16.265445  total size: 107552908 (102 MB)
   96 07:30:16.265683  Using unxz to decompress xz
   97 07:30:16.299636  progress   0 % (0 MB)
   98 07:30:16.948907  progress   5 % (5 MB)
   99 07:30:17.676281  progress  10 % (10 MB)
  100 07:30:18.402731  progress  15 % (15 MB)
  101 07:30:19.162247  progress  20 % (20 MB)
  102 07:30:19.731489  progress  25 % (25 MB)
  103 07:30:20.383523  progress  30 % (30 MB)
  104 07:30:21.122218  progress  35 % (35 MB)
  105 07:30:21.467014  progress  40 % (41 MB)
  106 07:30:21.891752  progress  45 % (46 MB)
  107 07:30:22.586807  progress  50 % (51 MB)
  108 07:30:23.286265  progress  55 % (56 MB)
  109 07:30:24.059566  progress  60 % (61 MB)
  110 07:30:24.833090  progress  65 % (66 MB)
  111 07:30:25.600956  progress  70 % (71 MB)
  112 07:30:26.488097  progress  75 % (76 MB)
  113 07:30:27.169100  progress  80 % (82 MB)
  114 07:30:27.882327  progress  85 % (87 MB)
  115 07:30:28.620784  progress  90 % (92 MB)
  116 07:30:29.337379  progress  95 % (97 MB)
  117 07:30:30.080107  progress 100 % (102 MB)
  118 07:30:30.091919  102 MB downloaded in 13.83 s (7.42 MB/s)
  119 07:30:30.092888  end: 1.4.1 http-download (duration 00:00:14) [common]
  121 07:30:30.094717  end: 1.4 download-retry (duration 00:00:14) [common]
  122 07:30:30.095304  start: 1.5 download-retry (timeout 00:09:45) [common]
  123 07:30:30.095886  start: 1.5.1 http-download (timeout 00:09:45) [common]
  124 07:30:30.097158  downloading http://storage.kernelci.org/next/master/next-20241112/arm64/defconfig+kselftest/gcc-12/modules.tar.xz
  125 07:30:30.097727  saving as /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/modules/modules.tar
  126 07:30:30.098208  total size: 16284560 (15 MB)
  127 07:30:30.098721  Using unxz to decompress xz
  128 07:30:30.144900  progress   0 % (0 MB)
  129 07:30:30.254624  progress   5 % (0 MB)
  130 07:30:30.367082  progress  10 % (1 MB)
  131 07:30:30.488626  progress  15 % (2 MB)
  132 07:30:30.617399  progress  20 % (3 MB)
  133 07:30:30.761173  progress  25 % (3 MB)
  134 07:30:30.871610  progress  30 % (4 MB)
  135 07:30:30.978185  progress  35 % (5 MB)
  136 07:30:31.092682  progress  40 % (6 MB)
  137 07:30:31.199358  progress  45 % (7 MB)
  138 07:30:31.315786  progress  50 % (7 MB)
  139 07:30:31.429783  progress  55 % (8 MB)
  140 07:30:31.547548  progress  60 % (9 MB)
  141 07:30:31.662493  progress  65 % (10 MB)
  142 07:30:31.770621  progress  70 % (10 MB)
  143 07:30:31.887403  progress  75 % (11 MB)
  144 07:30:32.004843  progress  80 % (12 MB)
  145 07:30:32.120670  progress  85 % (13 MB)
  146 07:30:32.233363  progress  90 % (14 MB)
  147 07:30:32.338273  progress  95 % (14 MB)
  148 07:30:32.452433  progress 100 % (15 MB)
  149 07:30:32.466785  15 MB downloaded in 2.37 s (6.56 MB/s)
  150 07:30:32.467401  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 07:30:32.468635  end: 1.5 download-retry (duration 00:00:02) [common]
  153 07:30:32.469242  start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
  154 07:30:32.469819  start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
  155 07:30:43.331280  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/978420/extract-nfsrootfs-ialsa970
  156 07:30:43.331888  end: 1.6.1 extract-nfsrootfs (duration 00:00:11) [common]
  157 07:30:43.332237  start: 1.6.2 lava-overlay (timeout 00:09:32) [common]
  158 07:30:43.332959  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola
  159 07:30:43.333432  makedir: /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin
  160 07:30:43.333769  makedir: /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/tests
  161 07:30:43.334088  makedir: /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/results
  162 07:30:43.334427  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-add-keys
  163 07:30:43.334997  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-add-sources
  164 07:30:43.335570  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-background-process-start
  165 07:30:43.336140  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-background-process-stop
  166 07:30:43.336733  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-common-functions
  167 07:30:43.337248  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-echo-ipv4
  168 07:30:43.337749  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-install-packages
  169 07:30:43.338317  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-installed-packages
  170 07:30:43.338956  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-os-build
  171 07:30:43.339565  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-probe-channel
  172 07:30:43.340214  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-probe-ip
  173 07:30:43.340876  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-target-ip
  174 07:30:43.341524  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-target-mac
  175 07:30:43.342181  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-target-storage
  176 07:30:43.342825  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-test-case
  177 07:30:43.343438  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-test-event
  178 07:30:43.344022  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-test-feedback
  179 07:30:43.344549  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-test-raise
  180 07:30:43.345069  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-test-reference
  181 07:30:43.345567  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-test-runner
  182 07:30:43.346069  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-test-set
  183 07:30:43.346560  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-test-shell
  184 07:30:43.347059  Updating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-install-packages (oe)
  185 07:30:43.347612  Updating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/bin/lava-installed-packages (oe)
  186 07:30:43.348109  Creating /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/environment
  187 07:30:43.348514  LAVA metadata
  188 07:30:43.348784  - LAVA_JOB_ID=978420
  189 07:30:43.349007  - LAVA_DISPATCHER_IP=192.168.6.2
  190 07:30:43.349395  start: 1.6.2.1 ssh-authorize (timeout 00:09:32) [common]
  191 07:30:43.350476  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 07:30:43.350826  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:32) [common]
  193 07:30:43.351040  skipped lava-vland-overlay
  194 07:30:43.351287  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 07:30:43.351545  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:32) [common]
  196 07:30:43.351769  skipped lava-multinode-overlay
  197 07:30:43.352042  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 07:30:43.352307  start: 1.6.2.4 test-definition (timeout 00:09:32) [common]
  199 07:30:43.352571  Loading test definitions
  200 07:30:43.352859  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:32) [common]
  201 07:30:43.353088  Using /lava-978420 at stage 0
  202 07:30:43.354357  uuid=978420_1.6.2.4.1 testdef=None
  203 07:30:43.354708  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 07:30:43.354987  start: 1.6.2.4.2 test-overlay (timeout 00:09:32) [common]
  205 07:30:43.356947  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 07:30:43.357771  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:32) [common]
  208 07:30:43.360159  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 07:30:43.361033  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:32) [common]
  211 07:30:43.363345  runner path: /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/0/tests/0_dmesg test_uuid 978420_1.6.2.4.1
  212 07:30:43.363971  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 07:30:43.364789  Creating lava-test-runner.conf files
  215 07:30:43.364996  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/978420/lava-overlay-426gjola/lava-978420/0 for stage 0
  216 07:30:43.365358  - 0_dmesg
  217 07:30:43.365726  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 07:30:43.366010  start: 1.6.2.5 compress-overlay (timeout 00:09:32) [common]
  219 07:30:43.388549  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 07:30:43.389059  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:32) [common]
  221 07:30:43.389334  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 07:30:43.389612  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 07:30:43.389881  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
  224 07:30:44.050773  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 07:30:44.051328  start: 1.6.4 extract-modules (timeout 00:09:31) [common]
  226 07:30:44.051583  extracting modules file /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/978420/extract-nfsrootfs-ialsa970
  227 07:30:45.656088  extracting modules file /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/978420/extract-overlay-ramdisk-oegzgl6h/ramdisk
  228 07:30:47.263750  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 07:30:47.264252  start: 1.6.5 apply-overlay-tftp (timeout 00:09:28) [common]
  230 07:30:47.264532  [common] Applying overlay to NFS
  231 07:30:47.264746  [common] Applying overlay /var/lib/lava/dispatcher/tmp/978420/compress-overlay-gdz0r7nc/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/978420/extract-nfsrootfs-ialsa970
  232 07:30:47.295015  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 07:30:47.295394  start: 1.6.6 prepare-kernel (timeout 00:09:28) [common]
  234 07:30:47.295667  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:28) [common]
  235 07:30:47.295894  Converting downloaded kernel to a uImage
  236 07:30:47.296236  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/kernel/Image /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/kernel/uImage
  237 07:30:48.005574  output: Image Name:   
  238 07:30:48.006000  output: Created:      Tue Nov 12 07:30:47 2024
  239 07:30:48.006217  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 07:30:48.006427  output: Data Size:    66982400 Bytes = 65412.50 KiB = 63.88 MiB
  241 07:30:48.006635  output: Load Address: 01080000
  242 07:30:48.006842  output: Entry Point:  01080000
  243 07:30:48.007041  output: 
  244 07:30:48.007383  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
  245 07:30:48.007656  end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
  246 07:30:48.007926  start: 1.6.7 configure-preseed-file (timeout 00:09:27) [common]
  247 07:30:48.008237  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 07:30:48.008506  start: 1.6.8 compress-ramdisk (timeout 00:09:27) [common]
  249 07:30:48.008768  Building ramdisk /var/lib/lava/dispatcher/tmp/978420/extract-overlay-ramdisk-oegzgl6h/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/978420/extract-overlay-ramdisk-oegzgl6h/ramdisk
  250 07:30:51.561097  >> 243541 blocks

  251 07:31:01.894009  Adding RAMdisk u-boot header.
  252 07:31:01.894434  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/978420/extract-overlay-ramdisk-oegzgl6h/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/978420/extract-overlay-ramdisk-oegzgl6h/ramdisk.cpio.gz.uboot
  253 07:31:02.292348  output: Image Name:   
  254 07:31:02.292764  output: Created:      Tue Nov 12 07:31:01 2024
  255 07:31:02.292978  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 07:31:02.293186  output: Data Size:    31329448 Bytes = 30595.16 KiB = 29.88 MiB
  257 07:31:02.293389  output: Load Address: 00000000
  258 07:31:02.293589  output: Entry Point:  00000000
  259 07:31:02.293789  output: 
  260 07:31:02.294530  rename /var/lib/lava/dispatcher/tmp/978420/extract-overlay-ramdisk-oegzgl6h/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/ramdisk/ramdisk.cpio.gz.uboot
  261 07:31:02.294980  end: 1.6.8 compress-ramdisk (duration 00:00:14) [common]
  262 07:31:02.295277  end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
  263 07:31:02.295581  start: 1.7 lxc-create-udev-rule-action (timeout 00:09:13) [common]
  264 07:31:02.295824  No LXC device requested
  265 07:31:02.296253  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 07:31:02.296832  start: 1.8 deploy-device-env (timeout 00:09:13) [common]
  267 07:31:02.297384  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 07:31:02.297838  Checking files for TFTP limit of 4294967296 bytes.
  269 07:31:02.300804  end: 1 tftp-deploy (duration 00:00:47) [common]
  270 07:31:02.301435  start: 2 uboot-action (timeout 00:05:00) [common]
  271 07:31:02.302013  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 07:31:02.302569  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 07:31:02.303153  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 07:31:02.303741  Using kernel file from prepare-kernel: 978420/tftp-deploy-wm_8tzhi/kernel/uImage
  275 07:31:02.304478  substitutions:
  276 07:31:02.304933  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 07:31:02.305382  - {DTB_ADDR}: 0x01070000
  278 07:31:02.305825  - {DTB}: 978420/tftp-deploy-wm_8tzhi/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 07:31:02.306276  - {INITRD}: 978420/tftp-deploy-wm_8tzhi/ramdisk/ramdisk.cpio.gz.uboot
  280 07:31:02.306720  - {KERNEL_ADDR}: 0x01080000
  281 07:31:02.307157  - {KERNEL}: 978420/tftp-deploy-wm_8tzhi/kernel/uImage
  282 07:31:02.307597  - {LAVA_MAC}: None
  283 07:31:02.308111  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/978420/extract-nfsrootfs-ialsa970
  284 07:31:02.308564  - {NFS_SERVER_IP}: 192.168.6.2
  285 07:31:02.309008  - {PRESEED_CONFIG}: None
  286 07:31:02.309446  - {PRESEED_LOCAL}: None
  287 07:31:02.309875  - {RAMDISK_ADDR}: 0x08000000
  288 07:31:02.310305  - {RAMDISK}: 978420/tftp-deploy-wm_8tzhi/ramdisk/ramdisk.cpio.gz.uboot
  289 07:31:02.310739  - {ROOT_PART}: None
  290 07:31:02.311172  - {ROOT}: None
  291 07:31:02.311607  - {SERVER_IP}: 192.168.6.2
  292 07:31:02.312062  - {TEE_ADDR}: 0x83000000
  293 07:31:02.312497  - {TEE}: None
  294 07:31:02.312929  Parsed boot commands:
  295 07:31:02.313350  - setenv autoload no
  296 07:31:02.313784  - setenv initrd_high 0xffffffff
  297 07:31:02.314213  - setenv fdt_high 0xffffffff
  298 07:31:02.314642  - dhcp
  299 07:31:02.315071  - setenv serverip 192.168.6.2
  300 07:31:02.315497  - tftpboot 0x01080000 978420/tftp-deploy-wm_8tzhi/kernel/uImage
  301 07:31:02.315926  - tftpboot 0x08000000 978420/tftp-deploy-wm_8tzhi/ramdisk/ramdisk.cpio.gz.uboot
  302 07:31:02.316386  - tftpboot 0x01070000 978420/tftp-deploy-wm_8tzhi/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 07:31:02.316821  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/978420/extract-nfsrootfs-ialsa970,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 07:31:02.317332  - bootm 0x01080000 0x08000000 0x01070000
  305 07:31:02.317946  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 07:31:02.319608  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 07:31:02.320109  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 07:31:02.335609  Setting prompt string to ['lava-test: # ']
  310 07:31:02.337308  end: 2.3 connect-device (duration 00:00:00) [common]
  311 07:31:02.337963  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 07:31:02.338575  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 07:31:02.339157  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 07:31:02.340429  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 07:31:02.378867  >> OK - accepted request

  316 07:31:02.381493  Returned 0 in 0 seconds
  317 07:31:02.482817  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 07:31:02.484701  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 07:31:02.485321  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 07:31:02.485897  Setting prompt string to ['Hit any key to stop autoboot']
  322 07:31:02.486405  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 07:31:02.488144  Trying 192.168.56.21...
  324 07:31:02.488726  Connected to conserv1.
  325 07:31:02.489221  Escape character is '^]'.
  326 07:31:02.489686  
  327 07:31:02.490154  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  328 07:31:02.490630  
  329 07:31:09.714852  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 07:31:09.715519  bl2_stage_init 0x01
  331 07:31:09.715976  bl2_stage_init 0x81
  332 07:31:09.720566  hw id: 0x0000 - pwm id 0x01
  333 07:31:09.721046  bl2_stage_init 0xc1
  334 07:31:09.721491  bl2_stage_init 0x02
  335 07:31:09.721929  
  336 07:31:09.726060  L0:00000000
  337 07:31:09.726530  L1:00000703
  338 07:31:09.726967  L2:00008067
  339 07:31:09.727400  L3:15000000
  340 07:31:09.727837  S1:00000000
  341 07:31:09.731624  B2:20282000
  342 07:31:09.732129  B1:a0f83180
  343 07:31:09.732573  
  344 07:31:09.733014  TE: 72938
  345 07:31:09.733452  
  346 07:31:09.737212  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 07:31:09.737692  
  348 07:31:09.742785  Board ID = 1
  349 07:31:09.743248  Set cpu clk to 24M
  350 07:31:09.743689  Set clk81 to 24M
  351 07:31:09.748519  Use GP1_pll as DSU clk.
  352 07:31:09.749001  DSU clk: 1200 Mhz
  353 07:31:09.749438  CPU clk: 1200 MHz
  354 07:31:09.749868  Set clk81 to 166.6M
  355 07:31:09.759643  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 07:31:09.760197  board id: 1
  357 07:31:09.766005  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 07:31:09.776679  fw parse done
  359 07:31:09.782605  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 07:31:09.825073  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 07:31:09.836035  PIEI prepare done
  362 07:31:09.836512  fastboot data load
  363 07:31:09.836957  fastboot data verify
  364 07:31:09.841577  verify result: 266
  365 07:31:09.847182  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 07:31:09.847643  LPDDR4 probe
  367 07:31:09.848115  ddr clk to 1584MHz
  368 07:31:09.855219  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 07:31:09.892466  
  370 07:31:09.892945  dmc_version 0001
  371 07:31:09.899106  Check phy result
  372 07:31:09.905015  INFO : End of CA training
  373 07:31:09.905476  INFO : End of initialization
  374 07:31:09.910612  INFO : Training has run successfully!
  375 07:31:09.911074  Check phy result
  376 07:31:09.916195  INFO : End of initialization
  377 07:31:09.916656  INFO : End of read enable training
  378 07:31:09.921814  INFO : End of fine write leveling
  379 07:31:09.927425  INFO : End of Write leveling coarse delay
  380 07:31:09.927892  INFO : Training has run successfully!
  381 07:31:09.928373  Check phy result
  382 07:31:09.933037  INFO : End of initialization
  383 07:31:09.933511  INFO : End of read dq deskew training
  384 07:31:09.938643  INFO : End of MPR read delay center optimization
  385 07:31:09.944198  INFO : End of write delay center optimization
  386 07:31:09.949794  INFO : End of read delay center optimization
  387 07:31:09.950255  INFO : End of max read latency training
  388 07:31:09.955412  INFO : Training has run successfully!
  389 07:31:09.955911  1D training succeed
  390 07:31:09.964593  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 07:31:10.012212  Check phy result
  392 07:31:10.012732  INFO : End of initialization
  393 07:31:10.034661  INFO : End of 2D read delay Voltage center optimization
  394 07:31:10.053666  INFO : End of 2D read delay Voltage center optimization
  395 07:31:10.105525  INFO : End of 2D write delay Voltage center optimization
  396 07:31:10.154726  INFO : End of 2D write delay Voltage center optimization
  397 07:31:10.160433  INFO : Training has run successfully!
  398 07:31:10.160933  
  399 07:31:10.161381  channel==0
  400 07:31:10.165899  RxClkDly_Margin_A0==78 ps 8
  401 07:31:10.166373  TxDqDly_Margin_A0==98 ps 10
  402 07:31:10.169255  RxClkDly_Margin_A1==88 ps 9
  403 07:31:10.169714  TxDqDly_Margin_A1==88 ps 9
  404 07:31:10.174739  TrainedVREFDQ_A0==74
  405 07:31:10.175200  TrainedVREFDQ_A1==74
  406 07:31:10.175641  VrefDac_Margin_A0==25
  407 07:31:10.180429  DeviceVref_Margin_A0==40
  408 07:31:10.180894  VrefDac_Margin_A1==22
  409 07:31:10.185993  DeviceVref_Margin_A1==40
  410 07:31:10.186456  
  411 07:31:10.186895  
  412 07:31:10.187334  channel==1
  413 07:31:10.187766  RxClkDly_Margin_A0==88 ps 9
  414 07:31:10.191607  TxDqDly_Margin_A0==88 ps 9
  415 07:31:10.192103  RxClkDly_Margin_A1==88 ps 9
  416 07:31:10.197241  TxDqDly_Margin_A1==88 ps 9
  417 07:31:10.197717  TrainedVREFDQ_A0==75
  418 07:31:10.198157  TrainedVREFDQ_A1==75
  419 07:31:10.202836  VrefDac_Margin_A0==23
  420 07:31:10.203306  DeviceVref_Margin_A0==39
  421 07:31:10.208629  VrefDac_Margin_A1==22
  422 07:31:10.209102  DeviceVref_Margin_A1==39
  423 07:31:10.209535  
  424 07:31:10.214001   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 07:31:10.214466  
  426 07:31:10.242009  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000018 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  427 07:31:10.247619  2D training succeed
  428 07:31:10.253233  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 07:31:10.253705  auto size-- 65535DDR cs0 size: 2048MB
  430 07:31:10.258870  DDR cs1 size: 2048MB
  431 07:31:10.259456  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 07:31:10.264508  cs0 DataBus test pass
  433 07:31:10.264996  cs1 DataBus test pass
  434 07:31:10.265442  cs0 AddrBus test pass
  435 07:31:10.270008  cs1 AddrBus test pass
  436 07:31:10.270484  
  437 07:31:10.270930  100bdlr_step_size ps== 478
  438 07:31:10.271381  result report
  439 07:31:10.275638  boot times 0Enable ddr reg access
  440 07:31:10.283077  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 07:31:10.296835  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 07:31:10.949952  bl2z: ptr: 05129330, size: 00001e40
  443 07:31:10.957547  0.0;M3 CHK:0;cm4_sp_mode 0
  444 07:31:10.958038  MVN_1=0x00000000
  445 07:31:10.958485  MVN_2=0x00000000
  446 07:31:10.968941  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 07:31:10.969476  OPS=0x04
  448 07:31:10.969924  ring efuse init
  449 07:31:10.974595  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 07:31:10.975083  [0.017310 Inits done]
  451 07:31:10.975522  secure task start!
  452 07:31:10.981982  high task start!
  453 07:31:10.982460  low task start!
  454 07:31:10.982898  run into bl31
  455 07:31:10.990690  NOTICE:  BL31: v1.3(release):4fc40b1
  456 07:31:10.998486  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 07:31:10.999057  NOTICE:  BL31: G12A normal boot!
  458 07:31:11.014031  NOTICE:  BL31: BL33 decompress pass
  459 07:31:11.019700  ERROR:   Error initializing runtime service opteed_fast
  460 07:31:13.769618  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 07:31:13.770328  bl2_stage_init 0x01
  462 07:31:13.770786  bl2_stage_init 0x81
  463 07:31:13.775161  hw id: 0x0000 - pwm id 0x01
  464 07:31:13.775717  bl2_stage_init 0xc1
  465 07:31:13.780796  bl2_stage_init 0x02
  466 07:31:13.781353  
  467 07:31:13.781801  L0:00000000
  468 07:31:13.782237  L1:00000703
  469 07:31:13.782678  L2:00008067
  470 07:31:13.783116  L3:15000000
  471 07:31:13.786351  S1:00000000
  472 07:31:13.786853  B2:20282000
  473 07:31:13.787288  B1:a0f83180
  474 07:31:13.787723  
  475 07:31:13.788202  TE: 69906
  476 07:31:13.788657  
  477 07:31:13.791955  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 07:31:13.792489  
  479 07:31:13.797528  Board ID = 1
  480 07:31:13.798006  Set cpu clk to 24M
  481 07:31:13.798443  Set clk81 to 24M
  482 07:31:13.803128  Use GP1_pll as DSU clk.
  483 07:31:13.803604  DSU clk: 1200 Mhz
  484 07:31:13.804074  CPU clk: 1200 MHz
  485 07:31:13.808701  Set clk81 to 166.6M
  486 07:31:13.814308  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 07:31:13.814786  board id: 1
  488 07:31:13.821504  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 07:31:13.832404  fw parse done
  490 07:31:13.838362  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 07:31:13.882758  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 07:31:13.892662  PIEI prepare done
  493 07:31:13.893134  fastboot data load
  494 07:31:13.893572  fastboot data verify
  495 07:31:13.898237  verify result: 266
  496 07:31:13.903946  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 07:31:13.904509  LPDDR4 probe
  498 07:31:13.904945  ddr clk to 1584MHz
  499 07:31:13.911827  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 07:31:13.949555  
  501 07:31:13.950043  dmc_version 0001
  502 07:31:13.957997  Check phy result
  503 07:31:13.962633  INFO : End of CA training
  504 07:31:13.963152  INFO : End of initialization
  505 07:31:13.968199  INFO : Training has run successfully!
  506 07:31:13.968667  Check phy result
  507 07:31:13.973771  INFO : End of initialization
  508 07:31:13.974255  INFO : End of read enable training
  509 07:31:13.977116  INFO : End of fine write leveling
  510 07:31:13.982696  INFO : End of Write leveling coarse delay
  511 07:31:13.988301  INFO : Training has run successfully!
  512 07:31:13.988769  Check phy result
  513 07:31:13.989210  INFO : End of initialization
  514 07:31:13.993935  INFO : End of read dq deskew training
  515 07:31:13.999478  INFO : End of MPR read delay center optimization
  516 07:31:13.999943  INFO : End of write delay center optimization
  517 07:31:14.005111  INFO : End of read delay center optimization
  518 07:31:14.010679  INFO : End of max read latency training
  519 07:31:14.011138  INFO : Training has run successfully!
  520 07:31:14.016299  1D training succeed
  521 07:31:14.021291  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 07:31:14.070550  Check phy result
  523 07:31:14.071052  INFO : End of initialization
  524 07:31:14.097950  INFO : End of 2D read delay Voltage center optimization
  525 07:31:14.122083  INFO : End of 2D read delay Voltage center optimization
  526 07:31:14.178737  INFO : End of 2D write delay Voltage center optimization
  527 07:31:14.232707  INFO : End of 2D write delay Voltage center optimization
  528 07:31:14.238207  INFO : Training has run successfully!
  529 07:31:14.238698  
  530 07:31:14.239142  channel==0
  531 07:31:14.243777  RxClkDly_Margin_A0==78 ps 8
  532 07:31:14.244301  TxDqDly_Margin_A0==98 ps 10
  533 07:31:14.249431  RxClkDly_Margin_A1==88 ps 9
  534 07:31:14.249906  TxDqDly_Margin_A1==98 ps 10
  535 07:31:14.250348  TrainedVREFDQ_A0==74
  536 07:31:14.255034  TrainedVREFDQ_A1==74
  537 07:31:14.255533  VrefDac_Margin_A0==24
  538 07:31:14.256003  DeviceVref_Margin_A0==40
  539 07:31:14.260586  VrefDac_Margin_A1==23
  540 07:31:14.261067  DeviceVref_Margin_A1==40
  541 07:31:14.261509  
  542 07:31:14.261952  
  543 07:31:14.266191  channel==1
  544 07:31:14.266735  RxClkDly_Margin_A0==88 ps 9
  545 07:31:14.267178  TxDqDly_Margin_A0==98 ps 10
  546 07:31:14.271740  RxClkDly_Margin_A1==78 ps 8
  547 07:31:14.272246  TxDqDly_Margin_A1==88 ps 9
  548 07:31:14.277389  TrainedVREFDQ_A0==78
  549 07:31:14.277886  TrainedVREFDQ_A1==77
  550 07:31:14.278380  VrefDac_Margin_A0==23
  551 07:31:14.283009  DeviceVref_Margin_A0==36
  552 07:31:14.283479  VrefDac_Margin_A1==22
  553 07:31:14.288586  DeviceVref_Margin_A1==37
  554 07:31:14.289054  
  555 07:31:14.289504   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 07:31:14.289939  
  557 07:31:14.322161  soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000019 00000016 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  558 07:31:14.322686  2D training succeed
  559 07:31:14.327746  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 07:31:14.333373  auto size-- 65535DDR cs0 size: 2048MB
  561 07:31:14.333843  DDR cs1 size: 2048MB
  562 07:31:14.339034  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 07:31:14.339507  cs0 DataBus test pass
  564 07:31:14.344614  cs1 DataBus test pass
  565 07:31:14.345095  cs0 AddrBus test pass
  566 07:31:14.345531  cs1 AddrBus test pass
  567 07:31:14.345963  
  568 07:31:14.350207  100bdlr_step_size ps== 471
  569 07:31:14.350693  result report
  570 07:31:14.355775  boot times 0Enable ddr reg access
  571 07:31:14.361095  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 07:31:14.374869  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 07:31:15.033449  bl2z: ptr: 05129330, size: 00001e40
  574 07:31:15.040829  0.0;M3 CHK:0;cm4_sp_mode 0
  575 07:31:15.041334  MVN_1=0x00000000
  576 07:31:15.041784  MVN_2=0x00000000
  577 07:31:15.052247  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 07:31:15.052788  OPS=0x04
  579 07:31:15.053241  ring efuse init
  580 07:31:15.055145  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 07:31:15.061320  [0.017354 Inits done]
  582 07:31:15.061803  secure task start!
  583 07:31:15.062246  high task start!
  584 07:31:15.062685  low task start!
  585 07:31:15.065624  run into bl31
  586 07:31:15.074207  NOTICE:  BL31: v1.3(release):4fc40b1
  587 07:31:15.081978  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 07:31:15.082515  NOTICE:  BL31: G12A normal boot!
  589 07:31:15.097809  NOTICE:  BL31: BL33 decompress pass
  590 07:31:15.103264  ERROR:   Error initializing runtime service opteed_fast
  591 07:31:16.473503  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 07:31:16.473910  bl2_stage_init 0x01
  593 07:31:16.474127  bl2_stage_init 0x81
  594 07:31:16.478925  hw id: 0x0000 - pwm id 0x01
  595 07:31:16.479309  bl2_stage_init 0xc1
  596 07:31:16.483429  bl2_stage_init 0x02
  597 07:31:16.483797  
  598 07:31:16.484158  L0:00000000
  599 07:31:16.484471  L1:00000703
  600 07:31:16.484706  L2:00008067
  601 07:31:16.489050  L3:15000000
  602 07:31:16.489386  S1:00000000
  603 07:31:16.489596  B2:20282000
  604 07:31:16.489812  B1:a0f83180
  605 07:31:16.490017  
  606 07:31:16.490231  TE: 72152
  607 07:31:16.490437  
  608 07:31:16.500212  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 07:31:16.500691  
  610 07:31:16.501018  Board ID = 1
  611 07:31:16.501331  Set cpu clk to 24M
  612 07:31:16.501639  Set clk81 to 24M
  613 07:31:16.503654  Use GP1_pll as DSU clk.
  614 07:31:16.509141  DSU clk: 1200 Mhz
  615 07:31:16.509407  CPU clk: 1200 MHz
  616 07:31:16.509618  Set clk81 to 166.6M
  617 07:31:16.514881  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 07:31:16.520373  board id: 1
  619 07:31:16.524399  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 07:31:16.536165  fw parse done
  621 07:31:16.542238  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 07:31:16.585049  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 07:31:16.596430  PIEI prepare done
  624 07:31:16.596738  fastboot data load
  625 07:31:16.596957  fastboot data verify
  626 07:31:16.601951  verify result: 266
  627 07:31:16.607521  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 07:31:16.607780  LPDDR4 probe
  629 07:31:16.608026  ddr clk to 1584MHz
  630 07:31:16.615518  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 07:31:16.652422  
  632 07:31:16.652806  dmc_version 0001
  633 07:31:16.660369  Check phy result
  634 07:31:16.668115  INFO : End of CA training
  635 07:31:16.668468  INFO : End of initialization
  636 07:31:16.673272  INFO : Training has run successfully!
  637 07:31:16.673826  Check phy result
  638 07:31:16.677561  INFO : End of initialization
  639 07:31:16.678092  INFO : End of read enable training
  640 07:31:16.680817  INFO : End of fine write leveling
  641 07:31:16.686476  INFO : End of Write leveling coarse delay
  642 07:31:16.692016  INFO : Training has run successfully!
  643 07:31:16.692580  Check phy result
  644 07:31:16.693024  INFO : End of initialization
  645 07:31:16.697583  INFO : End of read dq deskew training
  646 07:31:16.703185  INFO : End of MPR read delay center optimization
  647 07:31:16.703626  INFO : End of write delay center optimization
  648 07:31:16.708904  INFO : End of read delay center optimization
  649 07:31:16.714550  INFO : End of max read latency training
  650 07:31:16.715037  INFO : Training has run successfully!
  651 07:31:16.720061  1D training succeed
  652 07:31:16.725943  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 07:31:16.774247  Check phy result
  654 07:31:16.774791  INFO : End of initialization
  655 07:31:16.801687  INFO : End of 2D read delay Voltage center optimization
  656 07:31:16.825834  INFO : End of 2D read delay Voltage center optimization
  657 07:31:16.882504  INFO : End of 2D write delay Voltage center optimization
  658 07:31:16.936789  INFO : End of 2D write delay Voltage center optimization
  659 07:31:16.942269  INFO : Training has run successfully!
  660 07:31:16.942778  
  661 07:31:16.943193  channel==0
  662 07:31:16.947761  RxClkDly_Margin_A0==78 ps 8
  663 07:31:16.948313  TxDqDly_Margin_A0==98 ps 10
  664 07:31:16.950933  RxClkDly_Margin_A1==88 ps 9
  665 07:31:16.951384  TxDqDly_Margin_A1==88 ps 9
  666 07:31:16.956645  TrainedVREFDQ_A0==76
  667 07:31:16.957097  TrainedVREFDQ_A1==75
  668 07:31:16.957503  VrefDac_Margin_A0==24
  669 07:31:16.962436  DeviceVref_Margin_A0==38
  670 07:31:16.962902  VrefDac_Margin_A1==23
  671 07:31:16.968013  DeviceVref_Margin_A1==39
  672 07:31:16.968476  
  673 07:31:16.968879  
  674 07:31:16.969276  channel==1
  675 07:31:16.969669  RxClkDly_Margin_A0==78 ps 8
  676 07:31:16.973341  TxDqDly_Margin_A0==98 ps 10
  677 07:31:16.973870  RxClkDly_Margin_A1==88 ps 9
  678 07:31:16.978843  TxDqDly_Margin_A1==88 ps 9
  679 07:31:16.979350  TrainedVREFDQ_A0==78
  680 07:31:16.979779  TrainedVREFDQ_A1==77
  681 07:31:16.984567  VrefDac_Margin_A0==22
  682 07:31:16.985038  DeviceVref_Margin_A0==36
  683 07:31:16.990036  VrefDac_Margin_A1==22
  684 07:31:16.990475  DeviceVref_Margin_A1==37
  685 07:31:16.990874  
  686 07:31:16.995605   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 07:31:16.996083  
  688 07:31:17.023643  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  689 07:31:17.029297  2D training succeed
  690 07:31:17.034785  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 07:31:17.035293  auto size-- 65535DDR cs0 size: 2048MB
  692 07:31:17.040421  DDR cs1 size: 2048MB
  693 07:31:17.040866  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 07:31:17.045965  cs0 DataBus test pass
  695 07:31:17.046437  cs1 DataBus test pass
  696 07:31:17.046840  cs0 AddrBus test pass
  697 07:31:17.051628  cs1 AddrBus test pass
  698 07:31:17.052096  
  699 07:31:17.052511  100bdlr_step_size ps== 471
  700 07:31:17.052925  result report
  701 07:31:17.057216  boot times 0Enable ddr reg access
  702 07:31:17.064210  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 07:31:17.078623  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 07:31:17.737989  bl2z: ptr: 05129330, size: 00001e40
  705 07:31:17.746329  0.0;M3 CHK:0;cm4_sp_mode 0
  706 07:31:17.746808  MVN_1=0x00000000
  707 07:31:17.747220  MVN_2=0x00000000
  708 07:31:17.757761  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 07:31:17.758216  OPS=0x04
  710 07:31:17.758626  ring efuse init
  711 07:31:17.760736  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 07:31:17.766918  [0.017354 Inits done]
  713 07:31:17.767430  secure task start!
  714 07:31:17.767842  high task start!
  715 07:31:17.768293  low task start!
  716 07:31:17.771160  run into bl31
  717 07:31:17.779812  NOTICE:  BL31: v1.3(release):4fc40b1
  718 07:31:17.786944  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 07:31:17.787482  NOTICE:  BL31: G12A normal boot!
  720 07:31:17.803197  NOTICE:  BL31: BL33 decompress pass
  721 07:31:17.808919  ERROR:   Error initializing runtime service opteed_fast
  722 07:31:18.847014  
  723 07:31:18.847668  
  724 07:31:18.848173  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 07:31:18.848620  
  726 07:31:18.849058  Model: Libre Computer AML-S905D3-CC Solitude
  727 07:31:18.849487  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 07:31:18.850293  DRAM:  2 GiB (effective 3.8 GiB)
  729 07:31:18.876523  Core:  406 devices, 33 uclasses, devicetree: separate
  730 07:31:18.882298  WDT:   Not starting watchdog@f0d0
  731 07:31:18.907478  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 07:31:18.919632  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 07:31:18.924591  ** Bad device specification mmc 0 **
  734 07:31:18.934657  Card did not respond to voltage select! : -110
  735 07:31:18.942325  ** Bad device specification mmc 0 **
  736 07:31:18.942800  Couldn't find partition mmc 0
  737 07:31:18.950654  Card did not respond to voltage select! : -110
  738 07:31:18.956164  ** Bad device specification mmc 0 **
  739 07:31:18.956642  Couldn't find partition mmc 0
  740 07:31:18.961214  Error: could not access storage.
  741 07:31:19.260030  Net:   eth0: ethernet@ff3f0000
  742 07:31:19.260718  starting USB...
  743 07:31:19.503470  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 07:31:19.504191  Starting the controller
  745 07:31:19.510408  USB XHCI 1.10
  746 07:31:21.066423  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 07:31:21.074668         scanning usb for storage devices... 0 Storage Device(s) found
  749 07:31:21.126332  Hit any key to stop autoboot:  1 
  750 07:31:21.127172  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  751 07:31:21.127808  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  752 07:31:21.128389  Setting prompt string to ['=>']
  753 07:31:21.128924  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  754 07:31:21.140747   0 
  755 07:31:21.141694  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 07:31:21.243006  => setenv autoload no
  758 07:31:21.243719  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  759 07:31:21.249001  setenv autoload no
  761 07:31:21.350658  => setenv initrd_high 0xffffffff
  762 07:31:21.351389  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  763 07:31:21.355606  setenv initrd_high 0xffffffff
  765 07:31:21.456734  => setenv fdt_high 0xffffffff
  766 07:31:21.457565  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  767 07:31:21.461933  setenv fdt_high 0xffffffff
  769 07:31:21.563478  => dhcp
  770 07:31:21.564241  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  771 07:31:21.568135  dhcp
  772 07:31:22.174034  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
  773 07:31:22.174675  Speed: 1000, full duplex
  774 07:31:22.175137  BOOTP broadcast 1
  775 07:31:22.185587  DHCP client bound to address 192.168.6.21 (11 ms)
  777 07:31:22.287072  => setenv serverip 192.168.6.2
  778 07:31:22.287751  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  779 07:31:22.292163  setenv serverip 192.168.6.2
  781 07:31:22.393667  => tftpboot 0x01080000 978420/tftp-deploy-wm_8tzhi/kernel/uImage
  782 07:31:22.394171  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  783 07:31:22.400830  tftpboot 0x01080000 978420/tftp-deploy-wm_8tzhi/kernel/uImage
  784 07:31:22.401084  Speed: 1000, full duplex
  785 07:31:22.401301  Using ethernet@ff3f0000 device
  786 07:31:22.406349  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  787 07:31:22.411931  Filename '978420/tftp-deploy-wm_8tzhi/kernel/uImage'.
  788 07:31:22.415644  Load address: 0x1080000
  789 07:31:26.463977  Loading: *#################################################
  790 07:31:26.464732  TFTP error: trying to overwrite reserved memory...
  792 07:31:26.466288  end: 2.4.3 bootloader-commands (duration 00:00:05) [common]
  795 07:31:26.468338  end: 2.4 uboot-commands (duration 00:00:24) [common]
  797 07:31:26.469831  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
  799 07:31:26.471015  end: 2 uboot-action (duration 00:00:24) [common]
  801 07:31:26.473536  Cleaning after the job
  802 07:31:26.474215  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/ramdisk
  803 07:31:26.492730  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/kernel
  804 07:31:26.526857  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/dtb
  805 07:31:26.527681  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/nfsrootfs
  806 07:31:26.671564  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978420/tftp-deploy-wm_8tzhi/modules
  807 07:31:26.700837  start: 4.1 power-off (timeout 00:00:30) [common]
  808 07:31:26.701514  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  809 07:31:26.737497  >> OK - accepted request

  810 07:31:26.739877  Returned 0 in 0 seconds
  811 07:31:26.840888  end: 4.1 power-off (duration 00:00:00) [common]
  813 07:31:26.842804  start: 4.2 read-feedback (timeout 00:10:00) [common]
  814 07:31:26.844124  Listened to connection for namespace 'common' for up to 1s
  815 07:31:27.844132  Finalising connection for namespace 'common'
  816 07:31:27.844646  Disconnecting from shell: Finalise
  817 07:31:27.844920  => 
  818 07:31:27.945750  end: 4.2 read-feedback (duration 00:00:01) [common]
  819 07:31:27.946562  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/978420
  820 07:31:30.131339  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/978420
  821 07:31:30.131901  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.