Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 07:53:16.379946 lava-dispatcher, installed at version: 2024.01
2 07:53:16.380804 start: 0 validate
3 07:53:16.381289 Start time: 2024-11-12 07:53:16.381257+00:00 (UTC)
4 07:53:16.381858 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 07:53:16.382406 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 07:53:16.418783 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 07:53:16.419328 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241112%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 07:53:16.454842 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 07:53:16.455477 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241112%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 07:53:23.534201 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 07:53:23.534682 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 07:53:23.568730 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 07:53:23.569205 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241112%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 07:53:24.615878 validate duration: 8.23
16 07:53:24.616842 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 07:53:24.617209 start: 1.1 download-retry (timeout 00:10:00) [common]
18 07:53:24.617527 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 07:53:24.618181 Not decompressing ramdisk as can be used compressed.
20 07:53:24.618694 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 07:53:24.618992 saving as /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/ramdisk/initrd.cpio.gz
22 07:53:24.619286 total size: 5628140 (5 MB)
23 07:53:24.653107 progress 0 % (0 MB)
24 07:53:24.657644 progress 5 % (0 MB)
25 07:53:24.661718 progress 10 % (0 MB)
26 07:53:24.665354 progress 15 % (0 MB)
27 07:53:24.669417 progress 20 % (1 MB)
28 07:53:24.673135 progress 25 % (1 MB)
29 07:53:24.677175 progress 30 % (1 MB)
30 07:53:24.681194 progress 35 % (1 MB)
31 07:53:24.684715 progress 40 % (2 MB)
32 07:53:24.688739 progress 45 % (2 MB)
33 07:53:24.692273 progress 50 % (2 MB)
34 07:53:24.696171 progress 55 % (2 MB)
35 07:53:24.700253 progress 60 % (3 MB)
36 07:53:24.703751 progress 65 % (3 MB)
37 07:53:24.707620 progress 70 % (3 MB)
38 07:53:24.711225 progress 75 % (4 MB)
39 07:53:24.714947 progress 80 % (4 MB)
40 07:53:24.718197 progress 85 % (4 MB)
41 07:53:24.721706 progress 90 % (4 MB)
42 07:53:24.725214 progress 95 % (5 MB)
43 07:53:24.728419 progress 100 % (5 MB)
44 07:53:24.729070 5 MB downloaded in 0.11 s (48.90 MB/s)
45 07:53:24.729607 end: 1.1.1 http-download (duration 00:00:00) [common]
47 07:53:24.730481 end: 1.1 download-retry (duration 00:00:00) [common]
48 07:53:24.730764 start: 1.2 download-retry (timeout 00:10:00) [common]
49 07:53:24.731028 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 07:53:24.731500 downloading http://storage.kernelci.org/next/master/next-20241112/arm64/defconfig/gcc-12/kernel/Image
51 07:53:24.731745 saving as /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/kernel/Image
52 07:53:24.731951 total size: 46121472 (43 MB)
53 07:53:24.732184 No compression specified
54 07:53:24.769725 progress 0 % (0 MB)
55 07:53:24.797504 progress 5 % (2 MB)
56 07:53:24.824652 progress 10 % (4 MB)
57 07:53:24.852117 progress 15 % (6 MB)
58 07:53:24.879238 progress 20 % (8 MB)
59 07:53:24.907630 progress 25 % (11 MB)
60 07:53:24.935299 progress 30 % (13 MB)
61 07:53:24.963472 progress 35 % (15 MB)
62 07:53:24.991812 progress 40 % (17 MB)
63 07:53:25.020129 progress 45 % (19 MB)
64 07:53:25.048081 progress 50 % (22 MB)
65 07:53:25.076644 progress 55 % (24 MB)
66 07:53:25.104425 progress 60 % (26 MB)
67 07:53:25.132110 progress 65 % (28 MB)
68 07:53:25.161409 progress 70 % (30 MB)
69 07:53:25.189335 progress 75 % (33 MB)
70 07:53:25.217286 progress 80 % (35 MB)
71 07:53:25.244941 progress 85 % (37 MB)
72 07:53:25.272711 progress 90 % (39 MB)
73 07:53:25.300621 progress 95 % (41 MB)
74 07:53:25.328448 progress 100 % (43 MB)
75 07:53:25.329165 43 MB downloaded in 0.60 s (73.65 MB/s)
76 07:53:25.329695 end: 1.2.1 http-download (duration 00:00:01) [common]
78 07:53:25.330594 end: 1.2 download-retry (duration 00:00:01) [common]
79 07:53:25.330909 start: 1.3 download-retry (timeout 00:09:59) [common]
80 07:53:25.331210 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 07:53:25.331733 downloading http://storage.kernelci.org/next/master/next-20241112/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 07:53:25.332045 saving as /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 07:53:25.332277 total size: 53209 (0 MB)
84 07:53:25.332503 No compression specified
85 07:53:25.372239 progress 61 % (0 MB)
86 07:53:25.373112 progress 100 % (0 MB)
87 07:53:25.373716 0 MB downloaded in 0.04 s (1.23 MB/s)
88 07:53:25.374264 end: 1.3.1 http-download (duration 00:00:00) [common]
90 07:53:25.376105 end: 1.3 download-retry (duration 00:00:00) [common]
91 07:53:25.376503 start: 1.4 download-retry (timeout 00:09:59) [common]
92 07:53:25.376843 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 07:53:25.377387 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 07:53:25.377688 saving as /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/nfsrootfs/full.rootfs.tar
95 07:53:25.377958 total size: 474398908 (452 MB)
96 07:53:25.378216 Using unxz to decompress xz
97 07:53:25.413829 progress 0 % (0 MB)
98 07:53:26.559080 progress 5 % (22 MB)
99 07:53:28.056049 progress 10 % (45 MB)
100 07:53:28.523961 progress 15 % (67 MB)
101 07:53:29.314542 progress 20 % (90 MB)
102 07:53:29.866873 progress 25 % (113 MB)
103 07:53:30.275760 progress 30 % (135 MB)
104 07:53:30.916925 progress 35 % (158 MB)
105 07:53:31.755998 progress 40 % (181 MB)
106 07:53:32.575055 progress 45 % (203 MB)
107 07:53:33.144916 progress 50 % (226 MB)
108 07:53:33.785088 progress 55 % (248 MB)
109 07:53:34.989148 progress 60 % (271 MB)
110 07:53:36.583666 progress 65 % (294 MB)
111 07:53:38.254830 progress 70 % (316 MB)
112 07:53:41.482190 progress 75 % (339 MB)
113 07:53:43.969891 progress 80 % (361 MB)
114 07:53:46.856400 progress 85 % (384 MB)
115 07:53:50.084253 progress 90 % (407 MB)
116 07:53:53.280601 progress 95 % (429 MB)
117 07:53:56.480195 progress 100 % (452 MB)
118 07:53:56.493351 452 MB downloaded in 31.12 s (14.54 MB/s)
119 07:53:56.494008 end: 1.4.1 http-download (duration 00:00:31) [common]
121 07:53:56.494818 end: 1.4 download-retry (duration 00:00:31) [common]
122 07:53:56.495082 start: 1.5 download-retry (timeout 00:09:28) [common]
123 07:53:56.495338 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 07:53:56.495886 downloading http://storage.kernelci.org/next/master/next-20241112/arm64/defconfig/gcc-12/modules.tar.xz
125 07:53:56.496396 saving as /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/modules/modules.tar
126 07:53:56.496842 total size: 11690048 (11 MB)
127 07:53:56.497314 Using unxz to decompress xz
128 07:53:56.537391 progress 0 % (0 MB)
129 07:53:56.603666 progress 5 % (0 MB)
130 07:53:56.678300 progress 10 % (1 MB)
131 07:53:56.779207 progress 15 % (1 MB)
132 07:53:56.887081 progress 20 % (2 MB)
133 07:53:56.984343 progress 25 % (2 MB)
134 07:53:57.064707 progress 30 % (3 MB)
135 07:53:57.142567 progress 35 % (3 MB)
136 07:53:57.221078 progress 40 % (4 MB)
137 07:53:57.299208 progress 45 % (5 MB)
138 07:53:57.386952 progress 50 % (5 MB)
139 07:53:57.472128 progress 55 % (6 MB)
140 07:53:57.560207 progress 60 % (6 MB)
141 07:53:57.638511 progress 65 % (7 MB)
142 07:53:57.721707 progress 70 % (7 MB)
143 07:53:57.804924 progress 75 % (8 MB)
144 07:53:57.892175 progress 80 % (8 MB)
145 07:53:57.982655 progress 85 % (9 MB)
146 07:53:58.071481 progress 90 % (10 MB)
147 07:53:58.149714 progress 95 % (10 MB)
148 07:53:58.232001 progress 100 % (11 MB)
149 07:53:58.245227 11 MB downloaded in 1.75 s (6.38 MB/s)
150 07:53:58.247677 end: 1.5.1 http-download (duration 00:00:02) [common]
152 07:53:58.248853 end: 1.5 download-retry (duration 00:00:02) [common]
153 07:53:58.249161 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 07:53:58.249447 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 07:54:13.984495 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/978592/extract-nfsrootfs-j6sa9rok
156 07:54:13.985099 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 07:54:13.985384 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 07:54:13.986117 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m
159 07:54:13.986575 makedir: /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin
160 07:54:13.986917 makedir: /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/tests
161 07:54:13.987263 makedir: /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/results
162 07:54:13.987601 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-add-keys
163 07:54:13.988178 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-add-sources
164 07:54:13.988712 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-background-process-start
165 07:54:13.989234 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-background-process-stop
166 07:54:13.989775 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-common-functions
167 07:54:13.990279 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-echo-ipv4
168 07:54:13.990786 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-install-packages
169 07:54:13.991315 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-installed-packages
170 07:54:13.991798 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-os-build
171 07:54:13.992331 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-probe-channel
172 07:54:13.992825 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-probe-ip
173 07:54:13.993330 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-target-ip
174 07:54:13.993851 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-target-mac
175 07:54:13.994408 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-target-storage
176 07:54:13.994913 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-test-case
177 07:54:13.995396 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-test-event
178 07:54:13.995873 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-test-feedback
179 07:54:13.996389 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-test-raise
180 07:54:13.996864 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-test-reference
181 07:54:13.997338 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-test-runner
182 07:54:13.997823 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-test-set
183 07:54:13.998300 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-test-shell
184 07:54:13.998827 Updating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-install-packages (oe)
185 07:54:13.999418 Updating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/bin/lava-installed-packages (oe)
186 07:54:13.999872 Creating /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/environment
187 07:54:14.000294 LAVA metadata
188 07:54:14.000562 - LAVA_JOB_ID=978592
189 07:54:14.000773 - LAVA_DISPATCHER_IP=192.168.6.2
190 07:54:14.001144 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 07:54:14.002126 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 07:54:14.002439 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 07:54:14.002645 skipped lava-vland-overlay
194 07:54:14.002884 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 07:54:14.003138 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 07:54:14.003355 skipped lava-multinode-overlay
197 07:54:14.003593 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 07:54:14.003842 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 07:54:14.004130 Loading test definitions
200 07:54:14.004414 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 07:54:14.004635 Using /lava-978592 at stage 0
202 07:54:14.005792 uuid=978592_1.6.2.4.1 testdef=None
203 07:54:14.006101 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 07:54:14.006361 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 07:54:14.008175 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 07:54:14.008978 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 07:54:14.011276 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 07:54:14.012145 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 07:54:14.014262 runner path: /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 978592_1.6.2.4.1
212 07:54:14.014866 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 07:54:14.015627 Creating lava-test-runner.conf files
215 07:54:14.015829 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/978592/lava-overlay-2io5n03m/lava-978592/0 for stage 0
216 07:54:14.016218 - 0_v4l2-decoder-conformance-h265
217 07:54:14.016593 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 07:54:14.016873 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 07:54:14.038788 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 07:54:14.039232 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 07:54:14.039491 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 07:54:14.039758 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 07:54:14.040042 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 07:54:14.658810 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 07:54:14.659281 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 07:54:14.659529 extracting modules file /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/978592/extract-nfsrootfs-j6sa9rok
227 07:54:16.043030 extracting modules file /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/978592/extract-overlay-ramdisk-dt3uxxno/ramdisk
228 07:54:17.457833 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 07:54:17.458310 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 07:54:17.458586 [common] Applying overlay to NFS
231 07:54:17.458799 [common] Applying overlay /var/lib/lava/dispatcher/tmp/978592/compress-overlay-qa80b7rz/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/978592/extract-nfsrootfs-j6sa9rok
232 07:54:17.488757 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 07:54:17.489160 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 07:54:17.489435 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 07:54:17.489665 Converting downloaded kernel to a uImage
236 07:54:17.489970 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/kernel/Image /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/kernel/uImage
237 07:54:18.004294 output: Image Name:
238 07:54:18.004715 output: Created: Tue Nov 12 07:54:17 2024
239 07:54:18.004922 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 07:54:18.005126 output: Data Size: 46121472 Bytes = 45040.50 KiB = 43.98 MiB
241 07:54:18.005329 output: Load Address: 01080000
242 07:54:18.005527 output: Entry Point: 01080000
243 07:54:18.005723 output:
244 07:54:18.006055 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 07:54:18.006323 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 07:54:18.006589 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 07:54:18.006841 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 07:54:18.007094 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 07:54:18.007353 Building ramdisk /var/lib/lava/dispatcher/tmp/978592/extract-overlay-ramdisk-dt3uxxno/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/978592/extract-overlay-ramdisk-dt3uxxno/ramdisk
250 07:54:20.188372 >> 168134 blocks
251 07:54:28.193948 Adding RAMdisk u-boot header.
252 07:54:28.194653 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/978592/extract-overlay-ramdisk-dt3uxxno/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/978592/extract-overlay-ramdisk-dt3uxxno/ramdisk.cpio.gz.uboot
253 07:54:28.448134 output: Image Name:
254 07:54:28.448793 output: Created: Tue Nov 12 07:54:28 2024
255 07:54:28.449234 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 07:54:28.449642 output: Data Size: 23564273 Bytes = 23011.99 KiB = 22.47 MiB
257 07:54:28.450040 output: Load Address: 00000000
258 07:54:28.450434 output: Entry Point: 00000000
259 07:54:28.450825 output:
260 07:54:28.451904 rename /var/lib/lava/dispatcher/tmp/978592/extract-overlay-ramdisk-dt3uxxno/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/ramdisk/ramdisk.cpio.gz.uboot
261 07:54:28.452705 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 07:54:28.453253 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 07:54:28.453778 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 07:54:28.454240 No LXC device requested
265 07:54:28.454746 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 07:54:28.455258 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 07:54:28.455753 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 07:54:28.456202 Checking files for TFTP limit of 4294967296 bytes.
269 07:54:28.458984 end: 1 tftp-deploy (duration 00:01:04) [common]
270 07:54:28.459595 start: 2 uboot-action (timeout 00:05:00) [common]
271 07:54:28.460149 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 07:54:28.460648 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 07:54:28.461143 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 07:54:28.461666 Using kernel file from prepare-kernel: 978592/tftp-deploy-tmmp1sxc/kernel/uImage
275 07:54:28.462287 substitutions:
276 07:54:28.462689 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 07:54:28.463084 - {DTB_ADDR}: 0x01070000
278 07:54:28.463473 - {DTB}: 978592/tftp-deploy-tmmp1sxc/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 07:54:28.463864 - {INITRD}: 978592/tftp-deploy-tmmp1sxc/ramdisk/ramdisk.cpio.gz.uboot
280 07:54:28.464300 - {KERNEL_ADDR}: 0x01080000
281 07:54:28.464690 - {KERNEL}: 978592/tftp-deploy-tmmp1sxc/kernel/uImage
282 07:54:28.465078 - {LAVA_MAC}: None
283 07:54:28.465502 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/978592/extract-nfsrootfs-j6sa9rok
284 07:54:28.465894 - {NFS_SERVER_IP}: 192.168.6.2
285 07:54:28.466280 - {PRESEED_CONFIG}: None
286 07:54:28.466668 - {PRESEED_LOCAL}: None
287 07:54:28.467055 - {RAMDISK_ADDR}: 0x08000000
288 07:54:28.467435 - {RAMDISK}: 978592/tftp-deploy-tmmp1sxc/ramdisk/ramdisk.cpio.gz.uboot
289 07:54:28.467820 - {ROOT_PART}: None
290 07:54:28.468242 - {ROOT}: None
291 07:54:28.468630 - {SERVER_IP}: 192.168.6.2
292 07:54:28.469016 - {TEE_ADDR}: 0x83000000
293 07:54:28.469399 - {TEE}: None
294 07:54:28.469781 Parsed boot commands:
295 07:54:28.470154 - setenv autoload no
296 07:54:28.470535 - setenv initrd_high 0xffffffff
297 07:54:28.470916 - setenv fdt_high 0xffffffff
298 07:54:28.471297 - dhcp
299 07:54:28.471677 - setenv serverip 192.168.6.2
300 07:54:28.472077 - tftpboot 0x01080000 978592/tftp-deploy-tmmp1sxc/kernel/uImage
301 07:54:28.472465 - tftpboot 0x08000000 978592/tftp-deploy-tmmp1sxc/ramdisk/ramdisk.cpio.gz.uboot
302 07:54:28.472847 - tftpboot 0x01070000 978592/tftp-deploy-tmmp1sxc/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 07:54:28.473229 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/978592/extract-nfsrootfs-j6sa9rok,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 07:54:28.473623 - bootm 0x01080000 0x08000000 0x01070000
305 07:54:28.474111 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 07:54:28.475564 start: 2.3 connect-device (timeout 00:05:00) [common]
308 07:54:28.476000 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 07:54:28.490205 Setting prompt string to ['lava-test: # ']
310 07:54:28.491699 end: 2.3 connect-device (duration 00:00:00) [common]
311 07:54:28.492311 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 07:54:28.492848 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 07:54:28.493368 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 07:54:28.494476 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 07:54:28.528362 >> OK - accepted request
316 07:54:28.531607 Returned 0 in 0 seconds
317 07:54:28.632524 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 07:54:28.634195 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 07:54:28.634761 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 07:54:28.635274 Setting prompt string to ['Hit any key to stop autoboot']
322 07:54:28.635739 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 07:54:28.637351 Trying 192.168.56.21...
324 07:54:28.637832 Connected to conserv1.
325 07:54:28.638245 Escape character is '^]'.
326 07:54:28.638661
327 07:54:28.639073 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 07:54:28.639481
329 07:54:36.095568 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 07:54:36.096043 bl2_stage_init 0x01
331 07:54:36.096312 bl2_stage_init 0x81
332 07:54:36.102545 hw id: 0x0000 - pwm id 0x01
333 07:54:36.104026 bl2_stage_init 0xc1
334 07:54:36.106315 bl2_stage_init 0x02
335 07:54:36.106675
336 07:54:36.106918 L0:00000000
337 07:54:36.107151 L1:00000703
338 07:54:36.107381 L2:00008067
339 07:54:36.107612 L3:15000000
340 07:54:36.111844 S1:00000000
341 07:54:36.112240 B2:20282000
342 07:54:36.112506 B1:a0f83180
343 07:54:36.112742
344 07:54:36.112978 TE: 67683
345 07:54:36.113207
346 07:54:36.117514 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 07:54:36.123188
348 07:54:36.123845 Board ID = 1
349 07:54:36.124356 Set cpu clk to 24M
350 07:54:36.124808 Set clk81 to 24M
351 07:54:36.126447 Use GP1_pll as DSU clk.
352 07:54:36.126972 DSU clk: 1200 Mhz
353 07:54:36.132138 CPU clk: 1200 MHz
354 07:54:36.132735 Set clk81 to 166.6M
355 07:54:36.137638 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 07:54:36.138163 board id: 1
357 07:54:36.147439 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 07:54:36.158160 fw parse done
359 07:54:36.164116 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 07:54:36.206715 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 07:54:36.217785 PIEI prepare done
362 07:54:36.218322 fastboot data load
363 07:54:36.218771 fastboot data verify
364 07:54:36.223358 verify result: 266
365 07:54:36.228915 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 07:54:36.229440 LPDDR4 probe
367 07:54:36.229883 ddr clk to 1584MHz
368 07:54:36.236890 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 07:54:36.274242
370 07:54:36.274818 dmc_version 0001
371 07:54:36.280877 Check phy result
372 07:54:36.286746 INFO : End of CA training
373 07:54:36.287292 INFO : End of initialization
374 07:54:36.292481 INFO : Training has run successfully!
375 07:54:36.293000 Check phy result
376 07:54:36.297934 INFO : End of initialization
377 07:54:36.298474 INFO : End of read enable training
378 07:54:36.301266 INFO : End of fine write leveling
379 07:54:36.306802 INFO : End of Write leveling coarse delay
380 07:54:36.312483 INFO : Training has run successfully!
381 07:54:36.313008 Check phy result
382 07:54:36.313448 INFO : End of initialization
383 07:54:36.318005 INFO : End of read dq deskew training
384 07:54:36.323579 INFO : End of MPR read delay center optimization
385 07:54:36.324148 INFO : End of write delay center optimization
386 07:54:36.329306 INFO : End of read delay center optimization
387 07:54:36.334841 INFO : End of max read latency training
388 07:54:36.335405 INFO : Training has run successfully!
389 07:54:36.340486 1D training succeed
390 07:54:36.346396 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 07:54:36.394008 Check phy result
392 07:54:36.394586 INFO : End of initialization
393 07:54:36.416374 INFO : End of 2D read delay Voltage center optimization
394 07:54:36.435468 INFO : End of 2D read delay Voltage center optimization
395 07:54:36.487447 INFO : End of 2D write delay Voltage center optimization
396 07:54:36.536636 INFO : End of 2D write delay Voltage center optimization
397 07:54:36.542084 INFO : Training has run successfully!
398 07:54:36.542594
399 07:54:36.543043 channel==0
400 07:54:36.547684 RxClkDly_Margin_A0==88 ps 9
401 07:54:36.548264 TxDqDly_Margin_A0==88 ps 9
402 07:54:36.553283 RxClkDly_Margin_A1==88 ps 9
403 07:54:36.553794 TxDqDly_Margin_A1==98 ps 10
404 07:54:36.554242 TrainedVREFDQ_A0==78
405 07:54:36.558901 TrainedVREFDQ_A1==74
406 07:54:36.559440 VrefDac_Margin_A0==24
407 07:54:36.559885 DeviceVref_Margin_A0==36
408 07:54:36.564581 VrefDac_Margin_A1==23
409 07:54:36.565110 DeviceVref_Margin_A1==40
410 07:54:36.565548
411 07:54:36.565983
412 07:54:36.566429 channel==1
413 07:54:36.570092 RxClkDly_Margin_A0==78 ps 8
414 07:54:36.570615 TxDqDly_Margin_A0==88 ps 9
415 07:54:36.575740 RxClkDly_Margin_A1==88 ps 9
416 07:54:36.576291 TxDqDly_Margin_A1==88 ps 9
417 07:54:36.581285 TrainedVREFDQ_A0==77
418 07:54:36.581796 TrainedVREFDQ_A1==77
419 07:54:36.582239 VrefDac_Margin_A0==22
420 07:54:36.586803 DeviceVref_Margin_A0==37
421 07:54:36.587140 VrefDac_Margin_A1==23
422 07:54:36.587376 DeviceVref_Margin_A1==37
423 07:54:36.592387
424 07:54:36.592700 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 07:54:36.592959
426 07:54:36.625953 soc_vref_reg_value 0x 00000019 00000019 00000018 00000016 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000019 00000018 00000019 00000015 00000018 00000015 00000015 00000017 00000019 00000019 00000018 00000019 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000062
427 07:54:36.626369 2D training succeed
428 07:54:36.631542 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 07:54:36.637151 auto size-- 65535DDR cs0 size: 2048MB
430 07:54:36.637488 DDR cs1 size: 2048MB
431 07:54:36.642918 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 07:54:36.643281 cs0 DataBus test pass
433 07:54:36.648553 cs1 DataBus test pass
434 07:54:36.649149 cs0 AddrBus test pass
435 07:54:36.649609 cs1 AddrBus test pass
436 07:54:36.650054
437 07:54:36.654079 100bdlr_step_size ps== 464
438 07:54:36.654698 result report
439 07:54:36.659758 boot times 0Enable ddr reg access
440 07:54:36.665975 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 07:54:36.678646 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 07:54:37.333859 bl2z: ptr: 05129330, size: 00001e40
443 07:54:37.341002 0.0;M3 CHK:0;cm4_sp_mode 0
444 07:54:37.341386 MVN_1=0x00000000
445 07:54:37.341664 MVN_2=0x00000000
446 07:54:37.352577 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 07:54:37.352938 OPS=0x04
448 07:54:37.353318 ring efuse init
449 07:54:37.355487 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 07:54:37.361048 [0.017310 Inits done]
451 07:54:37.361405 secure task start!
452 07:54:37.361676 high task start!
453 07:54:37.361895 low task start!
454 07:54:37.365298 run into bl31
455 07:54:37.373988 NOTICE: BL31: v1.3(release):4fc40b1
456 07:54:37.381726 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 07:54:37.382089 NOTICE: BL31: G12A normal boot!
458 07:54:37.397358 NOTICE: BL31: BL33 decompress pass
459 07:54:37.402958 ERROR: Error initializing runtime service opteed_fast
460 07:54:40.150991 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 07:54:40.151681 bl2_stage_init 0x01
462 07:54:40.152221 bl2_stage_init 0x81
463 07:54:40.158870 hw id: 0x0000 - pwm id 0x01
464 07:54:40.159453 bl2_stage_init 0xc1
465 07:54:40.159928 bl2_stage_init 0x02
466 07:54:40.160421
467 07:54:40.162073 L0:00000000
468 07:54:40.162593 L1:00000703
469 07:54:40.163037 L2:00008067
470 07:54:40.163474 L3:15000000
471 07:54:40.163904 S1:00000000
472 07:54:40.167660 B2:20282000
473 07:54:40.168151 B1:a0f83180
474 07:54:40.168586
475 07:54:40.169016 TE: 72283
476 07:54:40.169443
477 07:54:40.173330 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 07:54:40.173858
479 07:54:40.178873 Board ID = 1
480 07:54:40.179415 Set cpu clk to 24M
481 07:54:40.179851 Set clk81 to 24M
482 07:54:40.184454 Use GP1_pll as DSU clk.
483 07:54:40.184937 DSU clk: 1200 Mhz
484 07:54:40.185369 CPU clk: 1200 MHz
485 07:54:40.185794 Set clk81 to 166.6M
486 07:54:40.195686 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 07:54:40.196219 board id: 1
488 07:54:40.201245 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 07:54:40.213057 fw parse done
490 07:54:40.218896 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 07:54:40.261990 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 07:54:40.272989 PIEI prepare done
493 07:54:40.273507 fastboot data load
494 07:54:40.273987 fastboot data verify
495 07:54:40.278588 verify result: 266
496 07:54:40.284182 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 07:54:40.284658 LPDDR4 probe
498 07:54:40.285090 ddr clk to 1584MHz
499 07:54:40.292174 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 07:54:40.330040
501 07:54:40.330551 dmc_version 0001
502 07:54:40.337067 Check phy result
503 07:54:40.342897 INFO : End of CA training
504 07:54:40.343373 INFO : End of initialization
505 07:54:40.348583 INFO : Training has run successfully!
506 07:54:40.349075 Check phy result
507 07:54:40.354121 INFO : End of initialization
508 07:54:40.354607 INFO : End of read enable training
509 07:54:40.360173 INFO : End of fine write leveling
510 07:54:40.365316 INFO : End of Write leveling coarse delay
511 07:54:40.365813 INFO : Training has run successfully!
512 07:54:40.366266 Check phy result
513 07:54:40.370949 INFO : End of initialization
514 07:54:40.371433 INFO : End of read dq deskew training
515 07:54:40.377664 INFO : End of MPR read delay center optimization
516 07:54:40.382159 INFO : End of write delay center optimization
517 07:54:40.387930 INFO : End of read delay center optimization
518 07:54:40.388456 INFO : End of max read latency training
519 07:54:40.393642 INFO : Training has run successfully!
520 07:54:40.394136 1D training succeed
521 07:54:40.402984 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 07:54:40.450809 Check phy result
523 07:54:40.451312 INFO : End of initialization
524 07:54:40.478256 INFO : End of 2D read delay Voltage center optimization
525 07:54:40.502417 INFO : End of 2D read delay Voltage center optimization
526 07:54:40.559097 INFO : End of 2D write delay Voltage center optimization
527 07:54:40.613266 INFO : End of 2D write delay Voltage center optimization
528 07:54:40.618797 INFO : Training has run successfully!
529 07:54:40.619291
530 07:54:40.619747 channel==0
531 07:54:40.624344 RxClkDly_Margin_A0==88 ps 9
532 07:54:40.624845 TxDqDly_Margin_A0==98 ps 10
533 07:54:40.630111 RxClkDly_Margin_A1==78 ps 8
534 07:54:40.630589 TxDqDly_Margin_A1==98 ps 10
535 07:54:40.631038 TrainedVREFDQ_A0==77
536 07:54:40.635521 TrainedVREFDQ_A1==74
537 07:54:40.636026 VrefDac_Margin_A0==24
538 07:54:40.636737 DeviceVref_Margin_A0==37
539 07:54:40.641091 VrefDac_Margin_A1==23
540 07:54:40.641596 DeviceVref_Margin_A1==40
541 07:54:40.642059
542 07:54:40.642517
543 07:54:40.646707 channel==1
544 07:54:40.647204 RxClkDly_Margin_A0==78 ps 8
545 07:54:40.647667 TxDqDly_Margin_A0==98 ps 10
546 07:54:40.652284 RxClkDly_Margin_A1==88 ps 9
547 07:54:40.652785 TxDqDly_Margin_A1==88 ps 9
548 07:54:40.658040 TrainedVREFDQ_A0==77
549 07:54:40.658547 TrainedVREFDQ_A1==75
550 07:54:40.659006 VrefDac_Margin_A0==23
551 07:54:40.663486 DeviceVref_Margin_A0==37
552 07:54:40.664000 VrefDac_Margin_A1==22
553 07:54:40.669140 DeviceVref_Margin_A1==38
554 07:54:40.669713
555 07:54:40.670195 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 07:54:40.670654
557 07:54:40.702718 soc_vref_reg_value 0x 00000019 00000019 00000019 00000017 00000018 00000015 00000018 00000016 00000018 00000017 00000017 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000062
558 07:54:40.703285 2D training succeed
559 07:54:40.708337 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 07:54:40.714026 auto size-- 65535DDR cs0 size: 2048MB
561 07:54:40.714550 DDR cs1 size: 2048MB
562 07:54:40.719476 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 07:54:40.719966 cs0 DataBus test pass
564 07:54:40.725111 cs1 DataBus test pass
565 07:54:40.725626 cs0 AddrBus test pass
566 07:54:40.726086 cs1 AddrBus test pass
567 07:54:40.726539
568 07:54:40.730712 100bdlr_step_size ps== 478
569 07:54:40.731231 result report
570 07:54:40.736378 boot times 0Enable ddr reg access
571 07:54:40.741588 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 07:54:40.755430 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 07:54:41.415354 bl2z: ptr: 05129330, size: 00001e40
574 07:54:41.424191 0.0;M3 CHK:0;cm4_sp_mode 0
575 07:54:41.424727 MVN_1=0x00000000
576 07:54:41.425189 MVN_2=0x00000000
577 07:54:41.435727 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 07:54:41.436323 OPS=0x04
579 07:54:41.436791 ring efuse init
580 07:54:41.441284 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 07:54:41.441793 [0.017355 Inits done]
582 07:54:41.442246 secure task start!
583 07:54:41.448947 high task start!
584 07:54:41.449436 low task start!
585 07:54:41.449889 run into bl31
586 07:54:41.457565 NOTICE: BL31: v1.3(release):4fc40b1
587 07:54:41.465390 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 07:54:41.465909 NOTICE: BL31: G12A normal boot!
589 07:54:41.481062 NOTICE: BL31: BL33 decompress pass
590 07:54:41.486735 ERROR: Error initializing runtime service opteed_fast
591 07:54:42.849575 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 07:54:42.850392 bl2_stage_init 0x01
593 07:54:42.851033 bl2_stage_init 0x81
594 07:54:42.855173 hw id: 0x0000 - pwm id 0x01
595 07:54:42.855857 bl2_stage_init 0xc1
596 07:54:42.860713 bl2_stage_init 0x02
597 07:54:42.861256
598 07:54:42.861714 L0:00000000
599 07:54:42.862156 L1:00000703
600 07:54:42.862597 L2:00008067
601 07:54:42.863036 L3:15000000
602 07:54:42.866296 S1:00000000
603 07:54:42.866793 B2:20282000
604 07:54:42.867235 B1:a0f83180
605 07:54:42.867669
606 07:54:42.868147 TE: 71554
607 07:54:42.868587
608 07:54:42.871869 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 07:54:42.872398
610 07:54:42.877453 Board ID = 1
611 07:54:42.877959 Set cpu clk to 24M
612 07:54:42.878399 Set clk81 to 24M
613 07:54:42.883106 Use GP1_pll as DSU clk.
614 07:54:42.883658 DSU clk: 1200 Mhz
615 07:54:42.884144 CPU clk: 1200 MHz
616 07:54:42.888701 Set clk81 to 166.6M
617 07:54:42.894304 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 07:54:42.894827 board id: 1
619 07:54:42.901036 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 07:54:42.912080 fw parse done
621 07:54:42.917646 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 07:54:42.960454 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 07:54:42.971594 PIEI prepare done
624 07:54:42.972139 fastboot data load
625 07:54:42.972594 fastboot data verify
626 07:54:42.977255 verify result: 266
627 07:54:42.982813 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 07:54:42.983303 LPDDR4 probe
629 07:54:42.983744 ddr clk to 1584MHz
630 07:54:42.989943 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 07:54:43.027899
632 07:54:43.028470 dmc_version 0001
633 07:54:43.034617 Check phy result
634 07:54:43.040585 INFO : End of CA training
635 07:54:43.041083 INFO : End of initialization
636 07:54:43.046274 INFO : Training has run successfully!
637 07:54:43.046789 Check phy result
638 07:54:43.051824 INFO : End of initialization
639 07:54:43.052348 INFO : End of read enable training
640 07:54:43.057415 INFO : End of fine write leveling
641 07:54:43.063018 INFO : End of Write leveling coarse delay
642 07:54:43.063504 INFO : Training has run successfully!
643 07:54:43.063944 Check phy result
644 07:54:43.068565 INFO : End of initialization
645 07:54:43.069044 INFO : End of read dq deskew training
646 07:54:43.074258 INFO : End of MPR read delay center optimization
647 07:54:43.079806 INFO : End of write delay center optimization
648 07:54:43.085429 INFO : End of read delay center optimization
649 07:54:43.085910 INFO : End of max read latency training
650 07:54:43.091047 INFO : Training has run successfully!
651 07:54:43.091620 1D training succeed
652 07:54:43.099357 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 07:54:43.147556 Check phy result
654 07:54:43.148084 INFO : End of initialization
655 07:54:43.169792 INFO : End of 2D read delay Voltage center optimization
656 07:54:43.188713 INFO : End of 2D read delay Voltage center optimization
657 07:54:43.240233 INFO : End of 2D write delay Voltage center optimization
658 07:54:43.290538 INFO : End of 2D write delay Voltage center optimization
659 07:54:43.296040 INFO : Training has run successfully!
660 07:54:43.296625
661 07:54:43.297145 channel==0
662 07:54:43.301592 RxClkDly_Margin_A0==88 ps 9
663 07:54:43.302112 TxDqDly_Margin_A0==98 ps 10
664 07:54:43.307177 RxClkDly_Margin_A1==69 ps 7
665 07:54:43.307664 TxDqDly_Margin_A1==98 ps 10
666 07:54:43.308147 TrainedVREFDQ_A0==74
667 07:54:43.312762 TrainedVREFDQ_A1==74
668 07:54:43.313244 VrefDac_Margin_A0==24
669 07:54:43.313680 DeviceVref_Margin_A0==40
670 07:54:43.318433 VrefDac_Margin_A1==23
671 07:54:43.318923 DeviceVref_Margin_A1==40
672 07:54:43.319361
673 07:54:43.319797
674 07:54:43.324029 channel==1
675 07:54:43.324517 RxClkDly_Margin_A0==88 ps 9
676 07:54:43.324956 TxDqDly_Margin_A0==78 ps 8
677 07:54:43.329588 RxClkDly_Margin_A1==88 ps 9
678 07:54:43.330066 TxDqDly_Margin_A1==88 ps 9
679 07:54:43.335171 TrainedVREFDQ_A0==77
680 07:54:43.335659 TrainedVREFDQ_A1==75
681 07:54:43.336133 VrefDac_Margin_A0==23
682 07:54:43.340823 DeviceVref_Margin_A0==37
683 07:54:43.341306 VrefDac_Margin_A1==22
684 07:54:43.346413 DeviceVref_Margin_A1==38
685 07:54:43.346894
686 07:54:43.347336 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 07:54:43.347774
688 07:54:43.379966 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000016 00000017 dram_vref_reg_value 0x 00000062
689 07:54:43.380524 2D training succeed
690 07:54:43.385544 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 07:54:43.391209 auto size-- 65535DDR cs0 size: 2048MB
692 07:54:43.391778 DDR cs1 size: 2048MB
693 07:54:43.396922 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 07:54:43.397418 cs0 DataBus test pass
695 07:54:43.402367 cs1 DataBus test pass
696 07:54:43.402858 cs0 AddrBus test pass
697 07:54:43.403298 cs1 AddrBus test pass
698 07:54:43.403732
699 07:54:43.408007 100bdlr_step_size ps== 478
700 07:54:43.408510 result report
701 07:54:43.413572 boot times 0Enable ddr reg access
702 07:54:43.418553 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 07:54:43.431781 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 07:54:44.086032 bl2z: ptr: 05129330, size: 00001e40
705 07:54:44.093244 0.0;M3 CHK:0;cm4_sp_mode 0
706 07:54:44.093604 MVN_1=0x00000000
707 07:54:44.093824 MVN_2=0x00000000
708 07:54:44.104648 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 07:54:44.105000 OPS=0x04
710 07:54:44.105222 ring efuse init
711 07:54:44.110409 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 07:54:44.110736 [0.017310 Inits done]
713 07:54:44.110952 secure task start!
714 07:54:44.117014 high task start!
715 07:54:44.117331 low task start!
716 07:54:44.117548 run into bl31
717 07:54:44.126451 NOTICE: BL31: v1.3(release):4fc40b1
718 07:54:44.134093 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 07:54:44.134427 NOTICE: BL31: G12A normal boot!
720 07:54:44.149603 NOTICE: BL31: BL33 decompress pass
721 07:54:44.155032 ERROR: Error initializing runtime service opteed_fast
722 07:54:44.949386
723 07:54:44.949988
724 07:54:44.954879 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 07:54:44.955386
726 07:54:44.957720 Model: Libre Computer AML-S905D3-CC Solitude
727 07:54:45.104547 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 07:54:45.120660 DRAM: 2 GiB (effective 3.8 GiB)
729 07:54:45.221700 Core: 406 devices, 33 uclasses, devicetree: separate
730 07:54:45.227521 WDT: Not starting watchdog@f0d0
731 07:54:45.252470 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 07:54:45.264876 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 07:54:45.269478 ** Bad device specification mmc 0 **
734 07:54:45.279935 Card did not respond to voltage select! : -110
735 07:54:45.287605 ** Bad device specification mmc 0 **
736 07:54:45.288142 Couldn't find partition mmc 0
737 07:54:45.295916 Card did not respond to voltage select! : -110
738 07:54:45.301568 ** Bad device specification mmc 0 **
739 07:54:45.302046 Couldn't find partition mmc 0
740 07:54:45.305778 Error: could not access storage.
741 07:54:45.602472 Net: eth0: ethernet@ff3f0000
742 07:54:45.603056 starting USB...
743 07:54:45.847472 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 07:54:45.848097 Starting the controller
745 07:54:45.853997 USB XHCI 1.10
746 07:54:47.410514 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 07:54:47.418867 scanning usb for storage devices... 0 Storage Device(s) found
749 07:54:47.470419 Hit any key to stop autoboot: 1
750 07:54:47.471242 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 07:54:47.471886 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 07:54:47.472412 Setting prompt string to ['=>']
753 07:54:47.472902 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 07:54:47.484971 0
755 07:54:47.485908 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 07:54:47.587153 => setenv autoload no
758 07:54:47.588172 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 07:54:47.593316 setenv autoload no
761 07:54:47.694808 => setenv initrd_high 0xffffffff
762 07:54:47.695732 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 07:54:47.700425 setenv initrd_high 0xffffffff
765 07:54:47.801901 => setenv fdt_high 0xffffffff
766 07:54:47.802872 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 07:54:47.807465 setenv fdt_high 0xffffffff
769 07:54:47.909048 => dhcp
770 07:54:47.909935 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 07:54:47.913227 dhcp
772 07:54:49.320426 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete... done
773 07:54:49.321026 Speed: 1000, full duplex
774 07:54:49.321452 BOOTP broadcast 1
775 07:54:49.327748 DHCP client bound to address 192.168.6.21 (7 ms)
777 07:54:49.429279 => setenv serverip 192.168.6.2
778 07:54:49.430183 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
779 07:54:49.436703 setenv serverip 192.168.6.2
781 07:54:49.538186 => tftpboot 0x01080000 978592/tftp-deploy-tmmp1sxc/kernel/uImage
782 07:54:49.539060 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
783 07:54:49.545605 tftpboot 0x01080000 978592/tftp-deploy-tmmp1sxc/kernel/uImage
784 07:54:49.546100 Speed: 1000, full duplex
785 07:54:49.546516 Using ethernet@ff3f0000 device
786 07:54:49.551239 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 07:54:49.556760 Filename '978592/tftp-deploy-tmmp1sxc/kernel/uImage'.
788 07:54:49.560676 Load address: 0x1080000
789 07:54:52.435209 Loading: *################################################## 44 MiB
790 07:54:52.435832 15.3 MiB/s
791 07:54:52.436327 done
792 07:54:52.439686 Bytes transferred = 46121536 (2bfc240 hex)
794 07:54:52.541296 => tftpboot 0x08000000 978592/tftp-deploy-tmmp1sxc/ramdisk/ramdisk.cpio.gz.uboot
795 07:54:52.542003 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
796 07:54:52.548838 tftpboot 0x08000000 978592/tftp-deploy-tmmp1sxc/ramdisk/ramdisk.cpio.gz.uboot
797 07:54:52.549323 Speed: 1000, full duplex
798 07:54:52.549728 Using ethernet@ff3f0000 device
799 07:54:52.554342 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 07:54:52.564226 Filename '978592/tftp-deploy-tmmp1sxc/ramdisk/ramdisk.cpio.gz.uboot'.
801 07:54:52.564721 Load address: 0x8000000
802 07:54:53.989916 Loading: *################################################# UDP wrong checksum 00000005 00005a15
803 07:54:58.991756 T UDP wrong checksum 00000005 00005a15
804 07:55:01.952077 UDP wrong checksum 000000ff 0000a0ac
805 07:55:02.011700 UDP wrong checksum 000000ff 0000309f
806 07:55:05.226804 T UDP wrong checksum 000000ff 0000c21b
807 07:55:05.240114 UDP wrong checksum 000000ff 0000570e
808 07:55:08.993655 T UDP wrong checksum 00000005 00005a15
809 07:55:28.997699 T T T T UDP wrong checksum 00000005 00005a15
810 07:55:43.503774 T T UDP wrong checksum 000000ff 000048e6
811 07:55:43.513850 UDP wrong checksum 000000ff 0000dcd8
812 07:55:48.206563 T UDP wrong checksum 000000ff 000085d6
813 07:55:48.217121 UDP wrong checksum 000000ff 00000dc9
814 07:55:49.002316
815 07:55:49.002926 Retry count exceeded; starting again
817 07:55:49.004415 end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
820 07:55:49.006326 end: 2.4 uboot-commands (duration 00:01:21) [common]
822 07:55:49.007782 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
824 07:55:49.008949 end: 2 uboot-action (duration 00:01:21) [common]
826 07:55:49.010519 Cleaning after the job
827 07:55:49.011102 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/ramdisk
828 07:55:49.012413 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/kernel
829 07:55:49.039142 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/dtb
830 07:55:49.040540 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/nfsrootfs
831 07:55:49.314219 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/978592/tftp-deploy-tmmp1sxc/modules
832 07:55:49.334861 start: 4.1 power-off (timeout 00:00:30) [common]
833 07:55:49.335729 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
834 07:55:49.370149 >> OK - accepted request
835 07:55:49.371497 Returned 0 in 0 seconds
836 07:55:49.472477 end: 4.1 power-off (duration 00:00:00) [common]
838 07:55:49.473537 start: 4.2 read-feedback (timeout 00:10:00) [common]
839 07:55:49.474194 Listened to connection for namespace 'common' for up to 1s
840 07:55:50.475123 Finalising connection for namespace 'common'
841 07:55:50.475614 Disconnecting from shell: Finalise
842 07:55:50.475904 =>
843 07:55:50.576596 end: 4.2 read-feedback (duration 00:00:01) [common]
844 07:55:50.576969 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/978592
845 07:55:53.293975 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/978592
846 07:55:53.294590 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.