Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:13:19.590054 lava-dispatcher, installed at version: 2024.01
2 00:13:19.590849 start: 0 validate
3 00:13:19.591317 Start time: 2024-11-01 00:13:19.591289+00:00 (UTC)
4 00:13:19.591868 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:13:19.592437 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:13:19.631175 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:13:19.631737 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc5-415-g78b16920c1e2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 00:13:19.662679 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:13:19.663451 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc5-415-g78b16920c1e2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 00:13:19.696161 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:13:19.696754 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:13:19.729342 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:13:19.729842 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc5-415-g78b16920c1e2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 00:13:19.768056 validate duration: 0.18
16 00:13:19.768878 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:13:19.769196 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:13:19.769481 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:13:19.770080 Not decompressing ramdisk as can be used compressed.
20 00:13:19.770539 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:13:19.770805 saving as /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/ramdisk/initrd.cpio.gz
22 00:13:19.771076 total size: 5628169 (5 MB)
23 00:13:19.804440 progress 0 % (0 MB)
24 00:13:19.812552 progress 5 % (0 MB)
25 00:13:19.820809 progress 10 % (0 MB)
26 00:13:19.826159 progress 15 % (0 MB)
27 00:13:19.830240 progress 20 % (1 MB)
28 00:13:19.833981 progress 25 % (1 MB)
29 00:13:19.838141 progress 30 % (1 MB)
30 00:13:19.842312 progress 35 % (1 MB)
31 00:13:19.846098 progress 40 % (2 MB)
32 00:13:19.850203 progress 45 % (2 MB)
33 00:13:19.854020 progress 50 % (2 MB)
34 00:13:19.858273 progress 55 % (2 MB)
35 00:13:19.862482 progress 60 % (3 MB)
36 00:13:19.866320 progress 65 % (3 MB)
37 00:13:19.870483 progress 70 % (3 MB)
38 00:13:19.874363 progress 75 % (4 MB)
39 00:13:19.878866 progress 80 % (4 MB)
40 00:13:19.882681 progress 85 % (4 MB)
41 00:13:19.886904 progress 90 % (4 MB)
42 00:13:19.890796 progress 95 % (5 MB)
43 00:13:19.894118 progress 100 % (5 MB)
44 00:13:19.894770 5 MB downloaded in 0.12 s (43.40 MB/s)
45 00:13:19.895298 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:13:19.896203 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:13:19.896495 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:13:19.896763 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:13:19.897235 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-415-g78b16920c1e2/arm64/defconfig/gcc-12/kernel/Image
51 00:13:19.897471 saving as /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/kernel/Image
52 00:13:19.897683 total size: 45715968 (43 MB)
53 00:13:19.897910 No compression specified
54 00:13:19.933459 progress 0 % (0 MB)
55 00:13:19.962871 progress 5 % (2 MB)
56 00:13:19.992892 progress 10 % (4 MB)
57 00:13:20.023083 progress 15 % (6 MB)
58 00:13:20.053401 progress 20 % (8 MB)
59 00:13:20.083277 progress 25 % (10 MB)
60 00:13:20.113594 progress 30 % (13 MB)
61 00:13:20.144396 progress 35 % (15 MB)
62 00:13:20.174599 progress 40 % (17 MB)
63 00:13:20.204937 progress 45 % (19 MB)
64 00:13:20.234772 progress 50 % (21 MB)
65 00:13:20.265019 progress 55 % (24 MB)
66 00:13:20.295043 progress 60 % (26 MB)
67 00:13:20.324947 progress 65 % (28 MB)
68 00:13:20.355151 progress 70 % (30 MB)
69 00:13:20.385595 progress 75 % (32 MB)
70 00:13:20.415372 progress 80 % (34 MB)
71 00:13:20.444876 progress 85 % (37 MB)
72 00:13:20.475015 progress 90 % (39 MB)
73 00:13:20.504975 progress 95 % (41 MB)
74 00:13:20.533732 progress 100 % (43 MB)
75 00:13:20.534257 43 MB downloaded in 0.64 s (68.49 MB/s)
76 00:13:20.534735 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:13:20.535612 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:13:20.535889 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:13:20.536178 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:13:20.536656 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-415-g78b16920c1e2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 00:13:20.536925 saving as /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 00:13:20.537131 total size: 53209 (0 MB)
84 00:13:20.537339 No compression specified
85 00:13:20.576378 progress 61 % (0 MB)
86 00:13:20.577227 progress 100 % (0 MB)
87 00:13:20.577759 0 MB downloaded in 0.04 s (1.25 MB/s)
88 00:13:20.578241 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:13:20.579046 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:13:20.579305 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:13:20.579563 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:13:20.580040 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:13:20.580300 saving as /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/nfsrootfs/full.rootfs.tar
95 00:13:20.580504 total size: 120894716 (115 MB)
96 00:13:20.580712 Using unxz to decompress xz
97 00:13:20.617889 progress 0 % (0 MB)
98 00:13:21.408298 progress 5 % (5 MB)
99 00:13:22.249188 progress 10 % (11 MB)
100 00:13:23.047315 progress 15 % (17 MB)
101 00:13:23.783669 progress 20 % (23 MB)
102 00:13:24.373989 progress 25 % (28 MB)
103 00:13:25.199188 progress 30 % (34 MB)
104 00:13:25.989934 progress 35 % (40 MB)
105 00:13:26.334074 progress 40 % (46 MB)
106 00:13:26.706613 progress 45 % (51 MB)
107 00:13:27.440111 progress 50 % (57 MB)
108 00:13:28.414933 progress 55 % (63 MB)
109 00:13:29.293648 progress 60 % (69 MB)
110 00:13:30.045705 progress 65 % (74 MB)
111 00:13:30.820223 progress 70 % (80 MB)
112 00:13:31.651239 progress 75 % (86 MB)
113 00:13:32.453105 progress 80 % (92 MB)
114 00:13:33.211317 progress 85 % (98 MB)
115 00:13:34.058370 progress 90 % (103 MB)
116 00:13:34.829701 progress 95 % (109 MB)
117 00:13:35.655439 progress 100 % (115 MB)
118 00:13:35.667809 115 MB downloaded in 15.09 s (7.64 MB/s)
119 00:13:35.668774 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:13:35.670504 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:13:35.671065 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:13:35.671622 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:13:35.672497 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-415-g78b16920c1e2/arm64/defconfig/gcc-12/modules.tar.xz
125 00:13:35.672995 saving as /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/modules/modules.tar
126 00:13:35.673436 total size: 11602096 (11 MB)
127 00:13:35.673884 Using unxz to decompress xz
128 00:13:35.717411 progress 0 % (0 MB)
129 00:13:35.784358 progress 5 % (0 MB)
130 00:13:35.858155 progress 10 % (1 MB)
131 00:13:35.937715 progress 15 % (1 MB)
132 00:13:36.013334 progress 20 % (2 MB)
133 00:13:36.088592 progress 25 % (2 MB)
134 00:13:36.167476 progress 30 % (3 MB)
135 00:13:36.239166 progress 35 % (3 MB)
136 00:13:36.317869 progress 40 % (4 MB)
137 00:13:36.402288 progress 45 % (5 MB)
138 00:13:36.483323 progress 50 % (5 MB)
139 00:13:36.562170 progress 55 % (6 MB)
140 00:13:36.642179 progress 60 % (6 MB)
141 00:13:36.725399 progress 65 % (7 MB)
142 00:13:36.800843 progress 70 % (7 MB)
143 00:13:36.882764 progress 75 % (8 MB)
144 00:13:36.965549 progress 80 % (8 MB)
145 00:13:37.041468 progress 85 % (9 MB)
146 00:13:37.113284 progress 90 % (9 MB)
147 00:13:37.213281 progress 95 % (10 MB)
148 00:13:37.309643 progress 100 % (11 MB)
149 00:13:37.320288 11 MB downloaded in 1.65 s (6.72 MB/s)
150 00:13:37.320875 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:13:37.321725 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:13:37.321995 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 00:13:37.322258 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 00:13:54.010904 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/919196/extract-nfsrootfs-bgtf4378
156 00:13:54.011517 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 00:13:54.011800 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 00:13:54.012529 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9
159 00:13:54.012975 makedir: /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin
160 00:13:54.013299 makedir: /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/tests
161 00:13:54.013610 makedir: /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/results
162 00:13:54.013936 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-add-keys
163 00:13:54.014466 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-add-sources
164 00:13:54.014975 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-background-process-start
165 00:13:54.015463 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-background-process-stop
166 00:13:54.016008 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-common-functions
167 00:13:54.016542 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-echo-ipv4
168 00:13:54.017059 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-install-packages
169 00:13:54.017591 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-installed-packages
170 00:13:54.018118 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-os-build
171 00:13:54.018647 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-probe-channel
172 00:13:54.019130 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-probe-ip
173 00:13:54.019592 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-target-ip
174 00:13:54.020080 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-target-mac
175 00:13:54.020565 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-target-storage
176 00:13:54.021048 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-test-case
177 00:13:54.021521 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-test-event
178 00:13:54.022006 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-test-feedback
179 00:13:54.022530 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-test-raise
180 00:13:54.023005 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-test-reference
181 00:13:54.023476 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-test-runner
182 00:13:54.023949 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-test-set
183 00:13:54.024456 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-test-shell
184 00:13:54.024946 Updating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-add-keys (debian)
185 00:13:54.025469 Updating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-add-sources (debian)
186 00:13:54.025964 Updating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-install-packages (debian)
187 00:13:54.026520 Updating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-installed-packages (debian)
188 00:13:54.027021 Updating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/bin/lava-os-build (debian)
189 00:13:54.027452 Creating /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/environment
190 00:13:54.027817 LAVA metadata
191 00:13:54.028123 - LAVA_JOB_ID=919196
192 00:13:54.028341 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:13:54.028714 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 00:13:54.029668 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:13:54.029982 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 00:13:54.030189 skipped lava-vland-overlay
197 00:13:54.030425 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:13:54.030676 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 00:13:54.030893 skipped lava-multinode-overlay
200 00:13:54.031129 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:13:54.031377 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 00:13:54.031620 Loading test definitions
203 00:13:54.031891 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 00:13:54.032135 Using /lava-919196 at stage 0
205 00:13:54.033227 uuid=919196_1.6.2.4.1 testdef=None
206 00:13:54.033532 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:13:54.033792 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 00:13:54.035321 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:13:54.036128 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 00:13:54.038067 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:13:54.038879 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 00:13:54.040728 runner path: /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/0/tests/0_timesync-off test_uuid 919196_1.6.2.4.1
215 00:13:54.041318 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:13:54.042140 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 00:13:54.042361 Using /lava-919196 at stage 0
219 00:13:54.042717 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:13:54.043006 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/0/tests/1_kselftest-rtc'
221 00:13:57.446058 Running '/usr/bin/git checkout kernelci.org
222 00:13:57.810339 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 00:13:57.811816 uuid=919196_1.6.2.4.5 testdef=None
224 00:13:57.812426 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:13:57.814047 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 00:13:57.820199 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:13:57.821996 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 00:13:57.830006 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:13:57.831824 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 00:13:57.839447 runner path: /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/0/tests/1_kselftest-rtc test_uuid 919196_1.6.2.4.5
234 00:13:57.840049 BOARD='meson-sm1-s905d3-libretech-cc'
235 00:13:57.840491 BRANCH='next'
236 00:13:57.840918 SKIPFILE='/dev/null'
237 00:13:57.841346 SKIP_INSTALL='True'
238 00:13:57.841770 TESTPROG_URL='http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-415-g78b16920c1e2/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 00:13:57.842203 TST_CASENAME=''
240 00:13:57.842627 TST_CMDFILES='rtc'
241 00:13:57.843702 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:13:57.845443 Creating lava-test-runner.conf files
244 00:13:57.845881 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/919196/lava-overlay-sxi6orz9/lava-919196/0 for stage 0
245 00:13:57.846579 - 0_timesync-off
246 00:13:57.847071 - 1_kselftest-rtc
247 00:13:57.847749 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:13:57.848371 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 00:14:21.172362 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:14:21.172799 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 00:14:21.173057 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:14:21.173325 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 00:14:21.173586 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 00:14:21.789978 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:14:21.790436 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 00:14:21.790683 extracting modules file /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919196/extract-nfsrootfs-bgtf4378
257 00:14:23.149007 extracting modules file /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919196/extract-overlay-ramdisk-zz672pk9/ramdisk
258 00:14:24.580330 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:14:24.580809 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 00:14:24.581080 [common] Applying overlay to NFS
261 00:14:24.581292 [common] Applying overlay /var/lib/lava/dispatcher/tmp/919196/compress-overlay-jge456lk/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/919196/extract-nfsrootfs-bgtf4378
262 00:14:27.301507 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:14:27.301962 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 00:14:27.302232 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 00:14:27.302459 Converting downloaded kernel to a uImage
266 00:14:27.302762 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/kernel/Image /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/kernel/uImage
267 00:14:27.822528 output: Image Name:
268 00:14:27.822935 output: Created: Fri Nov 1 00:14:27 2024
269 00:14:27.823160 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:14:27.823374 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
271 00:14:27.823582 output: Load Address: 01080000
272 00:14:27.823784 output: Entry Point: 01080000
273 00:14:27.824010 output:
274 00:14:27.824354 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 00:14:27.824634 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 00:14:27.824911 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 00:14:27.825175 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:14:27.825441 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 00:14:27.825700 Building ramdisk /var/lib/lava/dispatcher/tmp/919196/extract-overlay-ramdisk-zz672pk9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/919196/extract-overlay-ramdisk-zz672pk9/ramdisk
280 00:14:30.068940 >> 166826 blocks
281 00:14:37.851394 Adding RAMdisk u-boot header.
282 00:14:37.851866 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/919196/extract-overlay-ramdisk-zz672pk9/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/919196/extract-overlay-ramdisk-zz672pk9/ramdisk.cpio.gz.uboot
283 00:14:38.099471 output: Image Name:
284 00:14:38.099917 output: Created: Fri Nov 1 00:14:37 2024
285 00:14:38.100191 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:14:38.100427 output: Data Size: 23434755 Bytes = 22885.50 KiB = 22.35 MiB
287 00:14:38.100653 output: Load Address: 00000000
288 00:14:38.100861 output: Entry Point: 00000000
289 00:14:38.101066 output:
290 00:14:38.101649 rename /var/lib/lava/dispatcher/tmp/919196/extract-overlay-ramdisk-zz672pk9/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/ramdisk/ramdisk.cpio.gz.uboot
291 00:14:38.102130 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:14:38.102760 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 00:14:38.103352 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 00:14:38.103860 No LXC device requested
295 00:14:38.104457 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:14:38.105043 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 00:14:38.105602 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:14:38.106062 Checking files for TFTP limit of 4294967296 bytes.
299 00:14:38.109053 end: 1 tftp-deploy (duration 00:01:18) [common]
300 00:14:38.109701 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:14:38.110298 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:14:38.110866 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:14:38.111440 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:14:38.112102 Using kernel file from prepare-kernel: 919196/tftp-deploy-0nymu4q7/kernel/uImage
305 00:14:38.112852 substitutions:
306 00:14:38.113366 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:14:38.113851 - {DTB_ADDR}: 0x01070000
308 00:14:38.114324 - {DTB}: 919196/tftp-deploy-0nymu4q7/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 00:14:38.114794 - {INITRD}: 919196/tftp-deploy-0nymu4q7/ramdisk/ramdisk.cpio.gz.uboot
310 00:14:38.115270 - {KERNEL_ADDR}: 0x01080000
311 00:14:38.115753 - {KERNEL}: 919196/tftp-deploy-0nymu4q7/kernel/uImage
312 00:14:38.116258 - {LAVA_MAC}: None
313 00:14:38.116771 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/919196/extract-nfsrootfs-bgtf4378
314 00:14:38.117228 - {NFS_SERVER_IP}: 192.168.6.2
315 00:14:38.117666 - {PRESEED_CONFIG}: None
316 00:14:38.118103 - {PRESEED_LOCAL}: None
317 00:14:38.118538 - {RAMDISK_ADDR}: 0x08000000
318 00:14:38.118969 - {RAMDISK}: 919196/tftp-deploy-0nymu4q7/ramdisk/ramdisk.cpio.gz.uboot
319 00:14:38.119400 - {ROOT_PART}: None
320 00:14:38.119830 - {ROOT}: None
321 00:14:38.120287 - {SERVER_IP}: 192.168.6.2
322 00:14:38.120717 - {TEE_ADDR}: 0x83000000
323 00:14:38.121148 - {TEE}: None
324 00:14:38.121574 Parsed boot commands:
325 00:14:38.121990 - setenv autoload no
326 00:14:38.122416 - setenv initrd_high 0xffffffff
327 00:14:38.122838 - setenv fdt_high 0xffffffff
328 00:14:38.123258 - dhcp
329 00:14:38.123678 - setenv serverip 192.168.6.2
330 00:14:38.124133 - tftpboot 0x01080000 919196/tftp-deploy-0nymu4q7/kernel/uImage
331 00:14:38.124572 - tftpboot 0x08000000 919196/tftp-deploy-0nymu4q7/ramdisk/ramdisk.cpio.gz.uboot
332 00:14:38.125004 - tftpboot 0x01070000 919196/tftp-deploy-0nymu4q7/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 00:14:38.125432 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/919196/extract-nfsrootfs-bgtf4378,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:14:38.125876 - bootm 0x01080000 0x08000000 0x01070000
335 00:14:38.126437 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:14:38.128111 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:14:38.128581 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 00:14:38.143953 Setting prompt string to ['lava-test: # ']
340 00:14:38.145625 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:14:38.146304 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:14:38.146959 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:14:38.147677 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:14:38.148383 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 00:14:38.184953 >> OK - accepted request
346 00:14:38.187023 Returned 0 in 0 seconds
347 00:14:38.288025 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:14:38.289878 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:14:38.290504 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:14:38.291066 Setting prompt string to ['Hit any key to stop autoboot']
352 00:14:38.291565 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:14:38.293286 Trying 192.168.56.21...
354 00:14:38.293812 Connected to conserv1.
355 00:14:38.294266 Escape character is '^]'.
356 00:14:38.294734
357 00:14:38.295187 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 00:14:38.295661
359 00:14:46.239772 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 00:14:46.240249 bl2_stage_init 0x01
361 00:14:46.240494 bl2_stage_init 0x81
362 00:14:46.245268 hw id: 0x0000 - pwm id 0x01
363 00:14:46.245666 bl2_stage_init 0xc1
364 00:14:46.250210 bl2_stage_init 0x02
365 00:14:46.250609
366 00:14:46.250959 L0:00000000
367 00:14:46.251285 L1:00000703
368 00:14:46.251527 L2:00008067
369 00:14:46.255631 L3:15000000
370 00:14:46.255918 S1:00000000
371 00:14:46.256168 B2:20282000
372 00:14:46.256396 B1:a0f83180
373 00:14:46.256603
374 00:14:46.256807 TE: 70518
375 00:14:46.257010
376 00:14:46.267054 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 00:14:46.267469
378 00:14:46.267798 Board ID = 1
379 00:14:46.268143 Set cpu clk to 24M
380 00:14:46.268464 Set clk81 to 24M
381 00:14:46.272519 Use GP1_pll as DSU clk.
382 00:14:46.272909 DSU clk: 1200 Mhz
383 00:14:46.273232 CPU clk: 1200 MHz
384 00:14:46.278136 Set clk81 to 166.6M
385 00:14:46.283622 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 00:14:46.283904 board id: 1
387 00:14:46.291646 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:14:46.302318 fw parse done
389 00:14:46.308310 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:14:46.351021 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:14:46.361919 PIEI prepare done
392 00:14:46.362395 fastboot data load
393 00:14:46.362849 fastboot data verify
394 00:14:46.367395 verify result: 266
395 00:14:46.373094 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 00:14:46.373576 LPDDR4 probe
397 00:14:46.374027 ddr clk to 1584MHz
398 00:14:46.381012 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:14:46.418195
400 00:14:46.418689 dmc_version 0001
401 00:14:46.424935 Check phy result
402 00:14:46.430869 INFO : End of CA training
403 00:14:46.431345 INFO : End of initialization
404 00:14:46.436426 INFO : Training has run successfully!
405 00:14:46.436900 Check phy result
406 00:14:46.442107 INFO : End of initialization
407 00:14:46.442580 INFO : End of read enable training
408 00:14:46.447593 INFO : End of fine write leveling
409 00:14:46.453285 INFO : End of Write leveling coarse delay
410 00:14:46.453809 INFO : Training has run successfully!
411 00:14:46.454262 Check phy result
412 00:14:46.458873 INFO : End of initialization
413 00:14:46.459345 INFO : End of read dq deskew training
414 00:14:46.464444 INFO : End of MPR read delay center optimization
415 00:14:46.470109 INFO : End of write delay center optimization
416 00:14:46.475601 INFO : End of read delay center optimization
417 00:14:46.476103 INFO : End of max read latency training
418 00:14:46.481228 INFO : Training has run successfully!
419 00:14:46.481702 1D training succeed
420 00:14:46.490447 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:14:46.538022 Check phy result
422 00:14:46.538398 INFO : End of initialization
423 00:14:46.560414 INFO : End of 2D read delay Voltage center optimization
424 00:14:46.579567 INFO : End of 2D read delay Voltage center optimization
425 00:14:46.631457 INFO : End of 2D write delay Voltage center optimization
426 00:14:46.680675 INFO : End of 2D write delay Voltage center optimization
427 00:14:46.686229 INFO : Training has run successfully!
428 00:14:46.686523
429 00:14:46.686746 channel==0
430 00:14:46.691792 RxClkDly_Margin_A0==78 ps 8
431 00:14:46.692229 TxDqDly_Margin_A0==98 ps 10
432 00:14:46.695257 RxClkDly_Margin_A1==88 ps 9
433 00:14:46.695649 TxDqDly_Margin_A1==88 ps 9
434 00:14:46.700896 TrainedVREFDQ_A0==74
435 00:14:46.701180 TrainedVREFDQ_A1==74
436 00:14:46.701395 VrefDac_Margin_A0==23
437 00:14:46.706338 DeviceVref_Margin_A0==40
438 00:14:46.706738 VrefDac_Margin_A1==23
439 00:14:46.712002 DeviceVref_Margin_A1==40
440 00:14:46.712398
441 00:14:46.712744
442 00:14:46.712986 channel==1
443 00:14:46.713196 RxClkDly_Margin_A0==78 ps 8
444 00:14:46.717606 TxDqDly_Margin_A0==98 ps 10
445 00:14:46.717999 RxClkDly_Margin_A1==88 ps 9
446 00:14:46.724780 TxDqDly_Margin_A1==88 ps 9
447 00:14:46.725190 TrainedVREFDQ_A0==78
448 00:14:46.725432 TrainedVREFDQ_A1==78
449 00:14:46.728768 VrefDac_Margin_A0==22
450 00:14:46.729043 DeviceVref_Margin_A0==36
451 00:14:46.729260 VrefDac_Margin_A1==22
452 00:14:46.734328 DeviceVref_Margin_A1==36
453 00:14:46.734723
454 00:14:46.740044 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:14:46.740445
456 00:14:46.767221 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 00:14:46.772797 2D training succeed
458 00:14:46.778432 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:14:46.778720 auto size-- 65535DDR cs0 size: 2048MB
460 00:14:46.783867 DDR cs1 size: 2048MB
461 00:14:46.784278 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:14:46.789478 cs0 DataBus test pass
463 00:14:46.789866 cs1 DataBus test pass
464 00:14:46.790101 cs0 AddrBus test pass
465 00:14:46.795090 cs1 AddrBus test pass
466 00:14:46.795361
467 00:14:46.795573 100bdlr_step_size ps== 464
468 00:14:46.800671 result report
469 00:14:46.801063 boot times 0Enable ddr reg access
470 00:14:46.808882 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:14:46.822649 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 00:14:47.477684 bl2z: ptr: 05129330, size: 00001e40
473 00:14:47.484530 0.0;M3 CHK:0;cm4_sp_mode 0
474 00:14:47.485066 MVN_1=0x00000000
475 00:14:47.485521 MVN_2=0x00000000
476 00:14:47.496082 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 00:14:47.496579 OPS=0x04
478 00:14:47.497041 ring efuse init
479 00:14:47.501590 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 00:14:47.502084 [0.017319 Inits done]
481 00:14:47.502533 secure task start!
482 00:14:47.508817 high task start!
483 00:14:47.509297 low task start!
484 00:14:47.509749 run into bl31
485 00:14:47.517387 NOTICE: BL31: v1.3(release):4fc40b1
486 00:14:47.525186 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 00:14:47.525662 NOTICE: BL31: G12A normal boot!
488 00:14:47.540631 NOTICE: BL31: BL33 decompress pass
489 00:14:47.546309 ERROR: Error initializing runtime service opteed_fast
490 00:14:48.790525 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 00:14:48.791162 bl2_stage_init 0x01
492 00:14:48.791629 bl2_stage_init 0x81
493 00:14:48.796062 hw id: 0x0000 - pwm id 0x01
494 00:14:48.796573 bl2_stage_init 0xc1
495 00:14:48.799453 bl2_stage_init 0x02
496 00:14:48.800008
497 00:14:48.800475 L0:00000000
498 00:14:48.800911 L1:00000703
499 00:14:48.805080 L2:00008067
500 00:14:48.805561 L3:15000000
501 00:14:48.805990 S1:00000000
502 00:14:48.806416 B2:20282000
503 00:14:48.806836 B1:a0f83180
504 00:14:48.807256
505 00:14:48.810606 TE: 71189
506 00:14:48.811106
507 00:14:48.816255 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 00:14:48.816733
509 00:14:48.817181 Board ID = 1
510 00:14:48.817626 Set cpu clk to 24M
511 00:14:48.821774 Set clk81 to 24M
512 00:14:48.822236 Use GP1_pll as DSU clk.
513 00:14:48.822675 DSU clk: 1200 Mhz
514 00:14:48.827414 CPU clk: 1200 MHz
515 00:14:48.827876 Set clk81 to 166.6M
516 00:14:48.833033 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 00:14:48.833501 board id: 1
518 00:14:48.842394 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 00:14:48.853106 fw parse done
520 00:14:48.859001 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 00:14:48.901793 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 00:14:48.912675 PIEI prepare done
523 00:14:48.913167 fastboot data load
524 00:14:48.913602 fastboot data verify
525 00:14:48.918200 verify result: 266
526 00:14:48.923808 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 00:14:48.924329 LPDDR4 probe
528 00:14:48.924762 ddr clk to 1584MHz
529 00:14:50.288555 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 00:14:50.289230 bl2_stage_init 0x01
531 00:14:50.289700 bl2_stage_init 0x81
532 00:14:50.294016 hw id: 0x0000 - pwm id 0x01
533 00:14:50.294503 bl2_stage_init 0xc1
534 00:14:50.299592 bl2_stage_init 0x02
535 00:14:50.300113
536 00:14:50.300580 L0:00000000
537 00:14:50.301030 L1:00000703
538 00:14:50.301470 L2:00008067
539 00:14:50.301910 L3:15000000
540 00:14:50.305269 S1:00000000
541 00:14:50.305741 B2:20282000
542 00:14:50.306185 B1:a0f83180
543 00:14:50.306625
544 00:14:50.307060 TE: 69534
545 00:14:50.307495
546 00:14:50.310767 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 00:14:50.311245
548 00:14:50.316490 Board ID = 1
549 00:14:50.316964 Set cpu clk to 24M
550 00:14:50.317409 Set clk81 to 24M
551 00:14:50.321990 Use GP1_pll as DSU clk.
552 00:14:50.322459 DSU clk: 1200 Mhz
553 00:14:50.322901 CPU clk: 1200 MHz
554 00:14:50.327578 Set clk81 to 166.6M
555 00:14:50.333172 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 00:14:50.333645 board id: 1
557 00:14:50.340377 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 00:14:50.351035 fw parse done
559 00:14:50.356967 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 00:14:50.399629 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 00:14:50.410551 PIEI prepare done
562 00:14:50.411033 fastboot data load
563 00:14:50.411482 fastboot data verify
564 00:14:50.416232 verify result: 266
565 00:14:50.421778 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 00:14:50.422245 LPDDR4 probe
567 00:14:50.422686 ddr clk to 1584MHz
568 00:14:50.429781 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 00:14:50.467033
570 00:14:50.467557 dmc_version 0001
571 00:14:50.473709 Check phy result
572 00:14:50.479626 INFO : End of CA training
573 00:14:50.480129 INFO : End of initialization
574 00:14:50.485206 INFO : Training has run successfully!
575 00:14:50.485673 Check phy result
576 00:14:50.490791 INFO : End of initialization
577 00:14:50.491257 INFO : End of read enable training
578 00:14:50.496409 INFO : End of fine write leveling
579 00:14:50.502007 INFO : End of Write leveling coarse delay
580 00:14:50.502490 INFO : Training has run successfully!
581 00:14:50.502939 Check phy result
582 00:14:50.507631 INFO : End of initialization
583 00:14:50.508139 INFO : End of read dq deskew training
584 00:14:50.513193 INFO : End of MPR read delay center optimization
585 00:14:50.518808 INFO : End of write delay center optimization
586 00:14:50.524395 INFO : End of read delay center optimization
587 00:14:50.524861 INFO : End of max read latency training
588 00:14:50.530029 INFO : Training has run successfully!
589 00:14:50.530495 1D training succeed
590 00:14:50.539204 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 00:14:50.586768 Check phy result
592 00:14:50.587249 INFO : End of initialization
593 00:14:50.609134 INFO : End of 2D read delay Voltage center optimization
594 00:14:50.628297 INFO : End of 2D read delay Voltage center optimization
595 00:14:50.680200 INFO : End of 2D write delay Voltage center optimization
596 00:14:50.729379 INFO : End of 2D write delay Voltage center optimization
597 00:14:50.734941 INFO : Training has run successfully!
598 00:14:50.735407
599 00:14:50.735854 channel==0
600 00:14:50.740616 RxClkDly_Margin_A0==88 ps 9
601 00:14:50.741082 TxDqDly_Margin_A0==98 ps 10
602 00:14:50.746164 RxClkDly_Margin_A1==88 ps 9
603 00:14:50.746627 TxDqDly_Margin_A1==98 ps 10
604 00:14:50.747072 TrainedVREFDQ_A0==74
605 00:14:50.751745 TrainedVREFDQ_A1==74
606 00:14:50.752242 VrefDac_Margin_A0==23
607 00:14:50.752684 DeviceVref_Margin_A0==40
608 00:14:50.757363 VrefDac_Margin_A1==23
609 00:14:50.757831 DeviceVref_Margin_A1==40
610 00:14:50.758278
611 00:14:50.758723
612 00:14:50.762928 channel==1
613 00:14:50.763395 RxClkDly_Margin_A0==78 ps 8
614 00:14:50.763839 TxDqDly_Margin_A0==98 ps 10
615 00:14:50.768629 RxClkDly_Margin_A1==78 ps 8
616 00:14:50.769093 TxDqDly_Margin_A1==88 ps 9
617 00:14:50.774140 TrainedVREFDQ_A0==78
618 00:14:50.774612 TrainedVREFDQ_A1==78
619 00:14:50.775062 VrefDac_Margin_A0==22
620 00:14:50.779736 DeviceVref_Margin_A0==36
621 00:14:50.780236 VrefDac_Margin_A1==22
622 00:14:50.785385 DeviceVref_Margin_A1==36
623 00:14:50.785861
624 00:14:50.786305 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 00:14:50.786747
626 00:14:50.818938 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
627 00:14:50.819455 2D training succeed
628 00:14:50.824655 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 00:14:50.830164 auto size-- 65535DDR cs0 size: 2048MB
630 00:14:50.830641 DDR cs1 size: 2048MB
631 00:14:50.835754 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 00:14:50.836271 cs0 DataBus test pass
633 00:14:50.841384 cs1 DataBus test pass
634 00:14:50.841852 cs0 AddrBus test pass
635 00:14:50.842291 cs1 AddrBus test pass
636 00:14:50.842723
637 00:14:50.846940 100bdlr_step_size ps== 478
638 00:14:50.847424 result report
639 00:14:50.852629 boot times 0Enable ddr reg access
640 00:14:50.857801 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 00:14:50.871709 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 00:14:51.526230 bl2z: ptr: 05129330, size: 00001e40
643 00:14:51.531804 0.0;M3 CHK:0;cm4_sp_mode 0
644 00:14:51.532498 MVN_1=0x00000000
645 00:14:51.533046 MVN_2=0x00000000
646 00:14:51.537330 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 00:14:51.537944 OPS=0x04
648 00:14:51.543218 ring efuse init
649 00:14:51.548833 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 00:14:51.549465 [0.017310 Inits done]
651 00:14:51.550010 secure task start!
652 00:14:51.554848 high task start!
653 00:14:51.555453 low task start!
654 00:14:51.556020 run into bl31
655 00:14:51.563448 NOTICE: BL31: v1.3(release):4fc40b1
656 00:14:51.571224 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 00:14:51.571854 NOTICE: BL31: G12A normal boot!
658 00:14:51.586794 NOTICE: BL31: BL33 decompress pass
659 00:14:51.592414 ERROR: Error initializing runtime service opteed_fast
660 00:14:52.838566 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 00:14:52.839361 bl2_stage_init 0x01
662 00:14:52.839948 bl2_stage_init 0x81
663 00:14:52.844083 hw id: 0x0000 - pwm id 0x01
664 00:14:52.844569 bl2_stage_init 0xc1
665 00:14:52.849805 bl2_stage_init 0x02
666 00:14:52.850408
667 00:14:52.850954 L0:00000000
668 00:14:52.851471 L1:00000703
669 00:14:52.852066 L2:00008067
670 00:14:52.852610 L3:15000000
671 00:14:52.855380 S1:00000000
672 00:14:52.856019 B2:20282000
673 00:14:52.856646 B1:a0f83180
674 00:14:52.857171
675 00:14:52.857702 TE: 69046
676 00:14:52.858215
677 00:14:52.860870 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 00:14:52.861353
679 00:14:52.866487 Board ID = 1
680 00:14:52.866967 Set cpu clk to 24M
681 00:14:52.867382 Set clk81 to 24M
682 00:14:52.872128 Use GP1_pll as DSU clk.
683 00:14:52.872593 DSU clk: 1200 Mhz
684 00:14:52.873001 CPU clk: 1200 MHz
685 00:14:52.877690 Set clk81 to 166.6M
686 00:14:52.883292 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 00:14:52.883754 board id: 1
688 00:14:52.890461 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 00:14:52.901145 fw parse done
690 00:14:52.907211 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 00:14:52.949665 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 00:14:52.960597 PIEI prepare done
693 00:14:52.961076 fastboot data load
694 00:14:52.961495 fastboot data verify
695 00:14:52.966187 verify result: 266
696 00:14:52.971791 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 00:14:52.972286 LPDDR4 probe
698 00:14:52.972699 ddr clk to 1584MHz
699 00:14:52.979765 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 00:14:53.017138
701 00:14:53.017612 dmc_version 0001
702 00:14:53.023696 Check phy result
703 00:14:53.029591 INFO : End of CA training
704 00:14:53.030050 INFO : End of initialization
705 00:14:53.035191 INFO : Training has run successfully!
706 00:14:53.035649 Check phy result
707 00:14:53.040812 INFO : End of initialization
708 00:14:53.041280 INFO : End of read enable training
709 00:14:53.044155 INFO : End of fine write leveling
710 00:14:53.049672 INFO : End of Write leveling coarse delay
711 00:14:53.055310 INFO : Training has run successfully!
712 00:14:53.055787 Check phy result
713 00:14:53.056227 INFO : End of initialization
714 00:14:53.060884 INFO : End of read dq deskew training
715 00:14:53.066487 INFO : End of MPR read delay center optimization
716 00:14:53.066958 INFO : End of write delay center optimization
717 00:14:53.072107 INFO : End of read delay center optimization
718 00:14:53.077706 INFO : End of max read latency training
719 00:14:53.078175 INFO : Training has run successfully!
720 00:14:53.083338 1D training succeed
721 00:14:53.089305 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 00:14:53.136828 Check phy result
723 00:14:53.137332 INFO : End of initialization
724 00:14:53.159196 INFO : End of 2D read delay Voltage center optimization
725 00:14:53.178291 INFO : End of 2D read delay Voltage center optimization
726 00:14:53.230225 INFO : End of 2D write delay Voltage center optimization
727 00:14:53.279372 INFO : End of 2D write delay Voltage center optimization
728 00:14:53.284952 INFO : Training has run successfully!
729 00:14:53.285409
730 00:14:53.285820 channel==0
731 00:14:53.290617 RxClkDly_Margin_A0==78 ps 8
732 00:14:53.291071 TxDqDly_Margin_A0==98 ps 10
733 00:14:53.296232 RxClkDly_Margin_A1==88 ps 9
734 00:14:53.296691 TxDqDly_Margin_A1==98 ps 10
735 00:14:53.297099 TrainedVREFDQ_A0==74
736 00:14:53.301809 TrainedVREFDQ_A1==75
737 00:14:53.302263 VrefDac_Margin_A0==23
738 00:14:53.302668 DeviceVref_Margin_A0==40
739 00:14:53.307386 VrefDac_Margin_A1==23
740 00:14:53.307836 DeviceVref_Margin_A1==39
741 00:14:53.308295
742 00:14:53.308698
743 00:14:53.312931 channel==1
744 00:14:53.313386 RxClkDly_Margin_A0==88 ps 9
745 00:14:53.313790 TxDqDly_Margin_A0==98 ps 10
746 00:14:53.318599 RxClkDly_Margin_A1==78 ps 8
747 00:14:53.319054 TxDqDly_Margin_A1==78 ps 8
748 00:14:53.324254 TrainedVREFDQ_A0==78
749 00:14:53.324724 TrainedVREFDQ_A1==75
750 00:14:53.325138 VrefDac_Margin_A0==22
751 00:14:53.329706 DeviceVref_Margin_A0==36
752 00:14:53.330159 VrefDac_Margin_A1==22
753 00:14:53.335416 DeviceVref_Margin_A1==39
754 00:14:53.335869
755 00:14:53.336314 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 00:14:53.336711
757 00:14:53.368936 soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 00:14:53.369439 2D training succeed
759 00:14:53.374438 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 00:14:53.380060 auto size-- 65535DDR cs0 size: 2048MB
761 00:14:53.380521 DDR cs1 size: 2048MB
762 00:14:53.385628 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 00:14:53.386081 cs0 DataBus test pass
764 00:14:53.391238 cs1 DataBus test pass
765 00:14:53.391692 cs0 AddrBus test pass
766 00:14:53.392128 cs1 AddrBus test pass
767 00:14:53.392531
768 00:14:53.396841 100bdlr_step_size ps== 478
769 00:14:53.397308 result report
770 00:14:53.402464 boot times 0Enable ddr reg access
771 00:14:53.407691 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 00:14:53.421522 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 00:14:54.076569 bl2z: ptr: 05129330, size: 00001e40
774 00:14:54.083375 0.0;M3 CHK:0;cm4_sp_mode 0
775 00:14:54.083878 MVN_1=0x00000000
776 00:14:54.084329 MVN_2=0x00000000
777 00:14:54.094878 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 00:14:54.095390 OPS=0x04
779 00:14:54.095788 ring efuse init
780 00:14:54.100434 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 00:14:54.100897 [0.017310 Inits done]
782 00:14:54.101290 secure task start!
783 00:14:54.107688 high task start!
784 00:14:54.108178 low task start!
785 00:14:54.108600 run into bl31
786 00:14:54.116361 NOTICE: BL31: v1.3(release):4fc40b1
787 00:14:54.124240 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 00:14:54.124716 NOTICE: BL31: G12A normal boot!
789 00:14:54.139785 NOTICE: BL31: BL33 decompress pass
790 00:14:54.145454 ERROR: Error initializing runtime service opteed_fast
791 00:14:54.940968
792 00:14:54.941573
793 00:14:54.946334 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 00:14:54.946806
795 00:14:54.949779 Model: Libre Computer AML-S905D3-CC Solitude
796 00:14:55.096890 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 00:14:55.112268 DRAM: 2 GiB (effective 3.8 GiB)
798 00:14:55.213252 Core: 406 devices, 33 uclasses, devicetree: separate
799 00:14:55.219088 WDT: Not starting watchdog@f0d0
800 00:14:55.244180 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 00:14:55.256361 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 00:14:55.261403 ** Bad device specification mmc 0 **
803 00:14:55.271376 Card did not respond to voltage select! : -110
804 00:14:55.279034 ** Bad device specification mmc 0 **
805 00:14:55.279528 Couldn't find partition mmc 0
806 00:14:55.287447 Card did not respond to voltage select! : -110
807 00:14:55.292893 ** Bad device specification mmc 0 **
808 00:14:55.293421 Couldn't find partition mmc 0
809 00:14:55.297986 Error: could not access storage.
810 00:14:55.594465 Net: eth0: ethernet@ff3f0000
811 00:14:55.595084 starting USB...
812 00:14:55.839110 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 00:14:55.839736 Starting the controller
814 00:14:55.846050 USB XHCI 1.10
815 00:14:57.400334 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 00:14:57.408724 scanning usb for storage devices... 0 Storage Device(s) found
818 00:14:57.460192 Hit any key to stop autoboot: 1
819 00:14:57.461248 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 00:14:57.461860 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 00:14:57.462333 Setting prompt string to ['=>']
822 00:14:57.462818 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 00:14:57.474756 0
824 00:14:57.475631 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 00:14:57.576857 => setenv autoload no
827 00:14:57.577731 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 00:14:57.582712 setenv autoload no
830 00:14:57.684142 => setenv initrd_high 0xffffffff
831 00:14:57.684990 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
832 00:14:57.689194 setenv initrd_high 0xffffffff
834 00:14:57.790590 => setenv fdt_high 0xffffffff
835 00:14:57.791428 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
836 00:14:57.795743 setenv fdt_high 0xffffffff
838 00:14:57.897206 => dhcp
839 00:14:57.897889 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
840 00:14:57.901970 dhcp
841 00:14:58.407490 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 00:14:58.408085 Speed: 1000, full duplex
843 00:14:58.408494 BOOTP broadcast 1
844 00:14:58.416813 DHCP client bound to address 192.168.6.21 (8 ms)
846 00:14:58.518207 => setenv serverip 192.168.6.2
847 00:14:58.518878 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
848 00:14:58.523472 setenv serverip 192.168.6.2
850 00:14:58.624853 => tftpboot 0x01080000 919196/tftp-deploy-0nymu4q7/kernel/uImage
851 00:14:58.625501 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
852 00:14:58.632263 tftpboot 0x01080000 919196/tftp-deploy-0nymu4q7/kernel/uImage
853 00:14:58.632723 Speed: 1000, full duplex
854 00:14:58.633113 Using ethernet@ff3f0000 device
855 00:14:58.637847 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
856 00:14:58.643277 Filename '919196/tftp-deploy-0nymu4q7/kernel/uImage'.
857 00:14:58.647175 Load address: 0x1080000
858 00:15:01.467354 Loading: *################################################## 43.6 MiB
859 00:15:01.468020 15.4 MiB/s
860 00:15:01.468458 done
861 00:15:01.471768 Bytes transferred = 45716032 (2b99240 hex)
863 00:15:01.573331 => tftpboot 0x08000000 919196/tftp-deploy-0nymu4q7/ramdisk/ramdisk.cpio.gz.uboot
864 00:15:01.574123 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
865 00:15:01.580919 tftpboot 0x08000000 919196/tftp-deploy-0nymu4q7/ramdisk/ramdisk.cpio.gz.uboot
866 00:15:01.581396 Speed: 1000, full duplex
867 00:15:01.581794 Using ethernet@ff3f0000 device
868 00:15:01.586465 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
869 00:15:01.596242 Filename '919196/tftp-deploy-0nymu4q7/ramdisk/ramdisk.cpio.gz.uboot'.
870 00:15:01.596730 Load address: 0x8000000
871 00:15:03.068862 Loading: *################################################# UDP wrong checksum 00000005 0000d949
872 00:15:08.071116 T UDP wrong checksum 00000005 0000d949
873 00:15:15.912446 T UDP wrong checksum 000000ff 00000144
874 00:15:15.966052 UDP wrong checksum 000000ff 00009a36
875 00:15:18.072260 UDP wrong checksum 00000005 0000d949
876 00:15:38.077076 T T T T T UDP wrong checksum 00000005 0000d949
877 00:15:45.365000 T UDP wrong checksum 000000ff 00005591
878 00:15:45.378256 UDP wrong checksum 000000ff 0000eb83
879 00:15:47.357691 UDP wrong checksum 000000ff 00006c20
880 00:15:47.397643 UDP wrong checksum 000000ff 0000f212
881 00:15:58.081589 T T
882 00:15:58.082099 Retry count exceeded; starting again
884 00:15:58.083147 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
887 00:15:58.084381 end: 2.4 uboot-commands (duration 00:01:20) [common]
889 00:15:58.085266 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
891 00:15:58.085944 end: 2 uboot-action (duration 00:01:20) [common]
893 00:15:58.086954 Cleaning after the job
894 00:15:58.087339 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/ramdisk
895 00:15:58.088496 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/kernel
896 00:15:58.097205 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/dtb
897 00:15:58.098137 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/nfsrootfs
898 00:15:58.136992 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919196/tftp-deploy-0nymu4q7/modules
899 00:15:58.145833 start: 4.1 power-off (timeout 00:00:30) [common]
900 00:15:58.146581 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
901 00:15:58.180422 >> OK - accepted request
902 00:15:58.182478 Returned 0 in 0 seconds
903 00:15:58.283432 end: 4.1 power-off (duration 00:00:00) [common]
905 00:15:58.284895 start: 4.2 read-feedback (timeout 00:10:00) [common]
906 00:15:58.285808 Listened to connection for namespace 'common' for up to 1s
907 00:15:59.285623 Finalising connection for namespace 'common'
908 00:15:59.286284 Disconnecting from shell: Finalise
909 00:15:59.286605 =>
910 00:15:59.387296 end: 4.2 read-feedback (duration 00:00:01) [common]
911 00:15:59.387770 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/919196
912 00:16:02.476120 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/919196
913 00:16:02.476737 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.