Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:23:33.407801 lava-dispatcher, installed at version: 2024.01
2 02:23:33.408671 start: 0 validate
3 02:23:33.409163 Start time: 2024-11-04 02:23:33.409131+00:00 (UTC)
4 02:23:33.409726 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:23:33.410271 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:23:33.449456 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:23:33.450017 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc5-576-g10616629aaf32%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:23:33.481600 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:23:33.482288 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc5-576-g10616629aaf32%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:23:33.513085 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:23:33.513621 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:23:33.542559 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:23:33.543102 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc5-576-g10616629aaf32%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:23:33.579064 validate duration: 0.17
16 02:23:33.579909 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:23:33.580260 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:23:33.580571 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:23:33.581185 Not decompressing ramdisk as can be used compressed.
20 02:23:33.581647 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 02:23:33.581919 saving as /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/ramdisk/initrd.cpio.gz
22 02:23:33.582177 total size: 5628140 (5 MB)
23 02:23:33.614954 progress 0 % (0 MB)
24 02:23:33.619072 progress 5 % (0 MB)
25 02:23:33.623474 progress 10 % (0 MB)
26 02:23:33.627304 progress 15 % (0 MB)
27 02:23:33.631441 progress 20 % (1 MB)
28 02:23:33.635197 progress 25 % (1 MB)
29 02:23:33.639386 progress 30 % (1 MB)
30 02:23:33.643505 progress 35 % (1 MB)
31 02:23:33.647263 progress 40 % (2 MB)
32 02:23:33.651396 progress 45 % (2 MB)
33 02:23:33.655128 progress 50 % (2 MB)
34 02:23:33.659200 progress 55 % (2 MB)
35 02:23:33.663371 progress 60 % (3 MB)
36 02:23:33.667062 progress 65 % (3 MB)
37 02:23:33.671109 progress 70 % (3 MB)
38 02:23:33.674909 progress 75 % (4 MB)
39 02:23:33.679043 progress 80 % (4 MB)
40 02:23:33.682679 progress 85 % (4 MB)
41 02:23:33.686614 progress 90 % (4 MB)
42 02:23:33.690391 progress 95 % (5 MB)
43 02:23:33.693704 progress 100 % (5 MB)
44 02:23:33.694357 5 MB downloaded in 0.11 s (47.86 MB/s)
45 02:23:33.694946 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:23:33.695835 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:23:33.696147 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:23:33.696416 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:23:33.696908 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-576-g10616629aaf32/arm64/defconfig/gcc-12/kernel/Image
51 02:23:33.697167 saving as /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/kernel/Image
52 02:23:33.697376 total size: 45715968 (43 MB)
53 02:23:33.697587 No compression specified
54 02:23:33.738020 progress 0 % (0 MB)
55 02:23:33.766683 progress 5 % (2 MB)
56 02:23:33.794603 progress 10 % (4 MB)
57 02:23:33.822825 progress 15 % (6 MB)
58 02:23:33.850918 progress 20 % (8 MB)
59 02:23:33.878658 progress 25 % (10 MB)
60 02:23:33.906724 progress 30 % (13 MB)
61 02:23:33.934940 progress 35 % (15 MB)
62 02:23:33.962976 progress 40 % (17 MB)
63 02:23:33.990731 progress 45 % (19 MB)
64 02:23:34.019319 progress 50 % (21 MB)
65 02:23:34.047543 progress 55 % (24 MB)
66 02:23:34.075612 progress 60 % (26 MB)
67 02:23:34.103340 progress 65 % (28 MB)
68 02:23:34.131659 progress 70 % (30 MB)
69 02:23:34.159701 progress 75 % (32 MB)
70 02:23:34.187586 progress 80 % (34 MB)
71 02:23:34.215352 progress 85 % (37 MB)
72 02:23:34.243238 progress 90 % (39 MB)
73 02:23:34.271218 progress 95 % (41 MB)
74 02:23:34.298553 progress 100 % (43 MB)
75 02:23:34.299129 43 MB downloaded in 0.60 s (72.45 MB/s)
76 02:23:34.299602 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:23:34.300458 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:23:34.300734 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:23:34.300999 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:23:34.301458 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-576-g10616629aaf32/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 02:23:34.301729 saving as /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/dtb/meson-g12b-a311d-libretech-cc.dtb
83 02:23:34.301939 total size: 54703 (0 MB)
84 02:23:34.302150 No compression specified
85 02:23:34.348195 progress 59 % (0 MB)
86 02:23:34.349062 progress 100 % (0 MB)
87 02:23:34.349607 0 MB downloaded in 0.05 s (1.09 MB/s)
88 02:23:34.350099 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:23:34.350916 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:23:34.351181 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:23:34.351445 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:23:34.351961 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 02:23:34.352253 saving as /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/nfsrootfs/full.rootfs.tar
95 02:23:34.352459 total size: 474398908 (452 MB)
96 02:23:34.352669 Using unxz to decompress xz
97 02:23:34.385827 progress 0 % (0 MB)
98 02:23:35.488114 progress 5 % (22 MB)
99 02:23:36.926241 progress 10 % (45 MB)
100 02:23:37.368836 progress 15 % (67 MB)
101 02:23:38.222479 progress 20 % (90 MB)
102 02:23:38.792331 progress 25 % (113 MB)
103 02:23:39.156114 progress 30 % (135 MB)
104 02:23:39.789554 progress 35 % (158 MB)
105 02:23:40.631318 progress 40 % (181 MB)
106 02:23:41.388694 progress 45 % (203 MB)
107 02:23:42.068789 progress 50 % (226 MB)
108 02:23:42.713040 progress 55 % (248 MB)
109 02:23:43.936878 progress 60 % (271 MB)
110 02:23:45.347973 progress 65 % (294 MB)
111 02:23:46.936090 progress 70 % (316 MB)
112 02:23:50.031039 progress 75 % (339 MB)
113 02:23:52.452904 progress 80 % (361 MB)
114 02:23:55.336315 progress 85 % (384 MB)
115 02:23:58.506036 progress 90 % (407 MB)
116 02:24:01.768560 progress 95 % (429 MB)
117 02:24:04.952341 progress 100 % (452 MB)
118 02:24:04.965233 452 MB downloaded in 30.61 s (14.78 MB/s)
119 02:24:04.965838 end: 1.4.1 http-download (duration 00:00:31) [common]
121 02:24:04.966719 end: 1.4 download-retry (duration 00:00:31) [common]
122 02:24:04.967008 start: 1.5 download-retry (timeout 00:09:29) [common]
123 02:24:04.967295 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 02:24:04.968062 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-576-g10616629aaf32/arm64/defconfig/gcc-12/modules.tar.xz
125 02:24:04.968489 saving as /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/modules/modules.tar
126 02:24:04.968744 total size: 11610988 (11 MB)
127 02:24:04.968971 Using unxz to decompress xz
128 02:24:05.010999 progress 0 % (0 MB)
129 02:24:05.077433 progress 5 % (0 MB)
130 02:24:05.153676 progress 10 % (1 MB)
131 02:24:05.249679 progress 15 % (1 MB)
132 02:24:05.341571 progress 20 % (2 MB)
133 02:24:05.421092 progress 25 % (2 MB)
134 02:24:05.497139 progress 30 % (3 MB)
135 02:24:05.576111 progress 35 % (3 MB)
136 02:24:05.648940 progress 40 % (4 MB)
137 02:24:05.725401 progress 45 % (5 MB)
138 02:24:05.811494 progress 50 % (5 MB)
139 02:24:05.888743 progress 55 % (6 MB)
140 02:24:05.974835 progress 60 % (6 MB)
141 02:24:06.056191 progress 65 % (7 MB)
142 02:24:06.136559 progress 70 % (7 MB)
143 02:24:06.215084 progress 75 % (8 MB)
144 02:24:06.297944 progress 80 % (8 MB)
145 02:24:06.377034 progress 85 % (9 MB)
146 02:24:06.454830 progress 90 % (9 MB)
147 02:24:06.531735 progress 95 % (10 MB)
148 02:24:06.608051 progress 100 % (11 MB)
149 02:24:06.619388 11 MB downloaded in 1.65 s (6.71 MB/s)
150 02:24:06.620128 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:24:06.621776 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:24:06.622309 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 02:24:06.622829 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 02:24:21.851509 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/932132/extract-nfsrootfs-qd37wute
156 02:24:21.852131 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 02:24:21.852458 start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
158 02:24:21.853230 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali
159 02:24:21.853745 makedir: /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin
160 02:24:21.854158 makedir: /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/tests
161 02:24:21.854569 makedir: /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/results
162 02:24:21.854931 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-add-keys
163 02:24:21.855468 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-add-sources
164 02:24:21.855976 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-background-process-start
165 02:24:21.856510 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-background-process-stop
166 02:24:21.857060 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-common-functions
167 02:24:21.857576 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-echo-ipv4
168 02:24:21.858051 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-install-packages
169 02:24:21.858525 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-installed-packages
170 02:24:21.858988 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-os-build
171 02:24:21.859461 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-probe-channel
172 02:24:21.859925 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-probe-ip
173 02:24:21.860443 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-target-ip
174 02:24:21.860917 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-target-mac
175 02:24:21.861382 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-target-storage
176 02:24:21.861861 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-test-case
177 02:24:21.862333 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-test-event
178 02:24:21.862796 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-test-feedback
179 02:24:21.863264 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-test-raise
180 02:24:21.863722 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-test-reference
181 02:24:21.864235 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-test-runner
182 02:24:21.864740 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-test-set
183 02:24:21.865300 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-test-shell
184 02:24:21.865801 Updating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-install-packages (oe)
185 02:24:21.866322 Updating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/bin/lava-installed-packages (oe)
186 02:24:21.866758 Creating /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/environment
187 02:24:21.867125 LAVA metadata
188 02:24:21.867378 - LAVA_JOB_ID=932132
189 02:24:21.867593 - LAVA_DISPATCHER_IP=192.168.6.2
190 02:24:21.867944 start: 1.6.2.1 ssh-authorize (timeout 00:09:12) [common]
191 02:24:21.868944 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 02:24:21.869254 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:12) [common]
193 02:24:21.869462 skipped lava-vland-overlay
194 02:24:21.869703 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 02:24:21.869955 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:12) [common]
196 02:24:21.870172 skipped lava-multinode-overlay
197 02:24:21.870412 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 02:24:21.870662 start: 1.6.2.4 test-definition (timeout 00:09:12) [common]
199 02:24:21.870908 Loading test definitions
200 02:24:21.871183 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:12) [common]
201 02:24:21.871402 Using /lava-932132 at stage 0
202 02:24:21.872592 uuid=932132_1.6.2.4.1 testdef=None
203 02:24:21.872894 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 02:24:21.873154 start: 1.6.2.4.2 test-overlay (timeout 00:09:12) [common]
205 02:24:21.874854 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 02:24:21.875636 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:12) [common]
208 02:24:21.877772 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 02:24:21.878598 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:12) [common]
211 02:24:21.880698 runner path: /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 932132_1.6.2.4.1
212 02:24:21.881327 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 02:24:21.882084 Creating lava-test-runner.conf files
215 02:24:21.882287 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/932132/lava-overlay-2rrmnali/lava-932132/0 for stage 0
216 02:24:21.882621 - 0_v4l2-decoder-conformance-h264
217 02:24:21.882956 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 02:24:21.883222 start: 1.6.2.5 compress-overlay (timeout 00:09:12) [common]
219 02:24:21.904397 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 02:24:21.904756 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:12) [common]
221 02:24:21.905014 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 02:24:21.905275 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 02:24:21.905535 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:12) [common]
224 02:24:22.584677 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 02:24:22.585131 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 02:24:22.585399 extracting modules file /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/932132/extract-nfsrootfs-qd37wute
227 02:24:23.998931 extracting modules file /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/932132/extract-overlay-ramdisk-krp5_0qg/ramdisk
228 02:24:25.392830 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 02:24:25.393300 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 02:24:25.393592 [common] Applying overlay to NFS
231 02:24:25.393816 [common] Applying overlay /var/lib/lava/dispatcher/tmp/932132/compress-overlay-cam82gvh/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/932132/extract-nfsrootfs-qd37wute
232 02:24:25.422857 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 02:24:25.423253 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 02:24:25.423542 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 02:24:25.423779 Converting downloaded kernel to a uImage
236 02:24:25.424122 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/kernel/Image /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/kernel/uImage
237 02:24:25.895064 output: Image Name:
238 02:24:25.895492 output: Created: Mon Nov 4 02:24:25 2024
239 02:24:25.895719 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 02:24:25.895935 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
241 02:24:25.896183 output: Load Address: 01080000
242 02:24:25.896393 output: Entry Point: 01080000
243 02:24:25.896594 output:
244 02:24:25.896935 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 02:24:25.897211 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 02:24:25.897489 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 02:24:25.897752 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 02:24:25.898017 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 02:24:25.898281 Building ramdisk /var/lib/lava/dispatcher/tmp/932132/extract-overlay-ramdisk-krp5_0qg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/932132/extract-overlay-ramdisk-krp5_0qg/ramdisk
250 02:24:28.308827 >> 166828 blocks
251 02:24:36.184104 Adding RAMdisk u-boot header.
252 02:24:36.184758 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/932132/extract-overlay-ramdisk-krp5_0qg/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/932132/extract-overlay-ramdisk-krp5_0qg/ramdisk.cpio.gz.uboot
253 02:24:36.423379 output: Image Name:
254 02:24:36.423794 output: Created: Mon Nov 4 02:24:36 2024
255 02:24:36.424102 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 02:24:36.424521 output: Data Size: 23432887 Bytes = 22883.68 KiB = 22.35 MiB
257 02:24:36.424921 output: Load Address: 00000000
258 02:24:36.425329 output: Entry Point: 00000000
259 02:24:36.425722 output:
260 02:24:36.426756 rename /var/lib/lava/dispatcher/tmp/932132/extract-overlay-ramdisk-krp5_0qg/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/ramdisk/ramdisk.cpio.gz.uboot
261 02:24:36.427464 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 02:24:36.428037 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 02:24:36.428598 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 02:24:36.429049 No LXC device requested
265 02:24:36.429556 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 02:24:36.430065 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 02:24:36.430555 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 02:24:36.430962 Checking files for TFTP limit of 4294967296 bytes.
269 02:24:36.433643 end: 1 tftp-deploy (duration 00:01:03) [common]
270 02:24:36.434214 start: 2 uboot-action (timeout 00:05:00) [common]
271 02:24:36.434739 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 02:24:36.435233 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 02:24:36.435730 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 02:24:36.436304 Using kernel file from prepare-kernel: 932132/tftp-deploy-cj_u1loj/kernel/uImage
275 02:24:36.436932 substitutions:
276 02:24:36.437332 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 02:24:36.437729 - {DTB_ADDR}: 0x01070000
278 02:24:36.438123 - {DTB}: 932132/tftp-deploy-cj_u1loj/dtb/meson-g12b-a311d-libretech-cc.dtb
279 02:24:36.438516 - {INITRD}: 932132/tftp-deploy-cj_u1loj/ramdisk/ramdisk.cpio.gz.uboot
280 02:24:36.438908 - {KERNEL_ADDR}: 0x01080000
281 02:24:36.439293 - {KERNEL}: 932132/tftp-deploy-cj_u1loj/kernel/uImage
282 02:24:36.439681 - {LAVA_MAC}: None
283 02:24:36.440135 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/932132/extract-nfsrootfs-qd37wute
284 02:24:36.440534 - {NFS_SERVER_IP}: 192.168.6.2
285 02:24:36.440924 - {PRESEED_CONFIG}: None
286 02:24:36.441310 - {PRESEED_LOCAL}: None
287 02:24:36.441694 - {RAMDISK_ADDR}: 0x08000000
288 02:24:36.442077 - {RAMDISK}: 932132/tftp-deploy-cj_u1loj/ramdisk/ramdisk.cpio.gz.uboot
289 02:24:36.442462 - {ROOT_PART}: None
290 02:24:36.442845 - {ROOT}: None
291 02:24:36.443226 - {SERVER_IP}: 192.168.6.2
292 02:24:36.443610 - {TEE_ADDR}: 0x83000000
293 02:24:36.444014 - {TEE}: None
294 02:24:36.444403 Parsed boot commands:
295 02:24:36.444775 - setenv autoload no
296 02:24:36.445156 - setenv initrd_high 0xffffffff
297 02:24:36.445539 - setenv fdt_high 0xffffffff
298 02:24:36.445918 - dhcp
299 02:24:36.446296 - setenv serverip 192.168.6.2
300 02:24:36.446673 - tftpboot 0x01080000 932132/tftp-deploy-cj_u1loj/kernel/uImage
301 02:24:36.447055 - tftpboot 0x08000000 932132/tftp-deploy-cj_u1loj/ramdisk/ramdisk.cpio.gz.uboot
302 02:24:36.447434 - tftpboot 0x01070000 932132/tftp-deploy-cj_u1loj/dtb/meson-g12b-a311d-libretech-cc.dtb
303 02:24:36.447815 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/932132/extract-nfsrootfs-qd37wute,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 02:24:36.448234 - bootm 0x01080000 0x08000000 0x01070000
305 02:24:36.448718 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 02:24:36.450175 start: 2.3 connect-device (timeout 00:05:00) [common]
308 02:24:36.450588 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 02:24:36.464931 Setting prompt string to ['lava-test: # ']
310 02:24:36.466409 end: 2.3 connect-device (duration 00:00:00) [common]
311 02:24:36.466987 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 02:24:36.467525 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 02:24:36.468082 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 02:24:36.469228 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 02:24:36.503474 >> OK - accepted request
316 02:24:36.505301 Returned 0 in 0 seconds
317 02:24:36.606363 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 02:24:36.607915 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 02:24:36.608521 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 02:24:36.609044 Setting prompt string to ['Hit any key to stop autoboot']
322 02:24:36.609497 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 02:24:36.611021 Trying 192.168.56.21...
324 02:24:36.611500 Connected to conserv1.
325 02:24:36.611922 Escape character is '^]'.
326 02:24:36.612371
327 02:24:36.612786 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 02:24:36.613200
329 02:24:48.230521 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
330 02:24:48.231449 bl2_stage_init 0x81
331 02:24:48.235940 hw id: 0x0000 - pwm id 0x01
332 02:24:48.236676 bl2_stage_init 0xc1
333 02:24:48.237328 bl2_stage_init 0x02
334 02:24:48.237918
335 02:24:48.241619 L0:00000000
336 02:24:48.242291 L1:20000703
337 02:24:48.242901 L2:00008067
338 02:24:48.243530 L3:14000000
339 02:24:48.244178 B2:00402000
340 02:24:48.247318 B1:e0f83180
341 02:24:48.248024
342 02:24:48.248629 TE: 58150
343 02:24:48.249255
344 02:24:48.252677 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
345 02:24:48.253361
346 02:24:48.253966 Board ID = 1
347 02:24:48.258403 Set A53 clk to 24M
348 02:24:48.259069 Set A73 clk to 24M
349 02:24:48.259667 Set clk81 to 24M
350 02:24:48.264018 A53 clk: 1200 MHz
351 02:24:48.264696 A73 clk: 1200 MHz
352 02:24:48.265286 CLK81: 166.6M
353 02:24:48.265866 smccc: 00012aac
354 02:24:48.269482 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
355 02:24:48.275160 board id: 1
356 02:24:48.281089 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
357 02:24:48.291385 fw parse done
358 02:24:48.297376 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
359 02:24:48.340165 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
360 02:24:48.350993 PIEI prepare done
361 02:24:48.351634 fastboot data load
362 02:24:48.352318 fastboot data verify
363 02:24:48.356640 verify result: 266
364 02:24:48.362290 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
365 02:24:48.362986 LPDDR4 probe
366 02:24:48.363587 ddr clk to 1584MHz
367 02:24:48.370219 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
368 02:24:48.407506
369 02:24:48.408244 dmc_version 0001
370 02:24:48.414256 Check phy result
371 02:24:48.420124 INFO : End of CA training
372 02:24:48.420802 INFO : End of initialization
373 02:24:48.425655 INFO : Training has run successfully!
374 02:24:48.426291 Check phy result
375 02:24:48.431234 INFO : End of initialization
376 02:24:48.431861 INFO : End of read enable training
377 02:24:48.434562 INFO : End of fine write leveling
378 02:24:48.440265 INFO : End of Write leveling coarse delay
379 02:24:48.445613 INFO : Training has run successfully!
380 02:24:48.446079 Check phy result
381 02:24:48.446483 INFO : End of initialization
382 02:24:48.451275 INFO : End of read dq deskew training
383 02:24:48.454807 INFO : End of MPR read delay center optimization
384 02:24:48.460349 INFO : End of write delay center optimization
385 02:24:48.465994 INFO : End of read delay center optimization
386 02:24:48.466643 INFO : End of max read latency training
387 02:24:48.471521 INFO : Training has run successfully!
388 02:24:48.472017 1D training succeed
389 02:24:48.479630 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 02:24:48.527317 Check phy result
391 02:24:48.528008 INFO : End of initialization
392 02:24:48.548902 INFO : End of 2D read delay Voltage center optimization
393 02:24:48.569297 INFO : End of 2D read delay Voltage center optimization
394 02:24:48.621495 INFO : End of 2D write delay Voltage center optimization
395 02:24:48.670706 INFO : End of 2D write delay Voltage center optimization
396 02:24:48.676341 INFO : Training has run successfully!
397 02:24:48.676954
398 02:24:48.677551 channel==0
399 02:24:48.681888 RxClkDly_Margin_A0==88 ps 9
400 02:24:48.682505 TxDqDly_Margin_A0==98 ps 10
401 02:24:48.687486 RxClkDly_Margin_A1==88 ps 9
402 02:24:48.688125 TxDqDly_Margin_A1==98 ps 10
403 02:24:48.688736 TrainedVREFDQ_A0==74
404 02:24:48.693064 TrainedVREFDQ_A1==74
405 02:24:48.693674 VrefDac_Margin_A0==25
406 02:24:48.694266 DeviceVref_Margin_A0==40
407 02:24:48.698668 VrefDac_Margin_A1==25
408 02:24:48.699277 DeviceVref_Margin_A1==40
409 02:24:48.699869
410 02:24:48.700471
411 02:24:48.704314 channel==1
412 02:24:48.704930 RxClkDly_Margin_A0==98 ps 10
413 02:24:48.705525 TxDqDly_Margin_A0==88 ps 9
414 02:24:48.709887 RxClkDly_Margin_A1==98 ps 10
415 02:24:48.710491 TxDqDly_Margin_A1==88 ps 9
416 02:24:48.715381 TrainedVREFDQ_A0==76
417 02:24:48.716074 TrainedVREFDQ_A1==77
418 02:24:48.716642 VrefDac_Margin_A0==22
419 02:24:48.720974 DeviceVref_Margin_A0==38
420 02:24:48.721627 VrefDac_Margin_A1==23
421 02:24:48.726595 DeviceVref_Margin_A1==37
422 02:24:48.727203
423 02:24:48.727814 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
424 02:24:48.728411
425 02:24:48.760217 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
426 02:24:48.760778 2D training succeed
427 02:24:48.765708 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
428 02:24:48.771388 auto size-- 65535DDR cs0 size: 2048MB
429 02:24:48.771846 DDR cs1 size: 2048MB
430 02:24:48.776966 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
431 02:24:48.777618 cs0 DataBus test pass
432 02:24:48.782605 cs1 DataBus test pass
433 02:24:48.783212 cs0 AddrBus test pass
434 02:24:48.783811 cs1 AddrBus test pass
435 02:24:48.784403
436 02:24:48.788271 100bdlr_step_size ps== 420
437 02:24:48.788735 result report
438 02:24:48.793684 boot times 0Enable ddr reg access
439 02:24:48.799095 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
440 02:24:48.812604 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
441 02:24:49.386328 0.0;M3 CHK:0;cm4_sp_mode 0
442 02:24:49.387197 MVN_1=0x00000000
443 02:24:49.391672 MVN_2=0x00000000
444 02:24:49.397483 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
445 02:24:49.398163 OPS=0x10
446 02:24:49.398765 ring efuse init
447 02:24:49.399348 chipver efuse init
448 02:24:49.405753 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
449 02:24:49.406431 [0.018960 Inits done]
450 02:24:49.407015 secure task start!
451 02:24:49.413255 high task start!
452 02:24:49.413910 low task start!
453 02:24:49.414498 run into bl31
454 02:24:49.420010 NOTICE: BL31: v1.3(release):4fc40b1
455 02:24:49.427714 NOTICE: BL31: Built : 15:58:17, May 22 2019
456 02:24:49.428422 NOTICE: BL31: G12A normal boot!
457 02:24:49.453207 NOTICE: BL31: BL33 decompress pass
458 02:24:49.458778 ERROR: Error initializing runtime service opteed_fast
459 02:24:50.691620
460 02:24:50.692235
461 02:24:50.700011 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
462 02:24:50.700458
463 02:24:50.700863 Model: Libre Computer AML-A311D-CC Alta
464 02:24:50.908520 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
465 02:24:50.931761 DRAM: 2 GiB (effective 3.8 GiB)
466 02:24:51.074750 Core: 408 devices, 31 uclasses, devicetree: separate
467 02:24:51.080474 WDT: Not starting watchdog@f0d0
468 02:24:51.112905 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
469 02:24:51.125401 Loading Environment from FAT... Card did not respond to voltage select! : -110
470 02:24:51.130466 ** Bad device specification mmc 0 **
471 02:24:51.140671 Card did not respond to voltage select! : -110
472 02:24:51.148455 ** Bad device specification mmc 0 **
473 02:24:51.148883 Couldn't find partition mmc 0
474 02:24:51.156670 Card did not respond to voltage select! : -110
475 02:24:51.162178 ** Bad device specification mmc 0 **
476 02:24:51.162617 Couldn't find partition mmc 0
477 02:24:51.167268 Error: could not access storage.
478 02:24:52.431297 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
479 02:24:52.431933 bl2_stage_init 0x01
480 02:24:52.432397 bl2_stage_init 0x81
481 02:24:52.436697 hw id: 0x0000 - pwm id 0x01
482 02:24:52.437168 bl2_stage_init 0xc1
483 02:24:52.437577 bl2_stage_init 0x02
484 02:24:52.437974
485 02:24:52.442362 L0:00000000
486 02:24:52.442823 L1:20000703
487 02:24:52.443223 L2:00008067
488 02:24:52.443612 L3:14000000
489 02:24:52.447947 B2:00402000
490 02:24:52.448454 B1:e0f83180
491 02:24:52.448855
492 02:24:52.449246 TE: 58167
493 02:24:52.449643
494 02:24:52.453596 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 02:24:52.454140
496 02:24:52.454545 Board ID = 1
497 02:24:52.459169 Set A53 clk to 24M
498 02:24:52.459647 Set A73 clk to 24M
499 02:24:52.460081 Set clk81 to 24M
500 02:24:52.464781 A53 clk: 1200 MHz
501 02:24:52.465263 A73 clk: 1200 MHz
502 02:24:52.465660 CLK81: 166.6M
503 02:24:52.466053 smccc: 00012abe
504 02:24:52.470392 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 02:24:52.476149 board id: 1
506 02:24:52.481836 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 02:24:52.492729 fw parse done
508 02:24:52.498493 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 02:24:52.541086 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 02:24:52.551953 PIEI prepare done
511 02:24:52.552473 fastboot data load
512 02:24:52.552882 fastboot data verify
513 02:24:52.557618 verify result: 266
514 02:24:52.563328 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 02:24:52.563805 LPDDR4 probe
516 02:24:52.564243 ddr clk to 1584MHz
517 02:24:52.571367 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 02:24:52.608659
519 02:24:52.609213 dmc_version 0001
520 02:24:52.615100 Check phy result
521 02:24:52.620969 INFO : End of CA training
522 02:24:52.621436 INFO : End of initialization
523 02:24:52.626657 INFO : Training has run successfully!
524 02:24:52.627117 Check phy result
525 02:24:52.632203 INFO : End of initialization
526 02:24:52.632657 INFO : End of read enable training
527 02:24:52.637759 INFO : End of fine write leveling
528 02:24:52.643339 INFO : End of Write leveling coarse delay
529 02:24:52.643812 INFO : Training has run successfully!
530 02:24:52.644251 Check phy result
531 02:24:52.648957 INFO : End of initialization
532 02:24:52.649404 INFO : End of read dq deskew training
533 02:24:52.654599 INFO : End of MPR read delay center optimization
534 02:24:52.660239 INFO : End of write delay center optimization
535 02:24:52.665755 INFO : End of read delay center optimization
536 02:24:52.666206 INFO : End of max read latency training
537 02:24:52.671424 INFO : Training has run successfully!
538 02:24:52.671863 1D training succeed
539 02:24:52.679975 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 02:24:52.728329 Check phy result
541 02:24:52.728818 INFO : End of initialization
542 02:24:52.750737 INFO : End of 2D read delay Voltage center optimization
543 02:24:52.770981 INFO : End of 2D read delay Voltage center optimization
544 02:24:52.823058 INFO : End of 2D write delay Voltage center optimization
545 02:24:52.872632 INFO : End of 2D write delay Voltage center optimization
546 02:24:52.877905 INFO : Training has run successfully!
547 02:24:52.878354
548 02:24:52.878756 channel==0
549 02:24:52.883665 RxClkDly_Margin_A0==88 ps 9
550 02:24:52.884152 TxDqDly_Margin_A0==98 ps 10
551 02:24:52.889150 RxClkDly_Margin_A1==88 ps 9
552 02:24:52.889646 TxDqDly_Margin_A1==98 ps 10
553 02:24:52.890053 TrainedVREFDQ_A0==74
554 02:24:52.894773 TrainedVREFDQ_A1==74
555 02:24:52.895375 VrefDac_Margin_A0==25
556 02:24:52.895807 DeviceVref_Margin_A0==40
557 02:24:52.900369 VrefDac_Margin_A1==25
558 02:24:52.900942 DeviceVref_Margin_A1==40
559 02:24:52.901387
560 02:24:52.901803
561 02:24:52.905921 channel==1
562 02:24:52.906423 RxClkDly_Margin_A0==88 ps 9
563 02:24:52.906828 TxDqDly_Margin_A0==88 ps 9
564 02:24:52.911674 RxClkDly_Margin_A1==98 ps 10
565 02:24:52.912141 TxDqDly_Margin_A1==88 ps 9
566 02:24:52.917140 TrainedVREFDQ_A0==77
567 02:24:52.917603 TrainedVREFDQ_A1==77
568 02:24:52.918002 VrefDac_Margin_A0==22
569 02:24:52.922837 DeviceVref_Margin_A0==37
570 02:24:52.923276 VrefDac_Margin_A1==22
571 02:24:52.928305 DeviceVref_Margin_A1==37
572 02:24:52.928744
573 02:24:52.929143 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 02:24:52.929538
575 02:24:52.961994 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
576 02:24:52.962591 2D training succeed
577 02:24:52.967815 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 02:24:52.973193 auto size-- 65535DDR cs0 size: 2048MB
579 02:24:52.973802 DDR cs1 size: 2048MB
580 02:24:52.978768 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 02:24:52.979264 cs0 DataBus test pass
582 02:24:52.984430 cs1 DataBus test pass
583 02:24:52.984983 cs0 AddrBus test pass
584 02:24:52.985401 cs1 AddrBus test pass
585 02:24:52.985802
586 02:24:52.989954 100bdlr_step_size ps== 420
587 02:24:52.990361 result report
588 02:24:52.995535 boot times 0Enable ddr reg access
589 02:24:53.000762 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 02:24:53.014150 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 02:24:53.588026 0.0;M3 CHK:0;cm4_sp_mode 0
592 02:24:53.588600 MVN_1=0x00000000
593 02:24:53.593423 MVN_2=0x00000000
594 02:24:53.599204 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 02:24:53.599685 OPS=0x10
596 02:24:53.600167 ring efuse init
597 02:24:53.600611 chipver efuse init
598 02:24:53.604783 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 02:24:53.610450 [0.018960 Inits done]
600 02:24:53.610882 secure task start!
601 02:24:53.611274 high task start!
602 02:24:53.614997 low task start!
603 02:24:53.615413 run into bl31
604 02:24:53.621702 NOTICE: BL31: v1.3(release):4fc40b1
605 02:24:53.629423 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 02:24:53.629847 NOTICE: BL31: G12A normal boot!
607 02:24:53.654756 NOTICE: BL31: BL33 decompress pass
608 02:24:53.660394 ERROR: Error initializing runtime service opteed_fast
609 02:24:54.893444
610 02:24:54.894056
611 02:24:54.901894 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 02:24:54.902337
613 02:24:54.902767 Model: Libre Computer AML-A311D-CC Alta
614 02:24:55.110332 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 02:24:55.133653 DRAM: 2 GiB (effective 3.8 GiB)
616 02:24:55.276612 Core: 408 devices, 31 uclasses, devicetree: separate
617 02:24:55.282604 WDT: Not starting watchdog@f0d0
618 02:24:55.314867 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 02:24:55.327199 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 02:24:55.332193 ** Bad device specification mmc 0 **
621 02:24:55.342534 Card did not respond to voltage select! : -110
622 02:24:55.350197 ** Bad device specification mmc 0 **
623 02:24:55.350625 Couldn't find partition mmc 0
624 02:24:55.358632 Card did not respond to voltage select! : -110
625 02:24:55.364070 ** Bad device specification mmc 0 **
626 02:24:55.364503 Couldn't find partition mmc 0
627 02:24:55.369171 Error: could not access storage.
628 02:24:55.712689 Net: eth0: ethernet@ff3f0000
629 02:24:55.713221 starting USB...
630 02:24:55.964548 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 02:24:55.965053 Starting the controller
632 02:24:55.971441 USB XHCI 1.10
633 02:24:57.682224 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
634 02:24:57.682823 bl2_stage_init 0x81
635 02:24:57.687831 hw id: 0x0000 - pwm id 0x01
636 02:24:57.688309 bl2_stage_init 0xc1
637 02:24:57.688720 bl2_stage_init 0x02
638 02:24:57.689119
639 02:24:57.693461 L0:00000000
640 02:24:57.693894 L1:20000703
641 02:24:57.694297 L2:00008067
642 02:24:57.694692 L3:14000000
643 02:24:57.695085 B2:00402000
644 02:24:57.699128 B1:e0f83180
645 02:24:57.699606
646 02:24:57.700044 TE: 58150
647 02:24:57.700462
648 02:24:57.704692 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
649 02:24:57.705138
650 02:24:57.705544 Board ID = 1
651 02:24:57.710149 Set A53 clk to 24M
652 02:24:57.710579 Set A73 clk to 24M
653 02:24:57.710981 Set clk81 to 24M
654 02:24:57.715812 A53 clk: 1200 MHz
655 02:24:57.716273 A73 clk: 1200 MHz
656 02:24:57.716676 CLK81: 166.6M
657 02:24:57.717072 smccc: 00012aac
658 02:24:57.721425 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
659 02:24:57.727018 board id: 1
660 02:24:57.732804 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
661 02:24:57.743404 fw parse done
662 02:24:57.749486 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
663 02:24:57.791908 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
664 02:24:57.802809 PIEI prepare done
665 02:24:57.803258 fastboot data load
666 02:24:57.803666 fastboot data verify
667 02:24:57.808495 verify result: 266
668 02:24:57.814070 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
669 02:24:57.814506 LPDDR4 probe
670 02:24:57.814911 ddr clk to 1584MHz
671 02:24:57.822067 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
672 02:24:57.859412
673 02:24:57.859866 dmc_version 0001
674 02:24:57.865984 Check phy result
675 02:24:57.871863 INFO : End of CA training
676 02:24:57.872321 INFO : End of initialization
677 02:24:57.877451 INFO : Training has run successfully!
678 02:24:57.877880 Check phy result
679 02:24:57.883055 INFO : End of initialization
680 02:24:57.883488 INFO : End of read enable training
681 02:24:57.888675 INFO : End of fine write leveling
682 02:24:57.894314 INFO : End of Write leveling coarse delay
683 02:24:57.894748 INFO : Training has run successfully!
684 02:24:57.895153 Check phy result
685 02:24:57.899853 INFO : End of initialization
686 02:24:57.900324 INFO : End of read dq deskew training
687 02:24:57.905536 INFO : End of MPR read delay center optimization
688 02:24:57.911145 INFO : End of write delay center optimization
689 02:24:57.916679 INFO : End of read delay center optimization
690 02:24:57.917106 INFO : End of max read latency training
691 02:24:57.922366 INFO : Training has run successfully!
692 02:24:57.922792 1D training succeed
693 02:24:57.931507 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 02:24:57.979042 Check phy result
695 02:24:57.979504 INFO : End of initialization
696 02:24:58.000834 INFO : End of 2D read delay Voltage center optimization
697 02:24:58.021030 INFO : End of 2D read delay Voltage center optimization
698 02:24:58.073123 INFO : End of 2D write delay Voltage center optimization
699 02:24:58.122512 INFO : End of 2D write delay Voltage center optimization
700 02:24:58.128110 INFO : Training has run successfully!
701 02:24:58.128648
702 02:24:58.129069 channel==0
703 02:24:58.133822 RxClkDly_Margin_A0==88 ps 9
704 02:24:58.134443 TxDqDly_Margin_A0==98 ps 10
705 02:24:58.139328 RxClkDly_Margin_A1==88 ps 9
706 02:24:58.139694 TxDqDly_Margin_A1==98 ps 10
707 02:24:58.139944 TrainedVREFDQ_A0==74
708 02:24:58.144996 TrainedVREFDQ_A1==75
709 02:24:58.145610 VrefDac_Margin_A0==25
710 02:24:58.146042 DeviceVref_Margin_A0==40
711 02:24:58.150512 VrefDac_Margin_A1==25
712 02:24:58.151047 DeviceVref_Margin_A1==39
713 02:24:58.151469
714 02:24:58.151902
715 02:24:58.156001 channel==1
716 02:24:58.156520 RxClkDly_Margin_A0==98 ps 10
717 02:24:58.156933 TxDqDly_Margin_A0==98 ps 10
718 02:24:58.161838 RxClkDly_Margin_A1==88 ps 9
719 02:24:58.162408 TxDqDly_Margin_A1==88 ps 9
720 02:24:58.167209 TrainedVREFDQ_A0==77
721 02:24:58.167653 TrainedVREFDQ_A1==77
722 02:24:58.167929 VrefDac_Margin_A0==22
723 02:24:58.173108 DeviceVref_Margin_A0==37
724 02:24:58.173999 VrefDac_Margin_A1==24
725 02:24:58.178625 DeviceVref_Margin_A1==37
726 02:24:58.179226
727 02:24:58.179499 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
728 02:24:58.179745
729 02:24:58.212034 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
730 02:24:58.212674 2D training succeed
731 02:24:58.218106 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
732 02:24:58.223493 auto size-- 65535DDR cs0 size: 2048MB
733 02:24:58.223935 DDR cs1 size: 2048MB
734 02:24:58.229103 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
735 02:24:58.229535 cs0 DataBus test pass
736 02:24:58.234703 cs1 DataBus test pass
737 02:24:58.235142 cs0 AddrBus test pass
738 02:24:58.235399 cs1 AddrBus test pass
739 02:24:58.235619
740 02:24:58.240174 100bdlr_step_size ps== 420
741 02:24:58.240476 result report
742 02:24:58.245710 boot times 0Enable ddr reg access
743 02:24:58.251012 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
744 02:24:58.264571 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
745 02:24:58.838146 0.0;M3 CHK:0;cm4_sp_mode 0
746 02:24:58.838782 MVN_1=0x00000000
747 02:24:58.843606 MVN_2=0x00000000
748 02:24:58.849546 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
749 02:24:58.850277 OPS=0x10
750 02:24:58.850908 ring efuse init
751 02:24:58.851472 chipver efuse init
752 02:24:58.857754 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
753 02:24:58.858415 [0.018961 Inits done]
754 02:24:58.858946 secure task start!
755 02:24:58.865119 high task start!
756 02:24:58.865730 low task start!
757 02:24:58.866255 run into bl31
758 02:24:58.871741 NOTICE: BL31: v1.3(release):4fc40b1
759 02:24:58.879532 NOTICE: BL31: Built : 15:58:17, May 22 2019
760 02:24:58.880185 NOTICE: BL31: G12A normal boot!
761 02:24:58.904947 NOTICE: BL31: BL33 decompress pass
762 02:24:58.910590 ERROR: Error initializing runtime service opteed_fast
763 02:25:00.143553
764 02:25:00.144411
765 02:25:00.151823 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
766 02:25:00.152678
767 02:25:00.153233 Model: Libre Computer AML-A311D-CC Alta
768 02:25:00.359405 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
769 02:25:00.383779 DRAM: 2 GiB (effective 3.8 GiB)
770 02:25:00.526700 Core: 408 devices, 31 uclasses, devicetree: separate
771 02:25:00.531861 WDT: Not starting watchdog@f0d0
772 02:25:00.564849 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
773 02:25:00.577314 Loading Environment from FAT... Card did not respond to voltage select! : -110
774 02:25:00.581354 ** Bad device specification mmc 0 **
775 02:25:00.592699 Card did not respond to voltage select! : -110
776 02:25:00.599484 ** Bad device specification mmc 0 **
777 02:25:00.600150 Couldn't find partition mmc 0
778 02:25:00.608694 Card did not respond to voltage select! : -110
779 02:25:00.614111 ** Bad device specification mmc 0 **
780 02:25:00.614675 Couldn't find partition mmc 0
781 02:25:00.618497 Error: could not access storage.
782 02:25:00.961749 Net: eth0: ethernet@ff3f0000
783 02:25:00.962450 starting USB...
784 02:25:01.214632 Bus usb@ff500000: Register 3000140 NbrPorts 3
785 02:25:01.215337 Starting the controller
786 02:25:01.221470 USB XHCI 1.10
787 02:25:03.381018 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
788 02:25:03.381840 bl2_stage_init 0x01
789 02:25:03.382452 bl2_stage_init 0x81
790 02:25:03.386572 hw id: 0x0000 - pwm id 0x01
791 02:25:03.387303 bl2_stage_init 0xc1
792 02:25:03.387895 bl2_stage_init 0x02
793 02:25:03.388545
794 02:25:03.392248 L0:00000000
795 02:25:03.392963 L1:20000703
796 02:25:03.393518 L2:00008067
797 02:25:03.394055 L3:14000000
798 02:25:03.395005 B2:00402000
799 02:25:03.395700 B1:e0f83180
800 02:25:03.396373
801 02:25:03.396963 TE: 58159
802 02:25:03.397535
803 02:25:03.406213 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
804 02:25:03.406939
805 02:25:03.407510 Board ID = 1
806 02:25:03.408069 Set A53 clk to 24M
807 02:25:03.408602 Set A73 clk to 24M
808 02:25:03.411863 Set clk81 to 24M
809 02:25:03.412601 A53 clk: 1200 MHz
810 02:25:03.413147 A73 clk: 1200 MHz
811 02:25:03.415269 CLK81: 166.6M
812 02:25:03.415879 smccc: 00012ab5
813 02:25:03.421094 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
814 02:25:03.426474 board id: 1
815 02:25:03.431651 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
816 02:25:03.442316 fw parse done
817 02:25:03.448344 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
818 02:25:03.490839 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
819 02:25:03.501731 PIEI prepare done
820 02:25:03.502342 fastboot data load
821 02:25:03.502776 fastboot data verify
822 02:25:03.507271 verify result: 266
823 02:25:03.512970 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
824 02:25:03.513589 LPDDR4 probe
825 02:25:03.514023 ddr clk to 1584MHz
826 02:25:03.520985 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
827 02:25:03.558310
828 02:25:03.558890 dmc_version 0001
829 02:25:03.564815 Check phy result
830 02:25:03.570701 INFO : End of CA training
831 02:25:03.571177 INFO : End of initialization
832 02:25:03.576242 INFO : Training has run successfully!
833 02:25:03.576716 Check phy result
834 02:25:03.581923 INFO : End of initialization
835 02:25:03.582445 INFO : End of read enable training
836 02:25:03.585192 INFO : End of fine write leveling
837 02:25:03.590861 INFO : End of Write leveling coarse delay
838 02:25:03.596522 INFO : Training has run successfully!
839 02:25:03.597022 Check phy result
840 02:25:03.597438 INFO : End of initialization
841 02:25:03.602127 INFO : End of read dq deskew training
842 02:25:03.607593 INFO : End of MPR read delay center optimization
843 02:25:03.608103 INFO : End of write delay center optimization
844 02:25:03.613230 INFO : End of read delay center optimization
845 02:25:03.618816 INFO : End of max read latency training
846 02:25:03.619347 INFO : Training has run successfully!
847 02:25:03.624328 1D training succeed
848 02:25:03.629554 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 02:25:03.677913 Check phy result
850 02:25:03.678550 INFO : End of initialization
851 02:25:03.700464 INFO : End of 2D read delay Voltage center optimization
852 02:25:03.720814 INFO : End of 2D read delay Voltage center optimization
853 02:25:03.772689 INFO : End of 2D write delay Voltage center optimization
854 02:25:03.822152 INFO : End of 2D write delay Voltage center optimization
855 02:25:03.827595 INFO : Training has run successfully!
856 02:25:03.828286
857 02:25:03.828864 channel==0
858 02:25:03.833314 RxClkDly_Margin_A0==88 ps 9
859 02:25:03.834112 TxDqDly_Margin_A0==98 ps 10
860 02:25:03.838802 RxClkDly_Margin_A1==88 ps 9
861 02:25:03.839435 TxDqDly_Margin_A1==98 ps 10
862 02:25:03.840067 TrainedVREFDQ_A0==74
863 02:25:03.844403 TrainedVREFDQ_A1==74
864 02:25:03.845138 VrefDac_Margin_A0==24
865 02:25:03.845698 DeviceVref_Margin_A0==40
866 02:25:03.849991 VrefDac_Margin_A1==25
867 02:25:03.850649 DeviceVref_Margin_A1==40
868 02:25:03.851160
869 02:25:03.851669
870 02:25:03.855581 channel==1
871 02:25:03.856183 RxClkDly_Margin_A0==98 ps 10
872 02:25:03.856700 TxDqDly_Margin_A0==98 ps 10
873 02:25:03.861219 RxClkDly_Margin_A1==88 ps 9
874 02:25:03.861803 TxDqDly_Margin_A1==88 ps 9
875 02:25:03.866791 TrainedVREFDQ_A0==77
876 02:25:03.867380 TrainedVREFDQ_A1==77
877 02:25:03.867909 VrefDac_Margin_A0==22
878 02:25:03.872384 DeviceVref_Margin_A0==37
879 02:25:03.872982 VrefDac_Margin_A1==24
880 02:25:03.877965 DeviceVref_Margin_A1==37
881 02:25:03.878556
882 02:25:03.879089 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
883 02:25:03.879612
884 02:25:03.911550 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
885 02:25:03.912222 2D training succeed
886 02:25:03.917215 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
887 02:25:03.922898 auto size-- 65535DDR cs0 size: 2048MB
888 02:25:03.923658 DDR cs1 size: 2048MB
889 02:25:03.928374 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
890 02:25:03.928993 cs0 DataBus test pass
891 02:25:03.933972 cs1 DataBus test pass
892 02:25:03.934547 cs0 AddrBus test pass
893 02:25:03.935050 cs1 AddrBus test pass
894 02:25:03.935553
895 02:25:03.939571 100bdlr_step_size ps== 420
896 02:25:03.940216 result report
897 02:25:03.945170 boot times 0Enable ddr reg access
898 02:25:03.950511 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
899 02:25:03.964057 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
900 02:25:04.537928 0.0;M3 CHK:0;cm4_sp_mode 0
901 02:25:04.538777 MVN_1=0x00000000
902 02:25:04.543360 MVN_2=0x00000000
903 02:25:04.549070 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
904 02:25:04.549817 OPS=0x10
905 02:25:04.550400 ring efuse init
906 02:25:04.550941 chipver efuse init
907 02:25:04.554659 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
908 02:25:04.560309 [0.018961 Inits done]
909 02:25:04.561033 secure task start!
910 02:25:04.561635 high task start!
911 02:25:04.564802 low task start!
912 02:25:04.565389 run into bl31
913 02:25:04.571559 NOTICE: BL31: v1.3(release):4fc40b1
914 02:25:04.578446 NOTICE: BL31: Built : 15:58:17, May 22 2019
915 02:25:04.579224 NOTICE: BL31: G12A normal boot!
916 02:25:04.604715 NOTICE: BL31: BL33 decompress pass
917 02:25:04.610344 ERROR: Error initializing runtime service opteed_fast
918 02:25:05.843148
919 02:25:05.843711
920 02:25:05.850528 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
921 02:25:05.850977
922 02:25:05.851392 Model: Libre Computer AML-A311D-CC Alta
923 02:25:06.059426 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
924 02:25:06.082448 DRAM: 2 GiB (effective 3.8 GiB)
925 02:25:06.226342 Core: 408 devices, 31 uclasses, devicetree: separate
926 02:25:06.232217 WDT: Not starting watchdog@f0d0
927 02:25:06.264518 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
928 02:25:06.276906 Loading Environment from FAT... Card did not respond to voltage select! : -110
929 02:25:06.280938 ** Bad device specification mmc 0 **
930 02:25:06.292213 Card did not respond to voltage select! : -110
931 02:25:06.299845 ** Bad device specification mmc 0 **
932 02:25:06.300326 Couldn't find partition mmc 0
933 02:25:06.308216 Card did not respond to voltage select! : -110
934 02:25:06.313734 ** Bad device specification mmc 0 **
935 02:25:06.314172 Couldn't find partition mmc 0
936 02:25:06.317885 Error: could not access storage.
937 02:25:06.660694 Net: eth0: ethernet@ff3f0000
938 02:25:06.661202 starting USB...
939 02:25:06.912921 Bus usb@ff500000: Register 3000140 NbrPorts 3
940 02:25:06.913413 Starting the controller
941 02:25:06.918964 USB XHCI 1.10
942 02:25:08.474023 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
943 02:25:08.482334 scanning usb for storage devices... 0 Storage Device(s) found
945 02:25:08.533828 Hit any key to stop autoboot: 1
946 02:25:08.534645 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
947 02:25:08.535296 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
948 02:25:08.535785 Setting prompt string to ['=>']
949 02:25:08.536408 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
950 02:25:08.548960 0
951 02:25:08.549849 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
952 02:25:08.550348 Sending with 10 millisecond of delay
954 02:25:09.684876 => setenv autoload no
955 02:25:09.695671 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
956 02:25:09.700612 setenv autoload no
957 02:25:09.701325 Sending with 10 millisecond of delay
959 02:25:11.497786 => setenv initrd_high 0xffffffff
960 02:25:11.508526 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
961 02:25:11.509349 setenv initrd_high 0xffffffff
962 02:25:11.510061 Sending with 10 millisecond of delay
964 02:25:13.126143 => setenv fdt_high 0xffffffff
965 02:25:13.136944 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
966 02:25:13.137535 setenv fdt_high 0xffffffff
967 02:25:13.138033 Sending with 10 millisecond of delay
969 02:25:13.429525 => dhcp
970 02:25:13.440064 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
971 02:25:13.440540 dhcp
972 02:25:13.440774 Speed: 1000, full duplex
973 02:25:13.440989 BOOTP broadcast 1
974 02:25:13.452862 DHCP client bound to address 192.168.6.27 (13 ms)
975 02:25:13.453569 Sending with 10 millisecond of delay
977 02:25:15.130498 => setenv serverip 192.168.6.2
978 02:25:15.141264 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
979 02:25:15.142156 setenv serverip 192.168.6.2
980 02:25:15.142847 Sending with 10 millisecond of delay
982 02:25:18.865952 => tftpboot 0x01080000 932132/tftp-deploy-cj_u1loj/kernel/uImage
983 02:25:18.876743 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
984 02:25:18.877572 tftpboot 0x01080000 932132/tftp-deploy-cj_u1loj/kernel/uImage
985 02:25:18.878010 Speed: 1000, full duplex
986 02:25:18.878421 Using ethernet@ff3f0000 device
987 02:25:18.879531 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
988 02:25:18.885077 Filename '932132/tftp-deploy-cj_u1loj/kernel/uImage'.
989 02:25:18.889561 Load address: 0x1080000
990 02:25:21.788989 Loading: *################################################## 43.6 MiB
991 02:25:21.789789 15 MiB/s
992 02:25:21.790367 done
993 02:25:21.793266 Bytes transferred = 45716032 (2b99240 hex)
994 02:25:21.794234 Sending with 10 millisecond of delay
996 02:25:26.482010 => tftpboot 0x08000000 932132/tftp-deploy-cj_u1loj/ramdisk/ramdisk.cpio.gz.uboot
997 02:25:26.493010 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
998 02:25:26.494022 tftpboot 0x08000000 932132/tftp-deploy-cj_u1loj/ramdisk/ramdisk.cpio.gz.uboot
999 02:25:26.494595 Speed: 1000, full duplex
1000 02:25:26.495140 Using ethernet@ff3f0000 device
1001 02:25:26.495761 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1002 02:25:26.504339 Filename '932132/tftp-deploy-cj_u1loj/ramdisk/ramdisk.cpio.gz.uboot'.
1003 02:25:26.504938 Load address: 0x8000000
1004 02:25:33.040606 Loading: *################T ################################# UDP wrong checksum 00000005 00002b4b
1005 02:25:38.041300 T UDP wrong checksum 00000005 00002b4b
1006 02:25:48.044191 T T UDP wrong checksum 00000005 00002b4b
1007 02:25:58.682249 T T UDP wrong checksum 000000ff 00009707
1008 02:25:58.723052 UDP wrong checksum 000000ff 000030fa
1009 02:26:08.048158 T T UDP wrong checksum 00000005 00002b4b
1010 02:26:23.052393 T T
1011 02:26:23.053138 Retry count exceeded; starting again
1013 02:26:23.054719 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1016 02:26:23.056887 end: 2.4 uboot-commands (duration 00:01:47) [common]
1018 02:26:23.058409 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1020 02:26:23.059667 end: 2 uboot-action (duration 00:01:47) [common]
1022 02:26:23.061464 Cleaning after the job
1023 02:26:23.062066 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/ramdisk
1024 02:26:23.063406 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/kernel
1025 02:26:23.108663 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/dtb
1026 02:26:23.109611 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/nfsrootfs
1027 02:26:23.406135 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932132/tftp-deploy-cj_u1loj/modules
1028 02:26:23.426566 start: 4.1 power-off (timeout 00:00:30) [common]
1029 02:26:23.427268 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1030 02:26:23.462577 >> OK - accepted request
1031 02:26:23.465034 Returned 0 in 0 seconds
1032 02:26:23.565829 end: 4.1 power-off (duration 00:00:00) [common]
1034 02:26:23.566859 start: 4.2 read-feedback (timeout 00:10:00) [common]
1035 02:26:23.567525 Listened to connection for namespace 'common' for up to 1s
1036 02:26:24.567729 Finalising connection for namespace 'common'
1037 02:26:24.568233 Disconnecting from shell: Finalise
1038 02:26:24.568511 =>
1039 02:26:24.669260 end: 4.2 read-feedback (duration 00:00:01) [common]
1040 02:26:24.669911 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/932132
1041 02:26:27.244696 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/932132
1042 02:26:27.245353 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.