Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:25:53.490345 lava-dispatcher, installed at version: 2024.01
2 02:25:53.491110 start: 0 validate
3 02:25:53.491579 Start time: 2024-11-04 02:25:53.491550+00:00 (UTC)
4 02:25:53.492140 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:25:53.492683 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:25:53.537762 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:25:53.538371 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc5-576-g10616629aaf32%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:25:53.568450 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:25:53.569069 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc5-576-g10616629aaf32%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 02:25:53.600605 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:25:53.601065 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:25:53.633956 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:25:53.634715 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc5-576-g10616629aaf32%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:25:53.676767 validate duration: 0.19
16 02:25:53.678181 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:25:53.678790 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:25:53.679347 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:25:53.680340 Not decompressing ramdisk as can be used compressed.
20 02:25:53.681125 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 02:25:53.681619 saving as /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/ramdisk/initrd.cpio.gz
22 02:25:53.682119 total size: 5628140 (5 MB)
23 02:25:53.724183 progress 0 % (0 MB)
24 02:25:53.733024 progress 5 % (0 MB)
25 02:25:53.742820 progress 10 % (0 MB)
26 02:25:53.751651 progress 15 % (0 MB)
27 02:25:53.758705 progress 20 % (1 MB)
28 02:25:53.763073 progress 25 % (1 MB)
29 02:25:53.767872 progress 30 % (1 MB)
30 02:25:53.772661 progress 35 % (1 MB)
31 02:25:53.776973 progress 40 % (2 MB)
32 02:25:53.781744 progress 45 % (2 MB)
33 02:25:53.786083 progress 50 % (2 MB)
34 02:25:53.790842 progress 55 % (2 MB)
35 02:25:53.795584 progress 60 % (3 MB)
36 02:25:53.799878 progress 65 % (3 MB)
37 02:25:53.804736 progress 70 % (3 MB)
38 02:25:53.809111 progress 75 % (4 MB)
39 02:25:53.813936 progress 80 % (4 MB)
40 02:25:53.818250 progress 85 % (4 MB)
41 02:25:53.823055 progress 90 % (4 MB)
42 02:25:53.827754 progress 95 % (5 MB)
43 02:25:53.831625 progress 100 % (5 MB)
44 02:25:53.832456 5 MB downloaded in 0.15 s (35.71 MB/s)
45 02:25:53.833156 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:25:53.834273 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:25:53.834642 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:25:53.834982 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:25:53.835557 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-576-g10616629aaf32/arm64/defconfig/gcc-12/kernel/Image
51 02:25:53.835873 saving as /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/kernel/Image
52 02:25:53.836185 total size: 45715968 (43 MB)
53 02:25:53.836448 No compression specified
54 02:25:53.882143 progress 0 % (0 MB)
55 02:25:53.914966 progress 5 % (2 MB)
56 02:25:53.948345 progress 10 % (4 MB)
57 02:25:53.979703 progress 15 % (6 MB)
58 02:25:54.012660 progress 20 % (8 MB)
59 02:25:54.045285 progress 25 % (10 MB)
60 02:25:54.077728 progress 30 % (13 MB)
61 02:25:54.110817 progress 35 % (15 MB)
62 02:25:54.143793 progress 40 % (17 MB)
63 02:25:54.176566 progress 45 % (19 MB)
64 02:25:54.209127 progress 50 % (21 MB)
65 02:25:54.239924 progress 55 % (24 MB)
66 02:25:54.270811 progress 60 % (26 MB)
67 02:25:54.300893 progress 65 % (28 MB)
68 02:25:54.332418 progress 70 % (30 MB)
69 02:25:54.363947 progress 75 % (32 MB)
70 02:25:54.394618 progress 80 % (34 MB)
71 02:25:54.425152 progress 85 % (37 MB)
72 02:25:54.457065 progress 90 % (39 MB)
73 02:25:54.488018 progress 95 % (41 MB)
74 02:25:54.519974 progress 100 % (43 MB)
75 02:25:54.520623 43 MB downloaded in 0.68 s (63.70 MB/s)
76 02:25:54.521123 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:25:54.521951 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:25:54.522228 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:25:54.522495 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:25:54.523123 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-576-g10616629aaf32/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 02:25:54.523470 saving as /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 02:25:54.523697 total size: 53209 (0 MB)
84 02:25:54.523924 No compression specified
85 02:25:54.574480 progress 61 % (0 MB)
86 02:25:54.575360 progress 100 % (0 MB)
87 02:25:54.575895 0 MB downloaded in 0.05 s (0.97 MB/s)
88 02:25:54.576409 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:25:54.577236 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:25:54.577508 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:25:54.577772 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:25:54.579683 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 02:25:54.580007 saving as /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/nfsrootfs/full.rootfs.tar
95 02:25:54.580261 total size: 474398908 (452 MB)
96 02:25:54.580496 Using unxz to decompress xz
97 02:25:54.620078 progress 0 % (0 MB)
98 02:25:55.739301 progress 5 % (22 MB)
99 02:25:57.168632 progress 10 % (45 MB)
100 02:25:57.611971 progress 15 % (67 MB)
101 02:25:58.467219 progress 20 % (90 MB)
102 02:25:58.997678 progress 25 % (113 MB)
103 02:25:59.369346 progress 30 % (135 MB)
104 02:25:59.968763 progress 35 % (158 MB)
105 02:26:00.794775 progress 40 % (181 MB)
106 02:26:01.641327 progress 45 % (203 MB)
107 02:26:02.229272 progress 50 % (226 MB)
108 02:26:02.898980 progress 55 % (248 MB)
109 02:26:04.121191 progress 60 % (271 MB)
110 02:26:05.626307 progress 65 % (294 MB)
111 02:26:07.294198 progress 70 % (316 MB)
112 02:26:10.360827 progress 75 % (339 MB)
113 02:26:12.808042 progress 80 % (361 MB)
114 02:26:15.703670 progress 85 % (384 MB)
115 02:26:18.823652 progress 90 % (407 MB)
116 02:26:22.007225 progress 95 % (429 MB)
117 02:26:25.172207 progress 100 % (452 MB)
118 02:26:25.185095 452 MB downloaded in 30.60 s (14.78 MB/s)
119 02:26:25.185942 end: 1.4.1 http-download (duration 00:00:31) [common]
121 02:26:25.187523 end: 1.4 download-retry (duration 00:00:31) [common]
122 02:26:25.188085 start: 1.5 download-retry (timeout 00:09:28) [common]
123 02:26:25.188605 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 02:26:25.189634 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc5-576-g10616629aaf32/arm64/defconfig/gcc-12/modules.tar.xz
125 02:26:25.190108 saving as /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/modules/modules.tar
126 02:26:25.190515 total size: 11610988 (11 MB)
127 02:26:25.190929 Using unxz to decompress xz
128 02:26:25.239519 progress 0 % (0 MB)
129 02:26:25.318304 progress 5 % (0 MB)
130 02:26:25.406027 progress 10 % (1 MB)
131 02:26:25.519579 progress 15 % (1 MB)
132 02:26:25.613673 progress 20 % (2 MB)
133 02:26:25.692883 progress 25 % (2 MB)
134 02:26:25.768618 progress 30 % (3 MB)
135 02:26:25.846989 progress 35 % (3 MB)
136 02:26:25.919824 progress 40 % (4 MB)
137 02:26:25.995625 progress 45 % (5 MB)
138 02:26:26.080370 progress 50 % (5 MB)
139 02:26:26.157608 progress 55 % (6 MB)
140 02:26:26.243054 progress 60 % (6 MB)
141 02:26:26.324384 progress 65 % (7 MB)
142 02:26:26.405092 progress 70 % (7 MB)
143 02:26:26.484542 progress 75 % (8 MB)
144 02:26:26.568609 progress 80 % (8 MB)
145 02:26:26.649053 progress 85 % (9 MB)
146 02:26:26.728095 progress 90 % (9 MB)
147 02:26:26.806318 progress 95 % (10 MB)
148 02:26:26.883316 progress 100 % (11 MB)
149 02:26:26.894801 11 MB downloaded in 1.70 s (6.50 MB/s)
150 02:26:26.895443 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:26:26.896612 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:26:26.897136 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 02:26:26.897686 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 02:26:42.213296 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/932179/extract-nfsrootfs-iuhqs0p5
156 02:26:42.213906 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 02:26:42.214195 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 02:26:42.214798 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u
159 02:26:42.215218 makedir: /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin
160 02:26:42.215540 makedir: /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/tests
161 02:26:42.215850 makedir: /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/results
162 02:26:42.216218 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-add-keys
163 02:26:42.216763 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-add-sources
164 02:26:42.217263 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-background-process-start
165 02:26:42.217821 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-background-process-stop
166 02:26:42.218444 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-common-functions
167 02:26:42.218951 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-echo-ipv4
168 02:26:42.219540 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-install-packages
169 02:26:42.220115 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-installed-packages
170 02:26:42.220611 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-os-build
171 02:26:42.221083 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-probe-channel
172 02:26:42.221554 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-probe-ip
173 02:26:42.222020 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-target-ip
174 02:26:42.222489 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-target-mac
175 02:26:42.222961 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-target-storage
176 02:26:42.223461 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-test-case
177 02:26:42.223958 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-test-event
178 02:26:42.224465 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-test-feedback
179 02:26:42.224936 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-test-raise
180 02:26:42.225404 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-test-reference
181 02:26:42.225875 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-test-runner
182 02:26:42.226350 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-test-set
183 02:26:42.226818 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-test-shell
184 02:26:42.227314 Updating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-install-packages (oe)
185 02:26:42.227866 Updating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/bin/lava-installed-packages (oe)
186 02:26:42.228397 Creating /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/environment
187 02:26:42.228775 LAVA metadata
188 02:26:42.229032 - LAVA_JOB_ID=932179
189 02:26:42.229246 - LAVA_DISPATCHER_IP=192.168.6.2
190 02:26:42.229602 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 02:26:42.230546 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 02:26:42.230855 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 02:26:42.231063 skipped lava-vland-overlay
194 02:26:42.231305 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 02:26:42.231556 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 02:26:42.231768 skipped lava-multinode-overlay
197 02:26:42.232026 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 02:26:42.232281 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 02:26:42.232526 Loading test definitions
200 02:26:42.232802 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 02:26:42.233020 Using /lava-932179 at stage 0
202 02:26:42.234151 uuid=932179_1.6.2.4.1 testdef=None
203 02:26:42.234453 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 02:26:42.234713 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 02:26:42.236471 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 02:26:42.237257 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 02:26:42.239415 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 02:26:42.240269 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 02:26:42.242316 runner path: /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 932179_1.6.2.4.1
212 02:26:42.242874 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 02:26:42.243623 Creating lava-test-runner.conf files
215 02:26:42.243822 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/932179/lava-overlay-tso0ti8u/lava-932179/0 for stage 0
216 02:26:42.244179 - 0_v4l2-decoder-conformance-h264
217 02:26:42.244522 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 02:26:42.244793 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 02:26:42.266126 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 02:26:42.266480 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 02:26:42.266740 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 02:26:42.267005 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 02:26:42.267266 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 02:26:42.879363 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 02:26:42.879829 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 02:26:42.880124 extracting modules file /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/932179/extract-nfsrootfs-iuhqs0p5
227 02:26:44.234834 extracting modules file /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/932179/extract-overlay-ramdisk-wzk5rc95/ramdisk
228 02:26:45.634842 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 02:26:45.635332 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 02:26:45.635608 [common] Applying overlay to NFS
231 02:26:45.635822 [common] Applying overlay /var/lib/lava/dispatcher/tmp/932179/compress-overlay-zyvmcgz4/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/932179/extract-nfsrootfs-iuhqs0p5
232 02:26:45.664791 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 02:26:45.665194 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 02:26:45.665465 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 02:26:45.665696 Converting downloaded kernel to a uImage
236 02:26:45.666004 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/kernel/Image /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/kernel/uImage
237 02:26:46.125678 output: Image Name:
238 02:26:46.126104 output: Created: Mon Nov 4 02:26:45 2024
239 02:26:46.126312 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 02:26:46.126516 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
241 02:26:46.126717 output: Load Address: 01080000
242 02:26:46.126916 output: Entry Point: 01080000
243 02:26:46.127114 output:
244 02:26:46.127449 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 02:26:46.127717 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 02:26:46.128020 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 02:26:46.128289 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 02:26:46.128551 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 02:26:46.128807 Building ramdisk /var/lib/lava/dispatcher/tmp/932179/extract-overlay-ramdisk-wzk5rc95/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/932179/extract-overlay-ramdisk-wzk5rc95/ramdisk
250 02:26:48.459468 >> 166828 blocks
251 02:26:56.170188 Adding RAMdisk u-boot header.
252 02:26:56.170890 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/932179/extract-overlay-ramdisk-wzk5rc95/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/932179/extract-overlay-ramdisk-wzk5rc95/ramdisk.cpio.gz.uboot
253 02:26:56.490120 output: Image Name:
254 02:26:56.490547 output: Created: Mon Nov 4 02:26:56 2024
255 02:26:56.490761 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 02:26:56.490969 output: Data Size: 23431417 Bytes = 22882.24 KiB = 22.35 MiB
257 02:26:56.491172 output: Load Address: 00000000
258 02:26:56.491371 output: Entry Point: 00000000
259 02:26:56.491568 output:
260 02:26:56.492275 rename /var/lib/lava/dispatcher/tmp/932179/extract-overlay-ramdisk-wzk5rc95/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/ramdisk/ramdisk.cpio.gz.uboot
261 02:26:56.493093 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 02:26:56.493696 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 02:26:56.494279 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 02:26:56.494780 No LXC device requested
265 02:26:56.495331 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 02:26:56.495890 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 02:26:56.496474 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 02:26:56.496933 Checking files for TFTP limit of 4294967296 bytes.
269 02:26:56.499850 end: 1 tftp-deploy (duration 00:01:03) [common]
270 02:26:56.500520 start: 2 uboot-action (timeout 00:05:00) [common]
271 02:26:56.501103 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 02:26:56.501654 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 02:26:56.502209 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 02:26:56.502783 Using kernel file from prepare-kernel: 932179/tftp-deploy-yb6boy0r/kernel/uImage
275 02:26:56.503470 substitutions:
276 02:26:56.503915 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 02:26:56.504394 - {DTB_ADDR}: 0x01070000
278 02:26:56.504835 - {DTB}: 932179/tftp-deploy-yb6boy0r/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 02:26:56.505275 - {INITRD}: 932179/tftp-deploy-yb6boy0r/ramdisk/ramdisk.cpio.gz.uboot
280 02:26:56.505714 - {KERNEL_ADDR}: 0x01080000
281 02:26:56.506147 - {KERNEL}: 932179/tftp-deploy-yb6boy0r/kernel/uImage
282 02:26:56.506581 - {LAVA_MAC}: None
283 02:26:56.507054 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/932179/extract-nfsrootfs-iuhqs0p5
284 02:26:56.507490 - {NFS_SERVER_IP}: 192.168.6.2
285 02:26:56.507920 - {PRESEED_CONFIG}: None
286 02:26:56.508391 - {PRESEED_LOCAL}: None
287 02:26:56.508825 - {RAMDISK_ADDR}: 0x08000000
288 02:26:56.509251 - {RAMDISK}: 932179/tftp-deploy-yb6boy0r/ramdisk/ramdisk.cpio.gz.uboot
289 02:26:56.509680 - {ROOT_PART}: None
290 02:26:56.510108 - {ROOT}: None
291 02:26:56.510531 - {SERVER_IP}: 192.168.6.2
292 02:26:56.510958 - {TEE_ADDR}: 0x83000000
293 02:26:56.511382 - {TEE}: None
294 02:26:56.511809 Parsed boot commands:
295 02:26:56.512256 - setenv autoload no
296 02:26:56.512681 - setenv initrd_high 0xffffffff
297 02:26:56.513102 - setenv fdt_high 0xffffffff
298 02:26:56.513526 - dhcp
299 02:26:56.513951 - setenv serverip 192.168.6.2
300 02:26:56.514372 - tftpboot 0x01080000 932179/tftp-deploy-yb6boy0r/kernel/uImage
301 02:26:56.514799 - tftpboot 0x08000000 932179/tftp-deploy-yb6boy0r/ramdisk/ramdisk.cpio.gz.uboot
302 02:26:56.515226 - tftpboot 0x01070000 932179/tftp-deploy-yb6boy0r/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 02:26:56.515653 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/932179/extract-nfsrootfs-iuhqs0p5,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 02:26:56.516119 - bootm 0x01080000 0x08000000 0x01070000
305 02:26:56.516677 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 02:26:56.518314 start: 2.3 connect-device (timeout 00:05:00) [common]
308 02:26:56.518775 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 02:26:56.534318 Setting prompt string to ['lava-test: # ']
310 02:26:56.535916 end: 2.3 connect-device (duration 00:00:00) [common]
311 02:26:56.536658 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 02:26:56.537255 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 02:26:56.537819 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 02:26:56.539038 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 02:26:56.577094 >> OK - accepted request
316 02:26:56.579129 Returned 0 in 0 seconds
317 02:26:56.680372 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 02:26:56.682101 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 02:26:56.682714 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 02:26:56.683281 Setting prompt string to ['Hit any key to stop autoboot']
322 02:26:56.683790 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 02:26:56.685561 Trying 192.168.56.21...
324 02:26:56.686087 Connected to conserv1.
325 02:26:56.686554 Escape character is '^]'.
326 02:26:56.687016
327 02:26:56.687488 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 02:26:56.687948
329 02:27:03.876691 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 02:27:03.877369 bl2_stage_init 0x01
331 02:27:03.877822 bl2_stage_init 0x81
332 02:27:03.882111 hw id: 0x0000 - pwm id 0x01
333 02:27:03.882601 bl2_stage_init 0xc1
334 02:27:03.887710 bl2_stage_init 0x02
335 02:27:03.888967
336 02:27:03.889448 L0:00000000
337 02:27:03.889887 L1:00000703
338 02:27:03.890316 L2:00008067
339 02:27:03.890741 L3:15000000
340 02:27:03.893376 S1:00000000
341 02:27:03.893879 B2:20282000
342 02:27:03.894317 B1:a0f83180
343 02:27:03.894755
344 02:27:03.895191 TE: 69558
345 02:27:03.895624
346 02:27:03.898851 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 02:27:03.899337
348 02:27:03.904595 Board ID = 1
349 02:27:03.905083 Set cpu clk to 24M
350 02:27:03.905520 Set clk81 to 24M
351 02:27:03.910102 Use GP1_pll as DSU clk.
352 02:27:03.910580 DSU clk: 1200 Mhz
353 02:27:03.911011 CPU clk: 1200 MHz
354 02:27:03.915712 Set clk81 to 166.6M
355 02:27:03.921305 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 02:27:03.921777 board id: 1
357 02:27:03.928506 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 02:27:03.939115 fw parse done
359 02:27:03.944934 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 02:27:03.987556 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 02:27:03.998450 PIEI prepare done
362 02:27:03.998916 fastboot data load
363 02:27:03.999358 fastboot data verify
364 02:27:04.004118 verify result: 266
365 02:27:04.009881 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 02:27:04.010345 LPDDR4 probe
367 02:27:04.010778 ddr clk to 1584MHz
368 02:27:04.017675 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 02:27:04.054932
370 02:27:04.055399 dmc_version 0001
371 02:27:04.061616 Check phy result
372 02:27:04.067517 INFO : End of CA training
373 02:27:04.067971 INFO : End of initialization
374 02:27:04.073125 INFO : Training has run successfully!
375 02:27:04.073584 Check phy result
376 02:27:04.078725 INFO : End of initialization
377 02:27:04.079179 INFO : End of read enable training
378 02:27:04.084381 INFO : End of fine write leveling
379 02:27:04.089926 INFO : End of Write leveling coarse delay
380 02:27:04.090385 INFO : Training has run successfully!
381 02:27:04.090820 Check phy result
382 02:27:04.095515 INFO : End of initialization
383 02:27:04.095971 INFO : End of read dq deskew training
384 02:27:04.101210 INFO : End of MPR read delay center optimization
385 02:27:04.106767 INFO : End of write delay center optimization
386 02:27:04.112434 INFO : End of read delay center optimization
387 02:27:04.112891 INFO : End of max read latency training
388 02:27:04.117957 INFO : Training has run successfully!
389 02:27:04.118411 1D training succeed
390 02:27:04.127145 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 02:27:04.174730 Check phy result
392 02:27:04.175226 INFO : End of initialization
393 02:27:04.197064 INFO : End of 2D read delay Voltage center optimization
394 02:27:04.216227 INFO : End of 2D read delay Voltage center optimization
395 02:27:04.268073 INFO : End of 2D write delay Voltage center optimization
396 02:27:04.317264 INFO : End of 2D write delay Voltage center optimization
397 02:27:04.322855 INFO : Training has run successfully!
398 02:27:04.323322
399 02:27:04.323762 channel==0
400 02:27:04.328475 RxClkDly_Margin_A0==88 ps 9
401 02:27:04.328948 TxDqDly_Margin_A0==98 ps 10
402 02:27:04.334048 RxClkDly_Margin_A1==88 ps 9
403 02:27:04.334505 TxDqDly_Margin_A1==98 ps 10
404 02:27:04.334945 TrainedVREFDQ_A0==74
405 02:27:04.339658 TrainedVREFDQ_A1==74
406 02:27:04.340144 VrefDac_Margin_A0==24
407 02:27:04.340582 DeviceVref_Margin_A0==40
408 02:27:04.345250 VrefDac_Margin_A1==23
409 02:27:04.345704 DeviceVref_Margin_A1==40
410 02:27:04.346134
411 02:27:04.346561
412 02:27:04.350836 channel==1
413 02:27:04.351295 RxClkDly_Margin_A0==88 ps 9
414 02:27:04.351726 TxDqDly_Margin_A0==98 ps 10
415 02:27:04.356471 RxClkDly_Margin_A1==78 ps 8
416 02:27:04.356928 TxDqDly_Margin_A1==88 ps 9
417 02:27:04.362233 TrainedVREFDQ_A0==78
418 02:27:04.362692 TrainedVREFDQ_A1==75
419 02:27:04.363127 VrefDac_Margin_A0==22
420 02:27:04.367651 DeviceVref_Margin_A0==36
421 02:27:04.368132 VrefDac_Margin_A1==22
422 02:27:04.373246 DeviceVref_Margin_A1==38
423 02:27:04.373705
424 02:27:04.374142 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 02:27:04.374569
426 02:27:04.406859 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
427 02:27:04.407435 2D training succeed
428 02:27:04.412500 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 02:27:04.418055 auto size-- 65535DDR cs0 size: 2048MB
430 02:27:04.418517 DDR cs1 size: 2048MB
431 02:27:04.423650 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 02:27:04.424154 cs0 DataBus test pass
433 02:27:04.429255 cs1 DataBus test pass
434 02:27:04.429714 cs0 AddrBus test pass
435 02:27:04.430144 cs1 AddrBus test pass
436 02:27:04.430571
437 02:27:04.434851 100bdlr_step_size ps== 478
438 02:27:04.435317 result report
439 02:27:04.440507 boot times 0Enable ddr reg access
440 02:27:04.445711 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 02:27:04.459562 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 02:27:05.114424 bl2z: ptr: 05129330, size: 00001e40
443 02:27:05.122514 0.0;M3 CHK:0;cm4_sp_mode 0
444 02:27:05.123005 MVN_1=0x00000000
445 02:27:05.123450 MVN_2=0x00000000
446 02:27:05.133983 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 02:27:05.134467 OPS=0x04
448 02:27:05.134917 ring efuse init
449 02:27:05.139594 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 02:27:05.140119 [0.017319 Inits done]
451 02:27:05.140563 secure task start!
452 02:27:05.147773 high task start!
453 02:27:05.148282 low task start!
454 02:27:05.148728 run into bl31
455 02:27:05.156295 NOTICE: BL31: v1.3(release):4fc40b1
456 02:27:05.164094 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 02:27:05.164590 NOTICE: BL31: G12A normal boot!
458 02:27:05.179551 NOTICE: BL31: BL33 decompress pass
459 02:27:05.185361 ERROR: Error initializing runtime service opteed_fast
460 02:27:07.927050 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 02:27:07.927752 bl2_stage_init 0x01
462 02:27:07.928287 bl2_stage_init 0x81
463 02:27:07.932511 hw id: 0x0000 - pwm id 0x01
464 02:27:07.933050 bl2_stage_init 0xc1
465 02:27:07.938128 bl2_stage_init 0x02
466 02:27:07.938680
467 02:27:07.939124 L0:00000000
468 02:27:07.939556 L1:00000703
469 02:27:07.940021 L2:00008067
470 02:27:07.940453 L3:15000000
471 02:27:07.943689 S1:00000000
472 02:27:07.944185 B2:20282000
473 02:27:07.944618 B1:a0f83180
474 02:27:07.945044
475 02:27:07.945467 TE: 70148
476 02:27:07.945893
477 02:27:07.949288 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 02:27:07.949760
479 02:27:07.954894 Board ID = 1
480 02:27:07.955370 Set cpu clk to 24M
481 02:27:07.955799 Set clk81 to 24M
482 02:27:07.960491 Use GP1_pll as DSU clk.
483 02:27:07.960964 DSU clk: 1200 Mhz
484 02:27:07.961395 CPU clk: 1200 MHz
485 02:27:07.966093 Set clk81 to 166.6M
486 02:27:07.971714 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 02:27:07.972219 board id: 1
488 02:27:07.978968 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 02:27:07.989937 fw parse done
490 02:27:07.995794 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 02:27:08.038980 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 02:27:08.050131 PIEI prepare done
493 02:27:08.050604 fastboot data load
494 02:27:08.051039 fastboot data verify
495 02:27:08.055648 verify result: 266
496 02:27:08.061258 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 02:27:08.061726 LPDDR4 probe
498 02:27:08.062156 ddr clk to 1584MHz
499 02:27:08.069225 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 02:27:08.106954
501 02:27:08.107459 dmc_version 0001
502 02:27:08.114033 Check phy result
503 02:27:08.120076 INFO : End of CA training
504 02:27:08.120625 INFO : End of initialization
505 02:27:08.125625 INFO : Training has run successfully!
506 02:27:08.126124 Check phy result
507 02:27:08.131214 INFO : End of initialization
508 02:27:08.131700 INFO : End of read enable training
509 02:27:08.136827 INFO : End of fine write leveling
510 02:27:08.142414 INFO : End of Write leveling coarse delay
511 02:27:08.142899 INFO : Training has run successfully!
512 02:27:08.143348 Check phy result
513 02:27:08.148008 INFO : End of initialization
514 02:27:08.148490 INFO : End of read dq deskew training
515 02:27:08.153591 INFO : End of MPR read delay center optimization
516 02:27:08.159192 INFO : End of write delay center optimization
517 02:27:08.164838 INFO : End of read delay center optimization
518 02:27:08.165314 INFO : End of max read latency training
519 02:27:08.170420 INFO : Training has run successfully!
520 02:27:08.170899 1D training succeed
521 02:27:08.179576 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 02:27:08.227874 Check phy result
523 02:27:08.228461 INFO : End of initialization
524 02:27:08.255218 INFO : End of 2D read delay Voltage center optimization
525 02:27:08.279353 INFO : End of 2D read delay Voltage center optimization
526 02:27:08.336035 INFO : End of 2D write delay Voltage center optimization
527 02:27:08.390039 INFO : End of 2D write delay Voltage center optimization
528 02:27:08.395532 INFO : Training has run successfully!
529 02:27:08.396041
530 02:27:08.396496 channel==0
531 02:27:08.401126 RxClkDly_Margin_A0==88 ps 9
532 02:27:08.401597 TxDqDly_Margin_A0==98 ps 10
533 02:27:08.406729 RxClkDly_Margin_A1==88 ps 9
534 02:27:08.407200 TxDqDly_Margin_A1==98 ps 10
535 02:27:08.407650 TrainedVREFDQ_A0==75
536 02:27:08.412334 TrainedVREFDQ_A1==76
537 02:27:08.412817 VrefDac_Margin_A0==22
538 02:27:08.413264 DeviceVref_Margin_A0==39
539 02:27:08.418009 VrefDac_Margin_A1==23
540 02:27:08.418480 DeviceVref_Margin_A1==38
541 02:27:08.418924
542 02:27:08.419364
543 02:27:08.423521 channel==1
544 02:27:08.424017 RxClkDly_Margin_A0==88 ps 9
545 02:27:08.424487 TxDqDly_Margin_A0==88 ps 9
546 02:27:08.429105 RxClkDly_Margin_A1==78 ps 8
547 02:27:08.429577 TxDqDly_Margin_A1==88 ps 9
548 02:27:08.434734 TrainedVREFDQ_A0==75
549 02:27:08.435218 TrainedVREFDQ_A1==77
550 02:27:08.435667 VrefDac_Margin_A0==23
551 02:27:08.440318 DeviceVref_Margin_A0==39
552 02:27:08.440794 VrefDac_Margin_A1==22
553 02:27:08.446017 DeviceVref_Margin_A1==37
554 02:27:08.446501
555 02:27:08.446951 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 02:27:08.447395
557 02:27:08.479511 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 02:27:08.480063 2D training succeed
559 02:27:08.485134 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 02:27:08.490736 auto size-- 65535DDR cs0 size: 2048MB
561 02:27:08.491237 DDR cs1 size: 2048MB
562 02:27:08.496320 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 02:27:08.496798 cs0 DataBus test pass
564 02:27:08.502027 cs1 DataBus test pass
565 02:27:08.502506 cs0 AddrBus test pass
566 02:27:08.502953 cs1 AddrBus test pass
567 02:27:08.503396
568 02:27:08.507524 100bdlr_step_size ps== 471
569 02:27:08.508045 result report
570 02:27:08.513129 boot times 0Enable ddr reg access
571 02:27:08.518304 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 02:27:08.532187 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 02:27:09.191199 bl2z: ptr: 05129330, size: 00001e40
574 02:27:09.197972 0.0;M3 CHK:0;cm4_sp_mode 0
575 02:27:09.198474 MVN_1=0x00000000
576 02:27:09.198893 MVN_2=0x00000000
577 02:27:09.209538 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 02:27:09.210033 OPS=0x04
579 02:27:09.210450 ring efuse init
580 02:27:09.212611 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 02:27:09.218392 [0.017354 Inits done]
582 02:27:09.218861 secure task start!
583 02:27:09.219273 high task start!
584 02:27:09.219674 low task start!
585 02:27:09.222485 run into bl31
586 02:27:09.231024 NOTICE: BL31: v1.3(release):4fc40b1
587 02:27:09.238841 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 02:27:09.239323 NOTICE: BL31: G12A normal boot!
589 02:27:09.254430 NOTICE: BL31: BL33 decompress pass
590 02:27:09.260070 ERROR: Error initializing runtime service opteed_fast
591 02:27:10.629290 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 02:27:10.629874 bl2_stage_init 0x01
593 02:27:10.630290 bl2_stage_init 0x81
594 02:27:10.634864 hw id: 0x0000 - pwm id 0x01
595 02:27:10.635333 bl2_stage_init 0xc1
596 02:27:10.640566 bl2_stage_init 0x02
597 02:27:10.641031
598 02:27:10.641441 L0:00000000
599 02:27:10.641839 L1:00000703
600 02:27:10.642231 L2:00008067
601 02:27:10.642622 L3:15000000
602 02:27:10.646046 S1:00000000
603 02:27:10.646505 B2:20282000
604 02:27:10.646909 B1:a0f83180
605 02:27:10.647305
606 02:27:10.647696 TE: 72057
607 02:27:10.648118
608 02:27:10.651623 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 02:27:10.652133
610 02:27:10.657214 Board ID = 1
611 02:27:10.657673 Set cpu clk to 24M
612 02:27:10.658078 Set clk81 to 24M
613 02:27:10.662919 Use GP1_pll as DSU clk.
614 02:27:10.663394 DSU clk: 1200 Mhz
615 02:27:10.663803 CPU clk: 1200 MHz
616 02:27:10.668395 Set clk81 to 166.6M
617 02:27:10.673918 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 02:27:10.674377 board id: 1
619 02:27:10.681118 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 02:27:10.692053 fw parse done
621 02:27:10.697976 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 02:27:10.741086 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 02:27:10.752282 PIEI prepare done
624 02:27:10.752746 fastboot data load
625 02:27:10.753160 fastboot data verify
626 02:27:10.757918 verify result: 266
627 02:27:10.763499 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 02:27:10.763958 LPDDR4 probe
629 02:27:10.764396 ddr clk to 1584MHz
630 02:27:10.771555 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 02:27:10.809181
632 02:27:10.809665 dmc_version 0001
633 02:27:10.816263 Check phy result
634 02:27:10.822239 INFO : End of CA training
635 02:27:10.822699 INFO : End of initialization
636 02:27:10.827849 INFO : Training has run successfully!
637 02:27:10.828350 Check phy result
638 02:27:10.833494 INFO : End of initialization
639 02:27:10.833953 INFO : End of read enable training
640 02:27:10.839040 INFO : End of fine write leveling
641 02:27:10.844619 INFO : End of Write leveling coarse delay
642 02:27:10.845077 INFO : Training has run successfully!
643 02:27:10.845488 Check phy result
644 02:27:10.850253 INFO : End of initialization
645 02:27:10.850711 INFO : End of read dq deskew training
646 02:27:10.855851 INFO : End of MPR read delay center optimization
647 02:27:10.861469 INFO : End of write delay center optimization
648 02:27:10.866974 INFO : End of read delay center optimization
649 02:27:10.867434 INFO : End of max read latency training
650 02:27:10.872582 INFO : Training has run successfully!
651 02:27:10.873039 1D training succeed
652 02:27:10.881742 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 02:27:10.930065 Check phy result
654 02:27:10.930562 INFO : End of initialization
655 02:27:10.957434 INFO : End of 2D read delay Voltage center optimization
656 02:27:10.981602 INFO : End of 2D read delay Voltage center optimization
657 02:27:11.038308 INFO : End of 2D write delay Voltage center optimization
658 02:27:11.092298 INFO : End of 2D write delay Voltage center optimization
659 02:27:11.097874 INFO : Training has run successfully!
660 02:27:11.098336
661 02:27:11.098746 channel==0
662 02:27:11.103513 RxClkDly_Margin_A0==78 ps 8
663 02:27:11.103976 TxDqDly_Margin_A0==88 ps 9
664 02:27:11.109096 RxClkDly_Margin_A1==69 ps 7
665 02:27:11.109564 TxDqDly_Margin_A1==98 ps 10
666 02:27:11.109975 TrainedVREFDQ_A0==74
667 02:27:11.114680 TrainedVREFDQ_A1==74
668 02:27:11.115141 VrefDac_Margin_A0==22
669 02:27:11.115547 DeviceVref_Margin_A0==40
670 02:27:11.120279 VrefDac_Margin_A1==22
671 02:27:11.120746 DeviceVref_Margin_A1==40
672 02:27:11.121156
673 02:27:11.121557
674 02:27:11.121951 channel==1
675 02:27:11.125881 RxClkDly_Margin_A0==78 ps 8
676 02:27:11.126342 TxDqDly_Margin_A0==88 ps 9
677 02:27:11.131529 RxClkDly_Margin_A1==78 ps 8
678 02:27:11.132014 TxDqDly_Margin_A1==88 ps 9
679 02:27:11.137082 TrainedVREFDQ_A0==75
680 02:27:11.137549 TrainedVREFDQ_A1==75
681 02:27:11.137958 VrefDac_Margin_A0==22
682 02:27:11.142674 DeviceVref_Margin_A0==39
683 02:27:11.143135 VrefDac_Margin_A1==22
684 02:27:11.143536 DeviceVref_Margin_A1==38
685 02:27:11.148259
686 02:27:11.148724 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 02:27:11.149128
688 02:27:11.181819 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
689 02:27:11.182372 2D training succeed
690 02:27:11.187490 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 02:27:11.193061 auto size-- 65535DDR cs0 size: 2048MB
692 02:27:11.193524 DDR cs1 size: 2048MB
693 02:27:11.198685 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 02:27:11.199150 cs0 DataBus test pass
695 02:27:11.204281 cs1 DataBus test pass
696 02:27:11.204744 cs0 AddrBus test pass
697 02:27:11.205151 cs1 AddrBus test pass
698 02:27:11.205550
699 02:27:11.209882 100bdlr_step_size ps== 478
700 02:27:11.210362 result report
701 02:27:11.215471 boot times 0Enable ddr reg access
702 02:27:11.220614 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 02:27:11.234374 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 02:27:11.893289 bl2z: ptr: 05129330, size: 00001e40
705 02:27:11.899785 0.0;M3 CHK:0;cm4_sp_mode 0
706 02:27:11.900307 MVN_1=0x00000000
707 02:27:11.900722 MVN_2=0x00000000
708 02:27:11.911229 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 02:27:11.911708 OPS=0x04
710 02:27:11.912155 ring efuse init
711 02:27:11.914183 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 02:27:11.920253 [0.017354 Inits done]
713 02:27:11.920714 secure task start!
714 02:27:11.921126 high task start!
715 02:27:11.921526 low task start!
716 02:27:11.924595 run into bl31
717 02:27:11.933164 NOTICE: BL31: v1.3(release):4fc40b1
718 02:27:11.940987 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 02:27:11.941459 NOTICE: BL31: G12A normal boot!
720 02:27:11.956548 NOTICE: BL31: BL33 decompress pass
721 02:27:11.962180 ERROR: Error initializing runtime service opteed_fast
722 02:27:12.757494
723 02:27:12.758052
724 02:27:12.762920 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 02:27:12.763385
726 02:27:12.766425 Model: Libre Computer AML-S905D3-CC Solitude
727 02:27:12.913406 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 02:27:12.928829 DRAM: 2 GiB (effective 3.8 GiB)
729 02:27:13.029805 Core: 406 devices, 33 uclasses, devicetree: separate
730 02:27:13.035685 WDT: Not starting watchdog@f0d0
731 02:27:13.060717 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 02:27:13.072949 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 02:27:13.077965 ** Bad device specification mmc 0 **
734 02:27:13.088034 Card did not respond to voltage select! : -110
735 02:27:13.095761 ** Bad device specification mmc 0 **
736 02:27:13.096286 Couldn't find partition mmc 0
737 02:27:13.104046 Card did not respond to voltage select! : -110
738 02:27:13.109546 ** Bad device specification mmc 0 **
739 02:27:13.110006 Couldn't find partition mmc 0
740 02:27:13.114602 Error: could not access storage.
741 02:27:13.411000 Net: eth0: ethernet@ff3f0000
742 02:27:13.411558 starting USB...
743 02:27:13.655680 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 02:27:13.656238 Starting the controller
745 02:27:13.662675 USB XHCI 1.10
746 02:27:15.219123 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 02:27:15.227348 scanning usb for storage devices... 0 Storage Device(s) found
749 02:27:15.278829 Hit any key to stop autoboot: 1
750 02:27:15.279652 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 02:27:15.280448 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 02:27:15.280940 Setting prompt string to ['=>']
753 02:27:15.281424 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 02:27:15.293399 0
755 02:27:15.294308 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 02:27:15.395517 => setenv autoload no
758 02:27:15.396473 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 02:27:15.401336 setenv autoload no
761 02:27:15.502796 => setenv initrd_high 0xffffffff
762 02:27:15.503687 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 02:27:15.507859 setenv initrd_high 0xffffffff
765 02:27:15.609360 => setenv fdt_high 0xffffffff
766 02:27:15.610319 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 02:27:15.614498 setenv fdt_high 0xffffffff
769 02:27:15.715969 => dhcp
770 02:27:15.716899 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 02:27:15.720809 dhcp
772 02:27:16.826897 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 02:27:16.827330 Speed: 1000, full duplex
774 02:27:16.827566 BOOTP broadcast 1
775 02:27:16.835310 DHCP client bound to address 192.168.6.21 (7 ms)
777 02:27:16.936662 => setenv serverip 192.168.6.2
778 02:27:16.937459 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
779 02:27:16.941841 setenv serverip 192.168.6.2
781 02:27:17.042900 => tftpboot 0x01080000 932179/tftp-deploy-yb6boy0r/kernel/uImage
782 02:27:17.043753 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
783 02:27:17.050328 tftpboot 0x01080000 932179/tftp-deploy-yb6boy0r/kernel/uImage
784 02:27:17.050626 Speed: 1000, full duplex
785 02:27:17.050844 Using ethernet@ff3f0000 device
786 02:27:17.055789 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 02:27:17.061375 Filename '932179/tftp-deploy-yb6boy0r/kernel/uImage'.
788 02:27:17.065165 Load address: 0x1080000
789 02:27:20.253126 Loading: *################################################## 43.6 MiB
790 02:27:20.253571 13.7 MiB/s
791 02:27:20.253795 done
792 02:27:20.258277 Bytes transferred = 45716032 (2b99240 hex)
794 02:27:20.360151 => tftpboot 0x08000000 932179/tftp-deploy-yb6boy0r/ramdisk/ramdisk.cpio.gz.uboot
795 02:27:20.360939 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
796 02:27:20.367777 tftpboot 0x08000000 932179/tftp-deploy-yb6boy0r/ramdisk/ramdisk.cpio.gz.uboot
797 02:27:20.368243 Speed: 1000, full duplex
798 02:27:20.368471 Using ethernet@ff3f0000 device
799 02:27:20.373311 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 02:27:20.383066 Filename '932179/tftp-deploy-yb6boy0r/ramdisk/ramdisk.cpio.gz.uboot'.
801 02:27:20.383499 Load address: 0x8000000
802 02:27:21.340218 Loading: *############################# UDP wrong checksum 000000ff 00002dc1
803 02:27:21.372263 # UDP wrong checksum 000000ff 0000b6b3
804 02:27:22.042936 ################### UDP wrong checksum 00000005 0000411d
805 02:27:27.043485 T UDP wrong checksum 00000005 0000411d
806 02:27:37.045581 T T UDP wrong checksum 00000005 0000411d
807 02:27:54.053123 T T T UDP wrong checksum 000000ff 00000727
808 02:27:54.100580 UDP wrong checksum 000000ff 0000a019
809 02:27:57.049541 T UDP wrong checksum 00000005 0000411d
810 02:28:17.053959 T T T
811 02:28:17.054601 Retry count exceeded; starting again
813 02:28:17.056382 end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
816 02:28:17.058290 end: 2.4 uboot-commands (duration 00:01:21) [common]
818 02:28:17.059718 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
820 02:28:17.060867 end: 2 uboot-action (duration 00:01:21) [common]
822 02:28:17.062442 Cleaning after the job
823 02:28:17.063025 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/ramdisk
824 02:28:17.064355 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/kernel
825 02:28:17.108992 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/dtb
826 02:28:17.109845 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/nfsrootfs
827 02:28:17.441694 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932179/tftp-deploy-yb6boy0r/modules
828 02:28:17.466283 start: 4.1 power-off (timeout 00:00:30) [common]
829 02:28:17.467083 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
830 02:28:17.501217 >> OK - accepted request
831 02:28:17.503641 Returned 0 in 0 seconds
832 02:28:17.604727 end: 4.1 power-off (duration 00:00:00) [common]
834 02:28:17.605948 start: 4.2 read-feedback (timeout 00:10:00) [common]
835 02:28:17.606758 Listened to connection for namespace 'common' for up to 1s
836 02:28:18.607747 Finalising connection for namespace 'common'
837 02:28:18.608372 Disconnecting from shell: Finalise
838 02:28:18.608771 =>
839 02:28:18.709535 end: 4.2 read-feedback (duration 00:00:01) [common]
840 02:28:18.710016 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/932179
841 02:28:21.300382 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/932179
842 02:28:21.300977 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.