Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:08:44.171644 lava-dispatcher, installed at version: 2024.01
2 09:08:44.172472 start: 0 validate
3 09:08:44.172980 Start time: 2024-11-05 09:08:44.172948+00:00 (UTC)
4 09:08:44.173546 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:08:44.174081 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:08:44.213309 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:08:44.213841 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-192-g566383b19a748%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 09:08:44.241687 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:08:44.242300 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-192-g566383b19a748%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:08:44.271166 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:08:44.271671 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:08:44.303368 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:08:44.303928 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-192-g566383b19a748%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 09:08:44.342401 validate duration: 0.17
16 09:08:44.343253 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:08:44.343563 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:08:44.343865 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:08:44.344561 Not decompressing ramdisk as can be used compressed.
20 09:08:44.345010 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 09:08:44.345283 saving as /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/ramdisk/initrd.cpio.gz
22 09:08:44.345547 total size: 5628169 (5 MB)
23 09:08:44.380026 progress 0 % (0 MB)
24 09:08:44.388055 progress 5 % (0 MB)
25 09:08:44.396262 progress 10 % (0 MB)
26 09:08:44.400204 progress 15 % (0 MB)
27 09:08:44.404564 progress 20 % (1 MB)
28 09:08:44.408573 progress 25 % (1 MB)
29 09:08:44.412827 progress 30 % (1 MB)
30 09:08:44.417245 progress 35 % (1 MB)
31 09:08:44.421197 progress 40 % (2 MB)
32 09:08:44.425386 progress 45 % (2 MB)
33 09:08:44.429335 progress 50 % (2 MB)
34 09:08:44.433622 progress 55 % (2 MB)
35 09:08:44.437997 progress 60 % (3 MB)
36 09:08:44.441803 progress 65 % (3 MB)
37 09:08:44.445951 progress 70 % (3 MB)
38 09:08:44.449756 progress 75 % (4 MB)
39 09:08:44.453879 progress 80 % (4 MB)
40 09:08:44.457696 progress 85 % (4 MB)
41 09:08:44.461862 progress 90 % (4 MB)
42 09:08:44.465874 progress 95 % (5 MB)
43 09:08:44.469245 progress 100 % (5 MB)
44 09:08:44.469938 5 MB downloaded in 0.12 s (43.16 MB/s)
45 09:08:44.470509 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:08:44.471449 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:08:44.471758 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:08:44.472066 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:08:44.472568 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-192-g566383b19a748/arm64/defconfig/gcc-12/kernel/Image
51 09:08:44.472820 saving as /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/kernel/Image
52 09:08:44.473038 total size: 45715968 (43 MB)
53 09:08:44.473257 No compression specified
54 09:08:44.512422 progress 0 % (0 MB)
55 09:08:44.543019 progress 5 % (2 MB)
56 09:08:44.574125 progress 10 % (4 MB)
57 09:08:44.603791 progress 15 % (6 MB)
58 09:08:44.633626 progress 20 % (8 MB)
59 09:08:44.662822 progress 25 % (10 MB)
60 09:08:44.692210 progress 30 % (13 MB)
61 09:08:44.721785 progress 35 % (15 MB)
62 09:08:44.751232 progress 40 % (17 MB)
63 09:08:44.780397 progress 45 % (19 MB)
64 09:08:44.809599 progress 50 % (21 MB)
65 09:08:44.838857 progress 55 % (24 MB)
66 09:08:44.868898 progress 60 % (26 MB)
67 09:08:44.898317 progress 65 % (28 MB)
68 09:08:44.927868 progress 70 % (30 MB)
69 09:08:44.958273 progress 75 % (32 MB)
70 09:08:44.989322 progress 80 % (34 MB)
71 09:08:45.019162 progress 85 % (37 MB)
72 09:08:45.048535 progress 90 % (39 MB)
73 09:08:45.078488 progress 95 % (41 MB)
74 09:08:45.107456 progress 100 % (43 MB)
75 09:08:45.108045 43 MB downloaded in 0.63 s (68.66 MB/s)
76 09:08:45.108528 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:08:45.109333 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:08:45.109606 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:08:45.109870 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:08:45.110338 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-192-g566383b19a748/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 09:08:45.110613 saving as /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/dtb/meson-g12b-a311d-libretech-cc.dtb
83 09:08:45.110820 total size: 54703 (0 MB)
84 09:08:45.111027 No compression specified
85 09:08:45.144728 progress 59 % (0 MB)
86 09:08:45.145576 progress 100 % (0 MB)
87 09:08:45.146162 0 MB downloaded in 0.04 s (1.48 MB/s)
88 09:08:45.146678 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:08:45.147532 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:08:45.147807 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:08:45.148111 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:08:45.148608 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 09:08:45.148861 saving as /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/nfsrootfs/full.rootfs.tar
95 09:08:45.149078 total size: 120894716 (115 MB)
96 09:08:45.149298 Using unxz to decompress xz
97 09:08:45.189852 progress 0 % (0 MB)
98 09:08:46.000317 progress 5 % (5 MB)
99 09:08:46.850601 progress 10 % (11 MB)
100 09:08:47.652454 progress 15 % (17 MB)
101 09:08:48.398130 progress 20 % (23 MB)
102 09:08:48.992643 progress 25 % (28 MB)
103 09:08:49.848136 progress 30 % (34 MB)
104 09:08:50.669977 progress 35 % (40 MB)
105 09:08:51.016627 progress 40 % (46 MB)
106 09:08:51.390823 progress 45 % (51 MB)
107 09:08:52.129609 progress 50 % (57 MB)
108 09:08:53.064138 progress 55 % (63 MB)
109 09:08:54.015017 progress 60 % (69 MB)
110 09:08:54.922134 progress 65 % (74 MB)
111 09:08:55.786615 progress 70 % (80 MB)
112 09:08:56.679354 progress 75 % (86 MB)
113 09:08:57.481536 progress 80 % (92 MB)
114 09:08:58.248180 progress 85 % (98 MB)
115 09:08:59.134398 progress 90 % (103 MB)
116 09:08:59.924629 progress 95 % (109 MB)
117 09:09:00.760694 progress 100 % (115 MB)
118 09:09:00.773833 115 MB downloaded in 15.62 s (7.38 MB/s)
119 09:09:00.774704 end: 1.4.1 http-download (duration 00:00:16) [common]
121 09:09:00.776358 end: 1.4 download-retry (duration 00:00:16) [common]
122 09:09:00.776881 start: 1.5 download-retry (timeout 00:09:44) [common]
123 09:09:00.777390 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 09:09:00.778174 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-192-g566383b19a748/arm64/defconfig/gcc-12/modules.tar.xz
125 09:09:00.778627 saving as /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/modules/modules.tar
126 09:09:00.779028 total size: 11615948 (11 MB)
127 09:09:00.779442 Using unxz to decompress xz
128 09:09:00.826927 progress 0 % (0 MB)
129 09:09:00.905106 progress 5 % (0 MB)
130 09:09:00.996893 progress 10 % (1 MB)
131 09:09:01.115356 progress 15 % (1 MB)
132 09:09:01.226344 progress 20 % (2 MB)
133 09:09:01.321022 progress 25 % (2 MB)
134 09:09:01.411354 progress 30 % (3 MB)
135 09:09:01.505575 progress 35 % (3 MB)
136 09:09:01.592275 progress 40 % (4 MB)
137 09:09:01.684316 progress 45 % (5 MB)
138 09:09:01.785291 progress 50 % (5 MB)
139 09:09:01.877499 progress 55 % (6 MB)
140 09:09:01.980226 progress 60 % (6 MB)
141 09:09:02.078838 progress 65 % (7 MB)
142 09:09:02.174797 progress 70 % (7 MB)
143 09:09:02.267742 progress 75 % (8 MB)
144 09:09:02.368123 progress 80 % (8 MB)
145 09:09:02.463759 progress 85 % (9 MB)
146 09:09:02.552692 progress 90 % (10 MB)
147 09:09:02.629693 progress 95 % (10 MB)
148 09:09:02.706794 progress 100 % (11 MB)
149 09:09:02.719551 11 MB downloaded in 1.94 s (5.71 MB/s)
150 09:09:02.720291 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:09:02.722159 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:09:02.722741 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 09:09:02.723313 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 09:09:21.069352 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/939167/extract-nfsrootfs-p35m6i_j
156 09:09:21.069998 end: 1.6.1 extract-nfsrootfs (duration 00:00:18) [common]
157 09:09:21.070330 start: 1.6.2 lava-overlay (timeout 00:09:23) [common]
158 09:09:21.071098 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk
159 09:09:21.071712 makedir: /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin
160 09:09:21.072509 makedir: /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/tests
161 09:09:21.073055 makedir: /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/results
162 09:09:21.073470 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-add-keys
163 09:09:21.074128 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-add-sources
164 09:09:21.074808 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-background-process-start
165 09:09:21.075457 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-background-process-stop
166 09:09:21.076227 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-common-functions
167 09:09:21.076922 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-echo-ipv4
168 09:09:21.077585 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-install-packages
169 09:09:21.078235 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-installed-packages
170 09:09:21.079119 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-os-build
171 09:09:21.080846 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-probe-channel
172 09:09:21.082996 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-probe-ip
173 09:09:21.085663 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-target-ip
174 09:09:21.088139 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-target-mac
175 09:09:21.090556 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-target-storage
176 09:09:21.092603 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-test-case
177 09:09:21.095094 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-test-event
178 09:09:21.097086 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-test-feedback
179 09:09:21.099547 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-test-raise
180 09:09:21.101548 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-test-reference
181 09:09:21.104095 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-test-runner
182 09:09:21.106082 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-test-set
183 09:09:21.108519 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-test-shell
184 09:09:21.110494 Updating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-add-keys (debian)
185 09:09:21.111431 Updating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-add-sources (debian)
186 09:09:21.112164 Updating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-install-packages (debian)
187 09:09:21.112788 Updating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-installed-packages (debian)
188 09:09:21.113460 Updating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/bin/lava-os-build (debian)
189 09:09:21.114031 Creating /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/environment
190 09:09:21.114499 LAVA metadata
191 09:09:21.114805 - LAVA_JOB_ID=939167
192 09:09:21.115042 - LAVA_DISPATCHER_IP=192.168.6.2
193 09:09:21.115499 start: 1.6.2.1 ssh-authorize (timeout 00:09:23) [common]
194 09:09:21.116801 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 09:09:21.117206 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:23) [common]
196 09:09:21.117439 skipped lava-vland-overlay
197 09:09:21.117747 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 09:09:21.118085 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:23) [common]
199 09:09:21.118343 skipped lava-multinode-overlay
200 09:09:21.118603 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 09:09:21.118862 start: 1.6.2.4 test-definition (timeout 00:09:23) [common]
202 09:09:21.119133 Loading test definitions
203 09:09:21.119430 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:23) [common]
204 09:09:21.119654 Using /lava-939167 at stage 0
205 09:09:21.120912 uuid=939167_1.6.2.4.1 testdef=None
206 09:09:21.121274 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 09:09:21.121549 start: 1.6.2.4.2 test-overlay (timeout 00:09:23) [common]
208 09:09:21.123287 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 09:09:21.124165 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:23) [common]
211 09:09:21.126301 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 09:09:21.127187 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:23) [common]
214 09:09:21.129220 runner path: /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/0/tests/0_timesync-off test_uuid 939167_1.6.2.4.1
215 09:09:21.129895 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 09:09:21.130761 start: 1.6.2.4.5 git-repo-action (timeout 00:09:23) [common]
218 09:09:21.131015 Using /lava-939167 at stage 0
219 09:09:21.131403 Fetching tests from https://github.com/kernelci/test-definitions.git
220 09:09:21.131706 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/0/tests/1_kselftest-dt'
221 09:09:24.523386 Running '/usr/bin/git checkout kernelci.org
222 09:09:24.927612 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 09:09:24.930317 uuid=939167_1.6.2.4.5 testdef=None
224 09:09:24.931057 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 09:09:24.932734 start: 1.6.2.4.6 test-overlay (timeout 00:09:19) [common]
227 09:09:24.938965 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 09:09:24.940839 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:19) [common]
230 09:09:24.949725 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 09:09:24.951660 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:19) [common]
233 09:09:24.959870 runner path: /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/0/tests/1_kselftest-dt test_uuid 939167_1.6.2.4.5
234 09:09:24.960556 BOARD='meson-g12b-a311d-libretech-cc'
235 09:09:24.961004 BRANCH='next'
236 09:09:24.961439 SKIPFILE='/dev/null'
237 09:09:24.961873 SKIP_INSTALL='True'
238 09:09:24.962302 TESTPROG_URL='http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-192-g566383b19a748/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 09:09:24.962740 TST_CASENAME=''
240 09:09:24.963172 TST_CMDFILES='dt'
241 09:09:24.964506 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 09:09:24.966260 Creating lava-test-runner.conf files
244 09:09:24.966710 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/939167/lava-overlay-9fvgy0kk/lava-939167/0 for stage 0
245 09:09:24.967435 - 0_timesync-off
246 09:09:24.967935 - 1_kselftest-dt
247 09:09:24.968695 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 09:09:24.969297 start: 1.6.2.5 compress-overlay (timeout 00:09:19) [common]
249 09:09:48.758734 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 09:09:48.759190 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:56) [common]
251 09:09:48.759456 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 09:09:48.759728 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 09:09:48.760022 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:56) [common]
254 09:09:49.406458 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 09:09:49.406972 start: 1.6.4 extract-modules (timeout 00:08:55) [common]
256 09:09:49.407257 extracting modules file /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/modules/modules.tar to /var/lib/lava/dispatcher/tmp/939167/extract-nfsrootfs-p35m6i_j
257 09:09:50.836169 extracting modules file /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/modules/modules.tar to /var/lib/lava/dispatcher/tmp/939167/extract-overlay-ramdisk-fbp78btf/ramdisk
258 09:09:52.248666 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 09:09:52.249141 start: 1.6.5 apply-overlay-tftp (timeout 00:08:52) [common]
260 09:09:52.249417 [common] Applying overlay to NFS
261 09:09:52.249634 [common] Applying overlay /var/lib/lava/dispatcher/tmp/939167/compress-overlay-n1ky4asz/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/939167/extract-nfsrootfs-p35m6i_j
262 09:09:55.034153 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 09:09:55.034633 start: 1.6.6 prepare-kernel (timeout 00:08:49) [common]
264 09:09:55.034908 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:49) [common]
265 09:09:55.035139 Converting downloaded kernel to a uImage
266 09:09:55.035452 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/kernel/Image /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/kernel/uImage
267 09:09:55.545416 output: Image Name:
268 09:09:55.545838 output: Created: Tue Nov 5 09:09:55 2024
269 09:09:55.546049 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 09:09:55.546254 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
271 09:09:55.546455 output: Load Address: 01080000
272 09:09:55.546654 output: Entry Point: 01080000
273 09:09:55.546851 output:
274 09:09:55.547182 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 09:09:55.547449 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 09:09:55.547719 start: 1.6.7 configure-preseed-file (timeout 00:08:49) [common]
277 09:09:55.547974 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 09:09:55.548279 start: 1.6.8 compress-ramdisk (timeout 00:08:49) [common]
279 09:09:55.548546 Building ramdisk /var/lib/lava/dispatcher/tmp/939167/extract-overlay-ramdisk-fbp78btf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/939167/extract-overlay-ramdisk-fbp78btf/ramdisk
280 09:09:57.691556 >> 166830 blocks
281 09:10:05.505711 Adding RAMdisk u-boot header.
282 09:10:05.506426 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/939167/extract-overlay-ramdisk-fbp78btf/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/939167/extract-overlay-ramdisk-fbp78btf/ramdisk.cpio.gz.uboot
283 09:10:05.760656 output: Image Name:
284 09:10:05.761082 output: Created: Tue Nov 5 09:10:05 2024
285 09:10:05.761613 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 09:10:05.762081 output: Data Size: 23432969 Bytes = 22883.76 KiB = 22.35 MiB
287 09:10:05.762557 output: Load Address: 00000000
288 09:10:05.763004 output: Entry Point: 00000000
289 09:10:05.763454 output:
290 09:10:05.764574 rename /var/lib/lava/dispatcher/tmp/939167/extract-overlay-ramdisk-fbp78btf/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/ramdisk/ramdisk.cpio.gz.uboot
291 09:10:05.765374 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 09:10:05.765989 end: 1.6 prepare-tftp-overlay (duration 00:01:03) [common]
293 09:10:05.766580 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:39) [common]
294 09:10:05.767100 No LXC device requested
295 09:10:05.767666 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 09:10:05.768284 start: 1.8 deploy-device-env (timeout 00:08:39) [common]
297 09:10:05.768853 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 09:10:05.769314 Checking files for TFTP limit of 4294967296 bytes.
299 09:10:05.772339 end: 1 tftp-deploy (duration 00:01:21) [common]
300 09:10:05.773003 start: 2 uboot-action (timeout 00:05:00) [common]
301 09:10:05.773592 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 09:10:05.774148 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 09:10:05.774710 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 09:10:05.775302 Using kernel file from prepare-kernel: 939167/tftp-deploy-sw0poq40/kernel/uImage
305 09:10:05.776060 substitutions:
306 09:10:05.776299 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 09:10:05.776510 - {DTB_ADDR}: 0x01070000
308 09:10:05.776712 - {DTB}: 939167/tftp-deploy-sw0poq40/dtb/meson-g12b-a311d-libretech-cc.dtb
309 09:10:05.776919 - {INITRD}: 939167/tftp-deploy-sw0poq40/ramdisk/ramdisk.cpio.gz.uboot
310 09:10:05.777289 - {KERNEL_ADDR}: 0x01080000
311 09:10:05.777739 - {KERNEL}: 939167/tftp-deploy-sw0poq40/kernel/uImage
312 09:10:05.778197 - {LAVA_MAC}: None
313 09:10:05.778690 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/939167/extract-nfsrootfs-p35m6i_j
314 09:10:05.779138 - {NFS_SERVER_IP}: 192.168.6.2
315 09:10:05.779575 - {PRESEED_CONFIG}: None
316 09:10:05.780054 - {PRESEED_LOCAL}: None
317 09:10:05.780277 - {RAMDISK_ADDR}: 0x08000000
318 09:10:05.780486 - {RAMDISK}: 939167/tftp-deploy-sw0poq40/ramdisk/ramdisk.cpio.gz.uboot
319 09:10:05.780692 - {ROOT_PART}: None
320 09:10:05.780900 - {ROOT}: None
321 09:10:05.781255 - {SERVER_IP}: 192.168.6.2
322 09:10:05.781711 - {TEE_ADDR}: 0x83000000
323 09:10:05.782164 - {TEE}: None
324 09:10:05.782599 Parsed boot commands:
325 09:10:05.783021 - setenv autoload no
326 09:10:05.783454 - setenv initrd_high 0xffffffff
327 09:10:05.783883 - setenv fdt_high 0xffffffff
328 09:10:05.784359 - dhcp
329 09:10:05.784792 - setenv serverip 192.168.6.2
330 09:10:05.785226 - tftpboot 0x01080000 939167/tftp-deploy-sw0poq40/kernel/uImage
331 09:10:05.785662 - tftpboot 0x08000000 939167/tftp-deploy-sw0poq40/ramdisk/ramdisk.cpio.gz.uboot
332 09:10:05.786101 - tftpboot 0x01070000 939167/tftp-deploy-sw0poq40/dtb/meson-g12b-a311d-libretech-cc.dtb
333 09:10:05.786537 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/939167/extract-nfsrootfs-p35m6i_j,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 09:10:05.786988 - bootm 0x01080000 0x08000000 0x01070000
335 09:10:05.787561 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 09:10:05.789267 start: 2.3 connect-device (timeout 00:05:00) [common]
338 09:10:05.789746 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 09:10:05.805666 Setting prompt string to ['lava-test: # ']
340 09:10:05.807365 end: 2.3 connect-device (duration 00:00:00) [common]
341 09:10:05.808139 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 09:10:05.808869 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 09:10:05.809713 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 09:10:05.811009 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 09:10:05.847307 >> OK - accepted request
346 09:10:05.848630 Returned 0 in 0 seconds
347 09:10:05.949476 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 09:10:05.950537 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 09:10:05.950855 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 09:10:05.951136 Setting prompt string to ['Hit any key to stop autoboot']
352 09:10:05.951392 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 09:10:05.952356 Trying 192.168.56.21...
354 09:10:05.952641 Connected to conserv1.
355 09:10:05.952855 Escape character is '^]'.
356 09:10:05.953074
357 09:10:05.953288 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 09:10:05.953511
359 09:10:17.171112 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 09:10:17.171573 bl2_stage_init 0x01
361 09:10:17.171835 bl2_stage_init 0x81
362 09:10:17.176303 hw id: 0x0000 - pwm id 0x01
363 09:10:17.176702 bl2_stage_init 0xc1
364 09:10:17.176964 bl2_stage_init 0x02
365 09:10:17.177202
366 09:10:17.181953 L0:00000000
367 09:10:17.182396 L1:20000703
368 09:10:17.182659 L2:00008067
369 09:10:17.182908 L3:14000000
370 09:10:17.185005 B2:00402000
371 09:10:17.185408 B1:e0f83180
372 09:10:17.185635
373 09:10:17.185840 TE: 58167
374 09:10:17.186042
375 09:10:17.197049 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 09:10:17.198759
377 09:10:17.199013 Board ID = 1
378 09:10:17.199256 Set A53 clk to 24M
379 09:10:17.199485 Set A73 clk to 24M
380 09:10:17.201772 Set clk81 to 24M
381 09:10:17.202820 A53 clk: 1200 MHz
382 09:10:17.203094 A73 clk: 1200 MHz
383 09:10:17.206996 CLK81: 166.6M
384 09:10:17.207309 smccc: 00012abe
385 09:10:17.212784 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 09:10:17.213146 board id: 1
387 09:10:17.218217 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 09:10:17.231968 fw parse done
389 09:10:17.237817 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 09:10:17.280551 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 09:10:17.291327 PIEI prepare done
392 09:10:17.291658 fastboot data load
393 09:10:17.291878 fastboot data verify
394 09:10:17.297050 verify result: 266
395 09:10:17.303433 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 09:10:17.303816 LPDDR4 probe
397 09:10:17.304072 ddr clk to 1584MHz
398 09:10:17.310687 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 09:10:17.348057
400 09:10:17.348453 dmc_version 0001
401 09:10:17.354673 Check phy result
402 09:10:17.360425 INFO : End of CA training
403 09:10:17.360768 INFO : End of initialization
404 09:10:17.366044 INFO : Training has run successfully!
405 09:10:17.366350 Check phy result
406 09:10:17.371611 INFO : End of initialization
407 09:10:17.371907 INFO : End of read enable training
408 09:10:17.375124 INFO : End of fine write leveling
409 09:10:17.380557 INFO : End of Write leveling coarse delay
410 09:10:17.386233 INFO : Training has run successfully!
411 09:10:17.386561 Check phy result
412 09:10:17.386785 INFO : End of initialization
413 09:10:17.391837 INFO : End of read dq deskew training
414 09:10:17.397599 INFO : End of MPR read delay center optimization
415 09:10:17.397919 INFO : End of write delay center optimization
416 09:10:17.403355 INFO : End of read delay center optimization
417 09:10:17.408610 INFO : End of max read latency training
418 09:10:17.409003 INFO : Training has run successfully!
419 09:10:17.414267 1D training succeed
420 09:10:17.420261 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 09:10:17.467770 Check phy result
422 09:10:17.468200 INFO : End of initialization
423 09:10:17.489360 INFO : End of 2D read delay Voltage center optimization
424 09:10:17.509594 INFO : End of 2D read delay Voltage center optimization
425 09:10:17.561803 INFO : End of 2D write delay Voltage center optimization
426 09:10:17.611108 INFO : End of 2D write delay Voltage center optimization
427 09:10:17.616735 INFO : Training has run successfully!
428 09:10:17.617155
429 09:10:17.617394 channel==0
430 09:10:17.622256 RxClkDly_Margin_A0==88 ps 9
431 09:10:17.622627 TxDqDly_Margin_A0==98 ps 10
432 09:10:17.627798 RxClkDly_Margin_A1==88 ps 9
433 09:10:17.628201 TxDqDly_Margin_A1==88 ps 9
434 09:10:17.628434 TrainedVREFDQ_A0==74
435 09:10:17.633482 TrainedVREFDQ_A1==74
436 09:10:17.634009 VrefDac_Margin_A0==25
437 09:10:17.634398 DeviceVref_Margin_A0==40
438 09:10:17.639049 VrefDac_Margin_A1==25
439 09:10:17.639538 DeviceVref_Margin_A1==40
440 09:10:17.639798
441 09:10:17.640037
442 09:10:17.640254 channel==1
443 09:10:17.644519 RxClkDly_Margin_A0==98 ps 10
444 09:10:17.644824 TxDqDly_Margin_A0==98 ps 10
445 09:10:17.650260 RxClkDly_Margin_A1==98 ps 10
446 09:10:17.650577 TxDqDly_Margin_A1==88 ps 9
447 09:10:17.655638 TrainedVREFDQ_A0==77
448 09:10:17.655998 TrainedVREFDQ_A1==77
449 09:10:17.656365 VrefDac_Margin_A0==22
450 09:10:17.661495 DeviceVref_Margin_A0==37
451 09:10:17.661834 VrefDac_Margin_A1==22
452 09:10:17.667222 DeviceVref_Margin_A1==37
453 09:10:17.667594
454 09:10:17.667821 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 09:10:17.668068
456 09:10:17.700561 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 09:10:17.701008 2D training succeed
458 09:10:17.706059 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 09:10:17.711696 auto size-- 65535DDR cs0 size: 2048MB
460 09:10:17.712068 DDR cs1 size: 2048MB
461 09:10:17.717334 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 09:10:17.717650 cs0 DataBus test pass
463 09:10:17.723053 cs1 DataBus test pass
464 09:10:17.723437 cs0 AddrBus test pass
465 09:10:17.723661 cs1 AddrBus test pass
466 09:10:17.723875
467 09:10:17.728470 100bdlr_step_size ps== 420
468 09:10:17.728946 result report
469 09:10:17.734064 boot times 0Enable ddr reg access
470 09:10:17.739533 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 09:10:17.753009 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 09:10:18.326711 0.0;M3 CHK:0;cm4_sp_mode 0
473 09:10:18.327288 MVN_1=0x00000000
474 09:10:18.332197 MVN_2=0x00000000
475 09:10:18.337954 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 09:10:18.338363 OPS=0x10
477 09:10:18.338642 ring efuse init
478 09:10:18.338914 chipver efuse init
479 09:10:18.346259 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 09:10:18.346713 [0.018961 Inits done]
481 09:10:18.353791 secure task start!
482 09:10:18.354212 high task start!
483 09:10:18.354494 low task start!
484 09:10:18.354760 run into bl31
485 09:10:18.360429 NOTICE: BL31: v1.3(release):4fc40b1
486 09:10:18.368331 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 09:10:18.368788 NOTICE: BL31: G12A normal boot!
488 09:10:18.394134 NOTICE: BL31: BL33 decompress pass
489 09:10:18.399790 ERROR: Error initializing runtime service opteed_fast
490 09:10:19.632965
491 09:10:19.633510
492 09:10:19.641307 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 09:10:19.642001
494 09:10:19.642464 Model: Libre Computer AML-A311D-CC Alta
495 09:10:19.849705 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 09:10:19.873704 DRAM: 2 GiB (effective 3.8 GiB)
497 09:10:20.016012 Core: 408 devices, 31 uclasses, devicetree: separate
498 09:10:20.021895 WDT: Not starting watchdog@f0d0
499 09:10:20.054136 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 09:10:20.066592 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 09:10:20.071582 ** Bad device specification mmc 0 **
502 09:10:20.081828 Card did not respond to voltage select! : -110
503 09:10:20.089562 ** Bad device specification mmc 0 **
504 09:10:20.089936 Couldn't find partition mmc 0
505 09:10:20.097857 Card did not respond to voltage select! : -110
506 09:10:20.103395 ** Bad device specification mmc 0 **
507 09:10:20.103753 Couldn't find partition mmc 0
508 09:10:20.108564 Error: could not access storage.
509 09:10:21.371147 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 09:10:21.371725 bl2_stage_init 0x01
511 09:10:21.372978 bl2_stage_init 0x81
512 09:10:21.376476 hw id: 0x0000 - pwm id 0x01
513 09:10:21.376948 bl2_stage_init 0xc1
514 09:10:21.377297 bl2_stage_init 0x02
515 09:10:21.377619
516 09:10:21.382050 L0:00000000
517 09:10:21.382483 L1:20000703
518 09:10:21.382797 L2:00008067
519 09:10:21.383030 L3:14000000
520 09:10:21.385001 B2:00402000
521 09:10:21.385424 B1:e0f83180
522 09:10:21.385657
523 09:10:21.385925 TE: 58124
524 09:10:21.386266
525 09:10:21.396277 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 09:10:21.396717
527 09:10:21.396966 Board ID = 1
528 09:10:21.397206 Set A53 clk to 24M
529 09:10:21.397441 Set A73 clk to 24M
530 09:10:21.401936 Set clk81 to 24M
531 09:10:21.402229 A53 clk: 1200 MHz
532 09:10:21.402466 A73 clk: 1200 MHz
533 09:10:21.405262 CLK81: 166.6M
534 09:10:21.405548 smccc: 00012a92
535 09:10:21.410893 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 09:10:21.416533 board id: 1
537 09:10:21.421296 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 09:10:21.432112 fw parse done
539 09:10:21.438116 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 09:10:21.479946 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 09:10:21.491704 PIEI prepare done
542 09:10:21.492072 fastboot data load
543 09:10:21.492301 fastboot data verify
544 09:10:21.497239 verify result: 266
545 09:10:21.502887 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 09:10:21.503181 LPDDR4 probe
547 09:10:21.503394 ddr clk to 1584MHz
548 09:10:21.510834 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 09:10:21.548223
550 09:10:21.548613 dmc_version 0001
551 09:10:21.554834 Check phy result
552 09:10:21.560711 INFO : End of CA training
553 09:10:21.561027 INFO : End of initialization
554 09:10:21.566283 INFO : Training has run successfully!
555 09:10:21.566590 Check phy result
556 09:10:21.571962 INFO : End of initialization
557 09:10:21.572310 INFO : End of read enable training
558 09:10:21.575270 INFO : End of fine write leveling
559 09:10:21.580794 INFO : End of Write leveling coarse delay
560 09:10:21.586471 INFO : Training has run successfully!
561 09:10:21.586844 Check phy result
562 09:10:21.587059 INFO : End of initialization
563 09:10:21.592021 INFO : End of read dq deskew training
564 09:10:21.597615 INFO : End of MPR read delay center optimization
565 09:10:21.597920 INFO : End of write delay center optimization
566 09:10:21.603319 INFO : End of read delay center optimization
567 09:10:21.608823 INFO : End of max read latency training
568 09:10:21.609137 INFO : Training has run successfully!
569 09:10:21.614321 1D training succeed
570 09:10:21.620321 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 09:10:21.667878 Check phy result
572 09:10:21.668298 INFO : End of initialization
573 09:10:21.689507 INFO : End of 2D read delay Voltage center optimization
574 09:10:21.709571 INFO : End of 2D read delay Voltage center optimization
575 09:10:21.761668 INFO : End of 2D write delay Voltage center optimization
576 09:10:21.810924 INFO : End of 2D write delay Voltage center optimization
577 09:10:21.816359 INFO : Training has run successfully!
578 09:10:21.816867
579 09:10:21.817281 channel==0
580 09:10:21.822013 RxClkDly_Margin_A0==88 ps 9
581 09:10:21.822491 TxDqDly_Margin_A0==98 ps 10
582 09:10:21.825351 RxClkDly_Margin_A1==88 ps 9
583 09:10:21.825826 TxDqDly_Margin_A1==98 ps 10
584 09:10:21.830922 TrainedVREFDQ_A0==74
585 09:10:21.831397 TrainedVREFDQ_A1==74
586 09:10:21.831800 VrefDac_Margin_A0==25
587 09:10:21.836545 DeviceVref_Margin_A0==40
588 09:10:21.837071 VrefDac_Margin_A1==25
589 09:10:21.842174 DeviceVref_Margin_A1==40
590 09:10:21.842673
591 09:10:21.843076
592 09:10:21.843473 channel==1
593 09:10:21.843860 RxClkDly_Margin_A0==98 ps 10
594 09:10:21.847688 TxDqDly_Margin_A0==98 ps 10
595 09:10:21.848205 RxClkDly_Margin_A1==88 ps 9
596 09:10:21.853293 TxDqDly_Margin_A1==88 ps 9
597 09:10:21.853767 TrainedVREFDQ_A0==77
598 09:10:21.854166 TrainedVREFDQ_A1==77
599 09:10:21.858893 VrefDac_Margin_A0==22
600 09:10:21.859373 DeviceVref_Margin_A0==37
601 09:10:21.864447 VrefDac_Margin_A1==24
602 09:10:21.864915 DeviceVref_Margin_A1==37
603 09:10:21.865311
604 09:10:21.870092 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 09:10:21.870564
606 09:10:21.898124 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 09:10:21.903716 2D training succeed
608 09:10:21.909234 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 09:10:21.909735 auto size-- 65535DDR cs0 size: 2048MB
610 09:10:21.914852 DDR cs1 size: 2048MB
611 09:10:21.915338 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 09:10:21.920459 cs0 DataBus test pass
613 09:10:21.920958 cs1 DataBus test pass
614 09:10:21.921360 cs0 AddrBus test pass
615 09:10:21.926145 cs1 AddrBus test pass
616 09:10:21.926630
617 09:10:21.927031 100bdlr_step_size ps== 420
618 09:10:21.927432 result report
619 09:10:21.931729 boot times 0Enable ddr reg access
620 09:10:21.939364 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 09:10:21.952675 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 09:10:22.524738 0.0;M3 CHK:0;cm4_sp_mode 0
623 09:10:22.525354 MVN_1=0x00000000
624 09:10:22.530244 MVN_2=0x00000000
625 09:10:22.536113 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 09:10:22.536600 OPS=0x10
627 09:10:22.537000 ring efuse init
628 09:10:22.537390 chipver efuse init
629 09:10:22.541662 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 09:10:22.547200 [0.018961 Inits done]
631 09:10:22.547685 secure task start!
632 09:10:22.548129 high task start!
633 09:10:22.551854 low task start!
634 09:10:22.552359 run into bl31
635 09:10:22.558427 NOTICE: BL31: v1.3(release):4fc40b1
636 09:10:22.565734 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 09:10:22.566248 NOTICE: BL31: G12A normal boot!
638 09:10:22.591497 NOTICE: BL31: BL33 decompress pass
639 09:10:22.597241 ERROR: Error initializing runtime service opteed_fast
640 09:10:23.830099
641 09:10:23.830729
642 09:10:23.838523 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 09:10:23.839027
644 09:10:23.839432 Model: Libre Computer AML-A311D-CC Alta
645 09:10:24.047013 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 09:10:24.070560 DRAM: 2 GiB (effective 3.8 GiB)
647 09:10:24.213429 Core: 408 devices, 31 uclasses, devicetree: separate
648 09:10:24.219175 WDT: Not starting watchdog@f0d0
649 09:10:24.251588 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 09:10:24.264130 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 09:10:24.268906 ** Bad device specification mmc 0 **
652 09:10:24.279336 Card did not respond to voltage select! : -110
653 09:10:24.286871 ** Bad device specification mmc 0 **
654 09:10:24.287359 Couldn't find partition mmc 0
655 09:10:24.295330 Card did not respond to voltage select! : -110
656 09:10:24.300741 ** Bad device specification mmc 0 **
657 09:10:24.301225 Couldn't find partition mmc 0
658 09:10:24.305797 Error: could not access storage.
659 09:10:24.648342 Net: eth0: ethernet@ff3f0000
660 09:10:24.648970 starting USB...
661 09:10:24.900209 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 09:10:24.900846 Starting the controller
663 09:10:24.907182 USB XHCI 1.10
664 09:10:26.621059 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 09:10:26.621528 bl2_stage_init 0x01
666 09:10:26.622015 bl2_stage_init 0x81
667 09:10:26.626641 hw id: 0x0000 - pwm id 0x01
668 09:10:26.627139 bl2_stage_init 0xc1
669 09:10:26.627565 bl2_stage_init 0x02
670 09:10:26.628023
671 09:10:26.632269 L0:00000000
672 09:10:26.632756 L1:20000703
673 09:10:26.633172 L2:00008067
674 09:10:26.633572 L3:14000000
675 09:10:26.637807 B2:00402000
676 09:10:26.638287 B1:e0f83180
677 09:10:26.638706
678 09:10:26.639119 TE: 58159
679 09:10:26.639527
680 09:10:26.643411 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 09:10:26.643884
682 09:10:26.644338 Board ID = 1
683 09:10:26.648998 Set A53 clk to 24M
684 09:10:26.649461 Set A73 clk to 24M
685 09:10:26.649867 Set clk81 to 24M
686 09:10:26.654639 A53 clk: 1200 MHz
687 09:10:26.655097 A73 clk: 1200 MHz
688 09:10:26.655505 CLK81: 166.6M
689 09:10:26.655905 smccc: 00012ab5
690 09:10:26.660320 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 09:10:26.665840 board id: 1
692 09:10:26.671017 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 09:10:26.682386 fw parse done
694 09:10:26.687456 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 09:10:26.730663 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 09:10:26.741842 PIEI prepare done
697 09:10:26.742337 fastboot data load
698 09:10:26.742758 fastboot data verify
699 09:10:26.747490 verify result: 266
700 09:10:26.753155 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 09:10:26.753633 LPDDR4 probe
702 09:10:26.754043 ddr clk to 1584MHz
703 09:10:26.760972 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 09:10:26.797793
705 09:10:26.798304 dmc_version 0001
706 09:10:26.804845 Check phy result
707 09:10:26.810899 INFO : End of CA training
708 09:10:26.811361 INFO : End of initialization
709 09:10:26.816481 INFO : Training has run successfully!
710 09:10:26.816957 Check phy result
711 09:10:26.822073 INFO : End of initialization
712 09:10:26.822541 INFO : End of read enable training
713 09:10:26.827668 INFO : End of fine write leveling
714 09:10:26.833336 INFO : End of Write leveling coarse delay
715 09:10:26.833812 INFO : Training has run successfully!
716 09:10:26.834223 Check phy result
717 09:10:26.838968 INFO : End of initialization
718 09:10:26.839457 INFO : End of read dq deskew training
719 09:10:26.844450 INFO : End of MPR read delay center optimization
720 09:10:26.850042 INFO : End of write delay center optimization
721 09:10:26.855626 INFO : End of read delay center optimization
722 09:10:26.856146 INFO : End of max read latency training
723 09:10:26.861382 INFO : Training has run successfully!
724 09:10:26.861881 1D training succeed
725 09:10:26.869631 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 09:10:26.917091 Check phy result
727 09:10:26.917638 INFO : End of initialization
728 09:10:26.940298 INFO : End of 2D read delay Voltage center optimization
729 09:10:26.960309 INFO : End of 2D read delay Voltage center optimization
730 09:10:27.011879 INFO : End of 2D write delay Voltage center optimization
731 09:10:27.061729 INFO : End of 2D write delay Voltage center optimization
732 09:10:27.067441 INFO : Training has run successfully!
733 09:10:27.067892
734 09:10:27.068349 channel==0
735 09:10:27.072924 RxClkDly_Margin_A0==88 ps 9
736 09:10:27.073382 TxDqDly_Margin_A0==98 ps 10
737 09:10:27.076067 RxClkDly_Margin_A1==88 ps 9
738 09:10:27.076517 TxDqDly_Margin_A1==98 ps 10
739 09:10:27.081611 TrainedVREFDQ_A0==74
740 09:10:27.082072 TrainedVREFDQ_A1==75
741 09:10:27.087160 VrefDac_Margin_A0==24
742 09:10:27.087607 DeviceVref_Margin_A0==40
743 09:10:27.088046 VrefDac_Margin_A1==24
744 09:10:27.092797 DeviceVref_Margin_A1==39
745 09:10:27.093254
746 09:10:27.093665
747 09:10:27.094066 channel==1
748 09:10:27.094465 RxClkDly_Margin_A0==78 ps 8
749 09:10:27.096302 TxDqDly_Margin_A0==88 ps 9
750 09:10:27.101774 RxClkDly_Margin_A1==88 ps 9
751 09:10:27.102240 TxDqDly_Margin_A1==88 ps 9
752 09:10:27.102651 TrainedVREFDQ_A0==77
753 09:10:27.107620 TrainedVREFDQ_A1==77
754 09:10:27.108113 VrefDac_Margin_A0==23
755 09:10:27.113087 DeviceVref_Margin_A0==37
756 09:10:27.113545 VrefDac_Margin_A1==23
757 09:10:27.113959 DeviceVref_Margin_A1==37
758 09:10:27.114358
759 09:10:27.121981 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 09:10:27.122466
761 09:10:27.149896 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
762 09:10:27.150442 2D training succeed
763 09:10:27.155546 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 09:10:27.161152 auto size-- 65535DDR cs0 size: 2048MB
765 09:10:27.161628 DDR cs1 size: 2048MB
766 09:10:27.166776 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 09:10:27.167247 cs0 DataBus test pass
768 09:10:27.172370 cs1 DataBus test pass
769 09:10:27.172840 cs0 AddrBus test pass
770 09:10:27.177958 cs1 AddrBus test pass
771 09:10:27.178425
772 09:10:27.178834 100bdlr_step_size ps== 420
773 09:10:27.179242 result report
774 09:10:27.183556 boot times 0Enable ddr reg access
775 09:10:27.189845 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 09:10:27.203270 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 09:10:27.776848 0.0;M3 CHK:0;cm4_sp_mode 0
778 09:10:27.777448 MVN_1=0x00000000
779 09:10:27.782499 MVN_2=0x00000000
780 09:10:27.788212 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 09:10:27.788772 OPS=0x10
782 09:10:27.789188 ring efuse init
783 09:10:27.789600 chipver efuse init
784 09:10:27.793759 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 09:10:27.799363 [0.018960 Inits done]
786 09:10:27.799878 secure task start!
787 09:10:27.800363 high task start!
788 09:10:27.803446 low task start!
789 09:10:27.803946 run into bl31
790 09:10:27.810711 NOTICE: BL31: v1.3(release):4fc40b1
791 09:10:27.817798 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 09:10:27.818305 NOTICE: BL31: G12A normal boot!
793 09:10:27.843927 NOTICE: BL31: BL33 decompress pass
794 09:10:27.848761 ERROR: Error initializing runtime service opteed_fast
795 09:10:29.082391
796 09:10:29.082992
797 09:10:29.090884 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 09:10:29.091415
799 09:10:29.091842 Model: Libre Computer AML-A311D-CC Alta
800 09:10:29.299239 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 09:10:29.322665 DRAM: 2 GiB (effective 3.8 GiB)
802 09:10:29.465575 Core: 408 devices, 31 uclasses, devicetree: separate
803 09:10:29.471451 WDT: Not starting watchdog@f0d0
804 09:10:29.503717 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 09:10:29.516222 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 09:10:29.521180 ** Bad device specification mmc 0 **
807 09:10:29.531522 Card did not respond to voltage select! : -110
808 09:10:29.539175 ** Bad device specification mmc 0 **
809 09:10:29.539470 Couldn't find partition mmc 0
810 09:10:29.547537 Card did not respond to voltage select! : -110
811 09:10:29.553040 ** Bad device specification mmc 0 **
812 09:10:29.553332 Couldn't find partition mmc 0
813 09:10:29.558093 Error: could not access storage.
814 09:10:29.901640 Net: eth0: ethernet@ff3f0000
815 09:10:29.902060 starting USB...
816 09:10:30.153379 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 09:10:30.153961 Starting the controller
818 09:10:30.160345 USB XHCI 1.10
819 09:10:32.322951 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 09:10:32.323639 bl2_stage_init 0x01
821 09:10:32.324198 bl2_stage_init 0x81
822 09:10:32.328571 hw id: 0x0000 - pwm id 0x01
823 09:10:32.329250 bl2_stage_init 0xc1
824 09:10:32.329833 bl2_stage_init 0x02
825 09:10:32.330350
826 09:10:32.333991 L0:00000000
827 09:10:32.334617 L1:20000703
828 09:10:32.335108 L2:00008067
829 09:10:32.335601 L3:14000000
830 09:10:32.336882 B2:00402000
831 09:10:32.337488 B1:e0f83180
832 09:10:32.338033
833 09:10:32.338567 TE: 58167
834 09:10:32.339065
835 09:10:32.347949 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 09:10:32.348711
837 09:10:32.349315 Board ID = 1
838 09:10:32.349875 Set A53 clk to 24M
839 09:10:32.350351 Set A73 clk to 24M
840 09:10:32.353517 Set clk81 to 24M
841 09:10:32.353912 A53 clk: 1200 MHz
842 09:10:32.354210 A73 clk: 1200 MHz
843 09:10:32.359052 CLK81: 166.6M
844 09:10:32.359605 smccc: 00012abc
845 09:10:32.364663 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 09:10:32.365205 board id: 1
847 09:10:32.370257 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 09:10:32.383935 fw parse done
849 09:10:32.389878 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 09:10:32.432830 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 09:10:32.443411 PIEI prepare done
852 09:10:32.443835 fastboot data load
853 09:10:32.444134 fastboot data verify
854 09:10:32.449022 verify result: 266
855 09:10:32.454588 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 09:10:32.455047 LPDDR4 probe
857 09:10:32.455309 ddr clk to 1584MHz
858 09:10:32.462605 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 09:10:32.499872
860 09:10:32.500514 dmc_version 0001
861 09:10:32.506802 Check phy result
862 09:10:32.512776 INFO : End of CA training
863 09:10:32.513842 INFO : End of initialization
864 09:10:32.518423 INFO : Training has run successfully!
865 09:10:32.518834 Check phy result
866 09:10:32.525424 INFO : End of initialization
867 09:10:32.525856 INFO : End of read enable training
868 09:10:32.527073 INFO : End of fine write leveling
869 09:10:32.533094 INFO : End of Write leveling coarse delay
870 09:10:32.538125 INFO : Training has run successfully!
871 09:10:32.538488 Check phy result
872 09:10:32.538724 INFO : End of initialization
873 09:10:32.543712 INFO : End of read dq deskew training
874 09:10:32.547219 INFO : End of MPR read delay center optimization
875 09:10:32.552758 INFO : End of write delay center optimization
876 09:10:32.558302 INFO : End of read delay center optimization
877 09:10:32.558840 INFO : End of max read latency training
878 09:10:32.564113 INFO : Training has run successfully!
879 09:10:32.564833 1D training succeed
880 09:10:32.572167 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 09:10:32.619702 Check phy result
882 09:10:32.620375 INFO : End of initialization
883 09:10:32.641220 INFO : End of 2D read delay Voltage center optimization
884 09:10:32.661744 INFO : End of 2D read delay Voltage center optimization
885 09:10:32.713531 INFO : End of 2D write delay Voltage center optimization
886 09:10:32.762699 INFO : End of 2D write delay Voltage center optimization
887 09:10:32.768120 INFO : Training has run successfully!
888 09:10:32.768479
889 09:10:32.768704 channel==0
890 09:10:32.773679 RxClkDly_Margin_A0==88 ps 9
891 09:10:32.773988 TxDqDly_Margin_A0==98 ps 10
892 09:10:32.779272 RxClkDly_Margin_A1==88 ps 9
893 09:10:32.779637 TxDqDly_Margin_A1==98 ps 10
894 09:10:32.779857 TrainedVREFDQ_A0==74
895 09:10:32.784837 TrainedVREFDQ_A1==74
896 09:10:32.785149 VrefDac_Margin_A0==25
897 09:10:32.785354 DeviceVref_Margin_A0==40
898 09:10:32.790520 VrefDac_Margin_A1==25
899 09:10:32.790799 DeviceVref_Margin_A1==40
900 09:10:32.791005
901 09:10:32.791207
902 09:10:32.796048 channel==1
903 09:10:32.796348 RxClkDly_Margin_A0==98 ps 10
904 09:10:32.796557 TxDqDly_Margin_A0==98 ps 10
905 09:10:32.801752 RxClkDly_Margin_A1==88 ps 9
906 09:10:32.802031 TxDqDly_Margin_A1==88 ps 9
907 09:10:32.807287 TrainedVREFDQ_A0==77
908 09:10:32.807570 TrainedVREFDQ_A1==77
909 09:10:32.807774 VrefDac_Margin_A0==22
910 09:10:32.812828 DeviceVref_Margin_A0==37
911 09:10:32.813119 VrefDac_Margin_A1==24
912 09:10:32.818552 DeviceVref_Margin_A1==37
913 09:10:32.818820
914 09:10:32.819025 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 09:10:32.819225
916 09:10:32.852068 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
917 09:10:32.852506 2D training succeed
918 09:10:32.857668 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 09:10:32.863268 auto size-- 65535DDR cs0 size: 2048MB
920 09:10:32.863616 DDR cs1 size: 2048MB
921 09:10:32.868858 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 09:10:32.869208 cs0 DataBus test pass
923 09:10:32.874564 cs1 DataBus test pass
924 09:10:32.874882 cs0 AddrBus test pass
925 09:10:32.875093 cs1 AddrBus test pass
926 09:10:32.875296
927 09:10:32.880091 100bdlr_step_size ps== 420
928 09:10:32.880472 result report
929 09:10:32.885656 boot times 0Enable ddr reg access
930 09:10:32.891007 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 09:10:32.903484 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 09:10:33.476675 0.0;M3 CHK:0;cm4_sp_mode 0
933 09:10:33.477357 MVN_1=0x00000000
934 09:10:33.482000 MVN_2=0x00000000
935 09:10:33.487816 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 09:10:33.488444 OPS=0x10
937 09:10:33.488920 ring efuse init
938 09:10:33.489378 chipver efuse init
939 09:10:33.495967 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 09:10:33.496556 [0.018960 Inits done]
941 09:10:33.503530 secure task start!
942 09:10:33.503955 high task start!
943 09:10:33.504240 low task start!
944 09:10:33.504493 run into bl31
945 09:10:33.510277 NOTICE: BL31: v1.3(release):4fc40b1
946 09:10:33.517952 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 09:10:33.518401 NOTICE: BL31: G12A normal boot!
948 09:10:33.543324 NOTICE: BL31: BL33 decompress pass
949 09:10:33.549052 ERROR: Error initializing runtime service opteed_fast
950 09:10:34.782099
951 09:10:34.782772
952 09:10:34.789583 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 09:10:34.790100
954 09:10:34.790561 Model: Libre Computer AML-A311D-CC Alta
955 09:10:34.998871 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 09:10:35.022166 DRAM: 2 GiB (effective 3.8 GiB)
957 09:10:35.165185 Core: 408 devices, 31 uclasses, devicetree: separate
958 09:10:35.171054 WDT: Not starting watchdog@f0d0
959 09:10:35.203192 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 09:10:35.215669 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 09:10:35.220885 ** Bad device specification mmc 0 **
962 09:10:35.231054 Card did not respond to voltage select! : -110
963 09:10:35.238681 ** Bad device specification mmc 0 **
964 09:10:35.239169 Couldn't find partition mmc 0
965 09:10:35.247053 Card did not respond to voltage select! : -110
966 09:10:35.252512 ** Bad device specification mmc 0 **
967 09:10:35.253028 Couldn't find partition mmc 0
968 09:10:35.257687 Error: could not access storage.
969 09:10:35.601233 Net: eth0: ethernet@ff3f0000
970 09:10:35.601810 starting USB...
971 09:10:35.852944 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 09:10:35.853518 Starting the controller
973 09:10:35.860068 USB XHCI 1.10
974 09:10:37.414196 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 09:10:37.422517 scanning usb for storage devices... 0 Storage Device(s) found
977 09:10:37.473876 Hit any key to stop autoboot: 1
978 09:10:37.474737 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 09:10:37.475125 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 09:10:37.475401 Setting prompt string to ['=>']
981 09:10:37.475657 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 09:10:37.489932 0
983 09:10:37.490622 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 09:10:37.490927 Sending with 10 millisecond of delay
986 09:10:38.624967 => setenv autoload no
987 09:10:38.636223 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 09:10:38.638867 setenv autoload no
989 09:10:38.640045 Sending with 10 millisecond of delay
991 09:10:40.437618 => setenv initrd_high 0xffffffff
992 09:10:40.448197 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 09:10:40.448845 setenv initrd_high 0xffffffff
994 09:10:40.449313 Sending with 10 millisecond of delay
996 09:10:42.065508 => setenv fdt_high 0xffffffff
997 09:10:42.076317 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
998 09:10:42.077198 setenv fdt_high 0xffffffff
999 09:10:42.077961 Sending with 10 millisecond of delay
1001 09:10:42.369872 => dhcp
1002 09:10:42.380634 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 09:10:42.381505 dhcp
1004 09:10:42.381980 Speed: 1000, full duplex
1005 09:10:42.382435 BOOTP broadcast 1
1006 09:10:42.391164 DHCP client bound to address 192.168.6.27 (10 ms)
1007 09:10:42.391900 Sending with 10 millisecond of delay
1009 09:10:44.068587 => setenv serverip 192.168.6.2
1010 09:10:44.079401 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1011 09:10:44.080423 setenv serverip 192.168.6.2
1012 09:10:44.081174 Sending with 10 millisecond of delay
1014 09:10:47.805492 => tftpboot 0x01080000 939167/tftp-deploy-sw0poq40/kernel/uImage
1015 09:10:47.816224 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 09:10:48.004548 tftpboot 0x01080000 939167/tftp-deploy-sw0poq40/kernel/uImage
1017 09:10:48.004948 Speed: 1000, full duplex
1018 09:10:48.005171 Using ethernet@ff3f0000 device
1019 09:10:48.009953 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 09:10:48.015515 Filename '939167/tftp-deploy-sw0poq40/kernel/uImage'.
1021 09:10:48.019323 Load address: 0x1080000
1022 09:10:51.405426 Loading: *################################################## 43.6 MiB
1023 09:10:51.405826 12.9 MiB/s
1024 09:10:51.406049 done
1025 09:10:51.409158 Bytes transferred = 45716032 (2b99240 hex)
1026 09:10:51.409660 Sending with 10 millisecond of delay
1028 09:10:56.096921 => tftpboot 0x08000000 939167/tftp-deploy-sw0poq40/ramdisk/ramdisk.cpio.gz.uboot
1029 09:10:56.107692 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 09:10:56.108575 tftpboot 0x08000000 939167/tftp-deploy-sw0poq40/ramdisk/ramdisk.cpio.gz.uboot
1031 09:10:56.109023 Speed: 1000, full duplex
1032 09:10:56.109441 Using ethernet@ff3f0000 device
1033 09:10:56.110584 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 09:10:56.119120 Filename '939167/tftp-deploy-sw0poq40/ramdisk/ramdisk.cpio.gz.uboot'.
1035 09:10:56.119656 Load address: 0x8000000
1036 09:10:57.017216 Loading: *# UDP wrong checksum 000000ff 00004b10
1037 09:10:57.064891 UDP wrong checksum 000000ff 0000e602
1038 09:11:02.641162 T ########################################### UDP wrong checksum 000000ff 00000a59
1039 09:11:02.655406 # UDP wrong checksum 000000ff 0000a04b
1040 09:11:02.815790 #### UDP wrong checksum 00000005 0000d7bf
1041 09:11:07.817046 T UDP wrong checksum 00000005 0000d7bf
1042 09:11:17.818022 T UDP wrong checksum 00000005 0000d7bf
1043 09:11:27.221469 T T UDP wrong checksum 000000ff 0000b85d
1044 09:11:27.240141 UDP wrong checksum 000000ff 00004f50
1045 09:11:33.436091 T T UDP wrong checksum 000000ff 000058db
1046 09:11:33.446246 UDP wrong checksum 000000ff 0000eccd
1047 09:11:37.821913 UDP wrong checksum 00000005 0000d7bf
1048 09:11:48.106222 T T T UDP wrong checksum 000000ff 000018eb
1049 09:11:48.114425 UDP wrong checksum 000000ff 000068e2
1050 09:11:52.827166
1051 09:11:52.827549 Retry count exceeded; starting again
1053 09:11:52.828558 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1056 09:11:52.829664 end: 2.4 uboot-commands (duration 00:01:47) [common]
1058 09:11:52.830492 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1060 09:11:52.831256 end: 2 uboot-action (duration 00:01:47) [common]
1062 09:11:52.832230 Cleaning after the job
1063 09:11:52.832579 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/ramdisk
1064 09:11:52.833353 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/kernel
1065 09:11:52.848849 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/dtb
1066 09:11:52.849749 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/nfsrootfs
1067 09:11:52.878950 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/939167/tftp-deploy-sw0poq40/modules
1068 09:11:52.885315 start: 4.1 power-off (timeout 00:00:30) [common]
1069 09:11:52.885932 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1070 09:11:52.919715 >> OK - accepted request
1071 09:11:52.921599 Returned 0 in 0 seconds
1072 09:11:53.022407 end: 4.1 power-off (duration 00:00:00) [common]
1074 09:11:53.023422 start: 4.2 read-feedback (timeout 00:10:00) [common]
1075 09:11:53.024096 Listened to connection for namespace 'common' for up to 1s
1076 09:11:54.024702 Finalising connection for namespace 'common'
1077 09:11:54.025546 Disconnecting from shell: Finalise
1078 09:11:54.026147 =>
1079 09:11:54.127256 end: 4.2 read-feedback (duration 00:00:01) [common]
1080 09:11:54.128063 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/939167
1081 09:11:57.422963 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/939167
1082 09:11:57.423570 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.