Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:40:51.931413 lava-dispatcher, installed at version: 2024.01
2 23:40:51.932253 start: 0 validate
3 23:40:51.932738 Start time: 2024-11-05 23:40:51.932709+00:00 (UTC)
4 23:40:51.933286 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:40:51.933844 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:40:51.974185 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:40:51.974787 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-237-g47f01a19a6ee2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:40:52.007333 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:40:52.007973 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-237-g47f01a19a6ee2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 23:40:52.041482 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:40:52.041991 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:40:52.076099 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:40:52.076625 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-237-g47f01a19a6ee2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:40:52.118856 validate duration: 0.19
16 23:40:52.120317 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:40:52.120683 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:40:52.121015 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:40:52.121685 Not decompressing ramdisk as can be used compressed.
20 23:40:52.122489 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 23:40:52.123013 saving as /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/ramdisk/initrd.cpio.gz
22 23:40:52.123533 total size: 5628169 (5 MB)
23 23:40:52.164268 progress 0 % (0 MB)
24 23:40:52.171323 progress 5 % (0 MB)
25 23:40:52.179589 progress 10 % (0 MB)
26 23:40:52.186951 progress 15 % (0 MB)
27 23:40:52.194897 progress 20 % (1 MB)
28 23:40:52.199169 progress 25 % (1 MB)
29 23:40:52.203432 progress 30 % (1 MB)
30 23:40:52.207612 progress 35 % (1 MB)
31 23:40:52.211469 progress 40 % (2 MB)
32 23:40:52.215669 progress 45 % (2 MB)
33 23:40:52.219441 progress 50 % (2 MB)
34 23:40:52.223712 progress 55 % (2 MB)
35 23:40:52.227818 progress 60 % (3 MB)
36 23:40:52.231553 progress 65 % (3 MB)
37 23:40:52.235612 progress 70 % (3 MB)
38 23:40:52.239338 progress 75 % (4 MB)
39 23:40:52.243635 progress 80 % (4 MB)
40 23:40:52.247231 progress 85 % (4 MB)
41 23:40:52.251388 progress 90 % (4 MB)
42 23:40:52.255418 progress 95 % (5 MB)
43 23:40:52.258694 progress 100 % (5 MB)
44 23:40:52.259323 5 MB downloaded in 0.14 s (39.53 MB/s)
45 23:40:52.259854 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:40:52.260780 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:40:52.261071 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:40:52.261343 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:40:52.261816 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-237-g47f01a19a6ee2/arm64/defconfig/gcc-12/kernel/Image
51 23:40:52.262059 saving as /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/kernel/Image
52 23:40:52.262266 total size: 45715968 (43 MB)
53 23:40:52.262472 No compression specified
54 23:40:52.297530 progress 0 % (0 MB)
55 23:40:52.325575 progress 5 % (2 MB)
56 23:40:52.353553 progress 10 % (4 MB)
57 23:40:52.381226 progress 15 % (6 MB)
58 23:40:52.408561 progress 20 % (8 MB)
59 23:40:52.435746 progress 25 % (10 MB)
60 23:40:52.463083 progress 30 % (13 MB)
61 23:40:52.490669 progress 35 % (15 MB)
62 23:40:52.518949 progress 40 % (17 MB)
63 23:40:52.546165 progress 45 % (19 MB)
64 23:40:52.573841 progress 50 % (21 MB)
65 23:40:52.601277 progress 55 % (24 MB)
66 23:40:52.629135 progress 60 % (26 MB)
67 23:40:52.656684 progress 65 % (28 MB)
68 23:40:52.684398 progress 70 % (30 MB)
69 23:40:52.712160 progress 75 % (32 MB)
70 23:40:52.739951 progress 80 % (34 MB)
71 23:40:52.767190 progress 85 % (37 MB)
72 23:40:52.794762 progress 90 % (39 MB)
73 23:40:52.822378 progress 95 % (41 MB)
74 23:40:52.849465 progress 100 % (43 MB)
75 23:40:52.850005 43 MB downloaded in 0.59 s (74.18 MB/s)
76 23:40:52.850481 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:40:52.851292 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:40:52.851564 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:40:52.851827 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:40:52.852320 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-237-g47f01a19a6ee2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 23:40:52.852595 saving as /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/dtb/meson-g12b-a311d-libretech-cc.dtb
83 23:40:52.852802 total size: 54703 (0 MB)
84 23:40:52.853008 No compression specified
85 23:40:52.892263 progress 59 % (0 MB)
86 23:40:52.893120 progress 100 % (0 MB)
87 23:40:52.893683 0 MB downloaded in 0.04 s (1.28 MB/s)
88 23:40:52.894168 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:40:52.894978 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:40:52.895239 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:40:52.895501 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:40:52.895958 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 23:40:52.896228 saving as /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/nfsrootfs/full.rootfs.tar
95 23:40:52.896435 total size: 120894716 (115 MB)
96 23:40:52.896642 Using unxz to decompress xz
97 23:40:52.934014 progress 0 % (0 MB)
98 23:40:53.726029 progress 5 % (5 MB)
99 23:40:54.579630 progress 10 % (11 MB)
100 23:40:55.379060 progress 15 % (17 MB)
101 23:40:56.194236 progress 20 % (23 MB)
102 23:40:56.785835 progress 25 % (28 MB)
103 23:40:57.609052 progress 30 % (34 MB)
104 23:40:58.402175 progress 35 % (40 MB)
105 23:40:58.749762 progress 40 % (46 MB)
106 23:40:59.120102 progress 45 % (51 MB)
107 23:40:59.839055 progress 50 % (57 MB)
108 23:41:00.726862 progress 55 % (63 MB)
109 23:41:01.520705 progress 60 % (69 MB)
110 23:41:02.271026 progress 65 % (74 MB)
111 23:41:03.044489 progress 70 % (80 MB)
112 23:41:03.864176 progress 75 % (86 MB)
113 23:41:04.646164 progress 80 % (92 MB)
114 23:41:05.400792 progress 85 % (98 MB)
115 23:41:06.246339 progress 90 % (103 MB)
116 23:41:07.025719 progress 95 % (109 MB)
117 23:41:07.855161 progress 100 % (115 MB)
118 23:41:07.867574 115 MB downloaded in 14.97 s (7.70 MB/s)
119 23:41:07.868322 end: 1.4.1 http-download (duration 00:00:15) [common]
121 23:41:07.869946 end: 1.4 download-retry (duration 00:00:15) [common]
122 23:41:07.870476 start: 1.5 download-retry (timeout 00:09:44) [common]
123 23:41:07.870999 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 23:41:07.872087 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-237-g47f01a19a6ee2/arm64/defconfig/gcc-12/modules.tar.xz
125 23:41:07.872577 saving as /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/modules/modules.tar
126 23:41:07.872992 total size: 11614632 (11 MB)
127 23:41:07.873411 Using unxz to decompress xz
128 23:41:07.920789 progress 0 % (0 MB)
129 23:41:07.989286 progress 5 % (0 MB)
130 23:41:08.062578 progress 10 % (1 MB)
131 23:41:08.157243 progress 15 % (1 MB)
132 23:41:08.248601 progress 20 % (2 MB)
133 23:41:08.327486 progress 25 % (2 MB)
134 23:41:08.402461 progress 30 % (3 MB)
135 23:41:08.479949 progress 35 % (3 MB)
136 23:41:08.552969 progress 40 % (4 MB)
137 23:41:08.628327 progress 45 % (5 MB)
138 23:41:08.711799 progress 50 % (5 MB)
139 23:41:08.788136 progress 55 % (6 MB)
140 23:41:08.874700 progress 60 % (6 MB)
141 23:41:08.954949 progress 65 % (7 MB)
142 23:41:09.036597 progress 70 % (7 MB)
143 23:41:09.115046 progress 75 % (8 MB)
144 23:41:09.198769 progress 80 % (8 MB)
145 23:41:09.278993 progress 85 % (9 MB)
146 23:41:09.362460 progress 90 % (10 MB)
147 23:41:09.436751 progress 95 % (10 MB)
148 23:41:09.514063 progress 100 % (11 MB)
149 23:41:09.525932 11 MB downloaded in 1.65 s (6.70 MB/s)
150 23:41:09.526551 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:41:09.527389 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:41:09.527661 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 23:41:09.527929 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 23:41:25.755489 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/943266/extract-nfsrootfs-bgb69nxb
156 23:41:25.756139 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 23:41:25.756433 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 23:41:25.757036 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha
159 23:41:25.757497 makedir: /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin
160 23:41:25.757873 makedir: /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/tests
161 23:41:25.758200 makedir: /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/results
162 23:41:25.758536 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-add-keys
163 23:41:25.759064 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-add-sources
164 23:41:25.759575 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-background-process-start
165 23:41:25.760119 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-background-process-stop
166 23:41:25.760661 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-common-functions
167 23:41:25.761155 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-echo-ipv4
168 23:41:25.761635 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-install-packages
169 23:41:25.762135 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-installed-packages
170 23:41:25.762627 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-os-build
171 23:41:25.763100 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-probe-channel
172 23:41:25.763576 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-probe-ip
173 23:41:25.764065 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-target-ip
174 23:41:25.764553 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-target-mac
175 23:41:25.765029 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-target-storage
176 23:41:25.765509 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-test-case
177 23:41:25.766013 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-test-event
178 23:41:25.766584 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-test-feedback
179 23:41:25.767070 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-test-raise
180 23:41:25.767538 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-test-reference
181 23:41:25.768050 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-test-runner
182 23:41:25.768547 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-test-set
183 23:41:25.769020 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-test-shell
184 23:41:25.769502 Updating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-add-keys (debian)
185 23:41:25.770028 Updating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-add-sources (debian)
186 23:41:25.770529 Updating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-install-packages (debian)
187 23:41:25.771024 Updating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-installed-packages (debian)
188 23:41:25.771511 Updating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/bin/lava-os-build (debian)
189 23:41:25.771939 Creating /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/environment
190 23:41:25.772354 LAVA metadata
191 23:41:25.772630 - LAVA_JOB_ID=943266
192 23:41:25.772843 - LAVA_DISPATCHER_IP=192.168.6.2
193 23:41:25.773203 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 23:41:25.774147 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 23:41:25.774461 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 23:41:25.774667 skipped lava-vland-overlay
197 23:41:25.774903 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 23:41:25.775154 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 23:41:25.775365 skipped lava-multinode-overlay
200 23:41:25.775605 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 23:41:25.775852 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 23:41:25.776157 Loading test definitions
203 23:41:25.776435 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 23:41:25.776655 Using /lava-943266 at stage 0
205 23:41:25.777724 uuid=943266_1.6.2.4.1 testdef=None
206 23:41:25.778028 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 23:41:25.778290 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 23:41:25.779805 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 23:41:25.780610 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 23:41:25.782558 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 23:41:25.783370 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 23:41:25.785210 runner path: /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/0/tests/0_timesync-off test_uuid 943266_1.6.2.4.1
215 23:41:25.785773 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 23:41:25.786582 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 23:41:25.786803 Using /lava-943266 at stage 0
219 23:41:25.787150 Fetching tests from https://github.com/kernelci/test-definitions.git
220 23:41:25.787439 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/0/tests/1_kselftest-rtc'
221 23:41:29.191947 Running '/usr/bin/git checkout kernelci.org
222 23:41:29.399644 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 23:41:29.401096 uuid=943266_1.6.2.4.5 testdef=None
224 23:41:29.401443 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 23:41:29.402208 start: 1.6.2.4.6 test-overlay (timeout 00:09:23) [common]
227 23:41:29.405108 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 23:41:29.405936 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:23) [common]
230 23:41:29.409626 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 23:41:29.410481 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:23) [common]
233 23:41:29.414058 runner path: /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/0/tests/1_kselftest-rtc test_uuid 943266_1.6.2.4.5
234 23:41:29.414342 BOARD='meson-g12b-a311d-libretech-cc'
235 23:41:29.414554 BRANCH='next'
236 23:41:29.414754 SKIPFILE='/dev/null'
237 23:41:29.414954 SKIP_INSTALL='True'
238 23:41:29.415152 TESTPROG_URL='http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-237-g47f01a19a6ee2/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 23:41:29.415353 TST_CASENAME=''
240 23:41:29.415550 TST_CMDFILES='rtc'
241 23:41:29.416113 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 23:41:29.416913 Creating lava-test-runner.conf files
244 23:41:29.417123 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/943266/lava-overlay-91umo_ha/lava-943266/0 for stage 0
245 23:41:29.417487 - 0_timesync-off
246 23:41:29.417733 - 1_kselftest-rtc
247 23:41:29.418072 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 23:41:29.418361 start: 1.6.2.5 compress-overlay (timeout 00:09:23) [common]
249 23:41:52.768597 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 23:41:52.769050 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 23:41:52.769348 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 23:41:52.769659 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 23:41:52.769948 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 23:41:53.436455 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 23:41:53.436960 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 23:41:53.437241 extracting modules file /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943266/extract-nfsrootfs-bgb69nxb
257 23:41:54.804820 extracting modules file /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943266/extract-overlay-ramdisk-crgah66y/ramdisk
258 23:41:56.187765 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 23:41:56.188278 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 23:41:56.188574 [common] Applying overlay to NFS
261 23:41:56.188806 [common] Applying overlay /var/lib/lava/dispatcher/tmp/943266/compress-overlay-_d5wlxt8/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/943266/extract-nfsrootfs-bgb69nxb
262 23:41:58.943538 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 23:41:58.944035 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 23:41:58.944348 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 23:41:58.944609 Converting downloaded kernel to a uImage
266 23:41:58.944937 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/kernel/Image /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/kernel/uImage
267 23:41:59.429113 output: Image Name:
268 23:41:59.429629 output: Created: Tue Nov 5 23:41:58 2024
269 23:41:59.429885 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 23:41:59.430133 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
271 23:41:59.430378 output: Load Address: 01080000
272 23:41:59.430624 output: Entry Point: 01080000
273 23:41:59.430861 output:
274 23:41:59.431266 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 23:41:59.431593 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 23:41:59.431923 start: 1.6.7 configure-preseed-file (timeout 00:08:53) [common]
277 23:41:59.432283 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 23:41:59.432603 start: 1.6.8 compress-ramdisk (timeout 00:08:53) [common]
279 23:41:59.432932 Building ramdisk /var/lib/lava/dispatcher/tmp/943266/extract-overlay-ramdisk-crgah66y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/943266/extract-overlay-ramdisk-crgah66y/ramdisk
280 23:42:01.591262 >> 166830 blocks
281 23:42:09.319559 Adding RAMdisk u-boot header.
282 23:42:09.320329 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/943266/extract-overlay-ramdisk-crgah66y/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/943266/extract-overlay-ramdisk-crgah66y/ramdisk.cpio.gz.uboot
283 23:42:09.634317 output: Image Name:
284 23:42:09.634729 output: Created: Tue Nov 5 23:42:09 2024
285 23:42:09.634939 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 23:42:09.635141 output: Data Size: 23433109 Bytes = 22883.90 KiB = 22.35 MiB
287 23:42:09.635344 output: Load Address: 00000000
288 23:42:09.635542 output: Entry Point: 00000000
289 23:42:09.635742 output:
290 23:42:09.636654 rename /var/lib/lava/dispatcher/tmp/943266/extract-overlay-ramdisk-crgah66y/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/ramdisk/ramdisk.cpio.gz.uboot
291 23:42:09.637384 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 23:42:09.637917 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 23:42:09.638436 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 23:42:09.638889 No LXC device requested
295 23:42:09.639379 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 23:42:09.639879 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 23:42:09.640418 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 23:42:09.640829 Checking files for TFTP limit of 4294967296 bytes.
299 23:42:09.643459 end: 1 tftp-deploy (duration 00:01:18) [common]
300 23:42:09.644053 start: 2 uboot-action (timeout 00:05:00) [common]
301 23:42:09.644585 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 23:42:09.645079 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 23:42:09.645576 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 23:42:09.646097 Using kernel file from prepare-kernel: 943266/tftp-deploy-a7_8lxy7/kernel/uImage
305 23:42:09.646718 substitutions:
306 23:42:09.647121 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 23:42:09.647524 - {DTB_ADDR}: 0x01070000
308 23:42:09.647922 - {DTB}: 943266/tftp-deploy-a7_8lxy7/dtb/meson-g12b-a311d-libretech-cc.dtb
309 23:42:09.648359 - {INITRD}: 943266/tftp-deploy-a7_8lxy7/ramdisk/ramdisk.cpio.gz.uboot
310 23:42:09.648760 - {KERNEL_ADDR}: 0x01080000
311 23:42:09.649153 - {KERNEL}: 943266/tftp-deploy-a7_8lxy7/kernel/uImage
312 23:42:09.649545 - {LAVA_MAC}: None
313 23:42:09.649974 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/943266/extract-nfsrootfs-bgb69nxb
314 23:42:09.650366 - {NFS_SERVER_IP}: 192.168.6.2
315 23:42:09.650757 - {PRESEED_CONFIG}: None
316 23:42:09.651147 - {PRESEED_LOCAL}: None
317 23:42:09.651540 - {RAMDISK_ADDR}: 0x08000000
318 23:42:09.651925 - {RAMDISK}: 943266/tftp-deploy-a7_8lxy7/ramdisk/ramdisk.cpio.gz.uboot
319 23:42:09.652349 - {ROOT_PART}: None
320 23:42:09.652736 - {ROOT}: None
321 23:42:09.653123 - {SERVER_IP}: 192.168.6.2
322 23:42:09.653506 - {TEE_ADDR}: 0x83000000
323 23:42:09.653890 - {TEE}: None
324 23:42:09.654274 Parsed boot commands:
325 23:42:09.654645 - setenv autoload no
326 23:42:09.655027 - setenv initrd_high 0xffffffff
327 23:42:09.655410 - setenv fdt_high 0xffffffff
328 23:42:09.655791 - dhcp
329 23:42:09.656206 - setenv serverip 192.168.6.2
330 23:42:09.656596 - tftpboot 0x01080000 943266/tftp-deploy-a7_8lxy7/kernel/uImage
331 23:42:09.656987 - tftpboot 0x08000000 943266/tftp-deploy-a7_8lxy7/ramdisk/ramdisk.cpio.gz.uboot
332 23:42:09.657375 - tftpboot 0x01070000 943266/tftp-deploy-a7_8lxy7/dtb/meson-g12b-a311d-libretech-cc.dtb
333 23:42:09.657763 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/943266/extract-nfsrootfs-bgb69nxb,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 23:42:09.658163 - bootm 0x01080000 0x08000000 0x01070000
335 23:42:09.658649 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 23:42:09.660142 start: 2.3 connect-device (timeout 00:05:00) [common]
338 23:42:09.660564 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 23:42:09.674924 Setting prompt string to ['lava-test: # ']
340 23:42:09.676487 end: 2.3 connect-device (duration 00:00:00) [common]
341 23:42:09.677101 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 23:42:09.677664 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 23:42:09.678189 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 23:42:09.679494 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 23:42:09.716435 >> OK - accepted request
346 23:42:09.718578 Returned 0 in 0 seconds
347 23:42:09.819643 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 23:42:09.821253 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 23:42:09.821797 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 23:42:09.822292 Setting prompt string to ['Hit any key to stop autoboot']
352 23:42:09.822731 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 23:42:09.824325 Trying 192.168.56.21...
354 23:42:09.824804 Connected to conserv1.
355 23:42:09.825215 Escape character is '^]'.
356 23:42:09.825627
357 23:42:09.826043 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 23:42:09.826453
359 23:42:20.755477 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 23:42:20.756123 bl2_stage_init 0x01
361 23:42:20.756552 bl2_stage_init 0x81
362 23:42:20.761096 hw id: 0x0000 - pwm id 0x01
363 23:42:20.761549 bl2_stage_init 0xc1
364 23:42:20.761960 bl2_stage_init 0x02
365 23:42:20.762360
366 23:42:20.766608 L0:00000000
367 23:42:20.767055 L1:20000703
368 23:42:20.767461 L2:00008067
369 23:42:20.767852 L3:14000000
370 23:42:20.772210 B2:00402000
371 23:42:20.772649 B1:e0f83180
372 23:42:20.773049
373 23:42:20.773437 TE: 58167
374 23:42:20.773817
375 23:42:20.777787 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 23:42:20.778202
377 23:42:20.778586 Board ID = 1
378 23:42:20.783484 Set A53 clk to 24M
379 23:42:20.783899 Set A73 clk to 24M
380 23:42:20.784315 Set clk81 to 24M
381 23:42:20.789002 A53 clk: 1200 MHz
382 23:42:20.789419 A73 clk: 1200 MHz
383 23:42:20.789800 CLK81: 166.6M
384 23:42:20.790176 smccc: 00012abd
385 23:42:20.794676 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 23:42:20.800187 board id: 1
387 23:42:20.806240 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 23:42:20.816809 fw parse done
389 23:42:20.822870 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 23:42:20.865258 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 23:42:20.876146 PIEI prepare done
392 23:42:20.876553 fastboot data load
393 23:42:20.876937 fastboot data verify
394 23:42:20.881850 verify result: 266
395 23:42:20.887541 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 23:42:20.887960 LPDDR4 probe
397 23:42:20.888394 ddr clk to 1584MHz
398 23:42:20.895393 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 23:42:20.932646
400 23:42:20.933089 dmc_version 0001
401 23:42:20.939324 Check phy result
402 23:42:20.945217 INFO : End of CA training
403 23:42:20.945635 INFO : End of initialization
404 23:42:20.950830 INFO : Training has run successfully!
405 23:42:20.951238 Check phy result
406 23:42:20.956474 INFO : End of initialization
407 23:42:20.956895 INFO : End of read enable training
408 23:42:20.959777 INFO : End of fine write leveling
409 23:42:20.965329 INFO : End of Write leveling coarse delay
410 23:42:20.970964 INFO : Training has run successfully!
411 23:42:20.971414 Check phy result
412 23:42:20.971808 INFO : End of initialization
413 23:42:20.976548 INFO : End of read dq deskew training
414 23:42:20.979836 INFO : End of MPR read delay center optimization
415 23:42:20.985378 INFO : End of write delay center optimization
416 23:42:20.990979 INFO : End of read delay center optimization
417 23:42:20.991414 INFO : End of max read latency training
418 23:42:20.996580 INFO : Training has run successfully!
419 23:42:20.996994 1D training succeed
420 23:42:21.004847 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 23:42:21.052382 Check phy result
422 23:42:21.052812 INFO : End of initialization
423 23:42:21.075004 INFO : End of 2D read delay Voltage center optimization
424 23:42:21.095235 INFO : End of 2D read delay Voltage center optimization
425 23:42:21.147242 INFO : End of 2D write delay Voltage center optimization
426 23:42:21.196594 INFO : End of 2D write delay Voltage center optimization
427 23:42:21.202199 INFO : Training has run successfully!
428 23:42:21.202613
429 23:42:21.203006 channel==0
430 23:42:21.207794 RxClkDly_Margin_A0==88 ps 9
431 23:42:21.208246 TxDqDly_Margin_A0==98 ps 10
432 23:42:21.213426 RxClkDly_Margin_A1==88 ps 9
433 23:42:21.213836 TxDqDly_Margin_A1==98 ps 10
434 23:42:21.214225 TrainedVREFDQ_A0==74
435 23:42:21.219001 TrainedVREFDQ_A1==75
436 23:42:21.219413 VrefDac_Margin_A0==25
437 23:42:21.219803 DeviceVref_Margin_A0==40
438 23:42:21.224609 VrefDac_Margin_A1==25
439 23:42:21.225023 DeviceVref_Margin_A1==39
440 23:42:21.225412
441 23:42:21.225797
442 23:42:21.230207 channel==1
443 23:42:21.230619 RxClkDly_Margin_A0==98 ps 10
444 23:42:21.231004 TxDqDly_Margin_A0==98 ps 10
445 23:42:21.235778 RxClkDly_Margin_A1==88 ps 9
446 23:42:21.236217 TxDqDly_Margin_A1==88 ps 9
447 23:42:21.241404 TrainedVREFDQ_A0==77
448 23:42:21.241819 TrainedVREFDQ_A1==77
449 23:42:21.242206 VrefDac_Margin_A0==22
450 23:42:21.247011 DeviceVref_Margin_A0==37
451 23:42:21.247425 VrefDac_Margin_A1==24
452 23:42:21.252598 DeviceVref_Margin_A1==37
453 23:42:21.253013
454 23:42:21.253405 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 23:42:21.253793
456 23:42:21.286185 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 23:42:21.286665 2D training succeed
458 23:42:21.291775 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 23:42:21.297395 auto size-- 65535DDR cs0 size: 2048MB
460 23:42:21.297833 DDR cs1 size: 2048MB
461 23:42:21.303010 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 23:42:21.303422 cs0 DataBus test pass
463 23:42:21.308612 cs1 DataBus test pass
464 23:42:21.309030 cs0 AddrBus test pass
465 23:42:21.309421 cs1 AddrBus test pass
466 23:42:21.309807
467 23:42:21.314210 100bdlr_step_size ps== 420
468 23:42:21.314636 result report
469 23:42:21.319807 boot times 0Enable ddr reg access
470 23:42:21.325150 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 23:42:21.338652 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 23:42:21.912271 0.0;M3 CHK:0;cm4_sp_mode 0
473 23:42:21.912773 MVN_1=0x00000000
474 23:42:21.917820 MVN_2=0x00000000
475 23:42:21.923556 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 23:42:21.924025 OPS=0x10
477 23:42:21.924445 ring efuse init
478 23:42:21.924841 chipver efuse init
479 23:42:21.929159 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 23:42:21.934819 [0.018961 Inits done]
481 23:42:21.935245 secure task start!
482 23:42:21.935647 high task start!
483 23:42:21.939305 low task start!
484 23:42:21.939729 run into bl31
485 23:42:21.945989 NOTICE: BL31: v1.3(release):4fc40b1
486 23:42:21.953806 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 23:42:21.954242 NOTICE: BL31: G12A normal boot!
488 23:42:21.979187 NOTICE: BL31: BL33 decompress pass
489 23:42:21.984902 ERROR: Error initializing runtime service opteed_fast
490 23:42:23.217786
491 23:42:23.218334
492 23:42:23.226205 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 23:42:23.226650
494 23:42:23.227056 Model: Libre Computer AML-A311D-CC Alta
495 23:42:23.434580 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 23:42:23.457994 DRAM: 2 GiB (effective 3.8 GiB)
497 23:42:23.600967 Core: 408 devices, 31 uclasses, devicetree: separate
498 23:42:23.606877 WDT: Not starting watchdog@f0d0
499 23:42:23.639120 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 23:42:23.651582 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 23:42:23.656558 ** Bad device specification mmc 0 **
502 23:42:23.666898 Card did not respond to voltage select! : -110
503 23:42:23.674551 ** Bad device specification mmc 0 **
504 23:42:23.674978 Couldn't find partition mmc 0
505 23:42:23.682871 Card did not respond to voltage select! : -110
506 23:42:23.688414 ** Bad device specification mmc 0 **
507 23:42:23.688844 Couldn't find partition mmc 0
508 23:42:23.693454 Error: could not access storage.
509 23:42:24.955865 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 23:42:24.956600 bl2_stage_init 0x01
511 23:42:24.957094 bl2_stage_init 0x81
512 23:42:24.961544 hw id: 0x0000 - pwm id 0x01
513 23:42:24.962228 bl2_stage_init 0xc1
514 23:42:24.962736 bl2_stage_init 0x02
515 23:42:24.963180
516 23:42:24.967422 L0:00000000
517 23:42:24.968108 L1:20000703
518 23:42:24.968584 L2:00008067
519 23:42:24.969062 L3:14000000
520 23:42:24.973019 B2:00402000
521 23:42:24.974096 B1:e0f83180
522 23:42:24.974572
523 23:42:24.975039 TE: 58159
524 23:42:24.975531
525 23:42:24.978574 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 23:42:24.979220
527 23:42:24.979712 Board ID = 1
528 23:42:24.984012 Set A53 clk to 24M
529 23:42:24.984641 Set A73 clk to 24M
530 23:42:24.985094 Set clk81 to 24M
531 23:42:24.989581 A53 clk: 1200 MHz
532 23:42:24.990140 A73 clk: 1200 MHz
533 23:42:24.990584 CLK81: 166.6M
534 23:42:24.991015 smccc: 00012ab5
535 23:42:24.995210 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 23:42:25.000828 board id: 1
537 23:42:25.006658 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 23:42:25.017287 fw parse done
539 23:42:25.023270 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 23:42:25.065842 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 23:42:25.076801 PIEI prepare done
542 23:42:25.077351 fastboot data load
543 23:42:25.077799 fastboot data verify
544 23:42:25.082488 verify result: 266
545 23:42:25.088027 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 23:42:25.088589 LPDDR4 probe
547 23:42:25.089032 ddr clk to 1584MHz
548 23:42:25.096005 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 23:42:25.133186
550 23:42:25.133714 dmc_version 0001
551 23:42:25.139857 Check phy result
552 23:42:25.145724 INFO : End of CA training
553 23:42:25.146224 INFO : End of initialization
554 23:42:25.151309 INFO : Training has run successfully!
555 23:42:25.151808 Check phy result
556 23:42:25.156932 INFO : End of initialization
557 23:42:25.157442 INFO : End of read enable training
558 23:42:25.162500 INFO : End of fine write leveling
559 23:42:25.168121 INFO : End of Write leveling coarse delay
560 23:42:25.168619 INFO : Training has run successfully!
561 23:42:25.169053 Check phy result
562 23:42:25.173731 INFO : End of initialization
563 23:42:25.174235 INFO : End of read dq deskew training
564 23:42:25.179326 INFO : End of MPR read delay center optimization
565 23:42:25.184930 INFO : End of write delay center optimization
566 23:42:25.190519 INFO : End of read delay center optimization
567 23:42:25.191019 INFO : End of max read latency training
568 23:42:25.196112 INFO : Training has run successfully!
569 23:42:25.196612 1D training succeed
570 23:42:25.205270 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 23:42:25.252881 Check phy result
572 23:42:25.253379 INFO : End of initialization
573 23:42:25.274603 INFO : End of 2D read delay Voltage center optimization
574 23:42:25.294799 INFO : End of 2D read delay Voltage center optimization
575 23:42:25.346892 INFO : End of 2D write delay Voltage center optimization
576 23:42:25.396296 INFO : End of 2D write delay Voltage center optimization
577 23:42:25.401870 INFO : Training has run successfully!
578 23:42:25.402382
579 23:42:25.402821 channel==0
580 23:42:25.407485 RxClkDly_Margin_A0==88 ps 9
581 23:42:25.408026 TxDqDly_Margin_A0==98 ps 10
582 23:42:25.413062 RxClkDly_Margin_A1==88 ps 9
583 23:42:25.413559 TxDqDly_Margin_A1==98 ps 10
584 23:42:25.414002 TrainedVREFDQ_A0==74
585 23:42:25.418657 TrainedVREFDQ_A1==75
586 23:42:25.419158 VrefDac_Margin_A0==25
587 23:42:25.419590 DeviceVref_Margin_A0==40
588 23:42:25.424286 VrefDac_Margin_A1==25
589 23:42:25.424782 DeviceVref_Margin_A1==39
590 23:42:25.425216
591 23:42:25.425648
592 23:42:25.429858 channel==1
593 23:42:25.430362 RxClkDly_Margin_A0==98 ps 10
594 23:42:25.430799 TxDqDly_Margin_A0==88 ps 9
595 23:42:25.435452 RxClkDly_Margin_A1==98 ps 10
596 23:42:25.435954 TxDqDly_Margin_A1==98 ps 10
597 23:42:25.441053 TrainedVREFDQ_A0==76
598 23:42:25.441556 TrainedVREFDQ_A1==78
599 23:42:25.441993 VrefDac_Margin_A0==22
600 23:42:25.446660 DeviceVref_Margin_A0==38
601 23:42:25.447153 VrefDac_Margin_A1==23
602 23:42:25.452260 DeviceVref_Margin_A1==36
603 23:42:25.452760
604 23:42:25.453197 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 23:42:25.457827
606 23:42:25.485841 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 23:42:25.486398 2D training succeed
608 23:42:25.491494 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 23:42:25.497066 auto size-- 65535DDR cs0 size: 2048MB
610 23:42:25.497582 DDR cs1 size: 2048MB
611 23:42:25.502644 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 23:42:25.503158 cs0 DataBus test pass
613 23:42:25.508273 cs1 DataBus test pass
614 23:42:25.508789 cs0 AddrBus test pass
615 23:42:25.509230 cs1 AddrBus test pass
616 23:42:25.509662
617 23:42:25.513834 100bdlr_step_size ps== 420
618 23:42:25.514353 result report
619 23:42:25.519459 boot times 0Enable ddr reg access
620 23:42:25.524861 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 23:42:25.538363 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 23:42:26.112242 0.0;M3 CHK:0;cm4_sp_mode 0
623 23:42:26.112866 MVN_1=0x00000000
624 23:42:26.117846 MVN_2=0x00000000
625 23:42:26.123615 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 23:42:26.124194 OPS=0x10
627 23:42:26.124679 ring efuse init
628 23:42:26.125147 chipver efuse init
629 23:42:26.129072 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 23:42:26.134736 [0.018961 Inits done]
631 23:42:26.135235 secure task start!
632 23:42:26.135664 high task start!
633 23:42:26.139292 low task start!
634 23:42:26.139785 run into bl31
635 23:42:26.145861 NOTICE: BL31: v1.3(release):4fc40b1
636 23:42:26.153800 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 23:42:26.154299 NOTICE: BL31: G12A normal boot!
638 23:42:26.178896 NOTICE: BL31: BL33 decompress pass
639 23:42:26.184674 ERROR: Error initializing runtime service opteed_fast
640 23:42:27.417542
641 23:42:27.418103
642 23:42:27.425910 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 23:42:27.426428
644 23:42:27.426883 Model: Libre Computer AML-A311D-CC Alta
645 23:42:27.634268 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 23:42:27.657700 DRAM: 2 GiB (effective 3.8 GiB)
647 23:42:27.800697 Core: 408 devices, 31 uclasses, devicetree: separate
648 23:42:27.806629 WDT: Not starting watchdog@f0d0
649 23:42:27.838840 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 23:42:27.851285 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 23:42:27.856331 ** Bad device specification mmc 0 **
652 23:42:27.866618 Card did not respond to voltage select! : -110
653 23:42:27.874276 ** Bad device specification mmc 0 **
654 23:42:27.874787 Couldn't find partition mmc 0
655 23:42:27.882616 Card did not respond to voltage select! : -110
656 23:42:27.888077 ** Bad device specification mmc 0 **
657 23:42:27.888604 Couldn't find partition mmc 0
658 23:42:27.893211 Error: could not access storage.
659 23:42:28.236727 Net: eth0: ethernet@ff3f0000
660 23:42:28.237270 starting USB...
661 23:42:28.489185 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 23:42:28.489705 Starting the controller
663 23:42:28.495564 USB XHCI 1.10
664 23:42:30.206757 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 23:42:30.207509 bl2_stage_init 0x01
666 23:42:30.208026 bl2_stage_init 0x81
667 23:42:30.212202 hw id: 0x0000 - pwm id 0x01
668 23:42:30.212852 bl2_stage_init 0xc1
669 23:42:30.213270 bl2_stage_init 0x02
670 23:42:30.213704
671 23:42:30.217964 L0:00000000
672 23:42:30.218539 L1:20000703
673 23:42:30.218948 L2:00008067
674 23:42:30.219357 L3:14000000
675 23:42:30.220507 B2:00402000
676 23:42:30.220843 B1:e0f83180
677 23:42:30.221060
678 23:42:30.221305 TE: 58167
679 23:42:30.221536
680 23:42:30.231488 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 23:42:30.232212
682 23:42:30.232699 Board ID = 1
683 23:42:30.233029 Set A53 clk to 24M
684 23:42:30.233266 Set A73 clk to 24M
685 23:42:30.237100 Set clk81 to 24M
686 23:42:30.237673 A53 clk: 1200 MHz
687 23:42:30.238088 A73 clk: 1200 MHz
688 23:42:30.242649 CLK81: 166.6M
689 23:42:30.243024 smccc: 00012abe
690 23:42:30.248255 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 23:42:30.248641 board id: 1
692 23:42:30.256698 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 23:42:30.267136 fw parse done
694 23:42:30.273070 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 23:42:30.315697 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 23:42:30.326548 PIEI prepare done
697 23:42:30.326853 fastboot data load
698 23:42:30.327088 fastboot data verify
699 23:42:30.332280 verify result: 266
700 23:42:30.337841 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 23:42:30.338134 LPDDR4 probe
702 23:42:30.338351 ddr clk to 1584MHz
703 23:42:30.345797 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 23:42:30.383085
705 23:42:30.383392 dmc_version 0001
706 23:42:30.389743 Check phy result
707 23:42:30.395592 INFO : End of CA training
708 23:42:30.395853 INFO : End of initialization
709 23:42:30.401224 INFO : Training has run successfully!
710 23:42:30.401475 Check phy result
711 23:42:30.406786 INFO : End of initialization
712 23:42:30.407042 INFO : End of read enable training
713 23:42:30.412390 INFO : End of fine write leveling
714 23:42:30.417994 INFO : End of Write leveling coarse delay
715 23:42:30.418252 INFO : Training has run successfully!
716 23:42:30.418463 Check phy result
717 23:42:30.423555 INFO : End of initialization
718 23:42:30.423806 INFO : End of read dq deskew training
719 23:42:30.429241 INFO : End of MPR read delay center optimization
720 23:42:30.434789 INFO : End of write delay center optimization
721 23:42:30.440379 INFO : End of read delay center optimization
722 23:42:30.440636 INFO : End of max read latency training
723 23:42:30.446003 INFO : Training has run successfully!
724 23:42:30.446260 1D training succeed
725 23:42:30.455185 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 23:42:30.502800 Check phy result
727 23:42:30.503091 INFO : End of initialization
728 23:42:30.524434 INFO : End of 2D read delay Voltage center optimization
729 23:42:30.544531 INFO : End of 2D read delay Voltage center optimization
730 23:42:30.596473 INFO : End of 2D write delay Voltage center optimization
731 23:42:30.645645 INFO : End of 2D write delay Voltage center optimization
732 23:42:30.651188 INFO : Training has run successfully!
733 23:42:30.651487
734 23:42:30.651704 channel==0
735 23:42:30.656846 RxClkDly_Margin_A0==88 ps 9
736 23:42:30.657124 TxDqDly_Margin_A0==98 ps 10
737 23:42:30.662467 RxClkDly_Margin_A1==88 ps 9
738 23:42:30.662752 TxDqDly_Margin_A1==98 ps 10
739 23:42:30.662972 TrainedVREFDQ_A0==74
740 23:42:30.668057 TrainedVREFDQ_A1==74
741 23:42:30.668351 VrefDac_Margin_A0==25
742 23:42:30.668566 DeviceVref_Margin_A0==40
743 23:42:30.673681 VrefDac_Margin_A1==25
744 23:42:30.673964 DeviceVref_Margin_A1==40
745 23:42:30.674179
746 23:42:30.674384
747 23:42:30.679177 channel==1
748 23:42:30.679461 RxClkDly_Margin_A0==98 ps 10
749 23:42:30.679673 TxDqDly_Margin_A0==98 ps 10
750 23:42:30.684846 RxClkDly_Margin_A1==98 ps 10
751 23:42:30.685125 TxDqDly_Margin_A1==88 ps 9
752 23:42:30.690427 TrainedVREFDQ_A0==77
753 23:42:30.690728 TrainedVREFDQ_A1==77
754 23:42:30.690949 VrefDac_Margin_A0==22
755 23:42:30.696064 DeviceVref_Margin_A0==37
756 23:42:30.696368 VrefDac_Margin_A1==22
757 23:42:30.701584 DeviceVref_Margin_A1==37
758 23:42:30.701878
759 23:42:30.702094 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 23:42:30.707184
761 23:42:30.735185 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
762 23:42:30.735498 2D training succeed
763 23:42:30.740771 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 23:42:30.746363 auto size-- 65535DDR cs0 size: 2048MB
765 23:42:30.746641 DDR cs1 size: 2048MB
766 23:42:30.751976 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 23:42:30.752237 cs0 DataBus test pass
768 23:42:30.757558 cs1 DataBus test pass
769 23:42:30.757813 cs0 AddrBus test pass
770 23:42:30.758013 cs1 AddrBus test pass
771 23:42:30.758207
772 23:42:30.763186 100bdlr_step_size ps== 420
773 23:42:30.763447 result report
774 23:42:30.768767 boot times 0Enable ddr reg access
775 23:42:30.774237 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 23:42:30.787686 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 23:42:31.359666 0.0;M3 CHK:0;cm4_sp_mode 0
778 23:42:31.360109 MVN_1=0x00000000
779 23:42:31.365212 MVN_2=0x00000000
780 23:42:31.370928 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 23:42:31.371440 OPS=0x10
782 23:42:31.371893 ring efuse init
783 23:42:31.372370 chipver efuse init
784 23:42:31.376534 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 23:42:31.382157 [0.018960 Inits done]
786 23:42:31.382649 secure task start!
787 23:42:31.383089 high task start!
788 23:42:31.386701 low task start!
789 23:42:31.387188 run into bl31
790 23:42:31.393370 NOTICE: BL31: v1.3(release):4fc40b1
791 23:42:31.401238 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 23:42:31.401737 NOTICE: BL31: G12A normal boot!
793 23:42:31.426602 NOTICE: BL31: BL33 decompress pass
794 23:42:31.432298 ERROR: Error initializing runtime service opteed_fast
795 23:42:32.665342
796 23:42:32.666006
797 23:42:32.673624 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 23:42:32.674146
799 23:42:32.674612 Model: Libre Computer AML-A311D-CC Alta
800 23:42:32.882098 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 23:42:32.905621 DRAM: 2 GiB (effective 3.8 GiB)
802 23:42:33.048567 Core: 408 devices, 31 uclasses, devicetree: separate
803 23:42:33.054220 WDT: Not starting watchdog@f0d0
804 23:42:33.086487 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 23:42:33.098950 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 23:42:33.103915 ** Bad device specification mmc 0 **
807 23:42:33.114377 Card did not respond to voltage select! : -110
808 23:42:33.121914 ** Bad device specification mmc 0 **
809 23:42:33.122410 Couldn't find partition mmc 0
810 23:42:33.130251 Card did not respond to voltage select! : -110
811 23:42:33.135769 ** Bad device specification mmc 0 **
812 23:42:33.136299 Couldn't find partition mmc 0
813 23:42:33.140834 Error: could not access storage.
814 23:42:33.483336 Net: eth0: ethernet@ff3f0000
815 23:42:33.483927 starting USB...
816 23:42:33.735107 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 23:42:33.735668 Starting the controller
818 23:42:33.742097 USB XHCI 1.10
819 23:42:35.907669 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 23:42:35.908386 bl2_stage_init 0x01
821 23:42:35.908866 bl2_stage_init 0x81
822 23:42:35.913257 hw id: 0x0000 - pwm id 0x01
823 23:42:35.913771 bl2_stage_init 0xc1
824 23:42:35.914232 bl2_stage_init 0x02
825 23:42:35.914680
826 23:42:35.918762 L0:00000000
827 23:42:35.919308 L1:20000703
828 23:42:35.919762 L2:00008067
829 23:42:35.920243 L3:14000000
830 23:42:35.924331 B2:00402000
831 23:42:35.924824 B1:e0f83180
832 23:42:35.925278
833 23:42:35.925722 TE: 58167
834 23:42:35.926170
835 23:42:35.929836 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 23:42:35.930331
837 23:42:35.930784 Board ID = 1
838 23:42:35.935473 Set A53 clk to 24M
839 23:42:35.936038 Set A73 clk to 24M
840 23:42:35.936498 Set clk81 to 24M
841 23:42:35.941145 A53 clk: 1200 MHz
842 23:42:35.941635 A73 clk: 1200 MHz
843 23:42:35.942083 CLK81: 166.6M
844 23:42:35.942517 smccc: 00012abe
845 23:42:35.946613 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 23:42:35.952277 board id: 1
847 23:42:35.958134 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 23:42:35.968862 fw parse done
849 23:42:35.974777 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 23:42:36.017421 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 23:42:36.028343 PIEI prepare done
852 23:42:36.028889 fastboot data load
853 23:42:36.029348 fastboot data verify
854 23:42:36.033867 verify result: 266
855 23:42:36.039438 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 23:42:36.039924 LPDDR4 probe
857 23:42:36.040430 ddr clk to 1584MHz
858 23:42:36.047421 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 23:42:36.084694
860 23:42:36.085194 dmc_version 0001
861 23:42:36.091358 Check phy result
862 23:42:36.097194 INFO : End of CA training
863 23:42:36.097678 INFO : End of initialization
864 23:42:36.102802 INFO : Training has run successfully!
865 23:42:36.103283 Check phy result
866 23:42:36.108421 INFO : End of initialization
867 23:42:36.108902 INFO : End of read enable training
868 23:42:36.114055 INFO : End of fine write leveling
869 23:42:36.119579 INFO : End of Write leveling coarse delay
870 23:42:36.120083 INFO : Training has run successfully!
871 23:42:36.120537 Check phy result
872 23:42:36.125195 INFO : End of initialization
873 23:42:36.125673 INFO : End of read dq deskew training
874 23:42:36.130798 INFO : End of MPR read delay center optimization
875 23:42:36.136388 INFO : End of write delay center optimization
876 23:42:36.142027 INFO : End of read delay center optimization
877 23:42:36.142558 INFO : End of max read latency training
878 23:42:36.147603 INFO : Training has run successfully!
879 23:42:36.148128 1D training succeed
880 23:42:36.156807 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 23:42:36.204499 Check phy result
882 23:42:36.205088 INFO : End of initialization
883 23:42:36.226047 INFO : End of 2D read delay Voltage center optimization
884 23:42:36.246166 INFO : End of 2D read delay Voltage center optimization
885 23:42:36.298092 INFO : End of 2D write delay Voltage center optimization
886 23:42:36.347264 INFO : End of 2D write delay Voltage center optimization
887 23:42:36.352897 INFO : Training has run successfully!
888 23:42:36.353385
889 23:42:36.353838 channel==0
890 23:42:36.358478 RxClkDly_Margin_A0==88 ps 9
891 23:42:36.358949 TxDqDly_Margin_A0==98 ps 10
892 23:42:36.364041 RxClkDly_Margin_A1==88 ps 9
893 23:42:36.364517 TxDqDly_Margin_A1==98 ps 10
894 23:42:36.364986 TrainedVREFDQ_A0==74
895 23:42:36.369724 TrainedVREFDQ_A1==74
896 23:42:36.370247 VrefDac_Margin_A0==25
897 23:42:36.370693 DeviceVref_Margin_A0==40
898 23:42:36.375354 VrefDac_Margin_A1==25
899 23:42:36.375876 DeviceVref_Margin_A1==40
900 23:42:36.376342
901 23:42:36.376770
902 23:42:36.380849 channel==1
903 23:42:36.381331 RxClkDly_Margin_A0==98 ps 10
904 23:42:36.381758 TxDqDly_Margin_A0==98 ps 10
905 23:42:36.386508 RxClkDly_Margin_A1==88 ps 9
906 23:42:36.386973 TxDqDly_Margin_A1==88 ps 9
907 23:42:36.392026 TrainedVREFDQ_A0==77
908 23:42:36.392491 TrainedVREFDQ_A1==77
909 23:42:36.392917 VrefDac_Margin_A0==22
910 23:42:36.397726 DeviceVref_Margin_A0==37
911 23:42:36.398192 VrefDac_Margin_A1==24
912 23:42:36.403211 DeviceVref_Margin_A1==37
913 23:42:36.403666
914 23:42:36.404128 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 23:42:36.404554
916 23:42:36.436963 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
917 23:42:36.437553 2D training succeed
918 23:42:36.442581 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 23:42:36.448041 auto size-- 65535DDR cs0 size: 2048MB
920 23:42:36.448520 DDR cs1 size: 2048MB
921 23:42:36.453604 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 23:42:36.454082 cs0 DataBus test pass
923 23:42:36.459235 cs1 DataBus test pass
924 23:42:36.459704 cs0 AddrBus test pass
925 23:42:36.460159 cs1 AddrBus test pass
926 23:42:36.460580
927 23:42:36.464824 100bdlr_step_size ps== 420
928 23:42:36.465336 result report
929 23:42:36.470401 boot times 0Enable ddr reg access
930 23:42:36.475690 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 23:42:36.489128 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 23:42:37.061303 0.0;M3 CHK:0;cm4_sp_mode 0
933 23:42:37.061965 MVN_1=0x00000000
934 23:42:37.066637 MVN_2=0x00000000
935 23:42:37.072402 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 23:42:37.072886 OPS=0x10
937 23:42:37.073333 ring efuse init
938 23:42:37.073774 chipver efuse init
939 23:42:37.077995 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 23:42:37.083655 [0.018961 Inits done]
941 23:42:37.084191 secure task start!
942 23:42:37.084646 high task start!
943 23:42:37.088223 low task start!
944 23:42:37.088720 run into bl31
945 23:42:37.094882 NOTICE: BL31: v1.3(release):4fc40b1
946 23:42:37.102803 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 23:42:37.103311 NOTICE: BL31: G12A normal boot!
948 23:42:37.128105 NOTICE: BL31: BL33 decompress pass
949 23:42:37.133708 ERROR: Error initializing runtime service opteed_fast
950 23:42:38.366644
951 23:42:38.367295
952 23:42:38.374961 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 23:42:38.375458
954 23:42:38.375906 Model: Libre Computer AML-A311D-CC Alta
955 23:42:38.583432 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 23:42:38.606819 DRAM: 2 GiB (effective 3.8 GiB)
957 23:42:38.749829 Core: 408 devices, 31 uclasses, devicetree: separate
958 23:42:38.755655 WDT: Not starting watchdog@f0d0
959 23:42:38.787943 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 23:42:38.800369 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 23:42:38.805316 ** Bad device specification mmc 0 **
962 23:42:38.815683 Card did not respond to voltage select! : -110
963 23:42:38.823317 ** Bad device specification mmc 0 **
964 23:42:38.823807 Couldn't find partition mmc 0
965 23:42:38.831803 Card did not respond to voltage select! : -110
966 23:42:38.837209 ** Bad device specification mmc 0 **
967 23:42:38.837702 Couldn't find partition mmc 0
968 23:42:38.842230 Error: could not access storage.
969 23:42:39.185786 Net: eth0: ethernet@ff3f0000
970 23:42:39.186378 starting USB...
971 23:42:39.437621 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 23:42:39.438211 Starting the controller
973 23:42:39.444486 USB XHCI 1.10
974 23:42:40.998645 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 23:42:41.006983 scanning usb for storage devices... 0 Storage Device(s) found
977 23:42:41.058087 Hit any key to stop autoboot: 1
978 23:42:41.058941 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
979 23:42:41.059321 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
980 23:42:41.059574 Setting prompt string to ['=>']
981 23:42:41.059827 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
982 23:42:41.064417 0
983 23:42:41.065013 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 23:42:41.065300 Sending with 10 millisecond of delay
986 23:42:42.199916 => setenv autoload no
987 23:42:42.211944 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 23:42:42.217546 setenv autoload no
989 23:42:42.218469 Sending with 10 millisecond of delay
991 23:42:44.016353 => setenv initrd_high 0xffffffff
992 23:42:44.027511 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
993 23:42:44.028578 setenv initrd_high 0xffffffff
994 23:42:44.029455 Sending with 10 millisecond of delay
996 23:42:45.646907 => setenv fdt_high 0xffffffff
997 23:42:45.657766 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
998 23:42:45.658686 setenv fdt_high 0xffffffff
999 23:42:45.659565 Sending with 10 millisecond of delay
1001 23:42:45.951680 => dhcp
1002 23:42:45.962577 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
1003 23:42:45.963501 dhcp
1004 23:42:45.964032 Speed: 1000, full duplex
1005 23:42:45.964544 BOOTP broadcast 1
1006 23:42:45.974895 DHCP client bound to address 192.168.6.27 (12 ms)
1007 23:42:45.975721 Sending with 10 millisecond of delay
1009 23:42:47.653160 => setenv serverip 192.168.6.2
1010 23:42:47.664070 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1011 23:42:47.665045 setenv serverip 192.168.6.2
1012 23:42:47.665798 Sending with 10 millisecond of delay
1014 23:42:51.391619 => tftpboot 0x01080000 943266/tftp-deploy-a7_8lxy7/kernel/uImage
1015 23:42:51.402214 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 23:42:51.402737 tftpboot 0x01080000 943266/tftp-deploy-a7_8lxy7/kernel/uImage
1017 23:42:51.402972 Speed: 1000, full duplex
1018 23:42:51.403175 Using ethernet@ff3f0000 device
1019 23:42:51.404847 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 23:42:51.410620 Filename '943266/tftp-deploy-a7_8lxy7/kernel/uImage'.
1021 23:42:51.414293 Load address: 0x1080000
1022 23:42:54.179599 Loading: *################################################## 43.6 MiB
1023 23:42:54.180328 15.7 MiB/s
1024 23:42:54.180830 done
1025 23:42:54.184120 Bytes transferred = 45716032 (2b99240 hex)
1026 23:42:54.185014 Sending with 10 millisecond of delay
1028 23:42:58.874487 => tftpboot 0x08000000 943266/tftp-deploy-a7_8lxy7/ramdisk/ramdisk.cpio.gz.uboot
1029 23:42:58.885349 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1030 23:42:58.886260 tftpboot 0x08000000 943266/tftp-deploy-a7_8lxy7/ramdisk/ramdisk.cpio.gz.uboot
1031 23:42:58.886762 Speed: 1000, full duplex
1032 23:42:58.887225 Using ethernet@ff3f0000 device
1033 23:42:58.888145 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 23:42:58.900082 Filename '943266/tftp-deploy-a7_8lxy7/ramdisk/ramdisk.cpio.gz.uboot'.
1035 23:42:58.900659 Load address: 0x8000000
1036 23:43:05.856400 Loading: *#####################T ############################ UDP wrong checksum 00000005 00009c86
1037 23:43:10.856773 T UDP wrong checksum 00000005 00009c86
1038 23:43:15.409044 UDP wrong checksum 000000ff 0000392b
1039 23:43:15.469526 UDP wrong checksum 000000ff 0000ca1d
1040 23:43:20.859909 T T UDP wrong checksum 00000005 00009c86
1041 23:43:40.863538 T T T T UDP wrong checksum 00000005 00009c86
1042 23:43:55.867716 T T
1043 23:43:55.868172 Retry count exceeded; starting again
1045 23:43:55.869031 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1048 23:43:55.869978 end: 2.4 uboot-commands (duration 00:01:46) [common]
1050 23:43:55.870723 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1052 23:43:55.871282 end: 2 uboot-action (duration 00:01:46) [common]
1054 23:43:55.872124 Cleaning after the job
1055 23:43:55.872461 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/ramdisk
1056 23:43:55.873406 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/kernel
1057 23:43:55.899221 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/dtb
1058 23:43:55.900040 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/nfsrootfs
1059 23:43:56.073938 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943266/tftp-deploy-a7_8lxy7/modules
1060 23:43:56.094849 start: 4.1 power-off (timeout 00:00:30) [common]
1061 23:43:56.095535 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1062 23:43:56.129565 >> OK - accepted request
1063 23:43:56.131619 Returned 0 in 0 seconds
1064 23:43:56.232410 end: 4.1 power-off (duration 00:00:00) [common]
1066 23:43:56.233396 start: 4.2 read-feedback (timeout 00:10:00) [common]
1067 23:43:56.234101 Listened to connection for namespace 'common' for up to 1s
1068 23:43:57.235012 Finalising connection for namespace 'common'
1069 23:43:57.235523 Disconnecting from shell: Finalise
1070 23:43:57.235847 =>
1071 23:43:57.337003 end: 4.2 read-feedback (duration 00:00:01) [common]
1072 23:43:57.337549 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/943266
1073 23:44:00.289158 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/943266
1074 23:44:00.289746 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.