Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:35:11.751965 lava-dispatcher, installed at version: 2024.01
2 23:35:11.752811 start: 0 validate
3 23:35:11.753294 Start time: 2024-11-05 23:35:11.753262+00:00 (UTC)
4 23:35:11.753843 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:35:11.754364 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:35:11.796647 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:35:11.797208 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-237-g47f01a19a6ee2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:35:11.827848 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:35:11.828565 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-237-g47f01a19a6ee2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 23:35:11.861257 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:35:11.861989 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:35:11.892920 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:35:11.893374 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-237-g47f01a19a6ee2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:35:11.932967 validate duration: 0.18
16 23:35:11.934420 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:35:11.935045 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:35:11.935616 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:35:11.936637 Not decompressing ramdisk as can be used compressed.
20 23:35:11.937461 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 23:35:11.937977 saving as /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/ramdisk/initrd.cpio.gz
22 23:35:11.938490 total size: 5628140 (5 MB)
23 23:35:11.978135 progress 0 % (0 MB)
24 23:35:11.985538 progress 5 % (0 MB)
25 23:35:11.993259 progress 10 % (0 MB)
26 23:35:12.000059 progress 15 % (0 MB)
27 23:35:12.007666 progress 20 % (1 MB)
28 23:35:12.013367 progress 25 % (1 MB)
29 23:35:12.017420 progress 30 % (1 MB)
30 23:35:12.021366 progress 35 % (1 MB)
31 23:35:12.025003 progress 40 % (2 MB)
32 23:35:12.028983 progress 45 % (2 MB)
33 23:35:12.032506 progress 50 % (2 MB)
34 23:35:12.036525 progress 55 % (2 MB)
35 23:35:12.040498 progress 60 % (3 MB)
36 23:35:12.044189 progress 65 % (3 MB)
37 23:35:12.048195 progress 70 % (3 MB)
38 23:35:12.051703 progress 75 % (4 MB)
39 23:35:12.055612 progress 80 % (4 MB)
40 23:35:12.059186 progress 85 % (4 MB)
41 23:35:12.063092 progress 90 % (4 MB)
42 23:35:12.066915 progress 95 % (5 MB)
43 23:35:12.070188 progress 100 % (5 MB)
44 23:35:12.070832 5 MB downloaded in 0.13 s (40.56 MB/s)
45 23:35:12.071395 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:35:12.072335 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:35:12.072653 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:35:12.072944 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:35:12.073435 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-237-g47f01a19a6ee2/arm64/defconfig/gcc-12/kernel/Image
51 23:35:12.073689 saving as /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/kernel/Image
52 23:35:12.073907 total size: 45715968 (43 MB)
53 23:35:12.074127 No compression specified
54 23:35:12.109016 progress 0 % (0 MB)
55 23:35:12.137388 progress 5 % (2 MB)
56 23:35:12.165192 progress 10 % (4 MB)
57 23:35:12.193051 progress 15 % (6 MB)
58 23:35:12.220710 progress 20 % (8 MB)
59 23:35:12.248783 progress 25 % (10 MB)
60 23:35:12.278270 progress 30 % (13 MB)
61 23:35:12.306086 progress 35 % (15 MB)
62 23:35:12.334432 progress 40 % (17 MB)
63 23:35:12.362077 progress 45 % (19 MB)
64 23:35:12.390071 progress 50 % (21 MB)
65 23:35:12.418098 progress 55 % (24 MB)
66 23:35:12.446316 progress 60 % (26 MB)
67 23:35:12.473797 progress 65 % (28 MB)
68 23:35:12.501894 progress 70 % (30 MB)
69 23:35:12.530119 progress 75 % (32 MB)
70 23:35:12.558230 progress 80 % (34 MB)
71 23:35:12.586067 progress 85 % (37 MB)
72 23:35:12.614119 progress 90 % (39 MB)
73 23:35:12.642340 progress 95 % (41 MB)
74 23:35:12.669805 progress 100 % (43 MB)
75 23:35:12.670340 43 MB downloaded in 0.60 s (73.10 MB/s)
76 23:35:12.670825 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:35:12.671652 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:35:12.671932 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:35:12.672237 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:35:12.672712 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-237-g47f01a19a6ee2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 23:35:12.672992 saving as /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 23:35:12.673204 total size: 53209 (0 MB)
84 23:35:12.673414 No compression specified
85 23:35:12.711483 progress 61 % (0 MB)
86 23:35:12.712379 progress 100 % (0 MB)
87 23:35:12.712934 0 MB downloaded in 0.04 s (1.28 MB/s)
88 23:35:12.713427 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:35:12.714240 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:35:12.714506 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:35:12.714773 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:35:12.715229 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 23:35:12.715479 saving as /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/nfsrootfs/full.rootfs.tar
95 23:35:12.715688 total size: 474398908 (452 MB)
96 23:35:12.715899 Using unxz to decompress xz
97 23:35:12.757393 progress 0 % (0 MB)
98 23:35:13.893142 progress 5 % (22 MB)
99 23:35:15.346221 progress 10 % (45 MB)
100 23:35:15.805372 progress 15 % (67 MB)
101 23:35:16.619536 progress 20 % (90 MB)
102 23:35:17.165644 progress 25 % (113 MB)
103 23:35:17.528821 progress 30 % (135 MB)
104 23:35:18.134596 progress 35 % (158 MB)
105 23:35:19.070835 progress 40 % (181 MB)
106 23:35:19.950740 progress 45 % (203 MB)
107 23:35:20.601366 progress 50 % (226 MB)
108 23:35:21.240055 progress 55 % (248 MB)
109 23:35:22.471416 progress 60 % (271 MB)
110 23:35:23.872987 progress 65 % (294 MB)
111 23:35:25.449075 progress 70 % (316 MB)
112 23:35:28.584303 progress 75 % (339 MB)
113 23:35:31.035929 progress 80 % (361 MB)
114 23:35:33.967559 progress 85 % (384 MB)
115 23:35:37.147478 progress 90 % (407 MB)
116 23:35:40.349512 progress 95 % (429 MB)
117 23:35:43.520960 progress 100 % (452 MB)
118 23:35:43.535014 452 MB downloaded in 30.82 s (14.68 MB/s)
119 23:35:43.536012 end: 1.4.1 http-download (duration 00:00:31) [common]
121 23:35:43.537825 end: 1.4 download-retry (duration 00:00:31) [common]
122 23:35:43.538418 start: 1.5 download-retry (timeout 00:09:28) [common]
123 23:35:43.539008 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 23:35:43.539903 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-237-g47f01a19a6ee2/arm64/defconfig/gcc-12/modules.tar.xz
125 23:35:43.540510 saving as /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/modules/modules.tar
126 23:35:43.540990 total size: 11614632 (11 MB)
127 23:35:43.541463 Using unxz to decompress xz
128 23:35:43.586368 progress 0 % (0 MB)
129 23:35:43.652776 progress 5 % (0 MB)
130 23:35:43.726654 progress 10 % (1 MB)
131 23:35:43.821628 progress 15 % (1 MB)
132 23:35:43.913358 progress 20 % (2 MB)
133 23:35:43.992623 progress 25 % (2 MB)
134 23:35:44.068539 progress 30 % (3 MB)
135 23:35:44.146592 progress 35 % (3 MB)
136 23:35:44.218867 progress 40 % (4 MB)
137 23:35:44.294601 progress 45 % (5 MB)
138 23:35:44.378544 progress 50 % (5 MB)
139 23:35:44.455151 progress 55 % (6 MB)
140 23:35:44.539681 progress 60 % (6 MB)
141 23:35:44.631773 progress 65 % (7 MB)
142 23:35:44.716204 progress 70 % (7 MB)
143 23:35:44.797547 progress 75 % (8 MB)
144 23:35:44.883913 progress 80 % (8 MB)
145 23:35:44.967729 progress 85 % (9 MB)
146 23:35:45.053165 progress 90 % (10 MB)
147 23:35:45.128932 progress 95 % (10 MB)
148 23:35:45.208435 progress 100 % (11 MB)
149 23:35:45.220373 11 MB downloaded in 1.68 s (6.60 MB/s)
150 23:35:45.221224 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:35:45.223094 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:35:45.223714 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 23:35:45.224396 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 23:36:00.890567 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/943243/extract-nfsrootfs-fb65dqv6
156 23:36:00.891174 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 23:36:00.891467 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 23:36:00.892125 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0
159 23:36:00.892638 makedir: /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin
160 23:36:00.892984 makedir: /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/tests
161 23:36:00.893307 makedir: /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/results
162 23:36:00.893645 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-add-keys
163 23:36:00.894204 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-add-sources
164 23:36:00.894828 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-background-process-start
165 23:36:00.895348 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-background-process-stop
166 23:36:00.895892 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-common-functions
167 23:36:00.896446 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-echo-ipv4
168 23:36:00.896939 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-install-packages
169 23:36:00.897435 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-installed-packages
170 23:36:00.897927 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-os-build
171 23:36:00.898414 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-probe-channel
172 23:36:00.898900 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-probe-ip
173 23:36:00.899377 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-target-ip
174 23:36:00.899875 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-target-mac
175 23:36:00.900400 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-target-storage
176 23:36:00.900918 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-test-case
177 23:36:00.901412 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-test-event
178 23:36:00.901890 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-test-feedback
179 23:36:00.902367 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-test-raise
180 23:36:00.902863 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-test-reference
181 23:36:00.903343 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-test-runner
182 23:36:00.903828 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-test-set
183 23:36:00.904337 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-test-shell
184 23:36:00.904828 Updating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-install-packages (oe)
185 23:36:00.905389 Updating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/bin/lava-installed-packages (oe)
186 23:36:00.905846 Creating /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/environment
187 23:36:00.906225 LAVA metadata
188 23:36:00.906483 - LAVA_JOB_ID=943243
189 23:36:00.906700 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:36:00.907065 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 23:36:00.908078 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:36:00.908395 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 23:36:00.908605 skipped lava-vland-overlay
194 23:36:00.908850 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:36:00.909107 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 23:36:00.909331 skipped lava-multinode-overlay
197 23:36:00.909576 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:36:00.909828 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 23:36:00.910081 Loading test definitions
200 23:36:00.910360 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 23:36:00.910585 Using /lava-943243 at stage 0
202 23:36:00.911752 uuid=943243_1.6.2.4.1 testdef=None
203 23:36:00.912079 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:36:00.912351 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 23:36:00.914097 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:36:00.914887 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 23:36:00.917085 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:36:00.917917 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 23:36:00.920101 runner path: /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 943243_1.6.2.4.1
212 23:36:00.920684 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:36:00.921442 Creating lava-test-runner.conf files
215 23:36:00.921644 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/943243/lava-overlay-yc7ua8n0/lava-943243/0 for stage 0
216 23:36:00.921981 - 0_v4l2-decoder-conformance-h264
217 23:36:00.922322 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:36:00.922595 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 23:36:00.944455 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:36:00.944817 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 23:36:00.945076 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:36:00.945340 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:36:00.945605 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 23:36:01.563815 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:36:01.564334 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 23:36:01.564591 extracting modules file /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943243/extract-nfsrootfs-fb65dqv6
227 23:36:02.997798 extracting modules file /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/943243/extract-overlay-ramdisk-d82h98b8/ramdisk
228 23:36:04.617006 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:36:04.617509 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 23:36:04.617802 [common] Applying overlay to NFS
231 23:36:04.618024 [common] Applying overlay /var/lib/lava/dispatcher/tmp/943243/compress-overlay-uhgzcbka/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/943243/extract-nfsrootfs-fb65dqv6
232 23:36:04.655157 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:36:04.655649 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 23:36:04.655963 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 23:36:04.656249 Converting downloaded kernel to a uImage
236 23:36:04.656591 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/kernel/Image /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/kernel/uImage
237 23:36:05.110529 output: Image Name:
238 23:36:05.110962 output: Created: Tue Nov 5 23:36:04 2024
239 23:36:05.111177 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:36:05.111387 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
241 23:36:05.111591 output: Load Address: 01080000
242 23:36:05.111793 output: Entry Point: 01080000
243 23:36:05.112022 output:
244 23:36:05.112372 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:36:05.112643 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:36:05.112913 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 23:36:05.113170 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:36:05.113429 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 23:36:05.113685 Building ramdisk /var/lib/lava/dispatcher/tmp/943243/extract-overlay-ramdisk-d82h98b8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/943243/extract-overlay-ramdisk-d82h98b8/ramdisk
250 23:36:07.274022 >> 166830 blocks
251 23:36:14.947166 Adding RAMdisk u-boot header.
252 23:36:14.947624 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/943243/extract-overlay-ramdisk-d82h98b8/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/943243/extract-overlay-ramdisk-d82h98b8/ramdisk.cpio.gz.uboot
253 23:36:15.215628 output: Image Name:
254 23:36:15.216176 output: Created: Tue Nov 5 23:36:14 2024
255 23:36:15.216662 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:36:15.217140 output: Data Size: 23433313 Bytes = 22884.09 KiB = 22.35 MiB
257 23:36:15.217594 output: Load Address: 00000000
258 23:36:15.218039 output: Entry Point: 00000000
259 23:36:15.218480 output:
260 23:36:15.219627 rename /var/lib/lava/dispatcher/tmp/943243/extract-overlay-ramdisk-d82h98b8/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/ramdisk/ramdisk.cpio.gz.uboot
261 23:36:15.220454 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 23:36:15.221061 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 23:36:15.221682 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 23:36:15.222193 No LXC device requested
265 23:36:15.222745 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:36:15.223309 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 23:36:15.223858 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:36:15.224364 Checking files for TFTP limit of 4294967296 bytes.
269 23:36:15.227299 end: 1 tftp-deploy (duration 00:01:03) [common]
270 23:36:15.227925 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:36:15.228559 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:36:15.229110 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:36:15.229663 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:36:15.230238 Using kernel file from prepare-kernel: 943243/tftp-deploy-fvivhlgr/kernel/uImage
275 23:36:15.230931 substitutions:
276 23:36:15.231378 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:36:15.231823 - {DTB_ADDR}: 0x01070000
278 23:36:15.232309 - {DTB}: 943243/tftp-deploy-fvivhlgr/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 23:36:15.232753 - {INITRD}: 943243/tftp-deploy-fvivhlgr/ramdisk/ramdisk.cpio.gz.uboot
280 23:36:15.233192 - {KERNEL_ADDR}: 0x01080000
281 23:36:15.233623 - {KERNEL}: 943243/tftp-deploy-fvivhlgr/kernel/uImage
282 23:36:15.234056 - {LAVA_MAC}: None
283 23:36:15.234527 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/943243/extract-nfsrootfs-fb65dqv6
284 23:36:15.234966 - {NFS_SERVER_IP}: 192.168.6.2
285 23:36:15.235397 - {PRESEED_CONFIG}: None
286 23:36:15.235829 - {PRESEED_LOCAL}: None
287 23:36:15.236329 - {RAMDISK_ADDR}: 0x08000000
288 23:36:15.236760 - {RAMDISK}: 943243/tftp-deploy-fvivhlgr/ramdisk/ramdisk.cpio.gz.uboot
289 23:36:15.237189 - {ROOT_PART}: None
290 23:36:15.237618 - {ROOT}: None
291 23:36:15.238046 - {SERVER_IP}: 192.168.6.2
292 23:36:15.238470 - {TEE_ADDR}: 0x83000000
293 23:36:15.238894 - {TEE}: None
294 23:36:15.239321 Parsed boot commands:
295 23:36:15.239739 - setenv autoload no
296 23:36:15.240207 - setenv initrd_high 0xffffffff
297 23:36:15.240639 - setenv fdt_high 0xffffffff
298 23:36:15.241062 - dhcp
299 23:36:15.241483 - setenv serverip 192.168.6.2
300 23:36:15.241906 - tftpboot 0x01080000 943243/tftp-deploy-fvivhlgr/kernel/uImage
301 23:36:15.242331 - tftpboot 0x08000000 943243/tftp-deploy-fvivhlgr/ramdisk/ramdisk.cpio.gz.uboot
302 23:36:15.242750 - tftpboot 0x01070000 943243/tftp-deploy-fvivhlgr/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 23:36:15.243174 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/943243/extract-nfsrootfs-fb65dqv6,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:36:15.243610 - bootm 0x01080000 0x08000000 0x01070000
305 23:36:15.244175 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:36:15.245795 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:36:15.246254 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 23:36:15.263452 Setting prompt string to ['lava-test: # ']
310 23:36:15.265155 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:36:15.265832 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:36:15.266536 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:36:15.267203 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:36:15.268519 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 23:36:15.306103 >> OK - accepted request
316 23:36:15.308272 Returned 0 in 0 seconds
317 23:36:15.409486 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:36:15.411213 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:36:15.411884 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:36:15.412554 Setting prompt string to ['Hit any key to stop autoboot']
322 23:36:15.413079 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:36:15.414852 Trying 192.168.56.21...
324 23:36:15.415391 Connected to conserv1.
325 23:36:15.415855 Escape character is '^]'.
326 23:36:15.416347
327 23:36:15.416808 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 23:36:15.417261
329 23:36:23.152731 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 23:36:23.153382 bl2_stage_init 0x01
331 23:36:23.153840 bl2_stage_init 0x81
332 23:36:23.158377 hw id: 0x0000 - pwm id 0x01
333 23:36:23.158863 bl2_stage_init 0xc1
334 23:36:23.163931 bl2_stage_init 0x02
335 23:36:23.164450
336 23:36:23.164898 L0:00000000
337 23:36:23.165349 L1:00000703
338 23:36:23.165784 L2:00008067
339 23:36:23.166214 L3:15000000
340 23:36:23.169506 S1:00000000
341 23:36:23.169990 B2:20282000
342 23:36:23.170439 B1:a0f83180
343 23:36:23.170871
344 23:36:23.171305 TE: 73068
345 23:36:23.171738
346 23:36:23.175597 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 23:36:23.176096
348 23:36:23.180859 Board ID = 1
349 23:36:23.181326 Set cpu clk to 24M
350 23:36:23.181762 Set clk81 to 24M
351 23:36:23.186193 Use GP1_pll as DSU clk.
352 23:36:23.186662 DSU clk: 1200 Mhz
353 23:36:23.187097 CPU clk: 1200 MHz
354 23:36:23.191841 Set clk81 to 166.6M
355 23:36:23.197408 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 23:36:23.197926 board id: 1
357 23:36:23.204586 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:36:23.215514 fw parse done
359 23:36:23.221454 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:36:23.264568 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:36:23.275800 PIEI prepare done
362 23:36:23.276298 fastboot data load
363 23:36:23.276706 fastboot data verify
364 23:36:23.281348 verify result: 266
365 23:36:23.286941 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 23:36:23.287399 LPDDR4 probe
367 23:36:23.287797 ddr clk to 1584MHz
368 23:36:23.294941 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:36:23.332739
370 23:36:23.333219 dmc_version 0001
371 23:36:23.339760 Check phy result
372 23:36:23.345738 INFO : End of CA training
373 23:36:23.346200 INFO : End of initialization
374 23:36:23.351362 INFO : Training has run successfully!
375 23:36:23.351814 Check phy result
376 23:36:23.356962 INFO : End of initialization
377 23:36:23.357418 INFO : End of read enable training
378 23:36:23.360245 INFO : End of fine write leveling
379 23:36:23.365820 INFO : End of Write leveling coarse delay
380 23:36:23.371423 INFO : Training has run successfully!
381 23:36:23.371873 Check phy result
382 23:36:23.372303 INFO : End of initialization
383 23:36:23.376944 INFO : End of read dq deskew training
384 23:36:23.382570 INFO : End of MPR read delay center optimization
385 23:36:23.383057 INFO : End of write delay center optimization
386 23:36:23.388244 INFO : End of read delay center optimization
387 23:36:23.393809 INFO : End of max read latency training
388 23:36:23.394271 INFO : Training has run successfully!
389 23:36:23.399303 1D training succeed
390 23:36:23.405297 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:36:23.452683 Check phy result
392 23:36:23.453149 INFO : End of initialization
393 23:36:23.481042 INFO : End of 2D read delay Voltage center optimization
394 23:36:23.505207 INFO : End of 2D read delay Voltage center optimization
395 23:36:23.561929 INFO : End of 2D write delay Voltage center optimization
396 23:36:23.616243 INFO : End of 2D write delay Voltage center optimization
397 23:36:23.621570 INFO : Training has run successfully!
398 23:36:23.622033
399 23:36:23.622447 channel==0
400 23:36:23.627186 RxClkDly_Margin_A0==78 ps 8
401 23:36:23.627648 TxDqDly_Margin_A0==98 ps 10
402 23:36:23.630655 RxClkDly_Margin_A1==88 ps 9
403 23:36:23.631118 TxDqDly_Margin_A1==98 ps 10
404 23:36:23.636175 TrainedVREFDQ_A0==74
405 23:36:23.636646 TrainedVREFDQ_A1==75
406 23:36:23.637044 VrefDac_Margin_A0==23
407 23:36:23.641861 DeviceVref_Margin_A0==40
408 23:36:23.642324 VrefDac_Margin_A1==23
409 23:36:23.647302 DeviceVref_Margin_A1==39
410 23:36:23.647767
411 23:36:23.648199
412 23:36:23.648595 channel==1
413 23:36:23.648983 RxClkDly_Margin_A0==78 ps 8
414 23:36:23.653681 TxDqDly_Margin_A0==98 ps 10
415 23:36:23.654145 RxClkDly_Margin_A1==78 ps 8
416 23:36:23.658572 TxDqDly_Margin_A1==88 ps 9
417 23:36:23.659038 TrainedVREFDQ_A0==78
418 23:36:23.659436 TrainedVREFDQ_A1==77
419 23:36:23.664251 VrefDac_Margin_A0==22
420 23:36:23.664724 DeviceVref_Margin_A0==36
421 23:36:23.665117 VrefDac_Margin_A1==22
422 23:36:23.669740 DeviceVref_Margin_A1==37
423 23:36:23.670199
424 23:36:23.675358 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:36:23.675828
426 23:36:23.703209 soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 23:36:23.708935 2D training succeed
428 23:36:23.714441 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:36:23.714905 auto size-- 65535DDR cs0 size: 2048MB
430 23:36:23.720060 DDR cs1 size: 2048MB
431 23:36:23.720528 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:36:23.725648 cs0 DataBus test pass
433 23:36:23.726105 cs1 DataBus test pass
434 23:36:23.726501 cs0 AddrBus test pass
435 23:36:23.731236 cs1 AddrBus test pass
436 23:36:23.731693
437 23:36:23.732136 100bdlr_step_size ps== 478
438 23:36:23.732539 result report
439 23:36:23.742793 boot times 0Enable ddr reg access
440 23:36:23.752274 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:36:23.760609 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 23:36:24.417577 bl2z: ptr: 05129330, size: 00001e40
443 23:36:24.426798 0.0;M3 CHK:0;cm4_sp_mode 0
444 23:36:24.427255 MVN_1=0x00000000
445 23:36:24.427648 MVN_2=0x00000000
446 23:36:24.438240 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 23:36:24.438690 OPS=0x04
448 23:36:24.439082 ring efuse init
449 23:36:24.441177 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 23:36:24.447296 [0.017354 Inits done]
451 23:36:24.447722 secure task start!
452 23:36:24.448141 high task start!
453 23:36:24.448526 low task start!
454 23:36:24.451586 run into bl31
455 23:36:24.460198 NOTICE: BL31: v1.3(release):4fc40b1
456 23:36:24.468046 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 23:36:24.468512 NOTICE: BL31: G12A normal boot!
458 23:36:24.483660 NOTICE: BL31: BL33 decompress pass
459 23:36:24.489329 ERROR: Error initializing runtime service opteed_fast
460 23:36:27.199799 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 23:36:27.200372 bl2_stage_init 0x01
462 23:36:27.200772 bl2_stage_init 0x81
463 23:36:27.205416 hw id: 0x0000 - pwm id 0x01
464 23:36:27.205862 bl2_stage_init 0xc1
465 23:36:27.210300 bl2_stage_init 0x02
466 23:36:27.210731
467 23:36:27.211123 L0:00000000
468 23:36:27.211503 L1:00000703
469 23:36:27.211886 L2:00008067
470 23:36:27.215891 L3:15000000
471 23:36:27.216351 S1:00000000
472 23:36:27.216738 B2:20282000
473 23:36:27.217111 B1:a0f83180
474 23:36:27.217484
475 23:36:27.217856 TE: 69148
476 23:36:27.218230
477 23:36:27.227068 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 23:36:27.227506
479 23:36:27.227891 Board ID = 1
480 23:36:27.228306 Set cpu clk to 24M
481 23:36:27.228685 Set clk81 to 24M
482 23:36:27.232670 Use GP1_pll as DSU clk.
483 23:36:27.233095 DSU clk: 1200 Mhz
484 23:36:27.233476 CPU clk: 1200 MHz
485 23:36:27.238271 Set clk81 to 166.6M
486 23:36:27.243866 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 23:36:27.244357 board id: 1
488 23:36:27.251769 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 23:36:27.262470 fw parse done
490 23:36:27.268396 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 23:36:27.311028 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 23:36:27.322077 PIEI prepare done
493 23:36:27.322542 fastboot data load
494 23:36:27.322928 fastboot data verify
495 23:36:27.327657 verify result: 266
496 23:36:27.333271 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 23:36:27.333734 LPDDR4 probe
498 23:36:27.334118 ddr clk to 1584MHz
499 23:36:27.341238 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 23:36:27.378507
501 23:36:27.378979 dmc_version 0001
502 23:36:27.385869 Check phy result
503 23:36:27.391062 INFO : End of CA training
504 23:36:27.391483 INFO : End of initialization
505 23:36:27.396627 INFO : Training has run successfully!
506 23:36:27.397044 Check phy result
507 23:36:27.402242 INFO : End of initialization
508 23:36:27.402656 INFO : End of read enable training
509 23:36:27.407822 INFO : End of fine write leveling
510 23:36:27.413425 INFO : End of Write leveling coarse delay
511 23:36:27.413848 INFO : Training has run successfully!
512 23:36:27.414238 Check phy result
513 23:36:27.419053 INFO : End of initialization
514 23:36:27.419467 INFO : End of read dq deskew training
515 23:36:27.424629 INFO : End of MPR read delay center optimization
516 23:36:27.430249 INFO : End of write delay center optimization
517 23:36:27.435822 INFO : End of read delay center optimization
518 23:36:27.436280 INFO : End of max read latency training
519 23:36:27.441420 INFO : Training has run successfully!
520 23:36:27.441861 1D training succeed
521 23:36:27.450619 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 23:36:27.498196 Check phy result
523 23:36:27.498624 INFO : End of initialization
524 23:36:27.520561 INFO : End of 2D read delay Voltage center optimization
525 23:36:27.539695 INFO : End of 2D read delay Voltage center optimization
526 23:36:27.591570 INFO : End of 2D write delay Voltage center optimization
527 23:36:27.640714 INFO : End of 2D write delay Voltage center optimization
528 23:36:27.646303 INFO : Training has run successfully!
529 23:36:27.646733
530 23:36:27.647133 channel==0
531 23:36:27.651888 RxClkDly_Margin_A0==88 ps 9
532 23:36:27.652350 TxDqDly_Margin_A0==98 ps 10
533 23:36:27.657498 RxClkDly_Margin_A1==88 ps 9
534 23:36:27.657918 TxDqDly_Margin_A1==98 ps 10
535 23:36:27.658305 TrainedVREFDQ_A0==74
536 23:36:27.663080 TrainedVREFDQ_A1==75
537 23:36:27.663501 VrefDac_Margin_A0==25
538 23:36:27.663889 DeviceVref_Margin_A0==40
539 23:36:27.668704 VrefDac_Margin_A1==22
540 23:36:27.669121 DeviceVref_Margin_A1==39
541 23:36:27.669505
542 23:36:27.669890
543 23:36:27.674291 channel==1
544 23:36:27.674703 RxClkDly_Margin_A0==78 ps 8
545 23:36:27.675090 TxDqDly_Margin_A0==98 ps 10
546 23:36:27.679851 RxClkDly_Margin_A1==78 ps 8
547 23:36:27.680297 TxDqDly_Margin_A1==88 ps 9
548 23:36:27.685479 TrainedVREFDQ_A0==78
549 23:36:27.685903 TrainedVREFDQ_A1==78
550 23:36:27.686289 VrefDac_Margin_A0==22
551 23:36:27.691082 DeviceVref_Margin_A0==36
552 23:36:27.691499 VrefDac_Margin_A1==22
553 23:36:27.696666 DeviceVref_Margin_A1==36
554 23:36:27.697079
555 23:36:27.697465 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 23:36:27.697848
557 23:36:27.730285 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000060
558 23:36:27.730750 2D training succeed
559 23:36:27.735841 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 23:36:27.741469 auto size-- 65535DDR cs0 size: 2048MB
561 23:36:27.741888 DDR cs1 size: 2048MB
562 23:36:27.747073 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 23:36:27.747487 cs0 DataBus test pass
564 23:36:27.752694 cs1 DataBus test pass
565 23:36:27.753109 cs0 AddrBus test pass
566 23:36:27.753491 cs1 AddrBus test pass
567 23:36:27.753874
568 23:36:27.758289 100bdlr_step_size ps== 478
569 23:36:27.758711 result report
570 23:36:27.763869 boot times 0Enable ddr reg access
571 23:36:27.769124 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 23:36:27.782949 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 23:36:28.436928 bl2z: ptr: 05129330, size: 00001e40
574 23:36:28.444727 0.0;M3 CHK:0;cm4_sp_mode 0
575 23:36:28.445196 MVN_1=0x00000000
576 23:36:28.445605 MVN_2=0x00000000
577 23:36:28.456200 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 23:36:28.456644 OPS=0x04
579 23:36:28.457051 ring efuse init
580 23:36:28.461839 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 23:36:28.462287 [0.017319 Inits done]
582 23:36:28.462690 secure task start!
583 23:36:28.469116 high task start!
584 23:36:28.469566 low task start!
585 23:36:28.469966 run into bl31
586 23:36:28.477699 NOTICE: BL31: v1.3(release):4fc40b1
587 23:36:28.485539 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 23:36:28.486007 NOTICE: BL31: G12A normal boot!
589 23:36:28.501020 NOTICE: BL31: BL33 decompress pass
590 23:36:28.506712 ERROR: Error initializing runtime service opteed_fast
591 23:36:29.901499 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 23:36:29.902000 bl2_stage_init 0x01
593 23:36:29.902413 bl2_stage_init 0x81
594 23:36:29.907121 hw id: 0x0000 - pwm id 0x01
595 23:36:29.907564 bl2_stage_init 0xc1
596 23:36:29.911169 bl2_stage_init 0x02
597 23:36:29.911614
598 23:36:29.912056 L0:00000000
599 23:36:29.912470 L1:00000703
600 23:36:29.916802 L2:00008067
601 23:36:29.917247 L3:15000000
602 23:36:29.917653 S1:00000000
603 23:36:29.918049 B2:20282000
604 23:36:29.918441 B1:a0f83180
605 23:36:29.918828
606 23:36:29.922271 TE: 71626
607 23:36:29.922712
608 23:36:29.927962 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 23:36:29.928429
610 23:36:29.928832 Board ID = 1
611 23:36:29.929231 Set cpu clk to 24M
612 23:36:29.931480 Set clk81 to 24M
613 23:36:29.931915 Use GP1_pll as DSU clk.
614 23:36:29.937052 DSU clk: 1200 Mhz
615 23:36:29.937493 CPU clk: 1200 MHz
616 23:36:29.937892 Set clk81 to 166.6M
617 23:36:29.942644 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 23:36:29.948212 board id: 1
619 23:36:29.952507 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 23:36:29.964064 fw parse done
621 23:36:29.970021 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 23:36:30.012771 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 23:36:30.023649 PIEI prepare done
624 23:36:30.024145 fastboot data load
625 23:36:30.024562 fastboot data verify
626 23:36:30.029206 verify result: 266
627 23:36:30.034813 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 23:36:30.035249 LPDDR4 probe
629 23:36:30.035652 ddr clk to 1584MHz
630 23:36:30.042864 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 23:36:30.080058
632 23:36:30.080507 dmc_version 0001
633 23:36:30.086778 Check phy result
634 23:36:30.092675 INFO : End of CA training
635 23:36:30.093115 INFO : End of initialization
636 23:36:30.098248 INFO : Training has run successfully!
637 23:36:30.098685 Check phy result
638 23:36:30.103845 INFO : End of initialization
639 23:36:30.104314 INFO : End of read enable training
640 23:36:30.107167 INFO : End of fine write leveling
641 23:36:30.112711 INFO : End of Write leveling coarse delay
642 23:36:30.118327 INFO : Training has run successfully!
643 23:36:30.118759 Check phy result
644 23:36:30.119160 INFO : End of initialization
645 23:36:30.123932 INFO : End of read dq deskew training
646 23:36:30.127363 INFO : End of MPR read delay center optimization
647 23:36:30.132917 INFO : End of write delay center optimization
648 23:36:30.138505 INFO : End of read delay center optimization
649 23:36:30.138955 INFO : End of max read latency training
650 23:36:30.144124 INFO : Training has run successfully!
651 23:36:30.144566 1D training succeed
652 23:36:30.152326 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 23:36:30.199770 Check phy result
654 23:36:30.200241 INFO : End of initialization
655 23:36:30.222153 INFO : End of 2D read delay Voltage center optimization
656 23:36:30.241302 INFO : End of 2D read delay Voltage center optimization
657 23:36:30.292275 INFO : End of 2D write delay Voltage center optimization
658 23:36:30.342432 INFO : End of 2D write delay Voltage center optimization
659 23:36:30.347975 INFO : Training has run successfully!
660 23:36:30.348462
661 23:36:30.348869 channel==0
662 23:36:30.353616 RxClkDly_Margin_A0==88 ps 9
663 23:36:30.354053 TxDqDly_Margin_A0==98 ps 10
664 23:36:30.356957 RxClkDly_Margin_A1==88 ps 9
665 23:36:30.357398 TxDqDly_Margin_A1==98 ps 10
666 23:36:30.362528 TrainedVREFDQ_A0==74
667 23:36:30.362971 TrainedVREFDQ_A1==75
668 23:36:30.363372 VrefDac_Margin_A0==24
669 23:36:30.368106 DeviceVref_Margin_A0==40
670 23:36:30.368544 VrefDac_Margin_A1==23
671 23:36:30.373773 DeviceVref_Margin_A1==39
672 23:36:30.374223
673 23:36:30.374627
674 23:36:30.375028 channel==1
675 23:36:30.375420 RxClkDly_Margin_A0==88 ps 9
676 23:36:30.377074 TxDqDly_Margin_A0==98 ps 10
677 23:36:30.382664 RxClkDly_Margin_A1==78 ps 8
678 23:36:30.383110 TxDqDly_Margin_A1==88 ps 9
679 23:36:30.383518 TrainedVREFDQ_A0==78
680 23:36:30.388142 TrainedVREFDQ_A1==75
681 23:36:30.388592 VrefDac_Margin_A0==23
682 23:36:30.393768 DeviceVref_Margin_A0==36
683 23:36:30.394209 VrefDac_Margin_A1==22
684 23:36:30.394612 DeviceVref_Margin_A1==38
685 23:36:30.395009
686 23:36:30.399320 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 23:36:30.399772
688 23:36:30.433063 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000018 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000060
689 23:36:30.433547 2D training succeed
690 23:36:30.438651 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 23:36:30.444255 auto size-- 65535DDR cs0 size: 2048MB
692 23:36:30.444694 DDR cs1 size: 2048MB
693 23:36:30.449849 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 23:36:30.450285 cs0 DataBus test pass
695 23:36:30.450686 cs1 DataBus test pass
696 23:36:30.455454 cs0 AddrBus test pass
697 23:36:30.455901 cs1 AddrBus test pass
698 23:36:30.456361
699 23:36:30.461055 100bdlr_step_size ps== 478
700 23:36:30.461519 result report
701 23:36:30.461927 boot times 0Enable ddr reg access
702 23:36:30.470810 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 23:36:30.484584 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 23:36:31.139036 bl2z: ptr: 05129330, size: 00001e40
705 23:36:31.146411 0.0;M3 CHK:0;cm4_sp_mode 0
706 23:36:31.146882 MVN_1=0x00000000
707 23:36:31.147292 MVN_2=0x00000000
708 23:36:31.158019 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 23:36:31.158481 OPS=0x04
710 23:36:31.158892 ring efuse init
711 23:36:31.163571 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 23:36:31.164050 [0.017310 Inits done]
713 23:36:31.164463 secure task start!
714 23:36:31.170932 high task start!
715 23:36:31.171381 low task start!
716 23:36:31.171779 run into bl31
717 23:36:31.179561 NOTICE: BL31: v1.3(release):4fc40b1
718 23:36:31.187329 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 23:36:31.187789 NOTICE: BL31: G12A normal boot!
720 23:36:31.202694 NOTICE: BL31: BL33 decompress pass
721 23:36:31.208474 ERROR: Error initializing runtime service opteed_fast
722 23:36:32.002571
723 23:36:32.003203
724 23:36:32.007856 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 23:36:32.008381
726 23:36:32.011376 Model: Libre Computer AML-S905D3-CC Solitude
727 23:36:32.158360 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 23:36:32.173595 DRAM: 2 GiB (effective 3.8 GiB)
729 23:36:32.274697 Core: 406 devices, 33 uclasses, devicetree: separate
730 23:36:32.282354 WDT: Not starting watchdog@f0d0
731 23:36:32.305668 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 23:36:32.317685 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 23:36:32.322639 ** Bad device specification mmc 0 **
734 23:36:32.332617 Card did not respond to voltage select! : -110
735 23:36:32.340406 ** Bad device specification mmc 0 **
736 23:36:32.340902 Couldn't find partition mmc 0
737 23:36:32.348668 Card did not respond to voltage select! : -110
738 23:36:32.354085 ** Bad device specification mmc 0 **
739 23:36:32.354539 Couldn't find partition mmc 0
740 23:36:32.359362 Error: could not access storage.
741 23:36:32.656939 Net: eth0: ethernet@ff3f0000
742 23:36:32.657394 starting USB...
743 23:36:32.901543 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 23:36:32.902165 Starting the controller
745 23:36:32.908446 USB XHCI 1.10
746 23:36:34.462205 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 23:36:34.470448 scanning usb for storage devices... 0 Storage Device(s) found
749 23:36:34.522610 Hit any key to stop autoboot: 1
750 23:36:34.523623 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 23:36:34.524333 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 23:36:34.524878 Setting prompt string to ['=>']
753 23:36:34.525417 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 23:36:34.536871 0
755 23:36:34.537916 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 23:36:34.639343 => setenv autoload no
758 23:36:34.640253 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 23:36:34.645346 setenv autoload no
761 23:36:34.746956 => setenv initrd_high 0xffffffff
762 23:36:34.747675 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 23:36:34.752400 setenv initrd_high 0xffffffff
765 23:36:34.853602 => setenv fdt_high 0xffffffff
766 23:36:34.854309 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 23:36:34.858861 setenv fdt_high 0xffffffff
769 23:36:34.960054 => dhcp
770 23:36:34.960818 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 23:36:34.965078 dhcp
772 23:36:35.921003 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 23:36:35.921657 Speed: 1000, full duplex
774 23:36:35.922129 BOOTP broadcast 1
775 23:36:36.169821 BOOTP broadcast 2
776 23:36:36.180757 DHCP client bound to address 192.168.6.21 (259 ms)
778 23:36:36.282334 => setenv serverip 192.168.6.2
779 23:36:36.283311 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
780 23:36:36.287890 setenv serverip 192.168.6.2
782 23:36:36.389473 => tftpboot 0x01080000 943243/tftp-deploy-fvivhlgr/kernel/uImage
783 23:36:36.390451 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
784 23:36:36.397067 tftpboot 0x01080000 943243/tftp-deploy-fvivhlgr/kernel/uImage
785 23:36:36.397589 Speed: 1000, full duplex
786 23:36:36.398050 Using ethernet@ff3f0000 device
787 23:36:36.402564 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 23:36:36.408073 Filename '943243/tftp-deploy-fvivhlgr/kernel/uImage'.
789 23:36:36.412055 Load address: 0x1080000
790 23:36:39.293838 Loading: *################################################## 43.6 MiB
791 23:36:39.294498 15.1 MiB/s
792 23:36:39.294972 done
793 23:36:39.298231 Bytes transferred = 45716032 (2b99240 hex)
795 23:36:39.399863 => tftpboot 0x08000000 943243/tftp-deploy-fvivhlgr/ramdisk/ramdisk.cpio.gz.uboot
796 23:36:39.400706 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
797 23:36:39.407704 tftpboot 0x08000000 943243/tftp-deploy-fvivhlgr/ramdisk/ramdisk.cpio.gz.uboot
798 23:36:39.408285 Speed: 1000, full duplex
799 23:36:39.408731 Using ethernet@ff3f0000 device
800 23:36:39.413128 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
801 23:36:39.422896 Filename '943243/tftp-deploy-fvivhlgr/ramdisk/ramdisk.cpio.gz.uboot'.
802 23:36:39.423410 Load address: 0x8000000
803 23:36:40.891142 Loading: *################################################# UDP wrong checksum 00000005 0000c0e1
804 23:36:42.524883 UDP wrong checksum 000000ff 000087cb
805 23:36:42.564384 UDP wrong checksum 000000ff 000011be
806 23:36:45.891714 T UDP wrong checksum 00000005 0000c0e1
807 23:36:55.893755 T T UDP wrong checksum 00000005 0000c0e1
808 23:37:15.897837 T T T T UDP wrong checksum 00000005 0000c0e1
809 23:37:16.547636 UDP wrong checksum 000000ff 000036d4
810 23:37:16.616086 UDP wrong checksum 000000ff 0000c9c6
811 23:37:35.902673 T T T
812 23:37:35.903322 Retry count exceeded; starting again
814 23:37:35.904849 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
817 23:37:35.906861 end: 2.4 uboot-commands (duration 00:01:21) [common]
819 23:37:35.908397 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
821 23:37:35.909456 end: 2 uboot-action (duration 00:01:21) [common]
823 23:37:35.911067 Cleaning after the job
824 23:37:35.911642 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/ramdisk
825 23:37:35.913078 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/kernel
826 23:37:35.960856 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/dtb
827 23:37:35.961693 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/nfsrootfs
828 23:37:36.294656 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/943243/tftp-deploy-fvivhlgr/modules
829 23:37:36.317357 start: 4.1 power-off (timeout 00:00:30) [common]
830 23:37:36.317995 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
831 23:37:36.350330 >> OK - accepted request
832 23:37:36.352558 Returned 0 in 0 seconds
833 23:37:36.453458 end: 4.1 power-off (duration 00:00:00) [common]
835 23:37:36.454480 start: 4.2 read-feedback (timeout 00:10:00) [common]
836 23:37:36.455378 Listened to connection for namespace 'common' for up to 1s
837 23:37:37.456136 Finalising connection for namespace 'common'
838 23:37:37.456622 Disconnecting from shell: Finalise
839 23:37:37.456923 =>
840 23:37:37.557546 end: 4.2 read-feedback (duration 00:00:01) [common]
841 23:37:37.557964 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/943243
842 23:37:40.375685 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/943243
843 23:37:40.376516 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.