Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 02:15:20.666538 lava-dispatcher, installed at version: 2024.01
2 02:15:20.667313 start: 0 validate
3 02:15:20.667789 Start time: 2024-11-08 02:15:20.667761+00:00 (UTC)
4 02:15:20.668338 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 02:15:20.668884 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 02:15:20.712285 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 02:15:20.712826 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-326-gaded6a2e0817%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 02:15:20.743523 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 02:15:20.744392 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-326-gaded6a2e0817%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 02:15:20.789079 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 02:15:20.789615 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 02:15:20.825496 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 02:15:20.826037 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc6-326-gaded6a2e0817%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 02:15:20.872429 validate duration: 0.20
16 02:15:20.874023 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 02:15:20.874637 start: 1.1 download-retry (timeout 00:10:00) [common]
18 02:15:20.875229 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 02:15:20.876739 Not decompressing ramdisk as can be used compressed.
20 02:15:20.877663 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 02:15:20.878232 saving as /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/ramdisk/initrd.cpio.gz
22 02:15:20.878794 total size: 5628182 (5 MB)
23 02:15:20.918288 progress 0 % (0 MB)
24 02:15:20.926360 progress 5 % (0 MB)
25 02:15:20.935002 progress 10 % (0 MB)
26 02:15:20.942670 progress 15 % (0 MB)
27 02:15:20.950641 progress 20 % (1 MB)
28 02:15:20.954945 progress 25 % (1 MB)
29 02:15:20.958858 progress 30 % (1 MB)
30 02:15:20.962875 progress 35 % (1 MB)
31 02:15:20.966427 progress 40 % (2 MB)
32 02:15:20.970314 progress 45 % (2 MB)
33 02:15:20.973900 progress 50 % (2 MB)
34 02:15:20.977797 progress 55 % (2 MB)
35 02:15:20.981723 progress 60 % (3 MB)
36 02:15:20.985225 progress 65 % (3 MB)
37 02:15:20.989142 progress 70 % (3 MB)
38 02:15:20.992650 progress 75 % (4 MB)
39 02:15:20.996572 progress 80 % (4 MB)
40 02:15:21.000086 progress 85 % (4 MB)
41 02:15:21.004012 progress 90 % (4 MB)
42 02:15:21.007664 progress 95 % (5 MB)
43 02:15:21.010875 progress 100 % (5 MB)
44 02:15:21.011504 5 MB downloaded in 0.13 s (40.45 MB/s)
45 02:15:21.012078 end: 1.1.1 http-download (duration 00:00:00) [common]
47 02:15:21.012965 end: 1.1 download-retry (duration 00:00:00) [common]
48 02:15:21.013253 start: 1.2 download-retry (timeout 00:10:00) [common]
49 02:15:21.013522 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 02:15:21.014005 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-326-gaded6a2e0817/arm64/defconfig/gcc-12/kernel/Image
51 02:15:21.014258 saving as /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/kernel/Image
52 02:15:21.014469 total size: 45715968 (43 MB)
53 02:15:21.014677 No compression specified
54 02:15:21.050126 progress 0 % (0 MB)
55 02:15:21.078163 progress 5 % (2 MB)
56 02:15:21.105944 progress 10 % (4 MB)
57 02:15:21.133880 progress 15 % (6 MB)
58 02:15:21.161746 progress 20 % (8 MB)
59 02:15:21.189195 progress 25 % (10 MB)
60 02:15:21.216919 progress 30 % (13 MB)
61 02:15:21.244731 progress 35 % (15 MB)
62 02:15:21.272749 progress 40 % (17 MB)
63 02:15:21.300004 progress 45 % (19 MB)
64 02:15:21.327585 progress 50 % (21 MB)
65 02:15:21.354976 progress 55 % (24 MB)
66 02:15:21.382800 progress 60 % (26 MB)
67 02:15:21.409949 progress 65 % (28 MB)
68 02:15:21.437504 progress 70 % (30 MB)
69 02:15:21.465602 progress 75 % (32 MB)
70 02:15:21.493222 progress 80 % (34 MB)
71 02:15:21.520643 progress 85 % (37 MB)
72 02:15:21.548463 progress 90 % (39 MB)
73 02:15:21.576360 progress 95 % (41 MB)
74 02:15:21.603604 progress 100 % (43 MB)
75 02:15:21.604173 43 MB downloaded in 0.59 s (73.93 MB/s)
76 02:15:21.604650 end: 1.2.1 http-download (duration 00:00:01) [common]
78 02:15:21.605462 end: 1.2 download-retry (duration 00:00:01) [common]
79 02:15:21.605736 start: 1.3 download-retry (timeout 00:09:59) [common]
80 02:15:21.606001 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 02:15:21.606480 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-326-gaded6a2e0817/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 02:15:21.606737 saving as /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/dtb/meson-g12b-a311d-libretech-cc.dtb
83 02:15:21.606943 total size: 54703 (0 MB)
84 02:15:21.607151 No compression specified
85 02:15:21.647017 progress 59 % (0 MB)
86 02:15:21.647878 progress 100 % (0 MB)
87 02:15:21.648461 0 MB downloaded in 0.04 s (1.26 MB/s)
88 02:15:21.648913 end: 1.3.1 http-download (duration 00:00:00) [common]
90 02:15:21.649717 end: 1.3 download-retry (duration 00:00:00) [common]
91 02:15:21.649975 start: 1.4 download-retry (timeout 00:09:59) [common]
92 02:15:21.650238 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 02:15:21.650695 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 02:15:21.650944 saving as /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/nfsrootfs/full.rootfs.tar
95 02:15:21.651148 total size: 107552908 (102 MB)
96 02:15:21.651357 Using unxz to decompress xz
97 02:15:21.687870 progress 0 % (0 MB)
98 02:15:22.317715 progress 5 % (5 MB)
99 02:15:23.032184 progress 10 % (10 MB)
100 02:15:23.750087 progress 15 % (15 MB)
101 02:15:24.501640 progress 20 % (20 MB)
102 02:15:25.072522 progress 25 % (25 MB)
103 02:15:25.710556 progress 30 % (30 MB)
104 02:15:26.448728 progress 35 % (35 MB)
105 02:15:26.797236 progress 40 % (41 MB)
106 02:15:27.224246 progress 45 % (46 MB)
107 02:15:27.910681 progress 50 % (51 MB)
108 02:15:28.589192 progress 55 % (56 MB)
109 02:15:29.337482 progress 60 % (61 MB)
110 02:15:30.091365 progress 65 % (66 MB)
111 02:15:30.827047 progress 70 % (71 MB)
112 02:15:31.592868 progress 75 % (76 MB)
113 02:15:32.268640 progress 80 % (82 MB)
114 02:15:32.974240 progress 85 % (87 MB)
115 02:15:33.706348 progress 90 % (92 MB)
116 02:15:34.430774 progress 95 % (97 MB)
117 02:15:35.166406 progress 100 % (102 MB)
118 02:15:35.178218 102 MB downloaded in 13.53 s (7.58 MB/s)
119 02:15:35.179113 end: 1.4.1 http-download (duration 00:00:14) [common]
121 02:15:35.180833 end: 1.4 download-retry (duration 00:00:14) [common]
122 02:15:35.181389 start: 1.5 download-retry (timeout 00:09:46) [common]
123 02:15:35.181933 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 02:15:35.182756 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc6-326-gaded6a2e0817/arm64/defconfig/gcc-12/modules.tar.xz
125 02:15:35.183237 saving as /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/modules/modules.tar
126 02:15:35.183654 total size: 11607064 (11 MB)
127 02:15:35.184122 Using unxz to decompress xz
128 02:15:35.230631 progress 0 % (0 MB)
129 02:15:35.297236 progress 5 % (0 MB)
130 02:15:35.371274 progress 10 % (1 MB)
131 02:15:35.467369 progress 15 % (1 MB)
132 02:15:35.560442 progress 20 % (2 MB)
133 02:15:35.639857 progress 25 % (2 MB)
134 02:15:35.715422 progress 30 % (3 MB)
135 02:15:35.789581 progress 35 % (3 MB)
136 02:15:35.866234 progress 40 % (4 MB)
137 02:15:35.942840 progress 45 % (5 MB)
138 02:15:36.026960 progress 50 % (5 MB)
139 02:15:36.104213 progress 55 % (6 MB)
140 02:15:36.196820 progress 60 % (6 MB)
141 02:15:36.283057 progress 65 % (7 MB)
142 02:15:36.362604 progress 70 % (7 MB)
143 02:15:36.445848 progress 75 % (8 MB)
144 02:15:36.529510 progress 80 % (8 MB)
145 02:15:36.609931 progress 85 % (9 MB)
146 02:15:36.688721 progress 90 % (9 MB)
147 02:15:36.766515 progress 95 % (10 MB)
148 02:15:36.843388 progress 100 % (11 MB)
149 02:15:36.854352 11 MB downloaded in 1.67 s (6.63 MB/s)
150 02:15:36.855142 end: 1.5.1 http-download (duration 00:00:02) [common]
152 02:15:36.857032 end: 1.5 download-retry (duration 00:00:02) [common]
153 02:15:36.857632 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 02:15:36.858221 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 02:15:46.613847 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/957345/extract-nfsrootfs-u_7s9lb8
156 02:15:46.614478 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 02:15:46.614804 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 02:15:46.615526 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r
159 02:15:46.616060 makedir: /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin
160 02:15:46.616563 makedir: /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/tests
161 02:15:46.616986 makedir: /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/results
162 02:15:46.617381 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-add-keys
163 02:15:46.618005 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-add-sources
164 02:15:46.618628 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-background-process-start
165 02:15:46.619254 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-background-process-stop
166 02:15:46.619894 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-common-functions
167 02:15:46.620543 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-echo-ipv4
168 02:15:46.621118 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-install-packages
169 02:15:46.621654 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-installed-packages
170 02:15:46.622397 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-os-build
171 02:15:46.623065 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-probe-channel
172 02:15:46.623636 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-probe-ip
173 02:15:46.624299 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-target-ip
174 02:15:46.625025 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-target-mac
175 02:15:46.625631 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-target-storage
176 02:15:46.626187 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-test-case
177 02:15:46.626765 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-test-event
178 02:15:46.627748 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-test-feedback
179 02:15:46.628429 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-test-raise
180 02:15:46.629492 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-test-reference
181 02:15:46.630061 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-test-runner
182 02:15:46.630650 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-test-set
183 02:15:46.631259 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-test-shell
184 02:15:46.631884 Updating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-install-packages (oe)
185 02:15:46.633198 Updating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/bin/lava-installed-packages (oe)
186 02:15:46.634225 Creating /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/environment
187 02:15:46.635068 LAVA metadata
188 02:15:46.635646 - LAVA_JOB_ID=957345
189 02:15:46.636161 - LAVA_DISPATCHER_IP=192.168.6.2
190 02:15:46.636598 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 02:15:46.637772 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 02:15:46.638179 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 02:15:46.638411 skipped lava-vland-overlay
194 02:15:46.638667 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 02:15:46.638936 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 02:15:46.639170 skipped lava-multinode-overlay
197 02:15:46.639425 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 02:15:46.639694 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 02:15:46.639968 Loading test definitions
200 02:15:46.640309 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 02:15:46.640550 Using /lava-957345 at stage 0
202 02:15:46.641962 uuid=957345_1.6.2.4.1 testdef=None
203 02:15:46.642352 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 02:15:46.642643 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 02:15:46.644671 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 02:15:46.645549 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 02:15:46.648261 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 02:15:46.649208 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 02:15:46.651680 runner path: /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/0/tests/0_dmesg test_uuid 957345_1.6.2.4.1
212 02:15:46.652437 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 02:15:46.653285 Creating lava-test-runner.conf files
215 02:15:46.653496 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/957345/lava-overlay-3uoxt58r/lava-957345/0 for stage 0
216 02:15:46.653883 - 0_dmesg
217 02:15:46.654298 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 02:15:46.654615 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 02:15:46.677643 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 02:15:46.678159 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 02:15:46.678450 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 02:15:46.678738 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 02:15:46.679024 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 02:15:47.323672 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 02:15:47.324165 start: 1.6.4 extract-modules (timeout 00:09:34) [common]
226 02:15:47.324428 extracting modules file /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957345/extract-nfsrootfs-u_7s9lb8
227 02:15:48.693951 extracting modules file /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957345/extract-overlay-ramdisk-wz39oulh/ramdisk
228 02:15:50.088041 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 02:15:50.088528 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 02:15:50.088807 [common] Applying overlay to NFS
231 02:15:50.089022 [common] Applying overlay /var/lib/lava/dispatcher/tmp/957345/compress-overlay-xuw5apon/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/957345/extract-nfsrootfs-u_7s9lb8
232 02:15:50.118003 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 02:15:50.118382 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 02:15:50.118656 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 02:15:50.118887 Converting downloaded kernel to a uImage
236 02:15:50.119191 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/kernel/Image /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/kernel/uImage
237 02:15:50.569826 output: Image Name:
238 02:15:50.570249 output: Created: Fri Nov 8 02:15:50 2024
239 02:15:50.570479 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 02:15:50.570695 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
241 02:15:50.570903 output: Load Address: 01080000
242 02:15:50.571108 output: Entry Point: 01080000
243 02:15:50.571309 output:
244 02:15:50.571648 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 02:15:50.571925 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 02:15:50.572257 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 02:15:50.572531 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 02:15:50.572804 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 02:15:50.573073 Building ramdisk /var/lib/lava/dispatcher/tmp/957345/extract-overlay-ramdisk-wz39oulh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/957345/extract-overlay-ramdisk-wz39oulh/ramdisk
250 02:15:52.906477 >> 166831 blocks
251 02:16:02.057141 Adding RAMdisk u-boot header.
252 02:16:02.057564 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/957345/extract-overlay-ramdisk-wz39oulh/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/957345/extract-overlay-ramdisk-wz39oulh/ramdisk.cpio.gz.uboot
253 02:16:02.303293 output: Image Name:
254 02:16:02.303700 output: Created: Fri Nov 8 02:16:02 2024
255 02:16:02.304285 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 02:16:02.304772 output: Data Size: 23436035 Bytes = 22886.75 KiB = 22.35 MiB
257 02:16:02.305231 output: Load Address: 00000000
258 02:16:02.305679 output: Entry Point: 00000000
259 02:16:02.306122 output:
260 02:16:02.307141 rename /var/lib/lava/dispatcher/tmp/957345/extract-overlay-ramdisk-wz39oulh/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/ramdisk/ramdisk.cpio.gz.uboot
261 02:16:02.307917 end: 1.6.8 compress-ramdisk (duration 00:00:12) [common]
262 02:16:02.308576 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 02:16:02.309178 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 02:16:02.309694 No LXC device requested
265 02:16:02.310268 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 02:16:02.310847 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 02:16:02.311408 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 02:16:02.311869 Checking files for TFTP limit of 4294967296 bytes.
269 02:16:02.314815 end: 1 tftp-deploy (duration 00:00:41) [common]
270 02:16:02.315454 start: 2 uboot-action (timeout 00:05:00) [common]
271 02:16:02.316077 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 02:16:02.316653 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 02:16:02.317223 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 02:16:02.317816 Using kernel file from prepare-kernel: 957345/tftp-deploy-dmclrwfg/kernel/uImage
275 02:16:02.318521 substitutions:
276 02:16:02.318983 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 02:16:02.319440 - {DTB_ADDR}: 0x01070000
278 02:16:02.319888 - {DTB}: 957345/tftp-deploy-dmclrwfg/dtb/meson-g12b-a311d-libretech-cc.dtb
279 02:16:02.320379 - {INITRD}: 957345/tftp-deploy-dmclrwfg/ramdisk/ramdisk.cpio.gz.uboot
280 02:16:02.320832 - {KERNEL_ADDR}: 0x01080000
281 02:16:02.321276 - {KERNEL}: 957345/tftp-deploy-dmclrwfg/kernel/uImage
282 02:16:02.321717 - {LAVA_MAC}: None
283 02:16:02.322202 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/957345/extract-nfsrootfs-u_7s9lb8
284 02:16:02.322653 - {NFS_SERVER_IP}: 192.168.6.2
285 02:16:02.323094 - {PRESEED_CONFIG}: None
286 02:16:02.323532 - {PRESEED_LOCAL}: None
287 02:16:02.323966 - {RAMDISK_ADDR}: 0x08000000
288 02:16:02.324444 - {RAMDISK}: 957345/tftp-deploy-dmclrwfg/ramdisk/ramdisk.cpio.gz.uboot
289 02:16:02.324884 - {ROOT_PART}: None
290 02:16:02.325322 - {ROOT}: None
291 02:16:02.325762 - {SERVER_IP}: 192.168.6.2
292 02:16:02.326195 - {TEE_ADDR}: 0x83000000
293 02:16:02.326629 - {TEE}: None
294 02:16:02.327064 Parsed boot commands:
295 02:16:02.327489 - setenv autoload no
296 02:16:02.327923 - setenv initrd_high 0xffffffff
297 02:16:02.328388 - setenv fdt_high 0xffffffff
298 02:16:02.328823 - dhcp
299 02:16:02.329257 - setenv serverip 192.168.6.2
300 02:16:02.329689 - tftpboot 0x01080000 957345/tftp-deploy-dmclrwfg/kernel/uImage
301 02:16:02.330126 - tftpboot 0x08000000 957345/tftp-deploy-dmclrwfg/ramdisk/ramdisk.cpio.gz.uboot
302 02:16:02.330560 - tftpboot 0x01070000 957345/tftp-deploy-dmclrwfg/dtb/meson-g12b-a311d-libretech-cc.dtb
303 02:16:02.330995 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/957345/extract-nfsrootfs-u_7s9lb8,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 02:16:02.331443 - bootm 0x01080000 0x08000000 0x01070000
305 02:16:02.332031 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 02:16:02.333702 start: 2.3 connect-device (timeout 00:05:00) [common]
308 02:16:02.334176 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 02:16:02.349623 Setting prompt string to ['lava-test: # ']
310 02:16:02.351238 end: 2.3 connect-device (duration 00:00:00) [common]
311 02:16:02.351911 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 02:16:02.352678 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 02:16:02.353327 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 02:16:02.354583 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 02:16:02.389447 >> OK - accepted request
316 02:16:02.391555 Returned 0 in 0 seconds
317 02:16:02.492654 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 02:16:02.494497 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 02:16:02.495166 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 02:16:02.495744 Setting prompt string to ['Hit any key to stop autoboot']
322 02:16:02.496378 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 02:16:02.498118 Trying 192.168.56.21...
324 02:16:02.498646 Connected to conserv1.
325 02:16:02.499128 Escape character is '^]'.
326 02:16:02.499597
327 02:16:02.500105 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 02:16:02.500582
329 02:16:14.303198 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 02:16:14.303816 bl2_stage_init 0x01
331 02:16:14.304346 bl2_stage_init 0x81
332 02:16:14.308849 hw id: 0x0000 - pwm id 0x01
333 02:16:14.309375 bl2_stage_init 0xc1
334 02:16:14.309809 bl2_stage_init 0x02
335 02:16:14.310237
336 02:16:14.314371 L0:00000000
337 02:16:14.314850 L1:20000703
338 02:16:14.315282 L2:00008067
339 02:16:14.315716 L3:14000000
340 02:16:14.320003 B2:00402000
341 02:16:14.320484 B1:e0f83180
342 02:16:14.320908
343 02:16:14.321337 TE: 58124
344 02:16:14.321768
345 02:16:14.325485 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 02:16:14.325968
347 02:16:14.326408 Board ID = 1
348 02:16:14.331083 Set A53 clk to 24M
349 02:16:14.331554 Set A73 clk to 24M
350 02:16:14.332013 Set clk81 to 24M
351 02:16:14.336667 A53 clk: 1200 MHz
352 02:16:14.337127 A73 clk: 1200 MHz
353 02:16:14.337552 CLK81: 166.6M
354 02:16:14.337971 smccc: 00012a91
355 02:16:14.342301 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 02:16:14.347930 board id: 1
357 02:16:14.353745 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 02:16:14.364397 fw parse done
359 02:16:14.370441 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 02:16:14.413044 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 02:16:14.424072 PIEI prepare done
362 02:16:14.424626 fastboot data load
363 02:16:14.425064 fastboot data verify
364 02:16:14.429583 verify result: 266
365 02:16:14.435199 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 02:16:14.435669 LPDDR4 probe
367 02:16:14.436158 ddr clk to 1584MHz
368 02:16:14.443164 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 02:16:14.480522
370 02:16:14.481057 dmc_version 0001
371 02:16:14.487077 Check phy result
372 02:16:14.493001 INFO : End of CA training
373 02:16:14.493472 INFO : End of initialization
374 02:16:14.498532 INFO : Training has run successfully!
375 02:16:14.499008 Check phy result
376 02:16:14.504228 INFO : End of initialization
377 02:16:14.504703 INFO : End of read enable training
378 02:16:14.509754 INFO : End of fine write leveling
379 02:16:14.515429 INFO : End of Write leveling coarse delay
380 02:16:14.515901 INFO : Training has run successfully!
381 02:16:14.516391 Check phy result
382 02:16:14.521058 INFO : End of initialization
383 02:16:14.521547 INFO : End of read dq deskew training
384 02:16:14.526579 INFO : End of MPR read delay center optimization
385 02:16:14.532223 INFO : End of write delay center optimization
386 02:16:14.537771 INFO : End of read delay center optimization
387 02:16:14.538251 INFO : End of max read latency training
388 02:16:14.543424 INFO : Training has run successfully!
389 02:16:14.543909 1D training succeed
390 02:16:14.552577 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 02:16:14.600289 Check phy result
392 02:16:14.600939 INFO : End of initialization
393 02:16:14.621820 INFO : End of 2D read delay Voltage center optimization
394 02:16:14.640973 INFO : End of 2D read delay Voltage center optimization
395 02:16:14.693541 INFO : End of 2D write delay Voltage center optimization
396 02:16:14.743109 INFO : End of 2D write delay Voltage center optimization
397 02:16:14.748624 INFO : Training has run successfully!
398 02:16:14.749106
399 02:16:14.749563 channel==0
400 02:16:14.754222 RxClkDly_Margin_A0==88 ps 9
401 02:16:14.754692 TxDqDly_Margin_A0==98 ps 10
402 02:16:14.757497 RxClkDly_Margin_A1==88 ps 9
403 02:16:14.757964 TxDqDly_Margin_A1==98 ps 10
404 02:16:14.763104 TrainedVREFDQ_A0==74
405 02:16:14.763589 TrainedVREFDQ_A1==74
406 02:16:14.768638 VrefDac_Margin_A0==25
407 02:16:14.769104 DeviceVref_Margin_A0==40
408 02:16:14.769547 VrefDac_Margin_A1==25
409 02:16:14.774249 DeviceVref_Margin_A1==40
410 02:16:14.774751
411 02:16:14.775207
412 02:16:14.775651 channel==1
413 02:16:14.776127 RxClkDly_Margin_A0==98 ps 10
414 02:16:14.777563 TxDqDly_Margin_A0==98 ps 10
415 02:16:14.783158 RxClkDly_Margin_A1==88 ps 9
416 02:16:14.783656 TxDqDly_Margin_A1==88 ps 9
417 02:16:14.784146 TrainedVREFDQ_A0==77
418 02:16:14.788796 TrainedVREFDQ_A1==77
419 02:16:14.789300 VrefDac_Margin_A0==22
420 02:16:14.794460 DeviceVref_Margin_A0==37
421 02:16:14.794932 VrefDac_Margin_A1==24
422 02:16:14.795374 DeviceVref_Margin_A1==37
423 02:16:14.795814
424 02:16:14.799972 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 02:16:14.800467
426 02:16:14.833565 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 02:16:14.834185 2D training succeed
428 02:16:14.839139 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 02:16:14.844724 auto size-- 65535DDR cs0 size: 2048MB
430 02:16:14.845204 DDR cs1 size: 2048MB
431 02:16:14.850461 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 02:16:14.850938 cs0 DataBus test pass
433 02:16:14.851387 cs1 DataBus test pass
434 02:16:14.856002 cs0 AddrBus test pass
435 02:16:14.856471 cs1 AddrBus test pass
436 02:16:14.856918
437 02:16:14.861579 100bdlr_step_size ps== 420
438 02:16:14.862073 result report
439 02:16:14.862538 boot times 0Enable ddr reg access
440 02:16:14.870711 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 02:16:14.884973 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 02:16:15.457077 0.0;M3 CHK:0;cm4_sp_mode 0
443 02:16:15.457725 MVN_1=0x00000000
444 02:16:15.462510 MVN_2=0x00000000
445 02:16:15.468292 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 02:16:15.468837 OPS=0x10
447 02:16:15.469336 ring efuse init
448 02:16:15.469824 chipver efuse init
449 02:16:15.476507 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 02:16:15.477053 [0.018961 Inits done]
451 02:16:15.483149 secure task start!
452 02:16:15.483659 high task start!
453 02:16:15.484158 low task start!
454 02:16:15.484617 run into bl31
455 02:16:15.490677 NOTICE: BL31: v1.3(release):4fc40b1
456 02:16:15.497696 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 02:16:15.498256 NOTICE: BL31: G12A normal boot!
458 02:16:15.523866 NOTICE: BL31: BL33 decompress pass
459 02:16:15.528710 ERROR: Error initializing runtime service opteed_fast
460 02:16:16.762811
461 02:16:16.763493
462 02:16:16.771002 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 02:16:16.771505
464 02:16:16.771965 Model: Libre Computer AML-A311D-CC Alta
465 02:16:16.979440 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 02:16:17.002842 DRAM: 2 GiB (effective 3.8 GiB)
467 02:16:17.145792 Core: 408 devices, 31 uclasses, devicetree: separate
468 02:16:17.151631 WDT: Not starting watchdog@f0d0
469 02:16:17.184179 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 02:16:17.196292 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 02:16:17.201295 ** Bad device specification mmc 0 **
472 02:16:17.211724 Card did not respond to voltage select! : -110
473 02:16:17.219331 ** Bad device specification mmc 0 **
474 02:16:17.219845 Couldn't find partition mmc 0
475 02:16:17.227654 Card did not respond to voltage select! : -110
476 02:16:17.233089 ** Bad device specification mmc 0 **
477 02:16:17.233603 Couldn't find partition mmc 0
478 02:16:17.238201 Error: could not access storage.
479 02:16:18.503925 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 02:16:18.504654 bl2_stage_init 0x01
481 02:16:18.505124 bl2_stage_init 0x81
482 02:16:18.509556 hw id: 0x0000 - pwm id 0x01
483 02:16:18.510120 bl2_stage_init 0xc1
484 02:16:18.510593 bl2_stage_init 0x02
485 02:16:18.511063
486 02:16:18.515104 L0:00000000
487 02:16:18.515630 L1:20000703
488 02:16:18.516161 L2:00008067
489 02:16:18.516617 L3:14000000
490 02:16:18.517975 B2:00402000
491 02:16:18.518480 B1:e0f83180
492 02:16:18.518931
493 02:16:18.519376 TE: 58167
494 02:16:18.519819
495 02:16:18.529184 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 02:16:18.529727
497 02:16:18.530181 Board ID = 1
498 02:16:18.530621 Set A53 clk to 24M
499 02:16:18.531059 Set A73 clk to 24M
500 02:16:18.534688 Set clk81 to 24M
501 02:16:18.535230 A53 clk: 1200 MHz
502 02:16:18.535677 A73 clk: 1200 MHz
503 02:16:18.538302 CLK81: 166.6M
504 02:16:18.538838 smccc: 00012abe
505 02:16:18.543765 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 02:16:18.549459 board id: 1
507 02:16:18.554678 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 02:16:18.565218 fw parse done
509 02:16:18.571173 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 02:16:18.613680 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 02:16:18.624594 PIEI prepare done
512 02:16:18.625118 fastboot data load
513 02:16:18.625572 fastboot data verify
514 02:16:18.630163 verify result: 266
515 02:16:18.635796 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 02:16:18.636348 LPDDR4 probe
517 02:16:18.636803 ddr clk to 1584MHz
518 02:16:18.643795 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 02:16:18.681011
520 02:16:18.681550 dmc_version 0001
521 02:16:18.687685 Check phy result
522 02:16:18.693526 INFO : End of CA training
523 02:16:18.694040 INFO : End of initialization
524 02:16:18.699134 INFO : Training has run successfully!
525 02:16:18.699645 Check phy result
526 02:16:18.704715 INFO : End of initialization
527 02:16:18.705214 INFO : End of read enable training
528 02:16:18.710364 INFO : End of fine write leveling
529 02:16:18.715965 INFO : End of Write leveling coarse delay
530 02:16:18.716496 INFO : Training has run successfully!
531 02:16:18.716947 Check phy result
532 02:16:18.721534 INFO : End of initialization
533 02:16:18.722030 INFO : End of read dq deskew training
534 02:16:18.727129 INFO : End of MPR read delay center optimization
535 02:16:18.732763 INFO : End of write delay center optimization
536 02:16:18.738411 INFO : End of read delay center optimization
537 02:16:18.738958 INFO : End of max read latency training
538 02:16:18.744024 INFO : Training has run successfully!
539 02:16:18.744547 1D training succeed
540 02:16:18.753214 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 02:16:18.801293 Check phy result
542 02:16:18.801830 INFO : End of initialization
543 02:16:18.822548 INFO : End of 2D read delay Voltage center optimization
544 02:16:18.842771 INFO : End of 2D read delay Voltage center optimization
545 02:16:18.894895 INFO : End of 2D write delay Voltage center optimization
546 02:16:18.944527 INFO : End of 2D write delay Voltage center optimization
547 02:16:18.949982 INFO : Training has run successfully!
548 02:16:18.950646
549 02:16:18.951232 channel==0
550 02:16:18.955418 RxClkDly_Margin_A0==88 ps 9
551 02:16:18.956066 TxDqDly_Margin_A0==98 ps 10
552 02:16:18.958873 RxClkDly_Margin_A1==88 ps 9
553 02:16:18.959345 TxDqDly_Margin_A1==98 ps 10
554 02:16:18.965096 TrainedVREFDQ_A0==74
555 02:16:18.965755 TrainedVREFDQ_A1==74
556 02:16:18.966212 VrefDac_Margin_A0==25
557 02:16:18.969988 DeviceVref_Margin_A0==40
558 02:16:18.970586 VrefDac_Margin_A1==25
559 02:16:18.975480 DeviceVref_Margin_A1==40
560 02:16:18.976089
561 02:16:18.976544
562 02:16:18.976982 channel==1
563 02:16:18.977411 RxClkDly_Margin_A0==98 ps 10
564 02:16:18.981125 TxDqDly_Margin_A0==98 ps 10
565 02:16:18.981681 RxClkDly_Margin_A1==98 ps 10
566 02:16:18.986756 TxDqDly_Margin_A1==88 ps 9
567 02:16:18.987392 TrainedVREFDQ_A0==77
568 02:16:18.987835 TrainedVREFDQ_A1==77
569 02:16:18.992347 VrefDac_Margin_A0==22
570 02:16:18.992901 DeviceVref_Margin_A0==37
571 02:16:18.997943 VrefDac_Margin_A1==22
572 02:16:18.998503 DeviceVref_Margin_A1==37
573 02:16:18.998943
574 02:16:19.003507 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 02:16:19.004107
576 02:16:19.031527 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 02:16:19.037133 2D training succeed
578 02:16:19.042807 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 02:16:19.043443 auto size-- 65535DDR cs0 size: 2048MB
580 02:16:19.048212 DDR cs1 size: 2048MB
581 02:16:19.048727 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 02:16:19.053659 cs0 DataBus test pass
583 02:16:19.054140 cs1 DataBus test pass
584 02:16:19.054582 cs0 AddrBus test pass
585 02:16:19.059266 cs1 AddrBus test pass
586 02:16:19.059763
587 02:16:19.060265 100bdlr_step_size ps== 420
588 02:16:19.060719 result report
589 02:16:19.064903 boot times 0Enable ddr reg access
590 02:16:19.072636 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 02:16:19.086136 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 02:16:19.659713 0.0;M3 CHK:0;cm4_sp_mode 0
593 02:16:19.660386 MVN_1=0x00000000
594 02:16:19.665262 MVN_2=0x00000000
595 02:16:19.671104 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 02:16:19.671601 OPS=0x10
597 02:16:19.672078 ring efuse init
598 02:16:19.672512 chipver efuse init
599 02:16:19.679302 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 02:16:19.679812 [0.018960 Inits done]
601 02:16:19.680283 secure task start!
602 02:16:19.686793 high task start!
603 02:16:19.687273 low task start!
604 02:16:19.687701 run into bl31
605 02:16:19.693444 NOTICE: BL31: v1.3(release):4fc40b1
606 02:16:19.701252 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 02:16:19.701738 NOTICE: BL31: G12A normal boot!
608 02:16:19.726718 NOTICE: BL31: BL33 decompress pass
609 02:16:19.732361 ERROR: Error initializing runtime service opteed_fast
610 02:16:20.965246
611 02:16:20.966558
612 02:16:20.973625 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 02:16:20.974152
614 02:16:20.974614 Model: Libre Computer AML-A311D-CC Alta
615 02:16:21.182293 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 02:16:21.205900 DRAM: 2 GiB (effective 3.8 GiB)
617 02:16:21.349125 Core: 408 devices, 31 uclasses, devicetree: separate
618 02:16:21.354493 WDT: Not starting watchdog@f0d0
619 02:16:21.387899 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 02:16:21.399118 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 02:16:21.404242 ** Bad device specification mmc 0 **
622 02:16:21.414472 Card did not respond to voltage select! : -110
623 02:16:21.422165 ** Bad device specification mmc 0 **
624 02:16:21.422766 Couldn't find partition mmc 0
625 02:16:21.430829 Card did not respond to voltage select! : -110
626 02:16:21.436019 ** Bad device specification mmc 0 **
627 02:16:21.436615 Couldn't find partition mmc 0
628 02:16:21.442001 Error: could not access storage.
629 02:16:21.783685 Net: eth0: ethernet@ff3f0000
630 02:16:21.784454 starting USB...
631 02:16:22.035392 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 02:16:22.036139 Starting the controller
633 02:16:22.042205 USB XHCI 1.10
634 02:16:23.753909 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 02:16:23.754589 bl2_stage_init 0x01
636 02:16:23.755059 bl2_stage_init 0x81
637 02:16:23.759433 hw id: 0x0000 - pwm id 0x01
638 02:16:23.759960 bl2_stage_init 0xc1
639 02:16:23.760474 bl2_stage_init 0x02
640 02:16:23.760947
641 02:16:23.765001 L0:00000000
642 02:16:23.765520 L1:20000703
643 02:16:23.765973 L2:00008067
644 02:16:23.766418 L3:14000000
645 02:16:23.770573 B2:00402000
646 02:16:23.771109 B1:e0f83180
647 02:16:23.771596
648 02:16:23.772115 TE: 58159
649 02:16:23.772576
650 02:16:23.776206 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 02:16:23.776725
652 02:16:23.777181 Board ID = 1
653 02:16:23.782068 Set A53 clk to 24M
654 02:16:23.782595 Set A73 clk to 24M
655 02:16:23.783051 Set clk81 to 24M
656 02:16:23.787345 A53 clk: 1200 MHz
657 02:16:23.787874 A73 clk: 1200 MHz
658 02:16:23.788401 CLK81: 166.6M
659 02:16:23.788880 smccc: 00012ab5
660 02:16:23.792930 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 02:16:23.798589 board id: 1
662 02:16:23.804481 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 02:16:23.815091 fw parse done
664 02:16:23.821126 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 02:16:23.862754 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 02:16:23.874615 PIEI prepare done
667 02:16:23.875154 fastboot data load
668 02:16:23.875615 fastboot data verify
669 02:16:23.880296 verify result: 266
670 02:16:23.885847 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 02:16:23.886386 LPDDR4 probe
672 02:16:23.886855 ddr clk to 1584MHz
673 02:16:23.893819 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 02:16:23.931104
675 02:16:23.931690 dmc_version 0001
676 02:16:23.937856 Check phy result
677 02:16:23.943687 INFO : End of CA training
678 02:16:23.944230 INFO : End of initialization
679 02:16:23.949267 INFO : Training has run successfully!
680 02:16:23.949775 Check phy result
681 02:16:23.954867 INFO : End of initialization
682 02:16:23.955381 INFO : End of read enable training
683 02:16:23.960480 INFO : End of fine write leveling
684 02:16:23.966062 INFO : End of Write leveling coarse delay
685 02:16:23.966567 INFO : Training has run successfully!
686 02:16:23.967019 Check phy result
687 02:16:23.971693 INFO : End of initialization
688 02:16:23.972230 INFO : End of read dq deskew training
689 02:16:23.977254 INFO : End of MPR read delay center optimization
690 02:16:23.982841 INFO : End of write delay center optimization
691 02:16:23.988448 INFO : End of read delay center optimization
692 02:16:23.988956 INFO : End of max read latency training
693 02:16:23.994090 INFO : Training has run successfully!
694 02:16:23.994611 1D training succeed
695 02:16:24.003323 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 02:16:24.051003 Check phy result
697 02:16:24.051583 INFO : End of initialization
698 02:16:24.072765 INFO : End of 2D read delay Voltage center optimization
699 02:16:24.093011 INFO : End of 2D read delay Voltage center optimization
700 02:16:24.145064 INFO : End of 2D write delay Voltage center optimization
701 02:16:24.194346 INFO : End of 2D write delay Voltage center optimization
702 02:16:24.199879 INFO : Training has run successfully!
703 02:16:24.200448
704 02:16:24.200905 channel==0
705 02:16:24.205512 RxClkDly_Margin_A0==88 ps 9
706 02:16:24.206041 TxDqDly_Margin_A0==98 ps 10
707 02:16:24.211072 RxClkDly_Margin_A1==88 ps 9
708 02:16:24.211609 TxDqDly_Margin_A1==88 ps 9
709 02:16:24.212103 TrainedVREFDQ_A0==74
710 02:16:24.216620 TrainedVREFDQ_A1==74
711 02:16:24.217133 VrefDac_Margin_A0==25
712 02:16:24.217578 DeviceVref_Margin_A0==40
713 02:16:24.222183 VrefDac_Margin_A1==25
714 02:16:24.222700 DeviceVref_Margin_A1==40
715 02:16:24.223146
716 02:16:24.223584
717 02:16:24.224062 channel==1
718 02:16:24.227907 RxClkDly_Margin_A0==98 ps 10
719 02:16:24.228484 TxDqDly_Margin_A0==88 ps 9
720 02:16:24.233456 RxClkDly_Margin_A1==88 ps 9
721 02:16:24.233989 TxDqDly_Margin_A1==88 ps 9
722 02:16:24.239522 TrainedVREFDQ_A0==76
723 02:16:24.240110 TrainedVREFDQ_A1==77
724 02:16:24.240580 VrefDac_Margin_A0==22
725 02:16:24.244598 DeviceVref_Margin_A0==38
726 02:16:24.245114 VrefDac_Margin_A1==24
727 02:16:24.250269 DeviceVref_Margin_A1==37
728 02:16:24.250660
729 02:16:24.250912 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 02:16:24.251148
731 02:16:24.283880 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
732 02:16:24.284789 2D training succeed
733 02:16:24.289335 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 02:16:24.294967 auto size-- 65535DDR cs0 size: 2048MB
735 02:16:24.295401 DDR cs1 size: 2048MB
736 02:16:24.300557 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 02:16:24.301100 cs0 DataBus test pass
738 02:16:24.307039 cs1 DataBus test pass
739 02:16:24.307462 cs0 AddrBus test pass
740 02:16:24.308033 cs1 AddrBus test pass
741 02:16:24.309472
742 02:16:24.312003 100bdlr_step_size ps== 420
743 02:16:24.312392 result report
744 02:16:24.318116 boot times 0Enable ddr reg access
745 02:16:24.323539 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 02:16:24.335950 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 02:16:24.909800 0.0;M3 CHK:0;cm4_sp_mode 0
748 02:16:24.910448 MVN_1=0x00000000
749 02:16:24.915954 MVN_2=0x00000000
750 02:16:24.920991 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 02:16:24.921357 OPS=0x10
752 02:16:24.921585 ring efuse init
753 02:16:24.921806 chipver efuse init
754 02:16:24.926579 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 02:16:24.932230 [0.018961 Inits done]
756 02:16:24.932844 secure task start!
757 02:16:24.933297 high task start!
758 02:16:24.937016 low task start!
759 02:16:24.937567 run into bl31
760 02:16:24.943363 NOTICE: BL31: v1.3(release):4fc40b1
761 02:16:24.951125 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 02:16:24.951666 NOTICE: BL31: G12A normal boot!
763 02:16:24.976521 NOTICE: BL31: BL33 decompress pass
764 02:16:24.982237 ERROR: Error initializing runtime service opteed_fast
765 02:16:26.215221
766 02:16:26.215889
767 02:16:26.223577 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 02:16:26.224154
769 02:16:26.224629 Model: Libre Computer AML-A311D-CC Alta
770 02:16:26.432078 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 02:16:26.455448 DRAM: 2 GiB (effective 3.8 GiB)
772 02:16:26.598304 Core: 408 devices, 31 uclasses, devicetree: separate
773 02:16:26.604246 WDT: Not starting watchdog@f0d0
774 02:16:26.636396 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 02:16:26.648992 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 02:16:26.653978 ** Bad device specification mmc 0 **
777 02:16:26.664275 Card did not respond to voltage select! : -110
778 02:16:26.672056 ** Bad device specification mmc 0 **
779 02:16:26.672612 Couldn't find partition mmc 0
780 02:16:26.680267 Card did not respond to voltage select! : -110
781 02:16:26.685760 ** Bad device specification mmc 0 **
782 02:16:26.686283 Couldn't find partition mmc 0
783 02:16:26.690824 Error: could not access storage.
784 02:16:27.033301 Net: eth0: ethernet@ff3f0000
785 02:16:27.033912 starting USB...
786 02:16:27.285059 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 02:16:27.285711 Starting the controller
788 02:16:27.292168 USB XHCI 1.10
789 02:16:29.454045 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 02:16:29.454716 bl2_stage_init 0x01
791 02:16:29.455189 bl2_stage_init 0x81
792 02:16:29.459576 hw id: 0x0000 - pwm id 0x01
793 02:16:29.460135 bl2_stage_init 0xc1
794 02:16:29.460602 bl2_stage_init 0x02
795 02:16:29.461051
796 02:16:29.465077 L0:00000000
797 02:16:29.465588 L1:20000703
798 02:16:29.466044 L2:00008067
799 02:16:29.466487 L3:14000000
800 02:16:29.470715 B2:00402000
801 02:16:29.471225 B1:e0f83180
802 02:16:29.471676
803 02:16:29.472168 TE: 58124
804 02:16:29.472621
805 02:16:29.476315 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 02:16:29.476826
807 02:16:29.477282 Board ID = 1
808 02:16:29.481877 Set A53 clk to 24M
809 02:16:29.482402 Set A73 clk to 24M
810 02:16:29.482862 Set clk81 to 24M
811 02:16:29.487437 A53 clk: 1200 MHz
812 02:16:29.487950 A73 clk: 1200 MHz
813 02:16:29.488446 CLK81: 166.6M
814 02:16:29.488894 smccc: 00012a92
815 02:16:29.493052 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 02:16:29.498696 board id: 1
817 02:16:29.504633 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 02:16:29.515184 fw parse done
819 02:16:29.521304 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 02:16:29.563711 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 02:16:29.574651 PIEI prepare done
822 02:16:29.575191 fastboot data load
823 02:16:29.575618 fastboot data verify
824 02:16:29.580348 verify result: 266
825 02:16:29.585875 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 02:16:29.586406 LPDDR4 probe
827 02:16:29.586824 ddr clk to 1584MHz
828 02:16:29.593798 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 02:16:29.631172
830 02:16:29.631721 dmc_version 0001
831 02:16:29.637854 Check phy result
832 02:16:29.643680 INFO : End of CA training
833 02:16:29.644216 INFO : End of initialization
834 02:16:29.649317 INFO : Training has run successfully!
835 02:16:29.649827 Check phy result
836 02:16:29.654857 INFO : End of initialization
837 02:16:29.655356 INFO : End of read enable training
838 02:16:29.660490 INFO : End of fine write leveling
839 02:16:29.666082 INFO : End of Write leveling coarse delay
840 02:16:29.666578 INFO : Training has run successfully!
841 02:16:29.666993 Check phy result
842 02:16:29.671726 INFO : End of initialization
843 02:16:29.672244 INFO : End of read dq deskew training
844 02:16:29.677225 INFO : End of MPR read delay center optimization
845 02:16:29.682871 INFO : End of write delay center optimization
846 02:16:29.688488 INFO : End of read delay center optimization
847 02:16:29.688975 INFO : End of max read latency training
848 02:16:29.694134 INFO : Training has run successfully!
849 02:16:29.694643 1D training succeed
850 02:16:29.703290 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 02:16:29.750890 Check phy result
852 02:16:29.751468 INFO : End of initialization
853 02:16:29.772513 INFO : End of 2D read delay Voltage center optimization
854 02:16:29.792590 INFO : End of 2D read delay Voltage center optimization
855 02:16:29.844599 INFO : End of 2D write delay Voltage center optimization
856 02:16:29.893857 INFO : End of 2D write delay Voltage center optimization
857 02:16:29.899315 INFO : Training has run successfully!
858 02:16:29.899812
859 02:16:29.900289 channel==0
860 02:16:29.904907 RxClkDly_Margin_A0==88 ps 9
861 02:16:29.905406 TxDqDly_Margin_A0==98 ps 10
862 02:16:29.910545 RxClkDly_Margin_A1==88 ps 9
863 02:16:29.911074 TxDqDly_Margin_A1==98 ps 10
864 02:16:29.911525 TrainedVREFDQ_A0==74
865 02:16:29.916105 TrainedVREFDQ_A1==74
866 02:16:29.916868 VrefDac_Margin_A0==25
867 02:16:29.917316 DeviceVref_Margin_A0==40
868 02:16:29.921717 VrefDac_Margin_A1==25
869 02:16:29.922221 DeviceVref_Margin_A1==40
870 02:16:29.922725
871 02:16:29.923137
872 02:16:29.927273 channel==1
873 02:16:29.927707 RxClkDly_Margin_A0==98 ps 10
874 02:16:29.928150 TxDqDly_Margin_A0==98 ps 10
875 02:16:29.933166 RxClkDly_Margin_A1==88 ps 9
876 02:16:29.933649 TxDqDly_Margin_A1==88 ps 9
877 02:16:29.938549 TrainedVREFDQ_A0==77
878 02:16:29.939048 TrainedVREFDQ_A1==77
879 02:16:29.939478 VrefDac_Margin_A0==22
880 02:16:29.944077 DeviceVref_Margin_A0==37
881 02:16:29.944559 VrefDac_Margin_A1==24
882 02:16:29.949721 DeviceVref_Margin_A1==37
883 02:16:29.950190
884 02:16:29.950582 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 02:16:29.950967
886 02:16:29.983267 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
887 02:16:29.983877 2D training succeed
888 02:16:29.988887 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 02:16:29.994448 auto size-- 65535DDR cs0 size: 2048MB
890 02:16:29.994916 DDR cs1 size: 2048MB
891 02:16:29.999934 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 02:16:30.000476 cs0 DataBus test pass
893 02:16:30.005563 cs1 DataBus test pass
894 02:16:30.006055 cs0 AddrBus test pass
895 02:16:30.006445 cs1 AddrBus test pass
896 02:16:30.006830
897 02:16:30.011181 100bdlr_step_size ps== 420
898 02:16:30.011671 result report
899 02:16:30.016800 boot times 0Enable ddr reg access
900 02:16:30.022130 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 02:16:30.035569 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 02:16:30.607619 0.0;M3 CHK:0;cm4_sp_mode 0
903 02:16:30.608374 MVN_1=0x00000000
904 02:16:30.612985 MVN_2=0x00000000
905 02:16:30.618850 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 02:16:30.619321 OPS=0x10
907 02:16:30.619826 ring efuse init
908 02:16:30.620284 chipver efuse init
909 02:16:30.624479 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 02:16:30.630021 [0.018960 Inits done]
911 02:16:30.630472 secure task start!
912 02:16:30.630881 high task start!
913 02:16:30.634622 low task start!
914 02:16:30.635072 run into bl31
915 02:16:30.641212 NOTICE: BL31: v1.3(release):4fc40b1
916 02:16:30.649011 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 02:16:30.649485 NOTICE: BL31: G12A normal boot!
918 02:16:30.674497 NOTICE: BL31: BL33 decompress pass
919 02:16:30.680036 ERROR: Error initializing runtime service opteed_fast
920 02:16:31.913094
921 02:16:31.913817
922 02:16:31.921329 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 02:16:31.921856
924 02:16:31.922358 Model: Libre Computer AML-A311D-CC Alta
925 02:16:32.129872 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 02:16:32.153115 DRAM: 2 GiB (effective 3.8 GiB)
927 02:16:32.296120 Core: 408 devices, 31 uclasses, devicetree: separate
928 02:16:32.301969 WDT: Not starting watchdog@f0d0
929 02:16:32.334256 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 02:16:32.346683 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 02:16:32.351790 ** Bad device specification mmc 0 **
932 02:16:32.362008 Card did not respond to voltage select! : -110
933 02:16:32.369774 ** Bad device specification mmc 0 **
934 02:16:32.370331 Couldn't find partition mmc 0
935 02:16:32.377996 Card did not respond to voltage select! : -110
936 02:16:32.383520 ** Bad device specification mmc 0 **
937 02:16:32.384076 Couldn't find partition mmc 0
938 02:16:32.388616 Error: could not access storage.
939 02:16:32.731073 Net: eth0: ethernet@ff3f0000
940 02:16:32.731723 starting USB...
941 02:16:32.982940 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 02:16:32.983571 Starting the controller
943 02:16:32.989852 USB XHCI 1.10
944 02:16:34.544060 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 02:16:34.552267 scanning usb for storage devices... 0 Storage Device(s) found
947 02:16:34.603929 Hit any key to stop autoboot: 1
948 02:16:34.604948 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 02:16:34.605969 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 02:16:34.606466 Setting prompt string to ['=>']
951 02:16:34.606957 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 02:16:34.619735 0
953 02:16:34.620752 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 02:16:34.621331 Sending with 10 millisecond of delay
956 02:16:35.756169 => setenv autoload no
957 02:16:35.767000 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 02:16:35.772554 setenv autoload no
959 02:16:35.773288 Sending with 10 millisecond of delay
961 02:16:37.570461 => setenv initrd_high 0xffffffff
962 02:16:37.581216 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 02:16:37.582071 setenv initrd_high 0xffffffff
964 02:16:37.582812 Sending with 10 millisecond of delay
966 02:16:39.199937 => setenv fdt_high 0xffffffff
967 02:16:39.210827 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 02:16:39.211795 setenv fdt_high 0xffffffff
969 02:16:39.212596 Sending with 10 millisecond of delay
971 02:16:39.504615 => dhcp
972 02:16:39.515426 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 02:16:39.516373 dhcp
974 02:16:39.516834 Speed: 1000, full duplex
975 02:16:39.517261 BOOTP broadcast 1
976 02:16:39.528246 DHCP client bound to address 192.168.6.27 (13 ms)
977 02:16:39.529031 Sending with 10 millisecond of delay
979 02:16:41.206331 => setenv serverip 192.168.6.2
980 02:16:41.217152 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 02:16:41.218099 setenv serverip 192.168.6.2
982 02:16:41.218801 Sending with 10 millisecond of delay
984 02:16:44.943823 => tftpboot 0x01080000 957345/tftp-deploy-dmclrwfg/kernel/uImage
985 02:16:44.954548 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
986 02:16:44.955403 tftpboot 0x01080000 957345/tftp-deploy-dmclrwfg/kernel/uImage
987 02:16:44.955847 Speed: 1000, full duplex
988 02:16:44.956305 Using ethernet@ff3f0000 device
989 02:16:44.957419 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 02:16:44.962883 Filename '957345/tftp-deploy-dmclrwfg/kernel/uImage'.
991 02:16:44.966866 Load address: 0x1080000
992 02:16:47.825878 Loading: *################################################## 43.6 MiB
993 02:16:47.826684 15.2 MiB/s
994 02:16:47.827266 done
995 02:16:47.830384 Bytes transferred = 45716032 (2b99240 hex)
996 02:16:47.831357 Sending with 10 millisecond of delay
998 02:16:52.519511 => tftpboot 0x08000000 957345/tftp-deploy-dmclrwfg/ramdisk/ramdisk.cpio.gz.uboot
999 02:16:52.530338 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 02:16:52.531218 tftpboot 0x08000000 957345/tftp-deploy-dmclrwfg/ramdisk/ramdisk.cpio.gz.uboot
1001 02:16:52.531671 Speed: 1000, full duplex
1002 02:16:52.532130 Using ethernet@ff3f0000 device
1003 02:16:52.533310 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 02:16:52.545080 Filename '957345/tftp-deploy-dmclrwfg/ramdisk/ramdisk.cpio.gz.uboot'.
1005 02:16:52.545789 Load address: 0x8000000
1006 02:16:59.068948 Loading: *#####################T ############################ UDP wrong checksum 00000005 000077ee
1007 02:17:04.070206 T UDP wrong checksum 00000005 000077ee
1008 02:17:14.072988 T T UDP wrong checksum 00000005 000077ee
1009 02:17:34.074092 T T T UDP wrong checksum 00000005 000077ee
1010 02:17:49.081053 T T T
1011 02:17:49.081726 Retry count exceeded; starting again
1013 02:17:49.083285 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1016 02:17:49.085552 end: 2.4 uboot-commands (duration 00:01:47) [common]
1018 02:17:49.087186 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1020 02:17:49.088338 end: 2 uboot-action (duration 00:01:47) [common]
1022 02:17:49.089996 Cleaning after the job
1023 02:17:49.090596 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/ramdisk
1024 02:17:49.091802 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/kernel
1025 02:17:49.139935 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/dtb
1026 02:17:49.140871 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/nfsrootfs
1027 02:17:49.307944 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957345/tftp-deploy-dmclrwfg/modules
1028 02:17:49.329917 start: 4.1 power-off (timeout 00:00:30) [common]
1029 02:17:49.330573 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1030 02:17:49.378758 >> OK - accepted request
1031 02:17:49.380741 Returned 0 in 0 seconds
1032 02:17:49.481529 end: 4.1 power-off (duration 00:00:00) [common]
1034 02:17:49.482497 start: 4.2 read-feedback (timeout 00:10:00) [common]
1035 02:17:49.483129 Listened to connection for namespace 'common' for up to 1s
1036 02:17:50.483299 Finalising connection for namespace 'common'
1037 02:17:50.484149 Disconnecting from shell: Finalise
1038 02:17:50.484710 =>
1039 02:17:50.585822 end: 4.2 read-feedback (duration 00:00:01) [common]
1040 02:17:50.586569 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/957345
1041 02:17:52.406892 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/957345
1042 02:17:52.407493 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.