Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:00:24.041142 lava-dispatcher, installed at version: 2024.01
2 03:00:24.041929 start: 0 validate
3 03:00:24.042392 Start time: 2024-11-12 03:00:24.042363+00:00 (UTC)
4 03:00:24.042946 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:00:24.043468 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:00:24.089728 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:00:24.090291 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc7-95-g96203094619a7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:00:24.120920 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:00:24.121537 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc7-95-g96203094619a7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 03:00:24.155417 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:00:24.156182 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:00:24.188340 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:00:24.188799 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc7-95-g96203094619a7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:00:24.232054 validate duration: 0.19
16 03:00:24.233516 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:00:24.234152 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:00:24.234733 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:00:24.235731 Not decompressing ramdisk as can be used compressed.
20 03:00:24.236574 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 03:00:24.237092 saving as /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/ramdisk/initrd.cpio.gz
22 03:00:24.237603 total size: 5628169 (5 MB)
23 03:00:24.281110 progress 0 % (0 MB)
24 03:00:24.289128 progress 5 % (0 MB)
25 03:00:24.296945 progress 10 % (0 MB)
26 03:00:24.303846 progress 15 % (0 MB)
27 03:00:24.309890 progress 20 % (1 MB)
28 03:00:24.313571 progress 25 % (1 MB)
29 03:00:24.317593 progress 30 % (1 MB)
30 03:00:24.321625 progress 35 % (1 MB)
31 03:00:24.325193 progress 40 % (2 MB)
32 03:00:24.329210 progress 45 % (2 MB)
33 03:00:24.332901 progress 50 % (2 MB)
34 03:00:24.336809 progress 55 % (2 MB)
35 03:00:24.340820 progress 60 % (3 MB)
36 03:00:24.344408 progress 65 % (3 MB)
37 03:00:24.348552 progress 70 % (3 MB)
38 03:00:24.352202 progress 75 % (4 MB)
39 03:00:24.356016 progress 80 % (4 MB)
40 03:00:24.359341 progress 85 % (4 MB)
41 03:00:24.363050 progress 90 % (4 MB)
42 03:00:24.366672 progress 95 % (5 MB)
43 03:00:24.370011 progress 100 % (5 MB)
44 03:00:24.370701 5 MB downloaded in 0.13 s (40.33 MB/s)
45 03:00:24.371274 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:00:24.372285 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:00:24.372625 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:00:24.372925 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:00:24.373422 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/kernel/Image
51 03:00:24.373694 saving as /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/kernel/Image
52 03:00:24.373920 total size: 45715968 (43 MB)
53 03:00:24.374145 No compression specified
54 03:00:24.411313 progress 0 % (0 MB)
55 03:00:24.438483 progress 5 % (2 MB)
56 03:00:24.465889 progress 10 % (4 MB)
57 03:00:24.493538 progress 15 % (6 MB)
58 03:00:24.520916 progress 20 % (8 MB)
59 03:00:24.548122 progress 25 % (10 MB)
60 03:00:24.575305 progress 30 % (13 MB)
61 03:00:24.602556 progress 35 % (15 MB)
62 03:00:24.630245 progress 40 % (17 MB)
63 03:00:24.657095 progress 45 % (19 MB)
64 03:00:24.684300 progress 50 % (21 MB)
65 03:00:24.711585 progress 55 % (24 MB)
66 03:00:24.739073 progress 60 % (26 MB)
67 03:00:24.765869 progress 65 % (28 MB)
68 03:00:24.793091 progress 70 % (30 MB)
69 03:00:24.820598 progress 75 % (32 MB)
70 03:00:24.847596 progress 80 % (34 MB)
71 03:00:24.874233 progress 85 % (37 MB)
72 03:00:24.901321 progress 90 % (39 MB)
73 03:00:24.928743 progress 95 % (41 MB)
74 03:00:24.954814 progress 100 % (43 MB)
75 03:00:24.955346 43 MB downloaded in 0.58 s (74.99 MB/s)
76 03:00:24.955835 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:00:24.956699 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:00:24.956977 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:00:24.957247 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:00:24.957718 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 03:00:24.957995 saving as /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 03:00:24.958207 total size: 53209 (0 MB)
84 03:00:24.958414 No compression specified
85 03:00:25.000514 progress 61 % (0 MB)
86 03:00:25.001377 progress 100 % (0 MB)
87 03:00:25.001921 0 MB downloaded in 0.04 s (1.16 MB/s)
88 03:00:25.002413 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:00:25.003232 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:00:25.003496 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:00:25.003763 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:00:25.004232 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 03:00:25.004484 saving as /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/nfsrootfs/full.rootfs.tar
95 03:00:25.004693 total size: 120894716 (115 MB)
96 03:00:25.004904 Using unxz to decompress xz
97 03:00:25.044039 progress 0 % (0 MB)
98 03:00:25.834387 progress 5 % (5 MB)
99 03:00:26.681920 progress 10 % (11 MB)
100 03:00:27.475625 progress 15 % (17 MB)
101 03:00:28.208836 progress 20 % (23 MB)
102 03:00:28.799754 progress 25 % (28 MB)
103 03:00:29.626846 progress 30 % (34 MB)
104 03:00:30.421833 progress 35 % (40 MB)
105 03:00:30.785571 progress 40 % (46 MB)
106 03:00:31.154014 progress 45 % (51 MB)
107 03:00:31.968656 progress 50 % (57 MB)
108 03:00:32.907513 progress 55 % (63 MB)
109 03:00:33.690067 progress 60 % (69 MB)
110 03:00:34.457737 progress 65 % (74 MB)
111 03:00:35.263327 progress 70 % (80 MB)
112 03:00:36.097163 progress 75 % (86 MB)
113 03:00:36.888280 progress 80 % (92 MB)
114 03:00:37.652982 progress 85 % (98 MB)
115 03:00:38.506669 progress 90 % (103 MB)
116 03:00:39.280785 progress 95 % (109 MB)
117 03:00:40.116479 progress 100 % (115 MB)
118 03:00:40.128945 115 MB downloaded in 15.12 s (7.62 MB/s)
119 03:00:40.129741 end: 1.4.1 http-download (duration 00:00:15) [common]
121 03:00:40.131582 end: 1.4 download-retry (duration 00:00:15) [common]
122 03:00:40.132236 start: 1.5 download-retry (timeout 00:09:44) [common]
123 03:00:40.132827 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 03:00:40.133810 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/modules.tar.xz
125 03:00:40.134339 saving as /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/modules/modules.tar
126 03:00:40.134804 total size: 11615448 (11 MB)
127 03:00:40.135274 Using unxz to decompress xz
128 03:00:40.184153 progress 0 % (0 MB)
129 03:00:40.250274 progress 5 % (0 MB)
130 03:00:40.324116 progress 10 % (1 MB)
131 03:00:40.422129 progress 15 % (1 MB)
132 03:00:40.513229 progress 20 % (2 MB)
133 03:00:40.591906 progress 25 % (2 MB)
134 03:00:40.666253 progress 30 % (3 MB)
135 03:00:40.743393 progress 35 % (3 MB)
136 03:00:40.814708 progress 40 % (4 MB)
137 03:00:40.889392 progress 45 % (5 MB)
138 03:00:40.972130 progress 50 % (5 MB)
139 03:00:41.048497 progress 55 % (6 MB)
140 03:00:41.132573 progress 60 % (6 MB)
141 03:00:41.212047 progress 65 % (7 MB)
142 03:00:41.291374 progress 70 % (7 MB)
143 03:00:41.368896 progress 75 % (8 MB)
144 03:00:41.451474 progress 80 % (8 MB)
145 03:00:41.530311 progress 85 % (9 MB)
146 03:00:41.611941 progress 90 % (10 MB)
147 03:00:41.683950 progress 95 % (10 MB)
148 03:00:41.759836 progress 100 % (11 MB)
149 03:00:41.771795 11 MB downloaded in 1.64 s (6.77 MB/s)
150 03:00:41.772787 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:00:41.774565 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:00:41.775162 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 03:00:41.775751 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 03:00:58.452604 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/977952/extract-nfsrootfs-h_jcbkpt
156 03:00:58.453228 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 03:00:58.453522 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 03:00:58.454146 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo
159 03:00:58.454611 makedir: /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin
160 03:00:58.454949 makedir: /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/tests
161 03:00:58.455271 makedir: /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/results
162 03:00:58.455611 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-add-keys
163 03:00:58.456243 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-add-sources
164 03:00:58.456937 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-background-process-start
165 03:00:58.457532 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-background-process-stop
166 03:00:58.458096 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-common-functions
167 03:00:58.458629 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-echo-ipv4
168 03:00:58.459143 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-install-packages
169 03:00:58.459686 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-installed-packages
170 03:00:58.460344 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-os-build
171 03:00:58.460895 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-probe-channel
172 03:00:58.461422 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-probe-ip
173 03:00:58.461928 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-target-ip
174 03:00:58.462439 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-target-mac
175 03:00:58.462945 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-target-storage
176 03:00:58.463461 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-test-case
177 03:00:58.464054 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-test-event
178 03:00:58.464823 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-test-feedback
179 03:00:58.465460 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-test-raise
180 03:00:58.465978 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-test-reference
181 03:00:58.466485 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-test-runner
182 03:00:58.466998 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-test-set
183 03:00:58.467493 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-test-shell
184 03:00:58.468053 Updating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-add-keys (debian)
185 03:00:58.468647 Updating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-add-sources (debian)
186 03:00:58.469213 Updating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-install-packages (debian)
187 03:00:58.469759 Updating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-installed-packages (debian)
188 03:00:58.470294 Updating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/bin/lava-os-build (debian)
189 03:00:58.470763 Creating /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/environment
190 03:00:58.471168 LAVA metadata
191 03:00:58.471435 - LAVA_JOB_ID=977952
192 03:00:58.471654 - LAVA_DISPATCHER_IP=192.168.6.2
193 03:00:58.472071 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 03:00:58.473148 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 03:00:58.473518 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 03:00:58.473729 skipped lava-vland-overlay
197 03:00:58.473971 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 03:00:58.474232 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 03:00:58.474455 skipped lava-multinode-overlay
200 03:00:58.474701 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 03:00:58.474954 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 03:00:58.475213 Loading test definitions
203 03:00:58.475499 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 03:00:58.475722 Using /lava-977952 at stage 0
205 03:00:58.476983 uuid=977952_1.6.2.4.1 testdef=None
206 03:00:58.477347 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 03:00:58.477620 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 03:00:58.479298 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 03:00:58.480214 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 03:00:58.482337 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 03:00:58.483213 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 03:00:58.487697 runner path: /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/0/tests/0_timesync-off test_uuid 977952_1.6.2.4.1
215 03:00:58.488534 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 03:00:58.489431 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 03:00:58.489681 Using /lava-977952 at stage 0
219 03:00:58.490086 Fetching tests from https://github.com/kernelci/test-definitions.git
220 03:00:58.490415 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/0/tests/1_kselftest-alsa'
221 03:01:02.004430 Running '/usr/bin/git checkout kernelci.org
222 03:01:02.465952 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 03:01:02.467410 uuid=977952_1.6.2.4.5 testdef=None
224 03:01:02.467806 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 03:01:02.468675 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 03:01:02.471769 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 03:01:02.472717 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 03:01:02.476891 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 03:01:02.477927 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 03:01:02.482148 runner path: /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/0/tests/1_kselftest-alsa test_uuid 977952_1.6.2.4.5
234 03:01:02.482504 BOARD='meson-sm1-s905d3-libretech-cc'
235 03:01:02.482733 BRANCH='next'
236 03:01:02.482998 SKIPFILE='/dev/null'
237 03:01:02.483252 SKIP_INSTALL='True'
238 03:01:02.483464 TESTPROG_URL='http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 03:01:02.483673 TST_CASENAME=''
240 03:01:02.483881 TST_CMDFILES='alsa'
241 03:01:02.485705 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 03:01:02.487345 Creating lava-test-runner.conf files
244 03:01:02.487746 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/977952/lava-overlay-s9h1yrzo/lava-977952/0 for stage 0
245 03:01:02.488360 - 0_timesync-off
246 03:01:02.488689 - 1_kselftest-alsa
247 03:01:02.489076 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 03:01:02.489377 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 03:01:25.977163 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 03:01:25.977595 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 03:01:25.977860 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 03:01:25.978135 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 03:01:25.978402 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 03:01:26.598862 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 03:01:26.599330 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 03:01:26.599601 extracting modules file /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977952/extract-nfsrootfs-h_jcbkpt
257 03:01:27.959409 extracting modules file /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977952/extract-overlay-ramdisk-qilqupey/ramdisk
258 03:01:29.359242 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 03:01:29.359737 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 03:01:29.360048 [common] Applying overlay to NFS
261 03:01:29.360287 [common] Applying overlay /var/lib/lava/dispatcher/tmp/977952/compress-overlay-73kqto3k/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/977952/extract-nfsrootfs-h_jcbkpt
262 03:01:32.077182 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 03:01:32.077675 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 03:01:32.077973 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 03:01:32.078209 Converting downloaded kernel to a uImage
266 03:01:32.078535 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/kernel/Image /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/kernel/uImage
267 03:01:32.551471 output: Image Name:
268 03:01:32.552024 output: Created: Tue Nov 12 03:01:32 2024
269 03:01:32.552301 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 03:01:32.552555 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
271 03:01:32.552801 output: Load Address: 01080000
272 03:01:32.553048 output: Entry Point: 01080000
273 03:01:32.553289 output:
274 03:01:32.553685 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 03:01:32.554018 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 03:01:32.554349 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 03:01:32.554664 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 03:01:32.554977 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 03:01:32.555307 Building ramdisk /var/lib/lava/dispatcher/tmp/977952/extract-overlay-ramdisk-qilqupey/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/977952/extract-overlay-ramdisk-qilqupey/ramdisk
280 03:01:34.757940 >> 166832 blocks
281 03:01:42.461236 Adding RAMdisk u-boot header.
282 03:01:42.461768 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/977952/extract-overlay-ramdisk-qilqupey/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/977952/extract-overlay-ramdisk-qilqupey/ramdisk.cpio.gz.uboot
283 03:01:42.707605 output: Image Name:
284 03:01:42.708136 output: Created: Tue Nov 12 03:01:42 2024
285 03:01:42.708621 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 03:01:42.709139 output: Data Size: 23435335 Bytes = 22886.07 KiB = 22.35 MiB
287 03:01:42.709610 output: Load Address: 00000000
288 03:01:42.710056 output: Entry Point: 00000000
289 03:01:42.710542 output:
290 03:01:42.711656 rename /var/lib/lava/dispatcher/tmp/977952/extract-overlay-ramdisk-qilqupey/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/ramdisk/ramdisk.cpio.gz.uboot
291 03:01:42.712480 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 03:01:42.713104 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 03:01:42.713766 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 03:01:42.714280 No LXC device requested
295 03:01:42.714834 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 03:01:42.715398 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 03:01:42.715943 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 03:01:42.716449 Checking files for TFTP limit of 4294967296 bytes.
299 03:01:42.719380 end: 1 tftp-deploy (duration 00:01:18) [common]
300 03:01:42.720061 start: 2 uboot-action (timeout 00:05:00) [common]
301 03:01:42.720671 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 03:01:42.721225 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 03:01:42.721782 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 03:01:42.722365 Using kernel file from prepare-kernel: 977952/tftp-deploy-xz4zjrxq/kernel/uImage
305 03:01:42.723053 substitutions:
306 03:01:42.723501 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 03:01:42.723947 - {DTB_ADDR}: 0x01070000
308 03:01:42.724428 - {DTB}: 977952/tftp-deploy-xz4zjrxq/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 03:01:42.724878 - {INITRD}: 977952/tftp-deploy-xz4zjrxq/ramdisk/ramdisk.cpio.gz.uboot
310 03:01:42.725321 - {KERNEL_ADDR}: 0x01080000
311 03:01:42.725758 - {KERNEL}: 977952/tftp-deploy-xz4zjrxq/kernel/uImage
312 03:01:42.726195 - {LAVA_MAC}: None
313 03:01:42.726676 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/977952/extract-nfsrootfs-h_jcbkpt
314 03:01:42.727119 - {NFS_SERVER_IP}: 192.168.6.2
315 03:01:42.727555 - {PRESEED_CONFIG}: None
316 03:01:42.728018 - {PRESEED_LOCAL}: None
317 03:01:42.728502 - {RAMDISK_ADDR}: 0x08000000
318 03:01:42.728935 - {RAMDISK}: 977952/tftp-deploy-xz4zjrxq/ramdisk/ramdisk.cpio.gz.uboot
319 03:01:42.729368 - {ROOT_PART}: None
320 03:01:42.729802 - {ROOT}: None
321 03:01:42.730234 - {SERVER_IP}: 192.168.6.2
322 03:01:42.730663 - {TEE_ADDR}: 0x83000000
323 03:01:42.731094 - {TEE}: None
324 03:01:42.731525 Parsed boot commands:
325 03:01:42.731941 - setenv autoload no
326 03:01:42.732407 - setenv initrd_high 0xffffffff
327 03:01:42.732835 - setenv fdt_high 0xffffffff
328 03:01:42.733258 - dhcp
329 03:01:42.733681 - setenv serverip 192.168.6.2
330 03:01:42.734109 - tftpboot 0x01080000 977952/tftp-deploy-xz4zjrxq/kernel/uImage
331 03:01:42.734542 - tftpboot 0x08000000 977952/tftp-deploy-xz4zjrxq/ramdisk/ramdisk.cpio.gz.uboot
332 03:01:42.734973 - tftpboot 0x01070000 977952/tftp-deploy-xz4zjrxq/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 03:01:42.735405 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/977952/extract-nfsrootfs-h_jcbkpt,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 03:01:42.735848 - bootm 0x01080000 0x08000000 0x01070000
335 03:01:42.736428 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 03:01:42.738064 start: 2.3 connect-device (timeout 00:05:00) [common]
338 03:01:42.738524 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 03:01:42.754623 Setting prompt string to ['lava-test: # ']
340 03:01:42.756330 end: 2.3 connect-device (duration 00:00:00) [common]
341 03:01:42.757014 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 03:01:42.757735 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 03:01:42.758379 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 03:01:42.759935 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 03:01:42.798244 >> OK - accepted request
346 03:01:42.800478 Returned 0 in 0 seconds
347 03:01:42.901759 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 03:01:42.903588 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 03:01:42.904261 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 03:01:42.904857 Setting prompt string to ['Hit any key to stop autoboot']
352 03:01:42.905377 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 03:01:42.907101 Trying 192.168.56.21...
354 03:01:42.907625 Connected to conserv1.
355 03:01:42.908118 Escape character is '^]'.
356 03:01:42.908588
357 03:01:42.909052 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 03:01:42.909552
359 03:01:49.676674 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 03:01:49.677089 bl2_stage_init 0x01
361 03:01:49.677328 bl2_stage_init 0x81
362 03:01:49.682218 hw id: 0x0000 - pwm id 0x01
363 03:01:49.682512 bl2_stage_init 0xc1
364 03:01:49.687807 bl2_stage_init 0x02
365 03:01:49.688123
366 03:01:49.688363 L0:00000000
367 03:01:49.688591 L1:00000703
368 03:01:49.688813 L2:00008067
369 03:01:49.689026 L3:15000000
370 03:01:49.693397 S1:00000000
371 03:01:49.693697 B2:20282000
372 03:01:49.693928 B1:a0f83180
373 03:01:49.694139
374 03:01:49.694347 TE: 68732
375 03:01:49.694555
376 03:01:49.698996 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 03:01:49.699273
378 03:01:49.704601 Board ID = 1
379 03:01:49.704877 Set cpu clk to 24M
380 03:01:49.705092 Set clk81 to 24M
381 03:01:49.710130 Use GP1_pll as DSU clk.
382 03:01:49.710407 DSU clk: 1200 Mhz
383 03:01:49.710621 CPU clk: 1200 MHz
384 03:01:49.715740 Set clk81 to 166.6M
385 03:01:49.721363 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 03:01:49.721639 board id: 1
387 03:01:49.728728 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 03:01:49.739203 fw parse done
389 03:01:49.745243 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 03:01:49.787761 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 03:01:49.798834 PIEI prepare done
392 03:01:49.799127 fastboot data load
393 03:01:49.799345 fastboot data verify
394 03:01:49.804341 verify result: 266
395 03:01:49.809939 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 03:01:49.810222 LPDDR4 probe
397 03:01:49.810437 ddr clk to 1584MHz
398 03:01:49.817950 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 03:01:49.855239
400 03:01:49.855607 dmc_version 0001
401 03:01:49.861880 Check phy result
402 03:01:49.867877 INFO : End of CA training
403 03:01:49.868187 INFO : End of initialization
404 03:01:49.873373 INFO : Training has run successfully!
405 03:01:49.873662 Check phy result
406 03:01:49.878990 INFO : End of initialization
407 03:01:49.879261 INFO : End of read enable training
408 03:01:49.882289 INFO : End of fine write leveling
409 03:01:49.887848 INFO : End of Write leveling coarse delay
410 03:01:49.893367 INFO : Training has run successfully!
411 03:01:49.893640 Check phy result
412 03:01:49.893868 INFO : End of initialization
413 03:01:49.899012 INFO : End of read dq deskew training
414 03:01:49.904649 INFO : End of MPR read delay center optimization
415 03:01:49.904926 INFO : End of write delay center optimization
416 03:01:49.910302 INFO : End of read delay center optimization
417 03:01:49.915817 INFO : End of max read latency training
418 03:01:49.916162 INFO : Training has run successfully!
419 03:01:49.921499 1D training succeed
420 03:01:49.927425 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 03:01:49.974977 Check phy result
422 03:01:49.975359 INFO : End of initialization
423 03:01:49.997400 INFO : End of 2D read delay Voltage center optimization
424 03:01:50.016635 INFO : End of 2D read delay Voltage center optimization
425 03:01:50.068526 INFO : End of 2D write delay Voltage center optimization
426 03:01:50.117576 INFO : End of 2D write delay Voltage center optimization
427 03:01:50.123199 INFO : Training has run successfully!
428 03:01:50.123496
429 03:01:50.123721 channel==0
430 03:01:50.128806 RxClkDly_Margin_A0==88 ps 9
431 03:01:50.129112 TxDqDly_Margin_A0==98 ps 10
432 03:01:50.134509 RxClkDly_Margin_A1==88 ps 9
433 03:01:50.134801 TxDqDly_Margin_A1==98 ps 10
434 03:01:50.135020 TrainedVREFDQ_A0==74
435 03:01:50.140107 TrainedVREFDQ_A1==75
436 03:01:50.140413 VrefDac_Margin_A0==24
437 03:01:50.140633 DeviceVref_Margin_A0==40
438 03:01:50.145530 VrefDac_Margin_A1==23
439 03:01:50.145825 DeviceVref_Margin_A1==39
440 03:01:50.146041
441 03:01:50.146249
442 03:01:50.151207 channel==1
443 03:01:50.151502 RxClkDly_Margin_A0==78 ps 8
444 03:01:50.151717 TxDqDly_Margin_A0==78 ps 8
445 03:01:50.156776 RxClkDly_Margin_A1==88 ps 9
446 03:01:50.157067 TxDqDly_Margin_A1==88 ps 9
447 03:01:50.162393 TrainedVREFDQ_A0==77
448 03:01:50.162687 TrainedVREFDQ_A1==75
449 03:01:50.162905 VrefDac_Margin_A0==22
450 03:01:50.167880 DeviceVref_Margin_A0==37
451 03:01:50.168212 VrefDac_Margin_A1==22
452 03:01:50.173545 DeviceVref_Margin_A1==38
453 03:01:50.173836
454 03:01:50.174056 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 03:01:50.174266
456 03:01:50.207139 soc_vref_reg_value 0x 0000001a 00000019 00000019 00000017 00000019 00000016 00000018 00000016 00000017 00000018 00000017 00000018 00000018 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000062
457 03:01:50.207565 2D training succeed
458 03:01:50.212683 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 03:01:50.218276 auto size-- 65535DDR cs0 size: 2048MB
460 03:01:50.218570 DDR cs1 size: 2048MB
461 03:01:50.223854 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 03:01:50.224162 cs0 DataBus test pass
463 03:01:50.229457 cs1 DataBus test pass
464 03:01:50.229746 cs0 AddrBus test pass
465 03:01:50.229964 cs1 AddrBus test pass
466 03:01:50.230172
467 03:01:50.235056 100bdlr_step_size ps== 478
468 03:01:50.235348 result report
469 03:01:50.240654 boot times 0Enable ddr reg access
470 03:01:50.245816 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 03:01:50.259676 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 03:01:50.915019 bl2z: ptr: 05129330, size: 00001e40
473 03:01:50.923103 0.0;M3 CHK:0;cm4_sp_mode 0
474 03:01:50.923413 MVN_1=0x00000000
475 03:01:50.923631 MVN_2=0x00000000
476 03:01:50.934689 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 03:01:50.935009 OPS=0x04
478 03:01:50.935228 ring efuse init
479 03:01:50.937683 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 03:01:50.943654 [0.017319 Inits done]
481 03:01:50.943928 secure task start!
482 03:01:50.944184 high task start!
483 03:01:50.944397 low task start!
484 03:01:50.947779 run into bl31
485 03:01:50.956424 NOTICE: BL31: v1.3(release):4fc40b1
486 03:01:50.964204 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 03:01:50.964507 NOTICE: BL31: G12A normal boot!
488 03:01:50.979738 NOTICE: BL31: BL33 decompress pass
489 03:01:50.985451 ERROR: Error initializing runtime service opteed_fast
490 03:01:53.730234 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 03:01:53.730702 bl2_stage_init 0x01
492 03:01:53.730953 bl2_stage_init 0x81
493 03:01:53.735751 hw id: 0x0000 - pwm id 0x01
494 03:01:53.736397 bl2_stage_init 0xc1
495 03:01:53.739939 bl2_stage_init 0x02
496 03:01:53.740456
497 03:01:53.740905 L0:00000000
498 03:01:53.741346 L1:00000703
499 03:01:53.741783 L2:00008067
500 03:01:53.745480 L3:15000000
501 03:01:53.745965 S1:00000000
502 03:01:53.746401 B2:20282000
503 03:01:53.746832 B1:a0f83180
504 03:01:53.747257
505 03:01:53.751114 TE: 70988
506 03:01:53.751583
507 03:01:53.756628 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 03:01:53.757117
509 03:01:53.757552 Board ID = 1
510 03:01:53.757985 Set cpu clk to 24M
511 03:01:53.762244 Set clk81 to 24M
512 03:01:53.762743 Use GP1_pll as DSU clk.
513 03:01:53.763175 DSU clk: 1200 Mhz
514 03:01:53.767867 CPU clk: 1200 MHz
515 03:01:53.768378 Set clk81 to 166.6M
516 03:01:53.773509 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 03:01:53.773997 board id: 1
518 03:01:53.779152 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 03:01:53.793182 fw parse done
520 03:01:53.798976 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 03:01:53.842204 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 03:01:53.853225 PIEI prepare done
523 03:01:53.853694 fastboot data load
524 03:01:53.854129 fastboot data verify
525 03:01:53.858797 verify result: 266
526 03:01:53.864398 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 03:01:53.864863 LPDDR4 probe
528 03:01:53.865291 ddr clk to 1584MHz
529 03:01:53.872396 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 03:01:53.910144
531 03:01:53.910630 dmc_version 0001
532 03:01:53.917243 Check phy result
533 03:01:53.923185 INFO : End of CA training
534 03:01:53.923680 INFO : End of initialization
535 03:01:53.928736 INFO : Training has run successfully!
536 03:01:53.929231 Check phy result
537 03:01:53.934352 INFO : End of initialization
538 03:01:53.934844 INFO : End of read enable training
539 03:01:53.939951 INFO : End of fine write leveling
540 03:01:53.945543 INFO : End of Write leveling coarse delay
541 03:01:53.946044 INFO : Training has run successfully!
542 03:01:53.946497 Check phy result
543 03:01:53.951159 INFO : End of initialization
544 03:01:53.951648 INFO : End of read dq deskew training
545 03:01:53.956736 INFO : End of MPR read delay center optimization
546 03:01:53.962318 INFO : End of write delay center optimization
547 03:01:53.967951 INFO : End of read delay center optimization
548 03:01:53.968485 INFO : End of max read latency training
549 03:01:53.973530 INFO : Training has run successfully!
550 03:01:53.974021 1D training succeed
551 03:01:53.982739 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 03:01:54.031147 Check phy result
553 03:01:54.031828 INFO : End of initialization
554 03:01:54.058478 INFO : End of 2D read delay Voltage center optimization
555 03:01:54.082691 INFO : End of 2D read delay Voltage center optimization
556 03:01:54.138490 INFO : End of 2D write delay Voltage center optimization
557 03:01:54.193381 INFO : End of 2D write delay Voltage center optimization
558 03:01:54.198940 INFO : Training has run successfully!
559 03:01:54.199460
560 03:01:54.199928 channel==0
561 03:01:54.204461 RxClkDly_Margin_A0==78 ps 8
562 03:01:54.204966 TxDqDly_Margin_A0==98 ps 10
563 03:01:54.210177 RxClkDly_Margin_A1==88 ps 9
564 03:01:54.210670 TxDqDly_Margin_A1==98 ps 10
565 03:01:54.211130 TrainedVREFDQ_A0==77
566 03:01:54.215686 TrainedVREFDQ_A1==75
567 03:01:54.216219 VrefDac_Margin_A0==25
568 03:01:54.216680 DeviceVref_Margin_A0==37
569 03:01:54.221264 VrefDac_Margin_A1==23
570 03:01:54.221752 DeviceVref_Margin_A1==39
571 03:01:54.222206
572 03:01:54.222657
573 03:01:54.226859 channel==1
574 03:01:54.227353 RxClkDly_Margin_A0==98 ps 10
575 03:01:54.227802 TxDqDly_Margin_A0==88 ps 9
576 03:01:54.232473 RxClkDly_Margin_A1==78 ps 8
577 03:01:54.232968 TxDqDly_Margin_A1==98 ps 10
578 03:01:54.238214 TrainedVREFDQ_A0==75
579 03:01:54.238734 TrainedVREFDQ_A1==78
580 03:01:54.239194 VrefDac_Margin_A0==22
581 03:01:54.243648 DeviceVref_Margin_A0==38
582 03:01:54.244169 VrefDac_Margin_A1==22
583 03:01:54.249249 DeviceVref_Margin_A1==36
584 03:01:54.249739
585 03:01:54.250193 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 03:01:54.250642
587 03:01:54.282853 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
588 03:01:54.283428 2D training succeed
589 03:01:54.288433 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 03:01:54.294069 auto size-- 65535DDR cs0 size: 2048MB
591 03:01:54.294560 DDR cs1 size: 2048MB
592 03:01:54.299643 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 03:01:54.300207 cs0 DataBus test pass
594 03:01:54.305263 cs1 DataBus test pass
595 03:01:54.305609 cs0 AddrBus test pass
596 03:01:54.305841 cs1 AddrBus test pass
597 03:01:54.306064
598 03:01:54.310895 100bdlr_step_size ps== 471
599 03:01:54.311244 result report
600 03:01:54.316463 boot times 0Enable ddr reg access
601 03:01:54.321786 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 03:01:54.335640 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 03:01:54.995470 bl2z: ptr: 05129330, size: 00001e40
604 03:01:55.004419 0.0;M3 CHK:0;cm4_sp_mode 0
605 03:01:55.004992 MVN_1=0x00000000
606 03:01:55.005357 MVN_2=0x00000000
607 03:01:55.015847 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 03:01:55.016436 OPS=0x04
609 03:01:55.016721 ring efuse init
610 03:01:55.021497 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 03:01:55.021914 [0.017355 Inits done]
612 03:01:55.022165 secure task start!
613 03:01:55.029139 high task start!
614 03:01:55.029529 low task start!
615 03:01:55.029778 run into bl31
616 03:01:55.038840 NOTICE: BL31: v1.3(release):4fc40b1
617 03:01:55.045886 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 03:01:55.046887 NOTICE: BL31: G12A normal boot!
619 03:01:55.061606 NOTICE: BL31: BL33 decompress pass
620 03:01:55.066761 ERROR: Error initializing runtime service opteed_fast
621 03:01:56.429083 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 03:01:56.429500 bl2_stage_init 0x01
623 03:01:56.429721 bl2_stage_init 0x81
624 03:01:56.434744 hw id: 0x0000 - pwm id 0x01
625 03:01:56.435084 bl2_stage_init 0xc1
626 03:01:56.435301 bl2_stage_init 0x02
627 03:01:56.435507
628 03:01:56.440290 L0:00000000
629 03:01:56.440686 L1:00000703
630 03:01:56.440901 L2:00008067
631 03:01:56.441105 L3:15000000
632 03:01:56.441309 S1:00000000
633 03:01:56.441885 B2:20282000
634 03:01:56.447762 B1:a0f83180
635 03:01:56.448200
636 03:01:56.448474 TE: 70138
637 03:01:56.448687
638 03:01:56.453001 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 03:01:56.453443
640 03:01:56.453737 Board ID = 1
641 03:01:56.458497 Set cpu clk to 24M
642 03:01:56.458893 Set clk81 to 24M
643 03:01:56.459144 Use GP1_pll as DSU clk.
644 03:01:56.461909 DSU clk: 1200 Mhz
645 03:01:56.462266 CPU clk: 1200 MHz
646 03:01:56.467523 Set clk81 to 166.6M
647 03:01:56.473250 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 03:01:56.473555 board id: 1
649 03:01:56.479727 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 03:01:56.768363 fw parse done
651 03:01:56.768822 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 03:01:56.769126 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 03:01:56.769414 PIEI prepare done
654 03:01:56.769701 fastboot data load
655 03:01:56.769992 fastboot data verify
656 03:01:56.770412 verify result: 266
657 03:01:56.770684 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 03:01:56.770951 LPDDR4 probe
659 03:01:56.771186 ddr clk to 1584MHz
660 03:01:56.771425 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 03:01:56.771667
662 03:01:56.771911 dmc_version 0001
663 03:01:56.772407 Check phy result
664 03:01:56.772679 INFO : End of CA training
665 03:01:56.772998 INFO : End of initialization
666 03:01:56.773251 INFO : Training has run successfully!
667 03:01:56.773484 Check phy result
668 03:01:56.773721 INFO : End of initialization
669 03:01:56.773961 INFO : End of read enable training
670 03:01:56.774192 INFO : End of fine write leveling
671 03:01:56.774427 INFO : End of Write leveling coarse delay
672 03:01:56.774665 INFO : Training has run successfully!
673 03:01:56.774897 Check phy result
674 03:01:56.775130 INFO : End of initialization
675 03:01:56.775367 INFO : End of read dq deskew training
676 03:01:56.775598 INFO : End of MPR read delay center optimization
677 03:01:56.775837 INFO : End of write delay center optimization
678 03:01:56.776098 INFO : End of read delay center optimization
679 03:01:56.776336 INFO : End of max read latency training
680 03:01:56.776566 INFO : Training has run successfully!
681 03:01:56.776802 1D training succeed
682 03:01:56.777042 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 03:01:56.777272 Check phy result
684 03:01:56.777506 INFO : End of initialization
685 03:01:56.777734 INFO : End of 2D read delay Voltage center optimization
686 03:01:56.778044 INFO : End of 2D read delay Voltage center optimization
687 03:01:56.820221 INFO : End of 2D write delay Voltage center optimization
688 03:01:56.869490 INFO : End of 2D write delay Voltage center optimization
689 03:01:56.874743 INFO : Training has run successfully!
690 03:01:56.875100
691 03:01:56.875432 channel==0
692 03:01:56.880509 RxClkDly_Margin_A0==78 ps 8
693 03:01:56.880933 TxDqDly_Margin_A0==98 ps 10
694 03:01:56.883709 RxClkDly_Margin_A1==88 ps 9
695 03:01:56.884108 TxDqDly_Margin_A1==98 ps 10
696 03:01:56.889165 TrainedVREFDQ_A0==74
697 03:01:56.889503 TrainedVREFDQ_A1==74
698 03:01:56.894818 VrefDac_Margin_A0==23
699 03:01:56.895179 DeviceVref_Margin_A0==40
700 03:01:56.895512 VrefDac_Margin_A1==23
701 03:01:56.900456 DeviceVref_Margin_A1==40
702 03:01:56.900799
703 03:01:56.901045
704 03:01:56.901277 channel==1
705 03:01:56.902252 RxClkDly_Margin_A0==88 ps 9
706 03:01:56.904060 TxDqDly_Margin_A0==98 ps 10
707 03:01:56.910009 RxClkDly_Margin_A1==78 ps 8
708 03:01:56.910358 TxDqDly_Margin_A1==88 ps 9
709 03:01:56.910600 TrainedVREFDQ_A0==78
710 03:01:56.915159 TrainedVREFDQ_A1==75
711 03:01:56.915512 VrefDac_Margin_A0==22
712 03:01:56.921035 DeviceVref_Margin_A0==36
713 03:01:56.921384 VrefDac_Margin_A1==22
714 03:01:56.921624 DeviceVref_Margin_A1==38
715 03:01:56.922352
716 03:01:56.929845 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 03:01:56.930234
718 03:01:56.957785 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000016 dram_vref_reg_value 0x 00000061
719 03:01:56.958222 2D training succeed
720 03:01:56.963503 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 03:01:56.969051 auto size-- 65535DDR cs0 size: 2048MB
722 03:01:56.969397 DDR cs1 size: 2048MB
723 03:01:56.974534 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 03:01:56.974969 cs0 DataBus test pass
725 03:01:56.980240 cs1 DataBus test pass
726 03:01:56.980942 cs0 AddrBus test pass
727 03:01:56.981177 cs1 AddrBus test pass
728 03:01:56.985758
729 03:01:56.986109 100bdlr_step_size ps== 478
730 03:01:56.986357 result report
731 03:01:56.991469 boot times 0Enable ddr reg access
732 03:01:56.996818 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 03:01:57.011262 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 03:01:57.666999 bl2z: ptr: 05129330, size: 00001e40
735 03:01:57.673289 0.0;M3 CHK:0;cm4_sp_mode 0
736 03:01:57.673602 MVN_1=0x00000000
737 03:01:57.673829 MVN_2=0x00000000
738 03:01:57.684759 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 03:01:57.685084 OPS=0x04
740 03:01:57.685300 ring efuse init
741 03:01:57.690414 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 03:01:57.690732 [0.017310 Inits done]
743 03:01:57.690944 secure task start!
744 03:01:57.697356 high task start!
745 03:01:57.697659 low task start!
746 03:01:57.697865 run into bl31
747 03:01:57.706563 NOTICE: BL31: v1.3(release):4fc40b1
748 03:01:57.714173 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 03:01:57.714490 NOTICE: BL31: G12A normal boot!
750 03:01:57.729926 NOTICE: BL31: BL33 decompress pass
751 03:01:57.735676 ERROR: Error initializing runtime service opteed_fast
752 03:01:58.529756
753 03:01:58.530182
754 03:01:58.535171 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 03:01:58.535470
756 03:01:58.537652 Model: Libre Computer AML-S905D3-CC Solitude
757 03:01:58.685625 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 03:01:58.700933 DRAM: 2 GiB (effective 3.8 GiB)
759 03:01:58.801881 Core: 406 devices, 33 uclasses, devicetree: separate
760 03:01:58.807726 WDT: Not starting watchdog@f0d0
761 03:01:58.832832 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 03:01:58.845037 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 03:01:58.850040 ** Bad device specification mmc 0 **
764 03:01:58.860117 Card did not respond to voltage select! : -110
765 03:01:58.867730 ** Bad device specification mmc 0 **
766 03:01:58.868066 Couldn't find partition mmc 0
767 03:01:58.876102 Card did not respond to voltage select! : -110
768 03:01:58.881601 ** Bad device specification mmc 0 **
769 03:01:58.881900 Couldn't find partition mmc 0
770 03:01:58.885782 Error: could not access storage.
771 03:01:59.183067 Net: eth0: ethernet@ff3f0000
772 03:01:59.183483 starting USB...
773 03:01:59.427819 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 03:01:59.428271 Starting the controller
775 03:01:59.434757 USB XHCI 1.10
776 03:02:00.988388 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 03:02:00.996721 scanning usb for storage devices... 0 Storage Device(s) found
779 03:02:01.047763 Hit any key to stop autoboot: 1
780 03:02:01.048823 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
781 03:02:01.049563 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
782 03:02:01.050109 Setting prompt string to ['=>']
783 03:02:01.050658 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
784 03:02:01.062037 0
785 03:02:01.063074 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 03:02:01.164498 => setenv autoload no
788 03:02:01.165381 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
789 03:02:01.171197 setenv autoload no
791 03:02:01.272878 => setenv initrd_high 0xffffffff
792 03:02:01.273879 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 03:02:01.278225 setenv initrd_high 0xffffffff
795 03:02:01.379854 => setenv fdt_high 0xffffffff
796 03:02:01.380915 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 03:02:01.385252 setenv fdt_high 0xffffffff
799 03:02:01.486970 => dhcp
800 03:02:01.488037 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 03:02:01.492047 dhcp
802 03:02:01.997712 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
803 03:02:01.998363 Speed: 1000, full duplex
804 03:02:01.998824 BOOTP broadcast 1
805 03:02:02.246320 BOOTP broadcast 2
806 03:02:02.256985 DHCP client bound to address 192.168.6.21 (259 ms)
808 03:02:02.358659 => setenv serverip 192.168.6.2
809 03:02:02.359526 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 03:02:02.364759 setenv serverip 192.168.6.2
812 03:02:02.466420 => tftpboot 0x01080000 977952/tftp-deploy-xz4zjrxq/kernel/uImage
813 03:02:02.467281 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
814 03:02:02.475002 tftpboot 0x01080000 977952/tftp-deploy-xz4zjrxq/kernel/uImage
815 03:02:02.475596 Speed: 1000, full duplex
816 03:02:02.476107 Using ethernet@ff3f0000 device
817 03:02:02.480500 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
818 03:02:02.485925 Filename '977952/tftp-deploy-xz4zjrxq/kernel/uImage'.
819 03:02:02.489861 Load address: 0x1080000
820 03:02:05.758613 Loading: *################################################## 43.6 MiB
821 03:02:05.759045 13.3 MiB/s
822 03:02:05.759257 done
823 03:02:05.762987 Bytes transferred = 45716032 (2b99240 hex)
825 03:02:05.864179 => tftpboot 0x08000000 977952/tftp-deploy-xz4zjrxq/ramdisk/ramdisk.cpio.gz.uboot
826 03:02:05.864904 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
827 03:02:05.871491 tftpboot 0x08000000 977952/tftp-deploy-xz4zjrxq/ramdisk/ramdisk.cpio.gz.uboot
828 03:02:05.871868 Speed: 1000, full duplex
829 03:02:05.872120 Using ethernet@ff3f0000 device
830 03:02:05.877026 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
831 03:02:05.886970 Filename '977952/tftp-deploy-xz4zjrxq/ramdisk/ramdisk.cpio.gz.uboot'.
832 03:02:05.887374 Load address: 0x8000000
833 03:02:07.314147 Loading: *################################################# UDP wrong checksum 00000005 000049f3
834 03:02:12.315041 T UDP wrong checksum 00000005 000049f3
835 03:02:18.151088 T UDP wrong checksum 000000ff 00009aa1
836 03:02:18.200859 UDP wrong checksum 000000ff 00002594
837 03:02:22.317151 T UDP wrong checksum 00000005 000049f3
838 03:02:42.321331 T T T T UDP wrong checksum 00000005 000049f3
839 03:02:45.745520 UDP wrong checksum 000000ff 000030df
840 03:02:45.768285 UDP wrong checksum 000000ff 0000c4d1
841 03:02:48.736145 T UDP wrong checksum 000000ff 00006cad
842 03:02:48.765669 UDP wrong checksum 000000ff 0000f59f
843 03:02:50.302290 UDP wrong checksum 000000ff 0000fbd3
844 03:02:50.318137 UDP wrong checksum 000000ff 000091c6
845 03:03:02.324906 T T
846 03:03:02.325551 Retry count exceeded; starting again
848 03:03:02.327348 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
851 03:03:02.329490 end: 2.4 uboot-commands (duration 00:01:20) [common]
853 03:03:02.331203 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
855 03:03:02.332393 end: 2 uboot-action (duration 00:01:20) [common]
857 03:03:02.334081 Cleaning after the job
858 03:03:02.334677 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/ramdisk
859 03:03:02.336086 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/kernel
860 03:03:02.366211 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/dtb
861 03:03:02.367561 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/nfsrootfs
862 03:03:02.442475 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977952/tftp-deploy-xz4zjrxq/modules
863 03:03:02.464658 start: 4.1 power-off (timeout 00:00:30) [common]
864 03:03:02.465342 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
865 03:03:02.499606 >> OK - accepted request
866 03:03:02.501747 Returned 0 in 0 seconds
867 03:03:02.602542 end: 4.1 power-off (duration 00:00:00) [common]
869 03:03:02.603486 start: 4.2 read-feedback (timeout 00:10:00) [common]
870 03:03:02.604164 Listened to connection for namespace 'common' for up to 1s
871 03:03:03.605075 Finalising connection for namespace 'common'
872 03:03:03.605571 Disconnecting from shell: Finalise
873 03:03:03.605861 =>
874 03:03:03.706709 end: 4.2 read-feedback (duration 00:00:01) [common]
875 03:03:03.707475 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/977952
876 03:03:07.204569 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/977952
877 03:03:07.205174 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.