Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:03:44.587625 lava-dispatcher, installed at version: 2024.01
2 03:03:44.588452 start: 0 validate
3 03:03:44.588933 Start time: 2024-11-12 03:03:44.588901+00:00 (UTC)
4 03:03:44.589502 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:03:44.590042 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:03:44.632689 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:03:44.633416 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc7-95-g96203094619a7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:03:44.672093 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:03:44.672716 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc7-95-g96203094619a7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 03:03:44.702981 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:03:44.703459 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:03:44.732184 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:03:44.732659 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc7-95-g96203094619a7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:03:44.778333 validate duration: 0.19
16 03:03:44.779849 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:03:44.780610 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:03:44.781033 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:03:44.781711 Not decompressing ramdisk as can be used compressed.
20 03:03:44.782214 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 03:03:44.782512 saving as /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/ramdisk/initrd.cpio.gz
22 03:03:44.782936 total size: 5628169 (5 MB)
23 03:03:44.828167 progress 0 % (0 MB)
24 03:03:44.836351 progress 5 % (0 MB)
25 03:03:44.846288 progress 10 % (0 MB)
26 03:03:44.852955 progress 15 % (0 MB)
27 03:03:44.857236 progress 20 % (1 MB)
28 03:03:44.861184 progress 25 % (1 MB)
29 03:03:44.865589 progress 30 % (1 MB)
30 03:03:44.869926 progress 35 % (1 MB)
31 03:03:44.873896 progress 40 % (2 MB)
32 03:03:44.878385 progress 45 % (2 MB)
33 03:03:44.882322 progress 50 % (2 MB)
34 03:03:44.886718 progress 55 % (2 MB)
35 03:03:44.891098 progress 60 % (3 MB)
36 03:03:44.895009 progress 65 % (3 MB)
37 03:03:44.899306 progress 70 % (3 MB)
38 03:03:44.903245 progress 75 % (4 MB)
39 03:03:44.907511 progress 80 % (4 MB)
40 03:03:44.911394 progress 85 % (4 MB)
41 03:03:44.915389 progress 90 % (4 MB)
42 03:03:44.919172 progress 95 % (5 MB)
43 03:03:44.922940 progress 100 % (5 MB)
44 03:03:44.923722 5 MB downloaded in 0.14 s (38.13 MB/s)
45 03:03:44.924361 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:03:44.925449 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:03:44.925832 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:03:44.926206 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:03:44.927764 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/kernel/Image
51 03:03:44.928183 saving as /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/kernel/Image
52 03:03:44.928421 total size: 45715968 (43 MB)
53 03:03:44.928660 No compression specified
54 03:03:44.970787 progress 0 % (0 MB)
55 03:03:44.999482 progress 5 % (2 MB)
56 03:03:45.029127 progress 10 % (4 MB)
57 03:03:45.057959 progress 15 % (6 MB)
58 03:03:45.086717 progress 20 % (8 MB)
59 03:03:45.115317 progress 25 % (10 MB)
60 03:03:45.145168 progress 30 % (13 MB)
61 03:03:45.174350 progress 35 % (15 MB)
62 03:03:45.206210 progress 40 % (17 MB)
63 03:03:45.234602 progress 45 % (19 MB)
64 03:03:45.263089 progress 50 % (21 MB)
65 03:03:45.291410 progress 55 % (24 MB)
66 03:03:45.320086 progress 60 % (26 MB)
67 03:03:45.351282 progress 65 % (28 MB)
68 03:03:45.382448 progress 70 % (30 MB)
69 03:03:45.411296 progress 75 % (32 MB)
70 03:03:45.440289 progress 80 % (34 MB)
71 03:03:45.468365 progress 85 % (37 MB)
72 03:03:45.496989 progress 90 % (39 MB)
73 03:03:45.525151 progress 95 % (41 MB)
74 03:03:45.552346 progress 100 % (43 MB)
75 03:03:45.552928 43 MB downloaded in 0.62 s (69.81 MB/s)
76 03:03:45.553408 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:03:45.554243 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:03:45.554520 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:03:45.554800 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:03:45.555420 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 03:03:45.555719 saving as /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 03:03:45.555932 total size: 53209 (0 MB)
84 03:03:45.556177 No compression specified
85 03:03:45.599772 progress 61 % (0 MB)
86 03:03:45.600673 progress 100 % (0 MB)
87 03:03:45.601218 0 MB downloaded in 0.05 s (1.12 MB/s)
88 03:03:45.601723 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:03:45.602555 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:03:45.602826 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:03:45.603092 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:03:45.603563 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 03:03:45.603810 saving as /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/nfsrootfs/full.rootfs.tar
95 03:03:45.604042 total size: 120894716 (115 MB)
96 03:03:45.604258 Using unxz to decompress xz
97 03:03:45.637147 progress 0 % (0 MB)
98 03:03:46.431950 progress 5 % (5 MB)
99 03:03:47.276886 progress 10 % (11 MB)
100 03:03:48.069361 progress 15 % (17 MB)
101 03:03:48.803263 progress 20 % (23 MB)
102 03:03:49.394136 progress 25 % (28 MB)
103 03:03:50.216702 progress 30 % (34 MB)
104 03:03:51.010412 progress 35 % (40 MB)
105 03:03:51.353549 progress 40 % (46 MB)
106 03:03:51.723599 progress 45 % (51 MB)
107 03:03:52.450564 progress 50 % (57 MB)
108 03:03:53.331303 progress 55 % (63 MB)
109 03:03:54.109798 progress 60 % (69 MB)
110 03:03:54.862638 progress 65 % (74 MB)
111 03:03:55.710334 progress 70 % (80 MB)
112 03:03:56.534925 progress 75 % (86 MB)
113 03:03:57.326757 progress 80 % (92 MB)
114 03:03:58.091217 progress 85 % (98 MB)
115 03:03:58.945247 progress 90 % (103 MB)
116 03:03:59.735669 progress 95 % (109 MB)
117 03:04:00.583039 progress 100 % (115 MB)
118 03:04:00.595531 115 MB downloaded in 14.99 s (7.69 MB/s)
119 03:04:00.596515 end: 1.4.1 http-download (duration 00:00:15) [common]
121 03:04:00.598272 end: 1.4 download-retry (duration 00:00:15) [common]
122 03:04:00.598841 start: 1.5 download-retry (timeout 00:09:44) [common]
123 03:04:00.599406 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 03:04:00.600314 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/modules.tar.xz
125 03:04:00.600839 saving as /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/modules/modules.tar
126 03:04:00.601287 total size: 11615448 (11 MB)
127 03:04:00.601743 Using unxz to decompress xz
128 03:04:00.643552 progress 0 % (0 MB)
129 03:04:00.710009 progress 5 % (0 MB)
130 03:04:00.783754 progress 10 % (1 MB)
131 03:04:00.879440 progress 15 % (1 MB)
132 03:04:00.971689 progress 20 % (2 MB)
133 03:04:01.052448 progress 25 % (2 MB)
134 03:04:01.128225 progress 30 % (3 MB)
135 03:04:01.207087 progress 35 % (3 MB)
136 03:04:01.279849 progress 40 % (4 MB)
137 03:04:01.357010 progress 45 % (5 MB)
138 03:04:01.443229 progress 50 % (5 MB)
139 03:04:01.521098 progress 55 % (6 MB)
140 03:04:01.606308 progress 60 % (6 MB)
141 03:04:01.687061 progress 65 % (7 MB)
142 03:04:01.767894 progress 70 % (7 MB)
143 03:04:01.845732 progress 75 % (8 MB)
144 03:04:01.929421 progress 80 % (8 MB)
145 03:04:02.010813 progress 85 % (9 MB)
146 03:04:02.095201 progress 90 % (10 MB)
147 03:04:02.169849 progress 95 % (10 MB)
148 03:04:02.247093 progress 100 % (11 MB)
149 03:04:02.259301 11 MB downloaded in 1.66 s (6.68 MB/s)
150 03:04:02.259924 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:04:02.261783 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:04:02.262364 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 03:04:02.262932 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 03:04:19.422546 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/977972/extract-nfsrootfs-xz6oe443
156 03:04:19.423101 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 03:04:19.423390 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 03:04:19.424038 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042
159 03:04:19.424542 makedir: /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin
160 03:04:19.424883 makedir: /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/tests
161 03:04:19.425196 makedir: /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/results
162 03:04:19.425527 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-add-keys
163 03:04:19.426051 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-add-sources
164 03:04:19.426548 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-background-process-start
165 03:04:19.427035 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-background-process-stop
166 03:04:19.427546 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-common-functions
167 03:04:19.428174 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-echo-ipv4
168 03:04:19.428708 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-install-packages
169 03:04:19.429186 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-installed-packages
170 03:04:19.429650 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-os-build
171 03:04:19.430119 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-probe-channel
172 03:04:19.430616 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-probe-ip
173 03:04:19.431148 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-target-ip
174 03:04:19.431626 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-target-mac
175 03:04:19.432124 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-target-storage
176 03:04:19.432619 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-test-case
177 03:04:19.433093 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-test-event
178 03:04:19.433554 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-test-feedback
179 03:04:19.434020 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-test-raise
180 03:04:19.434502 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-test-reference
181 03:04:19.435023 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-test-runner
182 03:04:19.435516 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-test-set
183 03:04:19.436025 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-test-shell
184 03:04:19.436527 Updating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-add-keys (debian)
185 03:04:19.437067 Updating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-add-sources (debian)
186 03:04:19.437568 Updating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-install-packages (debian)
187 03:04:19.438059 Updating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-installed-packages (debian)
188 03:04:19.438539 Updating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/bin/lava-os-build (debian)
189 03:04:19.438961 Creating /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/environment
190 03:04:19.439320 LAVA metadata
191 03:04:19.439577 - LAVA_JOB_ID=977972
192 03:04:19.439788 - LAVA_DISPATCHER_IP=192.168.6.2
193 03:04:19.440160 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 03:04:19.441118 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 03:04:19.441423 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 03:04:19.441628 skipped lava-vland-overlay
197 03:04:19.441867 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 03:04:19.442117 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 03:04:19.442336 skipped lava-multinode-overlay
200 03:04:19.442577 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 03:04:19.442826 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 03:04:19.443069 Loading test definitions
203 03:04:19.443340 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 03:04:19.443557 Using /lava-977972 at stage 0
205 03:04:19.444680 uuid=977972_1.6.2.4.1 testdef=None
206 03:04:19.444981 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 03:04:19.445241 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 03:04:19.446822 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 03:04:19.447611 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 03:04:19.449539 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 03:04:19.450356 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 03:04:19.452178 runner path: /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/0/tests/0_timesync-off test_uuid 977972_1.6.2.4.1
215 03:04:19.452753 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 03:04:19.453568 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 03:04:19.453790 Using /lava-977972 at stage 0
219 03:04:19.454135 Fetching tests from https://github.com/kernelci/test-definitions.git
220 03:04:19.454428 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/0/tests/1_kselftest-dt'
221 03:04:22.874346 Running '/usr/bin/git checkout kernelci.org
222 03:04:23.323145 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 03:04:23.325128 uuid=977972_1.6.2.4.5 testdef=None
224 03:04:23.325742 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 03:04:23.327186 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 03:04:23.332674 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 03:04:23.334260 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 03:04:23.341563 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 03:04:23.343279 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 03:04:23.350355 runner path: /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/0/tests/1_kselftest-dt test_uuid 977972_1.6.2.4.5
234 03:04:23.350901 BOARD='meson-sm1-s905d3-libretech-cc'
235 03:04:23.351307 BRANCH='next'
236 03:04:23.351697 SKIPFILE='/dev/null'
237 03:04:23.352127 SKIP_INSTALL='True'
238 03:04:23.352524 TESTPROG_URL='http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 03:04:23.352923 TST_CASENAME=''
240 03:04:23.353315 TST_CMDFILES='dt'
241 03:04:23.354357 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 03:04:23.355897 Creating lava-test-runner.conf files
244 03:04:23.356338 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/977972/lava-overlay-cnygg042/lava-977972/0 for stage 0
245 03:04:23.357020 - 0_timesync-off
246 03:04:23.357477 - 1_kselftest-dt
247 03:04:23.358100 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 03:04:23.358636 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 03:04:46.699351 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 03:04:46.699816 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 03:04:46.700138 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 03:04:46.700453 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 03:04:46.700750 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 03:04:47.450571 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 03:04:47.451076 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 03:04:47.451363 extracting modules file /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977972/extract-nfsrootfs-xz6oe443
257 03:04:48.889490 extracting modules file /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977972/extract-overlay-ramdisk-dnnwu2z5/ramdisk
258 03:04:50.344343 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 03:04:50.344843 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 03:04:50.345137 [common] Applying overlay to NFS
261 03:04:50.345367 [common] Applying overlay /var/lib/lava/dispatcher/tmp/977972/compress-overlay-v1fq5c3a/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/977972/extract-nfsrootfs-xz6oe443
262 03:04:53.197275 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 03:04:53.197779 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 03:04:53.198101 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 03:04:53.198373 Converting downloaded kernel to a uImage
266 03:04:53.198720 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/kernel/Image /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/kernel/uImage
267 03:04:53.663003 output: Image Name:
268 03:04:53.663434 output: Created: Tue Nov 12 03:04:53 2024
269 03:04:53.663645 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 03:04:53.663850 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
271 03:04:53.664089 output: Load Address: 01080000
272 03:04:53.664293 output: Entry Point: 01080000
273 03:04:53.664493 output:
274 03:04:53.664829 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 03:04:53.665100 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 03:04:53.665371 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 03:04:53.665630 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 03:04:53.665890 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 03:04:53.666147 Building ramdisk /var/lib/lava/dispatcher/tmp/977972/extract-overlay-ramdisk-dnnwu2z5/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/977972/extract-overlay-ramdisk-dnnwu2z5/ramdisk
280 03:04:56.181454 >> 166832 blocks
281 03:05:03.943081 Adding RAMdisk u-boot header.
282 03:05:03.943805 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/977972/extract-overlay-ramdisk-dnnwu2z5/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/977972/extract-overlay-ramdisk-dnnwu2z5/ramdisk.cpio.gz.uboot
283 03:05:04.182073 output: Image Name:
284 03:05:04.182503 output: Created: Tue Nov 12 03:05:03 2024
285 03:05:04.182716 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 03:05:04.182918 output: Data Size: 23435659 Bytes = 22886.39 KiB = 22.35 MiB
287 03:05:04.183118 output: Load Address: 00000000
288 03:05:04.183318 output: Entry Point: 00000000
289 03:05:04.183517 output:
290 03:05:04.184385 rename /var/lib/lava/dispatcher/tmp/977972/extract-overlay-ramdisk-dnnwu2z5/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/ramdisk/ramdisk.cpio.gz.uboot
291 03:05:04.185123 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
292 03:05:04.185665 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 03:05:04.186186 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 03:05:04.186637 No LXC device requested
295 03:05:04.187131 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 03:05:04.187634 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 03:05:04.188163 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 03:05:04.188578 Checking files for TFTP limit of 4294967296 bytes.
299 03:05:04.191214 end: 1 tftp-deploy (duration 00:01:19) [common]
300 03:05:04.191786 start: 2 uboot-action (timeout 00:05:00) [common]
301 03:05:04.192341 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 03:05:04.192832 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 03:05:04.193329 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 03:05:04.193868 Using kernel file from prepare-kernel: 977972/tftp-deploy-msbwhkku/kernel/uImage
305 03:05:04.194491 substitutions:
306 03:05:04.194967 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 03:05:04.195386 - {DTB_ADDR}: 0x01070000
308 03:05:04.195789 - {DTB}: 977972/tftp-deploy-msbwhkku/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 03:05:04.196222 - {INITRD}: 977972/tftp-deploy-msbwhkku/ramdisk/ramdisk.cpio.gz.uboot
310 03:05:04.196622 - {KERNEL_ADDR}: 0x01080000
311 03:05:04.197015 - {KERNEL}: 977972/tftp-deploy-msbwhkku/kernel/uImage
312 03:05:04.197422 - {LAVA_MAC}: None
313 03:05:04.197948 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/977972/extract-nfsrootfs-xz6oe443
314 03:05:04.198356 - {NFS_SERVER_IP}: 192.168.6.2
315 03:05:04.198746 - {PRESEED_CONFIG}: None
316 03:05:04.199137 - {PRESEED_LOCAL}: None
317 03:05:04.199529 - {RAMDISK_ADDR}: 0x08000000
318 03:05:04.199914 - {RAMDISK}: 977972/tftp-deploy-msbwhkku/ramdisk/ramdisk.cpio.gz.uboot
319 03:05:04.200357 - {ROOT_PART}: None
320 03:05:04.200750 - {ROOT}: None
321 03:05:04.201137 - {SERVER_IP}: 192.168.6.2
322 03:05:04.201524 - {TEE_ADDR}: 0x83000000
323 03:05:04.201907 - {TEE}: None
324 03:05:04.202291 Parsed boot commands:
325 03:05:04.202667 - setenv autoload no
326 03:05:04.203051 - setenv initrd_high 0xffffffff
327 03:05:04.203432 - setenv fdt_high 0xffffffff
328 03:05:04.203815 - dhcp
329 03:05:04.204226 - setenv serverip 192.168.6.2
330 03:05:04.204616 - tftpboot 0x01080000 977972/tftp-deploy-msbwhkku/kernel/uImage
331 03:05:04.205007 - tftpboot 0x08000000 977972/tftp-deploy-msbwhkku/ramdisk/ramdisk.cpio.gz.uboot
332 03:05:04.205396 - tftpboot 0x01070000 977972/tftp-deploy-msbwhkku/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 03:05:04.205783 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/977972/extract-nfsrootfs-xz6oe443,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 03:05:04.206181 - bootm 0x01080000 0x08000000 0x01070000
335 03:05:04.206681 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 03:05:04.208182 start: 2.3 connect-device (timeout 00:05:00) [common]
338 03:05:04.208602 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 03:05:04.223355 Setting prompt string to ['lava-test: # ']
340 03:05:04.224903 end: 2.3 connect-device (duration 00:00:00) [common]
341 03:05:04.225504 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 03:05:04.226056 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 03:05:04.226574 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 03:05:04.227692 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 03:05:04.265094 >> OK - accepted request
346 03:05:04.266971 Returned 0 in 0 seconds
347 03:05:04.368175 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 03:05:04.369865 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 03:05:04.370426 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 03:05:04.370931 Setting prompt string to ['Hit any key to stop autoboot']
352 03:05:04.371377 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 03:05:04.372969 Trying 192.168.56.21...
354 03:05:04.373452 Connected to conserv1.
355 03:05:04.373856 Escape character is '^]'.
356 03:05:04.374272
357 03:05:04.374681 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 03:05:04.375107
359 03:05:11.858329 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 03:05:11.858814 bl2_stage_init 0x01
361 03:05:11.859097 bl2_stage_init 0x81
362 03:05:11.863822 hw id: 0x0000 - pwm id 0x01
363 03:05:11.864371 bl2_stage_init 0xc1
364 03:05:11.869421 bl2_stage_init 0x02
365 03:05:11.869871
366 03:05:11.870240 L0:00000000
367 03:05:11.870493 L1:00000703
368 03:05:11.870743 L2:00008067
369 03:05:11.870995 L3:15000000
370 03:05:11.875422 S1:00000000
371 03:05:11.875953 B2:20282000
372 03:05:11.876436 B1:a0f83180
373 03:05:11.876721
374 03:05:11.877118 TE: 68997
375 03:05:11.877353
376 03:05:11.880856 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 03:05:11.881257
378 03:05:11.886662 Board ID = 1
379 03:05:11.887107 Set cpu clk to 24M
380 03:05:11.887404 Set clk81 to 24M
381 03:05:11.892268 Use GP1_pll as DSU clk.
382 03:05:11.892685 DSU clk: 1200 Mhz
383 03:05:11.892923 CPU clk: 1200 MHz
384 03:05:11.897766 Set clk81 to 166.6M
385 03:05:11.903437 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 03:05:11.903854 board id: 1
387 03:05:11.910287 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 03:05:11.920885 fw parse done
389 03:05:11.926897 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 03:05:11.969352 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 03:05:11.980251 PIEI prepare done
392 03:05:11.980509 fastboot data load
393 03:05:11.980714 fastboot data verify
394 03:05:11.985864 verify result: 266
395 03:05:11.991410 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 03:05:11.991865 LPDDR4 probe
397 03:05:11.992304 ddr clk to 1584MHz
398 03:05:11.999383 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 03:05:12.319248
400 03:05:12.319896 dmc_version 0001
401 03:05:12.320427 Check phy result
402 03:05:12.320872 INFO : End of CA training
403 03:05:12.321298 INFO : End of initialization
404 03:05:12.321700 INFO : Training has run successfully!
405 03:05:12.322097 Check phy result
406 03:05:12.322491 INFO : End of initialization
407 03:05:12.322881 INFO : End of read enable training
408 03:05:12.323269 INFO : End of fine write leveling
409 03:05:12.323659 INFO : End of Write leveling coarse delay
410 03:05:12.324114 INFO : Training has run successfully!
411 03:05:12.324533 Check phy result
412 03:05:12.324846 INFO : End of initialization
413 03:05:12.325373 INFO : End of read dq deskew training
414 03:05:12.325654 INFO : End of MPR read delay center optimization
415 03:05:12.325888 INFO : End of write delay center optimization
416 03:05:12.326112 INFO : End of read delay center optimization
417 03:05:12.326340 INFO : End of max read latency training
418 03:05:12.326570 INFO : Training has run successfully!
419 03:05:12.326792 1D training succeed
420 03:05:12.327009 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 03:05:12.327230 Check phy result
422 03:05:12.327450 INFO : End of initialization
423 03:05:12.327665 INFO : End of 2D read delay Voltage center optimization
424 03:05:12.327881 INFO : End of 2D read delay Voltage center optimization
425 03:05:12.328141 INFO : End of 2D write delay Voltage center optimization
426 03:05:12.328370 INFO : End of 2D write delay Voltage center optimization
427 03:05:12.328592 INFO : Training has run successfully!
428 03:05:12.328813
429 03:05:12.329031 channel==0
430 03:05:12.329254 RxClkDly_Margin_A0==78 ps 8
431 03:05:12.329470 TxDqDly_Margin_A0==98 ps 10
432 03:05:12.329694 RxClkDly_Margin_A1==88 ps 9
433 03:05:12.329907 TxDqDly_Margin_A1==88 ps 9
434 03:05:12.330123 TrainedVREFDQ_A0==77
435 03:05:12.330346 TrainedVREFDQ_A1==74
436 03:05:12.330559 VrefDac_Margin_A0==24
437 03:05:12.330848 DeviceVref_Margin_A0==37
438 03:05:12.331081 VrefDac_Margin_A1==23
439 03:05:12.331309 DeviceVref_Margin_A1==40
440 03:05:12.331531
441 03:05:12.331763
442 03:05:12.332062 channel==1
443 03:05:12.332307 RxClkDly_Margin_A0==78 ps 8
444 03:05:12.337613 TxDqDly_Margin_A0==98 ps 10
445 03:05:12.337966 RxClkDly_Margin_A1==88 ps 9
446 03:05:12.338212 TxDqDly_Margin_A1==88 ps 9
447 03:05:12.341101 TrainedVREFDQ_A0==78
448 03:05:12.341424 TrainedVREFDQ_A1==75
449 03:05:12.346748 VrefDac_Margin_A0==22
450 03:05:12.347112 DeviceVref_Margin_A0==36
451 03:05:12.352309 VrefDac_Margin_A1==22
452 03:05:12.352664 DeviceVref_Margin_A1==39
453 03:05:12.352911
454 03:05:12.357829 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 03:05:12.358162
456 03:05:12.385727 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000016 dram_vref_reg_value 0x 00000061
457 03:05:12.391433 2D training succeed
458 03:05:12.397014 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 03:05:12.397346 auto size-- 65535DDR cs0 size: 2048MB
460 03:05:12.402420 DDR cs1 size: 2048MB
461 03:05:12.402707 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 03:05:12.408089 cs0 DataBus test pass
463 03:05:12.408394 cs1 DataBus test pass
464 03:05:12.408600 cs0 AddrBus test pass
465 03:05:12.413589 cs1 AddrBus test pass
466 03:05:12.413872
467 03:05:12.414078 100bdlr_step_size ps== 478
468 03:05:12.419286 result report
469 03:05:12.419780 boot times 0Enable ddr reg access
470 03:05:12.427376 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 03:05:12.441290 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 03:05:13.096105 bl2z: ptr: 05129330, size: 00001e40
473 03:05:13.103547 0.0;M3 CHK:0;cm4_sp_mode 0
474 03:05:13.104030 MVN_1=0x00000000
475 03:05:13.104347 MVN_2=0x00000000
476 03:05:13.114975 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 03:05:13.115436 OPS=0x04
478 03:05:13.115779 ring efuse init
479 03:05:13.120588 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 03:05:13.121020 [0.017319 Inits done]
481 03:05:13.121356 secure task start!
482 03:05:13.128393 high task start!
483 03:05:13.128839 low task start!
484 03:05:13.129181 run into bl31
485 03:05:13.136936 NOTICE: BL31: v1.3(release):4fc40b1
486 03:05:13.144756 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 03:05:13.145225 NOTICE: BL31: G12A normal boot!
488 03:05:13.160354 NOTICE: BL31: BL33 decompress pass
489 03:05:13.166032 ERROR: Error initializing runtime service opteed_fast
490 03:05:15.907872 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 03:05:15.908476 bl2_stage_init 0x01
492 03:05:15.908784 bl2_stage_init 0x81
493 03:05:15.913395 hw id: 0x0000 - pwm id 0x01
494 03:05:15.913785 bl2_stage_init 0xc1
495 03:05:15.918960 bl2_stage_init 0x02
496 03:05:15.919321
497 03:05:15.919616 L0:00000000
498 03:05:15.919899 L1:00000703
499 03:05:15.920216 L2:00008067
500 03:05:15.920500 L3:15000000
501 03:05:15.924679 S1:00000000
502 03:05:15.925129 B2:20282000
503 03:05:15.925431 B1:a0f83180
504 03:05:15.925718
505 03:05:15.926011 TE: 68686
506 03:05:15.926297
507 03:05:15.930219 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 03:05:15.930680
509 03:05:15.935816 Board ID = 1
510 03:05:15.936339 Set cpu clk to 24M
511 03:05:15.936650 Set clk81 to 24M
512 03:05:15.941555 Use GP1_pll as DSU clk.
513 03:05:15.942041 DSU clk: 1200 Mhz
514 03:05:15.942350 CPU clk: 1200 MHz
515 03:05:15.947007 Set clk81 to 166.6M
516 03:05:15.952725 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 03:05:15.953223 board id: 1
518 03:05:15.959912 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 03:05:15.970456 fw parse done
520 03:05:15.976326 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 03:05:16.019085 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 03:05:16.030076 PIEI prepare done
523 03:05:16.030502 fastboot data load
524 03:05:16.030803 fastboot data verify
525 03:05:16.035529 verify result: 266
526 03:05:16.041076 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 03:05:16.041429 LPDDR4 probe
528 03:05:16.041714 ddr clk to 1584MHz
529 03:05:16.049094 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 03:05:16.086383
531 03:05:16.086851 dmc_version 0001
532 03:05:16.093024 Check phy result
533 03:05:16.098910 INFO : End of CA training
534 03:05:16.099264 INFO : End of initialization
535 03:05:16.104528 INFO : Training has run successfully!
536 03:05:16.104886 Check phy result
537 03:05:16.110151 INFO : End of initialization
538 03:05:16.110571 INFO : End of read enable training
539 03:05:16.115770 INFO : End of fine write leveling
540 03:05:16.121345 INFO : End of Write leveling coarse delay
541 03:05:16.121772 INFO : Training has run successfully!
542 03:05:16.122070 Check phy result
543 03:05:16.126958 INFO : End of initialization
544 03:05:16.127382 INFO : End of read dq deskew training
545 03:05:16.132580 INFO : End of MPR read delay center optimization
546 03:05:16.138180 INFO : End of write delay center optimization
547 03:05:16.143794 INFO : End of read delay center optimization
548 03:05:16.144465 INFO : End of max read latency training
549 03:05:16.149378 INFO : Training has run successfully!
550 03:05:16.149850 1D training succeed
551 03:05:16.158568 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 03:05:16.206141 Check phy result
553 03:05:16.206645 INFO : End of initialization
554 03:05:16.228498 INFO : End of 2D read delay Voltage center optimization
555 03:05:16.247841 INFO : End of 2D read delay Voltage center optimization
556 03:05:16.299661 INFO : End of 2D write delay Voltage center optimization
557 03:05:16.348896 INFO : End of 2D write delay Voltage center optimization
558 03:05:16.354453 INFO : Training has run successfully!
559 03:05:16.355318
560 03:05:16.355840 channel==0
561 03:05:16.359964 RxClkDly_Margin_A0==78 ps 8
562 03:05:16.360476 TxDqDly_Margin_A0==98 ps 10
563 03:05:16.365538 RxClkDly_Margin_A1==88 ps 9
564 03:05:16.366078 TxDqDly_Margin_A1==98 ps 10
565 03:05:16.366518 TrainedVREFDQ_A0==74
566 03:05:16.371089 TrainedVREFDQ_A1==75
567 03:05:16.371616 VrefDac_Margin_A0==25
568 03:05:16.372107 DeviceVref_Margin_A0==40
569 03:05:16.376769 VrefDac_Margin_A1==23
570 03:05:16.377321 DeviceVref_Margin_A1==39
571 03:05:16.377755
572 03:05:16.378171
573 03:05:16.382334 channel==1
574 03:05:16.382823 RxClkDly_Margin_A0==78 ps 8
575 03:05:16.383240 TxDqDly_Margin_A0==88 ps 9
576 03:05:16.387931 RxClkDly_Margin_A1==88 ps 9
577 03:05:16.388478 TxDqDly_Margin_A1==88 ps 9
578 03:05:16.393415 TrainedVREFDQ_A0==75
579 03:05:16.393933 TrainedVREFDQ_A1==77
580 03:05:16.394358 VrefDac_Margin_A0==22
581 03:05:16.398997 DeviceVref_Margin_A0==39
582 03:05:16.399504 VrefDac_Margin_A1==22
583 03:05:16.404697 DeviceVref_Margin_A1==37
584 03:05:16.405244
585 03:05:16.405694 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 03:05:16.406094
587 03:05:16.438252 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
588 03:05:16.438757 2D training succeed
589 03:05:16.443905 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 03:05:16.449484 auto size-- 65535DDR cs0 size: 2048MB
591 03:05:16.449930 DDR cs1 size: 2048MB
592 03:05:16.455111 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 03:05:16.455625 cs0 DataBus test pass
594 03:05:16.460753 cs1 DataBus test pass
595 03:05:16.461198 cs0 AddrBus test pass
596 03:05:16.461595 cs1 AddrBus test pass
597 03:05:16.461984
598 03:05:16.466228 100bdlr_step_size ps== 478
599 03:05:16.466667 result report
600 03:05:16.471858 boot times 0Enable ddr reg access
601 03:05:16.477167 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 03:05:16.490955 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 03:05:17.145539 bl2z: ptr: 05129330, size: 00001e40
604 03:05:17.152390 0.0;M3 CHK:0;cm4_sp_mode 0
605 03:05:17.152871 MVN_1=0x00000000
606 03:05:17.153279 MVN_2=0x00000000
607 03:05:17.163966 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 03:05:17.164541 OPS=0x04
609 03:05:17.164952 ring efuse init
610 03:05:17.166884 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 03:05:17.172793 [0.017310 Inits done]
612 03:05:17.173242 secure task start!
613 03:05:17.173641 high task start!
614 03:05:17.174036 low task start!
615 03:05:17.177000 run into bl31
616 03:05:17.185644 NOTICE: BL31: v1.3(release):4fc40b1
617 03:05:17.193432 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 03:05:17.193875 NOTICE: BL31: G12A normal boot!
619 03:05:17.208970 NOTICE: BL31: BL33 decompress pass
620 03:05:17.214674 ERROR: Error initializing runtime service opteed_fast
621 03:05:18.610198 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 03:05:18.610890 bl2_stage_init 0x01
623 03:05:18.611369 bl2_stage_init 0x81
624 03:05:18.615544 hw id: 0x0000 - pwm id 0x01
625 03:05:18.616133 bl2_stage_init 0xc1
626 03:05:18.619380 bl2_stage_init 0x02
627 03:05:18.619947
628 03:05:18.620479 L0:00000000
629 03:05:18.620940 L1:00000703
630 03:05:18.624878 L2:00008067
631 03:05:18.625432 L3:15000000
632 03:05:18.625899 S1:00000000
633 03:05:18.626356 B2:20282000
634 03:05:18.626806 B1:a0f83180
635 03:05:18.627257
636 03:05:18.630580 TE: 69371
637 03:05:18.631099
638 03:05:18.636240 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 03:05:18.636731
640 03:05:18.637133 Board ID = 1
641 03:05:18.637526 Set cpu clk to 24M
642 03:05:18.641699 Set clk81 to 24M
643 03:05:18.642186 Use GP1_pll as DSU clk.
644 03:05:18.642587 DSU clk: 1200 Mhz
645 03:05:18.647303 CPU clk: 1200 MHz
646 03:05:18.647875 Set clk81 to 166.6M
647 03:05:18.653178 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 03:05:18.653668 board id: 1
649 03:05:18.661161 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 03:05:18.672668 fw parse done
651 03:05:18.678501 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 03:05:18.721205 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 03:05:18.732227 PIEI prepare done
654 03:05:18.732740 fastboot data load
655 03:05:18.733168 fastboot data verify
656 03:05:18.737809 verify result: 266
657 03:05:18.743341 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 03:05:18.743836 LPDDR4 probe
659 03:05:18.744294 ddr clk to 1584MHz
660 03:05:18.751288 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 03:05:18.787640
662 03:05:18.788205 dmc_version 0001
663 03:05:18.794430 Check phy result
664 03:05:18.801206 INFO : End of CA training
665 03:05:18.801749 INFO : End of initialization
666 03:05:18.806840 INFO : Training has run successfully!
667 03:05:18.807367 Check phy result
668 03:05:18.812299 INFO : End of initialization
669 03:05:18.812829 INFO : End of read enable training
670 03:05:18.817975 INFO : End of fine write leveling
671 03:05:18.823563 INFO : End of Write leveling coarse delay
672 03:05:18.824095 INFO : Training has run successfully!
673 03:05:18.824522 Check phy result
674 03:05:18.829182 INFO : End of initialization
675 03:05:18.829690 INFO : End of read dq deskew training
676 03:05:18.834768 INFO : End of MPR read delay center optimization
677 03:05:18.840385 INFO : End of write delay center optimization
678 03:05:18.845994 INFO : End of read delay center optimization
679 03:05:18.846512 INFO : End of max read latency training
680 03:05:18.851600 INFO : Training has run successfully!
681 03:05:18.852144 1D training succeed
682 03:05:18.860061 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 03:05:18.908430 Check phy result
684 03:05:18.909041 INFO : End of initialization
685 03:05:18.930410 INFO : End of 2D read delay Voltage center optimization
686 03:05:18.949959 INFO : End of 2D read delay Voltage center optimization
687 03:05:19.001342 INFO : End of 2D write delay Voltage center optimization
688 03:05:19.050888 INFO : End of 2D write delay Voltage center optimization
689 03:05:19.056485 INFO : Training has run successfully!
690 03:05:19.056876
691 03:05:19.057094 channel==0
692 03:05:19.062765 RxClkDly_Margin_A0==78 ps 8
693 03:05:19.063277 TxDqDly_Margin_A0==98 ps 10
694 03:05:19.067631 RxClkDly_Margin_A1==88 ps 9
695 03:05:19.068090 TxDqDly_Margin_A1==98 ps 10
696 03:05:19.068434 TrainedVREFDQ_A0==74
697 03:05:19.073234 TrainedVREFDQ_A1==74
698 03:05:19.073673 VrefDac_Margin_A0==24
699 03:05:19.074001 DeviceVref_Margin_A0==40
700 03:05:19.078951 VrefDac_Margin_A1==23
701 03:05:19.079422 DeviceVref_Margin_A1==40
702 03:05:19.079756
703 03:05:19.080115
704 03:05:19.084411 channel==1
705 03:05:19.084846 RxClkDly_Margin_A0==78 ps 8
706 03:05:19.085162 TxDqDly_Margin_A0==98 ps 10
707 03:05:19.090110 RxClkDly_Margin_A1==78 ps 8
708 03:05:19.090537 TxDqDly_Margin_A1==88 ps 9
709 03:05:19.095694 TrainedVREFDQ_A0==78
710 03:05:19.096178 TrainedVREFDQ_A1==75
711 03:05:19.096512 VrefDac_Margin_A0==22
712 03:05:19.101223 DeviceVref_Margin_A0==36
713 03:05:19.101646 VrefDac_Margin_A1==22
714 03:05:19.106818 DeviceVref_Margin_A1==39
715 03:05:19.107245
716 03:05:19.107576 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 03:05:19.107893
718 03:05:19.140534 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 03:05:19.141069 2D training succeed
720 03:05:19.146148 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 03:05:19.151633 auto size-- 65535DDR cs0 size: 2048MB
722 03:05:19.152053 DDR cs1 size: 2048MB
723 03:05:19.157278 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 03:05:19.157609 cs0 DataBus test pass
725 03:05:19.162855 cs1 DataBus test pass
726 03:05:19.163186 cs0 AddrBus test pass
727 03:05:19.163403 cs1 AddrBus test pass
728 03:05:19.163611
729 03:05:19.168450 100bdlr_step_size ps== 478
730 03:05:19.168803 result report
731 03:05:19.174001 boot times 0Enable ddr reg access
732 03:05:19.179234 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 03:05:19.193251 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 03:05:19.848064 bl2z: ptr: 05129330, size: 00001e40
735 03:05:19.855543 0.0;M3 CHK:0;cm4_sp_mode 0
736 03:05:19.855871 MVN_1=0x00000000
737 03:05:19.856136 MVN_2=0x00000000
738 03:05:19.867039 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 03:05:19.867470 OPS=0x04
740 03:05:19.867730 ring efuse init
741 03:05:19.872680 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 03:05:19.872992 [0.017310 Inits done]
743 03:05:19.873222 secure task start!
744 03:05:19.880273 high task start!
745 03:05:19.880624 low task start!
746 03:05:19.880846 run into bl31
747 03:05:19.888862 NOTICE: BL31: v1.3(release):4fc40b1
748 03:05:19.896738 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 03:05:19.897140 NOTICE: BL31: G12A normal boot!
750 03:05:19.912258 NOTICE: BL31: BL33 decompress pass
751 03:05:19.917874 ERROR: Error initializing runtime service opteed_fast
752 03:05:20.713289
753 03:05:20.713965
754 03:05:20.718692 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 03:05:20.719210
756 03:05:20.721354 Model: Libre Computer AML-S905D3-CC Solitude
757 03:05:20.868329 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 03:05:20.884557 DRAM: 2 GiB (effective 3.8 GiB)
759 03:05:20.985455 Core: 406 devices, 33 uclasses, devicetree: separate
760 03:05:20.991374 WDT: Not starting watchdog@f0d0
761 03:05:21.016395 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 03:05:21.028750 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 03:05:21.033779 ** Bad device specification mmc 0 **
764 03:05:21.043771 Card did not respond to voltage select! : -110
765 03:05:21.051382 ** Bad device specification mmc 0 **
766 03:05:21.051748 Couldn't find partition mmc 0
767 03:05:21.059664 Card did not respond to voltage select! : -110
768 03:05:21.065289 ** Bad device specification mmc 0 **
769 03:05:21.065626 Couldn't find partition mmc 0
770 03:05:21.070224 Error: could not access storage.
771 03:05:21.365918 Net: eth0: ethernet@ff3f0000
772 03:05:21.366344 starting USB...
773 03:05:21.611340 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 03:05:21.611739 Starting the controller
775 03:05:21.618385 USB XHCI 1.10
776 03:05:23.172816 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 03:05:23.181196 scanning usb for storage devices... 0 Storage Device(s) found
779 03:05:23.232789 Hit any key to stop autoboot: 1
780 03:05:23.233756 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 03:05:23.234162 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 03:05:23.234462 Setting prompt string to ['=>']
783 03:05:23.234756 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 03:05:23.246821 0
785 03:05:23.247576 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 03:05:23.348519 => setenv autoload no
788 03:05:23.349312 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 03:05:23.353508 setenv autoload no
791 03:05:23.454626 => setenv initrd_high 0xffffffff
792 03:05:23.455342 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 03:05:23.458613 setenv initrd_high 0xffffffff
795 03:05:23.559750 => setenv fdt_high 0xffffffff
796 03:05:23.560483 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 03:05:23.564724 setenv fdt_high 0xffffffff
799 03:05:23.666269 => dhcp
800 03:05:23.666805 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 03:05:23.670183 dhcp
802 03:05:24.176387 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
803 03:05:24.177005 Speed: 1000, full duplex
804 03:05:24.177446 BOOTP broadcast 1
805 03:05:24.186030 DHCP client bound to address 192.168.6.21 (9 ms)
807 03:05:24.287557 => setenv serverip 192.168.6.2
808 03:05:24.288350 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
809 03:05:24.292360 setenv serverip 192.168.6.2
811 03:05:24.394061 => tftpboot 0x01080000 977972/tftp-deploy-msbwhkku/kernel/uImage
812 03:05:24.395009 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
813 03:05:24.401522 tftpboot 0x01080000 977972/tftp-deploy-msbwhkku/kernel/uImage
814 03:05:24.402055 Speed: 1000, full duplex
815 03:05:24.402483 Using ethernet@ff3f0000 device
816 03:05:24.406992 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
817 03:05:24.412511 Filename '977972/tftp-deploy-msbwhkku/kernel/uImage'.
818 03:05:24.416330 Load address: 0x1080000
819 03:05:27.183540 Loading: *################################################## 43.6 MiB
820 03:05:27.184212 15.7 MiB/s
821 03:05:27.184743 done
822 03:05:27.186974 Bytes transferred = 45716032 (2b99240 hex)
824 03:05:27.288712 => tftpboot 0x08000000 977972/tftp-deploy-msbwhkku/ramdisk/ramdisk.cpio.gz.uboot
825 03:05:27.289578 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
826 03:05:27.296507 tftpboot 0x08000000 977972/tftp-deploy-msbwhkku/ramdisk/ramdisk.cpio.gz.uboot
827 03:05:27.297110 Speed: 1000, full duplex
828 03:05:27.297518 Using ethernet@ff3f0000 device
829 03:05:27.301937 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
830 03:05:27.311812 Filename '977972/tftp-deploy-msbwhkku/ramdisk/ramdisk.cpio.gz.uboot'.
831 03:05:27.312491 Load address: 0x8000000
832 03:05:28.781054 Loading: *################################################# UDP wrong checksum 00000005 0000d1cd
833 03:05:30.824508 UDP wrong checksum 000000ff 00006f08
834 03:05:30.858664 UDP wrong checksum 000000ff 0000f8fa
835 03:05:33.781341 T UDP wrong checksum 00000005 0000d1cd
836 03:05:43.783465 T T UDP wrong checksum 00000005 0000d1cd
837 03:05:50.425509 T UDP wrong checksum 000000ff 0000b4d0
838 03:05:50.439137 UDP wrong checksum 000000ff 00003dc3
839 03:06:00.401100 T T UDP wrong checksum 000000ff 000002c7
840 03:06:00.541057 UDP wrong checksum 000000ff 00009db9
841 03:06:03.789362 T UDP wrong checksum 00000005 0000d1cd
842 03:06:16.172324 T T UDP wrong checksum 000000ff 0000cc2b
843 03:06:16.187816 UDP wrong checksum 000000ff 0000601e
844 03:06:23.793225 T
845 03:06:23.793818 Retry count exceeded; starting again
847 03:06:23.795211 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
850 03:06:23.797110 end: 2.4 uboot-commands (duration 00:01:20) [common]
852 03:06:23.798504 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
854 03:06:23.799537 end: 2 uboot-action (duration 00:01:20) [common]
856 03:06:23.801144 Cleaning after the job
857 03:06:23.801715 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/ramdisk
858 03:06:23.803039 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/kernel
859 03:06:23.848021 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/dtb
860 03:06:23.848865 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/nfsrootfs
861 03:06:24.018660 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977972/tftp-deploy-msbwhkku/modules
862 03:06:24.040819 start: 4.1 power-off (timeout 00:00:30) [common]
863 03:06:24.041518 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
864 03:06:24.076790 >> OK - accepted request
865 03:06:24.078944 Returned 0 in 0 seconds
866 03:06:24.179866 end: 4.1 power-off (duration 00:00:00) [common]
868 03:06:24.180928 start: 4.2 read-feedback (timeout 00:10:00) [common]
869 03:06:24.181596 Listened to connection for namespace 'common' for up to 1s
870 03:06:25.182517 Finalising connection for namespace 'common'
871 03:06:25.183010 Disconnecting from shell: Finalise
872 03:06:25.183323 =>
873 03:06:25.284083 end: 4.2 read-feedback (duration 00:00:01) [common]
874 03:06:25.284600 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/977972
875 03:06:28.586862 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/977972
876 03:06:28.587463 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.