Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:02:04.427860 lava-dispatcher, installed at version: 2024.01
2 03:02:04.428717 start: 0 validate
3 03:02:04.429238 Start time: 2024-11-12 03:02:04.429206+00:00 (UTC)
4 03:02:04.433036 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:02:04.434333 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:02:04.488378 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:02:04.488979 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc7-95-g96203094619a7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:02:04.520950 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:02:04.521623 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc7-95-g96203094619a7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:02:04.556859 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:02:04.558321 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:02:04.592823 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:02:04.593689 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fpending-fixes%2Fv6.12-rc7-95-g96203094619a7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:02:04.645612 validate duration: 0.22
16 03:02:04.646504 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:02:04.647569 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:02:04.647926 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:02:04.648600 Not decompressing ramdisk as can be used compressed.
20 03:02:04.649067 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 03:02:04.649386 saving as /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/ramdisk/initrd.cpio.gz
22 03:02:04.649688 total size: 5628169 (5 MB)
23 03:02:04.697126 progress 0 % (0 MB)
24 03:02:04.702252 progress 5 % (0 MB)
25 03:02:04.706618 progress 10 % (0 MB)
26 03:02:04.710366 progress 15 % (0 MB)
27 03:02:04.714495 progress 20 % (1 MB)
28 03:02:04.718352 progress 25 % (1 MB)
29 03:02:04.722437 progress 30 % (1 MB)
30 03:02:04.726533 progress 35 % (1 MB)
31 03:02:04.730201 progress 40 % (2 MB)
32 03:02:04.734311 progress 45 % (2 MB)
33 03:02:04.737826 progress 50 % (2 MB)
34 03:02:04.741673 progress 55 % (2 MB)
35 03:02:04.745515 progress 60 % (3 MB)
36 03:02:04.749030 progress 65 % (3 MB)
37 03:02:04.752892 progress 70 % (3 MB)
38 03:02:04.756270 progress 75 % (4 MB)
39 03:02:04.760030 progress 80 % (4 MB)
40 03:02:04.763381 progress 85 % (4 MB)
41 03:02:04.766990 progress 90 % (4 MB)
42 03:02:04.770584 progress 95 % (5 MB)
43 03:02:04.773877 progress 100 % (5 MB)
44 03:02:04.774543 5 MB downloaded in 0.12 s (43.00 MB/s)
45 03:02:04.775082 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:02:04.775962 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:02:04.776285 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:02:04.776557 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:02:04.777174 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/kernel/Image
51 03:02:04.777445 saving as /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/kernel/Image
52 03:02:04.777656 total size: 45715968 (43 MB)
53 03:02:04.777868 No compression specified
54 03:02:04.817271 progress 0 % (0 MB)
55 03:02:04.846380 progress 5 % (2 MB)
56 03:02:04.877756 progress 10 % (4 MB)
57 03:02:04.906398 progress 15 % (6 MB)
58 03:02:04.935339 progress 20 % (8 MB)
59 03:02:04.963507 progress 25 % (10 MB)
60 03:02:04.992212 progress 30 % (13 MB)
61 03:02:05.020960 progress 35 % (15 MB)
62 03:02:05.049699 progress 40 % (17 MB)
63 03:02:05.077706 progress 45 % (19 MB)
64 03:02:05.105972 progress 50 % (21 MB)
65 03:02:05.134222 progress 55 % (24 MB)
66 03:02:05.162089 progress 60 % (26 MB)
67 03:02:05.189722 progress 65 % (28 MB)
68 03:02:05.217657 progress 70 % (30 MB)
69 03:02:05.246768 progress 75 % (32 MB)
70 03:02:05.275382 progress 80 % (34 MB)
71 03:02:05.304391 progress 85 % (37 MB)
72 03:02:05.336050 progress 90 % (39 MB)
73 03:02:05.365523 progress 95 % (41 MB)
74 03:02:05.393229 progress 100 % (43 MB)
75 03:02:05.393818 43 MB downloaded in 0.62 s (70.76 MB/s)
76 03:02:05.394304 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:02:05.395130 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:02:05.395411 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:02:05.395680 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:02:05.396249 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:02:05.396562 saving as /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:02:05.396792 total size: 54703 (0 MB)
84 03:02:05.397013 No compression specified
85 03:02:05.434299 progress 59 % (0 MB)
86 03:02:05.435180 progress 100 % (0 MB)
87 03:02:05.435733 0 MB downloaded in 0.04 s (1.34 MB/s)
88 03:02:05.436273 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:02:05.437093 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:02:05.437354 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:02:05.437620 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:02:05.438076 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 03:02:05.438315 saving as /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/nfsrootfs/full.rootfs.tar
95 03:02:05.438522 total size: 120894716 (115 MB)
96 03:02:05.438733 Using unxz to decompress xz
97 03:02:05.472012 progress 0 % (0 MB)
98 03:02:06.285243 progress 5 % (5 MB)
99 03:02:07.134533 progress 10 % (11 MB)
100 03:02:07.926759 progress 15 % (17 MB)
101 03:02:08.666718 progress 20 % (23 MB)
102 03:02:09.257991 progress 25 % (28 MB)
103 03:02:10.083184 progress 30 % (34 MB)
104 03:02:10.872868 progress 35 % (40 MB)
105 03:02:11.225267 progress 40 % (46 MB)
106 03:02:11.602143 progress 45 % (51 MB)
107 03:02:12.320183 progress 50 % (57 MB)
108 03:02:13.206205 progress 55 % (63 MB)
109 03:02:13.989865 progress 60 % (69 MB)
110 03:02:14.752345 progress 65 % (74 MB)
111 03:02:15.529237 progress 70 % (80 MB)
112 03:02:16.353613 progress 75 % (86 MB)
113 03:02:17.140858 progress 80 % (92 MB)
114 03:02:17.905038 progress 85 % (98 MB)
115 03:02:18.762353 progress 90 % (103 MB)
116 03:02:19.555868 progress 95 % (109 MB)
117 03:02:20.396228 progress 100 % (115 MB)
118 03:02:20.409542 115 MB downloaded in 14.97 s (7.70 MB/s)
119 03:02:20.410173 end: 1.4.1 http-download (duration 00:00:15) [common]
121 03:02:20.411090 end: 1.4 download-retry (duration 00:00:15) [common]
122 03:02:20.411404 start: 1.5 download-retry (timeout 00:09:44) [common]
123 03:02:20.411711 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 03:02:20.412330 downloading http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/modules.tar.xz
125 03:02:20.412620 saving as /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/modules/modules.tar
126 03:02:20.412856 total size: 11615448 (11 MB)
127 03:02:20.413096 Using unxz to decompress xz
128 03:02:20.459224 progress 0 % (0 MB)
129 03:02:20.528454 progress 5 % (0 MB)
130 03:02:20.604378 progress 10 % (1 MB)
131 03:02:20.701292 progress 15 % (1 MB)
132 03:02:20.794371 progress 20 % (2 MB)
133 03:02:20.874499 progress 25 % (2 MB)
134 03:02:20.949808 progress 30 % (3 MB)
135 03:02:21.028026 progress 35 % (3 MB)
136 03:02:21.100636 progress 40 % (4 MB)
137 03:02:21.176561 progress 45 % (5 MB)
138 03:02:21.261741 progress 50 % (5 MB)
139 03:02:21.339215 progress 55 % (6 MB)
140 03:02:21.425286 progress 60 % (6 MB)
141 03:02:21.506583 progress 65 % (7 MB)
142 03:02:21.586872 progress 70 % (7 MB)
143 03:02:21.665144 progress 75 % (8 MB)
144 03:02:21.748381 progress 80 % (8 MB)
145 03:02:21.827918 progress 85 % (9 MB)
146 03:02:21.910389 progress 90 % (10 MB)
147 03:02:21.983236 progress 95 % (10 MB)
148 03:02:22.059708 progress 100 % (11 MB)
149 03:02:22.072268 11 MB downloaded in 1.66 s (6.68 MB/s)
150 03:02:22.073043 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:02:22.074895 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:02:22.075480 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 03:02:22.076110 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 03:02:38.877126 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/977956/extract-nfsrootfs-geoda6ck
156 03:02:38.877742 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 03:02:38.878059 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 03:02:38.878695 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs
159 03:02:38.879169 makedir: /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin
160 03:02:38.879543 makedir: /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/tests
161 03:02:38.879923 makedir: /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/results
162 03:02:38.880326 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-add-keys
163 03:02:38.880935 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-add-sources
164 03:02:38.881458 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-background-process-start
165 03:02:38.882042 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-background-process-stop
166 03:02:38.882634 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-common-functions
167 03:02:38.883126 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-echo-ipv4
168 03:02:38.883615 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-install-packages
169 03:02:38.884130 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-installed-packages
170 03:02:38.884619 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-os-build
171 03:02:38.885087 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-probe-channel
172 03:02:38.885558 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-probe-ip
173 03:02:38.886057 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-target-ip
174 03:02:38.886577 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-target-mac
175 03:02:38.887076 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-target-storage
176 03:02:38.887557 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-test-case
177 03:02:38.888059 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-test-event
178 03:02:38.888551 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-test-feedback
179 03:02:38.889022 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-test-raise
180 03:02:38.889490 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-test-reference
181 03:02:38.889999 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-test-runner
182 03:02:38.890617 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-test-set
183 03:02:38.891126 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-test-shell
184 03:02:38.891608 Updating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-add-keys (debian)
185 03:02:38.892169 Updating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-add-sources (debian)
186 03:02:38.892686 Updating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-install-packages (debian)
187 03:02:38.893253 Updating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-installed-packages (debian)
188 03:02:38.893759 Updating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/bin/lava-os-build (debian)
189 03:02:38.894188 Creating /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/environment
190 03:02:38.894554 LAVA metadata
191 03:02:38.894813 - LAVA_JOB_ID=977956
192 03:02:38.895026 - LAVA_DISPATCHER_IP=192.168.6.2
193 03:02:38.895393 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 03:02:38.896366 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 03:02:38.896677 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 03:02:38.896884 skipped lava-vland-overlay
197 03:02:38.897120 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 03:02:38.897371 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 03:02:38.897589 skipped lava-multinode-overlay
200 03:02:38.897828 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 03:02:38.898076 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 03:02:38.898319 Loading test definitions
203 03:02:38.898591 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 03:02:38.898807 Using /lava-977956 at stage 0
205 03:02:38.899863 uuid=977956_1.6.2.4.1 testdef=None
206 03:02:38.900224 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 03:02:38.900488 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 03:02:38.902059 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 03:02:38.902836 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 03:02:38.904764 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 03:02:38.905582 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 03:02:38.907390 runner path: /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/0/tests/0_timesync-off test_uuid 977956_1.6.2.4.1
215 03:02:38.907938 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 03:02:38.908773 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 03:02:38.908994 Using /lava-977956 at stage 0
219 03:02:38.909347 Fetching tests from https://github.com/kernelci/test-definitions.git
220 03:02:38.909636 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/0/tests/1_kselftest-rtc'
221 03:02:42.500753 Running '/usr/bin/git checkout kernelci.org
222 03:02:42.846264 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 03:02:42.847684 uuid=977956_1.6.2.4.5 testdef=None
224 03:02:42.848059 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 03:02:42.848831 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 03:02:42.851642 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 03:02:42.852493 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 03:02:42.856219 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 03:02:42.857134 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 03:02:42.860791 runner path: /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/0/tests/1_kselftest-rtc test_uuid 977956_1.6.2.4.5
234 03:02:42.861087 BOARD='meson-g12b-a311d-libretech-cc'
235 03:02:42.861303 BRANCH='next'
236 03:02:42.861507 SKIPFILE='/dev/null'
237 03:02:42.861708 SKIP_INSTALL='True'
238 03:02:42.861908 TESTPROG_URL='http://storage.kernelci.org/next/pending-fixes/v6.12-rc7-95-g96203094619a7/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 03:02:42.862111 TST_CASENAME=''
240 03:02:42.862309 TST_CMDFILES='rtc'
241 03:02:42.862877 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 03:02:42.863673 Creating lava-test-runner.conf files
244 03:02:42.863883 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/977956/lava-overlay-g18c2xfs/lava-977956/0 for stage 0
245 03:02:42.864278 - 0_timesync-off
246 03:02:42.864528 - 1_kselftest-rtc
247 03:02:42.864878 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 03:02:42.865170 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 03:03:06.049485 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 03:03:06.049943 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 03:03:06.050240 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 03:03:06.050551 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 03:03:06.050849 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 03:03:06.787172 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 03:03:06.787675 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 03:03:06.787952 extracting modules file /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977956/extract-nfsrootfs-geoda6ck
257 03:03:08.181437 extracting modules file /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/977956/extract-overlay-ramdisk-y9vbmu4e/ramdisk
258 03:03:09.622444 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 03:03:09.622929 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 03:03:09.623213 [common] Applying overlay to NFS
261 03:03:09.623432 [common] Applying overlay /var/lib/lava/dispatcher/tmp/977956/compress-overlay-nxao41c_/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/977956/extract-nfsrootfs-geoda6ck
262 03:03:12.394427 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 03:03:12.394903 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 03:03:12.395177 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 03:03:12.395408 Converting downloaded kernel to a uImage
266 03:03:12.395721 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/kernel/Image /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/kernel/uImage
267 03:03:12.879629 output: Image Name:
268 03:03:12.880083 output: Created: Tue Nov 12 03:03:12 2024
269 03:03:12.880302 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 03:03:12.880509 output: Data Size: 45715968 Bytes = 44644.50 KiB = 43.60 MiB
271 03:03:12.880712 output: Load Address: 01080000
272 03:03:12.880914 output: Entry Point: 01080000
273 03:03:12.881113 output:
274 03:03:12.881446 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 03:03:12.881712 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 03:03:12.881980 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 03:03:12.882235 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 03:03:12.882490 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 03:03:12.882743 Building ramdisk /var/lib/lava/dispatcher/tmp/977956/extract-overlay-ramdisk-y9vbmu4e/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/977956/extract-overlay-ramdisk-y9vbmu4e/ramdisk
280 03:03:15.008994 >> 166832 blocks
281 03:03:22.744549 Adding RAMdisk u-boot header.
282 03:03:22.745029 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/977956/extract-overlay-ramdisk-y9vbmu4e/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/977956/extract-overlay-ramdisk-y9vbmu4e/ramdisk.cpio.gz.uboot
283 03:03:22.997934 output: Image Name:
284 03:03:22.998354 output: Created: Tue Nov 12 03:03:22 2024
285 03:03:22.998820 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 03:03:22.999282 output: Data Size: 23436259 Bytes = 22886.97 KiB = 22.35 MiB
287 03:03:22.999734 output: Load Address: 00000000
288 03:03:23.000245 output: Entry Point: 00000000
289 03:03:23.000702 output:
290 03:03:23.001876 rename /var/lib/lava/dispatcher/tmp/977956/extract-overlay-ramdisk-y9vbmu4e/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/ramdisk/ramdisk.cpio.gz.uboot
291 03:03:23.002661 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 03:03:23.003271 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 03:03:23.003858 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 03:03:23.004409 No LXC device requested
295 03:03:23.004976 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 03:03:23.005543 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 03:03:23.006099 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 03:03:23.006550 Checking files for TFTP limit of 4294967296 bytes.
299 03:03:23.009515 end: 1 tftp-deploy (duration 00:01:18) [common]
300 03:03:23.010151 start: 2 uboot-action (timeout 00:05:00) [common]
301 03:03:23.010740 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 03:03:23.011300 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 03:03:23.011870 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 03:03:23.012500 Using kernel file from prepare-kernel: 977956/tftp-deploy-4dmuwcsy/kernel/uImage
305 03:03:23.013202 substitutions:
306 03:03:23.013658 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 03:03:23.014111 - {DTB_ADDR}: 0x01070000
308 03:03:23.014557 - {DTB}: 977956/tftp-deploy-4dmuwcsy/dtb/meson-g12b-a311d-libretech-cc.dtb
309 03:03:23.015002 - {INITRD}: 977956/tftp-deploy-4dmuwcsy/ramdisk/ramdisk.cpio.gz.uboot
310 03:03:23.015447 - {KERNEL_ADDR}: 0x01080000
311 03:03:23.015886 - {KERNEL}: 977956/tftp-deploy-4dmuwcsy/kernel/uImage
312 03:03:23.016365 - {LAVA_MAC}: None
313 03:03:23.016855 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/977956/extract-nfsrootfs-geoda6ck
314 03:03:23.017304 - {NFS_SERVER_IP}: 192.168.6.2
315 03:03:23.017743 - {PRESEED_CONFIG}: None
316 03:03:23.018180 - {PRESEED_LOCAL}: None
317 03:03:23.018623 - {RAMDISK_ADDR}: 0x08000000
318 03:03:23.019059 - {RAMDISK}: 977956/tftp-deploy-4dmuwcsy/ramdisk/ramdisk.cpio.gz.uboot
319 03:03:23.019493 - {ROOT_PART}: None
320 03:03:23.019926 - {ROOT}: None
321 03:03:23.020400 - {SERVER_IP}: 192.168.6.2
322 03:03:23.020838 - {TEE_ADDR}: 0x83000000
323 03:03:23.021268 - {TEE}: None
324 03:03:23.021701 Parsed boot commands:
325 03:03:23.022124 - setenv autoload no
326 03:03:23.022562 - setenv initrd_high 0xffffffff
327 03:03:23.022991 - setenv fdt_high 0xffffffff
328 03:03:23.023422 - dhcp
329 03:03:23.023854 - setenv serverip 192.168.6.2
330 03:03:23.024329 - tftpboot 0x01080000 977956/tftp-deploy-4dmuwcsy/kernel/uImage
331 03:03:23.024774 - tftpboot 0x08000000 977956/tftp-deploy-4dmuwcsy/ramdisk/ramdisk.cpio.gz.uboot
332 03:03:23.025214 - tftpboot 0x01070000 977956/tftp-deploy-4dmuwcsy/dtb/meson-g12b-a311d-libretech-cc.dtb
333 03:03:23.025651 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/977956/extract-nfsrootfs-geoda6ck,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 03:03:23.026100 - bootm 0x01080000 0x08000000 0x01070000
335 03:03:23.026663 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 03:03:23.028356 start: 2.3 connect-device (timeout 00:05:00) [common]
338 03:03:23.028831 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 03:03:23.044194 Setting prompt string to ['lava-test: # ']
340 03:03:23.045856 end: 2.3 connect-device (duration 00:00:00) [common]
341 03:03:23.046557 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 03:03:23.047211 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 03:03:23.047817 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 03:03:23.049105 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 03:03:23.086959 >> OK - accepted request
346 03:03:23.089202 Returned 0 in 0 seconds
347 03:03:23.190347 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 03:03:23.192127 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 03:03:23.192774 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 03:03:23.193351 Setting prompt string to ['Hit any key to stop autoboot']
352 03:03:23.193865 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 03:03:23.195557 Trying 192.168.56.21...
354 03:03:23.196147 Connected to conserv1.
355 03:03:23.196615 Escape character is '^]'.
356 03:03:23.197084
357 03:03:23.197553 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 03:03:23.198023
359 03:03:35.442654 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 03:03:35.443112 bl2_stage_init 0x01
361 03:03:35.443374 bl2_stage_init 0x81
362 03:03:35.448193 hw id: 0x0000 - pwm id 0x01
363 03:03:35.448614 bl2_stage_init 0xc1
364 03:03:35.448888 bl2_stage_init 0x02
365 03:03:35.449135
366 03:03:35.453895 L0:00000000
367 03:03:35.454280 L1:20000703
368 03:03:35.454543 L2:00008067
369 03:03:35.454790 L3:14000000
370 03:03:35.459405 B2:00402000
371 03:03:35.459826 B1:e0f83180
372 03:03:35.460141
373 03:03:35.460397 TE: 58167
374 03:03:35.460640
375 03:03:35.464921 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 03:03:35.465347
377 03:03:35.465606 Board ID = 1
378 03:03:35.470519 Set A53 clk to 24M
379 03:03:35.470941 Set A73 clk to 24M
380 03:03:35.471202 Set clk81 to 24M
381 03:03:35.476206 A53 clk: 1200 MHz
382 03:03:35.476621 A73 clk: 1200 MHz
383 03:03:35.476873 CLK81: 166.6M
384 03:03:35.477116 smccc: 00012abe
385 03:03:35.481680 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 03:03:35.487371 board id: 1
387 03:03:35.493330 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 03:03:35.503810 fw parse done
389 03:03:35.509971 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 03:03:35.551382 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 03:03:35.563250 PIEI prepare done
392 03:03:35.563735 fastboot data load
393 03:03:35.564186 fastboot data verify
394 03:03:35.568908 verify result: 266
395 03:03:35.574517 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 03:03:35.574961 LPDDR4 probe
397 03:03:35.575353 ddr clk to 1584MHz
398 03:03:35.582591 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 03:03:35.619777
400 03:03:35.620297 dmc_version 0001
401 03:03:35.626464 Check phy result
402 03:03:35.632300 INFO : End of CA training
403 03:03:35.632753 INFO : End of initialization
404 03:03:35.637920 INFO : Training has run successfully!
405 03:03:35.638362 Check phy result
406 03:03:35.643495 INFO : End of initialization
407 03:03:35.643932 INFO : End of read enable training
408 03:03:35.649160 INFO : End of fine write leveling
409 03:03:35.654719 INFO : End of Write leveling coarse delay
410 03:03:35.655165 INFO : Training has run successfully!
411 03:03:35.655578 Check phy result
412 03:03:35.660336 INFO : End of initialization
413 03:03:35.660788 INFO : End of read dq deskew training
414 03:03:35.665857 INFO : End of MPR read delay center optimization
415 03:03:35.671554 INFO : End of write delay center optimization
416 03:03:35.677159 INFO : End of read delay center optimization
417 03:03:35.677597 INFO : End of max read latency training
418 03:03:35.682754 INFO : Training has run successfully!
419 03:03:35.683214 1D training succeed
420 03:03:35.691963 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 03:03:35.739598 Check phy result
422 03:03:35.740189 INFO : End of initialization
423 03:03:35.760253 INFO : End of 2D read delay Voltage center optimization
424 03:03:35.781508 INFO : End of 2D read delay Voltage center optimization
425 03:03:35.833509 INFO : End of 2D write delay Voltage center optimization
426 03:03:35.883064 INFO : End of 2D write delay Voltage center optimization
427 03:03:35.888518 INFO : Training has run successfully!
428 03:03:35.888978
429 03:03:35.889391 channel==0
430 03:03:35.894222 RxClkDly_Margin_A0==88 ps 9
431 03:03:35.894666 TxDqDly_Margin_A0==98 ps 10
432 03:03:35.899738 RxClkDly_Margin_A1==88 ps 9
433 03:03:35.900217 TxDqDly_Margin_A1==98 ps 10
434 03:03:35.900630 TrainedVREFDQ_A0==74
435 03:03:35.905347 TrainedVREFDQ_A1==74
436 03:03:35.905782 VrefDac_Margin_A0==25
437 03:03:35.906187 DeviceVref_Margin_A0==40
438 03:03:35.911020 VrefDac_Margin_A1==25
439 03:03:35.911452 DeviceVref_Margin_A1==40
440 03:03:35.911855
441 03:03:35.912293
442 03:03:35.916484 channel==1
443 03:03:35.916916 RxClkDly_Margin_A0==98 ps 10
444 03:03:35.917322 TxDqDly_Margin_A0==88 ps 9
445 03:03:35.922202 RxClkDly_Margin_A1==88 ps 9
446 03:03:35.922635 TxDqDly_Margin_A1==88 ps 9
447 03:03:35.927730 TrainedVREFDQ_A0==76
448 03:03:35.928193 TrainedVREFDQ_A1==77
449 03:03:35.928598 VrefDac_Margin_A0==23
450 03:03:35.933344 DeviceVref_Margin_A0==38
451 03:03:35.933777 VrefDac_Margin_A1==24
452 03:03:35.938951 DeviceVref_Margin_A1==37
453 03:03:35.939420
454 03:03:35.939836 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 03:03:35.940281
456 03:03:35.972384 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 03:03:35.972926 2D training succeed
458 03:03:35.977990 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 03:03:35.983608 auto size-- 65535DDR cs0 size: 2048MB
460 03:03:35.984078 DDR cs1 size: 2048MB
461 03:03:35.989168 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 03:03:35.989630 cs0 DataBus test pass
463 03:03:35.994772 cs1 DataBus test pass
464 03:03:35.995204 cs0 AddrBus test pass
465 03:03:35.995613 cs1 AddrBus test pass
466 03:03:35.996041
467 03:03:36.000369 100bdlr_step_size ps== 420
468 03:03:36.000816 result report
469 03:03:36.006115 boot times 0Enable ddr reg access
470 03:03:36.011241 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 03:03:36.024756 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 03:03:36.598401 0.0;M3 CHK:0;cm4_sp_mode 0
473 03:03:36.599040 MVN_1=0x00000000
474 03:03:36.603888 MVN_2=0x00000000
475 03:03:36.609642 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 03:03:36.610094 OPS=0x10
477 03:03:36.610508 ring efuse init
478 03:03:36.610909 chipver efuse init
479 03:03:36.615221 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 03:03:36.620876 [0.018961 Inits done]
481 03:03:36.621318 secure task start!
482 03:03:36.621728 high task start!
483 03:03:36.625412 low task start!
484 03:03:36.625852 run into bl31
485 03:03:36.632139 NOTICE: BL31: v1.3(release):4fc40b1
486 03:03:36.639967 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 03:03:36.640432 NOTICE: BL31: G12A normal boot!
488 03:03:36.665291 NOTICE: BL31: BL33 decompress pass
489 03:03:36.670427 ERROR: Error initializing runtime service opteed_fast
490 03:03:37.903871
491 03:03:37.904516
492 03:03:37.912417 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 03:03:37.912880
494 03:03:37.913302 Model: Libre Computer AML-A311D-CC Alta
495 03:03:38.120697 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 03:03:38.144088 DRAM: 2 GiB (effective 3.8 GiB)
497 03:03:38.287050 Core: 408 devices, 31 uclasses, devicetree: separate
498 03:03:38.292957 WDT: Not starting watchdog@f0d0
499 03:03:38.325283 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 03:03:38.337722 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 03:03:38.342770 ** Bad device specification mmc 0 **
502 03:03:38.353115 Card did not respond to voltage select! : -110
503 03:03:38.360676 ** Bad device specification mmc 0 **
504 03:03:38.361187 Couldn't find partition mmc 0
505 03:03:38.369081 Card did not respond to voltage select! : -110
506 03:03:38.374600 ** Bad device specification mmc 0 **
507 03:03:38.375116 Couldn't find partition mmc 0
508 03:03:38.379667 Error: could not access storage.
509 03:03:39.642839 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 03:03:39.643481 bl2_stage_init 0x01
511 03:03:39.643915 bl2_stage_init 0x81
512 03:03:39.648480 hw id: 0x0000 - pwm id 0x01
513 03:03:39.649023 bl2_stage_init 0xc1
514 03:03:39.649457 bl2_stage_init 0x02
515 03:03:39.649875
516 03:03:39.654085 L0:00000000
517 03:03:39.654640 L1:20000703
518 03:03:39.655061 L2:00008067
519 03:03:39.655479 L3:14000000
520 03:03:39.656979 B2:00402000
521 03:03:39.657505 B1:e0f83180
522 03:03:39.657929
523 03:03:39.658430 TE: 58124
524 03:03:39.658896
525 03:03:39.668137 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 03:03:39.668735
527 03:03:39.669163 Board ID = 1
528 03:03:39.669614 Set A53 clk to 24M
529 03:03:39.670041 Set A73 clk to 24M
530 03:03:39.673790 Set clk81 to 24M
531 03:03:39.674342 A53 clk: 1200 MHz
532 03:03:39.674768 A73 clk: 1200 MHz
533 03:03:39.679391 CLK81: 166.6M
534 03:03:39.679958 smccc: 00012a92
535 03:03:39.684899 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 03:03:39.685479 board id: 1
537 03:03:39.693643 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 03:03:39.704296 fw parse done
539 03:03:39.709237 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 03:03:39.752091 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 03:03:39.763807 PIEI prepare done
542 03:03:39.764385 fastboot data load
543 03:03:39.765064 fastboot data verify
544 03:03:39.769722 verify result: 266
545 03:03:39.775020 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 03:03:39.775693 LPDDR4 probe
547 03:03:39.776256 ddr clk to 1584MHz
548 03:03:39.783378 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 03:03:39.819074
550 03:03:39.819417 dmc_version 0001
551 03:03:39.825746 Check phy result
552 03:03:39.832529 INFO : End of CA training
553 03:03:39.833052 INFO : End of initialization
554 03:03:39.838111 INFO : Training has run successfully!
555 03:03:39.838613 Check phy result
556 03:03:39.843717 INFO : End of initialization
557 03:03:39.844252 INFO : End of read enable training
558 03:03:39.849318 INFO : End of fine write leveling
559 03:03:39.855013 INFO : End of Write leveling coarse delay
560 03:03:39.855507 INFO : Training has run successfully!
561 03:03:39.855962 Check phy result
562 03:03:39.860644 INFO : End of initialization
563 03:03:39.861180 INFO : End of read dq deskew training
564 03:03:39.866207 INFO : End of MPR read delay center optimization
565 03:03:39.871809 INFO : End of write delay center optimization
566 03:03:39.877453 INFO : End of read delay center optimization
567 03:03:39.877953 INFO : End of max read latency training
568 03:03:39.883020 INFO : Training has run successfully!
569 03:03:39.883507 1D training succeed
570 03:03:39.892236 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 03:03:39.938899 Check phy result
572 03:03:39.939456 INFO : End of initialization
573 03:03:39.960572 INFO : End of 2D read delay Voltage center optimization
574 03:03:39.981805 INFO : End of 2D read delay Voltage center optimization
575 03:03:40.032951 INFO : End of 2D write delay Voltage center optimization
576 03:03:40.083220 INFO : End of 2D write delay Voltage center optimization
577 03:03:40.088825 INFO : Training has run successfully!
578 03:03:40.089337
579 03:03:40.089811 channel==0
580 03:03:40.094421 RxClkDly_Margin_A0==78 ps 8
581 03:03:40.094906 TxDqDly_Margin_A0==98 ps 10
582 03:03:40.099973 RxClkDly_Margin_A1==88 ps 9
583 03:03:40.100490 TxDqDly_Margin_A1==98 ps 10
584 03:03:40.100949 TrainedVREFDQ_A0==74
585 03:03:40.105676 TrainedVREFDQ_A1==74
586 03:03:40.106165 VrefDac_Margin_A0==25
587 03:03:40.106624 DeviceVref_Margin_A0==40
588 03:03:40.111195 VrefDac_Margin_A1==25
589 03:03:40.111672 DeviceVref_Margin_A1==40
590 03:03:40.112153
591 03:03:40.112614
592 03:03:40.116798 channel==1
593 03:03:40.117275 RxClkDly_Margin_A0==98 ps 10
594 03:03:40.117723 TxDqDly_Margin_A0==98 ps 10
595 03:03:40.122419 RxClkDly_Margin_A1==88 ps 9
596 03:03:40.122900 TxDqDly_Margin_A1==98 ps 10
597 03:03:40.127975 TrainedVREFDQ_A0==77
598 03:03:40.128493 TrainedVREFDQ_A1==77
599 03:03:40.128949 VrefDac_Margin_A0==22
600 03:03:40.133669 DeviceVref_Margin_A0==37
601 03:03:40.134154 VrefDac_Margin_A1==24
602 03:03:40.139203 DeviceVref_Margin_A1==37
603 03:03:40.139694
604 03:03:40.140187 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 03:03:40.144787
606 03:03:40.172780 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 0000005f
607 03:03:40.173339 2D training succeed
608 03:03:40.178453 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 03:03:40.184007 auto size-- 65535DDR cs0 size: 2048MB
610 03:03:40.184697 DDR cs1 size: 2048MB
611 03:03:40.189646 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 03:03:40.189951 cs0 DataBus test pass
613 03:03:40.195154 cs1 DataBus test pass
614 03:03:40.195453 cs0 AddrBus test pass
615 03:03:40.195676 cs1 AddrBus test pass
616 03:03:40.195885
617 03:03:40.200869 100bdlr_step_size ps== 420
618 03:03:40.201397 result report
619 03:03:40.206539 boot times 0Enable ddr reg access
620 03:03:40.211212 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 03:03:40.225342 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 03:03:40.798855 0.0;M3 CHK:0;cm4_sp_mode 0
623 03:03:40.799444 MVN_1=0x00000000
624 03:03:40.804495 MVN_2=0x00000000
625 03:03:40.810208 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 03:03:40.810764 OPS=0x10
627 03:03:40.811199 ring efuse init
628 03:03:40.811592 chipver efuse init
629 03:03:40.815762 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 03:03:40.821348 [0.018961 Inits done]
631 03:03:40.821839 secure task start!
632 03:03:40.822236 high task start!
633 03:03:40.825966 low task start!
634 03:03:40.826469 run into bl31
635 03:03:40.832630 NOTICE: BL31: v1.3(release):4fc40b1
636 03:03:40.840392 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 03:03:40.840890 NOTICE: BL31: G12A normal boot!
638 03:03:40.866368 NOTICE: BL31: BL33 decompress pass
639 03:03:40.872079 ERROR: Error initializing runtime service opteed_fast
640 03:03:42.104800
641 03:03:42.105393
642 03:03:42.112479 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 03:03:42.112989
644 03:03:42.113418 Model: Libre Computer AML-A311D-CC Alta
645 03:03:42.321788 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 03:03:42.344180 DRAM: 2 GiB (effective 3.8 GiB)
647 03:03:42.488066 Core: 408 devices, 31 uclasses, devicetree: separate
648 03:03:42.493896 WDT: Not starting watchdog@f0d0
649 03:03:42.526144 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 03:03:42.538609 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 03:03:42.543582 ** Bad device specification mmc 0 **
652 03:03:42.554006 Card did not respond to voltage select! : -110
653 03:03:42.561559 ** Bad device specification mmc 0 **
654 03:03:42.562049 Couldn't find partition mmc 0
655 03:03:42.570007 Card did not respond to voltage select! : -110
656 03:03:42.575431 ** Bad device specification mmc 0 **
657 03:03:42.575924 Couldn't find partition mmc 0
658 03:03:42.580374 Error: could not access storage.
659 03:03:42.922948 Net: eth0: ethernet@ff3f0000
660 03:03:42.923499 starting USB...
661 03:03:43.174714 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 03:03:43.175297 Starting the controller
663 03:03:43.181777 USB XHCI 1.10
664 03:03:44.896214 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 03:03:44.896872 bl2_stage_init 0x01
666 03:03:44.897314 bl2_stage_init 0x81
667 03:03:44.899406 hw id: 0x0000 - pwm id 0x01
668 03:03:44.899953 bl2_stage_init 0xc1
669 03:03:44.900454 bl2_stage_init 0x02
670 03:03:44.900872
671 03:03:44.904898 L0:00000000
672 03:03:44.905479 L1:20000703
673 03:03:44.905947 L2:00008067
674 03:03:44.906400 L3:14000000
675 03:03:44.907788 B2:00402000
676 03:03:44.908752 B1:e0f83180
677 03:03:44.909266
678 03:03:44.909687 TE: 58159
679 03:03:44.909996
680 03:03:44.918657 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 03:03:44.919330
682 03:03:44.919849 Board ID = 1
683 03:03:44.920367 Set A53 clk to 24M
684 03:03:44.920829 Set A73 clk to 24M
685 03:03:44.924188 Set clk81 to 24M
686 03:03:44.924695 A53 clk: 1200 MHz
687 03:03:44.925153 A73 clk: 1200 MHz
688 03:03:44.929795 CLK81: 166.6M
689 03:03:44.930421 smccc: 00012ab5
690 03:03:44.935524 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 03:03:44.936184 board id: 1
692 03:03:44.944448 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 03:03:44.954451 fw parse done
694 03:03:44.960310 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 03:03:45.003010 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 03:03:45.013910 PIEI prepare done
697 03:03:45.014288 fastboot data load
698 03:03:45.014531 fastboot data verify
699 03:03:45.019535 verify result: 266
700 03:03:45.025169 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 03:03:45.025531 LPDDR4 probe
702 03:03:45.025767 ddr clk to 1584MHz
703 03:03:45.033146 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 03:03:45.070562
705 03:03:45.071146 dmc_version 0001
706 03:03:45.077061 Check phy result
707 03:03:45.082917 INFO : End of CA training
708 03:03:45.083256 INFO : End of initialization
709 03:03:45.088526 INFO : Training has run successfully!
710 03:03:45.088846 Check phy result
711 03:03:45.094084 INFO : End of initialization
712 03:03:45.094402 INFO : End of read enable training
713 03:03:45.099710 INFO : End of fine write leveling
714 03:03:45.105390 INFO : End of Write leveling coarse delay
715 03:03:45.105719 INFO : Training has run successfully!
716 03:03:45.105957 Check phy result
717 03:03:45.110902 INFO : End of initialization
718 03:03:45.111221 INFO : End of read dq deskew training
719 03:03:45.116482 INFO : End of MPR read delay center optimization
720 03:03:45.122162 INFO : End of write delay center optimization
721 03:03:45.127724 INFO : End of read delay center optimization
722 03:03:45.128085 INFO : End of max read latency training
723 03:03:45.133401 INFO : Training has run successfully!
724 03:03:45.133752 1D training succeed
725 03:03:45.142497 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 03:03:45.190034 Check phy result
727 03:03:45.190447 INFO : End of initialization
728 03:03:45.212740 INFO : End of 2D read delay Voltage center optimization
729 03:03:45.232730 INFO : End of 2D read delay Voltage center optimization
730 03:03:45.284674 INFO : End of 2D write delay Voltage center optimization
731 03:03:45.333892 INFO : End of 2D write delay Voltage center optimization
732 03:03:45.341282 INFO : Training has run successfully!
733 03:03:45.341926
734 03:03:45.342424 channel==0
735 03:03:45.345076 RxClkDly_Margin_A0==88 ps 9
736 03:03:45.345937 TxDqDly_Margin_A0==98 ps 10
737 03:03:45.350562 RxClkDly_Margin_A1==88 ps 9
738 03:03:45.351100 TxDqDly_Margin_A1==98 ps 10
739 03:03:45.351561 TrainedVREFDQ_A0==74
740 03:03:45.356232 TrainedVREFDQ_A1==74
741 03:03:45.356778 VrefDac_Margin_A0==25
742 03:03:45.357236 DeviceVref_Margin_A0==40
743 03:03:45.361872 VrefDac_Margin_A1==25
744 03:03:45.362491 DeviceVref_Margin_A1==40
745 03:03:45.362969
746 03:03:45.363431
747 03:03:45.367404 channel==1
748 03:03:45.367916 RxClkDly_Margin_A0==98 ps 10
749 03:03:45.368416 TxDqDly_Margin_A0==88 ps 9
750 03:03:45.372979 RxClkDly_Margin_A1==88 ps 9
751 03:03:45.373483 TxDqDly_Margin_A1==88 ps 9
752 03:03:45.378603 TrainedVREFDQ_A0==76
753 03:03:45.379211 TrainedVREFDQ_A1==77
754 03:03:45.379699 VrefDac_Margin_A0==23
755 03:03:45.384218 DeviceVref_Margin_A0==38
756 03:03:45.384766 VrefDac_Margin_A1==24
757 03:03:45.389774 DeviceVref_Margin_A1==37
758 03:03:45.390259
759 03:03:45.390705 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 03:03:45.391146
761 03:03:45.423416 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
762 03:03:45.424096 2D training succeed
763 03:03:45.428993 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 03:03:45.434664 auto size-- 65535DDR cs0 size: 2048MB
765 03:03:45.435180 DDR cs1 size: 2048MB
766 03:03:45.440216 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 03:03:45.440771 cs0 DataBus test pass
768 03:03:45.445748 cs1 DataBus test pass
769 03:03:45.446258 cs0 AddrBus test pass
770 03:03:45.446699 cs1 AddrBus test pass
771 03:03:45.447136
772 03:03:45.451374 100bdlr_step_size ps== 420
773 03:03:45.451915 result report
774 03:03:45.457020 boot times 0Enable ddr reg access
775 03:03:45.462242 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 03:03:45.475750 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 03:03:46.305125 0.0;M3 CHK:0;cm4_sp_mode 0
778 03:03:46.305788 MVN_1=0x00000000
779 03:03:46.306277 MVN_2=0x00000000
780 03:03:46.306756 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 03:03:46.307221 OPS=0x10
782 03:03:46.307674 ring efuse init
783 03:03:46.308193 chipver efuse init
784 03:03:46.308637 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 03:03:46.309081 [0.018961 Inits done]
786 03:03:46.309511 secure task start!
787 03:03:46.309940 high task start!
788 03:03:46.310367 low task start!
789 03:03:46.310794 run into bl31
790 03:03:46.311220 NOTICE: BL31: v1.3(release):4fc40b1
791 03:03:46.311657 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 03:03:46.312169 NOTICE: BL31: G12A normal boot!
793 03:03:46.312631 NOTICE: BL31: BL33 decompress pass
794 03:03:46.313503 ERROR: Error initializing runtime service opteed_fast
795 03:03:47.353393
796 03:03:47.354064
797 03:03:47.361806 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 03:03:47.362342
799 03:03:47.362802 Model: Libre Computer AML-A311D-CC Alta
800 03:03:47.570139 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 03:03:47.593646 DRAM: 2 GiB (effective 3.8 GiB)
802 03:03:47.736600 Core: 408 devices, 31 uclasses, devicetree: separate
803 03:03:47.742363 WDT: Not starting watchdog@f0d0
804 03:03:47.774608 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 03:03:47.786978 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 03:03:47.792092 ** Bad device specification mmc 0 **
807 03:03:47.802365 Card did not respond to voltage select! : -110
808 03:03:47.809963 ** Bad device specification mmc 0 **
809 03:03:47.810467 Couldn't find partition mmc 0
810 03:03:47.818367 Card did not respond to voltage select! : -110
811 03:03:47.823888 ** Bad device specification mmc 0 **
812 03:03:47.824418 Couldn't find partition mmc 0
813 03:03:47.828843 Error: could not access storage.
814 03:03:48.171363 Net: eth0: ethernet@ff3f0000
815 03:03:48.172059 starting USB...
816 03:03:48.423217 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 03:03:48.423867 Starting the controller
818 03:03:48.430139 USB XHCI 1.10
819 03:03:50.594516 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 03:03:50.595123 bl2_stage_init 0x01
821 03:03:50.595537 bl2_stage_init 0x81
822 03:03:50.600388 hw id: 0x0000 - pwm id 0x01
823 03:03:50.600889 bl2_stage_init 0xc1
824 03:03:50.601327 bl2_stage_init 0x02
825 03:03:50.601732
826 03:03:50.605845 L0:00000000
827 03:03:50.606336 L1:20000703
828 03:03:50.606735 L2:00008067
829 03:03:50.607127 L3:14000000
830 03:03:50.611441 B2:00402000
831 03:03:50.611918 B1:e0f83180
832 03:03:50.612366
833 03:03:50.612761 TE: 58124
834 03:03:50.613157
835 03:03:50.617076 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 03:03:50.617558
837 03:03:50.617957 Board ID = 1
838 03:03:50.622612 Set A53 clk to 24M
839 03:03:50.623089 Set A73 clk to 24M
840 03:03:50.623484 Set clk81 to 24M
841 03:03:50.628422 A53 clk: 1200 MHz
842 03:03:50.628893 A73 clk: 1200 MHz
843 03:03:50.629293 CLK81: 166.6M
844 03:03:50.629677 smccc: 00012a91
845 03:03:50.633762 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 03:03:50.639289 board id: 1
847 03:03:50.645274 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 03:03:50.655931 fw parse done
849 03:03:50.661772 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 03:03:50.704396 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 03:03:50.715269 PIEI prepare done
852 03:03:50.715776 fastboot data load
853 03:03:50.716379 fastboot data verify
854 03:03:50.720973 verify result: 266
855 03:03:50.726449 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 03:03:50.726827 LPDDR4 probe
857 03:03:50.727138 ddr clk to 1584MHz
858 03:03:50.733843 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 03:03:50.771116
860 03:03:50.771628 dmc_version 0001
861 03:03:50.777793 Check phy result
862 03:03:50.784206 INFO : End of CA training
863 03:03:50.784618 INFO : End of initialization
864 03:03:50.789858 INFO : Training has run successfully!
865 03:03:50.790253 Check phy result
866 03:03:50.795396 INFO : End of initialization
867 03:03:50.795750 INFO : End of read enable training
868 03:03:50.800986 INFO : End of fine write leveling
869 03:03:50.806561 INFO : End of Write leveling coarse delay
870 03:03:50.806964 INFO : Training has run successfully!
871 03:03:50.807268 Check phy result
872 03:03:50.812305 INFO : End of initialization
873 03:03:50.812629 INFO : End of read dq deskew training
874 03:03:50.817861 INFO : End of MPR read delay center optimization
875 03:03:50.823590 INFO : End of write delay center optimization
876 03:03:50.829105 INFO : End of read delay center optimization
877 03:03:50.829679 INFO : End of max read latency training
878 03:03:50.834814 INFO : Training has run successfully!
879 03:03:50.835264 1D training succeed
880 03:03:50.843109 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 03:03:50.890721 Check phy result
882 03:03:50.891125 INFO : End of initialization
883 03:03:50.913104 INFO : End of 2D read delay Voltage center optimization
884 03:03:50.933234 INFO : End of 2D read delay Voltage center optimization
885 03:03:50.985693 INFO : End of 2D write delay Voltage center optimization
886 03:03:51.035038 INFO : End of 2D write delay Voltage center optimization
887 03:03:51.040673 INFO : Training has run successfully!
888 03:03:51.041737
889 03:03:51.042363 channel==0
890 03:03:51.046245 RxClkDly_Margin_A0==88 ps 9
891 03:03:51.046946 TxDqDly_Margin_A0==98 ps 10
892 03:03:51.051718 RxClkDly_Margin_A1==88 ps 9
893 03:03:51.052508 TxDqDly_Margin_A1==98 ps 10
894 03:03:51.053145 TrainedVREFDQ_A0==74
895 03:03:51.057296 TrainedVREFDQ_A1==74
896 03:03:51.058061 VrefDac_Margin_A0==25
897 03:03:51.058876 DeviceVref_Margin_A0==40
898 03:03:51.062901 VrefDac_Margin_A1==25
899 03:03:51.063460 DeviceVref_Margin_A1==40
900 03:03:51.063916
901 03:03:51.064416
902 03:03:51.068496 channel==1
903 03:03:51.069027 RxClkDly_Margin_A0==98 ps 10
904 03:03:51.069479 TxDqDly_Margin_A0==98 ps 10
905 03:03:51.074127 RxClkDly_Margin_A1==98 ps 10
906 03:03:51.074660 TxDqDly_Margin_A1==98 ps 10
907 03:03:51.079684 TrainedVREFDQ_A0==77
908 03:03:51.080273 TrainedVREFDQ_A1==77
909 03:03:51.080735 VrefDac_Margin_A0==22
910 03:03:51.085305 DeviceVref_Margin_A0==37
911 03:03:51.085846 VrefDac_Margin_A1==24
912 03:03:51.090890 DeviceVref_Margin_A1==37
913 03:03:51.091429
914 03:03:51.091881 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 03:03:51.096466
916 03:03:51.124539 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 03:03:51.125419 2D training succeed
918 03:03:51.130156 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 03:03:51.135714 auto size-- 65535DDR cs0 size: 2048MB
920 03:03:51.136526 DDR cs1 size: 2048MB
921 03:03:51.141315 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 03:03:51.142090 cs0 DataBus test pass
923 03:03:51.146925 cs1 DataBus test pass
924 03:03:51.147650 cs0 AddrBus test pass
925 03:03:51.148320 cs1 AddrBus test pass
926 03:03:51.148935
927 03:03:51.152506 100bdlr_step_size ps== 420
928 03:03:51.153266 result report
929 03:03:51.158146 boot times 0Enable ddr reg access
930 03:03:51.162862 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 03:03:51.176658 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 03:03:51.750222 0.0;M3 CHK:0;cm4_sp_mode 0
933 03:03:51.751051 MVN_1=0x00000000
934 03:03:51.755604 MVN_2=0x00000000
935 03:03:51.761355 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 03:03:51.762024 OPS=0x10
937 03:03:51.762609 ring efuse init
938 03:03:51.763171 chipver efuse init
939 03:03:51.769596 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 03:03:51.770316 [0.018961 Inits done]
941 03:03:51.777363 secure task start!
942 03:03:51.778096 high task start!
943 03:03:51.778704 low task start!
944 03:03:51.779311 run into bl31
945 03:03:51.783848 NOTICE: BL31: v1.3(release):4fc40b1
946 03:03:51.790772 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 03:03:51.791473 NOTICE: BL31: G12A normal boot!
948 03:03:51.817028 NOTICE: BL31: BL33 decompress pass
949 03:03:51.822085 ERROR: Error initializing runtime service opteed_fast
950 03:03:53.055413
951 03:03:53.055811
952 03:03:53.063850 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 03:03:53.064208
954 03:03:53.064433 Model: Libre Computer AML-A311D-CC Alta
955 03:03:53.272364 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 03:03:53.295749 DRAM: 2 GiB (effective 3.8 GiB)
957 03:03:53.438708 Core: 408 devices, 31 uclasses, devicetree: separate
958 03:03:53.444540 WDT: Not starting watchdog@f0d0
959 03:03:53.476922 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 03:03:53.489497 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 03:03:53.493859 ** Bad device specification mmc 0 **
962 03:03:53.504722 Card did not respond to voltage select! : -110
963 03:03:53.512422 ** Bad device specification mmc 0 **
964 03:03:53.512969 Couldn't find partition mmc 0
965 03:03:53.520713 Card did not respond to voltage select! : -110
966 03:03:53.526227 ** Bad device specification mmc 0 **
967 03:03:53.526771 Couldn't find partition mmc 0
968 03:03:53.531327 Error: could not access storage.
969 03:03:53.873624 Net: eth0: ethernet@ff3f0000
970 03:03:53.874046 starting USB...
971 03:03:54.125318 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 03:03:54.125724 Starting the controller
973 03:03:54.132325 USB XHCI 1.10
974 03:03:55.686534 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 03:03:55.694911 scanning usb for storage devices... 0 Storage Device(s) found
977 03:03:55.746085 Hit any key to stop autoboot: 1
978 03:03:55.746974 end: 2.4.2 bootloader-interrupt (duration 00:00:33) [common]
979 03:03:55.747366 start: 2.4.3 bootloader-commands (timeout 00:04:27) [common]
980 03:03:55.747669 Setting prompt string to ['=>']
981 03:03:55.747970 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:27)
982 03:03:55.752425 0
983 03:03:55.753092 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 03:03:55.753412 Sending with 10 millisecond of delay
986 03:03:56.888804 => setenv autoload no
987 03:03:56.899404 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
988 03:03:56.902057 setenv autoload no
989 03:03:56.902570 Sending with 10 millisecond of delay
991 03:03:58.700032 => setenv initrd_high 0xffffffff
992 03:03:58.710810 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
993 03:03:58.711698 setenv initrd_high 0xffffffff
994 03:03:58.712501 Sending with 10 millisecond of delay
996 03:04:00.329863 => setenv fdt_high 0xffffffff
997 03:04:00.340717 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 03:04:00.341728 setenv fdt_high 0xffffffff
999 03:04:00.342506 Sending with 10 millisecond of delay
1001 03:04:00.634632 => dhcp
1002 03:04:00.645258 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1003 03:04:00.645883 dhcp
1004 03:04:00.646108 Speed: 1000, full duplex
1005 03:04:00.646312 BOOTP broadcast 1
1006 03:04:00.865852 DHCP client bound to address 192.168.6.27 (220 ms)
1007 03:04:00.866713 Sending with 10 millisecond of delay
1009 03:04:02.543698 => setenv serverip 192.168.6.2
1010 03:04:02.554520 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1011 03:04:02.555343 setenv serverip 192.168.6.2
1012 03:04:02.556055 Sending with 10 millisecond of delay
1014 03:04:06.281985 => tftpboot 0x01080000 977956/tftp-deploy-4dmuwcsy/kernel/uImage
1015 03:04:06.292764 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1016 03:04:06.293579 tftpboot 0x01080000 977956/tftp-deploy-4dmuwcsy/kernel/uImage
1017 03:04:06.294023 Speed: 1000, full duplex
1018 03:04:06.294435 Using ethernet@ff3f0000 device
1019 03:04:06.295367 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 03:04:06.300997 Filename '977956/tftp-deploy-4dmuwcsy/kernel/uImage'.
1021 03:04:06.304947 Load address: 0x1080000
1022 03:04:09.253569 Loading: *################################################## 43.6 MiB
1023 03:04:09.254271 14.8 MiB/s
1024 03:04:09.254757 done
1025 03:04:09.257839 Bytes transferred = 45716032 (2b99240 hex)
1026 03:04:09.258750 Sending with 10 millisecond of delay
1028 03:04:13.946461 => tftpboot 0x08000000 977956/tftp-deploy-4dmuwcsy/ramdisk/ramdisk.cpio.gz.uboot
1029 03:04:13.957293 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
1030 03:04:13.958162 tftpboot 0x08000000 977956/tftp-deploy-4dmuwcsy/ramdisk/ramdisk.cpio.gz.uboot
1031 03:04:13.958652 Speed: 1000, full duplex
1032 03:04:13.959112 Using ethernet@ff3f0000 device
1033 03:04:13.960068 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 03:04:13.971749 Filename '977956/tftp-deploy-4dmuwcsy/ramdisk/ramdisk.cpio.gz.uboot'.
1035 03:04:13.972293 Load address: 0x8000000
1036 03:04:20.608446 Loading: *##################T ############################### UDP wrong checksum 00000005 00001c22
1037 03:04:25.609409 T UDP wrong checksum 00000005 00001c22
1038 03:04:30.296778 UDP wrong checksum 000000ff 000092ff
1039 03:04:30.333731 UDP wrong checksum 000000ff 000017f2
1040 03:04:31.383171 T UDP wrong checksum 000000ff 00006d19
1041 03:04:31.423304 UDP wrong checksum 000000ff 0000090c
1042 03:04:35.612572 T UDP wrong checksum 00000005 00001c22
1043 03:04:55.616567 T T T T UDP wrong checksum 00000005 00001c22
1044 03:05:02.335446 T UDP wrong checksum 000000ff 00006674
1045 03:05:02.384687 UDP wrong checksum 000000ff 0000f966
1046 03:05:10.620574 T
1047 03:05:10.621214 Retry count exceeded; starting again
1049 03:05:10.622624 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1052 03:05:10.624552 end: 2.4 uboot-commands (duration 00:01:48) [common]
1054 03:05:10.625934 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1056 03:05:10.626964 end: 2 uboot-action (duration 00:01:48) [common]
1058 03:05:10.628536 Cleaning after the job
1059 03:05:10.629105 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/ramdisk
1060 03:05:10.630452 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/kernel
1061 03:05:10.675264 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/dtb
1062 03:05:10.676294 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/nfsrootfs
1063 03:05:10.841644 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/977956/tftp-deploy-4dmuwcsy/modules
1064 03:05:10.863861 start: 4.1 power-off (timeout 00:00:30) [common]
1065 03:05:10.864562 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1066 03:05:10.898968 >> OK - accepted request
1067 03:05:10.901170 Returned 0 in 0 seconds
1068 03:05:11.001948 end: 4.1 power-off (duration 00:00:00) [common]
1070 03:05:11.002952 start: 4.2 read-feedback (timeout 00:10:00) [common]
1071 03:05:11.003603 Listened to connection for namespace 'common' for up to 1s
1072 03:05:12.004111 Finalising connection for namespace 'common'
1073 03:05:12.004827 Disconnecting from shell: Finalise
1074 03:05:12.005352 =>
1075 03:05:12.106411 end: 4.2 read-feedback (duration 00:00:01) [common]
1076 03:05:12.107106 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/977956
1077 03:05:15.956733 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/977956
1078 03:05:15.957364 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.