Boot log: meson-g12b-a311d-libretech-cc

    1 23:19:58.701878  lava-dispatcher, installed at version: 2024.01
    2 23:19:58.702705  start: 0 validate
    3 23:19:58.703175  Start time: 2024-11-06 23:19:58.703146+00:00 (UTC)
    4 23:19:58.703713  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 23:19:58.704299  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 23:19:58.748616  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 23:19:58.749134  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fpm%2Ftesting%2Fv6.12-rc6-116-g471463faceb56%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 23:19:58.781968  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 23:19:58.782625  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fpm%2Ftesting%2Fv6.12-rc6-116-g471463faceb56%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
   10 23:19:58.823947  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 23:19:58.824491  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 23:19:58.859490  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 23:19:58.859964  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fpm%2Ftesting%2Fv6.12-rc6-116-g471463faceb56%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 23:19:58.905340  validate duration: 0.20
   16 23:19:58.906798  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 23:19:58.907392  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 23:19:58.907975  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 23:19:58.908964  Not decompressing ramdisk as can be used compressed.
   20 23:19:58.909722  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
   21 23:19:58.910232  saving as /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/ramdisk/initrd.cpio.gz
   22 23:19:58.910736  total size: 5628169 (5 MB)
   23 23:19:58.953207  progress   0 % (0 MB)
   24 23:19:58.962715  progress   5 % (0 MB)
   25 23:19:58.973126  progress  10 % (0 MB)
   26 23:19:58.977804  progress  15 % (0 MB)
   27 23:19:58.982866  progress  20 % (1 MB)
   28 23:19:58.987441  progress  25 % (1 MB)
   29 23:19:58.992533  progress  30 % (1 MB)
   30 23:19:58.997569  progress  35 % (1 MB)
   31 23:19:59.002168  progress  40 % (2 MB)
   32 23:19:59.006932  progress  45 % (2 MB)
   33 23:19:59.011333  progress  50 % (2 MB)
   34 23:19:59.016220  progress  55 % (2 MB)
   35 23:19:59.021032  progress  60 % (3 MB)
   36 23:19:59.025373  progress  65 % (3 MB)
   37 23:19:59.030172  progress  70 % (3 MB)
   38 23:19:59.034491  progress  75 % (4 MB)
   39 23:19:59.039254  progress  80 % (4 MB)
   40 23:19:59.043523  progress  85 % (4 MB)
   41 23:19:59.048442  progress  90 % (4 MB)
   42 23:19:59.053100  progress  95 % (5 MB)
   43 23:19:59.057006  progress 100 % (5 MB)
   44 23:19:59.057793  5 MB downloaded in 0.15 s (36.50 MB/s)
   45 23:19:59.058460  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 23:19:59.059564  end: 1.1 download-retry (duration 00:00:00) [common]
   48 23:19:59.059936  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 23:19:59.060314  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 23:19:59.060902  downloading http://storage.kernelci.org/pm/testing/v6.12-rc6-116-g471463faceb56/arm64/defconfig/gcc-12/kernel/Image
   51 23:19:59.061216  saving as /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/kernel/Image
   52 23:19:59.061481  total size: 45713920 (43 MB)
   53 23:19:59.061749  No compression specified
   54 23:19:59.101762  progress   0 % (0 MB)
   55 23:19:59.131035  progress   5 % (2 MB)
   56 23:19:59.159792  progress  10 % (4 MB)
   57 23:19:59.187622  progress  15 % (6 MB)
   58 23:19:59.215809  progress  20 % (8 MB)
   59 23:19:59.243165  progress  25 % (10 MB)
   60 23:19:59.271177  progress  30 % (13 MB)
   61 23:19:59.299022  progress  35 % (15 MB)
   62 23:19:59.327067  progress  40 % (17 MB)
   63 23:19:59.354719  progress  45 % (19 MB)
   64 23:19:59.382517  progress  50 % (21 MB)
   65 23:19:59.410657  progress  55 % (24 MB)
   66 23:19:59.438564  progress  60 % (26 MB)
   67 23:19:59.466113  progress  65 % (28 MB)
   68 23:19:59.494134  progress  70 % (30 MB)
   69 23:19:59.522117  progress  75 % (32 MB)
   70 23:19:59.550079  progress  80 % (34 MB)
   71 23:19:59.577629  progress  85 % (37 MB)
   72 23:19:59.605432  progress  90 % (39 MB)
   73 23:19:59.633378  progress  95 % (41 MB)
   74 23:19:59.660888  progress 100 % (43 MB)
   75 23:19:59.661422  43 MB downloaded in 0.60 s (72.67 MB/s)
   76 23:19:59.661892  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 23:19:59.662705  end: 1.2 download-retry (duration 00:00:01) [common]
   79 23:19:59.662981  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 23:19:59.663246  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 23:19:59.663773  downloading http://storage.kernelci.org/pm/testing/v6.12-rc6-116-g471463faceb56/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
   82 23:19:59.664081  saving as /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/dtb/meson-g12b-a311d-libretech-cc.dtb
   83 23:19:59.664291  total size: 54703 (0 MB)
   84 23:19:59.664501  No compression specified
   85 23:19:59.704356  progress  59 % (0 MB)
   86 23:19:59.705223  progress 100 % (0 MB)
   87 23:19:59.705791  0 MB downloaded in 0.04 s (1.26 MB/s)
   88 23:19:59.706287  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 23:19:59.707182  end: 1.3 download-retry (duration 00:00:00) [common]
   91 23:19:59.707501  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 23:19:59.707791  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 23:19:59.708409  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
   94 23:19:59.708693  saving as /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/nfsrootfs/full.rootfs.tar
   95 23:19:59.708910  total size: 120894716 (115 MB)
   96 23:19:59.709133  Using unxz to decompress xz
   97 23:19:59.750989  progress   0 % (0 MB)
   98 23:20:00.596501  progress   5 % (5 MB)
   99 23:20:01.432681  progress  10 % (11 MB)
  100 23:20:02.222961  progress  15 % (17 MB)
  101 23:20:02.957343  progress  20 % (23 MB)
  102 23:20:03.553642  progress  25 % (28 MB)
  103 23:20:04.376953  progress  30 % (34 MB)
  104 23:20:05.162858  progress  35 % (40 MB)
  105 23:20:05.510759  progress  40 % (46 MB)
  106 23:20:05.894347  progress  45 % (51 MB)
  107 23:20:06.655916  progress  50 % (57 MB)
  108 23:20:07.547637  progress  55 % (63 MB)
  109 23:20:08.343965  progress  60 % (69 MB)
  110 23:20:09.110803  progress  65 % (74 MB)
  111 23:20:09.890735  progress  70 % (80 MB)
  112 23:20:10.713757  progress  75 % (86 MB)
  113 23:20:11.505631  progress  80 % (92 MB)
  114 23:20:12.269814  progress  85 % (98 MB)
  115 23:20:13.130155  progress  90 % (103 MB)
  116 23:20:13.907243  progress  95 % (109 MB)
  117 23:20:14.740671  progress 100 % (115 MB)
  118 23:20:14.753158  115 MB downloaded in 15.04 s (7.66 MB/s)
  119 23:20:14.754055  end: 1.4.1 http-download (duration 00:00:15) [common]
  121 23:20:14.755699  end: 1.4 download-retry (duration 00:00:15) [common]
  122 23:20:14.756350  start: 1.5 download-retry (timeout 00:09:44) [common]
  123 23:20:14.756900  start: 1.5.1 http-download (timeout 00:09:44) [common]
  124 23:20:14.757841  downloading http://storage.kernelci.org/pm/testing/v6.12-rc6-116-g471463faceb56/arm64/defconfig/gcc-12/modules.tar.xz
  125 23:20:14.758127  saving as /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/modules/modules.tar
  126 23:20:14.758346  total size: 11605132 (11 MB)
  127 23:20:14.758567  Using unxz to decompress xz
  128 23:20:14.799227  progress   0 % (0 MB)
  129 23:20:14.872607  progress   5 % (0 MB)
  130 23:20:14.947166  progress  10 % (1 MB)
  131 23:20:15.044009  progress  15 % (1 MB)
  132 23:20:15.136454  progress  20 % (2 MB)
  133 23:20:15.215428  progress  25 % (2 MB)
  134 23:20:15.291380  progress  30 % (3 MB)
  135 23:20:15.366043  progress  35 % (3 MB)
  136 23:20:15.443607  progress  40 % (4 MB)
  137 23:20:15.521104  progress  45 % (5 MB)
  138 23:20:15.614891  progress  50 % (5 MB)
  139 23:20:15.693670  progress  55 % (6 MB)
  140 23:20:15.779383  progress  60 % (6 MB)
  141 23:20:15.860449  progress  65 % (7 MB)
  142 23:20:15.937404  progress  70 % (7 MB)
  143 23:20:16.019958  progress  75 % (8 MB)
  144 23:20:16.104548  progress  80 % (8 MB)
  145 23:20:16.185283  progress  85 % (9 MB)
  146 23:20:16.264652  progress  90 % (9 MB)
  147 23:20:16.342638  progress  95 % (10 MB)
  148 23:20:16.420408  progress 100 % (11 MB)
  149 23:20:16.430986  11 MB downloaded in 1.67 s (6.62 MB/s)
  150 23:20:16.431559  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 23:20:16.432803  end: 1.5 download-retry (duration 00:00:02) [common]
  153 23:20:16.433321  start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
  154 23:20:16.433828  start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
  155 23:20:32.877687  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/948249/extract-nfsrootfs-g333h7ny
  156 23:20:32.878291  end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
  157 23:20:32.878576  start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
  158 23:20:32.879249  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07
  159 23:20:32.879721  makedir: /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin
  160 23:20:32.880082  makedir: /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/tests
  161 23:20:32.880406  makedir: /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/results
  162 23:20:32.880733  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-add-keys
  163 23:20:32.881258  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-add-sources
  164 23:20:32.881763  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-background-process-start
  165 23:20:32.882264  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-background-process-stop
  166 23:20:32.882789  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-common-functions
  167 23:20:32.883292  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-echo-ipv4
  168 23:20:32.883790  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-install-packages
  169 23:20:32.884307  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-installed-packages
  170 23:20:32.884835  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-os-build
  171 23:20:32.885353  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-probe-channel
  172 23:20:32.885841  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-probe-ip
  173 23:20:32.886326  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-target-ip
  174 23:20:32.886811  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-target-mac
  175 23:20:32.887320  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-target-storage
  176 23:20:32.887813  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-test-case
  177 23:20:32.888342  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-test-event
  178 23:20:32.888832  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-test-feedback
  179 23:20:32.889323  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-test-raise
  180 23:20:32.889811  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-test-reference
  181 23:20:32.890286  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-test-runner
  182 23:20:32.890781  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-test-set
  183 23:20:32.891263  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-test-shell
  184 23:20:32.891750  Updating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-add-keys (debian)
  185 23:20:32.892325  Updating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-add-sources (debian)
  186 23:20:32.892862  Updating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-install-packages (debian)
  187 23:20:32.893377  Updating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-installed-packages (debian)
  188 23:20:32.893886  Updating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/bin/lava-os-build (debian)
  189 23:20:32.894335  Creating /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/environment
  190 23:20:32.894732  LAVA metadata
  191 23:20:32.894994  - LAVA_JOB_ID=948249
  192 23:20:32.895207  - LAVA_DISPATCHER_IP=192.168.6.2
  193 23:20:32.895569  start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
  194 23:20:32.896606  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  195 23:20:32.896928  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
  196 23:20:32.897135  skipped lava-vland-overlay
  197 23:20:32.897373  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  198 23:20:32.897627  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
  199 23:20:32.897844  skipped lava-multinode-overlay
  200 23:20:32.898082  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  201 23:20:32.898329  start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
  202 23:20:32.898576  Loading test definitions
  203 23:20:32.898849  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
  204 23:20:32.899065  Using /lava-948249 at stage 0
  205 23:20:32.900273  uuid=948249_1.6.2.4.1 testdef=None
  206 23:20:32.900603  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  207 23:20:32.900870  start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
  208 23:20:32.902509  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  210 23:20:32.903314  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
  211 23:20:32.905392  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  213 23:20:32.906255  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
  214 23:20:32.908236  runner path: /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/0/tests/0_timesync-off test_uuid 948249_1.6.2.4.1
  215 23:20:32.908902  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  217 23:20:32.909737  start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
  218 23:20:32.909963  Using /lava-948249 at stage 0
  219 23:20:32.910342  Fetching tests from https://github.com/kernelci/test-definitions.git
  220 23:20:32.910645  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/0/tests/1_kselftest-dt'
  221 23:20:36.348864  Running '/usr/bin/git checkout kernelci.org
  222 23:20:36.647163  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
  223 23:20:36.648602  uuid=948249_1.6.2.4.5 testdef=None
  224 23:20:36.648946  end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
  226 23:20:36.649686  start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
  227 23:20:36.652509  end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
  229 23:20:36.653320  start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
  230 23:20:36.657002  end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
  232 23:20:36.657854  start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
  233 23:20:36.661446  runner path: /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/0/tests/1_kselftest-dt test_uuid 948249_1.6.2.4.5
  234 23:20:36.661731  BOARD='meson-g12b-a311d-libretech-cc'
  235 23:20:36.661936  BRANCH='pm'
  236 23:20:36.662131  SKIPFILE='/dev/null'
  237 23:20:36.662327  SKIP_INSTALL='True'
  238 23:20:36.662520  TESTPROG_URL='http://storage.kernelci.org/pm/testing/v6.12-rc6-116-g471463faceb56/arm64/defconfig/gcc-12/kselftest.tar.xz'
  239 23:20:36.662720  TST_CASENAME=''
  240 23:20:36.662915  TST_CMDFILES='dt'
  241 23:20:36.663461  end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
  243 23:20:36.664272  Creating lava-test-runner.conf files
  244 23:20:36.664476  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/948249/lava-overlay-v_4vdy07/lava-948249/0 for stage 0
  245 23:20:36.664828  - 0_timesync-off
  246 23:20:36.665063  - 1_kselftest-dt
  247 23:20:36.665389  end: 1.6.2.4 test-definition (duration 00:00:04) [common]
  248 23:20:36.665664  start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
  249 23:21:00.127079  end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
  250 23:21:00.127540  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
  251 23:21:00.127949  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  252 23:21:00.128323  end: 1.6.2 lava-overlay (duration 00:00:27) [common]
  253 23:21:00.128697  start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
  254 23:21:00.990348  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  255 23:21:00.990874  start: 1.6.4 extract-modules (timeout 00:08:58) [common]
  256 23:21:00.991164  extracting modules file /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/948249/extract-nfsrootfs-g333h7ny
  257 23:21:02.401484  extracting modules file /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/948249/extract-overlay-ramdisk-lv44rgvm/ramdisk
  258 23:21:03.810614  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  259 23:21:03.811088  start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
  260 23:21:03.811366  [common] Applying overlay to NFS
  261 23:21:03.811581  [common] Applying overlay /var/lib/lava/dispatcher/tmp/948249/compress-overlay-ub8fb8ic/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/948249/extract-nfsrootfs-g333h7ny
  262 23:21:06.569771  end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
  263 23:21:06.570253  start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
  264 23:21:06.570527  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
  265 23:21:06.570761  Converting downloaded kernel to a uImage
  266 23:21:06.571071  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/kernel/Image /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/kernel/uImage
  267 23:21:07.070699  output: Image Name:   
  268 23:21:07.071139  output: Created:      Wed Nov  6 23:21:06 2024
  269 23:21:07.071382  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  270 23:21:07.071619  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  271 23:21:07.071848  output: Load Address: 01080000
  272 23:21:07.072122  output: Entry Point:  01080000
  273 23:21:07.072357  output: 
  274 23:21:07.072731  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
  275 23:21:07.073037  end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
  276 23:21:07.073349  start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
  277 23:21:07.073665  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  278 23:21:07.074042  start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
  279 23:21:07.074373  Building ramdisk /var/lib/lava/dispatcher/tmp/948249/extract-overlay-ramdisk-lv44rgvm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/948249/extract-overlay-ramdisk-lv44rgvm/ramdisk
  280 23:21:09.753962  >> 166823 blocks

  281 23:21:17.523062  Adding RAMdisk u-boot header.
  282 23:21:17.523529  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/948249/extract-overlay-ramdisk-lv44rgvm/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/948249/extract-overlay-ramdisk-lv44rgvm/ramdisk.cpio.gz.uboot
  283 23:21:17.769469  output: Image Name:   
  284 23:21:17.769884  output: Created:      Wed Nov  6 23:21:17 2024
  285 23:21:17.770100  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  286 23:21:17.770306  output: Data Size:    23432163 Bytes = 22882.97 KiB = 22.35 MiB
  287 23:21:17.770506  output: Load Address: 00000000
  288 23:21:17.770705  output: Entry Point:  00000000
  289 23:21:17.770904  output: 
  290 23:21:17.771569  rename /var/lib/lava/dispatcher/tmp/948249/extract-overlay-ramdisk-lv44rgvm/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/ramdisk/ramdisk.cpio.gz.uboot
  291 23:21:17.772041  end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
  292 23:21:17.772618  end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
  293 23:21:17.773146  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
  294 23:21:17.773597  No LXC device requested
  295 23:21:17.774091  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  296 23:21:17.774595  start: 1.8 deploy-device-env (timeout 00:08:41) [common]
  297 23:21:17.775087  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  298 23:21:17.775497  Checking files for TFTP limit of 4294967296 bytes.
  299 23:21:17.778183  end: 1 tftp-deploy (duration 00:01:19) [common]
  300 23:21:17.778771  start: 2 uboot-action (timeout 00:05:00) [common]
  301 23:21:17.779293  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  302 23:21:17.779786  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  303 23:21:17.780318  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  304 23:21:17.780846  Using kernel file from prepare-kernel: 948249/tftp-deploy-1n93oqw8/kernel/uImage
  305 23:21:17.781474  substitutions:
  306 23:21:17.781881  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  307 23:21:17.782281  - {DTB_ADDR}: 0x01070000
  308 23:21:17.782677  - {DTB}: 948249/tftp-deploy-1n93oqw8/dtb/meson-g12b-a311d-libretech-cc.dtb
  309 23:21:17.783082  - {INITRD}: 948249/tftp-deploy-1n93oqw8/ramdisk/ramdisk.cpio.gz.uboot
  310 23:21:17.783481  - {KERNEL_ADDR}: 0x01080000
  311 23:21:17.783872  - {KERNEL}: 948249/tftp-deploy-1n93oqw8/kernel/uImage
  312 23:21:17.784294  - {LAVA_MAC}: None
  313 23:21:17.784724  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/948249/extract-nfsrootfs-g333h7ny
  314 23:21:17.785122  - {NFS_SERVER_IP}: 192.168.6.2
  315 23:21:17.785534  - {PRESEED_CONFIG}: None
  316 23:21:17.785929  - {PRESEED_LOCAL}: None
  317 23:21:17.786318  - {RAMDISK_ADDR}: 0x08000000
  318 23:21:17.786701  - {RAMDISK}: 948249/tftp-deploy-1n93oqw8/ramdisk/ramdisk.cpio.gz.uboot
  319 23:21:17.787090  - {ROOT_PART}: None
  320 23:21:17.787475  - {ROOT}: None
  321 23:21:17.787863  - {SERVER_IP}: 192.168.6.2
  322 23:21:17.788285  - {TEE_ADDR}: 0x83000000
  323 23:21:17.788671  - {TEE}: None
  324 23:21:17.789055  Parsed boot commands:
  325 23:21:17.789430  - setenv autoload no
  326 23:21:17.789813  - setenv initrd_high 0xffffffff
  327 23:21:17.790197  - setenv fdt_high 0xffffffff
  328 23:21:17.790582  - dhcp
  329 23:21:17.790980  - setenv serverip 192.168.6.2
  330 23:21:17.791372  - tftpboot 0x01080000 948249/tftp-deploy-1n93oqw8/kernel/uImage
  331 23:21:17.791763  - tftpboot 0x08000000 948249/tftp-deploy-1n93oqw8/ramdisk/ramdisk.cpio.gz.uboot
  332 23:21:17.792181  - tftpboot 0x01070000 948249/tftp-deploy-1n93oqw8/dtb/meson-g12b-a311d-libretech-cc.dtb
  333 23:21:17.792577  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/948249/extract-nfsrootfs-g333h7ny,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  334 23:21:17.792980  - bootm 0x01080000 0x08000000 0x01070000
  335 23:21:17.793488  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  337 23:21:17.794973  start: 2.3 connect-device (timeout 00:05:00) [common]
  338 23:21:17.795390  [common] connect-device Connecting to device using 'telnet conserv1 3007'
  339 23:21:17.809374  Setting prompt string to ['lava-test: # ']
  340 23:21:17.810925  end: 2.3 connect-device (duration 00:00:00) [common]
  341 23:21:17.811532  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  342 23:21:17.812140  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  343 23:21:17.812705  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  344 23:21:17.813834  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
  345 23:21:17.848286  >> OK - accepted request

  346 23:21:17.850372  Returned 0 in 0 seconds
  347 23:21:17.951355  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  349 23:21:17.953247  end: 2.4.1 reset-device (duration 00:00:00) [common]
  350 23:21:17.953856  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  351 23:21:17.954384  Setting prompt string to ['Hit any key to stop autoboot']
  352 23:21:17.954841  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  353 23:21:17.956479  Trying 192.168.56.21...
  354 23:21:17.956987  Connected to conserv1.
  355 23:21:17.957392  Escape character is '^]'.
  356 23:21:17.957801  
  357 23:21:17.958220  ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  358 23:21:17.958630  
  359 23:21:30.435642  G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  360 23:21:30.436320  bl2_stage_init 0x01
  361 23:21:30.436762  bl2_stage_init 0x81
  362 23:21:30.441276  hw id: 0x0000 - pwm id 0x01
  363 23:21:30.441794  bl2_stage_init 0xc1
  364 23:21:30.442224  bl2_stage_init 0x02
  365 23:21:30.442661  
  366 23:21:30.446830  L0:00000000
  367 23:21:30.447344  L1:20000703
  368 23:21:30.447753  L2:00008067
  369 23:21:30.448193  L3:14000000
  370 23:21:30.452535  B2:00402000
  371 23:21:30.453002  B1:e0f83180
  372 23:21:30.453398  
  373 23:21:30.453787  TE: 58159
  374 23:21:30.454174  
  375 23:21:30.458004  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  376 23:21:30.458453  
  377 23:21:30.458843  Board ID = 1
  378 23:21:30.463557  Set A53 clk to 24M
  379 23:21:30.464029  Set A73 clk to 24M
  380 23:21:30.464422  Set clk81 to 24M
  381 23:21:30.469099  A53 clk: 1200 MHz
  382 23:21:30.469538  A73 clk: 1200 MHz
  383 23:21:30.469920  CLK81: 166.6M
  384 23:21:30.470295  smccc: 00012ab5
  385 23:21:30.474679  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  386 23:21:30.480292  board id: 1
  387 23:21:30.486174  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  388 23:21:30.496837  fw parse done
  389 23:21:30.502826  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  390 23:21:30.545417  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  391 23:21:30.556443  PIEI prepare done
  392 23:21:30.556921  fastboot data load
  393 23:21:30.557312  fastboot data verify
  394 23:21:30.562005  verify result: 266
  395 23:21:30.567602  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  396 23:21:30.568096  LPDDR4 probe
  397 23:21:30.568513  ddr clk to 1584MHz
  398 23:21:30.575630  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  399 23:21:30.612862  
  400 23:21:30.613332  dmc_version 0001
  401 23:21:30.619514  Check phy result
  402 23:21:30.625409  INFO : End of CA training
  403 23:21:30.625863  INFO : End of initialization
  404 23:21:30.630957  INFO : Training has run successfully!
  405 23:21:30.631404  Check phy result
  406 23:21:30.636604  INFO : End of initialization
  407 23:21:30.637052  INFO : End of read enable training
  408 23:21:30.642201  INFO : End of fine write leveling
  409 23:21:30.647810  INFO : End of Write leveling coarse delay
  410 23:21:30.648329  INFO : Training has run successfully!
  411 23:21:30.648746  Check phy result
  412 23:21:30.653459  INFO : End of initialization
  413 23:21:30.653917  INFO : End of read dq deskew training
  414 23:21:30.659000  INFO : End of MPR read delay center optimization
  415 23:21:30.664580  INFO : End of write delay center optimization
  416 23:21:30.670169  INFO : End of read delay center optimization
  417 23:21:30.670624  INFO : End of max read latency training
  418 23:21:30.675762  INFO : Training has run successfully!
  419 23:21:30.676265  1D training succeed
  420 23:21:30.684938  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  421 23:21:30.732597  Check phy result
  422 23:21:30.733091  INFO : End of initialization
  423 23:21:30.754324  INFO : End of 2D read delay Voltage center optimization
  424 23:21:30.773759  INFO : End of 2D read delay Voltage center optimization
  425 23:21:30.825753  INFO : End of 2D write delay Voltage center optimization
  426 23:21:30.875212  INFO : End of 2D write delay Voltage center optimization
  427 23:21:30.880735  INFO : Training has run successfully!
  428 23:21:30.881204  
  429 23:21:30.881619  channel==0
  430 23:21:30.886260  RxClkDly_Margin_A0==88 ps 9
  431 23:21:30.886713  TxDqDly_Margin_A0==98 ps 10
  432 23:21:30.891822  RxClkDly_Margin_A1==88 ps 9
  433 23:21:30.892310  TxDqDly_Margin_A1==98 ps 10
  434 23:21:30.892717  TrainedVREFDQ_A0==74
  435 23:21:30.897602  TrainedVREFDQ_A1==74
  436 23:21:30.898063  VrefDac_Margin_A0==25
  437 23:21:30.898468  DeviceVref_Margin_A0==40
  438 23:21:30.903130  VrefDac_Margin_A1==25
  439 23:21:30.903582  DeviceVref_Margin_A1==40
  440 23:21:30.904008  
  441 23:21:30.904417  
  442 23:21:30.908724  channel==1
  443 23:21:30.909181  RxClkDly_Margin_A0==88 ps 9
  444 23:21:30.909585  TxDqDly_Margin_A0==98 ps 10
  445 23:21:30.914293  RxClkDly_Margin_A1==88 ps 9
  446 23:21:30.914753  TxDqDly_Margin_A1==88 ps 9
  447 23:21:30.919900  TrainedVREFDQ_A0==77
  448 23:21:30.920387  TrainedVREFDQ_A1==77
  449 23:21:30.920794  VrefDac_Margin_A0==23
  450 23:21:30.925614  DeviceVref_Margin_A0==37
  451 23:21:30.926083  VrefDac_Margin_A1==24
  452 23:21:30.931121  DeviceVref_Margin_A1==37
  453 23:21:30.931589  
  454 23:21:30.932029   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  455 23:21:30.932441  
  456 23:21:30.964659  soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
  457 23:21:30.965270  2D training succeed
  458 23:21:30.970314  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  459 23:21:30.975813  auto size-- 65535DDR cs0 size: 2048MB
  460 23:21:30.976323  DDR cs1 size: 2048MB
  461 23:21:30.982115  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  462 23:21:30.982604  cs0 DataBus test pass
  463 23:21:30.986986  cs1 DataBus test pass
  464 23:21:30.987445  cs0 AddrBus test pass
  465 23:21:30.987851  cs1 AddrBus test pass
  466 23:21:30.988278  
  467 23:21:30.992590  100bdlr_step_size ps== 420
  468 23:21:30.993059  result report
  469 23:21:30.998176  boot times 0Enable ddr reg access
  470 23:21:31.002595  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  471 23:21:31.016910  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  472 23:21:31.590487  0.0;M3 CHK:0;cm4_sp_mode 0
  473 23:21:31.590930  MVN_1=0x00000000
  474 23:21:31.596018  MVN_2=0x00000000
  475 23:21:31.601730  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  476 23:21:31.602153  OPS=0x10
  477 23:21:31.602408  ring efuse init
  478 23:21:31.602625  chipver efuse init
  479 23:21:31.607351  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  480 23:21:31.612910  [0.018961 Inits done]
  481 23:21:31.613213  secure task start!
  482 23:21:31.613429  high task start!
  483 23:21:31.617498  low task start!
  484 23:21:31.617902  run into bl31
  485 23:21:31.624218  NOTICE:  BL31: v1.3(release):4fc40b1
  486 23:21:31.632094  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  487 23:21:31.632539  NOTICE:  BL31: G12A normal boot!
  488 23:21:31.657953  NOTICE:  BL31: BL33 decompress pass
  489 23:21:31.663606  ERROR:   Error initializing runtime service opteed_fast
  490 23:21:32.896712  
  491 23:21:32.897247  
  492 23:21:32.905045  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  493 23:21:32.905453  
  494 23:21:32.905735  Model: Libre Computer AML-A311D-CC Alta
  495 23:21:33.113721  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  496 23:21:33.136996  DRAM:  2 GiB (effective 3.8 GiB)
  497 23:21:33.280057  Core:  408 devices, 31 uclasses, devicetree: separate
  498 23:21:33.285899  WDT:   Not starting watchdog@f0d0
  499 23:21:33.318114  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  500 23:21:33.330455  Loading Environment from FAT... Card did not respond to voltage select! : -110
  501 23:21:33.335522  ** Bad device specification mmc 0 **
  502 23:21:33.345897  Card did not respond to voltage select! : -110
  503 23:21:33.353492  ** Bad device specification mmc 0 **
  504 23:21:33.354102  Couldn't find partition mmc 0
  505 23:21:33.361873  Card did not respond to voltage select! : -110
  506 23:21:33.367360  ** Bad device specification mmc 0 **
  507 23:21:33.368008  Couldn't find partition mmc 0
  508 23:21:33.372454  Error: could not access storage.
  509 23:21:34.636154  G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  510 23:21:34.636768  bl2_stage_init 0x01
  511 23:21:34.637196  bl2_stage_init 0x81
  512 23:21:34.641748  hw id: 0x0000 - pwm id 0x01
  513 23:21:34.642360  bl2_stage_init 0xc1
  514 23:21:34.642907  bl2_stage_init 0x02
  515 23:21:34.643443  
  516 23:21:34.647329  L0:00000000
  517 23:21:34.647927  L1:20000703
  518 23:21:34.648535  L2:00008067
  519 23:21:34.649074  L3:14000000
  520 23:21:34.650156  B2:00402000
  521 23:21:34.650743  B1:e0f83180
  522 23:21:34.651278  
  523 23:21:34.651814  TE: 58124
  524 23:21:34.652377  
  525 23:21:34.661240  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  526 23:21:34.661732  
  527 23:21:34.662150  Board ID = 1
  528 23:21:34.662551  Set A53 clk to 24M
  529 23:21:34.662953  Set A73 clk to 24M
  530 23:21:34.666895  Set clk81 to 24M
  531 23:21:34.667379  A53 clk: 1200 MHz
  532 23:21:34.667789  A73 clk: 1200 MHz
  533 23:21:34.672515  CLK81: 166.6M
  534 23:21:34.672970  smccc: 00012a92
  535 23:21:34.678074  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  536 23:21:34.678529  board id: 1
  537 23:21:34.686668  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  538 23:21:34.697306  fw parse done
  539 23:21:34.703268  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  540 23:21:34.745912  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  541 23:21:34.756944  PIEI prepare done
  542 23:21:34.757412  fastboot data load
  543 23:21:34.757829  fastboot data verify
  544 23:21:34.762476  verify result: 266
  545 23:21:34.768213  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  546 23:21:34.768696  LPDDR4 probe
  547 23:21:34.769101  ddr clk to 1584MHz
  548 23:21:34.776159  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  549 23:21:34.813338  
  550 23:21:34.813847  dmc_version 0001
  551 23:21:34.820090  Check phy result
  552 23:21:34.826044  INFO : End of CA training
  553 23:21:34.826518  INFO : End of initialization
  554 23:21:34.831484  INFO : Training has run successfully!
  555 23:21:34.831948  Check phy result
  556 23:21:34.837125  INFO : End of initialization
  557 23:21:34.837589  INFO : End of read enable training
  558 23:21:34.842702  INFO : End of fine write leveling
  559 23:21:34.848333  INFO : End of Write leveling coarse delay
  560 23:21:34.848962  INFO : Training has run successfully!
  561 23:21:34.849512  Check phy result
  562 23:21:34.854010  INFO : End of initialization
  563 23:21:34.854479  INFO : End of read dq deskew training
  564 23:21:34.859558  INFO : End of MPR read delay center optimization
  565 23:21:34.865150  INFO : End of write delay center optimization
  566 23:21:34.870770  INFO : End of read delay center optimization
  567 23:21:34.871252  INFO : End of max read latency training
  568 23:21:34.876324  INFO : Training has run successfully!
  569 23:21:34.876793  1D training succeed
  570 23:21:34.885447  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  571 23:21:34.933250  Check phy result
  572 23:21:34.933765  INFO : End of initialization
  573 23:21:34.954822  INFO : End of 2D read delay Voltage center optimization
  574 23:21:34.975174  INFO : End of 2D read delay Voltage center optimization
  575 23:21:35.027203  INFO : End of 2D write delay Voltage center optimization
  576 23:21:35.076610  INFO : End of 2D write delay Voltage center optimization
  577 23:21:35.082130  INFO : Training has run successfully!
  578 23:21:35.082668  
  579 23:21:35.083087  channel==0
  580 23:21:35.087683  RxClkDly_Margin_A0==88 ps 9
  581 23:21:35.088234  TxDqDly_Margin_A0==98 ps 10
  582 23:21:35.090942  RxClkDly_Margin_A1==88 ps 9
  583 23:21:35.091411  TxDqDly_Margin_A1==98 ps 10
  584 23:21:35.096468  TrainedVREFDQ_A0==74
  585 23:21:35.096950  TrainedVREFDQ_A1==74
  586 23:21:35.102098  VrefDac_Margin_A0==25
  587 23:21:35.102597  DeviceVref_Margin_A0==40
  588 23:21:35.103007  VrefDac_Margin_A1==25
  589 23:21:35.107705  DeviceVref_Margin_A1==40
  590 23:21:35.108241  
  591 23:21:35.108657  
  592 23:21:35.109061  channel==1
  593 23:21:35.109455  RxClkDly_Margin_A0==98 ps 10
  594 23:21:35.113273  TxDqDly_Margin_A0==98 ps 10
  595 23:21:35.113788  RxClkDly_Margin_A1==98 ps 10
  596 23:21:35.118959  TxDqDly_Margin_A1==88 ps 9
  597 23:21:35.119464  TrainedVREFDQ_A0==77
  598 23:21:35.119874  TrainedVREFDQ_A1==77
  599 23:21:35.124433  VrefDac_Margin_A0==22
  600 23:21:35.124899  DeviceVref_Margin_A0==37
  601 23:21:35.130025  VrefDac_Margin_A1==24
  602 23:21:35.130484  DeviceVref_Margin_A1==37
  603 23:21:35.130885  
  604 23:21:35.135676   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  605 23:21:35.136184  
  606 23:21:35.163630  soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
  607 23:21:35.169297  2D training succeed
  608 23:21:35.174909  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  609 23:21:35.175438  auto size-- 65535DDR cs0 size: 2048MB
  610 23:21:35.180461  DDR cs1 size: 2048MB
  611 23:21:35.180956  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  612 23:21:35.186062  cs0 DataBus test pass
  613 23:21:35.186541  cs1 DataBus test pass
  614 23:21:35.186951  cs0 AddrBus test pass
  615 23:21:35.191634  cs1 AddrBus test pass
  616 23:21:35.192153  
  617 23:21:35.192569  100bdlr_step_size ps== 420
  618 23:21:35.192981  result report
  619 23:21:35.197231  boot times 0Enable ddr reg access
  620 23:21:35.205143  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  621 23:21:35.218477  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  622 23:21:35.792348  0.0;M3 CHK:0;cm4_sp_mode 0
  623 23:21:35.793157  MVN_1=0x00000000
  624 23:21:35.797942  MVN_2=0x00000000
  625 23:21:35.803632  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  626 23:21:35.803935  OPS=0x10
  627 23:21:35.804304  ring efuse init
  628 23:21:35.804749  chipver efuse init
  629 23:21:35.811911  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  630 23:21:35.812251  [0.018960 Inits done]
  631 23:21:35.812498  secure task start!
  632 23:21:35.819277  high task start!
  633 23:21:35.819936  low task start!
  634 23:21:35.820515  run into bl31
  635 23:21:35.825913  NOTICE:  BL31: v1.3(release):4fc40b1
  636 23:21:35.833737  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  637 23:21:35.834372  NOTICE:  BL31: G12A normal boot!
  638 23:21:35.859194  NOTICE:  BL31: BL33 decompress pass
  639 23:21:35.864827  ERROR:   Error initializing runtime service opteed_fast
  640 23:21:37.098004  
  641 23:21:37.098807  
  642 23:21:37.106319  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  643 23:21:37.106961  
  644 23:21:37.107508  Model: Libre Computer AML-A311D-CC Alta
  645 23:21:37.314827  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  646 23:21:37.338179  DRAM:  2 GiB (effective 3.8 GiB)
  647 23:21:37.481081  Core:  408 devices, 31 uclasses, devicetree: separate
  648 23:21:37.486952  WDT:   Not starting watchdog@f0d0
  649 23:21:37.519114  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  650 23:21:37.531586  Loading Environment from FAT... Card did not respond to voltage select! : -110
  651 23:21:37.536683  ** Bad device specification mmc 0 **
  652 23:21:37.546988  Card did not respond to voltage select! : -110
  653 23:21:37.554681  ** Bad device specification mmc 0 **
  654 23:21:37.555308  Couldn't find partition mmc 0
  655 23:21:37.563008  Card did not respond to voltage select! : -110
  656 23:21:37.568512  ** Bad device specification mmc 0 **
  657 23:21:37.569119  Couldn't find partition mmc 0
  658 23:21:37.573594  Error: could not access storage.
  659 23:21:37.916102  Net:   eth0: ethernet@ff3f0000
  660 23:21:37.916912  starting USB...
  661 23:21:38.167830  Bus usb@ff500000: Register 3000140 NbrPorts 3
  662 23:21:38.168658  Starting the controller
  663 23:21:38.174834  USB XHCI 1.10
  664 23:21:39.885060  scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  665 23:21:39.885886  bl2_stage_init 0x01
  666 23:21:39.886450  bl2_stage_init 0x81
  667 23:21:39.890460  hw id: 0x0000 - pwm id 0x01
  668 23:21:39.891107  bl2_stage_init 0xc1
  669 23:21:39.891655  bl2_stage_init 0x02
  670 23:21:39.892242  
  671 23:21:39.896788  L0:00000000
  672 23:21:39.897478  L1:20000703
  673 23:21:39.898048  L2:00008067
  674 23:21:39.898591  L3:14000000
  675 23:21:39.901904  B2:00402000
  676 23:21:39.902540  B1:e0f83180
  677 23:21:39.903125  
  678 23:21:39.903657  TE: 58124
  679 23:21:39.904209  
  680 23:21:39.907259  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  681 23:21:39.907873  
  682 23:21:39.908447  Board ID = 1
  683 23:21:39.913024  Set A53 clk to 24M
  684 23:21:39.913667  Set A73 clk to 24M
  685 23:21:39.914202  Set clk81 to 24M
  686 23:21:39.918384  A53 clk: 1200 MHz
  687 23:21:39.919014  A73 clk: 1200 MHz
  688 23:21:39.919549  CLK81: 166.6M
  689 23:21:39.920104  smccc: 00012a91
  690 23:21:39.927747  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  691 23:21:39.930449  board id: 1
  692 23:21:39.935516  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  693 23:21:39.946294  fw parse done
  694 23:21:39.952229  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  695 23:21:39.994649  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  696 23:21:40.005601  PIEI prepare done
  697 23:21:40.006261  fastboot data load
  698 23:21:40.006812  fastboot data verify
  699 23:21:40.011166  verify result: 266
  700 23:21:40.016768  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  701 23:21:40.017394  LPDDR4 probe
  702 23:21:40.017919  ddr clk to 1584MHz
  703 23:21:40.024865  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  704 23:21:40.062077  
  705 23:21:40.062495  dmc_version 0001
  706 23:21:40.068532  Check phy result
  707 23:21:40.074377  INFO : End of CA training
  708 23:21:40.074676  INFO : End of initialization
  709 23:21:40.080063  INFO : Training has run successfully!
  710 23:21:40.080416  Check phy result
  711 23:21:40.085956  INFO : End of initialization
  712 23:21:40.086352  INFO : End of read enable training
  713 23:21:40.091229  INFO : End of fine write leveling
  714 23:21:40.096771  INFO : End of Write leveling coarse delay
  715 23:21:40.097081  INFO : Training has run successfully!
  716 23:21:40.097306  Check phy result
  717 23:21:40.102455  INFO : End of initialization
  718 23:21:40.102721  INFO : End of read dq deskew training
  719 23:21:40.108088  INFO : End of MPR read delay center optimization
  720 23:21:40.113591  INFO : End of write delay center optimization
  721 23:21:40.119126  INFO : End of read delay center optimization
  722 23:21:40.119430  INFO : End of max read latency training
  723 23:21:40.124814  INFO : Training has run successfully!
  724 23:21:40.125424  1D training succeed
  725 23:21:40.133988  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  726 23:21:40.181716  Check phy result
  727 23:21:40.182107  INFO : End of initialization
  728 23:21:40.203420  INFO : End of 2D read delay Voltage center optimization
  729 23:21:40.223703  INFO : End of 2D read delay Voltage center optimization
  730 23:21:40.275701  INFO : End of 2D write delay Voltage center optimization
  731 23:21:40.325041  INFO : End of 2D write delay Voltage center optimization
  732 23:21:40.330530  INFO : Training has run successfully!
  733 23:21:40.330843  
  734 23:21:40.331066  channel==0
  735 23:21:40.336179  RxClkDly_Margin_A0==88 ps 9
  736 23:21:40.336525  TxDqDly_Margin_A0==98 ps 10
  737 23:21:40.341723  RxClkDly_Margin_A1==88 ps 9
  738 23:21:40.342070  TxDqDly_Margin_A1==98 ps 10
  739 23:21:40.342300  TrainedVREFDQ_A0==74
  740 23:21:40.347327  TrainedVREFDQ_A1==74
  741 23:21:40.347657  VrefDac_Margin_A0==25
  742 23:21:40.347876  DeviceVref_Margin_A0==40
  743 23:21:40.352941  VrefDac_Margin_A1==25
  744 23:21:40.353272  DeviceVref_Margin_A1==40
  745 23:21:40.353496  
  746 23:21:40.353713  
  747 23:21:40.358483  channel==1
  748 23:21:40.358769  RxClkDly_Margin_A0==98 ps 10
  749 23:21:40.358990  TxDqDly_Margin_A0==98 ps 10
  750 23:21:40.364101  RxClkDly_Margin_A1==98 ps 10
  751 23:21:40.364402  TxDqDly_Margin_A1==108 ps 11
  752 23:21:40.369681  TrainedVREFDQ_A0==77
  753 23:21:40.369979  TrainedVREFDQ_A1==78
  754 23:21:40.370198  VrefDac_Margin_A0==22
  755 23:21:40.375271  DeviceVref_Margin_A0==37
  756 23:21:40.375570  VrefDac_Margin_A1==22
  757 23:21:40.380873  DeviceVref_Margin_A1==36
  758 23:21:40.381174  
  759 23:21:40.386500   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  760 23:21:40.386801  
  761 23:21:40.414555  soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
  762 23:21:40.414956  2D training succeed
  763 23:21:40.420181  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  764 23:21:40.425702  auto size-- 65535DDR cs0 size: 2048MB
  765 23:21:40.426158  DDR cs1 size: 2048MB
  766 23:21:40.431281  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  767 23:21:40.431726  cs0 DataBus test pass
  768 23:21:40.436898  cs1 DataBus test pass
  769 23:21:40.437332  cs0 AddrBus test pass
  770 23:21:40.437729  cs1 AddrBus test pass
  771 23:21:40.438120  
  772 23:21:40.442513  100bdlr_step_size ps== 420
  773 23:21:40.442959  result report
  774 23:21:40.448138  boot times 0Enable ddr reg access
  775 23:21:40.453759  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  776 23:21:40.467220  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  777 23:21:41.040953  0.0;M3 CHK:0;cm4_sp_mode 0
  778 23:21:41.041585  MVN_1=0x00000000
  779 23:21:41.046382  MVN_2=0x00000000
  780 23:21:41.052186  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  781 23:21:41.052741  OPS=0x10
  782 23:21:41.053142  ring efuse init
  783 23:21:41.053528  chipver efuse init
  784 23:21:41.057722  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  785 23:21:41.063299  [0.018961 Inits done]
  786 23:21:41.063731  secure task start!
  787 23:21:41.064168  high task start!
  788 23:21:41.067873  low task start!
  789 23:21:41.068333  run into bl31
  790 23:21:41.074538  NOTICE:  BL31: v1.3(release):4fc40b1
  791 23:21:41.082360  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  792 23:21:41.082821  NOTICE:  BL31: G12A normal boot!
  793 23:21:41.107755  NOTICE:  BL31: BL33 decompress pass
  794 23:21:41.113340  ERROR:   Error initializing runtime service opteed_fast
  795 23:21:42.346348  
  796 23:21:42.346798  
  797 23:21:42.354641  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  798 23:21:42.354981  
  799 23:21:42.355227  Model: Libre Computer AML-A311D-CC Alta
  800 23:21:42.563062  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  801 23:21:42.586490  DRAM:  2 GiB (effective 3.8 GiB)
  802 23:21:42.729485  Core:  408 devices, 31 uclasses, devicetree: separate
  803 23:21:42.735333  WDT:   Not starting watchdog@f0d0
  804 23:21:42.767613  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  805 23:21:42.780073  Loading Environment from FAT... Card did not respond to voltage select! : -110
  806 23:21:42.785048  ** Bad device specification mmc 0 **
  807 23:21:42.795367  Card did not respond to voltage select! : -110
  808 23:21:42.803005  ** Bad device specification mmc 0 **
  809 23:21:42.803343  Couldn't find partition mmc 0
  810 23:21:42.811367  Card did not respond to voltage select! : -110
  811 23:21:42.816947  ** Bad device specification mmc 0 **
  812 23:21:42.817269  Couldn't find partition mmc 0
  813 23:21:42.821991  Error: could not access storage.
  814 23:21:43.164494  Net:   eth0: ethernet@ff3f0000
  815 23:21:43.164943  starting USB...
  816 23:21:43.416279  Bus usb@ff500000: Register 3000140 NbrPorts 3
  817 23:21:43.416708  Starting the controller
  818 23:21:43.423150  USB XHCI 1.10
  819 23:21:45.584979  scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
  820 23:21:45.585605  bl2_stage_init 0x01
  821 23:21:45.586036  bl2_stage_init 0x81
  822 23:21:45.590517  hw id: 0x0000 - pwm id 0x01
  823 23:21:45.590964  bl2_stage_init 0xc1
  824 23:21:45.591374  bl2_stage_init 0x02
  825 23:21:45.591777  
  826 23:21:45.596071  L0:00000000
  827 23:21:45.596514  L1:20000703
  828 23:21:45.596918  L2:00008067
  829 23:21:45.597312  L3:14000000
  830 23:21:45.601668  B2:00402000
  831 23:21:45.602107  B1:e0f83180
  832 23:21:45.602511  
  833 23:21:45.602910  TE: 58159
  834 23:21:45.603313  
  835 23:21:45.607283  BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
  836 23:21:45.607724  
  837 23:21:45.608160  Board ID = 1
  838 23:21:45.612862  Set A53 clk to 24M
  839 23:21:45.613359  Set A73 clk to 24M
  840 23:21:45.613767  Set clk81 to 24M
  841 23:21:45.618563  A53 clk: 1200 MHz
  842 23:21:45.618999  A73 clk: 1200 MHz
  843 23:21:45.619408  CLK81: 166.6M
  844 23:21:45.619806  smccc: 00012ab5
  845 23:21:45.624072  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
  846 23:21:45.629748  board id: 1
  847 23:21:45.635601  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  848 23:21:45.646068  fw parse done
  849 23:21:45.652058  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  850 23:21:45.694688  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  851 23:21:45.705558  PIEI prepare done
  852 23:21:45.705998  fastboot data load
  853 23:21:45.706412  fastboot data verify
  854 23:21:45.711179  verify result: 266
  855 23:21:45.716767  Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
  856 23:21:45.717208  LPDDR4 probe
  857 23:21:45.717613  ddr clk to 1584MHz
  858 23:21:45.724775  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  859 23:21:45.762068  
  860 23:21:45.762522  dmc_version 0001
  861 23:21:45.768746  Check phy result
  862 23:21:45.774635  INFO : End of CA training
  863 23:21:45.775069  INFO : End of initialization
  864 23:21:45.780214  INFO : Training has run successfully!
  865 23:21:45.780652  Check phy result
  866 23:21:45.785804  INFO : End of initialization
  867 23:21:45.786236  INFO : End of read enable training
  868 23:21:45.789111  INFO : End of fine write leveling
  869 23:21:45.794865  INFO : End of Write leveling coarse delay
  870 23:21:45.800296  INFO : Training has run successfully!
  871 23:21:45.800740  Check phy result
  872 23:21:45.801150  INFO : End of initialization
  873 23:21:45.805859  INFO : End of read dq deskew training
  874 23:21:45.811473  INFO : End of MPR read delay center optimization
  875 23:21:45.811902  INFO : End of write delay center optimization
  876 23:21:45.817045  INFO : End of read delay center optimization
  877 23:21:45.822674  INFO : End of max read latency training
  878 23:21:45.823108  INFO : Training has run successfully!
  879 23:21:45.828294  1D training succeed
  880 23:21:45.834282  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  881 23:21:45.881732  Check phy result
  882 23:21:45.882198  INFO : End of initialization
  883 23:21:45.903652  INFO : End of 2D read delay Voltage center optimization
  884 23:21:45.923749  INFO : End of 2D read delay Voltage center optimization
  885 23:21:45.975791  INFO : End of 2D write delay Voltage center optimization
  886 23:21:46.025132  INFO : End of 2D write delay Voltage center optimization
  887 23:21:46.030701  INFO : Training has run successfully!
  888 23:21:46.031136  
  889 23:21:46.031548  channel==0
  890 23:21:46.036313  RxClkDly_Margin_A0==88 ps 9
  891 23:21:46.036747  TxDqDly_Margin_A0==98 ps 10
  892 23:21:46.041891  RxClkDly_Margin_A1==88 ps 9
  893 23:21:46.042321  TxDqDly_Margin_A1==98 ps 10
  894 23:21:46.042746  TrainedVREFDQ_A0==74
  895 23:21:46.047508  TrainedVREFDQ_A1==74
  896 23:21:46.048033  VrefDac_Margin_A0==25
  897 23:21:46.048452  DeviceVref_Margin_A0==40
  898 23:21:46.053110  VrefDac_Margin_A1==25
  899 23:21:46.053579  DeviceVref_Margin_A1==40
  900 23:21:46.053966  
  901 23:21:46.054350  
  902 23:21:46.058694  channel==1
  903 23:21:46.059112  RxClkDly_Margin_A0==98 ps 10
  904 23:21:46.059497  TxDqDly_Margin_A0==98 ps 10
  905 23:21:46.064310  RxClkDly_Margin_A1==98 ps 10
  906 23:21:46.064725  TxDqDly_Margin_A1==88 ps 9
  907 23:21:46.069888  TrainedVREFDQ_A0==77
  908 23:21:46.070318  TrainedVREFDQ_A1==77
  909 23:21:46.070704  VrefDac_Margin_A0==22
  910 23:21:46.075493  DeviceVref_Margin_A0==37
  911 23:21:46.075905  VrefDac_Margin_A1==22
  912 23:21:46.081104  DeviceVref_Margin_A1==37
  913 23:21:46.081520  
  914 23:21:46.081904   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  915 23:21:46.086695  
  916 23:21:46.114717  soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000019 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
  917 23:21:46.115243  2D training succeed
  918 23:21:46.120312  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  919 23:21:46.125905  auto size-- 65535DDR cs0 size: 2048MB
  920 23:21:46.126330  DDR cs1 size: 2048MB
  921 23:21:46.131502  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  922 23:21:46.131916  cs0 DataBus test pass
  923 23:21:46.137084  cs1 DataBus test pass
  924 23:21:46.137494  cs0 AddrBus test pass
  925 23:21:46.137878  cs1 AddrBus test pass
  926 23:21:46.138256  
  927 23:21:46.142707  100bdlr_step_size ps== 420
  928 23:21:46.143150  result report
  929 23:21:46.148330  boot times 0Enable ddr reg access
  930 23:21:46.153733  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  931 23:21:46.167236  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
  932 23:21:46.741102  0.0;M3 CHK:0;cm4_sp_mode 0
  933 23:21:46.741745  MVN_1=0x00000000
  934 23:21:46.746422  MVN_2=0x00000000
  935 23:21:46.752185  [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
  936 23:21:46.752633  OPS=0x10
  937 23:21:46.753043  ring efuse init
  938 23:21:46.753445  chipver efuse init
  939 23:21:46.757740  29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 
  940 23:21:46.763403  [0.018960 Inits done]
  941 23:21:46.763843  secure task start!
  942 23:21:46.764319  high task start!
  943 23:21:46.767922  low task start!
  944 23:21:46.768386  run into bl31
  945 23:21:46.774570  NOTICE:  BL31: v1.3(release):4fc40b1
  946 23:21:46.782382  NOTICE:  BL31: Built : 15:58:17, May 22 2019
  947 23:21:46.782824  NOTICE:  BL31: G12A normal boot!
  948 23:21:46.807711  NOTICE:  BL31: BL33 decompress pass
  949 23:21:46.813397  ERROR:   Error initializing runtime service opteed_fast
  950 23:21:48.046411  
  951 23:21:48.047030  
  952 23:21:48.054807  U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
  953 23:21:48.055253  
  954 23:21:48.055663  Model: Libre Computer AML-A311D-CC Alta
  955 23:21:48.263172  SoC:   Amlogic Meson G12B (A311D) Revision 29:b (10:2)
  956 23:21:48.286517  DRAM:  2 GiB (effective 3.8 GiB)
  957 23:21:48.429477  Core:  408 devices, 31 uclasses, devicetree: separate
  958 23:21:48.435341  WDT:   Not starting watchdog@f0d0
  959 23:21:48.467649  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  960 23:21:48.480312  Loading Environment from FAT... Card did not respond to voltage select! : -110
  961 23:21:48.485013  ** Bad device specification mmc 0 **
  962 23:21:48.495351  Card did not respond to voltage select! : -110
  963 23:21:48.503130  ** Bad device specification mmc 0 **
  964 23:21:48.503630  Couldn't find partition mmc 0
  965 23:21:48.511650  Card did not respond to voltage select! : -110
  966 23:21:48.516938  ** Bad device specification mmc 0 **
  967 23:21:48.517425  Couldn't find partition mmc 0
  968 23:21:48.521989  Error: could not access storage.
  969 23:21:48.864404  Net:   eth0: ethernet@ff3f0000
  970 23:21:48.865024  starting USB...
  971 23:21:49.116200  Bus usb@ff500000: Register 3000140 NbrPorts 3
  972 23:21:49.116689  Starting the controller
  973 23:21:49.123105  USB XHCI 1.10
  974 23:21:50.677220  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  975 23:21:50.685477         scanning usb for storage devices... 0 Storage Device(s) found
  977 23:21:50.736942  Hit any key to stop autoboot:  1 
  978 23:21:50.737724  end: 2.4.2 bootloader-interrupt (duration 00:00:33) [common]
  979 23:21:50.738319  start: 2.4.3 bootloader-commands (timeout 00:04:27) [common]
  980 23:21:50.738794  Setting prompt string to ['=>']
  981 23:21:50.739284  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:27)
  982 23:21:50.753074   0 
  983 23:21:50.753935  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  984 23:21:50.754437  Sending with 10 millisecond of delay
  986 23:21:51.889086  => setenv autoload no
  987 23:21:51.899898  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
  988 23:21:51.904836  setenv autoload no
  989 23:21:51.905550  Sending with 10 millisecond of delay
  991 23:21:53.702018  => setenv initrd_high 0xffffffff
  992 23:21:53.712774  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
  993 23:21:53.713589  setenv initrd_high 0xffffffff
  994 23:21:53.714293  Sending with 10 millisecond of delay
  996 23:21:55.330934  => setenv fdt_high 0xffffffff
  997 23:21:55.341741  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
  998 23:21:55.342580  setenv fdt_high 0xffffffff
  999 23:21:55.343290  Sending with 10 millisecond of delay
 1001 23:21:55.635132  => dhcp
 1002 23:21:55.645882  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
 1003 23:21:55.646720  dhcp
 1004 23:21:55.647152  Speed: 1000, full duplex
 1005 23:21:55.647564  BOOTP broadcast 1
 1006 23:21:55.659318  DHCP client bound to address 192.168.6.27 (13 ms)
 1007 23:21:55.660067  Sending with 10 millisecond of delay
 1009 23:21:57.337456  => setenv serverip 192.168.6.2
 1010 23:21:57.348205  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
 1011 23:21:57.349052  setenv serverip 192.168.6.2
 1012 23:21:57.349730  Sending with 10 millisecond of delay
 1014 23:22:01.072632  => tftpboot 0x01080000 948249/tftp-deploy-1n93oqw8/kernel/uImage
 1015 23:22:01.083421  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
 1016 23:22:01.084263  tftpboot 0x01080000 948249/tftp-deploy-1n93oqw8/kernel/uImage
 1017 23:22:01.084715  Speed: 1000, full duplex
 1018 23:22:01.085129  Using ethernet@ff3f0000 device
 1019 23:22:01.086042  TFTP from server 192.168.6.2; our IP address is 192.168.6.27
 1020 23:22:01.091760  Filename '948249/tftp-deploy-1n93oqw8/kernel/uImage'.
 1021 23:22:01.095561  Load address: 0x1080000
 1022 23:22:03.904312  Loading: *##################################################  43.6 MiB
 1023 23:22:03.904919  	 15.5 MiB/s
 1024 23:22:03.905353  done
 1025 23:22:03.908763  Bytes transferred = 45713984 (2b98a40 hex)
 1026 23:22:03.909550  Sending with 10 millisecond of delay
 1028 23:22:08.595724  => tftpboot 0x08000000 948249/tftp-deploy-1n93oqw8/ramdisk/ramdisk.cpio.gz.uboot
 1029 23:22:08.606533  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
 1030 23:22:08.607320  tftpboot 0x08000000 948249/tftp-deploy-1n93oqw8/ramdisk/ramdisk.cpio.gz.uboot
 1031 23:22:08.607763  Speed: 1000, full duplex
 1032 23:22:08.608207  Using ethernet@ff3f0000 device
 1033 23:22:08.609168  TFTP from server 192.168.6.2; our IP address is 192.168.6.27
 1034 23:22:08.621159  Filename '948249/tftp-deploy-1n93oqw8/ramdisk/ramdisk.cpio.gz.uboot'.
 1035 23:22:08.621622  Load address: 0x8000000
 1036 23:22:15.137795  Loading: *####################T ############################# UDP wrong checksum 00000005 000046f5
 1037 23:22:20.138244  T  UDP wrong checksum 00000005 000046f5
 1038 23:22:30.141094  T T  UDP wrong checksum 00000005 000046f5
 1039 23:22:50.145446  T T T T  UDP wrong checksum 00000005 000046f5
 1040 23:22:54.768837   UDP wrong checksum 000000ff 00009bf2
 1041 23:22:54.812221   UDP wrong checksum 000000ff 000037e5
 1042 23:23:05.149348  T T 
 1043 23:23:05.149948  Retry count exceeded; starting again
 1045 23:23:05.151349  end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
 1048 23:23:05.153249  end: 2.4 uboot-commands (duration 00:01:47) [common]
 1050 23:23:05.154678  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
 1052 23:23:05.155691  end: 2 uboot-action (duration 00:01:47) [common]
 1054 23:23:05.157297  Cleaning after the job
 1055 23:23:05.157847  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/ramdisk
 1056 23:23:05.159170  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/kernel
 1057 23:23:05.202482  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/dtb
 1058 23:23:05.203320  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/nfsrootfs
 1059 23:23:05.342791  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948249/tftp-deploy-1n93oqw8/modules
 1060 23:23:05.362990  start: 4.1 power-off (timeout 00:00:30) [common]
 1061 23:23:05.363644  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
 1062 23:23:05.397168  >> OK - accepted request

 1063 23:23:05.398978  Returned 0 in 0 seconds
 1064 23:23:05.499684  end: 4.1 power-off (duration 00:00:00) [common]
 1066 23:23:05.500599  start: 4.2 read-feedback (timeout 00:10:00) [common]
 1067 23:23:05.501233  Listened to connection for namespace 'common' for up to 1s
 1068 23:23:06.502138  Finalising connection for namespace 'common'
 1069 23:23:06.502566  Disconnecting from shell: Finalise
 1070 23:23:06.502845  => 
 1071 23:23:06.603527  end: 4.2 read-feedback (duration 00:00:01) [common]
 1072 23:23:06.604135  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/948249
 1073 23:23:09.579892  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/948249
 1074 23:23:09.580548  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.