Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:27:01.460803 lava-dispatcher, installed at version: 2024.01
2 22:27:01.461571 start: 0 validate
3 22:27:01.462080 Start time: 2024-11-04 22:27:01.462051+00:00 (UTC)
4 22:27:01.462629 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:27:01.463161 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:27:01.509563 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:27:01.510406 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fpm%2Ftesting%2Fv6.12-rc6-95-g6db936d4ac0f%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:27:01.544445 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:27:01.545071 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fpm%2Ftesting%2Fv6.12-rc6-95-g6db936d4ac0f%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:27:01.580363 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:27:01.581097 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:27:01.612990 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:27:01.613510 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fpm%2Ftesting%2Fv6.12-rc6-95-g6db936d4ac0f%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:27:01.651556 validate duration: 0.19
16 22:27:01.652448 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:27:01.652795 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:27:01.653135 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:27:01.653728 Not decompressing ramdisk as can be used compressed.
20 22:27:01.654188 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 22:27:01.654488 saving as /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/ramdisk/initrd.cpio.gz
22 22:27:01.654778 total size: 5628140 (5 MB)
23 22:27:01.696900 progress 0 % (0 MB)
24 22:27:01.701464 progress 5 % (0 MB)
25 22:27:01.705594 progress 10 % (0 MB)
26 22:27:01.709207 progress 15 % (0 MB)
27 22:27:01.713201 progress 20 % (1 MB)
28 22:27:01.716821 progress 25 % (1 MB)
29 22:27:01.720745 progress 30 % (1 MB)
30 22:27:01.724694 progress 35 % (1 MB)
31 22:27:01.728291 progress 40 % (2 MB)
32 22:27:01.732238 progress 45 % (2 MB)
33 22:27:01.735702 progress 50 % (2 MB)
34 22:27:01.739638 progress 55 % (2 MB)
35 22:27:01.743562 progress 60 % (3 MB)
36 22:27:01.747119 progress 65 % (3 MB)
37 22:27:01.751066 progress 70 % (3 MB)
38 22:27:01.754656 progress 75 % (4 MB)
39 22:27:01.758441 progress 80 % (4 MB)
40 22:27:01.761713 progress 85 % (4 MB)
41 22:27:01.765377 progress 90 % (4 MB)
42 22:27:01.769089 progress 95 % (5 MB)
43 22:27:01.772388 progress 100 % (5 MB)
44 22:27:01.773042 5 MB downloaded in 0.12 s (45.39 MB/s)
45 22:27:01.773592 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:27:01.774496 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:27:01.774792 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:27:01.775067 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:27:01.775535 downloading http://storage.kernelci.org/pm/testing/v6.12-rc6-95-g6db936d4ac0f/arm64/defconfig/gcc-12/kernel/Image
51 22:27:01.775786 saving as /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/kernel/Image
52 22:27:01.776022 total size: 45713920 (43 MB)
53 22:27:01.776237 No compression specified
54 22:27:01.809077 progress 0 % (0 MB)
55 22:27:01.835838 progress 5 % (2 MB)
56 22:27:01.862772 progress 10 % (4 MB)
57 22:27:01.890122 progress 15 % (6 MB)
58 22:27:01.916999 progress 20 % (8 MB)
59 22:27:01.943451 progress 25 % (10 MB)
60 22:27:01.970332 progress 30 % (13 MB)
61 22:27:01.997513 progress 35 % (15 MB)
62 22:27:02.024474 progress 40 % (17 MB)
63 22:27:02.050997 progress 45 % (19 MB)
64 22:27:02.078208 progress 50 % (21 MB)
65 22:27:02.105123 progress 55 % (24 MB)
66 22:27:02.132048 progress 60 % (26 MB)
67 22:27:02.158584 progress 65 % (28 MB)
68 22:27:02.185999 progress 70 % (30 MB)
69 22:27:02.213034 progress 75 % (32 MB)
70 22:27:02.239904 progress 80 % (34 MB)
71 22:27:02.266705 progress 85 % (37 MB)
72 22:27:02.293666 progress 90 % (39 MB)
73 22:27:02.320657 progress 95 % (41 MB)
74 22:27:02.346681 progress 100 % (43 MB)
75 22:27:02.347194 43 MB downloaded in 0.57 s (76.33 MB/s)
76 22:27:02.347673 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:27:02.348544 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:27:02.348823 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:27:02.349091 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:27:02.349558 downloading http://storage.kernelci.org/pm/testing/v6.12-rc6-95-g6db936d4ac0f/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 22:27:02.349834 saving as /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/dtb/meson-g12b-a311d-libretech-cc.dtb
83 22:27:02.350043 total size: 54703 (0 MB)
84 22:27:02.350251 No compression specified
85 22:27:02.389301 progress 59 % (0 MB)
86 22:27:02.390156 progress 100 % (0 MB)
87 22:27:02.390740 0 MB downloaded in 0.04 s (1.28 MB/s)
88 22:27:02.391231 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:27:02.392136 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:27:02.392437 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:27:02.392725 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:27:02.393208 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 22:27:02.393506 saving as /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/nfsrootfs/full.rootfs.tar
95 22:27:02.393741 total size: 474398908 (452 MB)
96 22:27:02.393967 Using unxz to decompress xz
97 22:27:02.434593 progress 0 % (0 MB)
98 22:27:03.566436 progress 5 % (22 MB)
99 22:27:05.011327 progress 10 % (45 MB)
100 22:27:05.426981 progress 15 % (67 MB)
101 22:27:06.280665 progress 20 % (90 MB)
102 22:27:06.811500 progress 25 % (113 MB)
103 22:27:07.163035 progress 30 % (135 MB)
104 22:27:07.766195 progress 35 % (158 MB)
105 22:27:08.690457 progress 40 % (181 MB)
106 22:27:09.467671 progress 45 % (203 MB)
107 22:27:10.037764 progress 50 % (226 MB)
108 22:27:10.654056 progress 55 % (248 MB)
109 22:27:11.851958 progress 60 % (271 MB)
110 22:27:13.343571 progress 65 % (294 MB)
111 22:27:14.999697 progress 70 % (316 MB)
112 22:27:18.069993 progress 75 % (339 MB)
113 22:27:20.486848 progress 80 % (361 MB)
114 22:27:23.401378 progress 85 % (384 MB)
115 22:27:26.562527 progress 90 % (407 MB)
116 22:27:29.757988 progress 95 % (429 MB)
117 22:27:32.901951 progress 100 % (452 MB)
118 22:27:32.914832 452 MB downloaded in 30.52 s (14.82 MB/s)
119 22:27:32.915756 end: 1.4.1 http-download (duration 00:00:31) [common]
121 22:27:32.917474 end: 1.4 download-retry (duration 00:00:31) [common]
122 22:27:32.918018 start: 1.5 download-retry (timeout 00:09:29) [common]
123 22:27:32.918558 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 22:27:32.919349 downloading http://storage.kernelci.org/pm/testing/v6.12-rc6-95-g6db936d4ac0f/arm64/defconfig/gcc-12/modules.tar.xz
125 22:27:32.919826 saving as /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/modules/modules.tar
126 22:27:32.920328 total size: 11612416 (11 MB)
127 22:27:32.920767 Using unxz to decompress xz
128 22:27:32.969043 progress 0 % (0 MB)
129 22:27:33.035316 progress 5 % (0 MB)
130 22:27:33.109043 progress 10 % (1 MB)
131 22:27:33.204653 progress 15 % (1 MB)
132 22:27:33.296328 progress 20 % (2 MB)
133 22:27:33.374955 progress 25 % (2 MB)
134 22:27:33.449959 progress 30 % (3 MB)
135 22:27:33.528284 progress 35 % (3 MB)
136 22:27:33.600863 progress 40 % (4 MB)
137 22:27:33.676902 progress 45 % (5 MB)
138 22:27:33.761032 progress 50 % (5 MB)
139 22:27:33.837820 progress 55 % (6 MB)
140 22:27:33.922612 progress 60 % (6 MB)
141 22:27:34.002875 progress 65 % (7 MB)
142 22:27:34.082728 progress 70 % (7 MB)
143 22:27:34.160133 progress 75 % (8 MB)
144 22:27:34.242996 progress 80 % (8 MB)
145 22:27:34.325418 progress 85 % (9 MB)
146 22:27:34.405049 progress 90 % (9 MB)
147 22:27:34.485039 progress 95 % (10 MB)
148 22:27:34.561863 progress 100 % (11 MB)
149 22:27:34.575832 11 MB downloaded in 1.66 s (6.69 MB/s)
150 22:27:34.576857 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:27:34.578621 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:27:34.579190 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 22:27:34.579763 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 22:27:49.727497 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/936630/extract-nfsrootfs-6p2qbs0u
156 22:27:49.728134 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 22:27:49.728428 start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
158 22:27:49.729210 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1
159 22:27:49.729668 makedir: /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin
160 22:27:49.729994 makedir: /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/tests
161 22:27:49.730307 makedir: /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/results
162 22:27:49.730640 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-add-keys
163 22:27:49.731163 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-add-sources
164 22:27:49.731665 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-background-process-start
165 22:27:49.732193 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-background-process-stop
166 22:27:49.732723 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-common-functions
167 22:27:49.733220 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-echo-ipv4
168 22:27:49.733781 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-install-packages
169 22:27:49.734284 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-installed-packages
170 22:27:49.734757 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-os-build
171 22:27:49.735230 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-probe-channel
172 22:27:49.735732 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-probe-ip
173 22:27:49.736265 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-target-ip
174 22:27:49.736750 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-target-mac
175 22:27:49.737221 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-target-storage
176 22:27:49.737697 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-test-case
177 22:27:49.738170 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-test-event
178 22:27:49.738637 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-test-feedback
179 22:27:49.739109 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-test-raise
180 22:27:49.739599 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-test-reference
181 22:27:49.740121 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-test-runner
182 22:27:49.740610 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-test-set
183 22:27:49.741083 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-test-shell
184 22:27:49.741563 Updating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-install-packages (oe)
185 22:27:49.742087 Updating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/bin/lava-installed-packages (oe)
186 22:27:49.742521 Creating /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/environment
187 22:27:49.742883 LAVA metadata
188 22:27:49.743138 - LAVA_JOB_ID=936630
189 22:27:49.743352 - LAVA_DISPATCHER_IP=192.168.6.2
190 22:27:49.743702 start: 1.6.2.1 ssh-authorize (timeout 00:09:12) [common]
191 22:27:49.744663 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 22:27:49.744975 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:12) [common]
193 22:27:49.745183 skipped lava-vland-overlay
194 22:27:49.745425 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 22:27:49.745679 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:12) [common]
196 22:27:49.745895 skipped lava-multinode-overlay
197 22:27:49.746136 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 22:27:49.746385 start: 1.6.2.4 test-definition (timeout 00:09:12) [common]
199 22:27:49.746631 Loading test definitions
200 22:27:49.746905 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:12) [common]
201 22:27:49.747123 Using /lava-936630 at stage 0
202 22:27:49.748305 uuid=936630_1.6.2.4.1 testdef=None
203 22:27:49.748615 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 22:27:49.748877 start: 1.6.2.4.2 test-overlay (timeout 00:09:12) [common]
205 22:27:49.750591 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 22:27:49.751378 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:12) [common]
208 22:27:49.753530 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 22:27:49.754361 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:12) [common]
211 22:27:49.756428 runner path: /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 936630_1.6.2.4.1
212 22:27:49.756968 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 22:27:49.757743 Creating lava-test-runner.conf files
215 22:27:49.757945 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/936630/lava-overlay-l64u7ma1/lava-936630/0 for stage 0
216 22:27:49.758273 - 0_v4l2-decoder-conformance-vp9
217 22:27:49.758609 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 22:27:49.758879 start: 1.6.2.5 compress-overlay (timeout 00:09:12) [common]
219 22:27:49.780268 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 22:27:49.780618 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:12) [common]
221 22:27:49.780877 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 22:27:49.781141 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 22:27:49.781401 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:12) [common]
224 22:27:50.390379 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 22:27:50.390849 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 22:27:50.391116 extracting modules file /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/936630/extract-nfsrootfs-6p2qbs0u
227 22:27:51.745464 extracting modules file /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/936630/extract-overlay-ramdisk-te28japk/ramdisk
228 22:27:53.134788 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 22:27:53.135274 start: 1.6.5 apply-overlay-tftp (timeout 00:09:09) [common]
230 22:27:53.135574 [common] Applying overlay to NFS
231 22:27:53.135805 [common] Applying overlay /var/lib/lava/dispatcher/tmp/936630/compress-overlay-25wltqxx/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/936630/extract-nfsrootfs-6p2qbs0u
232 22:27:53.165260 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 22:27:53.165636 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 22:27:53.165932 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 22:27:53.166170 Converting downloaded kernel to a uImage
236 22:27:53.166485 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/kernel/Image /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/kernel/uImage
237 22:27:53.632309 output: Image Name:
238 22:27:53.632728 output: Created: Mon Nov 4 22:27:53 2024
239 22:27:53.632956 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 22:27:53.633173 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 22:27:53.633380 output: Load Address: 01080000
242 22:27:53.633585 output: Entry Point: 01080000
243 22:27:53.633788 output:
244 22:27:53.634124 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 22:27:53.634401 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 22:27:53.634683 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 22:27:53.634946 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 22:27:53.635215 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 22:27:53.635482 Building ramdisk /var/lib/lava/dispatcher/tmp/936630/extract-overlay-ramdisk-te28japk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/936630/extract-overlay-ramdisk-te28japk/ramdisk
250 22:27:55.759557 >> 166823 blocks
251 22:28:03.568617 Adding RAMdisk u-boot header.
252 22:28:03.569344 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/936630/extract-overlay-ramdisk-te28japk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/936630/extract-overlay-ramdisk-te28japk/ramdisk.cpio.gz.uboot
253 22:28:03.870142 output: Image Name:
254 22:28:03.870574 output: Created: Mon Nov 4 22:28:03 2024
255 22:28:03.871007 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 22:28:03.871431 output: Data Size: 23432151 Bytes = 22882.96 KiB = 22.35 MiB
257 22:28:03.871847 output: Load Address: 00000000
258 22:28:03.872310 output: Entry Point: 00000000
259 22:28:03.872718 output:
260 22:28:03.873823 rename /var/lib/lava/dispatcher/tmp/936630/extract-overlay-ramdisk-te28japk/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/ramdisk/ramdisk.cpio.gz.uboot
261 22:28:03.874552 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 22:28:03.875111 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 22:28:03.875656 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:58) [common]
264 22:28:03.876157 No LXC device requested
265 22:28:03.876685 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 22:28:03.877211 start: 1.8 deploy-device-env (timeout 00:08:58) [common]
267 22:28:03.877719 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 22:28:03.878141 Checking files for TFTP limit of 4294967296 bytes.
269 22:28:03.880846 end: 1 tftp-deploy (duration 00:01:02) [common]
270 22:28:03.881422 start: 2 uboot-action (timeout 00:05:00) [common]
271 22:28:03.881959 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 22:28:03.882466 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 22:28:03.882976 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 22:28:03.883510 Using kernel file from prepare-kernel: 936630/tftp-deploy-akgqb7_n/kernel/uImage
275 22:28:03.884169 substitutions:
276 22:28:03.884589 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 22:28:03.884997 - {DTB_ADDR}: 0x01070000
278 22:28:03.885398 - {DTB}: 936630/tftp-deploy-akgqb7_n/dtb/meson-g12b-a311d-libretech-cc.dtb
279 22:28:03.885798 - {INITRD}: 936630/tftp-deploy-akgqb7_n/ramdisk/ramdisk.cpio.gz.uboot
280 22:28:03.886197 - {KERNEL_ADDR}: 0x01080000
281 22:28:03.886591 - {KERNEL}: 936630/tftp-deploy-akgqb7_n/kernel/uImage
282 22:28:03.886985 - {LAVA_MAC}: None
283 22:28:03.887420 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/936630/extract-nfsrootfs-6p2qbs0u
284 22:28:03.887825 - {NFS_SERVER_IP}: 192.168.6.2
285 22:28:03.888256 - {PRESEED_CONFIG}: None
286 22:28:03.888655 - {PRESEED_LOCAL}: None
287 22:28:03.889050 - {RAMDISK_ADDR}: 0x08000000
288 22:28:03.889443 - {RAMDISK}: 936630/tftp-deploy-akgqb7_n/ramdisk/ramdisk.cpio.gz.uboot
289 22:28:03.889834 - {ROOT_PART}: None
290 22:28:03.890225 - {ROOT}: None
291 22:28:03.890612 - {SERVER_IP}: 192.168.6.2
292 22:28:03.890999 - {TEE_ADDR}: 0x83000000
293 22:28:03.891385 - {TEE}: None
294 22:28:03.891945 Parsed boot commands:
295 22:28:03.892397 - setenv autoload no
296 22:28:03.892800 - setenv initrd_high 0xffffffff
297 22:28:03.893197 - setenv fdt_high 0xffffffff
298 22:28:03.893593 - dhcp
299 22:28:03.893982 - setenv serverip 192.168.6.2
300 22:28:03.894372 - tftpboot 0x01080000 936630/tftp-deploy-akgqb7_n/kernel/uImage
301 22:28:03.894765 - tftpboot 0x08000000 936630/tftp-deploy-akgqb7_n/ramdisk/ramdisk.cpio.gz.uboot
302 22:28:03.895156 - tftpboot 0x01070000 936630/tftp-deploy-akgqb7_n/dtb/meson-g12b-a311d-libretech-cc.dtb
303 22:28:03.895548 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/936630/extract-nfsrootfs-6p2qbs0u,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 22:28:03.895954 - bootm 0x01080000 0x08000000 0x01070000
305 22:28:03.896487 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 22:28:03.897978 start: 2.3 connect-device (timeout 00:05:00) [common]
308 22:28:03.898401 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 22:28:03.913158 Setting prompt string to ['lava-test: # ']
310 22:28:03.914622 end: 2.3 connect-device (duration 00:00:00) [common]
311 22:28:03.915232 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 22:28:03.916102 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 22:28:03.916732 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 22:28:03.917890 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 22:28:03.955217 >> OK - accepted request
316 22:28:03.957320 Returned 0 in 0 seconds
317 22:28:04.058437 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 22:28:04.060071 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 22:28:04.060675 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 22:28:04.061217 Setting prompt string to ['Hit any key to stop autoboot']
322 22:28:04.061691 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 22:28:04.063270 Trying 192.168.56.21...
324 22:28:04.063743 Connected to conserv1.
325 22:28:04.064199 Escape character is '^]'.
326 22:28:04.064632
327 22:28:04.065065 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 22:28:04.065489
329 22:28:14.784505 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 22:28:14.785107 bl2_stage_init 0x01
331 22:28:14.785542 bl2_stage_init 0x81
332 22:28:14.790202 hw id: 0x0000 - pwm id 0x01
333 22:28:14.790711 bl2_stage_init 0xc1
334 22:28:14.791112 bl2_stage_init 0x02
335 22:28:14.791502
336 22:28:14.795665 L0:00000000
337 22:28:14.796157 L1:20000703
338 22:28:14.796571 L2:00008067
339 22:28:14.796958 L3:14000000
340 22:28:14.801150 B2:00402000
341 22:28:14.801593 B1:e0f83180
342 22:28:14.802003
343 22:28:14.802394 TE: 58159
344 22:28:14.802784
345 22:28:14.806773 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 22:28:14.807217
347 22:28:14.807612 Board ID = 1
348 22:28:14.812607 Set A53 clk to 24M
349 22:28:14.813048 Set A73 clk to 24M
350 22:28:14.813437 Set clk81 to 24M
351 22:28:14.817937 A53 clk: 1200 MHz
352 22:28:14.818376 A73 clk: 1200 MHz
353 22:28:14.818763 CLK81: 166.6M
354 22:28:14.819144 smccc: 00012ab5
355 22:28:14.823524 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 22:28:14.829154 board id: 1
357 22:28:14.835047 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 22:28:14.845713 fw parse done
359 22:28:14.851697 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 22:28:14.894439 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 22:28:14.905197 PIEI prepare done
362 22:28:14.905643 fastboot data load
363 22:28:14.906033 fastboot data verify
364 22:28:14.910893 verify result: 266
365 22:28:14.916510 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 22:28:14.916982 LPDDR4 probe
367 22:28:14.917391 ddr clk to 1584MHz
368 22:28:14.924532 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 22:28:14.961680
370 22:28:14.962139 dmc_version 0001
371 22:28:14.968404 Check phy result
372 22:28:14.974226 INFO : End of CA training
373 22:28:14.974665 INFO : End of initialization
374 22:28:14.979865 INFO : Training has run successfully!
375 22:28:14.980376 Check phy result
376 22:28:14.985433 INFO : End of initialization
377 22:28:14.985879 INFO : End of read enable training
378 22:28:14.991012 INFO : End of fine write leveling
379 22:28:14.996628 INFO : End of Write leveling coarse delay
380 22:28:14.997070 INFO : Training has run successfully!
381 22:28:14.997476 Check phy result
382 22:28:15.002250 INFO : End of initialization
383 22:28:15.002691 INFO : End of read dq deskew training
384 22:28:15.007843 INFO : End of MPR read delay center optimization
385 22:28:15.013420 INFO : End of write delay center optimization
386 22:28:15.019029 INFO : End of read delay center optimization
387 22:28:15.019467 INFO : End of max read latency training
388 22:28:15.024657 INFO : Training has run successfully!
389 22:28:15.025097 1D training succeed
390 22:28:15.033823 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 22:28:15.081535 Check phy result
392 22:28:15.081995 INFO : End of initialization
393 22:28:15.103037 INFO : End of 2D read delay Voltage center optimization
394 22:28:15.123226 INFO : End of 2D read delay Voltage center optimization
395 22:28:15.174993 INFO : End of 2D write delay Voltage center optimization
396 22:28:15.224309 INFO : End of 2D write delay Voltage center optimization
397 22:28:15.229919 INFO : Training has run successfully!
398 22:28:15.230359
399 22:28:15.230769 channel==0
400 22:28:15.235549 RxClkDly_Margin_A0==88 ps 9
401 22:28:15.236033 TxDqDly_Margin_A0==108 ps 11
402 22:28:15.241042 RxClkDly_Margin_A1==88 ps 9
403 22:28:15.241495 TxDqDly_Margin_A1==98 ps 10
404 22:28:15.241905 TrainedVREFDQ_A0==74
405 22:28:15.246641 TrainedVREFDQ_A1==74
406 22:28:15.247082 VrefDac_Margin_A0==25
407 22:28:15.252280 DeviceVref_Margin_A0==40
408 22:28:15.252720 VrefDac_Margin_A1==25
409 22:28:15.253122 DeviceVref_Margin_A1==40
410 22:28:15.253517
411 22:28:15.253910
412 22:28:15.257949 channel==1
413 22:28:15.258394 RxClkDly_Margin_A0==98 ps 10
414 22:28:15.258798 TxDqDly_Margin_A0==88 ps 9
415 22:28:15.263598 RxClkDly_Margin_A1==98 ps 10
416 22:28:15.264068 TxDqDly_Margin_A1==98 ps 10
417 22:28:15.269036 TrainedVREFDQ_A0==77
418 22:28:15.269474 TrainedVREFDQ_A1==77
419 22:28:15.269882 VrefDac_Margin_A0==22
420 22:28:15.274660 DeviceVref_Margin_A0==37
421 22:28:15.275102 VrefDac_Margin_A1==22
422 22:28:15.280296 DeviceVref_Margin_A1==37
423 22:28:15.280733
424 22:28:15.281142 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 22:28:15.285928
426 22:28:15.313892 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 22:28:15.314418 2D training succeed
428 22:28:15.319636 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 22:28:15.324982 auto size-- 65535DDR cs0 size: 2048MB
430 22:28:15.325428 DDR cs1 size: 2048MB
431 22:28:15.330533 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 22:28:15.330974 cs0 DataBus test pass
433 22:28:15.336450 cs1 DataBus test pass
434 22:28:15.336888 cs0 AddrBus test pass
435 22:28:15.337295 cs1 AddrBus test pass
436 22:28:15.337693
437 22:28:15.341789 100bdlr_step_size ps== 420
438 22:28:15.342238 result report
439 22:28:15.347424 boot times 0Enable ddr reg access
440 22:28:15.352889 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 22:28:15.366487 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 22:28:15.938424 0.0;M3 CHK:0;cm4_sp_mode 0
443 22:28:15.939054 MVN_1=0x00000000
444 22:28:15.943911 MVN_2=0x00000000
445 22:28:15.949638 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 22:28:15.950100 OPS=0x10
447 22:28:15.950512 ring efuse init
448 22:28:15.950915 chipver efuse init
449 22:28:15.957795 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 22:28:15.958266 [0.018961 Inits done]
451 22:28:15.965428 secure task start!
452 22:28:15.965881 high task start!
453 22:28:15.966289 low task start!
454 22:28:15.966690 run into bl31
455 22:28:15.972081 NOTICE: BL31: v1.3(release):4fc40b1
456 22:28:15.979886 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 22:28:15.980393 NOTICE: BL31: G12A normal boot!
458 22:28:16.005289 NOTICE: BL31: BL33 decompress pass
459 22:28:16.010971 ERROR: Error initializing runtime service opteed_fast
460 22:28:17.243954
461 22:28:17.244634
462 22:28:17.252319 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 22:28:17.252862
464 22:28:17.253287 Model: Libre Computer AML-A311D-CC Alta
465 22:28:17.461459 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 22:28:17.484120 DRAM: 2 GiB (effective 3.8 GiB)
467 22:28:17.627079 Core: 408 devices, 31 uclasses, devicetree: separate
468 22:28:17.632943 WDT: Not starting watchdog@f0d0
469 22:28:17.665219 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 22:28:17.677743 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 22:28:17.682699 ** Bad device specification mmc 0 **
472 22:28:17.692971 Card did not respond to voltage select! : -110
473 22:28:17.700642 ** Bad device specification mmc 0 **
474 22:28:17.701171 Couldn't find partition mmc 0
475 22:28:17.708973 Card did not respond to voltage select! : -110
476 22:28:17.714564 ** Bad device specification mmc 0 **
477 22:28:17.715125 Couldn't find partition mmc 0
478 22:28:17.719585 Error: could not access storage.
479 22:28:18.984923 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 22:28:18.985497 bl2_stage_init 0x01
481 22:28:18.985921 bl2_stage_init 0x81
482 22:28:18.990478 hw id: 0x0000 - pwm id 0x01
483 22:28:18.990941 bl2_stage_init 0xc1
484 22:28:18.991355 bl2_stage_init 0x02
485 22:28:18.991764
486 22:28:18.996077 L0:00000000
487 22:28:18.996548 L1:20000703
488 22:28:18.996962 L2:00008067
489 22:28:18.997364 L3:14000000
490 22:28:18.998939 B2:00402000
491 22:28:18.999390 B1:e0f83180
492 22:28:18.999798
493 22:28:19.000238 TE: 58124
494 22:28:19.000645
495 22:28:19.010017 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 22:28:19.010477
497 22:28:19.010889 Board ID = 1
498 22:28:19.011284 Set A53 clk to 24M
499 22:28:19.011678 Set A73 clk to 24M
500 22:28:19.015657 Set clk81 to 24M
501 22:28:19.016138 A53 clk: 1200 MHz
502 22:28:19.016555 A73 clk: 1200 MHz
503 22:28:19.021282 CLK81: 166.6M
504 22:28:19.021746 smccc: 00012a92
505 22:28:19.026890 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 22:28:19.027347 board id: 1
507 22:28:19.032453 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 22:28:19.046190 fw parse done
509 22:28:19.052193 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 22:28:19.094751 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 22:28:19.105702 PIEI prepare done
512 22:28:19.106155 fastboot data load
513 22:28:19.106568 fastboot data verify
514 22:28:19.111370 verify result: 266
515 22:28:19.116973 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 22:28:19.117431 LPDDR4 probe
517 22:28:19.117838 ddr clk to 1584MHz
518 22:28:19.125078 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 22:28:19.162192
520 22:28:19.162656 dmc_version 0001
521 22:28:19.168874 Check phy result
522 22:28:19.174737 INFO : End of CA training
523 22:28:19.175185 INFO : End of initialization
524 22:28:19.180344 INFO : Training has run successfully!
525 22:28:19.180795 Check phy result
526 22:28:19.186016 INFO : End of initialization
527 22:28:19.186468 INFO : End of read enable training
528 22:28:19.191562 INFO : End of fine write leveling
529 22:28:19.197147 INFO : End of Write leveling coarse delay
530 22:28:19.197614 INFO : Training has run successfully!
531 22:28:19.198021 Check phy result
532 22:28:19.202742 INFO : End of initialization
533 22:28:19.203214 INFO : End of read dq deskew training
534 22:28:19.208361 INFO : End of MPR read delay center optimization
535 22:28:19.214021 INFO : End of write delay center optimization
536 22:28:19.219553 INFO : End of read delay center optimization
537 22:28:19.220025 INFO : End of max read latency training
538 22:28:19.225149 INFO : Training has run successfully!
539 22:28:19.225604 1D training succeed
540 22:28:19.234303 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 22:28:19.281899 Check phy result
542 22:28:19.282358 INFO : End of initialization
543 22:28:19.304491 INFO : End of 2D read delay Voltage center optimization
544 22:28:19.324735 INFO : End of 2D read delay Voltage center optimization
545 22:28:19.376790 INFO : End of 2D write delay Voltage center optimization
546 22:28:19.426158 INFO : End of 2D write delay Voltage center optimization
547 22:28:19.431800 INFO : Training has run successfully!
548 22:28:19.432297
549 22:28:19.432725 channel==0
550 22:28:19.437339 RxClkDly_Margin_A0==88 ps 9
551 22:28:19.437806 TxDqDly_Margin_A0==98 ps 10
552 22:28:19.443040 RxClkDly_Margin_A1==88 ps 9
553 22:28:19.443496 TxDqDly_Margin_A1==98 ps 10
554 22:28:19.443909 TrainedVREFDQ_A0==74
555 22:28:19.448540 TrainedVREFDQ_A1==74
556 22:28:19.448995 VrefDac_Margin_A0==25
557 22:28:19.449404 DeviceVref_Margin_A0==40
558 22:28:19.455427 VrefDac_Margin_A1==24
559 22:28:19.455874 DeviceVref_Margin_A1==40
560 22:28:19.456317
561 22:28:19.456719
562 22:28:19.460020 channel==1
563 22:28:19.460470 RxClkDly_Margin_A0==98 ps 10
564 22:28:19.460874 TxDqDly_Margin_A0==98 ps 10
565 22:28:19.465408 RxClkDly_Margin_A1==98 ps 10
566 22:28:19.465858 TxDqDly_Margin_A1==108 ps 11
567 22:28:19.471081 TrainedVREFDQ_A0==77
568 22:28:19.471534 TrainedVREFDQ_A1==78
569 22:28:19.471941 VrefDac_Margin_A0==22
570 22:28:19.476541 DeviceVref_Margin_A0==37
571 22:28:19.476988 VrefDac_Margin_A1==22
572 22:28:19.482122 DeviceVref_Margin_A1==36
573 22:28:19.482584
574 22:28:19.487793 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 22:28:19.488270
576 22:28:19.515730 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
577 22:28:19.516238 2D training succeed
578 22:28:19.521328 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 22:28:19.527034 auto size-- 65535DDR cs0 size: 2048MB
580 22:28:19.527488 DDR cs1 size: 2048MB
581 22:28:19.532542 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 22:28:19.532997 cs0 DataBus test pass
583 22:28:19.538126 cs1 DataBus test pass
584 22:28:19.538579 cs0 AddrBus test pass
585 22:28:19.538986 cs1 AddrBus test pass
586 22:28:19.539389
587 22:28:19.543797 100bdlr_step_size ps== 420
588 22:28:19.544292 result report
589 22:28:19.549336 boot times 0Enable ddr reg access
590 22:28:19.554939 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 22:28:19.568369 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 22:28:20.141984 0.0;M3 CHK:0;cm4_sp_mode 0
593 22:28:20.142510 MVN_1=0x00000000
594 22:28:20.147551 MVN_2=0x00000000
595 22:28:20.153340 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 22:28:20.153821 OPS=0x10
597 22:28:20.154266 ring efuse init
598 22:28:20.154658 chipver efuse init
599 22:28:20.161529 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 22:28:20.162000 [0.018961 Inits done]
601 22:28:20.162392 secure task start!
602 22:28:20.169082 high task start!
603 22:28:20.169524 low task start!
604 22:28:20.169913 run into bl31
605 22:28:20.175671 NOTICE: BL31: v1.3(release):4fc40b1
606 22:28:20.183507 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 22:28:20.183954 NOTICE: BL31: G12A normal boot!
608 22:28:20.208840 NOTICE: BL31: BL33 decompress pass
609 22:28:20.214557 ERROR: Error initializing runtime service opteed_fast
610 22:28:21.447605
611 22:28:21.448213
612 22:28:21.456084 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 22:28:21.456554
614 22:28:21.456973 Model: Libre Computer AML-A311D-CC Alta
615 22:28:21.664502 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 22:28:21.687793 DRAM: 2 GiB (effective 3.8 GiB)
617 22:28:21.830668 Core: 408 devices, 31 uclasses, devicetree: separate
618 22:28:21.836694 WDT: Not starting watchdog@f0d0
619 22:28:21.868904 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 22:28:21.881422 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 22:28:21.886355 ** Bad device specification mmc 0 **
622 22:28:21.896682 Card did not respond to voltage select! : -110
623 22:28:21.904379 ** Bad device specification mmc 0 **
624 22:28:21.904832 Couldn't find partition mmc 0
625 22:28:21.912670 Card did not respond to voltage select! : -110
626 22:28:21.918165 ** Bad device specification mmc 0 **
627 22:28:21.918615 Couldn't find partition mmc 0
628 22:28:21.923325 Error: could not access storage.
629 22:28:22.265685 Net: eth0: ethernet@ff3f0000
630 22:28:22.266255 starting USB...
631 22:28:22.517585 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 22:28:22.518069 Starting the controller
633 22:28:22.524656 USB XHCI 1.10
634 22:28:24.235184 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
635 22:28:24.235805 bl2_stage_init 0x81
636 22:28:24.240781 hw id: 0x0000 - pwm id 0x01
637 22:28:24.241255 bl2_stage_init 0xc1
638 22:28:24.241678 bl2_stage_init 0x02
639 22:28:24.242086
640 22:28:24.246338 L0:00000000
641 22:28:24.246797 L1:20000703
642 22:28:24.247211 L2:00008067
643 22:28:24.247612 L3:14000000
644 22:28:24.248073 B2:00402000
645 22:28:24.251852 B1:e0f83180
646 22:28:24.252339
647 22:28:24.252752 TE: 58150
648 22:28:24.253161
649 22:28:24.257531 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 22:28:24.257996
651 22:28:24.258415 Board ID = 1
652 22:28:24.263146 Set A53 clk to 24M
653 22:28:24.263603 Set A73 clk to 24M
654 22:28:24.264039 Set clk81 to 24M
655 22:28:24.268745 A53 clk: 1200 MHz
656 22:28:24.269201 A73 clk: 1200 MHz
657 22:28:24.269613 CLK81: 166.6M
658 22:28:24.270014 smccc: 00012aab
659 22:28:24.274364 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 22:28:24.279826 board id: 1
661 22:28:24.285776 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 22:28:24.296292 fw parse done
663 22:28:24.302262 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 22:28:24.344864 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 22:28:24.355748 PIEI prepare done
666 22:28:24.356245 fastboot data load
667 22:28:24.356660 fastboot data verify
668 22:28:24.361496 verify result: 266
669 22:28:24.367016 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 22:28:24.367472 LPDDR4 probe
671 22:28:24.367878 ddr clk to 1584MHz
672 22:28:24.375095 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 22:28:24.412321
674 22:28:24.412776 dmc_version 0001
675 22:28:24.419007 Check phy result
676 22:28:24.424854 INFO : End of CA training
677 22:28:24.425307 INFO : End of initialization
678 22:28:24.430498 INFO : Training has run successfully!
679 22:28:24.430984 Check phy result
680 22:28:24.436115 INFO : End of initialization
681 22:28:24.436594 INFO : End of read enable training
682 22:28:24.441791 INFO : End of fine write leveling
683 22:28:24.447260 INFO : End of Write leveling coarse delay
684 22:28:24.447714 INFO : Training has run successfully!
685 22:28:24.448158 Check phy result
686 22:28:24.452906 INFO : End of initialization
687 22:28:24.453361 INFO : End of read dq deskew training
688 22:28:24.458496 INFO : End of MPR read delay center optimization
689 22:28:24.464046 INFO : End of write delay center optimization
690 22:28:24.469791 INFO : End of read delay center optimization
691 22:28:24.470249 INFO : End of max read latency training
692 22:28:24.475256 INFO : Training has run successfully!
693 22:28:24.475711 1D training succeed
694 22:28:24.484386 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 22:28:24.532022 Check phy result
696 22:28:24.532478 INFO : End of initialization
697 22:28:24.553872 INFO : End of 2D read delay Voltage center optimization
698 22:28:24.574007 INFO : End of 2D read delay Voltage center optimization
699 22:28:24.626195 INFO : End of 2D write delay Voltage center optimization
700 22:28:24.675463 INFO : End of 2D write delay Voltage center optimization
701 22:28:24.681037 INFO : Training has run successfully!
702 22:28:24.681488
703 22:28:24.681897 channel==0
704 22:28:24.686612 RxClkDly_Margin_A0==88 ps 9
705 22:28:24.687063 TxDqDly_Margin_A0==98 ps 10
706 22:28:24.689982 RxClkDly_Margin_A1==88 ps 9
707 22:28:24.690436 TxDqDly_Margin_A1==88 ps 9
708 22:28:24.695571 TrainedVREFDQ_A0==74
709 22:28:24.696058 TrainedVREFDQ_A1==74
710 22:28:24.696474 VrefDac_Margin_A0==25
711 22:28:24.701110 DeviceVref_Margin_A0==40
712 22:28:24.701561 VrefDac_Margin_A1==25
713 22:28:24.706710 DeviceVref_Margin_A1==40
714 22:28:24.707159
715 22:28:24.707566
716 22:28:24.707964 channel==1
717 22:28:24.708393 RxClkDly_Margin_A0==98 ps 10
718 22:28:24.710148 TxDqDly_Margin_A0==88 ps 9
719 22:28:24.715641 RxClkDly_Margin_A1==88 ps 9
720 22:28:24.716118 TxDqDly_Margin_A1==88 ps 9
721 22:28:24.716539 TrainedVREFDQ_A0==77
722 22:28:24.721257 TrainedVREFDQ_A1==77
723 22:28:24.721710 VrefDac_Margin_A0==22
724 22:28:24.726820 DeviceVref_Margin_A0==37
725 22:28:24.727289 VrefDac_Margin_A1==24
726 22:28:24.727711 DeviceVref_Margin_A1==37
727 22:28:24.728148
728 22:28:24.732474 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 22:28:24.732932
730 22:28:24.766056 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 0000001a 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
731 22:28:24.766541 2D training succeed
732 22:28:24.771666 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 22:28:24.777289 auto size-- 65535DDR cs0 size: 2048MB
734 22:28:24.777744 DDR cs1 size: 2048MB
735 22:28:24.782843 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 22:28:24.783296 cs0 DataBus test pass
737 22:28:24.783706 cs1 DataBus test pass
738 22:28:24.788488 cs0 AddrBus test pass
739 22:28:24.788936 cs1 AddrBus test pass
740 22:28:24.789340
741 22:28:24.794102 100bdlr_step_size ps== 420
742 22:28:24.794562 result report
743 22:28:24.794970 boot times 0Enable ddr reg access
744 22:28:24.803869 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 22:28:24.817133 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 22:28:25.390079 0.0;M3 CHK:0;cm4_sp_mode 0
747 22:28:25.390604 MVN_1=0x00000000
748 22:28:25.395798 MVN_2=0x00000000
749 22:28:25.401417 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 22:28:25.401895 OPS=0x10
751 22:28:25.402287 ring efuse init
752 22:28:25.402670 chipver efuse init
753 22:28:25.406992 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 22:28:25.412586 [0.018961 Inits done]
755 22:28:25.413028 secure task start!
756 22:28:25.413420 high task start!
757 22:28:25.417193 low task start!
758 22:28:25.417640 run into bl31
759 22:28:25.423836 NOTICE: BL31: v1.3(release):4fc40b1
760 22:28:25.431643 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 22:28:25.432119 NOTICE: BL31: G12A normal boot!
762 22:28:25.457553 NOTICE: BL31: BL33 decompress pass
763 22:28:25.463265 ERROR: Error initializing runtime service opteed_fast
764 22:28:26.696178
765 22:28:26.696735
766 22:28:26.704597 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 22:28:26.705063
768 22:28:26.705494 Model: Libre Computer AML-A311D-CC Alta
769 22:28:26.912925 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 22:28:26.936368 DRAM: 2 GiB (effective 3.8 GiB)
771 22:28:27.079356 Core: 408 devices, 31 uclasses, devicetree: separate
772 22:28:27.085223 WDT: Not starting watchdog@f0d0
773 22:28:27.117452 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 22:28:27.129969 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 22:28:27.134947 ** Bad device specification mmc 0 **
776 22:28:27.145269 Card did not respond to voltage select! : -110
777 22:28:27.152923 ** Bad device specification mmc 0 **
778 22:28:27.153376 Couldn't find partition mmc 0
779 22:28:27.161256 Card did not respond to voltage select! : -110
780 22:28:27.166798 ** Bad device specification mmc 0 **
781 22:28:27.167255 Couldn't find partition mmc 0
782 22:28:27.171842 Error: could not access storage.
783 22:28:27.515319 Net: eth0: ethernet@ff3f0000
784 22:28:27.515894 starting USB...
785 22:28:27.767168 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 22:28:27.767668 Starting the controller
787 22:28:27.774189 USB XHCI 1.10
788 22:28:29.935694 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 22:28:29.936640 bl2_stage_init 0x01
790 22:28:29.937243 bl2_stage_init 0x81
791 22:28:29.941152 hw id: 0x0000 - pwm id 0x01
792 22:28:29.941795 bl2_stage_init 0xc1
793 22:28:29.942433 bl2_stage_init 0x02
794 22:28:29.943064
795 22:28:29.946738 L0:00000000
796 22:28:29.947444 L1:20000703
797 22:28:29.948050 L2:00008067
798 22:28:29.948681 L3:14000000
799 22:28:29.949801 B2:00402000
800 22:28:29.950259 B1:e0f83180
801 22:28:29.950762
802 22:28:29.951388 TE: 58167
803 22:28:29.952021
804 22:28:29.960765 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 22:28:29.961420
806 22:28:29.962056 Board ID = 1
807 22:28:29.962678 Set A53 clk to 24M
808 22:28:29.963354 Set A73 clk to 24M
809 22:28:29.966438 Set clk81 to 24M
810 22:28:29.967131 A53 clk: 1200 MHz
811 22:28:29.967700 A73 clk: 1200 MHz
812 22:28:29.971852 CLK81: 166.6M
813 22:28:29.972573 smccc: 00012abd
814 22:28:29.977549 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 22:28:29.978182 board id: 1
816 22:28:29.986159 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 22:28:29.996878 fw parse done
818 22:28:30.002881 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 22:28:30.045396 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 22:28:30.056281 PIEI prepare done
821 22:28:30.056935 fastboot data load
822 22:28:30.057573 fastboot data verify
823 22:28:30.061912 verify result: 266
824 22:28:30.067526 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 22:28:30.068056 LPDDR4 probe
826 22:28:30.068521 ddr clk to 1584MHz
827 22:28:30.075605 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 22:28:30.112718
829 22:28:30.113213 dmc_version 0001
830 22:28:30.119411 Check phy result
831 22:28:30.125249 INFO : End of CA training
832 22:28:30.125747 INFO : End of initialization
833 22:28:30.131023 INFO : Training has run successfully!
834 22:28:30.131506 Check phy result
835 22:28:30.136562 INFO : End of initialization
836 22:28:30.137281 INFO : End of read enable training
837 22:28:30.142127 INFO : End of fine write leveling
838 22:28:30.147698 INFO : End of Write leveling coarse delay
839 22:28:30.148213 INFO : Training has run successfully!
840 22:28:30.148671 Check phy result
841 22:28:30.153326 INFO : End of initialization
842 22:28:30.153812 INFO : End of read dq deskew training
843 22:28:30.158909 INFO : End of MPR read delay center optimization
844 22:28:30.164611 INFO : End of write delay center optimization
845 22:28:30.170163 INFO : End of read delay center optimization
846 22:28:30.170870 INFO : End of max read latency training
847 22:28:30.175773 INFO : Training has run successfully!
848 22:28:30.176067 1D training succeed
849 22:28:30.184895 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 22:28:30.232478 Check phy result
851 22:28:30.232976 INFO : End of initialization
852 22:28:30.254195 INFO : End of 2D read delay Voltage center optimization
853 22:28:30.274450 INFO : End of 2D read delay Voltage center optimization
854 22:28:30.326447 INFO : End of 2D write delay Voltage center optimization
855 22:28:30.375937 INFO : End of 2D write delay Voltage center optimization
856 22:28:30.381469 INFO : Training has run successfully!
857 22:28:30.381954
858 22:28:30.382419 channel==0
859 22:28:30.387043 RxClkDly_Margin_A0==88 ps 9
860 22:28:30.387529 TxDqDly_Margin_A0==98 ps 10
861 22:28:30.390428 RxClkDly_Margin_A1==88 ps 9
862 22:28:30.390903 TxDqDly_Margin_A1==98 ps 10
863 22:28:30.397675 TrainedVREFDQ_A0==74
864 22:28:30.398217 TrainedVREFDQ_A1==74
865 22:28:30.398667 VrefDac_Margin_A0==25
866 22:28:30.402869 DeviceVref_Margin_A0==40
867 22:28:30.403343 VrefDac_Margin_A1==25
868 22:28:30.403777 DeviceVref_Margin_A1==40
869 22:28:30.404245
870 22:28:30.404677
871 22:28:30.408390 channel==1
872 22:28:30.408855 RxClkDly_Margin_A0==98 ps 10
873 22:28:30.414063 TxDqDly_Margin_A0==98 ps 10
874 22:28:30.414534 RxClkDly_Margin_A1==88 ps 9
875 22:28:30.414969 TxDqDly_Margin_A1==88 ps 9
876 22:28:30.421529 TrainedVREFDQ_A0==77
877 22:28:30.422024 TrainedVREFDQ_A1==77
878 22:28:30.422459 VrefDac_Margin_A0==22
879 22:28:30.427099 DeviceVref_Margin_A0==37
880 22:28:30.427569 VrefDac_Margin_A1==24
881 22:28:30.428026 DeviceVref_Margin_A1==37
882 22:28:30.428460
883 22:28:30.432606 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 22:28:30.433072
885 22:28:30.464195 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
886 22:28:30.464696 2D training succeed
887 22:28:30.475258 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 22:28:30.475734 auto size-- 65535DDR cs0 size: 2048MB
889 22:28:30.476217 DDR cs1 size: 2048MB
890 22:28:30.480811 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 22:28:30.481284 cs0 DataBus test pass
892 22:28:30.486489 cs1 DataBus test pass
893 22:28:30.486951 cs0 AddrBus test pass
894 22:28:30.492032 cs1 AddrBus test pass
895 22:28:30.492496
896 22:28:30.492927 100bdlr_step_size ps== 420
897 22:28:30.493366 result report
898 22:28:30.497597 boot times 0Enable ddr reg access
899 22:28:30.504207 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 22:28:30.517674 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 22:28:31.091431 0.0;M3 CHK:0;cm4_sp_mode 0
902 22:28:31.092088 MVN_1=0x00000000
903 22:28:31.096868 MVN_2=0x00000000
904 22:28:31.102621 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 22:28:31.103113 OPS=0x10
906 22:28:31.103555 ring efuse init
907 22:28:31.104015 chipver efuse init
908 22:28:31.108274 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 22:28:31.113826 [0.018961 Inits done]
910 22:28:31.114308 secure task start!
911 22:28:31.114748 high task start!
912 22:28:31.118394 low task start!
913 22:28:31.118870 run into bl31
914 22:28:31.125042 NOTICE: BL31: v1.3(release):4fc40b1
915 22:28:31.132876 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 22:28:31.133357 NOTICE: BL31: G12A normal boot!
917 22:28:31.158185 NOTICE: BL31: BL33 decompress pass
918 22:28:31.163891 ERROR: Error initializing runtime service opteed_fast
919 22:28:32.396835
920 22:28:32.397440
921 22:28:32.405149 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 22:28:32.405646
923 22:28:32.406089 Model: Libre Computer AML-A311D-CC Alta
924 22:28:32.613581 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 22:28:32.636941 DRAM: 2 GiB (effective 3.8 GiB)
926 22:28:32.779895 Core: 408 devices, 31 uclasses, devicetree: separate
927 22:28:32.785834 WDT: Not starting watchdog@f0d0
928 22:28:32.818053 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 22:28:32.830520 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 22:28:32.835566 ** Bad device specification mmc 0 **
931 22:28:32.845856 Card did not respond to voltage select! : -110
932 22:28:32.853496 ** Bad device specification mmc 0 **
933 22:28:32.853984 Couldn't find partition mmc 0
934 22:28:32.861829 Card did not respond to voltage select! : -110
935 22:28:32.867370 ** Bad device specification mmc 0 **
936 22:28:32.867852 Couldn't find partition mmc 0
937 22:28:32.872422 Error: could not access storage.
938 22:28:33.214885 Net: eth0: ethernet@ff3f0000
939 22:28:33.215467 starting USB...
940 22:28:33.466672 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 22:28:33.467214 Starting the controller
942 22:28:33.473665 USB XHCI 1.10
943 22:28:35.334954 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
944 22:28:35.335590 bl2_stage_init 0x01
945 22:28:35.336135 bl2_stage_init 0x81
946 22:28:35.340538 hw id: 0x0000 - pwm id 0x01
947 22:28:35.341054 bl2_stage_init 0xc1
948 22:28:35.341514 bl2_stage_init 0x02
949 22:28:35.341968
950 22:28:35.346128 L0:00000000
951 22:28:35.346632 L1:20000703
952 22:28:35.347093 L2:00008067
953 22:28:35.347542 L3:14000000
954 22:28:35.349112 B2:00402000
955 22:28:35.349621 B1:e0f83180
956 22:28:35.350077
957 22:28:35.350519 TE: 58124
958 22:28:35.350968
959 22:28:35.360219 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
960 22:28:35.360731
961 22:28:35.361193 Board ID = 1
962 22:28:35.361638 Set A53 clk to 24M
963 22:28:35.362079 Set A73 clk to 24M
964 22:28:35.365831 Set clk81 to 24M
965 22:28:35.366332 A53 clk: 1200 MHz
966 22:28:35.366786 A73 clk: 1200 MHz
967 22:28:35.371413 CLK81: 166.6M
968 22:28:35.371909 smccc: 00012a91
969 22:28:35.377109 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
970 22:28:35.377619 board id: 1
971 22:28:35.385595 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
972 22:28:35.396243 fw parse done
973 22:28:35.402257 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
974 22:28:35.444926 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
975 22:28:35.455748 PIEI prepare done
976 22:28:35.456290 fastboot data load
977 22:28:35.456729 fastboot data verify
978 22:28:35.461436 verify result: 266
979 22:28:35.467180 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
980 22:28:35.467659 LPDDR4 probe
981 22:28:35.468117 ddr clk to 1584MHz
982 22:28:35.475077 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
983 22:28:35.512446
984 22:28:35.512922 dmc_version 0001
985 22:28:35.519228 Check phy result
986 22:28:35.525075 INFO : End of CA training
987 22:28:35.525553 INFO : End of initialization
988 22:28:35.530590 INFO : Training has run successfully!
989 22:28:35.531154 Check phy result
990 22:28:35.536257 INFO : End of initialization
991 22:28:35.536770 INFO : End of read enable training
992 22:28:35.539669 INFO : End of fine write leveling
993 22:28:35.545109 INFO : End of Write leveling coarse delay
994 22:28:35.550687 INFO : Training has run successfully!
995 22:28:35.551189 Check phy result
996 22:28:35.551642 INFO : End of initialization
997 22:28:35.556360 INFO : End of read dq deskew training
998 22:28:35.561880 INFO : End of MPR read delay center optimization
999 22:28:35.562375 INFO : End of write delay center optimization
1000 22:28:35.567575 INFO : End of read delay center optimization
1001 22:28:35.573066 INFO : End of max read latency training
1002 22:28:35.573565 INFO : Training has run successfully!
1003 22:28:35.578614 1D training succeed
1004 22:28:35.584444 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 22:28:35.632086 Check phy result
1006 22:28:35.632599 INFO : End of initialization
1007 22:28:35.653892 INFO : End of 2D read delay Voltage center optimization
1008 22:28:35.674146 INFO : End of 2D read delay Voltage center optimization
1009 22:28:35.726180 INFO : End of 2D write delay Voltage center optimization
1010 22:28:35.775483 INFO : End of 2D write delay Voltage center optimization
1011 22:28:35.781116 INFO : Training has run successfully!
1012 22:28:35.781623
1013 22:28:35.782092 channel==0
1014 22:28:35.786617 RxClkDly_Margin_A0==88 ps 9
1015 22:28:35.787120 TxDqDly_Margin_A0==98 ps 10
1016 22:28:35.792329 RxClkDly_Margin_A1==88 ps 9
1017 22:28:35.792840 TxDqDly_Margin_A1==88 ps 9
1018 22:28:35.793305 TrainedVREFDQ_A0==74
1019 22:28:35.797802 TrainedVREFDQ_A1==74
1020 22:28:35.798304 VrefDac_Margin_A0==25
1021 22:28:35.798766 DeviceVref_Margin_A0==40
1022 22:28:35.803470 VrefDac_Margin_A1==25
1023 22:28:35.803975 DeviceVref_Margin_A1==40
1024 22:28:35.804477
1025 22:28:35.804931
1026 22:28:35.805382 channel==1
1027 22:28:35.809121 RxClkDly_Margin_A0==98 ps 10
1028 22:28:35.809619 TxDqDly_Margin_A0==98 ps 10
1029 22:28:35.814618 RxClkDly_Margin_A1==88 ps 9
1030 22:28:35.815112 TxDqDly_Margin_A1==108 ps 11
1031 22:28:35.820331 TrainedVREFDQ_A0==77
1032 22:28:35.820830 TrainedVREFDQ_A1==78
1033 22:28:35.821284 VrefDac_Margin_A0==22
1034 22:28:35.825803 DeviceVref_Margin_A0==37
1035 22:28:35.826290 VrefDac_Margin_A1==24
1036 22:28:35.831473 DeviceVref_Margin_A1==36
1037 22:28:35.831969
1038 22:28:35.832467 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1039 22:28:35.837116
1040 22:28:35.865072 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
1041 22:28:35.865617 2D training succeed
1042 22:28:35.870635 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1043 22:28:35.876321 auto size-- 65535DDR cs0 size: 2048MB
1044 22:28:35.876827 DDR cs1 size: 2048MB
1045 22:28:35.881702 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1046 22:28:35.882196 cs0 DataBus test pass
1047 22:28:35.887349 cs1 DataBus test pass
1048 22:28:35.887840 cs0 AddrBus test pass
1049 22:28:35.888349 cs1 AddrBus test pass
1050 22:28:35.888795
1051 22:28:35.893014 100bdlr_step_size ps== 420
1052 22:28:35.893528 result report
1053 22:28:35.898515 boot times 0Enable ddr reg access
1054 22:28:35.903935 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1055 22:28:35.917425 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1056 22:28:36.491192 0.0;M3 CHK:0;cm4_sp_mode 0
1057 22:28:36.491815 MVN_1=0x00000000
1058 22:28:36.496659 MVN_2=0x00000000
1059 22:28:36.502411 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1060 22:28:36.502876 OPS=0x10
1061 22:28:36.503289 ring efuse init
1062 22:28:36.503687 chipver efuse init
1063 22:28:36.508062 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1064 22:28:36.513625 [0.018961 Inits done]
1065 22:28:36.514070 secure task start!
1066 22:28:36.514469 high task start!
1067 22:28:36.518126 low task start!
1068 22:28:36.518568 run into bl31
1069 22:28:36.524804 NOTICE: BL31: v1.3(release):4fc40b1
1070 22:28:36.532607 NOTICE: BL31: Built : 15:58:17, May 22 2019
1071 22:28:36.533056 NOTICE: BL31: G12A normal boot!
1072 22:28:36.558011 NOTICE: BL31: BL33 decompress pass
1073 22:28:36.563672 ERROR: Error initializing runtime service opteed_fast
1074 22:28:37.796689
1075 22:28:37.797585
1076 22:28:37.805053 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1077 22:28:37.805825
1078 22:28:37.806536 Model: Libre Computer AML-A311D-CC Alta
1079 22:28:38.013507 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1080 22:28:38.036877 DRAM: 2 GiB (effective 3.8 GiB)
1081 22:28:38.179898 Core: 408 devices, 31 uclasses, devicetree: separate
1082 22:28:38.185802 WDT: Not starting watchdog@f0d0
1083 22:28:38.218016 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1084 22:28:38.230583 Loading Environment from FAT... Card did not respond to voltage select! : -110
1085 22:28:38.235474 ** Bad device specification mmc 0 **
1086 22:28:38.245773 Card did not respond to voltage select! : -110
1087 22:28:38.253412 ** Bad device specification mmc 0 **
1088 22:28:38.254181 Couldn't find partition mmc 0
1089 22:28:38.261743 Card did not respond to voltage select! : -110
1090 22:28:38.267330 ** Bad device specification mmc 0 **
1091 22:28:38.268121 Couldn't find partition mmc 0
1092 22:28:38.272380 Error: could not access storage.
1093 22:28:38.615919 Net: eth0: ethernet@ff3f0000
1094 22:28:38.616844 starting USB...
1095 22:28:38.867851 Bus usb@ff500000: Register 3000140 NbrPorts 3
1096 22:28:38.868778 Starting the controller
1097 22:28:38.874755 USB XHCI 1.10
1098 22:28:40.431650 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1099 22:28:40.440329 scanning usb for storage devices... 0 Storage Device(s) found
1101 22:28:40.492651 Hit any key to stop autoboot: 1
1102 22:28:40.494039 end: 2.4.2 bootloader-interrupt (duration 00:00:36) [common]
1103 22:28:40.494713 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1104 22:28:40.495192 Setting prompt string to ['=>']
1105 22:28:40.495673 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1106 22:28:40.507399 0
1107 22:28:40.508732 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1108 22:28:40.509522 Sending with 10 millisecond of delay
1110 22:28:41.646034 => setenv autoload no
1111 22:28:41.656622 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1112 22:28:41.659206 setenv autoload no
1113 22:28:41.659741 Sending with 10 millisecond of delay
1115 22:28:43.456308 => setenv initrd_high 0xffffffff
1116 22:28:43.467056 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1117 22:28:43.467748 setenv initrd_high 0xffffffff
1118 22:28:43.468301 Sending with 10 millisecond of delay
1120 22:28:45.083686 => setenv fdt_high 0xffffffff
1121 22:28:45.094473 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1122 22:28:45.095302 setenv fdt_high 0xffffffff
1123 22:28:45.096045 Sending with 10 millisecond of delay
1125 22:28:45.387799 => dhcp
1126 22:28:45.398514 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1127 22:28:45.399344 dhcp
1128 22:28:45.399793 Speed: 1000, full duplex
1129 22:28:45.400257 BOOTP broadcast 1
1130 22:28:45.407780 DHCP client bound to address 192.168.6.27 (9 ms)
1131 22:28:45.408550 Sending with 10 millisecond of delay
1133 22:28:47.084704 => setenv serverip 192.168.6.2
1134 22:28:47.095472 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1135 22:28:47.096392 setenv serverip 192.168.6.2
1136 22:28:47.097091 Sending with 10 millisecond of delay
1138 22:28:50.819695 => tftpboot 0x01080000 936630/tftp-deploy-akgqb7_n/kernel/uImage
1139 22:28:50.830558 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:13)
1140 22:28:50.831502 tftpboot 0x01080000 936630/tftp-deploy-akgqb7_n/kernel/uImage
1141 22:28:50.831969 Speed: 1000, full duplex
1142 22:28:50.832445 Using ethernet@ff3f0000 device
1143 22:28:50.833571 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1144 22:28:50.838979 Filename '936630/tftp-deploy-akgqb7_n/kernel/uImage'.
1145 22:28:50.842893 Load address: 0x1080000
1146 22:28:53.613252 Loading: *################################################## 43.6 MiB
1147 22:28:53.613875 15.7 MiB/s
1148 22:28:53.614308 done
1149 22:28:53.617785 Bytes transferred = 45713984 (2b98a40 hex)
1150 22:28:53.618598 Sending with 10 millisecond of delay
1152 22:28:58.304050 => tftpboot 0x08000000 936630/tftp-deploy-akgqb7_n/ramdisk/ramdisk.cpio.gz.uboot
1153 22:28:58.314845 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:06)
1154 22:28:58.315685 tftpboot 0x08000000 936630/tftp-deploy-akgqb7_n/ramdisk/ramdisk.cpio.gz.uboot
1155 22:28:58.316170 Speed: 1000, full duplex
1156 22:28:58.316586 Using ethernet@ff3f0000 device
1157 22:28:58.317748 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1158 22:28:58.329540 Filename '936630/tftp-deploy-akgqb7_n/ramdisk/ramdisk.cpio.gz.uboot'.
1159 22:28:58.330048 Load address: 0x8000000
1160 22:29:05.460191 Loading: *###################T ############################## UDP wrong checksum 00000005 0000055f
1161 22:29:10.460505 T UDP wrong checksum 00000005 0000055f
1162 22:29:20.463727 T T UDP wrong checksum 00000005 0000055f
1163 22:29:40.467630 T T T T UDP wrong checksum 00000005 0000055f
1164 22:29:52.599976 T T UDP wrong checksum 000000ff 0000091a
1165 22:29:52.650233 UDP wrong checksum 000000ff 00009a0c
1166 22:29:55.471719
1167 22:29:55.472380 Retry count exceeded; starting again
1169 22:29:55.473776 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1172 22:29:55.475587 end: 2.4 uboot-commands (duration 00:01:52) [common]
1174 22:29:55.476996 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1176 22:29:55.478027 end: 2 uboot-action (duration 00:01:52) [common]
1178 22:29:55.479574 Cleaning after the job
1179 22:29:55.480160 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/ramdisk
1180 22:29:55.481470 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/kernel
1181 22:29:55.527825 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/dtb
1182 22:29:55.528677 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/nfsrootfs
1183 22:29:55.838517 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936630/tftp-deploy-akgqb7_n/modules
1184 22:29:55.858936 start: 4.1 power-off (timeout 00:00:30) [common]
1185 22:29:55.859584 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1186 22:29:55.908188 >> OK - accepted request
1187 22:29:55.910189 Returned 0 in 0 seconds
1188 22:29:56.010895 end: 4.1 power-off (duration 00:00:00) [common]
1190 22:29:56.011857 start: 4.2 read-feedback (timeout 00:10:00) [common]
1191 22:29:56.012550 Listened to connection for namespace 'common' for up to 1s
1192 22:29:57.013477 Finalising connection for namespace 'common'
1193 22:29:57.014001 Disconnecting from shell: Finalise
1194 22:29:57.014296 =>
1195 22:29:57.115045 end: 4.2 read-feedback (duration 00:00:01) [common]
1196 22:29:57.115688 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/936630
1197 22:30:00.041461 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/936630
1198 22:30:00.042098 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.