Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:39:09.327690 lava-dispatcher, installed at version: 2024.01
2 20:39:09.328578 start: 0 validate
3 20:39:09.329075 Start time: 2024-11-11 20:39:09.329045+00:00 (UTC)
4 20:39:09.329692 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:39:09.330327 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 20:39:09.370215 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:39:09.370781 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fpm%2Ftesting%2Fv6.12-rc7-108-g7b04a3bdf53e%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 20:39:09.407307 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:39:09.407937 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fpm%2Ftesting%2Fv6.12-rc7-108-g7b04a3bdf53e%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 20:39:09.439537 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:39:09.440264 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fpm%2Ftesting%2Fv6.12-rc7-108-g7b04a3bdf53e%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 20:39:09.478357 validate duration: 0.15
14 20:39:09.479240 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:39:09.479571 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:39:09.479879 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:39:09.480495 Not decompressing ramdisk as can be used compressed.
18 20:39:09.480920 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 20:39:09.481188 saving as /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/ramdisk/rootfs.cpio.gz
20 20:39:09.481461 total size: 47897469 (45 MB)
21 20:39:09.521724 progress 0 % (0 MB)
22 20:39:09.553235 progress 5 % (2 MB)
23 20:39:09.584284 progress 10 % (4 MB)
24 20:39:09.614710 progress 15 % (6 MB)
25 20:39:09.645942 progress 20 % (9 MB)
26 20:39:09.676690 progress 25 % (11 MB)
27 20:39:09.707296 progress 30 % (13 MB)
28 20:39:09.738211 progress 35 % (16 MB)
29 20:39:09.768800 progress 40 % (18 MB)
30 20:39:09.799334 progress 45 % (20 MB)
31 20:39:09.830055 progress 50 % (22 MB)
32 20:39:09.860971 progress 55 % (25 MB)
33 20:39:09.892131 progress 60 % (27 MB)
34 20:39:09.922684 progress 65 % (29 MB)
35 20:39:09.953652 progress 70 % (32 MB)
36 20:39:09.984139 progress 75 % (34 MB)
37 20:39:10.014797 progress 80 % (36 MB)
38 20:39:10.047310 progress 85 % (38 MB)
39 20:39:10.080979 progress 90 % (41 MB)
40 20:39:10.112969 progress 95 % (43 MB)
41 20:39:10.144174 progress 100 % (45 MB)
42 20:39:10.144956 45 MB downloaded in 0.66 s (68.85 MB/s)
43 20:39:10.145578 end: 1.1.1 http-download (duration 00:00:01) [common]
45 20:39:10.146580 end: 1.1 download-retry (duration 00:00:01) [common]
46 20:39:10.146895 start: 1.2 download-retry (timeout 00:09:59) [common]
47 20:39:10.147185 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 20:39:10.147685 downloading http://storage.kernelci.org/pm/testing/v6.12-rc7-108-g7b04a3bdf53e/arm64/defconfig/gcc-12/kernel/Image
49 20:39:10.148041 saving as /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/kernel/Image
50 20:39:10.148315 total size: 45713920 (43 MB)
51 20:39:10.148583 No compression specified
52 20:39:10.194228 progress 0 % (0 MB)
53 20:39:10.222752 progress 5 % (2 MB)
54 20:39:10.251089 progress 10 % (4 MB)
55 20:39:10.279543 progress 15 % (6 MB)
56 20:39:10.307785 progress 20 % (8 MB)
57 20:39:10.336085 progress 25 % (10 MB)
58 20:39:10.365230 progress 30 % (13 MB)
59 20:39:10.393704 progress 35 % (15 MB)
60 20:39:10.422294 progress 40 % (17 MB)
61 20:39:10.450353 progress 45 % (19 MB)
62 20:39:10.478837 progress 50 % (21 MB)
63 20:39:10.507655 progress 55 % (24 MB)
64 20:39:10.535947 progress 60 % (26 MB)
65 20:39:10.563827 progress 65 % (28 MB)
66 20:39:10.592203 progress 70 % (30 MB)
67 20:39:10.620499 progress 75 % (32 MB)
68 20:39:10.648771 progress 80 % (34 MB)
69 20:39:10.676588 progress 85 % (37 MB)
70 20:39:10.704878 progress 90 % (39 MB)
71 20:39:10.733399 progress 95 % (41 MB)
72 20:39:10.761068 progress 100 % (43 MB)
73 20:39:10.761595 43 MB downloaded in 0.61 s (71.09 MB/s)
74 20:39:10.762114 end: 1.2.1 http-download (duration 00:00:01) [common]
76 20:39:10.762956 end: 1.2 download-retry (duration 00:00:01) [common]
77 20:39:10.763247 start: 1.3 download-retry (timeout 00:09:59) [common]
78 20:39:10.763519 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 20:39:10.764014 downloading http://storage.kernelci.org/pm/testing/v6.12-rc7-108-g7b04a3bdf53e/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 20:39:10.764308 saving as /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 20:39:10.764529 total size: 53209 (0 MB)
82 20:39:10.764753 No compression specified
83 20:39:10.810016 progress 61 % (0 MB)
84 20:39:10.810869 progress 100 % (0 MB)
85 20:39:10.811438 0 MB downloaded in 0.05 s (1.08 MB/s)
86 20:39:10.811945 end: 1.3.1 http-download (duration 00:00:00) [common]
88 20:39:10.812853 end: 1.3 download-retry (duration 00:00:00) [common]
89 20:39:10.813136 start: 1.4 download-retry (timeout 00:09:59) [common]
90 20:39:10.813413 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 20:39:10.813877 downloading http://storage.kernelci.org/pm/testing/v6.12-rc7-108-g7b04a3bdf53e/arm64/defconfig/gcc-12/modules.tar.xz
92 20:39:10.814125 saving as /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/modules/modules.tar
93 20:39:10.814336 total size: 11613924 (11 MB)
94 20:39:10.814553 Using unxz to decompress xz
95 20:39:10.854272 progress 0 % (0 MB)
96 20:39:10.925204 progress 5 % (0 MB)
97 20:39:11.005373 progress 10 % (1 MB)
98 20:39:11.109175 progress 15 % (1 MB)
99 20:39:11.205064 progress 20 % (2 MB)
100 20:39:11.286895 progress 25 % (2 MB)
101 20:39:11.365814 progress 30 % (3 MB)
102 20:39:11.447304 progress 35 % (3 MB)
103 20:39:11.522498 progress 40 % (4 MB)
104 20:39:11.601645 progress 45 % (5 MB)
105 20:39:11.690071 progress 50 % (5 MB)
106 20:39:11.772060 progress 55 % (6 MB)
107 20:39:11.860443 progress 60 % (6 MB)
108 20:39:11.943601 progress 65 % (7 MB)
109 20:39:12.024575 progress 70 % (7 MB)
110 20:39:12.112930 progress 75 % (8 MB)
111 20:39:12.211116 progress 80 % (8 MB)
112 20:39:12.293432 progress 85 % (9 MB)
113 20:39:12.383189 progress 90 % (9 MB)
114 20:39:12.465263 progress 95 % (10 MB)
115 20:39:12.549987 progress 100 % (11 MB)
116 20:39:12.563544 11 MB downloaded in 1.75 s (6.33 MB/s)
117 20:39:12.564520 end: 1.4.1 http-download (duration 00:00:02) [common]
119 20:39:12.566310 end: 1.4 download-retry (duration 00:00:02) [common]
120 20:39:12.566886 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 20:39:12.567454 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 20:39:12.568024 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 20:39:12.568592 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 20:39:12.569621 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n
125 20:39:12.570512 makedir: /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin
126 20:39:12.571195 makedir: /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/tests
127 20:39:12.571860 makedir: /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/results
128 20:39:12.572569 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-add-keys
129 20:39:12.573593 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-add-sources
130 20:39:12.574581 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-background-process-start
131 20:39:12.575590 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-background-process-stop
132 20:39:12.576693 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-common-functions
133 20:39:12.577681 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-echo-ipv4
134 20:39:12.578639 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-install-packages
135 20:39:12.579591 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-installed-packages
136 20:39:12.580577 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-os-build
137 20:39:12.581531 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-probe-channel
138 20:39:12.582484 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-probe-ip
139 20:39:12.583435 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-target-ip
140 20:39:12.584573 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-target-mac
141 20:39:12.585566 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-target-storage
142 20:39:12.586587 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-test-case
143 20:39:12.587554 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-test-event
144 20:39:12.588624 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-test-feedback
145 20:39:12.589594 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-test-raise
146 20:39:12.590549 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-test-reference
147 20:39:12.591501 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-test-runner
148 20:39:12.592526 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-test-set
149 20:39:12.593514 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-test-shell
150 20:39:12.594474 Updating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-install-packages (oe)
151 20:39:12.595492 Updating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/bin/lava-installed-packages (oe)
152 20:39:12.596420 Creating /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/environment
153 20:39:12.597189 LAVA metadata
154 20:39:12.597711 - LAVA_JOB_ID=976655
155 20:39:12.598174 - LAVA_DISPATCHER_IP=192.168.6.2
156 20:39:12.598877 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 20:39:12.600815 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 20:39:12.601443 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 20:39:12.601894 skipped lava-vland-overlay
160 20:39:12.602428 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 20:39:12.602986 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 20:39:12.603449 skipped lava-multinode-overlay
163 20:39:12.604026 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 20:39:12.604548 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 20:39:12.605016 Loading test definitions
166 20:39:12.605551 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 20:39:12.605982 Using /lava-976655 at stage 0
168 20:39:12.608065 uuid=976655_1.5.2.4.1 testdef=None
169 20:39:12.608627 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 20:39:12.609137 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 20:39:12.612221 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 20:39:12.613027 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 20:39:12.615138 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 20:39:12.616003 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 20:39:12.618065 runner path: /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/0/tests/0_igt-gpu-panfrost test_uuid 976655_1.5.2.4.1
178 20:39:12.618611 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 20:39:12.619413 Creating lava-test-runner.conf files
181 20:39:12.619621 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/976655/lava-overlay-bdi0vf2n/lava-976655/0 for stage 0
182 20:39:12.619959 - 0_igt-gpu-panfrost
183 20:39:12.620332 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 20:39:12.620608 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 20:39:12.643742 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 20:39:12.644139 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 20:39:12.644403 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 20:39:12.644666 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 20:39:12.644926 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 20:39:19.644594 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 20:39:19.645060 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 20:39:19.645305 extracting modules file /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/976655/extract-overlay-ramdisk-b79jj891/ramdisk
193 20:39:21.074299 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 20:39:21.074783 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
195 20:39:21.075062 [common] Applying overlay /var/lib/lava/dispatcher/tmp/976655/compress-overlay-6u_r78uk/overlay-1.5.2.5.tar.gz to ramdisk
196 20:39:21.075278 [common] Applying overlay /var/lib/lava/dispatcher/tmp/976655/compress-overlay-6u_r78uk/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/976655/extract-overlay-ramdisk-b79jj891/ramdisk
197 20:39:21.105027 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 20:39:21.105432 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 20:39:21.105702 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 20:39:21.105929 Converting downloaded kernel to a uImage
201 20:39:21.106229 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/kernel/Image /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/kernel/uImage
202 20:39:21.570412 output: Image Name:
203 20:39:21.570936 output: Created: Mon Nov 11 20:39:21 2024
204 20:39:21.571237 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 20:39:21.571508 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 20:39:21.571801 output: Load Address: 01080000
207 20:39:21.572149 output: Entry Point: 01080000
208 20:39:21.572449 output:
209 20:39:21.572797 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 20:39:21.573066 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 20:39:21.573332 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 20:39:21.573589 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 20:39:21.573846 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 20:39:21.574097 Building ramdisk /var/lib/lava/dispatcher/tmp/976655/extract-overlay-ramdisk-b79jj891/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/976655/extract-overlay-ramdisk-b79jj891/ramdisk
215 20:39:28.322611 >> 502415 blocks
216 20:39:49.140025 Adding RAMdisk u-boot header.
217 20:39:49.140876 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/976655/extract-overlay-ramdisk-b79jj891/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/976655/extract-overlay-ramdisk-b79jj891/ramdisk.cpio.gz.uboot
218 20:39:49.825586 output: Image Name:
219 20:39:49.826401 output: Created: Mon Nov 11 20:39:49 2024
220 20:39:49.826942 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 20:39:49.827463 output: Data Size: 65712053 Bytes = 64171.93 KiB = 62.67 MiB
222 20:39:49.828032 output: Load Address: 00000000
223 20:39:49.828567 output: Entry Point: 00000000
224 20:39:49.829082 output:
225 20:39:49.830401 rename /var/lib/lava/dispatcher/tmp/976655/extract-overlay-ramdisk-b79jj891/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/ramdisk/ramdisk.cpio.gz.uboot
226 20:39:49.831312 end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
227 20:39:49.832030 end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
228 20:39:49.832713 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:20) [common]
229 20:39:49.833299 No LXC device requested
230 20:39:49.833934 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 20:39:49.834579 start: 1.7 deploy-device-env (timeout 00:09:20) [common]
232 20:39:49.835212 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 20:39:49.835730 Checking files for TFTP limit of 4294967296 bytes.
234 20:39:49.839162 end: 1 tftp-deploy (duration 00:00:40) [common]
235 20:39:49.839896 start: 2 uboot-action (timeout 00:05:00) [common]
236 20:39:49.840599 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 20:39:49.841237 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 20:39:49.841876 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 20:39:49.842544 Using kernel file from prepare-kernel: 976655/tftp-deploy-70pzt75x/kernel/uImage
240 20:39:49.843337 substitutions:
241 20:39:49.843861 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 20:39:49.844413 - {DTB_ADDR}: 0x01070000
243 20:39:49.844921 - {DTB}: 976655/tftp-deploy-70pzt75x/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 20:39:49.845430 - {INITRD}: 976655/tftp-deploy-70pzt75x/ramdisk/ramdisk.cpio.gz.uboot
245 20:39:49.845933 - {KERNEL_ADDR}: 0x01080000
246 20:39:49.846436 - {KERNEL}: 976655/tftp-deploy-70pzt75x/kernel/uImage
247 20:39:49.846943 - {LAVA_MAC}: None
248 20:39:49.847495 - {PRESEED_CONFIG}: None
249 20:39:49.848025 - {PRESEED_LOCAL}: None
250 20:39:49.848533 - {RAMDISK_ADDR}: 0x08000000
251 20:39:49.849024 - {RAMDISK}: 976655/tftp-deploy-70pzt75x/ramdisk/ramdisk.cpio.gz.uboot
252 20:39:49.849533 - {ROOT_PART}: None
253 20:39:49.850034 - {ROOT}: None
254 20:39:49.850537 - {SERVER_IP}: 192.168.6.2
255 20:39:49.851041 - {TEE_ADDR}: 0x83000000
256 20:39:49.851541 - {TEE}: None
257 20:39:49.852072 Parsed boot commands:
258 20:39:49.852568 - setenv autoload no
259 20:39:49.853073 - setenv initrd_high 0xffffffff
260 20:39:49.853571 - setenv fdt_high 0xffffffff
261 20:39:49.854058 - dhcp
262 20:39:49.854557 - setenv serverip 192.168.6.2
263 20:39:49.855054 - tftpboot 0x01080000 976655/tftp-deploy-70pzt75x/kernel/uImage
264 20:39:49.855559 - tftpboot 0x08000000 976655/tftp-deploy-70pzt75x/ramdisk/ramdisk.cpio.gz.uboot
265 20:39:49.856078 - tftpboot 0x01070000 976655/tftp-deploy-70pzt75x/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 20:39:49.856583 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 20:39:49.857089 - bootm 0x01080000 0x08000000 0x01070000
268 20:39:49.857724 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 20:39:49.859621 start: 2.3 connect-device (timeout 00:05:00) [common]
271 20:39:49.860203 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 20:39:49.876789 Setting prompt string to ['lava-test: # ']
273 20:39:49.878651 end: 2.3 connect-device (duration 00:00:00) [common]
274 20:39:49.879446 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 20:39:49.880160 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 20:39:49.880836 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 20:39:49.882294 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 20:39:49.940601 >> OK - accepted request
279 20:39:49.942766 Returned 0 in 0 seconds
280 20:39:50.044252 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 20:39:50.046407 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 20:39:50.047140 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 20:39:50.047759 Setting prompt string to ['Hit any key to stop autoboot']
285 20:39:50.048367 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 20:39:50.050424 Trying 192.168.56.21...
287 20:39:50.051059 Connected to conserv1.
288 20:39:50.051609 Escape character is '^]'.
289 20:39:50.052189
290 20:39:50.052746 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 20:39:50.053299
292 20:39:57.383344 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 20:39:57.384231 bl2_stage_init 0x01
294 20:39:57.384791 bl2_stage_init 0x81
295 20:39:57.388881 hw id: 0x0000 - pwm id 0x01
296 20:39:57.389469 bl2_stage_init 0xc1
297 20:39:57.394737 bl2_stage_init 0x02
298 20:39:57.395287
299 20:39:57.395802 L0:00000000
300 20:39:57.396394 L1:00000703
301 20:39:57.396913 L2:00008067
302 20:39:57.397417 L3:15000000
303 20:39:57.400231 S1:00000000
304 20:39:57.400788 B2:20282000
305 20:39:57.401296 B1:a0f83180
306 20:39:57.401800
307 20:39:57.402300 TE: 69958
308 20:39:57.402806
309 20:39:57.405887 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 20:39:57.406437
311 20:39:57.411204 Board ID = 1
312 20:39:57.411744 Set cpu clk to 24M
313 20:39:57.412302 Set clk81 to 24M
314 20:39:57.416902 Use GP1_pll as DSU clk.
315 20:39:57.417445 DSU clk: 1200 Mhz
316 20:39:57.417949 CPU clk: 1200 MHz
317 20:39:57.422585 Set clk81 to 166.6M
318 20:39:57.428089 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 20:39:57.428627 board id: 1
320 20:39:57.435234 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 20:39:57.445807 fw parse done
322 20:39:57.451704 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 20:39:57.494500 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 20:39:57.505278 PIEI prepare done
325 20:39:57.505819 fastboot data load
326 20:39:57.506332 fastboot data verify
327 20:39:57.510853 verify result: 266
328 20:39:57.516444 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 20:39:57.516984 LPDDR4 probe
330 20:39:57.517492 ddr clk to 1584MHz
331 20:39:57.524482 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 20:39:57.561721
333 20:39:57.562274 dmc_version 0001
334 20:39:57.568479 Check phy result
335 20:39:57.574279 INFO : End of CA training
336 20:39:57.574820 INFO : End of initialization
337 20:39:57.579869 INFO : Training has run successfully!
338 20:39:57.580476 Check phy result
339 20:39:57.585487 INFO : End of initialization
340 20:39:57.586012 INFO : End of read enable training
341 20:39:57.591076 INFO : End of fine write leveling
342 20:39:57.596685 INFO : End of Write leveling coarse delay
343 20:39:57.597239 INFO : Training has run successfully!
344 20:39:57.597749 Check phy result
345 20:39:57.602288 INFO : End of initialization
346 20:39:57.602848 INFO : End of read dq deskew training
347 20:39:57.607887 INFO : End of MPR read delay center optimization
348 20:39:57.613483 INFO : End of write delay center optimization
349 20:39:57.619084 INFO : End of read delay center optimization
350 20:39:57.619629 INFO : End of max read latency training
351 20:39:57.624698 INFO : Training has run successfully!
352 20:39:57.625246 1D training succeed
353 20:39:57.633851 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 20:39:57.681576 Check phy result
355 20:39:57.682125 INFO : End of initialization
356 20:39:57.703814 INFO : End of 2D read delay Voltage center optimization
357 20:39:57.722956 INFO : End of 2D read delay Voltage center optimization
358 20:39:57.774854 INFO : End of 2D write delay Voltage center optimization
359 20:39:57.824046 INFO : End of 2D write delay Voltage center optimization
360 20:39:57.829600 INFO : Training has run successfully!
361 20:39:57.830144
362 20:39:57.830653 channel==0
363 20:39:57.835207 RxClkDly_Margin_A0==88 ps 9
364 20:39:57.835749 TxDqDly_Margin_A0==98 ps 10
365 20:39:57.840790 RxClkDly_Margin_A1==69 ps 7
366 20:39:57.841327 TxDqDly_Margin_A1==98 ps 10
367 20:39:57.841838 TrainedVREFDQ_A0==77
368 20:39:57.846432 TrainedVREFDQ_A1==74
369 20:39:57.846961 VrefDac_Margin_A0==24
370 20:39:57.847464 DeviceVref_Margin_A0==37
371 20:39:57.852002 VrefDac_Margin_A1==22
372 20:39:57.852528 DeviceVref_Margin_A1==40
373 20:39:57.853033
374 20:39:57.853539
375 20:39:57.857666 channel==1
376 20:39:57.858200 RxClkDly_Margin_A0==78 ps 8
377 20:39:57.858703 TxDqDly_Margin_A0==88 ps 9
378 20:39:57.863217 RxClkDly_Margin_A1==78 ps 8
379 20:39:57.863741 TxDqDly_Margin_A1==88 ps 9
380 20:39:57.868823 TrainedVREFDQ_A0==75
381 20:39:57.869351 TrainedVREFDQ_A1==75
382 20:39:57.869857 VrefDac_Margin_A0==22
383 20:39:57.874482 DeviceVref_Margin_A0==39
384 20:39:57.875018 VrefDac_Margin_A1==22
385 20:39:57.880041 DeviceVref_Margin_A1==39
386 20:39:57.880595
387 20:39:57.881116 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 20:39:57.881627
389 20:39:57.913738 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 20:39:57.914368 2D training succeed
391 20:39:57.919213 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 20:39:57.924800 auto size-- 65535DDR cs0 size: 2048MB
393 20:39:57.925328 DDR cs1 size: 2048MB
394 20:39:57.930468 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 20:39:57.931000 cs0 DataBus test pass
396 20:39:57.936026 cs1 DataBus test pass
397 20:39:57.936565 cs0 AddrBus test pass
398 20:39:57.937067 cs1 AddrBus test pass
399 20:39:57.937566
400 20:39:57.941589 100bdlr_step_size ps== 478
401 20:39:57.942131 result report
402 20:39:57.947182 boot times 0Enable ddr reg access
403 20:39:57.952398 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 20:39:57.966163 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 20:39:58.620719 bl2z: ptr: 05129330, size: 00001e40
406 20:39:58.628512 0.0;M3 CHK:0;cm4_sp_mode 0
407 20:39:58.629105 MVN_1=0x00000000
408 20:39:58.629630 MVN_2=0x00000000
409 20:39:58.639973 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 20:39:58.640578 OPS=0x04
411 20:39:58.641125 ring efuse init
412 20:39:58.645610 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 20:39:58.646173 [0.017319 Inits done]
414 20:39:58.646695 secure task start!
415 20:39:58.652773 high task start!
416 20:39:58.653325 low task start!
417 20:39:58.653844 run into bl31
418 20:39:58.661374 NOTICE: BL31: v1.3(release):4fc40b1
419 20:39:58.669220 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 20:39:58.669808 NOTICE: BL31: G12A normal boot!
421 20:39:58.684651 NOTICE: BL31: BL33 decompress pass
422 20:39:58.690324 ERROR: Error initializing runtime service opteed_fast
423 20:40:01.430798 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 20:40:01.431655 bl2_stage_init 0x01
425 20:40:01.432307 bl2_stage_init 0x81
426 20:40:01.436197 hw id: 0x0000 - pwm id 0x01
427 20:40:01.436811 bl2_stage_init 0xc1
428 20:40:01.441841 bl2_stage_init 0x02
429 20:40:01.442493
430 20:40:01.443008 L0:00000000
431 20:40:01.443512 L1:00000703
432 20:40:01.444066 L2:00008067
433 20:40:01.444573 L3:15000000
434 20:40:01.447381 S1:00000000
435 20:40:01.447913 B2:20282000
436 20:40:01.448478 B1:a0f83180
437 20:40:01.448989
438 20:40:01.449496 TE: 68710
439 20:40:01.450004
440 20:40:01.453000 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 20:40:01.453556
442 20:40:01.458557 Board ID = 1
443 20:40:01.459081 Set cpu clk to 24M
444 20:40:01.459579 Set clk81 to 24M
445 20:40:01.464185 Use GP1_pll as DSU clk.
446 20:40:01.464730 DSU clk: 1200 Mhz
447 20:40:01.465233 CPU clk: 1200 MHz
448 20:40:01.469757 Set clk81 to 166.6M
449 20:40:01.475394 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 20:40:01.475932 board id: 1
451 20:40:01.482589 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 20:40:01.493349 fw parse done
453 20:40:01.499238 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 20:40:01.541904 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 20:40:01.552739 PIEI prepare done
456 20:40:01.553271 fastboot data load
457 20:40:01.553777 fastboot data verify
458 20:40:01.558335 verify result: 266
459 20:40:01.564027 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 20:40:01.564568 LPDDR4 probe
461 20:40:01.565068 ddr clk to 1584MHz
462 20:40:01.571924 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 20:40:01.609263
464 20:40:01.609805 dmc_version 0001
465 20:40:01.615903 Check phy result
466 20:40:01.621777 INFO : End of CA training
467 20:40:01.622368 INFO : End of initialization
468 20:40:01.627358 INFO : Training has run successfully!
469 20:40:01.627907 Check phy result
470 20:40:01.633036 INFO : End of initialization
471 20:40:01.633583 INFO : End of read enable training
472 20:40:01.638556 INFO : End of fine write leveling
473 20:40:01.644197 INFO : End of Write leveling coarse delay
474 20:40:01.644752 INFO : Training has run successfully!
475 20:40:01.645280 Check phy result
476 20:40:01.649757 INFO : End of initialization
477 20:40:01.650310 INFO : End of read dq deskew training
478 20:40:01.655336 INFO : End of MPR read delay center optimization
479 20:40:01.661058 INFO : End of write delay center optimization
480 20:40:01.666539 INFO : End of read delay center optimization
481 20:40:01.667083 INFO : End of max read latency training
482 20:40:01.672203 INFO : Training has run successfully!
483 20:40:01.672789 1D training succeed
484 20:40:01.681469 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 20:40:01.728977 Check phy result
486 20:40:01.729569 INFO : End of initialization
487 20:40:01.751311 INFO : End of 2D read delay Voltage center optimization
488 20:40:01.770488 INFO : End of 2D read delay Voltage center optimization
489 20:40:01.822410 INFO : End of 2D write delay Voltage center optimization
490 20:40:01.871429 INFO : End of 2D write delay Voltage center optimization
491 20:40:01.877164 INFO : Training has run successfully!
492 20:40:01.877731
493 20:40:01.878251 channel==0
494 20:40:01.882654 RxClkDly_Margin_A0==78 ps 8
495 20:40:01.883199 TxDqDly_Margin_A0==98 ps 10
496 20:40:01.888216 RxClkDly_Margin_A1==69 ps 7
497 20:40:01.888785 TxDqDly_Margin_A1==98 ps 10
498 20:40:01.889305 TrainedVREFDQ_A0==74
499 20:40:01.893789 TrainedVREFDQ_A1==75
500 20:40:01.894340 VrefDac_Margin_A0==23
501 20:40:01.894857 DeviceVref_Margin_A0==40
502 20:40:01.899377 VrefDac_Margin_A1==23
503 20:40:01.899922 DeviceVref_Margin_A1==39
504 20:40:01.900494
505 20:40:01.901022
506 20:40:01.905015 channel==1
507 20:40:01.905569 RxClkDly_Margin_A0==78 ps 8
508 20:40:01.906098 TxDqDly_Margin_A0==98 ps 10
509 20:40:01.910635 RxClkDly_Margin_A1==78 ps 8
510 20:40:01.911179 TxDqDly_Margin_A1==78 ps 8
511 20:40:01.916248 TrainedVREFDQ_A0==78
512 20:40:01.916796 TrainedVREFDQ_A1==75
513 20:40:01.917327 VrefDac_Margin_A0==22
514 20:40:01.921817 DeviceVref_Margin_A0==36
515 20:40:01.922360 VrefDac_Margin_A1==22
516 20:40:01.927434 DeviceVref_Margin_A1==38
517 20:40:01.928020
518 20:40:01.928555 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 20:40:01.929072
520 20:40:01.961014 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
521 20:40:01.961631 2D training succeed
522 20:40:01.966553 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 20:40:01.972187 auto size-- 65535DDR cs0 size: 2048MB
524 20:40:01.972734 DDR cs1 size: 2048MB
525 20:40:01.977847 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 20:40:01.978380 cs0 DataBus test pass
527 20:40:01.983393 cs1 DataBus test pass
528 20:40:01.983932 cs0 AddrBus test pass
529 20:40:01.984604 cs1 AddrBus test pass
530 20:40:01.985027
531 20:40:01.989063 100bdlr_step_size ps== 478
532 20:40:01.989507 result report
533 20:40:01.994567 boot times 0Enable ddr reg access
534 20:40:01.999840 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 20:40:02.013648 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 20:40:02.669267 bl2z: ptr: 05129330, size: 00001e40
537 20:40:02.674602 0.0;M3 CHK:0;cm4_sp_mode 0
538 20:40:02.675095 MVN_1=0x00000000
539 20:40:02.675519 MVN_2=0x00000000
540 20:40:02.680214 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 20:40:02.680689 OPS=0x04
542 20:40:02.686140 ring efuse init
543 20:40:02.691678 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 20:40:02.692184 [0.017310 Inits done]
545 20:40:02.692603 secure task start!
546 20:40:02.697835 high task start!
547 20:40:02.698279 low task start!
548 20:40:02.698685 run into bl31
549 20:40:02.706494 NOTICE: BL31: v1.3(release):4fc40b1
550 20:40:02.714283 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 20:40:02.714747 NOTICE: BL31: G12A normal boot!
552 20:40:02.729765 NOTICE: BL31: BL33 decompress pass
553 20:40:02.735470 ERROR: Error initializing runtime service opteed_fast
554 20:40:04.132343 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 20:40:04.132932 bl2_stage_init 0x01
556 20:40:04.133364 bl2_stage_init 0x81
557 20:40:04.137806 hw id: 0x0000 - pwm id 0x01
558 20:40:04.138263 bl2_stage_init 0xc1
559 20:40:04.143425 bl2_stage_init 0x02
560 20:40:04.143867
561 20:40:04.144326 L0:00000000
562 20:40:04.144738 L1:00000703
563 20:40:04.145141 L2:00008067
564 20:40:04.145538 L3:15000000
565 20:40:04.149005 S1:00000000
566 20:40:04.149452 B2:20282000
567 20:40:04.149857 B1:a0f83180
568 20:40:04.150253
569 20:40:04.150651 TE: 70155
570 20:40:04.151052
571 20:40:04.154600 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 20:40:04.155043
573 20:40:04.160316 Board ID = 1
574 20:40:04.160762 Set cpu clk to 24M
575 20:40:04.161172 Set clk81 to 24M
576 20:40:04.165792 Use GP1_pll as DSU clk.
577 20:40:04.166231 DSU clk: 1200 Mhz
578 20:40:04.166638 CPU clk: 1200 MHz
579 20:40:04.171410 Set clk81 to 166.6M
580 20:40:04.176995 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 20:40:04.177455 board id: 1
582 20:40:04.184241 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 20:40:04.194910 fw parse done
584 20:40:04.200818 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 20:40:04.243471 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 20:40:04.254367 PIEI prepare done
587 20:40:04.254818 fastboot data load
588 20:40:04.255235 fastboot data verify
589 20:40:04.259969 verify result: 266
590 20:40:04.265545 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 20:40:04.265996 LPDDR4 probe
592 20:40:04.266409 ddr clk to 1584MHz
593 20:40:04.273571 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 20:40:04.310861
595 20:40:04.311351 dmc_version 0001
596 20:40:04.317475 Check phy result
597 20:40:04.323399 INFO : End of CA training
598 20:40:04.323846 INFO : End of initialization
599 20:40:04.329107 INFO : Training has run successfully!
600 20:40:04.329564 Check phy result
601 20:40:04.334734 INFO : End of initialization
602 20:40:04.335184 INFO : End of read enable training
603 20:40:04.340236 INFO : End of fine write leveling
604 20:40:04.345827 INFO : End of Write leveling coarse delay
605 20:40:04.346303 INFO : Training has run successfully!
606 20:40:04.346719 Check phy result
607 20:40:04.351406 INFO : End of initialization
608 20:40:04.351856 INFO : End of read dq deskew training
609 20:40:04.357019 INFO : End of MPR read delay center optimization
610 20:40:04.362620 INFO : End of write delay center optimization
611 20:40:04.368252 INFO : End of read delay center optimization
612 20:40:04.368714 INFO : End of max read latency training
613 20:40:04.373771 INFO : Training has run successfully!
614 20:40:04.374223 1D training succeed
615 20:40:04.382956 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 20:40:04.430736 Check phy result
617 20:40:04.431203 INFO : End of initialization
618 20:40:04.452937 INFO : End of 2D read delay Voltage center optimization
619 20:40:04.472080 INFO : End of 2D read delay Voltage center optimization
620 20:40:04.524064 INFO : End of 2D write delay Voltage center optimization
621 20:40:04.573147 INFO : End of 2D write delay Voltage center optimization
622 20:40:04.578733 INFO : Training has run successfully!
623 20:40:04.579174
624 20:40:04.579590 channel==0
625 20:40:04.584380 RxClkDly_Margin_A0==78 ps 8
626 20:40:04.584830 TxDqDly_Margin_A0==88 ps 9
627 20:40:04.589969 RxClkDly_Margin_A1==88 ps 9
628 20:40:04.590420 TxDqDly_Margin_A1==88 ps 9
629 20:40:04.590834 TrainedVREFDQ_A0==74
630 20:40:04.595532 TrainedVREFDQ_A1==74
631 20:40:04.595975 VrefDac_Margin_A0==24
632 20:40:04.596433 DeviceVref_Margin_A0==40
633 20:40:04.601146 VrefDac_Margin_A1==23
634 20:40:04.601590 DeviceVref_Margin_A1==40
635 20:40:04.601996
636 20:40:04.602396
637 20:40:04.602794 channel==1
638 20:40:04.606720 RxClkDly_Margin_A0==78 ps 8
639 20:40:04.607165 TxDqDly_Margin_A0==98 ps 10
640 20:40:04.612390 RxClkDly_Margin_A1==78 ps 8
641 20:40:04.612828 TxDqDly_Margin_A1==88 ps 9
642 20:40:04.617920 TrainedVREFDQ_A0==78
643 20:40:04.618358 TrainedVREFDQ_A1==75
644 20:40:04.618764 VrefDac_Margin_A0==22
645 20:40:04.623513 DeviceVref_Margin_A0==36
646 20:40:04.623954 VrefDac_Margin_A1==22
647 20:40:04.624394 DeviceVref_Margin_A1==39
648 20:40:04.629132
649 20:40:04.629587 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 20:40:04.629999
651 20:40:04.662705 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
652 20:40:04.663178 2D training succeed
653 20:40:04.668406 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 20:40:04.673913 auto size-- 65535DDR cs0 size: 2048MB
655 20:40:04.674372 DDR cs1 size: 2048MB
656 20:40:04.679511 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 20:40:04.679960 cs0 DataBus test pass
658 20:40:04.685126 cs1 DataBus test pass
659 20:40:04.685663 cs0 AddrBus test pass
660 20:40:04.686134 cs1 AddrBus test pass
661 20:40:04.686596
662 20:40:04.690759 100bdlr_step_size ps== 464
663 20:40:04.691276 result report
664 20:40:04.696390 boot times 0Enable ddr reg access
665 20:40:04.701454 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 20:40:04.715259 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 20:40:05.370770 bl2z: ptr: 05129330, size: 00001e40
668 20:40:05.378786 0.0;M3 CHK:0;cm4_sp_mode 0
669 20:40:05.379319 MVN_1=0x00000000
670 20:40:05.379788 MVN_2=0x00000000
671 20:40:05.390298 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 20:40:05.390819 OPS=0x04
673 20:40:05.391287 ring efuse init
674 20:40:05.393473 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 20:40:05.399285 [0.017310 Inits done]
676 20:40:05.399793 secure task start!
677 20:40:05.400292 high task start!
678 20:40:05.400753 low task start!
679 20:40:05.403522 run into bl31
680 20:40:05.412199 NOTICE: BL31: v1.3(release):4fc40b1
681 20:40:05.419863 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 20:40:05.420426 NOTICE: BL31: G12A normal boot!
683 20:40:05.435368 NOTICE: BL31: BL33 decompress pass
684 20:40:05.441034 ERROR: Error initializing runtime service opteed_fast
685 20:40:06.236520
686 20:40:06.237133
687 20:40:06.241829 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 20:40:06.242333
689 20:40:06.245323 Model: Libre Computer AML-S905D3-CC Solitude
690 20:40:06.392471 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 20:40:06.407860 DRAM: 2 GiB (effective 3.8 GiB)
692 20:40:06.508774 Core: 406 devices, 33 uclasses, devicetree: separate
693 20:40:06.514660 WDT: Not starting watchdog@f0d0
694 20:40:06.539677 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 20:40:06.551855 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 20:40:06.556832 ** Bad device specification mmc 0 **
697 20:40:06.566890 Card did not respond to voltage select! : -110
698 20:40:06.574614 ** Bad device specification mmc 0 **
699 20:40:06.575149 Couldn't find partition mmc 0
700 20:40:06.582892 Card did not respond to voltage select! : -110
701 20:40:06.588412 ** Bad device specification mmc 0 **
702 20:40:06.588884 Couldn't find partition mmc 0
703 20:40:06.593463 Error: could not access storage.
704 20:40:06.890921 Net: eth0: ethernet@ff3f0000
705 20:40:06.891485 starting USB...
706 20:40:07.135614 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 20:40:07.136193 Starting the controller
708 20:40:07.142573 USB XHCI 1.10
709 20:40:08.697230 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 20:40:08.705554 scanning usb for storage devices... 0 Storage Device(s) found
712 20:40:08.757196 Hit any key to stop autoboot: 1
713 20:40:08.758072 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 20:40:08.758731 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 20:40:08.759262 Setting prompt string to ['=>']
716 20:40:08.759796 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 20:40:08.771387 0
718 20:40:08.772332 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 20:40:08.873647 => setenv autoload no
721 20:40:08.874370 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 20:40:08.879689 setenv autoload no
724 20:40:08.981296 => setenv initrd_high 0xffffffff
725 20:40:08.981970 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 20:40:08.986489 setenv initrd_high 0xffffffff
728 20:40:09.088047 => setenv fdt_high 0xffffffff
729 20:40:09.088741 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 20:40:09.093305 setenv fdt_high 0xffffffff
732 20:40:09.194852 => dhcp
733 20:40:09.195527 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 20:40:09.199873 dhcp
735 20:40:09.755373 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 20:40:09.756059 Speed: 1000, full duplex
737 20:40:09.756494 BOOTP broadcast 1
738 20:40:10.003689 BOOTP broadcast 2
739 20:40:10.504612 BOOTP broadcast 3
740 20:40:10.516130 DHCP client bound to address 192.168.6.21 (760 ms)
742 20:40:10.617205 => setenv serverip 192.168.6.2
743 20:40:10.617890 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
744 20:40:10.622328 setenv serverip 192.168.6.2
746 20:40:10.723396 => tftpboot 0x01080000 976655/tftp-deploy-70pzt75x/kernel/uImage
747 20:40:10.724129 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
748 20:40:10.730665 tftpboot 0x01080000 976655/tftp-deploy-70pzt75x/kernel/uImage
749 20:40:10.731127 Speed: 1000, full duplex
750 20:40:10.731532 Using ethernet@ff3f0000 device
751 20:40:10.736268 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
752 20:40:10.741570 Filename '976655/tftp-deploy-70pzt75x/kernel/uImage'.
753 20:40:10.745607 Load address: 0x1080000
754 20:40:12.072517 Loading: *####################### UDP wrong checksum 00000005 00003696
755 20:40:13.585635 ########################### 43.6 MiB
756 20:40:13.586248 15.3 MiB/s
757 20:40:13.586661 done
758 20:40:13.589923 Bytes transferred = 45713984 (2b98a40 hex)
760 20:40:13.691329 => tftpboot 0x08000000 976655/tftp-deploy-70pzt75x/ramdisk/ramdisk.cpio.gz.uboot
761 20:40:13.691937 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
762 20:40:13.699001 tftpboot 0x08000000 976655/tftp-deploy-70pzt75x/ramdisk/ramdisk.cpio.gz.uboot
763 20:40:13.699458 Speed: 1000, full duplex
764 20:40:13.699854 Using ethernet@ff3f0000 device
765 20:40:13.704321 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
766 20:40:13.714127 Filename '976655/tftp-deploy-70pzt75x/ramdisk/ramdisk.cpio.gz.uboot'.
767 20:40:13.714569 Load address: 0x8000000
768 20:40:22.886915 Loading: *##########################T ####################### UDP wrong checksum 0000000f 00003b63
769 20:40:27.887514 T UDP wrong checksum 0000000f 00003b63
770 20:40:37.889329 T T UDP wrong checksum 0000000f 00003b63
771 20:40:57.893627 T T T T UDP wrong checksum 0000000f 00003b63
772 20:41:12.897368 T T
773 20:41:12.898001 Retry count exceeded; starting again
775 20:41:12.899413 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
778 20:41:12.901328 end: 2.4 uboot-commands (duration 00:01:23) [common]
780 20:41:12.902698 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
782 20:41:12.903702 end: 2 uboot-action (duration 00:01:23) [common]
784 20:41:12.905229 Cleaning after the job
785 20:41:12.905765 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/ramdisk
786 20:41:12.907044 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/kernel
787 20:41:12.952608 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/dtb
788 20:41:12.953436 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/976655/tftp-deploy-70pzt75x/modules
789 20:41:12.974147 start: 4.1 power-off (timeout 00:00:30) [common]
790 20:41:12.974786 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
791 20:41:13.008348 >> OK - accepted request
792 20:41:13.010126 Returned 0 in 0 seconds
793 20:41:13.111113 end: 4.1 power-off (duration 00:00:00) [common]
795 20:41:13.112056 start: 4.2 read-feedback (timeout 00:10:00) [common]
796 20:41:13.112719 Listened to connection for namespace 'common' for up to 1s
797 20:41:14.113691 Finalising connection for namespace 'common'
798 20:41:14.114447 Disconnecting from shell: Finalise
799 20:41:14.114962 =>
800 20:41:14.215974 end: 4.2 read-feedback (duration 00:00:01) [common]
801 20:41:14.216663 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/976655
802 20:41:14.842363 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/976655
803 20:41:14.842972 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.