Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 13:30:38.488600 lava-dispatcher, installed at version: 2024.01
2 13:30:38.489412 start: 0 validate
3 13:30:38.489891 Start time: 2024-10-01 13:30:38.489860+00:00 (UTC)
4 13:30:38.490534 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 13:30:38.491079 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 13:30:38.534986 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 13:30:38.535560 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-10-01-v6.12-rc1%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 13:30:38.567874 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 13:30:38.568536 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-10-01-v6.12-rc1%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 13:30:38.601602 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 13:30:38.602085 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 13:30:38.631561 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 13:30:38.632068 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Frenesas%2Fmaster%2Frenesas-devel-2024-10-01-v6.12-rc1%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 13:30:38.678722 validate duration: 0.19
16 13:30:38.680211 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 13:30:38.680825 start: 1.1 download-retry (timeout 00:10:00) [common]
18 13:30:38.681376 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 13:30:38.682391 Not decompressing ramdisk as can be used compressed.
20 13:30:38.683177 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 13:30:38.683683 saving as /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/ramdisk/initrd.cpio.gz
22 13:30:38.684231 total size: 5628182 (5 MB)
23 13:30:38.727656 progress 0 % (0 MB)
24 13:30:38.735803 progress 5 % (0 MB)
25 13:30:38.744385 progress 10 % (0 MB)
26 13:30:38.751949 progress 15 % (0 MB)
27 13:30:38.760367 progress 20 % (1 MB)
28 13:30:38.765747 progress 25 % (1 MB)
29 13:30:38.769724 progress 30 % (1 MB)
30 13:30:38.773730 progress 35 % (1 MB)
31 13:30:38.777356 progress 40 % (2 MB)
32 13:30:38.781263 progress 45 % (2 MB)
33 13:30:38.784757 progress 50 % (2 MB)
34 13:30:38.788720 progress 55 % (2 MB)
35 13:30:38.792672 progress 60 % (3 MB)
36 13:30:38.796200 progress 65 % (3 MB)
37 13:30:38.800308 progress 70 % (3 MB)
38 13:30:38.803830 progress 75 % (4 MB)
39 13:30:38.807865 progress 80 % (4 MB)
40 13:30:38.811433 progress 85 % (4 MB)
41 13:30:38.815337 progress 90 % (4 MB)
42 13:30:38.819022 progress 95 % (5 MB)
43 13:30:38.822227 progress 100 % (5 MB)
44 13:30:38.822848 5 MB downloaded in 0.14 s (38.72 MB/s)
45 13:30:38.823377 end: 1.1.1 http-download (duration 00:00:00) [common]
47 13:30:38.824283 end: 1.1 download-retry (duration 00:00:00) [common]
48 13:30:38.824571 start: 1.2 download-retry (timeout 00:10:00) [common]
49 13:30:38.824833 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 13:30:38.825315 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-10-01-v6.12-rc1/arm64/defconfig/gcc-12/kernel/Image
51 13:30:38.825553 saving as /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/kernel/Image
52 13:30:38.825758 total size: 45713920 (43 MB)
53 13:30:38.825964 No compression specified
54 13:30:38.865318 progress 0 % (0 MB)
55 13:30:38.894724 progress 5 % (2 MB)
56 13:30:38.924389 progress 10 % (4 MB)
57 13:30:38.953943 progress 15 % (6 MB)
58 13:30:38.983484 progress 20 % (8 MB)
59 13:30:39.013329 progress 25 % (10 MB)
60 13:30:39.043020 progress 30 % (13 MB)
61 13:30:39.072721 progress 35 % (15 MB)
62 13:30:39.102326 progress 40 % (17 MB)
63 13:30:39.131781 progress 45 % (19 MB)
64 13:30:39.161430 progress 50 % (21 MB)
65 13:30:39.190889 progress 55 % (24 MB)
66 13:30:39.220839 progress 60 % (26 MB)
67 13:30:39.249947 progress 65 % (28 MB)
68 13:30:39.279609 progress 70 % (30 MB)
69 13:30:39.309217 progress 75 % (32 MB)
70 13:30:39.338850 progress 80 % (34 MB)
71 13:30:39.368351 progress 85 % (37 MB)
72 13:30:39.397553 progress 90 % (39 MB)
73 13:30:39.427378 progress 95 % (41 MB)
74 13:30:39.458029 progress 100 % (43 MB)
75 13:30:39.458626 43 MB downloaded in 0.63 s (68.89 MB/s)
76 13:30:39.459169 end: 1.2.1 http-download (duration 00:00:01) [common]
78 13:30:39.460153 end: 1.2 download-retry (duration 00:00:01) [common]
79 13:30:39.460511 start: 1.3 download-retry (timeout 00:09:59) [common]
80 13:30:39.460811 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 13:30:39.461493 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-10-01-v6.12-rc1/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 13:30:39.461822 saving as /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 13:30:39.462072 total size: 53209 (0 MB)
84 13:30:39.462498 No compression specified
85 13:30:39.502754 progress 61 % (0 MB)
86 13:30:39.503692 progress 100 % (0 MB)
87 13:30:39.504378 0 MB downloaded in 0.04 s (1.20 MB/s)
88 13:30:39.504884 end: 1.3.1 http-download (duration 00:00:00) [common]
90 13:30:39.505835 end: 1.3 download-retry (duration 00:00:00) [common]
91 13:30:39.506147 start: 1.4 download-retry (timeout 00:09:59) [common]
92 13:30:39.506456 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 13:30:39.506979 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 13:30:39.507259 saving as /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/nfsrootfs/full.rootfs.tar
95 13:30:39.507502 total size: 107552908 (102 MB)
96 13:30:39.507748 Using unxz to decompress xz
97 13:30:39.548888 progress 0 % (0 MB)
98 13:30:40.191354 progress 5 % (5 MB)
99 13:30:40.922636 progress 10 % (10 MB)
100 13:30:41.649275 progress 15 % (15 MB)
101 13:30:42.408821 progress 20 % (20 MB)
102 13:30:42.986765 progress 25 % (25 MB)
103 13:30:43.609125 progress 30 % (30 MB)
104 13:30:44.346798 progress 35 % (35 MB)
105 13:30:44.699674 progress 40 % (41 MB)
106 13:30:45.130070 progress 45 % (46 MB)
107 13:30:45.826715 progress 50 % (51 MB)
108 13:30:46.516715 progress 55 % (56 MB)
109 13:30:47.281953 progress 60 % (61 MB)
110 13:30:48.038993 progress 65 % (66 MB)
111 13:30:48.771729 progress 70 % (71 MB)
112 13:30:49.537455 progress 75 % (76 MB)
113 13:30:50.212104 progress 80 % (82 MB)
114 13:30:50.913437 progress 85 % (87 MB)
115 13:30:51.629984 progress 90 % (92 MB)
116 13:30:52.333635 progress 95 % (97 MB)
117 13:30:53.068785 progress 100 % (102 MB)
118 13:30:53.080570 102 MB downloaded in 13.57 s (7.56 MB/s)
119 13:30:53.081447 end: 1.4.1 http-download (duration 00:00:14) [common]
121 13:30:53.083052 end: 1.4 download-retry (duration 00:00:14) [common]
122 13:30:53.083558 start: 1.5 download-retry (timeout 00:09:46) [common]
123 13:30:53.084115 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 13:30:53.084922 downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-10-01-v6.12-rc1/arm64/defconfig/gcc-12/modules.tar.xz
125 13:30:53.085371 saving as /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/modules/modules.tar
126 13:30:53.085768 total size: 11615528 (11 MB)
127 13:30:53.086175 Using unxz to decompress xz
128 13:30:53.136347 progress 0 % (0 MB)
129 13:30:53.198810 progress 5 % (0 MB)
130 13:30:53.278164 progress 10 % (1 MB)
131 13:30:53.366726 progress 15 % (1 MB)
132 13:30:53.460998 progress 20 % (2 MB)
133 13:30:53.547832 progress 25 % (2 MB)
134 13:30:53.627595 progress 30 % (3 MB)
135 13:30:53.712404 progress 35 % (3 MB)
136 13:30:53.790283 progress 40 % (4 MB)
137 13:30:53.870147 progress 45 % (5 MB)
138 13:30:53.954575 progress 50 % (5 MB)
139 13:30:54.034393 progress 55 % (6 MB)
140 13:30:54.120930 progress 60 % (6 MB)
141 13:30:54.198665 progress 65 % (7 MB)
142 13:30:54.279650 progress 70 % (7 MB)
143 13:30:54.352591 progress 75 % (8 MB)
144 13:30:54.428685 progress 80 % (8 MB)
145 13:30:54.512634 progress 85 % (9 MB)
146 13:30:54.595720 progress 90 % (10 MB)
147 13:30:54.670815 progress 95 % (10 MB)
148 13:30:54.750222 progress 100 % (11 MB)
149 13:30:54.762427 11 MB downloaded in 1.68 s (6.61 MB/s)
150 13:30:54.763470 end: 1.5.1 http-download (duration 00:00:02) [common]
152 13:30:54.765333 end: 1.5 download-retry (duration 00:00:02) [common]
153 13:30:54.765906 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 13:30:54.766576 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 13:31:04.403260 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/786719/extract-nfsrootfs-542mqrif
156 13:31:04.403868 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 13:31:04.404208 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 13:31:04.404862 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400
159 13:31:04.405328 makedir: /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin
160 13:31:04.405697 makedir: /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/tests
161 13:31:04.406082 makedir: /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/results
162 13:31:04.406456 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-add-keys
163 13:31:04.407051 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-add-sources
164 13:31:04.407614 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-background-process-start
165 13:31:04.408181 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-background-process-stop
166 13:31:04.408758 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-common-functions
167 13:31:04.409296 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-echo-ipv4
168 13:31:04.409834 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-install-packages
169 13:31:04.410392 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-installed-packages
170 13:31:04.410934 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-os-build
171 13:31:04.411463 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-probe-channel
172 13:31:04.412024 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-probe-ip
173 13:31:04.412575 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-target-ip
174 13:31:04.413102 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-target-mac
175 13:31:04.413623 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-target-storage
176 13:31:04.414210 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-test-case
177 13:31:04.414764 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-test-event
178 13:31:04.415293 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-test-feedback
179 13:31:04.415813 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-test-raise
180 13:31:04.416398 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-test-reference
181 13:31:04.416992 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-test-runner
182 13:31:04.417541 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-test-set
183 13:31:04.418063 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-test-shell
184 13:31:04.418596 Updating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-install-packages (oe)
185 13:31:04.419175 Updating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/bin/lava-installed-packages (oe)
186 13:31:04.419659 Creating /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/environment
187 13:31:04.420086 LAVA metadata
188 13:31:04.420378 - LAVA_JOB_ID=786719
189 13:31:04.420615 - LAVA_DISPATCHER_IP=192.168.6.2
190 13:31:04.421009 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 13:31:04.422058 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 13:31:04.422402 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 13:31:04.422631 skipped lava-vland-overlay
194 13:31:04.422888 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 13:31:04.423161 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 13:31:04.423392 skipped lava-multinode-overlay
197 13:31:04.423650 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 13:31:04.423918 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 13:31:04.424216 Loading test definitions
200 13:31:04.424519 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 13:31:04.424755 Using /lava-786719 at stage 0
202 13:31:04.426046 uuid=786719_1.6.2.4.1 testdef=None
203 13:31:04.426380 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 13:31:04.426668 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 13:31:04.428576 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 13:31:04.429403 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 13:31:04.431884 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 13:31:04.432782 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 13:31:04.435076 runner path: /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/0/tests/0_dmesg test_uuid 786719_1.6.2.4.1
212 13:31:04.435667 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 13:31:04.436638 Creating lava-test-runner.conf files
215 13:31:04.436860 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/786719/lava-overlay-2cg0z400/lava-786719/0 for stage 0
216 13:31:04.437250 - 0_dmesg
217 13:31:04.437635 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 13:31:04.437929 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 13:31:04.459841 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 13:31:04.460290 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 13:31:04.460583 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 13:31:04.460876 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 13:31:04.461160 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 13:31:05.082721 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 13:31:05.083203 start: 1.6.4 extract-modules (timeout 00:09:34) [common]
226 13:31:05.083473 extracting modules file /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/786719/extract-nfsrootfs-542mqrif
227 13:31:06.445493 extracting modules file /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/786719/extract-overlay-ramdisk-2gibt4_w/ramdisk
228 13:31:07.893660 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 13:31:07.894145 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 13:31:07.894425 [common] Applying overlay to NFS
231 13:31:07.894639 [common] Applying overlay /var/lib/lava/dispatcher/tmp/786719/compress-overlay-50haxhct/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/786719/extract-nfsrootfs-542mqrif
232 13:31:07.924541 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 13:31:07.924976 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 13:31:07.925250 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 13:31:07.925482 Converting downloaded kernel to a uImage
236 13:31:07.925794 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/kernel/Image /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/kernel/uImage
237 13:31:08.399060 output: Image Name:
238 13:31:08.399482 output: Created: Tue Oct 1 13:31:07 2024
239 13:31:08.399692 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 13:31:08.399896 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 13:31:08.400168 output: Load Address: 01080000
242 13:31:08.400375 output: Entry Point: 01080000
243 13:31:08.400573 output:
244 13:31:08.400910 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 13:31:08.401174 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 13:31:08.401442 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 13:31:08.401694 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 13:31:08.401947 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 13:31:08.402199 Building ramdisk /var/lib/lava/dispatcher/tmp/786719/extract-overlay-ramdisk-2gibt4_w/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/786719/extract-overlay-ramdisk-2gibt4_w/ramdisk
250 13:31:10.776344 >> 166772 blocks
251 13:31:18.465464 Adding RAMdisk u-boot header.
252 13:31:18.466104 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/786719/extract-overlay-ramdisk-2gibt4_w/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/786719/extract-overlay-ramdisk-2gibt4_w/ramdisk.cpio.gz.uboot
253 13:31:18.700429 output: Image Name:
254 13:31:18.700833 output: Created: Tue Oct 1 13:31:18 2024
255 13:31:18.701038 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 13:31:18.701240 output: Data Size: 23425209 Bytes = 22876.18 KiB = 22.34 MiB
257 13:31:18.701439 output: Load Address: 00000000
258 13:31:18.701635 output: Entry Point: 00000000
259 13:31:18.701829 output:
260 13:31:18.702372 rename /var/lib/lava/dispatcher/tmp/786719/extract-overlay-ramdisk-2gibt4_w/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/ramdisk/ramdisk.cpio.gz.uboot
261 13:31:18.702783 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 13:31:18.703066 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 13:31:18.703336 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 13:31:18.703576 No LXC device requested
265 13:31:18.703830 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 13:31:18.704225 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 13:31:18.704726 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 13:31:18.705131 Checking files for TFTP limit of 4294967296 bytes.
269 13:31:18.707739 end: 1 tftp-deploy (duration 00:00:40) [common]
270 13:31:18.708344 start: 2 uboot-action (timeout 00:05:00) [common]
271 13:31:18.708860 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 13:31:18.709349 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 13:31:18.709841 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 13:31:18.710354 Using kernel file from prepare-kernel: 786719/tftp-deploy-uo84vzwh/kernel/uImage
275 13:31:18.710972 substitutions:
276 13:31:18.711371 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 13:31:18.711768 - {DTB_ADDR}: 0x01070000
278 13:31:18.712198 - {DTB}: 786719/tftp-deploy-uo84vzwh/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 13:31:18.712592 - {INITRD}: 786719/tftp-deploy-uo84vzwh/ramdisk/ramdisk.cpio.gz.uboot
280 13:31:18.712982 - {KERNEL_ADDR}: 0x01080000
281 13:31:18.713372 - {KERNEL}: 786719/tftp-deploy-uo84vzwh/kernel/uImage
282 13:31:18.713758 - {LAVA_MAC}: None
283 13:31:18.714186 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/786719/extract-nfsrootfs-542mqrif
284 13:31:18.714585 - {NFS_SERVER_IP}: 192.168.6.2
285 13:31:18.714976 - {PRESEED_CONFIG}: None
286 13:31:18.715360 - {PRESEED_LOCAL}: None
287 13:31:18.715755 - {RAMDISK_ADDR}: 0x08000000
288 13:31:18.716179 - {RAMDISK}: 786719/tftp-deploy-uo84vzwh/ramdisk/ramdisk.cpio.gz.uboot
289 13:31:18.716571 - {ROOT_PART}: None
290 13:31:18.716958 - {ROOT}: None
291 13:31:18.717342 - {SERVER_IP}: 192.168.6.2
292 13:31:18.717752 - {TEE_ADDR}: 0x83000000
293 13:31:18.718148 - {TEE}: None
294 13:31:18.718536 Parsed boot commands:
295 13:31:18.718918 - setenv autoload no
296 13:31:18.719303 - setenv initrd_high 0xffffffff
297 13:31:18.719686 - setenv fdt_high 0xffffffff
298 13:31:18.720096 - dhcp
299 13:31:18.720482 - setenv serverip 192.168.6.2
300 13:31:18.720863 - tftpboot 0x01080000 786719/tftp-deploy-uo84vzwh/kernel/uImage
301 13:31:18.721242 - tftpboot 0x08000000 786719/tftp-deploy-uo84vzwh/ramdisk/ramdisk.cpio.gz.uboot
302 13:31:18.721623 - tftpboot 0x01070000 786719/tftp-deploy-uo84vzwh/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 13:31:18.722005 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/786719/extract-nfsrootfs-542mqrif,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 13:31:18.722396 - bootm 0x01080000 0x08000000 0x01070000
305 13:31:18.722897 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 13:31:18.724413 start: 2.3 connect-device (timeout 00:05:00) [common]
308 13:31:18.724837 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 13:31:18.739860 Setting prompt string to ['lava-test: # ']
310 13:31:18.741371 end: 2.3 connect-device (duration 00:00:00) [common]
311 13:31:18.741978 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 13:31:18.742540 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 13:31:18.743069 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 13:31:18.744239 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 13:31:18.783013 >> OK - accepted request
316 13:31:18.784185 Returned 0 in 0 seconds
317 13:31:18.885044 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 13:31:18.886056 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 13:31:18.886383 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 13:31:18.886687 Setting prompt string to ['Hit any key to stop autoboot']
322 13:31:18.886987 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 13:31:18.888034 Trying 192.168.56.21...
324 13:31:18.888354 Connected to conserv1.
325 13:31:18.888624 Escape character is '^]'.
326 13:31:18.888853
327 13:31:18.889101 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 13:31:18.889360
329 13:31:26.468993 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 13:31:26.469728 bl2_stage_init 0x01
331 13:31:26.470268 bl2_stage_init 0x81
332 13:31:26.474504 hw id: 0x0000 - pwm id 0x01
333 13:31:26.475112 bl2_stage_init 0xc1
334 13:31:26.478919 bl2_stage_init 0x02
335 13:31:26.479457
336 13:31:26.479921 L0:00000000
337 13:31:26.480420 L1:00000703
338 13:31:26.480852 L2:00008067
339 13:31:26.484424 L3:15000000
340 13:31:26.484953 S1:00000000
341 13:31:26.485394 B2:20282000
342 13:31:26.485827 B1:a0f83180
343 13:31:26.486258
344 13:31:26.486713 TE: 69902
345 13:31:26.487156
346 13:31:26.495593 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 13:31:26.496187
348 13:31:26.496657 Board ID = 1
349 13:31:26.497115 Set cpu clk to 24M
350 13:31:26.497573 Set clk81 to 24M
351 13:31:26.499305 Use GP1_pll as DSU clk.
352 13:31:26.504969 DSU clk: 1200 Mhz
353 13:31:26.505485 CPU clk: 1200 MHz
354 13:31:26.505938 Set clk81 to 166.6M
355 13:31:26.510518 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 13:31:26.511035 board id: 1
357 13:31:26.520599 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 13:31:26.531233 fw parse done
359 13:31:26.537226 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 13:31:26.580184 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 13:31:26.590765 PIEI prepare done
362 13:31:26.591288 fastboot data load
363 13:31:26.591745 fastboot data verify
364 13:31:26.596356 verify result: 266
365 13:31:26.602026 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 13:31:26.602528 LPDDR4 probe
367 13:31:26.602972 ddr clk to 1584MHz
368 13:31:26.610038 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 13:31:26.647296
370 13:31:26.647899 dmc_version 0001
371 13:31:26.653994 Check phy result
372 13:31:26.659963 INFO : End of CA training
373 13:31:26.660526 INFO : End of initialization
374 13:31:26.665398 INFO : Training has run successfully!
375 13:31:26.665886 Check phy result
376 13:31:26.671198 INFO : End of initialization
377 13:31:26.671719 INFO : End of read enable training
378 13:31:26.676722 INFO : End of fine write leveling
379 13:31:26.682210 INFO : End of Write leveling coarse delay
380 13:31:26.682720 INFO : Training has run successfully!
381 13:31:26.683161 Check phy result
382 13:31:26.687834 INFO : End of initialization
383 13:31:26.688388 INFO : End of read dq deskew training
384 13:31:26.693469 INFO : End of MPR read delay center optimization
385 13:31:26.699127 INFO : End of write delay center optimization
386 13:31:26.704666 INFO : End of read delay center optimization
387 13:31:26.705212 INFO : End of max read latency training
388 13:31:26.710279 INFO : Training has run successfully!
389 13:31:26.710795 1D training succeed
390 13:31:26.720631 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 13:31:26.766118 Check phy result
392 13:31:26.766810 INFO : End of initialization
393 13:31:26.789732 INFO : End of 2D read delay Voltage center optimization
394 13:31:26.808801 INFO : End of 2D read delay Voltage center optimization
395 13:31:26.860452 INFO : End of 2D write delay Voltage center optimization
396 13:31:26.909652 INFO : End of 2D write delay Voltage center optimization
397 13:31:26.915232 INFO : Training has run successfully!
398 13:31:26.915775
399 13:31:26.916298 channel==0
400 13:31:26.921367 RxClkDly_Margin_A0==78 ps 8
401 13:31:26.921890 TxDqDly_Margin_A0==98 ps 10
402 13:31:26.927073 RxClkDly_Margin_A1==78 ps 8
403 13:31:26.927564 TxDqDly_Margin_A1==88 ps 9
404 13:31:26.928060 TrainedVREFDQ_A0==74
405 13:31:26.932627 TrainedVREFDQ_A1==74
406 13:31:26.933157 VrefDac_Margin_A0==22
407 13:31:26.933619 DeviceVref_Margin_A0==40
408 13:31:26.938136 VrefDac_Margin_A1==23
409 13:31:26.938655 DeviceVref_Margin_A1==40
410 13:31:26.939119
411 13:31:26.939576
412 13:31:26.940059 channel==1
413 13:31:26.944121 RxClkDly_Margin_A0==88 ps 9
414 13:31:26.944623 TxDqDly_Margin_A0==98 ps 10
415 13:31:26.949864 RxClkDly_Margin_A1==88 ps 9
416 13:31:26.950379 TxDqDly_Margin_A1==88 ps 9
417 13:31:26.955091 TrainedVREFDQ_A0==78
418 13:31:26.955601 TrainedVREFDQ_A1==75
419 13:31:26.956123 VrefDac_Margin_A0==22
420 13:31:26.960037 DeviceVref_Margin_A0==36
421 13:31:26.960539 VrefDac_Margin_A1==21
422 13:31:26.965517 DeviceVref_Margin_A1==39
423 13:31:26.965988
424 13:31:26.966421 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 13:31:26.966860
426 13:31:27.000215 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000016 dram_vref_reg_value 0x 00000061
427 13:31:27.000843 2D training succeed
428 13:31:27.005468 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 13:31:27.011368 auto size-- 65535DDR cs0 size: 2048MB
430 13:31:27.011867 DDR cs1 size: 2048MB
431 13:31:27.016824 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 13:31:27.017379 cs0 DataBus test pass
433 13:31:27.022896 cs1 DataBus test pass
434 13:31:27.023518 cs0 AddrBus test pass
435 13:31:27.023976 cs1 AddrBus test pass
436 13:31:27.024536
437 13:31:27.028304 100bdlr_step_size ps== 478
438 13:31:27.028811 result report
439 13:31:27.033687 boot times 0Enable ddr reg access
440 13:31:27.039456 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 13:31:27.052456 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 13:31:27.706395 bl2z: ptr: 05129330, size: 00001e40
443 13:31:27.713011 0.0;M3 CHK:0;cm4_sp_mode 0
444 13:31:27.713533 MVN_1=0x00000000
445 13:31:27.713989 MVN_2=0x00000000
446 13:31:27.724403 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 13:31:27.724942 OPS=0x04
448 13:31:27.725413 ring efuse init
449 13:31:27.730063 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 13:31:27.730586 [0.017310 Inits done]
451 13:31:27.731037 secure task start!
452 13:31:27.737870 high task start!
453 13:31:27.738368 low task start!
454 13:31:27.738807 run into bl31
455 13:31:27.746490 NOTICE: BL31: v1.3(release):4fc40b1
456 13:31:27.754261 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 13:31:27.754785 NOTICE: BL31: G12A normal boot!
458 13:31:27.769797 NOTICE: BL31: BL33 decompress pass
459 13:31:27.775418 ERROR: Error initializing runtime service opteed_fast
460 13:31:30.520932 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 13:31:30.521571 bl2_stage_init 0x01
462 13:31:30.521982 bl2_stage_init 0x81
463 13:31:30.526426 hw id: 0x0000 - pwm id 0x01
464 13:31:30.526897 bl2_stage_init 0xc1
465 13:31:30.529809 bl2_stage_init 0x02
466 13:31:30.530348
467 13:31:30.530759 L0:00000000
468 13:31:30.531170 L1:00000703
469 13:31:30.535333 L2:00008067
470 13:31:30.535789 L3:15000000
471 13:31:30.536313 S1:00000000
472 13:31:30.536714 B2:20282000
473 13:31:30.537095 B1:a0f83180
474 13:31:30.537476
475 13:31:30.540951 TE: 72087
476 13:31:30.541440
477 13:31:30.546576 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 13:31:30.547026
479 13:31:30.547415 Board ID = 1
480 13:31:30.547797 Set cpu clk to 24M
481 13:31:30.552159 Set clk81 to 24M
482 13:31:30.552598 Use GP1_pll as DSU clk.
483 13:31:30.552989 DSU clk: 1200 Mhz
484 13:31:30.557690 CPU clk: 1200 MHz
485 13:31:30.558117 Set clk81 to 166.6M
486 13:31:30.563326 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 13:31:30.563840 board id: 1
488 13:31:30.572753 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 13:31:30.583685 fw parse done
490 13:31:30.589680 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 13:31:30.632929 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 13:31:30.644017 PIEI prepare done
493 13:31:30.644532 fastboot data load
494 13:31:30.644924 fastboot data verify
495 13:31:30.649632 verify result: 266
496 13:31:30.655404 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 13:31:30.655892 LPDDR4 probe
498 13:31:30.656329 ddr clk to 1584MHz
499 13:31:30.663131 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 13:31:30.700879
501 13:31:30.701278 dmc_version 0001
502 13:31:30.707937 Check phy result
503 13:31:30.713895 INFO : End of CA training
504 13:31:30.714259 INFO : End of initialization
505 13:31:30.719497 INFO : Training has run successfully!
506 13:31:30.719835 Check phy result
507 13:31:30.725110 INFO : End of initialization
508 13:31:30.725430 INFO : End of read enable training
509 13:31:30.730658 INFO : End of fine write leveling
510 13:31:30.736381 INFO : End of Write leveling coarse delay
511 13:31:30.736731 INFO : Training has run successfully!
512 13:31:30.736959 Check phy result
513 13:31:30.741876 INFO : End of initialization
514 13:31:30.742210 INFO : End of read dq deskew training
515 13:31:30.747501 INFO : End of MPR read delay center optimization
516 13:31:30.753081 INFO : End of write delay center optimization
517 13:31:30.758671 INFO : End of read delay center optimization
518 13:31:30.759005 INFO : End of max read latency training
519 13:31:30.764391 INFO : Training has run successfully!
520 13:31:30.764717 1D training succeed
521 13:31:30.773465 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 13:31:30.821787 Check phy result
523 13:31:30.822177 INFO : End of initialization
524 13:31:30.849252 INFO : End of 2D read delay Voltage center optimization
525 13:31:30.873231 INFO : End of 2D read delay Voltage center optimization
526 13:31:30.929881 INFO : End of 2D write delay Voltage center optimization
527 13:31:30.983882 INFO : End of 2D write delay Voltage center optimization
528 13:31:30.989457 INFO : Training has run successfully!
529 13:31:30.989798
530 13:31:30.990006 channel==0
531 13:31:30.994959 RxClkDly_Margin_A0==78 ps 8
532 13:31:30.995289 TxDqDly_Margin_A0==98 ps 10
533 13:31:30.998461 RxClkDly_Margin_A1==88 ps 9
534 13:31:30.998774 TxDqDly_Margin_A1==98 ps 10
535 13:31:31.003949 TrainedVREFDQ_A0==76
536 13:31:31.004330 TrainedVREFDQ_A1==74
537 13:31:31.004552 VrefDac_Margin_A0==23
538 13:31:31.009504 DeviceVref_Margin_A0==38
539 13:31:31.009836 VrefDac_Margin_A1==22
540 13:31:31.015298 DeviceVref_Margin_A1==40
541 13:31:31.015642
542 13:31:31.015861
543 13:31:31.016113 channel==1
544 13:31:31.016324 RxClkDly_Margin_A0==88 ps 9
545 13:31:31.020707 TxDqDly_Margin_A0==98 ps 10
546 13:31:31.021050 RxClkDly_Margin_A1==78 ps 8
547 13:31:31.026298 TxDqDly_Margin_A1==88 ps 9
548 13:31:31.026641 TrainedVREFDQ_A0==78
549 13:31:31.026858 TrainedVREFDQ_A1==78
550 13:31:31.031941 VrefDac_Margin_A0==22
551 13:31:31.032315 DeviceVref_Margin_A0==36
552 13:31:31.037494 VrefDac_Margin_A1==22
553 13:31:31.037845 DeviceVref_Margin_A1==36
554 13:31:31.038056
555 13:31:31.043126 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 13:31:31.043478
557 13:31:31.071091 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 13:31:31.076680 2D training succeed
559 13:31:31.082306 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 13:31:31.082656 auto size-- 65535DDR cs0 size: 2048MB
561 13:31:31.087906 DDR cs1 size: 2048MB
562 13:31:31.088394 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 13:31:31.093620 cs0 DataBus test pass
564 13:31:31.094119 cs1 DataBus test pass
565 13:31:31.094515 cs0 AddrBus test pass
566 13:31:31.099198 cs1 AddrBus test pass
567 13:31:31.099684
568 13:31:31.100112 100bdlr_step_size ps== 471
569 13:31:31.100515 result report
570 13:31:31.104788 boot times 0Enable ddr reg access
571 13:31:31.112351 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 13:31:31.126111 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 13:31:31.784789 bl2z: ptr: 05129330, size: 00001e40
574 13:31:31.793768 0.0;M3 CHK:0;cm4_sp_mode 0
575 13:31:31.794314 MVN_1=0x00000000
576 13:31:31.794728 MVN_2=0x00000000
577 13:31:31.805231 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 13:31:31.805794 OPS=0x04
579 13:31:31.806216 ring efuse init
580 13:31:31.811015 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 13:31:31.811534 [0.017354 Inits done]
582 13:31:31.811947 secure task start!
583 13:31:31.818459 high task start!
584 13:31:31.818955 low task start!
585 13:31:31.819363 run into bl31
586 13:31:31.828064 NOTICE: BL31: v1.3(release):4fc40b1
587 13:31:31.835488 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 13:31:31.836030 NOTICE: BL31: G12A normal boot!
589 13:31:31.850793 NOTICE: BL31: BL33 decompress pass
590 13:31:31.856490 ERROR: Error initializing runtime service opteed_fast
591 13:31:33.216976 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 13:31:33.217601 bl2_stage_init 0x01
593 13:31:33.218031 bl2_stage_init 0x81
594 13:31:33.222500 hw id: 0x0000 - pwm id 0x01
595 13:31:33.222977 bl2_stage_init 0xc1
596 13:31:33.228181 bl2_stage_init 0x02
597 13:31:33.228663
598 13:31:33.229100 L0:00000000
599 13:31:33.229504 L1:00000703
600 13:31:33.229900 L2:00008067
601 13:31:33.230297 L3:15000000
602 13:31:33.234485 S1:00000000
603 13:31:33.234974 B2:20282000
604 13:31:33.235395 B1:a0f83180
605 13:31:33.235801
606 13:31:33.236255 TE: 67672
607 13:31:33.236661
608 13:31:33.239874 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 13:31:33.240378
610 13:31:33.245486 Board ID = 1
611 13:31:33.245962 Set cpu clk to 24M
612 13:31:33.246374 Set clk81 to 24M
613 13:31:33.249008 Use GP1_pll as DSU clk.
614 13:31:33.249476 DSU clk: 1200 Mhz
615 13:31:33.254602 CPU clk: 1200 MHz
616 13:31:33.255091 Set clk81 to 166.6M
617 13:31:33.260169 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 13:31:33.260649 board id: 1
619 13:31:33.269068 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 13:31:33.279940 fw parse done
621 13:31:33.286013 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 13:31:33.327941 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 13:31:33.340035 PIEI prepare done
624 13:31:33.340538 fastboot data load
625 13:31:33.340954 fastboot data verify
626 13:31:33.345602 verify result: 266
627 13:31:33.351187 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 13:31:33.351652 LPDDR4 probe
629 13:31:33.352097 ddr clk to 1584MHz
630 13:31:33.359181 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 13:31:33.397122
632 13:31:33.397623 dmc_version 0001
633 13:31:33.403934 Check phy result
634 13:31:33.409924 INFO : End of CA training
635 13:31:33.410393 INFO : End of initialization
636 13:31:33.415505 INFO : Training has run successfully!
637 13:31:33.415974 Check phy result
638 13:31:33.421086 INFO : End of initialization
639 13:31:33.421552 INFO : End of read enable training
640 13:31:33.426804 INFO : End of fine write leveling
641 13:31:33.432397 INFO : End of Write leveling coarse delay
642 13:31:33.432906 INFO : Training has run successfully!
643 13:31:33.433328 Check phy result
644 13:31:33.437986 INFO : End of initialization
645 13:31:33.438477 INFO : End of read dq deskew training
646 13:31:33.443521 INFO : End of MPR read delay center optimization
647 13:31:33.449098 INFO : End of write delay center optimization
648 13:31:33.454808 INFO : End of read delay center optimization
649 13:31:33.455282 INFO : End of max read latency training
650 13:31:33.460322 INFO : Training has run successfully!
651 13:31:33.460793 1D training succeed
652 13:31:33.469267 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 13:31:33.517772 Check phy result
654 13:31:33.518182 INFO : End of initialization
655 13:31:33.544231 INFO : End of 2D read delay Voltage center optimization
656 13:31:33.569289 INFO : End of 2D read delay Voltage center optimization
657 13:31:33.626160 INFO : End of 2D write delay Voltage center optimization
658 13:31:33.680132 INFO : End of 2D write delay Voltage center optimization
659 13:31:33.685659 INFO : Training has run successfully!
660 13:31:33.685972
661 13:31:33.686190 channel==0
662 13:31:33.691170 RxClkDly_Margin_A0==78 ps 8
663 13:31:33.691483 TxDqDly_Margin_A0==98 ps 10
664 13:31:33.696809 RxClkDly_Margin_A1==88 ps 9
665 13:31:33.697146 TxDqDly_Margin_A1==88 ps 9
666 13:31:33.697368 TrainedVREFDQ_A0==74
667 13:31:33.702372 TrainedVREFDQ_A1==74
668 13:31:33.702681 VrefDac_Margin_A0==23
669 13:31:33.702896 DeviceVref_Margin_A0==40
670 13:31:33.708016 VrefDac_Margin_A1==23
671 13:31:33.708330 DeviceVref_Margin_A1==40
672 13:31:33.708547
673 13:31:33.708755
674 13:31:33.708971 channel==1
675 13:31:33.713576 RxClkDly_Margin_A0==78 ps 8
676 13:31:33.713887 TxDqDly_Margin_A0==98 ps 10
677 13:31:33.719177 RxClkDly_Margin_A1==88 ps 9
678 13:31:33.719473 TxDqDly_Margin_A1==88 ps 9
679 13:31:33.725107 TrainedVREFDQ_A0==78
680 13:31:33.725451 TrainedVREFDQ_A1==75
681 13:31:33.725669 VrefDac_Margin_A0==23
682 13:31:33.730391 DeviceVref_Margin_A0==36
683 13:31:33.730693 VrefDac_Margin_A1==21
684 13:31:33.735975 DeviceVref_Margin_A1==39
685 13:31:33.736301
686 13:31:33.736529 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 13:31:33.736742
688 13:31:33.769558 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000019 00000018 00000018 00000019 00000015 00000018 00000015 00000015 00000017 00000018 0000001a 00000018 00000019 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
689 13:31:33.769964 2D training succeed
690 13:31:33.775172 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 13:31:33.780768 auto size-- 65535DDR cs0 size: 2048MB
692 13:31:33.781081 DDR cs1 size: 2048MB
693 13:31:33.786402 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 13:31:33.786711 cs0 DataBus test pass
695 13:31:33.791973 cs1 DataBus test pass
696 13:31:33.792300 cs0 AddrBus test pass
697 13:31:33.792514 cs1 AddrBus test pass
698 13:31:33.792719
699 13:31:33.797661 100bdlr_step_size ps== 471
700 13:31:33.798053 result report
701 13:31:33.803525 boot times 0Enable ddr reg access
702 13:31:33.808356 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 13:31:33.822183 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 13:31:34.482252 bl2z: ptr: 05129330, size: 00001e40
705 13:31:34.491682 0.0;M3 CHK:0;cm4_sp_mode 0
706 13:31:34.492243 MVN_1=0x00000000
707 13:31:34.492663 MVN_2=0x00000000
708 13:31:34.503192 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 13:31:34.503701 OPS=0x04
710 13:31:34.504161 ring efuse init
711 13:31:34.508824 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 13:31:34.509308 [0.017354 Inits done]
713 13:31:34.509722 secure task start!
714 13:31:34.516448 high task start!
715 13:31:34.516920 low task start!
716 13:31:34.517335 run into bl31
717 13:31:34.525035 NOTICE: BL31: v1.3(release):4fc40b1
718 13:31:34.532944 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 13:31:34.533422 NOTICE: BL31: G12A normal boot!
720 13:31:34.548607 NOTICE: BL31: BL33 decompress pass
721 13:31:34.554110 ERROR: Error initializing runtime service opteed_fast
722 13:31:35.349423
723 13:31:35.350044
724 13:31:35.354950 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 13:31:35.355440
726 13:31:35.358327 Model: Libre Computer AML-S905D3-CC Solitude
727 13:31:35.505499 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 13:31:35.520847 DRAM: 2 GiB (effective 3.8 GiB)
729 13:31:35.621991 Core: 406 devices, 33 uclasses, devicetree: separate
730 13:31:35.627643 WDT: Not starting watchdog@f0d0
731 13:31:35.652730 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 13:31:35.665023 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 13:31:35.669984 ** Bad device specification mmc 0 **
734 13:31:35.680059 Card did not respond to voltage select! : -110
735 13:31:35.687643 ** Bad device specification mmc 0 **
736 13:31:35.688149 Couldn't find partition mmc 0
737 13:31:35.696069 Card did not respond to voltage select! : -110
738 13:31:35.701482 ** Bad device specification mmc 0 **
739 13:31:35.701963 Couldn't find partition mmc 0
740 13:31:35.706550 Error: could not access storage.
741 13:31:36.003115 Net: eth0: ethernet@ff3f0000
742 13:31:36.003776 starting USB...
743 13:31:36.247625 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 13:31:36.248289 Starting the controller
745 13:31:36.254572 USB XHCI 1.10
746 13:31:37.808870 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 13:31:37.817181 scanning usb for storage devices... 0 Storage Device(s) found
749 13:31:37.868549 Hit any key to stop autoboot: 1
750 13:31:37.869555 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 13:31:37.870273 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 13:31:37.870866 Setting prompt string to ['=>']
753 13:31:37.871440 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 13:31:37.883217 0
755 13:31:37.884317 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 13:31:37.985898 => setenv autoload no
758 13:31:37.986988 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 13:31:37.991163 setenv autoload no
761 13:31:38.092461 => setenv initrd_high 0xffffffff
762 13:31:38.093221 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 13:31:38.097556 setenv initrd_high 0xffffffff
765 13:31:38.198890 => setenv fdt_high 0xffffffff
766 13:31:38.199500 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 13:31:38.203894 setenv fdt_high 0xffffffff
769 13:31:38.305514 => dhcp
770 13:31:38.306287 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 13:31:38.313553 dhcp
772 13:31:38.868535 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 13:31:38.869173 Speed: 1000, full duplex
774 13:31:38.869609 BOOTP broadcast 1
775 13:31:39.116494 BOOTP broadcast 2
776 13:31:39.617520 BOOTP broadcast 3
777 13:31:40.618415 BOOTP broadcast 4
778 13:31:42.619564 BOOTP broadcast 5
779 13:31:42.637320 DHCP client bound to address 192.168.6.12 (3768 ms)
781 13:31:42.738603 => setenv serverip 192.168.6.2
782 13:31:42.739458 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
783 13:31:42.744068 setenv serverip 192.168.6.2
785 13:31:42.845829 => tftpboot 0x01080000 786719/tftp-deploy-uo84vzwh/kernel/uImage
786 13:31:42.846677 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
787 13:31:42.853841 tftpboot 0x01080000 786719/tftp-deploy-uo84vzwh/kernel/uImage
788 13:31:42.854449 Speed: 1000, full duplex
789 13:31:42.854911 Using ethernet@ff3f0000 device
790 13:31:42.859556 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
791 13:31:42.864549 Filename '786719/tftp-deploy-uo84vzwh/kernel/uImage'.
792 13:31:42.868593 Load address: 0x1080000
793 13:31:47.928387 Loading: *################################################## 43.6 MiB
794 13:31:47.928999 8.6 MiB/s
795 13:31:47.929406 done
796 13:31:47.932934 Bytes transferred = 45713984 (2b98a40 hex)
798 13:31:48.034461 => tftpboot 0x08000000 786719/tftp-deploy-uo84vzwh/ramdisk/ramdisk.cpio.gz.uboot
799 13:31:48.035495 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:31)
800 13:31:48.042167 tftpboot 0x08000000 786719/tftp-deploy-uo84vzwh/ramdisk/ramdisk.cpio.gz.uboot
801 13:31:48.042729 Speed: 1000, full duplex
802 13:31:48.043157 Using ethernet@ff3f0000 device
803 13:31:48.047721 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
804 13:31:48.057545 Filename '786719/tftp-deploy-uo84vzwh/ramdisk/ramdisk.cpio.gz.uboot'.
805 13:31:48.058089 Load address: 0x8000000
806 13:31:48.635256 Loading: *################ UDP wrong checksum 000000ff 0000993d
807 13:31:48.669091 # UDP wrong checksum 000000ff 00001f30
808 13:31:53.265876 ########### UDP wrong checksum 000000ff 000059b9
809 13:31:53.285971 UDP wrong checksum 000000ff 0000f6ab
810 13:31:55.101808 T ##################### UDP wrong checksum 00000005 000064ff
811 13:32:00.102353 T UDP wrong checksum 00000005 000064ff
812 13:32:10.104513 T T UDP wrong checksum 00000005 000064ff
813 13:32:30.108293 T T T T UDP wrong checksum 00000005 000064ff
814 13:32:40.186103 T T UDP wrong checksum 000000ff 0000d080
815 13:32:40.215578 UDP wrong checksum 000000ff 00006273
816 13:32:45.111940
817 13:32:45.112381 Retry count exceeded; starting again
819 13:32:45.113435 end: 2.4.3 bootloader-commands (duration 00:01:07) [common]
822 13:32:45.114662 end: 2.4 uboot-commands (duration 00:01:26) [common]
824 13:32:45.115410 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
826 13:32:45.116156 end: 2 uboot-action (duration 00:01:26) [common]
828 13:32:45.117046 Cleaning after the job
829 13:32:45.117390 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/ramdisk
830 13:32:45.118247 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/kernel
831 13:32:45.132911 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/dtb
832 13:32:45.133717 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/nfsrootfs
833 13:32:45.255541 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/786719/tftp-deploy-uo84vzwh/modules
834 13:32:45.279574 start: 4.1 power-off (timeout 00:00:30) [common]
835 13:32:45.280583 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
836 13:32:45.318418 >> OK - accepted request
837 13:32:45.320963 Returned 0 in 0 seconds
838 13:32:45.421876 end: 4.1 power-off (duration 00:00:00) [common]
840 13:32:45.422876 start: 4.2 read-feedback (timeout 00:10:00) [common]
841 13:32:45.423604 Listened to connection for namespace 'common' for up to 1s
842 13:32:46.424477 Finalising connection for namespace 'common'
843 13:32:46.424953 Disconnecting from shell: Finalise
844 13:32:46.425237 =>
845 13:32:46.525891 end: 4.2 read-feedback (duration 00:00:01) [common]
846 13:32:46.526360 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/786719
847 13:32:48.699575 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/786719
848 13:32:48.700208 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.