Boot log: beaglebone-black

    1 13:37:26.985832  lava-dispatcher, installed at version: 2023.08
    2 13:37:26.986304  start: 0 validate
    3 13:37:26.986564  Start time: 2024-11-03 13:37:26.986547+00:00 (UTC)
    4 13:37:26.986875  Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz exists
    5 13:37:27.317615  Validating that http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-03-v6.12-rc5/arm/multi_v7_defconfig/gcc-12/kernel/zImage exists
    6 13:37:27.471276  Validating that http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-03-v6.12-rc5/arm/multi_v7_defconfig/gcc-12/dtbs/ti/omap/am335x-boneblack.dtb exists
    7 13:37:27.627318  Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz exists
    8 13:37:27.782121  Validating that http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-03-v6.12-rc5/arm/multi_v7_defconfig/gcc-12/modules.tar.xz exists
    9 13:37:27.945055  validate duration: 0.96
   11 13:37:27.946167  start: 1 tftp-deploy (timeout 00:10:00) [common]
   12 13:37:27.946664  start: 1.1 download-retry (timeout 00:10:00) [common]
   13 13:37:27.947109  start: 1.1.1 http-download (timeout 00:10:00) [common]
   14 13:37:27.947894  Not decompressing ramdisk as can be used compressed.
   15 13:37:27.948340  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz
   16 13:37:27.948684  saving as /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/ramdisk/initrd.cpio.gz
   17 13:37:27.949058  total size: 4775763 (4 MB)
   18 13:37:28.257343  progress   0 % (0 MB)
   19 13:37:28.714883  progress   5 % (0 MB)
   20 13:37:28.905055  progress  10 % (0 MB)
   21 13:37:29.039663  progress  15 % (0 MB)
   22 13:37:29.053203  progress  20 % (0 MB)
   23 13:37:29.176945  progress  25 % (1 MB)
   24 13:37:29.209545  progress  30 % (1 MB)
   25 13:37:29.352103  progress  35 % (1 MB)
   26 13:37:29.492638  progress  40 % (1 MB)
   27 13:37:29.634433  progress  45 % (2 MB)
   28 13:37:29.663254  progress  50 % (2 MB)
   29 13:37:29.805408  progress  55 % (2 MB)
   30 13:37:29.942880  progress  60 % (2 MB)
   31 13:37:30.082074  progress  65 % (2 MB)
   32 13:37:30.112933  progress  70 % (3 MB)
   33 13:37:30.250656  progress  75 % (3 MB)
   34 13:37:30.387778  progress  80 % (3 MB)
   35 13:37:30.413556  progress  85 % (3 MB)
   36 13:37:30.554246  progress  90 % (4 MB)
   37 13:37:30.688129  progress  95 % (4 MB)
   38 13:37:30.714469  progress 100 % (4 MB)
   39 13:37:30.715592  4 MB downloaded in 2.77 s (1.65 MB/s)
   40 13:37:30.716414  end: 1.1.1 http-download (duration 00:00:03) [common]
   42 13:37:30.717813  end: 1.1 download-retry (duration 00:00:03) [common]
   43 13:37:30.718297  start: 1.2 download-retry (timeout 00:09:57) [common]
   44 13:37:30.718762  start: 1.2.1 http-download (timeout 00:09:57) [common]
   45 13:37:30.719460  downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-03-v6.12-rc5/arm/multi_v7_defconfig/gcc-12/kernel/zImage
   46 13:37:30.719830  saving as /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/kernel/zImage
   47 13:37:30.720192  total size: 11440640 (10 MB)
   48 13:37:30.720556  No compression specified
   49 13:37:30.877761  progress   0 % (0 MB)
   50 13:37:31.063551  progress   5 % (0 MB)
   51 13:37:31.354782  progress  10 % (1 MB)
   52 13:37:31.664032  progress  15 % (1 MB)
   53 13:37:31.966772  progress  20 % (2 MB)
   54 13:37:32.275564  progress  25 % (2 MB)
   55 13:37:32.574135  progress  30 % (3 MB)
   56 13:37:32.871302  progress  35 % (3 MB)
   57 13:37:33.167473  progress  40 % (4 MB)
   58 13:37:33.467925  progress  45 % (4 MB)
   59 13:37:33.653096  progress  50 % (5 MB)
   60 13:37:33.950871  progress  55 % (6 MB)
   61 13:37:34.247277  progress  60 % (6 MB)
   62 13:37:34.533743  progress  65 % (7 MB)
   63 13:37:34.819196  progress  70 % (7 MB)
   64 13:37:35.017151  progress  75 % (8 MB)
   65 13:37:35.316280  progress  80 % (8 MB)
   66 13:37:35.612144  progress  85 % (9 MB)
   67 13:37:35.894401  progress  90 % (9 MB)
   68 13:37:36.092329  progress  95 % (10 MB)
   69 13:37:36.386063  progress 100 % (10 MB)
   70 13:37:36.386760  10 MB downloaded in 5.67 s (1.93 MB/s)
   71 13:37:36.387595  end: 1.2.1 http-download (duration 00:00:06) [common]
   73 13:37:36.388951  end: 1.2 download-retry (duration 00:00:06) [common]
   74 13:37:36.389379  start: 1.3 download-retry (timeout 00:09:52) [common]
   75 13:37:36.389822  start: 1.3.1 http-download (timeout 00:09:52) [common]
   76 13:37:36.390458  downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-03-v6.12-rc5/arm/multi_v7_defconfig/gcc-12/dtbs/ti/omap/am335x-boneblack.dtb
   77 13:37:36.390817  saving as /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/dtb/am335x-boneblack.dtb
   78 13:37:36.391196  total size: 70568 (0 MB)
   79 13:37:36.391504  No compression specified
   80 13:37:36.551038  progress  46 % (0 MB)
   81 13:37:36.553893  progress  92 % (0 MB)
   82 13:37:36.555177  progress 100 % (0 MB)
   83 13:37:36.555721  0 MB downloaded in 0.16 s (0.41 MB/s)
   84 13:37:36.556291  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 13:37:36.557404  end: 1.3 download-retry (duration 00:00:00) [common]
   87 13:37:36.557804  start: 1.4 download-retry (timeout 00:09:51) [common]
   88 13:37:36.558207  start: 1.4.1 http-download (timeout 00:09:51) [common]
   89 13:37:36.558763  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz
   90 13:37:36.559077  saving as /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/nfsrootfs/full.rootfs.tar
   91 13:37:36.559374  total size: 117747780 (112 MB)
   92 13:37:36.559686  Using unxz to decompress xz
   93 13:37:36.717550  progress   0 % (0 MB)
   94 13:37:39.835896  progress   5 % (5 MB)
   95 13:37:42.657221  progress  10 % (11 MB)
   96 13:37:45.392833  progress  15 % (16 MB)
   97 13:37:47.826856  progress  20 % (22 MB)
   98 13:37:49.761448  progress  25 % (28 MB)
   99 13:37:51.196344  progress  30 % (33 MB)
  100 13:37:52.363614  progress  35 % (39 MB)
  101 13:37:53.643064  progress  40 % (44 MB)
  102 13:37:55.263582  progress  45 % (50 MB)
  103 13:37:56.787886  progress  50 % (56 MB)
  104 13:37:58.623378  progress  55 % (61 MB)
  105 13:38:00.148490  progress  60 % (67 MB)
  106 13:38:01.779806  progress  65 % (73 MB)
  107 13:38:03.303714  progress  70 % (78 MB)
  108 13:38:04.774396  progress  75 % (84 MB)
  109 13:38:06.235080  progress  80 % (89 MB)
  110 13:38:07.721464  progress  85 % (95 MB)
  111 13:38:09.144324  progress  90 % (101 MB)
  112 13:38:10.509183  progress  95 % (106 MB)
  113 13:38:11.770217  progress 100 % (112 MB)
  114 13:38:11.775701  112 MB downloaded in 35.22 s (3.19 MB/s)
  115 13:38:11.776807  end: 1.4.1 http-download (duration 00:00:35) [common]
  117 13:38:11.777951  end: 1.4 download-retry (duration 00:00:35) [common]
  118 13:38:11.778367  start: 1.5 download-retry (timeout 00:09:16) [common]
  119 13:38:11.778784  start: 1.5.1 http-download (timeout 00:09:16) [common]
  120 13:38:11.779486  downloading http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-03-v6.12-rc5/arm/multi_v7_defconfig/gcc-12/modules.tar.xz
  121 13:38:11.779807  saving as /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/modules/modules.tar
  122 13:38:11.780114  total size: 6607400 (6 MB)
  123 13:38:11.780432  Using unxz to decompress xz
  124 13:38:11.940038  progress   0 % (0 MB)
  125 13:38:12.119052  progress   5 % (0 MB)
  126 13:38:12.162592  progress  10 % (0 MB)
  127 13:38:12.197280  progress  15 % (0 MB)
  128 13:38:12.253043  progress  20 % (1 MB)
  129 13:38:12.289295  progress  25 % (1 MB)
  130 13:38:12.417771  progress  30 % (1 MB)
  131 13:38:12.546629  progress  35 % (2 MB)
  132 13:38:12.580114  progress  40 % (2 MB)
  133 13:38:12.709327  progress  45 % (2 MB)
  134 13:38:12.743277  progress  50 % (3 MB)
  135 13:38:12.870974  progress  55 % (3 MB)
  136 13:38:12.908123  progress  60 % (3 MB)
  137 13:38:13.031964  progress  65 % (4 MB)
  138 13:38:13.158043  progress  70 % (4 MB)
  139 13:38:13.189895  progress  75 % (4 MB)
  140 13:38:13.316191  progress  80 % (5 MB)
  141 13:38:13.352907  progress  85 % (5 MB)
  142 13:38:13.471915  progress  90 % (5 MB)
  143 13:38:13.506502  progress  95 % (6 MB)
  144 13:38:13.625430  progress 100 % (6 MB)
  145 13:38:13.633514  6 MB downloaded in 1.85 s (3.40 MB/s)
  146 13:38:13.634123  end: 1.5.1 http-download (duration 00:00:02) [common]
  148 13:38:13.635248  end: 1.5 download-retry (duration 00:00:02) [common]
  149 13:38:13.635674  start: 1.6 prepare-tftp-overlay (timeout 00:09:14) [common]
  150 13:38:13.636119  start: 1.6.1 extract-nfsrootfs (timeout 00:09:14) [common]
  151 13:38:21.639893  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k
  152 13:38:21.640207  end: 1.6.1 extract-nfsrootfs (duration 00:00:08) [common]
  153 13:38:21.640359  start: 1.6.2 lava-overlay (timeout 00:09:06) [common]
  154 13:38:21.640662  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1
  155 13:38:21.640979  makedir: /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin
  156 13:38:21.641153  makedir: /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/tests
  157 13:38:21.641323  makedir: /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/results
  158 13:38:21.641485  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-add-keys
  159 13:38:21.641723  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-add-sources
  160 13:38:21.641947  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-background-process-start
  161 13:38:21.642167  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-background-process-stop
  162 13:38:21.642404  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-common-functions
  163 13:38:21.642626  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-echo-ipv4
  164 13:38:21.642857  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-install-packages
  165 13:38:21.643075  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-installed-packages
  166 13:38:21.643285  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-os-build
  167 13:38:21.643505  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-probe-channel
  168 13:38:21.643721  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-probe-ip
  169 13:38:21.643936  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-target-ip
  170 13:38:21.644150  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-target-mac
  171 13:38:21.644365  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-target-storage
  172 13:38:21.644587  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-test-case
  173 13:38:21.644840  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-test-event
  174 13:38:21.645058  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-test-feedback
  175 13:38:21.645333  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-test-raise
  176 13:38:21.645551  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-test-reference
  177 13:38:21.645769  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-test-runner
  178 13:38:21.645987  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-test-set
  179 13:38:21.646198  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-test-shell
  180 13:38:21.646426  Updating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-add-keys (debian)
  181 13:38:21.711014  Updating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-add-sources (debian)
  182 13:38:21.711326  Updating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-install-packages (debian)
  183 13:38:21.711597  Updating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-installed-packages (debian)
  184 13:38:21.711879  Updating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/bin/lava-os-build (debian)
  185 13:38:21.712092  Creating /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/environment
  186 13:38:21.712257  LAVA metadata
  187 13:38:21.712372  - LAVA_JOB_ID=1215563
  188 13:38:21.712483  - LAVA_DISPATCHER_IP=172.16.3.3
  189 13:38:21.712654  start: 1.6.2.1 ssh-authorize (timeout 00:09:06) [common]
  190 13:38:21.713150  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  191 13:38:21.713304  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:06) [common]
  192 13:38:21.713411  skipped lava-vland-overlay
  193 13:38:21.713540  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  194 13:38:21.713674  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:06) [common]
  195 13:38:21.713782  skipped lava-multinode-overlay
  196 13:38:21.713909  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  197 13:38:21.714039  start: 1.6.2.4 test-definition (timeout 00:09:06) [common]
  198 13:38:21.714154  Loading test definitions
  199 13:38:21.714294  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:06) [common]
  200 13:38:21.714405  Using /lava-1215563 at stage 0
  201 13:38:21.714967  uuid=1215563_1.6.2.4.1 testdef=None
  202 13:38:21.715119  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  203 13:38:21.715254  start: 1.6.2.4.2 test-overlay (timeout 00:09:06) [common]
  204 13:38:21.716010  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  206 13:38:21.716398  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:06) [common]
  207 13:38:21.717412  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  209 13:38:21.717846  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:06) [common]
  210 13:38:21.735301  runner path: /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/0/tests/0_timesync-off test_uuid 1215563_1.6.2.4.1
  211 13:38:21.735597  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  213 13:38:21.736030  start: 1.6.2.4.5 git-repo-action (timeout 00:09:06) [common]
  214 13:38:21.736167  Using /lava-1215563 at stage 0
  215 13:38:21.736344  Fetching tests from https://github.com/kernelci/test-definitions.git
  216 13:38:21.736480  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/0/tests/1_kselftest-dt'
  217 13:38:27.551982  Running '/usr/bin/git checkout kernelci.org
  218 13:38:27.858426  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
  219 13:38:27.859786  uuid=1215563_1.6.2.4.5 testdef=None
  220 13:38:27.860136  end: 1.6.2.4.5 git-repo-action (duration 00:00:06) [common]
  222 13:38:27.860898  start: 1.6.2.4.6 test-overlay (timeout 00:09:00) [common]
  223 13:38:27.863429  end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
  225 13:38:27.864235  start: 1.6.2.4.7 test-install-overlay (timeout 00:09:00) [common]
  226 13:38:27.867640  end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
  228 13:38:27.868485  start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:00) [common]
  229 13:38:27.902207  runner path: /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/0/tests/1_kselftest-dt test_uuid 1215563_1.6.2.4.5
  230 13:38:27.902499  BOARD='beaglebone-black'
  231 13:38:27.902735  BRANCH='renesas'
  232 13:38:27.902968  SKIPFILE='/dev/null'
  233 13:38:27.903190  SKIP_INSTALL='True'
  234 13:38:27.903410  TESTPROG_URL='http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-03-v6.12-rc5/arm/multi_v7_defconfig/gcc-12/kselftest.tar.xz'
  235 13:38:27.903632  TST_CASENAME=''
  236 13:38:27.903846  TST_CMDFILES='dt'
  237 13:38:27.904368  end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
  239 13:38:27.905091  Creating lava-test-runner.conf files
  240 13:38:27.905313  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/1215563/lava-overlay-mnyhcur1/lava-1215563/0 for stage 0
  241 13:38:27.905649  - 0_timesync-off
  242 13:38:27.905884  - 1_kselftest-dt
  243 13:38:27.906233  end: 1.6.2.4 test-definition (duration 00:00:06) [common]
  244 13:38:27.906525  start: 1.6.2.5 compress-overlay (timeout 00:09:00) [common]
  245 13:38:37.542533  end: 1.6.2.5 compress-overlay (duration 00:00:10) [common]
  246 13:38:37.542749  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:50) [common]
  247 13:38:37.542894  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  248 13:38:37.543045  end: 1.6.2 lava-overlay (duration 00:00:16) [common]
  249 13:38:37.543188  start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:50) [common]
  250 13:38:37.681147  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  251 13:38:37.681396  start: 1.6.4 extract-modules (timeout 00:08:50) [common]
  252 13:38:37.681524  extracting modules file /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k
  253 13:38:38.078712  extracting modules file /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1215563/extract-overlay-ramdisk-7xso3aij/ramdisk
  254 13:38:38.466131  end: 1.6.4 extract-modules (duration 00:00:01) [common]
  255 13:38:38.466383  start: 1.6.5 apply-overlay-tftp (timeout 00:08:49) [common]
  256 13:38:38.466513  [common] Applying overlay to NFS
  257 13:38:38.466621  [common] Applying overlay /var/lib/lava/dispatcher/tmp/1215563/compress-overlay-cl9zhaou/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k
  258 13:38:39.793997  end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
  259 13:38:39.794249  start: 1.6.6 prepare-kernel (timeout 00:08:48) [common]
  260 13:38:39.794393  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:48) [common]
  261 13:38:39.794539  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  262 13:38:39.794672  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  263 13:38:39.794807  start: 1.6.7 configure-preseed-file (timeout 00:08:48) [common]
  264 13:38:39.794938  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  265 13:38:39.795071  start: 1.6.8 compress-ramdisk (timeout 00:08:48) [common]
  266 13:38:39.795183  Building ramdisk /var/lib/lava/dispatcher/tmp/1215563/extract-overlay-ramdisk-7xso3aij/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/1215563/extract-overlay-ramdisk-7xso3aij/ramdisk
  267 13:38:40.087667  >> 74897 blocks

  268 13:38:42.152509  Adding RAMdisk u-boot header.
  269 13:38:42.152909  mkimage -A arm -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/1215563/extract-overlay-ramdisk-7xso3aij/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/1215563/extract-overlay-ramdisk-7xso3aij/ramdisk.cpio.gz.uboot
  270 13:38:42.456934  output: Image Name:   
  271 13:38:42.457292  output: Created:      Sun Nov  3 13:38:42 2024
  272 13:38:42.457614  output: Image Type:   ARM Linux RAMDisk Image (uncompressed)
  273 13:38:42.457923  output: Data Size:    14796154 Bytes = 14449.37 KiB = 14.11 MiB
  274 13:38:42.458220  output: Load Address: 00000000
  275 13:38:42.458510  output: Entry Point:  00000000
  276 13:38:42.458799  output: 
  277 13:38:42.459283  rename /var/lib/lava/dispatcher/tmp/1215563/extract-overlay-ramdisk-7xso3aij/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/ramdisk/ramdisk.cpio.gz.uboot
  278 13:38:42.459776  end: 1.6.8 compress-ramdisk (duration 00:00:03) [common]
  279 13:38:42.460185  end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
  280 13:38:42.460586  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:45) [common]
  281 13:38:42.460902  No LXC device requested
  282 13:38:42.461072  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  283 13:38:42.461476  start: 1.8 deploy-device-env (timeout 00:08:45) [common]
  284 13:38:42.461854  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  285 13:38:42.462158  Checking files for TFTP limit of 4294967296 bytes.
  286 13:38:42.464074  end: 1 tftp-deploy (duration 00:01:15) [common]
  287 13:38:42.464485  start: 2 uboot-action (timeout 00:05:00) [common]
  288 13:38:42.464877  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  289 13:38:42.465047  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  290 13:38:42.465420  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  291 13:38:42.465974  substitutions:
  292 13:38:42.466284  - {BOOTX}: bootz 0x82000000 0x83000000 0x88000000
  293 13:38:42.466587  - {DTB_ADDR}: 0x88000000
  294 13:38:42.466880  - {DTB}: 1215563/tftp-deploy-gg85_63o/dtb/am335x-boneblack.dtb
  295 13:38:42.467172  - {INITRD}: 1215563/tftp-deploy-gg85_63o/ramdisk/ramdisk.cpio.gz.uboot
  296 13:38:42.467462  - {KERNEL_ADDR}: 0x82000000
  297 13:38:42.467751  - {KERNEL}: 1215563/tftp-deploy-gg85_63o/kernel/zImage
  298 13:38:42.468037  - {LAVA_MAC}: None
  299 13:38:42.468340  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k
  300 13:38:42.468628  - {NFS_SERVER_IP}: 172.16.3.3
  301 13:38:42.468889  - {PRESEED_CONFIG}: None
  302 13:38:42.469015  - {PRESEED_LOCAL}: None
  303 13:38:42.469290  - {RAMDISK_ADDR}: 0x83000000
  304 13:38:42.469570  - {RAMDISK}: 1215563/tftp-deploy-gg85_63o/ramdisk/ramdisk.cpio.gz.uboot
  305 13:38:42.469851  - {ROOT_PART}: None
  306 13:38:42.470127  - {ROOT}: None
  307 13:38:42.470404  - {SERVER_IP}: 172.16.3.3
  308 13:38:42.470678  - {TEE_ADDR}: 0x83000000
  309 13:38:42.470953  - {TEE}: None
  310 13:38:42.471228  Parsed boot commands:
  311 13:38:42.471499  - setenv autoload no
  312 13:38:42.471775  - setenv initrd_high 0xffffffff
  313 13:38:42.472050  - setenv fdt_high 0xffffffff
  314 13:38:42.472323  - dhcp
  315 13:38:42.472595  - setenv serverip 172.16.3.3
  316 13:38:42.472870  - tftp 0x82000000 1215563/tftp-deploy-gg85_63o/kernel/zImage
  317 13:38:42.472994  - tftp 0x83000000 1215563/tftp-deploy-gg85_63o/ramdisk/ramdisk.cpio.gz.uboot
  318 13:38:42.473249  - setenv initrd_size ${filesize}
  319 13:38:42.473523  - tftp 0x88000000 1215563/tftp-deploy-gg85_63o/dtb/am335x-boneblack.dtb
  320 13:38:42.473799  - setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  321 13:38:42.474089  - bootz 0x82000000 0x83000000 0x88000000
  322 13:38:42.474450  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  324 13:38:42.475442  start: 2.3 connect-device (timeout 00:05:00) [common]
  325 13:38:42.475740  [common] connect-device Connecting to device using 'telnet ts5 2000'
  326 13:38:42.483191  Setting prompt string to ['lava-test: # ']
  327 13:38:42.483699  end: 2.3 connect-device (duration 00:00:00) [common]
  328 13:38:42.483911  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  329 13:38:42.484109  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  330 13:38:42.484294  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  331 13:38:42.484590  Calling: 'drpm' 'lf-bbb' 'powercycle'
  332 13:38:42.742982  >> OFF

  333 13:38:58.077788  >> ON

  334 13:38:58.078679  Returned 0 in 15 seconds
  335 13:38:58.179394  end: 2.4.1.1 pdu-reboot (duration 00:00:16) [common]
  337 13:38:58.180491  end: 2.4.1 reset-device (duration 00:00:16) [common]
  338 13:38:58.180921  start: 2.4.2 bootloader-interrupt (timeout 00:04:44) [common]
  339 13:38:58.181166  Setting prompt string to ['Hit any key to stop autoboot']
  340 13:38:58.181505  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  341 13:38:58.182452  Trying 192.168.1.205...
  342 13:38:58.182776  Connected to ts5.
  343 13:38:58.183061  Escape character is '^]'.
  344 13:38:58.183348  
  345 13:38:58.183641  ser2net port telnet,2000 device serialdev,/dev/ttyUSB-lf-bbb-01,115200n81,local [] (Debian GNU/Linux)
  346 13:38:58.183938  
  347 13:38:58.775144  
  348 13:38:58.784298  U-Boot SPL 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
  349 13:38:58.784701  Trying to boot from MMC2
  350 13:38:59.296158  
  351 13:38:59.296554  
  352 13:38:59.301037  U-Boot 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
  353 13:38:59.301443  
  354 13:38:59.301782  CPU  : AM335X-GP rev 2.1
  355 13:38:59.307734  Model: TI AM335x BeagleBone Black
  356 13:38:59.308127  DRAM:  512 MiB
  357 13:38:59.387544  WDT:   Started with servicing (60s timeout)
  358 13:38:59.793660  NAND:  0 MiB
  359 13:38:59.804234  MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
  360 13:38:59.837937  Loading Environment from FAT... <ethaddr> not set. Validating first E-fuse MAC
  361 13:38:59.867172  Net:   eth2: ethernet@4a100000, eth3: usb_ether
  362 13:38:59.925858  end: 2.4.2 bootloader-interrupt (duration 00:00:02) [common]
  363 13:38:59.926229  start: 2.4.3 bootloader-commands (timeout 00:04:43) [common]
  364 13:38:59.926473  Setting prompt string to ['=> ']
  365 13:38:59.926709  bootloader-commands: Wait for prompt ['=> '] (timeout 00:04:43)
  366 13:38:59.935676  Hit any key to stop autoboot:  2   0 
  367 13:38:59.936194  Setting prompt string to ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
  368 13:38:59.936417  Sending with 10 millisecond of delay
  370 13:39:01.072485  => setenv autoload no
  371 13:39:01.083250  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:41)
  372 13:39:01.086447  setenv autoload no
  373 13:39:01.087041  Sending with 10 millisecond of delay
  375 13:39:02.887131  => setenv initrd_high 0xffffffff
  376 13:39:02.897713  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:40)
  377 13:39:02.898344  setenv initrd_high 0xffffffff
  378 13:39:02.898912  Sending with 10 millisecond of delay
  380 13:39:04.518009  => setenv fdt_high 0xffffffff
  381 13:39:04.528565  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:38)
  382 13:39:04.529215  setenv fdt_high 0xffffffff
  383 13:39:04.529784  Sending with 10 millisecond of delay
  385 13:39:04.821793  => dhcp
  386 13:39:04.832341  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:38)
  387 13:39:04.834315  dhcp
  388 13:39:04.834698  link up on port 0, speed 100, full duplex
  389 13:39:04.835011  BOOTP broadcast 1
  390 13:39:04.873294  DHCP client bound to address 172.16.3.206 (33 ms)
  391 13:39:04.873917  Sending with 10 millisecond of delay
  393 13:39:06.492840  => setenv serverip 172.16.3.3
  394 13:39:06.503117  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:36)
  395 13:39:06.503384  setenv serverip 172.16.3.3
  396 13:39:06.503704  Sending with 10 millisecond of delay
  398 13:39:10.050979  => tftp 0x82000000 1215563/tftp-deploy-gg85_63o/kernel/zImage
  399 13:39:10.061632  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:32)
  400 13:39:10.062607  tftp 0x82000000 1215563/tftp-deploy-gg85_63o/kernel/zImage
  401 13:39:10.062936  link up on port 0, speed 100, full duplex
  402 13:39:10.067729  Using ethernet@4a100000 device
  403 13:39:10.073817  TFTP from server 172.16.3.3; our IP address is 172.16.3.206
  404 13:39:10.080524  Filename '1215563/tftp-deploy-gg85_63o/kernel/zImage'.
  405 13:39:10.080901  Load address: 0x82000000
  406 13:39:12.696761  Loading: *##################################################  10.9 MiB
  407 13:39:12.697248  	 4.2 MiB/s
  408 13:39:12.697559  done
  409 13:39:12.701120  Bytes transferred = 11440640 (ae9200 hex)
  410 13:39:12.701764  Sending with 10 millisecond of delay
  412 13:39:17.213294  => tftp 0x83000000 1215563/tftp-deploy-gg85_63o/ramdisk/ramdisk.cpio.gz.uboot
  413 13:39:17.223934  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:25)
  414 13:39:17.224846  tftp 0x83000000 1215563/tftp-deploy-gg85_63o/ramdisk/ramdisk.cpio.gz.uboot
  415 13:39:17.224983  link up on port 0, speed 100, full duplex
  416 13:39:17.231001  Using ethernet@4a100000 device
  417 13:39:17.235874  TFTP from server 172.16.3.3; our IP address is 172.16.3.206
  418 13:39:17.245018  Filename '1215563/tftp-deploy-gg85_63o/ramdisk/ramdisk.cpio.gz.uboot'.
  419 13:39:17.245241  Load address: 0x83000000
  420 13:39:20.742354  Loading: *##################################################  14.1 MiB
  421 13:39:20.742783  	 4 MiB/s
  422 13:39:20.743098  done
  423 13:39:20.747834  Bytes transferred = 14796218 (e1c5ba hex)
  424 13:39:20.748500  Sending with 10 millisecond of delay
  426 13:39:22.607506  => setenv initrd_size ${filesize}
  427 13:39:22.618070  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:20)
  428 13:39:22.618556  setenv initrd_size ${filesize}
  429 13:39:22.619025  Sending with 10 millisecond of delay
  431 13:39:26.828124  => tftp 0x88000000 1215563/tftp-deploy-gg85_63o/dtb/am335x-boneblack.dtb
  432 13:39:26.838664  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:16)
  433 13:39:26.839591  tftp 0x88000000 1215563/tftp-deploy-gg85_63o/dtb/am335x-boneblack.dtb
  434 13:39:26.839863  link up on port 0, speed 100, full duplex
  435 13:39:26.844525  Using ethernet@4a100000 device
  436 13:39:26.850743  TFTP from server 172.16.3.3; our IP address is 172.16.3.206
  437 13:39:26.862948  Filename '1215563/tftp-deploy-gg85_63o/dtb/am335x-boneblack.dtb'.
  438 13:39:26.863283  Load address: 0x88000000
  439 13:39:26.877754  Loading: *##################################################  68.9 KiB
  440 13:39:26.878141  	 3.4 MiB/s
  441 13:39:26.885749  done
  442 13:39:26.886131  Bytes transferred = 70568 (113a8 hex)
  443 13:39:26.886695  Sending with 10 millisecond of delay
  445 13:39:40.246625  => setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  446 13:39:40.257020  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:02)
  447 13:39:40.257357  setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  448 13:39:40.257727  Sending with 10 millisecond of delay
  450 13:39:42.596093  => bootz 0x82000000 0x83000000 0x88000000
  451 13:39:42.606646  Setting prompt string to ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
  452 13:39:42.606984  bootloader-commands: Wait for prompt ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:00)
  453 13:39:42.607447  bootz 0x82000000 0x83000000 0x88000000
  454 13:39:42.607631  Kernel image @ 0x82000000 [ 0x000000 - 0xae9200 ]
  455 13:39:42.610014  ## Loading init Ramdisk from Legacy Image at 83000000 ...
  456 13:39:42.616376     Image Name:   
  457 13:39:42.616589     Created:      2024-11-03  13:38:42 UTC
  458 13:39:42.619986     Image Type:   ARM Linux RAMDisk Image (uncompressed)
  459 13:39:42.626002     Data Size:    14796154 Bytes = 14.1 MiB
  460 13:39:42.626190     Load Address: 00000000
  461 13:39:42.632833     Entry Point:  00000000
  462 13:39:42.801094     Verifying Checksum ... OK
  463 13:39:42.801429  ## Flattened Device Tree blob at 88000000
  464 13:39:42.808588     Booting using the fdt blob at 0x88000000
  465 13:39:42.812812     Using Device Tree in place at 88000000, end 880143a7
  466 13:39:42.826032  
  467 13:39:42.826202  Starting kernel ...
  468 13:39:42.826336  
  469 13:39:42.826744  end: 2.4.3 bootloader-commands (duration 00:00:43) [common]
  470 13:39:42.826926  start: 2.4.4 auto-login-action (timeout 00:04:00) [common]
  471 13:39:42.827087  Setting prompt string to ['Linux version [0-9]']
  472 13:39:42.827237  Setting prompt string to ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
  473 13:39:42.827386  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:05:00)
  474 13:39:43.666688  [    0.000000] Booting Linux on physical CPU 0x0
  475 13:39:43.673061  start: 2.4.4.1 login-action (timeout 00:03:59) [common]
  476 13:39:43.673294  The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
  477 13:39:43.673490  Setting prompt string to []
  478 13:39:43.673687  Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
  479 13:39:43.673879  Using line separator: #'\n'#
  480 13:39:43.674043  No login prompt set.
  481 13:39:43.674215  Parsing kernel messages
  482 13:39:43.674372  ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
  483 13:39:43.674658  [login-action] Waiting for messages, (timeout 00:03:59)
  484 13:39:43.686377  [    0.000000] Linux version 6.12.0-rc5 (KernelCI@build-j360629-arm-gcc-12-multi-v7-defconfig-7vvx5) (arm-linux-gnueabihf-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP Sun Nov  3 13:16:53 UTC 2024
  485 13:39:43.698836  [    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
  486 13:39:43.702399  [    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
  487 13:39:43.707591  [    0.000000] OF: fdt: Machine model: TI AM335x BeagleBone Black
  488 13:39:43.713706  [    0.000000] earlycon: omap8250 at MMIO 0x44e09000 (options '')
  489 13:39:43.718743  [    0.000000] printk: legacy bootconsole [omap8250] enabled
  490 13:39:43.723812  [    0.000000] Memory policy: Data cache writeback
  491 13:39:43.731158  [    0.000000] efi: UEFI not found.
  492 13:39:43.740712  [    0.000000] cma: Reserved 64 MiB at 0x9b800000 on node -1
  493 13:39:43.740893  [    0.000000] Zone ranges:
  494 13:39:43.745801  [    0.000000]   DMA      [mem 0x0000000080000000-0x000000009fdfffff]
  495 13:39:43.750680  [    0.000000]   Normal   empty
  496 13:39:43.750849  [    0.000000]   HighMem  empty
  497 13:39:43.757118  [    0.000000] Movable zone start for each node
  498 13:39:43.763241  [    0.000000] Early memory node ranges
  499 13:39:43.768222  [    0.000000]   node   0: [mem 0x0000000080000000-0x000000009fdfffff]
  500 13:39:43.774860  [    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009fdfffff]
  501 13:39:43.800538  [    0.000000] CPU: All CPU(s) started in SVC mode.
  502 13:39:43.809165  [    0.000000] AM335X ES2.1 (sgx neon)
  503 13:39:43.813836  [    0.000000] percpu: Embedded 17 pages/cpu s40844 r8192 d20596 u69632
  504 13:39:43.834932  [    0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp
  505 13:39:43.846122  <6>[    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
  506 13:39:43.852240  <6>[    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear)
  507 13:39:43.860875  <6>[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 130560
  508 13:39:43.868897  <6>[    0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
  509 13:39:43.898623  <6>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
  510 13:39:43.903621  <6>[    0.000000] trace event string verifier disabled
  511 13:39:43.903821  <6>[    0.000000] rcu: Hierarchical RCU implementation.
  512 13:39:43.911117  <6>[    0.000000] rcu: 	RCU event tracing is enabled.
  513 13:39:43.917249  <6>[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=1.
  514 13:39:43.927089  <6>[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
  515 13:39:43.934074  <6>[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
  516 13:39:43.949031  <6>[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
  517 13:39:43.966766  <6>[    0.000000] IRQ: Found an INTC at 0x(ptrval) (revision 5.0) with 128 interrupts
  518 13:39:43.973503  <6>[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
  519 13:39:44.065010  <6>[    0.000000] TI gptimer clocksource: always-on /ocp/interconnect@44c00000/segment@200000/target-module@31000
  520 13:39:44.075067  <6>[    0.000002] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
  521 13:39:44.087534  <6>[    0.008335] clocksource: dmtimer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
  522 13:39:44.095867  <6>[    0.019156] TI gptimer clockevent: 24000000 Hz at /ocp/interconnect@48000000/segment@0/target-module@40000
  523 13:39:44.104133  <6>[    0.034024] Console: colour dummy device 80x30
  524 13:39:44.110868  Matched prompt #6: WARNING:
  525 13:39:44.111092  Setting prompt string to ['end trace[^\\r]*\\r', '/ #', 'Login timed out', 'Login incorrect']
  526 13:39:44.115499  <3>[    0.038922] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
  527 13:39:44.121613  <3>[    0.045992] This ensures that you still see kernel messages. Please
  528 13:39:44.124840  <3>[    0.052717] update your kernel commandline.
  529 13:39:44.164768  <6>[    0.057327] Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736)
  530 13:39:44.170978  <6>[    0.096160] CPU: Testing write buffer coherency: ok
  531 13:39:44.177072  <6>[    0.101522] CPU0: Spectre v2: using BPIALL workaround
  532 13:39:44.177258  <6>[    0.106989] pid_max: default: 32768 minimum: 301
  533 13:39:44.188376  <6>[    0.112182] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
  534 13:39:44.195833  <6>[    0.120005] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
  535 13:39:44.202489  <6>[    0.129350] CPU0: thread -1, cpu 0, socket -1, mpidr 0
  536 13:39:44.268123  <6>[    0.189545] Setting up static identity map for 0x80300000 - 0x803000ac
  537 13:39:44.274390  <6>[    0.199104] rcu: Hierarchical SRCU implementation.
  538 13:39:44.277634  <6>[    0.204391] rcu: 	Max phase no-delay instances is 1000.
  539 13:39:44.286505  <6>[    0.215425] EFI services will not be available.
  540 13:39:44.291501  <6>[    0.220768] smp: Bringing up secondary CPUs ...
  541 13:39:44.297474  <6>[    0.225739] smp: Brought up 1 node, 1 CPU
  542 13:39:44.304881  <6>[    0.230230] SMP: Total of 1 processors activated (996.14 BogoMIPS).
  543 13:39:44.311093  <6>[    0.236951] CPU: All CPU(s) started in SVC mode.
  544 13:39:44.329057  <6>[    0.242150] Memory: 405992K/522240K available (16384K kernel code, 2543K rwdata, 6788K rodata, 2048K init, 430K bss, 49056K reserved, 65536K cma-reserved, 0K highmem)
  545 13:39:44.329261  <6>[    0.258422] devtmpfs: initialized
  546 13:39:44.352187  <6>[    0.275759] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
  547 13:39:44.360835  <6>[    0.284367] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
  548 13:39:44.366067  <6>[    0.294807] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
  549 13:39:44.380792  <6>[    0.307051] pinctrl core: initialized pinctrl subsystem
  550 13:39:44.388749  <6>[    0.317720] DMI not present or invalid.
  551 13:39:44.398560  <6>[    0.323577] NET: Registered PF_NETLINK/PF_ROUTE protocol family
  552 13:39:44.407724  <6>[    0.332511] DMA: preallocated 256 KiB pool for atomic coherent allocations
  553 13:39:44.422341  <6>[    0.343978] thermal_sys: Registered thermal governor 'step_wise'
  554 13:39:44.422586  <6>[    0.344149] cpuidle: using governor menu
  555 13:39:44.449724  <6>[    0.379935] No ATAGs?
  556 13:39:44.456470  <6>[    0.382576] hw-breakpoint: debug architecture 0x4 unsupported.
  557 13:39:44.465791  <6>[    0.394493] Serial: AMBA PL011 UART driver
  558 13:39:44.496670  <6>[    0.425642] iommu: Default domain type: Translated
  559 13:39:44.506006  <6>[    0.430988] iommu: DMA domain TLB invalidation policy: strict mode
  560 13:39:44.532072  <5>[    0.460926] SCSI subsystem initialized
  561 13:39:44.547041  <6>[    0.470315] usbcore: registered new interface driver usbfs
  562 13:39:44.553038  <6>[    0.476271] usbcore: registered new interface driver hub
  563 13:39:44.553411  <6>[    0.482094] usbcore: registered new device driver usb
  564 13:39:44.560535  <6>[    0.488579] pps_core: LinuxPPS API ver. 1 registered
  565 13:39:44.572891  <6>[    0.494014] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
  566 13:39:44.576395  <6>[    0.503728] PTP clock support registered
  567 13:39:44.579720  <6>[    0.508170] EDAC MC: Ver: 3.0.0
  568 13:39:44.626174  <6>[    0.553457] scmi_core: SCMI protocol bus registered
  569 13:39:44.650381  <6>[    0.579930] vgaarb: loaded
  570 13:39:44.657284  <6>[    0.583689] clocksource: Switched to clocksource dmtimer
  571 13:39:44.681835  <6>[    0.610628] NET: Registered PF_INET protocol family
  572 13:39:44.692974  <6>[    0.616326] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)
  573 13:39:44.699105  <6>[    0.625166] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
  574 13:39:44.711741  <6>[    0.634095] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
  575 13:39:44.720240  <6>[    0.642337] TCP established hash table entries: 4096 (order: 2, 16384 bytes, linear)
  576 13:39:44.726357  <6>[    0.650624] TCP bind hash table entries: 4096 (order: 4, 65536 bytes, linear)
  577 13:39:44.732770  <6>[    0.658343] TCP: Hash tables configured (established 4096 bind 4096)
  578 13:39:44.741400  <6>[    0.665271] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
  579 13:39:44.747513  <6>[    0.672282] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
  580 13:39:44.753023  <6>[    0.679891] NET: Registered PF_UNIX/PF_LOCAL protocol family
  581 13:39:44.839716  <6>[    0.763443] RPC: Registered named UNIX socket transport module.
  582 13:39:44.840102  <6>[    0.769880] RPC: Registered udp transport module.
  583 13:39:44.845839  <6>[    0.775009] RPC: Registered tcp transport module.
  584 13:39:44.853209  <6>[    0.780115] RPC: Registered tcp-with-tls transport module.
  585 13:39:44.859494  <6>[    0.786039] RPC: Registered tcp NFSv4.1 backchannel transport module.
  586 13:39:44.866785  <6>[    0.792946] PCI: CLS 0 bytes, default 64
  587 13:39:44.869152  <5>[    0.798736] Initialise system trusted keyrings
  588 13:39:44.892238  <6>[    0.818789] Trying to unpack rootfs image as initramfs...
  589 13:39:44.971194  <6>[    0.894350] workingset: timestamp_bits=30 max_order=17 bucket_order=0
  590 13:39:44.975476  <6>[    0.901851] squashfs: version 4.0 (2009/01/31) Phillip Lougher
  591 13:39:45.014614  <5>[    0.944194] NFS: Registering the id_resolver key type
  592 13:39:45.020681  <5>[    0.949794] Key type id_resolver registered
  593 13:39:45.025739  <5>[    0.954479] Key type id_legacy registered
  594 13:39:45.034373  <6>[    0.958922] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
  595 13:39:45.041104  <6>[    0.966124] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
  596 13:39:45.111091  <5>[    1.040981] Key type asymmetric registered
  597 13:39:45.117242  <5>[    1.045556] Asymmetric key parser 'x509' registered
  598 13:39:45.125563  <6>[    1.050985] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
  599 13:39:45.130622  <6>[    1.058907] io scheduler mq-deadline registered
  600 13:39:45.136709  <6>[    1.063872] io scheduler kyber registered
  601 13:39:45.141022  <6>[    1.068327] io scheduler bfq registered
  602 13:39:45.244495  <6>[    1.170071] ledtrig-cpu: registered to indicate activity on CPUs
  603 13:39:45.537790  <6>[    1.462890] Serial: 8250/16550 driver, 5 ports, IRQ sharing enabled
  604 13:39:45.578695  <6>[    1.508899] msm_serial: driver initialized
  605 13:39:45.585010  <6>[    1.513850] SuperH (H)SCI(F) driver initialized
  606 13:39:45.591165  <6>[    1.519008] STMicroelectronics ASC driver initialized
  607 13:39:45.596775  <6>[    1.524662] STM32 USART driver initialized
  608 13:39:45.739830  <6>[    1.668776] brd: module loaded
  609 13:39:45.761547  <6>[    1.690553] loop: module loaded
  610 13:39:45.802707  <6>[    1.731420] CAN device driver interface
  611 13:39:45.808821  <6>[    1.736716] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded
  612 13:39:45.814930  <6>[    1.743800] e1000e: Intel(R) PRO/1000 Network Driver
  613 13:39:45.821002  <6>[    1.749187] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
  614 13:39:45.826096  <6>[    1.755628] igb: Intel(R) Gigabit Ethernet Network Driver
  615 13:39:45.834101  <6>[    1.761449] igb: Copyright (c) 2007-2014 Intel Corporation.
  616 13:39:45.847856  <6>[    1.770920] pegasus: Pegasus/Pegasus II USB Ethernet driver
  617 13:39:45.852669  <6>[    1.777083] usbcore: registered new interface driver pegasus
  618 13:39:45.855043  <6>[    1.783207] usbcore: registered new interface driver asix
  619 13:39:45.860235  <6>[    1.789090] usbcore: registered new interface driver ax88179_178a
  620 13:39:45.866240  <6>[    1.795677] usbcore: registered new interface driver cdc_ether
  621 13:39:45.875890  <6>[    1.801975] usbcore: registered new interface driver smsc75xx
  622 13:39:45.880966  <6>[    1.808211] usbcore: registered new interface driver smsc95xx
  623 13:39:45.887055  <6>[    1.814444] usbcore: registered new interface driver net1080
  624 13:39:45.893162  <6>[    1.820562] usbcore: registered new interface driver cdc_subset
  625 13:39:45.901949  <6>[    1.826973] usbcore: registered new interface driver zaurus
  626 13:39:45.906208  <6>[    1.833021] usbcore: registered new interface driver cdc_ncm
  627 13:39:45.916875  <6>[    1.842677] usbcore: registered new interface driver usb-storage
  628 13:39:46.207950  <6>[    2.136182] i2c_dev: i2c /dev entries driver
  629 13:39:46.259491  <5>[    2.180833] cpuidle: enable-method property 'ti,am3352' found operations
  630 13:39:46.265474  <6>[    2.190467] sdhci: Secure Digital Host Controller Interface driver
  631 13:39:46.271863  <6>[    2.197239] sdhci: Copyright(c) Pierre Ossman
  632 13:39:46.279195  <6>[    2.203846] Synopsys Designware Multimedia Card Interface Driver
  633 13:39:46.285984  <6>[    2.211771] sdhci-pltfm: SDHCI platform and OF driver helper
  634 13:39:46.423806  <6>[    2.345391] usbcore: registered new interface driver usbhid
  635 13:39:46.424193  <6>[    2.351430] usbhid: USB HID core driver
  636 13:39:46.473191  <6>[    2.400954] NET: Registered PF_INET6 protocol family
  637 13:39:46.504838  <6>[    2.434808] Segment Routing with IPv6
  638 13:39:46.511115  <6>[    2.438957] In-situ OAM (IOAM) with IPv6
  639 13:39:46.517178  <6>[    2.443352] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
  640 13:39:46.524569  <6>[    2.450736] NET: Registered PF_PACKET protocol family
  641 13:39:46.530649  <6>[    2.456288] can: controller area network core
  642 13:39:46.536830  <6>[    2.461111] NET: Registered PF_CAN protocol family
  643 13:39:46.537216  <6>[    2.466336] can: raw protocol
  644 13:39:46.540301  <6>[    2.469662] can: broadcast manager protocol
  645 13:39:46.546545  <6>[    2.474261] can: netlink gateway - max_hops=1
  646 13:39:46.552849  <5>[    2.479737] Key type dns_resolver registered
  647 13:39:46.558926  <6>[    2.484807] ThumbEE CPU extension supported.
  648 13:39:46.561242  <5>[    2.489497] Registering SWP/SWPB emulation handler
  649 13:39:46.569410  <3>[    2.495235] omap_voltage_late_init: Voltage driver support not added
  650 13:39:46.756047  <5>[    2.684237] Loading compiled-in X.509 certificates
  651 13:39:46.885554  <6>[    2.802185] platform 44e10800.pinmux: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/clkout2-pins
  652 13:39:46.892239  <6>[    2.818850] pinctrl-single 44e10800.pinmux: 142 pins, size 568
  653 13:39:46.919094  <3>[    2.842485] ti-sysc 44e31000.target-module: probe with driver ti-sysc failed with error -16
  654 13:39:47.129492  <3>[    3.053311] ti-sysc 48040000.target-module: probe with driver ti-sysc failed with error -16
  655 13:39:47.326655  <6>[    3.254467] OMAP GPIO hardware version 0.1
  656 13:39:47.347819  <6>[    3.273070] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
  657 13:39:47.439706  <4>[    3.365353] at24 2-0054: supply vcc not found, using dummy regulator
  658 13:39:47.477944  <4>[    3.402742] at24 2-0055: supply vcc not found, using dummy regulator
  659 13:39:47.511822  <4>[    3.438668] at24 2-0056: supply vcc not found, using dummy regulator
  660 13:39:47.552124  <4>[    3.477965] at24 2-0057: supply vcc not found, using dummy regulator
  661 13:39:47.589178  <6>[    3.516437] omap_i2c 4819c000.i2c: bus 2 rev0.11 at 100 kHz
  662 13:39:47.667728  <3>[    3.590217] 48000000.interconnect:segment@200000:target-module@0:mpu@0:fck: device ID is greater than 24
  663 13:39:47.693079  <6>[    3.611029] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
  664 13:39:47.714129  <4>[    3.637060] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
  665 13:39:47.721066  <4>[    3.646292] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
  666 13:39:47.838218  <6>[    3.764138] omap_rng 48310000.rng: Random Number Generator ver. 20
  667 13:39:47.861045  <5>[    3.790453] random: crng init done
  668 13:39:47.904204  <6>[    3.834006] Freeing initrd memory: 14452K
  669 13:39:47.914668  <6>[    3.838743] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1000000
  670 13:39:47.961880  <6>[    3.886154] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver SMSC LAN8710/LAN8720
  671 13:39:47.967996  <6>[    3.896501] cpsw-switch 4a100000.switch: initialized cpsw ale version 1.4
  672 13:39:47.976587  <6>[    3.903879] cpsw-switch 4a100000.switch: ALE Table size 1024, Policers 0
  673 13:39:47.987512  <6>[    3.911332] cpsw-switch 4a100000.switch: cpts: overflow check period 500 (jiffies)
  674 13:39:47.996211  <6>[    3.919461] cpsw-switch 4a100000.switch: CPTS: ref_clk_freq:250000000 calc_mult:2147483648 calc_shift:29 error:0 nsec/sec
  675 13:39:48.009756  <6>[    3.931099] cpsw-switch 4a100000.switch: Detected MACID = 34:03:de:5e:2c:05
  676 13:39:48.018877  <5>[    3.940120] cpsw-switch 4a100000.switch: initialized (regs 0x4a100000, pool size 256) hw_ver:0019010C 1.12 (0)
  677 13:39:48.044879  <3>[    3.969875] debugfs: Directory '49000000.dma' with parent 'dmaengine' already present!
  678 13:39:48.051684  <6>[    3.978463] edma 49000000.dma: TI EDMA DMA engine driver
  679 13:39:48.121784  <3>[    4.045816] target-module@4b000000:target-module@140000:pmu@0:fck: device ID is greater than 24
  680 13:39:48.137006  <6>[    4.060162] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 (8000000f) counters available
  681 13:39:48.150623  <3>[    4.077253] l3-aon-clkctrl:0000:0: failed to disable
  682 13:39:48.203128  <6>[    4.127323] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 36, base_baud = 3000000) is a 8250
  683 13:39:48.209240  <6>[    4.136827] printk: legacy console [ttyS0] enabled
  684 13:39:48.216575  <6>[    4.136827] printk: legacy console [ttyS0] enabled
  685 13:39:48.222752  <6>[    4.147158] printk: legacy bootconsole [omap8250] disabled
  686 13:39:48.226991  <6>[    4.147158] printk: legacy bootconsole [omap8250] disabled
  687 13:39:48.261870  <4>[    4.184435] tps65217-pmic: Failed to locate of_node [id: -1]
  688 13:39:48.265101  <4>[    4.191819] tps65217-bl: Failed to locate of_node [id: -1]
  689 13:39:48.280769  <6>[    4.211422] tps65217 0-0024: TPS65217 ID 0xe version 1.2
  690 13:39:48.299380  <6>[    4.218356] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
  691 13:39:48.311753  <6>[    4.232036] i2c 0-0070: Fixed dependency cycle(s) with /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
  692 13:39:48.317193  <6>[    4.243922] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
  693 13:39:48.339332  <6>[    4.263513] omap_gpio 44e07000.gpio: Could not set line 6 debounce to 200000 microseconds (-22)
  694 13:39:48.345506  <6>[    4.272707] sdhci-omap 48060000.mmc: Got CD GPIO
  695 13:39:48.353442  <4>[    4.277872] sdhci-omap 48060000.mmc: supply pbias not found, using dummy regulator
  696 13:39:48.367876  <4>[    4.291498] sdhci-omap 48060000.mmc: supply vqmmc not found, using dummy regulator
  697 13:39:48.374011  <4>[    4.300149] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
  698 13:39:48.384443  <4>[    4.308793] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
  699 13:39:48.457299  <6>[    4.382664] at24 0-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
  700 13:39:48.494564  <6>[    4.418644] mmc1: SDHCI controller on 481d8000.mmc [481d8000.mmc] using External DMA
  701 13:39:48.517755  <6>[    4.440775] mmc0: SDHCI controller on 48060000.mmc [48060000.mmc] using External DMA
  702 13:39:48.524447  <6>[    4.449721] cpsw-switch 4a100000.switch: starting ndev. mode: dual_mac
  703 13:39:48.593994  <6>[    4.514128] mmc1: new high speed MMC card at address 0001
  704 13:39:48.594376  <6>[    4.522620] mmcblk1: mmc1:0001 M62704 3.56 GiB
  705 13:39:48.605875  <6>[    4.533114]  mmcblk1: p1
  706 13:39:48.610117  <6>[    4.538006] mmcblk1boot0: mmc1:0001 M62704 2.00 MiB
  707 13:39:48.621625  <6>[    4.548591] mmcblk1boot1: mmc1:0001 M62704 2.00 MiB
  708 13:39:48.632664  <6>[    4.558949] mmcblk1rpmb: mmc1:0001 M62704 512 KiB, chardev (236:0)
  709 13:39:48.646743  <6>[    4.567841] SMSC LAN8710/LAN8720 4a101000.mdio:00: attached PHY driver (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
  710 13:39:50.750567  <6>[    6.674739] cpsw-switch 4a100000.switch eth0: Link is Up - 100Mbps/Full - flow control off
  711 13:39:50.853967  <5>[    6.703708] Sending DHCP requests ., OK
  712 13:39:50.864963  <6>[    6.788201] IP-Config: Got DHCP answer from 172.16.3.3, my address is 172.16.3.206
  713 13:39:50.865346  <6>[    6.796282] IP-Config: Complete:
  714 13:39:50.879608  <6>[    6.799821]      device=eth0, hwaddr=34:03:de:5e:2c:05, ipaddr=172.16.3.206, mask=255.255.255.0, gw=172.16.3.3
  715 13:39:50.884451  <6>[    6.810268]      host=172.16.3.206, domain=denx.de, nis-domain=(none)
  716 13:39:50.889414  <6>[    6.817090]      bootserver=172.16.3.33, rootserver=172.16.3.3, rootpath=
  717 13:39:50.894449  <6>[    6.817124]      nameserver0=172.16.3.3
  718 13:39:50.901713  <6>[    6.828427]      ntpserver0=172.16.3.3
  719 13:39:50.907774  <6>[    6.833881] clk: Disabling unused clocks
  720 13:39:50.910062  <6>[    6.838488] PM: genpd: Disabling unused power domains
  721 13:39:50.929931  <6>[    6.856897] Freeing unused kernel image (initmem) memory: 2048K
  722 13:39:50.937031  <6>[    6.866603] Run /init as init process
  723 13:39:50.960678  Loading, please wait...
  724 13:39:51.036389  Starting systemd-udevd version 252.22-1~deb12u1
  725 13:39:54.114582  <4>[   10.036765] am335x-phy-driver 47401300.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
  726 13:39:54.271690  <4>[   10.193857] am335x-phy-driver 47401b00.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
  727 13:39:54.434154  <6>[   10.365095] musb-hdrc musb-hdrc.1: MUSB HDRC host driver
  728 13:39:54.445857  <6>[   10.370768] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1
  729 13:39:54.628285  <6>[   10.556693] tda998x 0-0070: found TDA19988
  730 13:39:54.714596  <6>[   10.644260] hub 1-0:1.0: USB hub found
  731 13:39:54.753415  <6>[   10.682115] hub 1-0:1.0: 1 port detected
  732 13:39:57.528175  Begin: Loading essential drivers ... done.
  733 13:39:57.534064  Begin: Running /scripts/init-premount ... done.
  734 13:39:57.538890  Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
  735 13:39:57.549378  Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
  736 13:39:57.557627  Device /sys/class/net/eth0 found
  737 13:39:57.557781  done.
  738 13:39:57.617037  Begin: Waiting up to 180 secs for any network device to become available ... done.
  739 13:39:57.686800  IP-Config: eth0 hardware address 34:03:de:5e:2c:05 mtu 1500 DHCP
  740 13:39:57.736471  IP-Config: eth0 complete (dhcp from 172.16.3.3):
  741 13:39:57.748564   address: 172.16.3.206     broadcast: 172.16.3.255     netmask: 255.255.255.0   
  742 13:39:57.752133   gateway: 172.16.3.3       dns0     : 172.16.3.3       dns1   : 0.0.0.0         
  743 13:39:57.757163   domain : denx.de                                                         
  744 13:39:57.763286   rootserver: 172.16.3.33 rootpath: 
  745 13:39:57.767579   filename  : this-host-is-not-configured.kpxe
  746 13:39:57.803878  done.
  747 13:39:57.814703  Begin: Running /scripts/nfs-bottom ... done.
  748 13:39:57.889937  Begin: Running /scripts/init-bottom ... done.
  749 13:39:59.273660  <30>[   15.199445] systemd[1]: System time before build time, advancing clock.
  750 13:39:59.455256  <30>[   15.355049] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
  751 13:39:59.463713  <30>[   15.392335] systemd[1]: Detected architecture arm.
  752 13:39:59.477389  
  753 13:39:59.477775  Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
  754 13:39:59.478088  
  755 13:39:59.505982  <30>[   15.433468] systemd[1]: Hostname set to <debian-bookworm-armhf>.
  756 13:40:01.833236  <30>[   17.759188] systemd[1]: Queued start job for default target graphical.target.
  757 13:40:01.850226  <30>[   17.774237] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
  758 13:40:01.858167  [[0;32m  OK  [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
  759 13:40:01.883555  <30>[   17.807157] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
  760 13:40:01.890617  [[0;32m  OK  [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
  761 13:40:01.912855  <30>[   17.837035] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
  762 13:40:01.921062  [[0;32m  OK  [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
  763 13:40:01.942228  <30>[   17.865902] systemd[1]: Created slice user.slice - User and Session Slice.
  764 13:40:01.947860  [[0;32m  OK  [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
  765 13:40:01.975973  <30>[   17.895017] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
  766 13:40:01.979794  [[0;32m  OK  [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
  767 13:40:02.001911  <30>[   17.924864] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
  768 13:40:02.012358  [[0;32m  OK  [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
  769 13:40:02.038831  <30>[   17.954717] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
  770 13:40:02.051272  <30>[   17.975235] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
  771 13:40:02.055746           Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
  772 13:40:02.079886  <30>[   18.004197] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
  773 13:40:02.088137  [[0;32m  OK  [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
  774 13:40:02.110284  <30>[   18.034546] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
  775 13:40:02.118774  [[0;32m  OK  [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
  776 13:40:02.140901  <30>[   18.064721] systemd[1]: Reached target paths.target - Path Units.
  777 13:40:02.145119  [[0;32m  OK  [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
  778 13:40:02.170270  <30>[   18.094365] systemd[1]: Reached target remote-fs.target - Remote File Systems.
  779 13:40:02.177086  [[0;32m  OK  [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
  780 13:40:02.201290  <30>[   18.125198] systemd[1]: Reached target slices.target - Slice Units.
  781 13:40:02.206891  [[0;32m  OK  [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
  782 13:40:02.230015  <30>[   18.154410] systemd[1]: Reached target swap.target - Swaps.
  783 13:40:02.234248  [[0;32m  OK  [0m] Reached target [0;1;39mswap.target[0m - Swaps.
  784 13:40:02.261909  <30>[   18.184380] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
  785 13:40:02.270033  [[0;32m  OK  [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
  786 13:40:02.290767  <30>[   18.215314] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
  787 13:40:02.299146  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
  788 13:40:02.385315  <30>[   18.305015] systemd[1]: systemd-journald-audit.socket - Journal Audit Socket was skipped because of an unmet condition check (ConditionSecurity=audit).
  789 13:40:02.398038  <30>[   18.322762] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
  790 13:40:02.408528  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
  791 13:40:02.431827  <30>[   18.357952] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
  792 13:40:02.444894  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
  793 13:40:02.473665  <30>[   18.396906] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
  794 13:40:02.481057  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
  795 13:40:02.516901  <30>[   18.441873] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
  796 13:40:02.530159  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
  797 13:40:02.552378  <30>[   18.475668] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
  798 13:40:02.559365  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
  799 13:40:02.586665  <30>[   18.505445] systemd[1]: dev-hugepages.mount - Huge Pages File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/mm/hugepages).
  800 13:40:02.604351  <30>[   18.522103] systemd[1]: dev-mqueue.mount - POSIX Message Queue File System was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/mqueue).
  801 13:40:02.654375  <30>[   18.579146] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
  802 13:40:02.681024           Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
  803 13:40:02.740316  <30>[   18.664904] systemd[1]: Mounting sys-kernel-tracing.mount - Kernel Trace File System...
  804 13:40:02.764854           Mounting [0;1;39msys-kernel-tracin…[0m - Kernel Trace File System...
  805 13:40:02.823396  <30>[   18.747173] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
  806 13:40:02.836156           Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
  807 13:40:02.902940  <30>[   18.828064] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
  808 13:40:02.921162           Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
  809 13:40:02.980599  <30>[   18.905549] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
  810 13:40:03.001958           Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
  811 13:40:03.050807  <30>[   18.975559] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
  812 13:40:03.073118           Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
  813 13:40:03.134891  <30>[   19.058027] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
  814 13:40:03.152015           Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
  815 13:40:03.210325  <30>[   19.135588] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
  816 13:40:03.230825           Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
  817 13:40:03.281928  <30>[   19.207056] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
  818 13:40:03.308894           Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
  819 13:40:03.335738  <28>[   19.256042] systemd[1]: systemd-journald.service: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
  820 13:40:03.345121  <28>[   19.269576] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
  821 13:40:03.389808  <30>[   19.315068] systemd[1]: Starting systemd-journald.service - Journal Service...
  822 13:40:03.400561           Starting [0;1;39msystemd-journald.service[0m - Journal Service...
  823 13:40:03.480077  <30>[   19.405530] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
  824 13:40:03.502368           Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
  825 13:40:03.551019  <30>[   19.476711] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
  826 13:40:03.590293           Starting [0;1;39msystemd-network-g… units from Kernel command line...
  827 13:40:03.651097  <30>[   19.575187] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
  828 13:40:03.691379           Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
  829 13:40:03.762616  <30>[   19.686967] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
  830 13:40:03.820917           Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
  831 13:40:03.867892  <30>[   19.793194] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
  832 13:40:03.953768  [[0;32m  OK  [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
  833 13:40:03.970979  <30>[   19.895883] systemd[1]: Mounted sys-kernel-tracing.mount - Kernel Trace File System.
  834 13:40:03.991282  [[0;32m  OK  [0m] Mounted [0;1;39msys-kernel-tracing…nt[0m - Kernel Trace File System.
  835 13:40:04.013910  <30>[   19.937920] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
  836 13:40:04.053226  [[0;32m  OK  [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
  837 13:40:04.171886  <30>[   20.097642] systemd[1]: modprobe@configfs.service: Deactivated successfully.
  838 13:40:04.211595  <30>[   20.135602] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
  839 13:40:04.240619  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
  840 13:40:04.270382  <30>[   20.196493] systemd[1]: modprobe@dm_mod.service: Deactivated successfully.
  841 13:40:04.297170  <30>[   20.222087] systemd[1]: Finished modprobe@dm_mod.service - Load Kernel Module dm_mod.
  842 13:40:04.327037  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
  843 13:40:04.351148  <30>[   20.275561] systemd[1]: Started systemd-journald.service - Journal Service.
  844 13:40:04.358009  [[0;32m  OK  [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
  845 13:40:04.401754  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
  846 13:40:04.430762  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
  847 13:40:04.464877  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
  848 13:40:04.501090  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
  849 13:40:04.529899  [[0;32m  OK  [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
  850 13:40:04.552277  [[0;32m  OK  [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
  851 13:40:04.580075  [[0;32m  OK  [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
  852 13:40:04.609920  [[0;32m  OK  [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
  853 13:40:04.658865           Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
  854 13:40:04.704419           Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
  855 13:40:04.761495           Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
  856 13:40:04.844033           Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
  857 13:40:04.922279           Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
  858 13:40:05.077971  [[0;32m  OK  [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
  859 13:40:05.121516  <46>[   21.046398] systemd-journald[162]: Received client request to flush runtime journal.
  860 13:40:05.280080  [[0;32m  OK  [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
  861 13:40:05.339491  [[0;32m  OK  [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
  862 13:40:05.402060           Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
  863 13:40:05.462683  [[0;32m  OK  [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
  864 13:40:06.372567  [[0;32m  OK  [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
  865 13:40:06.378687  [[0;32m  OK  [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
  866 13:40:06.410389  [[0;32m  OK  [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
  867 13:40:06.678646           Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
  868 13:40:07.240635  [[0;32m  OK  [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
  869 13:40:07.288145           Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
  870 13:40:07.724455  [[0;32m  OK  [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
  871 13:40:07.800748           Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
  872 13:40:09.296695  <5>[   25.222272] cfg80211: Loading compiled-in X.509 certificates for regulatory database
  873 13:40:09.910226  [[0m[0;31m*     [0m] (1 of 4) Job systemd-networkd.service/start running (8s / 1min 35s)
  874 13:40:10.328835  M[K[[0;1;31m*[0m[0;31m*    [0m] (1 of 4) Job systemd-networkd.service/start running (8s / 1min 35s)
  875 13:40:10.668278  M[K[[0;32m  OK  [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
  876 13:40:10.686737  [K[[0;32m  OK  [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
  877 13:40:10.901166  <5>[   26.829031] Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
  878 13:40:11.013052  <5>[   26.935989] Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
  879 13:40:11.019279  <4>[   26.946170] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
  880 13:40:11.027409  <6>[   26.955288] cfg80211: failed to load regulatory.db
  881 13:40:11.346200  [[0;32m  OK  [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
  882 13:40:12.391152  [[0;32m  OK  [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
  883 13:40:20.562624  [[0;32m  OK  [0m] Reached target [0;1;39mnetwork.target[0m - Network.
  884 13:40:20.591704  [[0;32m  OK  [0m] Reached target [0;1;39musb-gadget.…m - Hardware activated USB gadget.
  885 13:40:20.611159  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
  886 13:40:20.671591           Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
  887 13:40:20.708687           Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
  888 13:40:20.748916           Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
  889 13:40:20.811649           Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
  890 13:40:21.703763           Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
  891 13:40:21.740826           Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
  892 13:40:21.780397  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
  893 13:40:21.809432  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
  894 13:40:21.849616  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
  895 13:40:21.878464  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
  896 13:40:22.113184  [[0;32m  OK  [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
  897 13:40:22.749753  [[0;32m  OK  [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
  898 13:40:22.771142  [[0;32m  OK  [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
  899 13:40:22.791520  [[0;32m  OK  [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
  900 13:40:22.818946  [[0;32m  OK  [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
  901 13:40:23.045148  [[0;32m  OK  [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
  902 13:40:23.204171  [[0;32m  OK  [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
  903 13:40:23.242554  [[0;32m  OK  [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
  904 13:40:23.407503  [[0;32m  OK  [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
  905 13:40:23.553478  [[0;32m  OK  [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
  906 13:40:23.582011  [[0;32m  OK  [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
  907 13:40:23.624503  [[0;32m  OK  [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
  908 13:40:23.636300  [[0;32m  OK  [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
  909 13:40:23.658850  [[0;32m  OK  [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
  910 13:40:23.728769           Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
  911 13:40:23.825984           Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
  912 13:40:24.108883           Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
  913 13:40:24.328587           Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
  914 13:40:24.362637           Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
  915 13:40:24.388059  [[0;32m  OK  [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
  916 13:40:24.491752  [[0;32m  OK  [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
  917 13:40:24.535329  [[0;32m  OK  [0m] Reached target [0;1;39msound.target[0m - Sound Card.
  918 13:40:24.608580  [[0;32m  OK  [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
  919 13:40:24.659562  [[0;32m  OK  [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
  920 13:40:24.689581  [[0;32m  OK  [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
  921 13:40:24.709931  [[0;32m  OK  [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
  922 13:40:24.957904           Starting [0;1;39msystemd-hostnamed.service[0m - Hostname Service...
  923 13:40:25.112600  [[0;32m  OK  [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
  924 13:40:25.229122  [[0;32m  OK  [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
  925 13:40:25.282806  [[0;32m  OK  [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
  926 13:40:25.320747  [[0;32m  OK  [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
  927 13:40:25.403714           Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
  928 13:40:25.758817  [[0;32m  OK  [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
  929 13:40:25.938622  [[0;32m  OK  [0m] Started [0;1;39msystemd-hostnamed.service[0m - Hostname Service.
  930 13:40:26.194111  
  931 13:40:26.198328  Debian GNU/Linux 12 debiadebian-bookworm-armhf login: root (automatic login)
  932 13:40:26.198780  
  933 13:40:26.549771  Linux debian-bookworm-armhf 6.12.0-rc5 #1 SMP Sun Nov  3 13:16:53 UTC 2024 armv7l
  934 13:40:26.550238  
  935 13:40:26.555997  The programs included with the Debian GNU/Linux system are free software;
  936 13:40:26.564622  the exact distribution terms for each program are described in the
  937 13:40:26.565059  individual files in /usr/share/doc/*/copyright.
  938 13:40:26.565373  
  939 13:40:26.569491  Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
  940 13:40:26.574930  permitted by applicable law.
  941 13:40:31.356198  Unable to match end of the kernel message
  943 13:40:31.357071  Setting prompt string to ['/ #']
  944 13:40:31.357484  end: 2.4.4.1 login-action (duration 00:00:48) [common]
  946 13:40:31.358429  end: 2.4.4 auto-login-action (duration 00:00:49) [common]
  947 13:40:31.358834  start: 2.4.5 expect-shell-connection (timeout 00:03:11) [common]
  948 13:40:31.359181  Setting prompt string to ['/ #']
  949 13:40:31.359477  Forcing a shell prompt, looking for ['/ #']
  951 13:40:31.410244  / # 
  952 13:40:31.410751  expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
  953 13:40:31.411115  Waiting using forced prompt support (timeout 00:02:30)
  954 13:40:31.417956  
  955 13:40:31.423900  end: 2.4.5 expect-shell-connection (duration 00:00:00) [common]
  956 13:40:31.424371  start: 2.4.6 export-device-env (timeout 00:03:11) [common]
  957 13:40:31.424741  Sending with 10 millisecond of delay
  959 13:40:36.478422  / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k'
  960 13:40:36.489133  export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1215563/extract-nfsrootfs-q2to3c2k'
  961 13:40:36.492670  Sending with 10 millisecond of delay
  963 13:40:38.531488  / # export NFS_SERVER_IP='172.16.3.3'
  964 13:40:38.541927  export NFS_SERVER_IP='172.16.3.3'
  965 13:40:38.545256  end: 2.4.6 export-device-env (duration 00:00:07) [common]
  966 13:40:38.545451  end: 2.4 uboot-commands (duration 00:01:56) [common]
  967 13:40:38.545636  end: 2 uboot-action (duration 00:01:56) [common]
  968 13:40:38.545815  start: 3 lava-test-retry (timeout 00:06:49) [common]
  969 13:40:38.545993  start: 3.1 lava-test-shell (timeout 00:06:49) [common]
  970 13:40:38.546135  Using namespace: common
  972 13:40:38.646570  / # #
  973 13:40:38.646833  lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
  974 13:40:38.653280  #
  975 13:40:38.659061  Using /lava-1215563
  977 13:40:38.759526  / # export SHELL=/bin/bash
  978 13:40:38.766672  export SHELL=/bin/bash
  980 13:40:38.873841  / # . /lava-1215563/environment
  981 13:40:38.880309  . /lava-1215563/environment
  983 13:40:38.992915  / # /lava-1215563/bin/lava-test-runner /lava-1215563/0
  984 13:40:38.993463  Test shell timeout: 10s (minimum of the action and connection timeout)
  985 13:40:39.000235  /lava-1215563/bin/lava-test-runner /lava-1215563/0
  986 13:40:39.639180  + export TESTRUN_ID=0_timesync-off
  987 13:40:39.647159  + TESTRUN_ID=0_timesync-off
  988 13:40:39.647548  + cd /lava-1215563/0/tests/0_timesync-off
  989 13:40:39.647883  ++ cat uuid
  990 13:40:39.667358  + UUID=1215563_1.6.2.4.1
  991 13:40:39.667744  + set +x
  992 13:40:39.672526  <LAVA_SIGNAL_STARTRUN 0_timesync-off 1215563_1.6.2.4.1>
  993 13:40:39.673201  Received signal: <STARTRUN> 0_timesync-off 1215563_1.6.2.4.1
  994 13:40:39.673623  Starting test lava.0_timesync-off (1215563_1.6.2.4.1)
  995 13:40:39.674029  Skipping test definition patterns.
  996 13:40:39.675703  + systemctl stop systemd-timesyncd
  997 13:40:39.973261  + set +x
  998 13:40:39.974026  Received signal: <ENDRUN> 0_timesync-off 1215563_1.6.2.4.1
  999 13:40:39.974400  Ending use of test pattern.
 1000 13:40:39.974709  Ending test lava.0_timesync-off (1215563_1.6.2.4.1), duration 0.30
 1002 13:40:39.976417  <LAVA_SIGNAL_ENDRUN 0_timesync-off 1215563_1.6.2.4.1>
 1003 13:40:40.314385  + export TESTRUN_ID=1_kselftest-dt
 1004 13:40:40.322503  + TESTRUN_ID=1_kselftest-dt
 1005 13:40:40.322892  + cd /lava-1215563/0/tests/1_kselftest-dt
 1006 13:40:40.323272  ++ cat uuid
 1007 13:40:40.344902  + UUID=1215563_1.6.2.4.5
 1008 13:40:40.345291  + set +x
 1009 13:40:40.351389  <LAVA_SIGNAL_STARTRUN 1_kselftest-dt 1215563_1.6.2.4.5>
 1010 13:40:40.351776  + cd ./automated/linux/kselftest/
 1011 13:40:40.352397  Received signal: <STARTRUN> 1_kselftest-dt 1215563_1.6.2.4.5
 1012 13:40:40.352764  Starting test lava.1_kselftest-dt (1215563_1.6.2.4.5)
 1013 13:40:40.353159  Skipping test definition patterns.
 1014 13:40:40.379094  + ./kselftest.sh -c dt -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-03-v6.12-rc5/arm/multi_v7_defconfig/gcc-12/kselftest.tar.xz -L '' -S /dev/null -b beaglebone-black -g renesas -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
 1015 13:40:40.587453  INFO: install_deps skipped
 1016 13:40:41.794688  --2024-01-26 21:49:18--  http://storage.kernelci.org/renesas/master/renesas-devel-2024-11-03-v6.12-rc5/arm/multi_v7_defconfig/gcc-12/kselftest.tar.xz
 1017 13:40:41.847420  Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
 1018 13:40:42.007819  Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
 1019 13:40:42.163928  HTTP request sent, awaiting response... 200 OK
 1020 13:40:42.164323  Length: 4104032 (3.9M) [application/octet-stream]
 1021 13:40:42.170220  Saving to: 'kselftest_armhf.tar.gz'
 1022 13:40:42.170610  
 1023 13:40:44.666285  kselftest_armhf.tar   0%[                    ]       0  --.-KB/s               kselftest_armhf.tar   1%[                    ]  44.73K   145KB/s               kselftest_armhf.tar   5%[>                   ] 218.67K   352KB/s               kselftest_armhf.tar  16%[==>                 ] 650.39K   551KB/s               kselftest_armhf.tar  34%[=====>              ]   1.33M   985KB/s               kselftest_armhf.tar  54%[=========>          ]   2.14M  1.34MB/s               kselftest_armhf.tar  63%[===========>        ]   2.48M  1.38MB/s               kselftest_armhf.tar  72%[=============>      ]   2.84M  1.41MB/s               kselftest_armhf.tar  87%[================>   ]   3.43M  1.55MB/s               kselftest_armhf.tar  97%[==================> ]   3.80M  1.57MB/s               kselftest_armhf.tar 100%[===================>]   3.91M  1.57MB/s    in 2.5s    
 1024 13:40:44.666916  
 1025 13:40:45.243810  2024-01-26 21:49:21 (1.57 MB/s) - 'kselftest_armhf.tar.gz' saved [4104032/4104032]
 1026 13:40:45.244327  
 1027 13:40:45.599395  tar: ./nsfs/pidns: time stamp 2024-11-03 13:26:49 is 24334646.673758703 s in the future
 1028 13:40:45.894302  tar: ./nsfs/config: time stamp 2024-11-03 13:00:01 is 24333038.37755512 s in the future
 1029 13:40:46.253334  tar: ./nsfs/owner: time stamp 2024-11-03 13:26:49 is 24334646.019297203 s in the future
 1030 13:40:46.353837  tar: ./nsfs: time stamp 2024-11-03 13:27:31 is 24334687.917997703 s in the future
 1031 13:40:46.697154  tar: ./cachestat/test_cachestat: time stamp 2024-11-03 13:25:24 is 24334560.575768953 s in the future
 1032 13:40:46.829400  tar: ./cachestat: time stamp 2024-11-03 13:27:23 is 24334679.442912078 s in the future
 1033 13:40:47.140316  tar: ./kselftest/prefix.pl: time stamp 2024-11-03 13:27:22 is 24334678.133589161 s in the future
 1034 13:40:47.431202  tar: ./kselftest/ktap_helpers.sh: time stamp 2024-11-03 13:00:01 is 24333036.842154995 s in the future
 1035 13:40:47.697413  tar: ./kselftest/runner.sh: time stamp 2024-11-03 13:27:22 is 24334677.57568212 s in the future
 1036 13:40:47.957413  tar: ./kselftest/ksft.py: time stamp 2024-11-03 13:27:22 is 24334677.316551995 s in the future
 1037 13:40:48.313623  tar: ./kselftest/module.sh: time stamp 2024-11-03 13:27:22 is 24334676.95795587 s in the future
 1038 13:40:48.459260  tar: ./kselftest: time stamp 2024-11-03 13:00:01 is 24333035.811991828 s in the future
 1039 13:40:48.765786  tar: ./cpufreq/governor.sh: time stamp 2024-11-03 13:00:01 is 24333035.507550745 s in the future
 1040 13:40:49.064767  tar: ./cpufreq/config: time stamp 2024-11-03 13:00:01 is 24333035.20720137 s in the future
 1041 13:40:49.304767  tar: ./cpufreq/cpufreq.sh: time stamp 2024-11-03 13:00:01 is 24333034.968277078 s in the future
 1042 13:40:49.609296  tar: ./cpufreq/special-tests.sh: time stamp 2024-11-03 13:00:01 is 24333034.665064078 s in the future
 1043 13:40:49.916903  tar: ./cpufreq/module.sh: time stamp 2024-11-03 13:00:01 is 24333034.356430494 s in the future
 1044 13:40:50.176775  tar: ./cpufreq/cpu.sh: time stamp 2024-11-03 13:00:01 is 24333034.095884869 s in the future
 1045 13:40:50.466283  tar: ./cpufreq/main.sh: time stamp 2024-11-03 13:00:01 is 24333033.805768994 s in the future
 1046 13:40:50.574135  tar: ./cpufreq: time stamp 2024-11-03 13:27:23 is 24334675.697158619 s in the future
 1047 13:40:50.883180  tar: ./kvm/config: time stamp 2024-11-03 13:00:01 is 24333033.388303744 s in the future
 1048 13:40:51.161568  tar: ./kvm/settings: time stamp 2024-11-03 13:00:01 is 24333033.110587453 s in the future
 1049 13:40:51.317161  tar: ./kvm: time stamp 2024-11-03 13:27:27 is 24334678.955000994 s in the future
 1050 13:40:51.641236  tar: ./size/get_size: time stamp 2024-11-03 13:27:04 is 24334655.630231994 s in the future
 1051 13:40:51.769240  tar: ./size: time stamp 2024-11-03 13:27:33 is 24334684.501606328 s in the future
 1052 13:40:52.133004  tar: ./amd-pstate/gitsource.sh: time stamp 2024-11-03 13:00:01 is 24333032.140206161 s in the future
 1053 13:40:52.425951  tar: ./amd-pstate/run.sh: time stamp 2024-11-03 13:00:01 is 24333031.847197619 s in the future
 1054 13:40:52.669967  tar: ./amd-pstate/basic.sh: time stamp 2024-11-03 13:00:01 is 24333031.602663119 s in the future
 1055 13:40:52.964906  tar: ./amd-pstate/config: time stamp 2024-11-03 13:00:01 is 24333031.308146036 s in the future
 1056 13:40:53.304794  tar: ./amd-pstate/tbench.sh: time stamp 2024-11-03 13:00:01 is 24333030.968374202 s in the future
 1057 13:40:53.444395  tar: ./amd-pstate: time stamp 2024-11-03 13:27:22 is 24334671.826685036 s in the future
 1058 13:40:53.755109  tar: ./pidfd/pidfd_poll_test: time stamp 2024-11-03 13:26:50 is 24334639.518009744 s in the future
 1059 13:40:54.063415  tar: ./pidfd/pidfd_test: time stamp 2024-11-03 13:26:49 is 24334638.209081119 s in the future
 1060 13:40:54.379612  tar: ./pidfd/config: time stamp 2024-11-03 13:00:01 is 24333029.893197827 s in the future
 1061 13:40:54.718298  tar: ./pidfd/pidfd_setns_test: time stamp 2024-11-03 13:26:50 is 24334638.553530744 s in the future
 1062 13:40:54.989903  tar: ./pidfd/pidfd_getfd_test: time stamp 2024-11-03 13:26:50 is 24334638.283165952 s in the future
 1063 13:40:55.231835  tar: ./pidfd/pidfd_wait: time stamp 2024-11-03 13:26:50 is 24334638.040548785 s in the future
 1064 13:40:55.549997  tar: ./pidfd/pidfd_fdinfo_test: time stamp 2024-11-03 13:26:50 is 24334637.723733994 s in the future
 1065 13:40:55.880910  tar: ./pidfd/pidfd_open_test: time stamp 2024-11-03 13:26:50 is 24334637.391582869 s in the future
 1066 13:40:56.037161  tar: ./pidfd: time stamp 2024-11-03 13:27:31 is 24334678.234730202 s in the future
 1067 13:40:56.349833  tar: ./alsa/utimer-test: time stamp 2024-11-03 13:25:24 is 24334550.922643244 s in the future
 1068 13:40:56.666108  tar: ./alsa/pcm-test.conf: time stamp 2024-11-03 13:00:01 is 24333027.606097202 s in the future
 1069 13:40:57.048371  tar: ./alsa/global-timer: time stamp 2024-11-03 13:25:23 is 24334549.223786452 s in the future
 1070 13:40:57.375540  tar: ./alsa/mixer-test: time stamp 2024-11-03 13:25:24 is 24334549.896278327 s in the future
 1071 13:40:57.667432  tar: ./alsa/libatest.so: time stamp 2024-11-03 13:25:23 is 24334548.604712702 s in the future
 1072 13:40:57.999173  tar: ./alsa/test-pcmtest-driver: time stamp 2024-11-03 13:25:24 is 24334549.272921493 s in the future
 1073 13:40:58.307622  tar: ./alsa/pcm-test: time stamp 2024-11-03 13:25:24 is 24334548.964094202 s in the future
 1074 13:40:58.635557  tar: ./alsa/conf.d/Lenovo_ThinkPad_P1_Gen2.conf: time stamp 2024-11-03 13:00:01 is 24333025.638637202 s in the future
 1075 13:40:58.743634  tar: ./alsa/conf.d: time stamp 2024-11-03 13:00:01 is 24333025.528240118 s in the future
 1076 13:40:58.865443  tar: ./alsa: time stamp 2024-11-03 13:27:22 is 24334666.40527641 s in the future
 1077 13:40:59.208620  tar: ./rust/test_probe_samples.sh: time stamp 2024-11-03 13:00:01 is 24333025.064181035 s in the future
 1078 13:40:59.557041  tar: ./rust/config: time stamp 2024-11-03 13:00:01 is 24333024.71527666 s in the future
 1079 13:40:59.691254  tar: ./rust: time stamp 2024-11-03 13:27:33 is 24334676.579526243 s in the future
 1080 13:41:00.090991  tar: ./capabilities/test_execve: time stamp 2024-11-03 13:25:25 is 24334548.181370035 s in the future
 1081 13:41:00.429990  tar: ./capabilities/validate_cap: time stamp 2024-11-03 13:25:25 is 24334547.843204452 s in the future
 1082 13:41:00.578992  tar: ./capabilities: time stamp 2024-11-03 13:27:23 is 24334665.69282266 s in the future
 1083 13:41:00.922579  tar: ./net/net_helper.sh: time stamp 2024-11-03 13:00:01 is 24333023.349812868 s in the future
 1084 13:41:01.225607  tar: ./net/lib.sh: time stamp 2024-11-03 13:00:01 is 24333023.049480451 s in the future
 1085 13:41:01.513252  tar: ./net/netfilter/nft_tproxy_tcp.sh: time stamp 2024-11-03 13:00:01 is 24333022.76113441 s in the future
 1086 13:41:01.907476  tar: ./net/netfilter/nf_nat_edemux.sh: time stamp 2024-11-03 13:00:01 is 24333022.36527891 s in the future
 1087 13:41:02.175015  tar: ./net/netfilter/conntrack_sctp_collision.sh: time stamp 2024-11-03 13:00:01 is 24333022.099338868 s in the future
 1088 13:41:02.492030  tar: ./net/netfilter/audit_logread: time stamp 2024-11-03 13:26:37 is 24334617.781253993 s in the future
 1089 13:41:02.744912  tar: ./net/netfilter/br_netfilter.sh: time stamp 2024-11-03 13:00:01 is 24333021.527808118 s in the future
 1090 13:41:03.014412  tar: ./net/netfilter/conntrack_icmp_related.sh: time stamp 2024-11-03 13:00:01 is 24333021.259646035 s in the future
 1091 13:41:03.304959  tar: ./net/netfilter/lib.sh: time stamp 2024-11-03 13:00:01 is 24333020.96804966 s in the future
 1092 13:41:03.605141  tar: ./net/netfilter/ipvs.sh: time stamp 2024-11-03 13:00:01 is 24333020.667995076 s in the future
 1093 13:41:03.933823  tar: ./net/netfilter/nft_concat_range.sh: time stamp 2024-11-03 13:00:01 is 24333020.339846326 s in the future
 1094 13:41:04.235201  tar: ./net/netfilter/nf_queue: time stamp 2024-11-03 13:26:37 is 24334616.037339951 s in the future
 1095 13:41:04.560764  tar: ./net/netfilter/nft_queue.sh: time stamp 2024-11-03 13:00:01 is 24333019.711960076 s in the future
 1096 13:41:04.807003  tar: ./net/netfilter/vxlan_mtu_frag.sh: time stamp 2024-11-03 13:00:01 is 24333019.466292951 s in the future
 1097 13:41:05.094626  tar: ./net/netfilter/conntrack_reverse_clash.sh: time stamp 2024-11-03 13:00:01 is 24333019.179702493 s in the future
 1098 13:41:05.362472  tar: ./net/netfilter/nft_synproxy.sh: time stamp 2024-11-03 13:00:01 is 24333018.910905868 s in the future
 1099 13:41:05.725215  tar: ./net/netfilter/conntrack_reverse_clash: time stamp 2024-11-03 13:26:37 is 24334614.548277118 s in the future
 1100 13:41:06.039186  tar: ./net/netfilter/nft_nat_zones.sh: time stamp 2024-11-03 13:00:01 is 24333018.234948784 s in the future
 1101 13:41:06.311815  tar: ./net/netfilter/nft_tproxy_udp.sh: time stamp 2024-11-03 13:00:01 is 24333017.961330534 s in the future
 1102 13:41:06.596088  tar: ./net/netfilter/nft_audit.sh: time stamp 2024-11-03 13:00:01 is 24333017.675833826 s in the future
 1103 13:41:06.972246  tar: ./net/netfilter/sctp_collision: time stamp 2024-11-03 13:26:37 is 24334613.300208701 s in the future
 1104 13:41:07.264156  tar: ./net/netfilter/nft_meta.sh: time stamp 2024-11-03 13:00:01 is 24333017.008267659 s in the future
 1105 13:41:07.539093  tar: ./net/netfilter/config: time stamp 2024-11-03 13:00:01 is 24333016.732994201 s in the future
 1106 13:41:07.891402  tar: ./net/netfilter/packetdrill/conntrack_syn_challenge_ack.pkt: time stamp 2024-11-03 13:00:01 is 24333016.383850367 s in the future
 1107 13:41:08.174935  tar: ./net/netfilter/packetdrill/conntrack_rst_invalid.pkt: time stamp 2024-11-03 13:00:01 is 24333016.100287034 s in the future
 1108 13:41:08.506152  tar: ./net/netfilter/packetdrill/conntrack_synack_old.pkt: time stamp 2024-11-03 13:00:01 is 24333015.769529951 s in the future
 1109 13:41:08.764396  tar: ./net/netfilter/packetdrill/conntrack_synack_reuse.pkt: time stamp 2024-11-03 13:00:01 is 24333015.510418701 s in the future
 1110 13:41:09.060688  tar: ./net/netfilter/packetdrill/common.sh: time stamp 2024-11-03 13:00:01 is 24333015.213302076 s in the future
 1111 13:41:09.372698  tar: ./net/netfilter/packetdrill/conntrack_ack_loss_stall.pkt: time stamp 2024-11-03 13:00:01 is 24333014.90160645 s in the future
 1112 13:41:09.685198  tar: ./net/netfilter/packetdrill/conntrack_inexact_rst.pkt: time stamp 2024-11-03 13:00:01 is 24333014.589838284 s in the future
 1113 13:41:09.791039  tar: ./net/netfilter/packetdrill: time stamp 2024-11-03 13:00:01 is 24333014.481881742 s in the future
 1114 13:41:10.091119  tar: ./net/netfilter/rpath.sh: time stamp 2024-11-03 13:00:01 is 24333014.181032284 s in the future
 1115 13:41:10.412891  tar: ./net/netfilter/xt_string.sh: time stamp 2024-11-03 13:00:01 is 24333013.861457492 s in the future
 1116 13:41:10.649442  tar: ./net/netfilter/bridge_brouter.sh: time stamp 2024-11-03 13:00:01 is 24333013.624594242 s in the future
 1117 13:41:10.931500  tar: ./net/netfilter/nft_nat.sh: time stamp 2024-11-03 13:00:01 is 24333013.340915492 s in the future
 1118 13:41:11.244890  tar: ./net/netfilter/nf_conntrack_packetdrill.sh: time stamp 2024-11-03 13:00:01 is 24333013.029636159 s in the future
 1119 13:41:11.598566  tar: ./net/netfilter/nft_fib.sh: time stamp 2024-11-03 13:00:01 is 24333012.673508492 s in the future
 1120 13:41:11.855644  tar: ./net/netfilter/conntrack_ipip_mtu.sh: time stamp 2024-11-03 13:00:01 is 24333012.419245367 s in the future
 1121 13:41:12.176117  tar: ./net/netfilter/conntrack_tcp_unreplied.sh: time stamp 2024-11-03 13:00:01 is 24333012.09800795 s in the future
 1122 13:41:12.526068  tar: ./net/netfilter/conntrack_dump_flush: time stamp 2024-11-03 13:26:37 is 24334607.747547575 s in the future
 1123 13:41:12.815419  tar: ./net/netfilter/nft_concat_range_perf.sh: time stamp 2024-11-03 13:00:01 is 24333011.458161575 s in the future
 1124 13:41:13.166181  tar: ./net/netfilter/br_netfilter_queue.sh: time stamp 2024-11-03 13:00:01 is 24333011.107638242 s in the future
 1125 13:41:13.405171  tar: ./net/netfilter/settings: time stamp 2024-11-03 13:00:01 is 24333010.867042158 s in the future
 1126 13:41:13.693623  tar: ./net/netfilter/nft_flowtable.sh: time stamp 2024-11-03 13:00:01 is 24333010.579117908 s in the future
 1127 13:41:14.005621  tar: ./net/netfilter/nft_conntrack_helper.sh: time stamp 2024-11-03 13:00:01 is 24333010.268272742 s in the future
 1128 13:41:14.305715  tar: ./net/netfilter/conntrack_vrf.sh: time stamp 2024-11-03 13:00:01 is 24333009.9675272 s in the future
 1129 13:41:14.572847  tar: ./net/netfilter/nft_zones_many.sh: time stamp 2024-11-03 13:00:01 is 24333009.700653867 s in the future
 1130 13:41:14.919842  tar: ./net/netfilter/connect_close: time stamp 2024-11-03 13:26:37 is 24334605.352762241 s in the future
 1131 13:41:15.115589  tar: ./net/netfilter: time stamp 2024-11-03 13:27:30 is 24334658.155712616 s in the future
 1132 13:41:15.573116  tar: ./net/tcp_ao/self-connect_ipv4: time stamp 2024-11-03 13:26:43 is 24334610.699123241 s in the future
 1133 13:41:15.964128  tar: ./net/tcp_ao/restore_ipv4: time stamp 2024-11-03 13:26:42 is 24334609.307311575 s in the future
 1134 13:41:16.191372  tar: ./net/tcp_ao/icmps-discard_ipv6: time stamp 2024-11-03 13:26:46 is 24334613.080470325 s in the future
 1135 13:41:16.374335  tar: ./net/tcp_ao/connect-deny_ipv6: time stamp 2024-11-03 13:26:45 is 24334611.898097575 s in the future
 1136 13:41:16.642022  tar: ./net/tcp_ao/bench-lookups_ipv4: time stamp 2024-11-03 13:26:40 is 24334606.629646658 s in the future
 1137 13:41:16.834582  tar: ./net/tcp_ao/bench-lookups_ipv6: time stamp 2024-11-03 13:26:44 is 24334610.4377752 s in the future
 1138 13:41:17.026154  tar: ./net/tcp_ao/icmps-discard_ipv4: time stamp 2024-11-03 13:26:41 is 24334607.246429825 s in the future
 1139 13:41:17.263149  tar: ./net/tcp_ao/self-connect_ipv6: time stamp 2024-11-03 13:26:47 is 24334613.008706491 s in the future
 1140 13:41:17.375657  tar: ./net/tcp_ao/config: time stamp 2024-11-03 13:00:01 is 24333006.895512283 s in the future
 1141 13:41:17.576644  tar: ./net/tcp_ao/seq-ext_ipv4: time stamp 2024-11-03 13:26:43 is 24334608.695314158 s in the future
 1142 13:41:17.851544  tar: ./net/tcp_ao/connect_ipv4: time stamp 2024-11-03 13:26:40 is 24334605.420440699 s in the future
 1143 13:41:18.061062  tar: ./net/tcp_ao/unsigned-md5_ipv6: time stamp 2024-11-03 13:26:49 is 24334614.211800241 s in the future
 1144 13:41:18.263269  tar: ./net/tcp_ao/connect-deny_ipv4: time stamp 2024-11-03 13:26:40 is 24334605.008466366 s in the future
 1145 13:41:18.535114  tar: ./net/tcp_ao/key-management_ipv4: time stamp 2024-11-03 13:26:42 is 24334606.737721908 s in the future
 1146 13:41:18.718187  tar: ./net/tcp_ao/restore_ipv6: time stamp 2024-11-03 13:26:46 is 24334610.553241158 s in the future
 1147 13:41:18.966488  tar: ./net/tcp_ao/seq-ext_ipv6: time stamp 2024-11-03 13:26:47 is 24334611.304876908 s in the future
 1148 13:41:19.248816  tar: ./net/tcp_ao/setsockopt-closed_ipv4: time stamp 2024-11-03 13:26:43 is 24334607.024387241 s in the future
 1149 13:41:19.576838  tar: ./net/tcp_ao/connect_ipv6: time stamp 2024-11-03 13:26:45 is 24334608.695882158 s in the future
 1150 13:41:19.934287  tar: ./net/tcp_ao/rst_ipv6: time stamp 2024-11-03 13:26:47 is 24334610.336697199 s in the future
 1151 13:41:20.262163  tar: ./net/tcp_ao/rst_ipv4: time stamp 2024-11-03 13:26:42 is 24334605.009897449 s in the future
 1152 13:41:20.653148  tar: ./net/tcp_ao/icmps-accept_ipv4: time stamp 2024-11-03 13:26:41 is 24334603.619223616 s in the future
 1153 13:41:20.937702  tar: ./net/tcp_ao/setsockopt-closed_ipv6: time stamp 2024-11-03 13:26:48 is 24334610.335339116 s in the future
 1154 13:41:21.070150  tar: ./net/tcp_ao/settings: time stamp 2024-11-03 13:00:01 is 24333003.202072199 s in the future
 1155 13:41:21.295525  tar: ./net/tcp_ao/icmps-accept_ipv6: time stamp 2024-11-03 13:26:45 is 24334606.976713741 s in the future
 1156 13:41:21.478602  tar: ./net/tcp_ao/unsigned-md5_ipv4: time stamp 2024-11-03 13:26:44 is 24334605.793229991 s in the future
 1157 13:41:21.703747  tar: ./net/tcp_ao/key-management_ipv6: time stamp 2024-11-03 13:26:46 is 24334607.568555407 s in the future
 1158 13:41:21.758956  tar: ./net/tcp_ao: time stamp 2024-11-03 13:27:31 is 24334652.511084866 s in the future
 1159 13:41:21.950837  tar: ./net/packetdrill/tcp_inq_server.pkt: time stamp 2024-11-03 13:00:01 is 24333002.322085407 s in the future
 1160 13:41:22.083786  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-2pkt-send-5pkt.pkt: time stamp 2024-11-03 13:00:01 is 24333002.192566491 s in the future
 1161 13:41:22.213029  tar: ./net/packetdrill/tcp_zerocopy_client.pkt: time stamp 2024-11-03 13:00:01 is 24333002.059544491 s in the future
 1162 13:41:22.414195  tar: ./net/packetdrill/tcp_zerocopy_fastopen-client.pkt: time stamp 2024-11-03 13:00:01 is 24333001.859125699 s in the future
 1163 13:41:22.554142  tar: ./net/packetdrill/defaults.sh: time stamp 2024-11-03 13:00:01 is 24333001.717275949 s in the future
 1164 13:41:22.695366  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-2pkt-send-6pkt.pkt: time stamp 2024-11-03 13:00:01 is 24333001.579901741 s in the future
 1165 13:41:22.832407  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-4pkt.pkt: time stamp 2024-11-03 13:00:01 is 24333001.442594366 s in the future
 1166 13:41:22.957176  tar: ./net/packetdrill/tcp_zerocopy_epoll_oneshot.pkt: time stamp 2024-11-03 13:00:01 is 24333001.317460866 s in the future
 1167 13:41:23.095419  tar: ./net/packetdrill/tcp_md5_md5-only-on-client-ack.pkt: time stamp 2024-11-03 13:00:01 is 24333001.179621157 s in the future
 1168 13:41:23.209216  tar: ./net/packetdrill/tcp_slow_start_slow-start-app-limited-9-packets-out.pkt: time stamp 2024-11-03 13:00:01 is 24333001.066458074 s in the future
 1169 13:41:23.345195  tar: ./net/packetdrill/tcp_slow_start_slow-start-fq-ack-per-2pkt.pkt: time stamp 2024-11-03 13:00:01 is 24333000.929437699 s in the future
 1170 13:41:23.479922  tar: ./net/packetdrill/tcp_zerocopy_maxfrags.pkt: time stamp 2024-11-03 13:00:01 is 24333000.792775782 s in the future
 1171 13:41:23.609240  tar: ./net/packetdrill/config: time stamp 2024-11-03 13:00:01 is 24333000.662543407 s in the future
 1172 13:41:23.750882  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-1pkt.pkt: time stamp 2024-11-03 13:00:01 is 24333000.524252532 s in the future
 1173 13:41:23.870307  tar: ./net/packetdrill/tcp_zerocopy_fastopen-server.pkt: time stamp 2024-11-03 13:00:01 is 24333000.403971407 s in the future
 1174 13:41:24.007659  tar: ./net/packetdrill/tcp_slow_start_slow-start-after-win-update.pkt: time stamp 2024-11-03 13:00:01 is 24333000.267449865 s in the future
 1175 13:41:24.129759  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-2pkt.pkt: time stamp 2024-11-03 13:00:01 is 24333000.145148282 s in the future
 1176 13:41:24.249945  tar: ./net/packetdrill/tcp_zerocopy_closed.pkt: time stamp 2024-11-03 13:00:01 is 24333000.023686657 s in the future
 1177 13:41:24.368644  tar: ./net/packetdrill/set_sysctls.py: time stamp 2024-11-03 13:00:01 is 24332999.90350124 s in the future
 1178 13:41:24.499369  tar: ./net/packetdrill/tcp_slow_start_slow-start-after-idle.pkt: time stamp 2024-11-03 13:00:01 is 24332999.775119532 s in the future
 1179 13:41:24.685890  tar: ./net/packetdrill/ksft_runner.sh: time stamp 2024-11-03 13:00:01 is 24332999.586633157 s in the future
 1180 13:41:24.818581  tar: ./net/packetdrill/tcp_slow_start_slow-start-app-limited.pkt: time stamp 2024-11-03 13:00:01 is 24332999.456312824 s in the future
 1181 13:41:24.944716  tar: ./net/packetdrill/tcp_zerocopy_small.pkt: time stamp 2024-11-03 13:00:01 is 24332999.32803524 s in the future
 1182 13:41:25.056173  tar: ./net/packetdrill/tcp_zerocopy_batch.pkt: time stamp 2024-11-03 13:00:01 is 24332999.216445782 s in the future
 1183 13:41:25.178157  tar: ./net/packetdrill/tcp_inq_client.pkt: time stamp 2024-11-03 13:00:01 is 24332999.094487865 s in the future
 1184 13:41:25.309932  tar: ./net/packetdrill/tcp_zerocopy_epoll_edge.pkt: time stamp 2024-11-03 13:00:01 is 24332998.963999907 s in the future
 1185 13:41:25.428947  tar: ./net/packetdrill/tcp_zerocopy_epoll_exclusive.pkt: time stamp 2024-11-03 13:00:01 is 24332998.844319532 s in the future
 1186 13:41:25.540525  tar: ./net/packetdrill/tcp_zerocopy_basic.pkt: time stamp 2024-11-03 13:00:01 is 24332998.732654324 s in the future
 1187 13:41:25.593575  tar: ./net/packetdrill: time stamp 2024-11-03 13:00:01 is 24332998.677456115 s in the future
 1188 13:41:25.740651  tar: ./net/hsr/hsr_ping.sh: time stamp 2024-11-03 13:00:01 is 24332998.530443449 s in the future
 1189 13:41:25.865489  tar: ./net/hsr/config: time stamp 2024-11-03 13:00:01 is 24332998.405988949 s in the future
 1190 13:41:25.999944  tar: ./net/hsr/hsr_redbox.sh: time stamp 2024-11-03 13:00:01 is 24332998.27168274 s in the future
 1191 13:41:26.138513  tar: ./net/hsr/hsr_common.sh: time stamp 2024-11-03 13:00:01 is 24332998.132888698 s in the future
 1192 13:41:26.199040  tar: ./net/hsr: time stamp 2024-11-03 13:27:30 is 24334647.07146399 s in the future
 1193 13:41:26.365101  tar: ./net/rds/test.py: time stamp 2024-11-03 13:00:01 is 24332997.905425365 s in the future
 1194 13:41:26.472160  tar: ./net/rds/include.sh: time stamp 2024-11-03 13:27:31 is 24334647.798414532 s in the future
 1195 13:41:26.597117  tar: ./net/rds/run.sh: time stamp 2024-11-03 13:00:01 is 24332997.673291657 s in the future
 1196 13:41:26.654302  tar: ./net/rds: time stamp 2024-11-03 13:27:31 is 24334647.615805323 s in the future
 1197 13:41:26.817424  tar: ./net/af_unix/scm_rights: time stamp 2024-11-03 13:26:35 is 24334591.453969032 s in the future
 1198 13:41:26.950737  tar: ./net/af_unix/diag_uid: time stamp 2024-11-03 13:26:35 is 24334591.320499782 s in the future
 1199 13:41:27.082090  tar: ./net/af_unix/config: time stamp 2024-11-03 13:00:01 is 24332997.189668782 s in the future
 1200 13:41:27.209180  tar: ./net/af_unix/unix_connect: time stamp 2024-11-03 13:26:35 is 24334591.061865448 s in the future
 1201 13:41:27.358156  tar: ./net/af_unix/msg_oob: time stamp 2024-11-03 13:26:35 is 24334590.912986573 s in the future
 1202 13:41:27.558076  tar: ./net/af_unix/scm_pidfd: time stamp 2024-11-03 13:26:35 is 24334590.714181198 s in the future
 1203 13:41:27.614654  tar: ./net/af_unix: time stamp 2024-11-03 13:27:29 is 24334644.655514907 s in the future
 1204 13:41:27.772530  tar: ./net/forwarding/bridge_port_isolation.sh: time stamp 2024-11-03 13:00:01 is 24332996.500654323 s in the future
 1205 13:41:27.903925  tar: ./net/forwarding/vxlan_bridge_1q_port_8472.sh: time stamp 2024-11-03 13:00:01 is 24332996.369610073 s in the future
 1206 13:41:28.059755  tar: ./net/forwarding/bridge_vlan_mcast.sh: time stamp 2024-11-03 13:00:01 is 24332996.21277874 s in the future
 1207 13:41:28.260081  tar: ./net/forwarding/bridge_vlan_unaware.sh: time stamp 2024-11-03 13:00:01 is 24332996.013417198 s in the future
 1208 13:41:28.386281  tar: ./net/forwarding/ip6gre_inner_v6_multipath.sh: time stamp 2024-11-03 13:00:01 is 24332995.887280032 s in the future
 1209 13:41:28.513265  tar: ./net/forwarding/sch_ets.sh: time stamp 2024-11-03 13:00:01 is 24332995.758367073 s in the future
 1210 13:41:28.643688  tar: ./net/forwarding/ip6gre_hier_key.sh: time stamp 2024-11-03 13:00:01 is 24332995.628717157 s in the future
 1211 13:41:28.759723  tar: ./net/forwarding/vxlan_bridge_1d_port_8472_ipv6.sh: time stamp 2024-11-03 13:00:01 is 24332995.513047823 s in the future
 1212 13:41:28.875097  tar: ./net/forwarding/ip6gre_flat.sh: time stamp 2024-11-03 13:00:01 is 24332995.39701849 s in the future
 1213 13:41:29.030077  tar: ./net/forwarding/gre_custom_multipath_hash.sh: time stamp 2024-11-03 13:00:01 is 24332995.243468073 s in the future
 1214 13:41:29.163947  tar: ./net/forwarding/ip6gre_flat_key.sh: time stamp 2024-11-03 13:00:01 is 24332995.107940281 s in the future
 1215 13:41:29.292134  tar: ./net/forwarding/lib.sh: time stamp 2024-11-03 13:00:01 is 24332994.97931974 s in the future
 1216 13:41:29.435286  tar: ./net/forwarding/skbedit_priority.sh: time stamp 2024-11-03 13:00:01 is 24332994.837287656 s in the future
 1217 13:41:29.574152  tar: ./net/forwarding/ip6gre_flat_keys.sh: time stamp 2024-11-03 13:00:01 is 24332994.699272115 s in the future
 1218 13:41:29.721355  tar: ./net/forwarding/min_max_mtu.sh: time stamp 2024-11-03 13:00:01 is 24332994.550692031 s in the future
 1219 13:41:29.868855  tar: ./net/forwarding/bridge_mdb.sh: time stamp 2024-11-03 13:00:01 is 24332994.403589781 s in the future
 1220 13:41:30.020830  tar: ./net/forwarding/vxlan_bridge_1q_port_8472_ipv6.sh: time stamp 2024-11-03 13:00:01 is 24332994.253512698 s in the future
 1221 13:41:30.147099  tar: ./net/forwarding/custom_multipath_hash.sh: time stamp 2024-11-03 13:00:01 is 24332994.125084406 s in the future
 1222 13:41:30.280386  tar: ./net/forwarding/mirror_gre_flower.sh: time stamp 2024-11-03 13:00:01 is 24332993.991943073 s in the future
 1223 13:41:30.427151  tar: ./net/forwarding/vxlan_symmetric.sh: time stamp 2024-11-03 13:00:01 is 24332993.844781365 s in the future
 1224 13:41:30.552310  tar: ./net/forwarding/ip6gre_hier_keys.sh: time stamp 2024-11-03 13:00:01 is 24332993.719713198 s in the future
 1225 13:41:30.701913  tar: ./net/forwarding/fib_offload_lib.sh: time stamp 2024-11-03 13:00:01 is 24332993.570690365 s in the future
 1226 13:41:30.837766  tar: ./net/forwarding/sch_tbf_ets.sh: time stamp 2024-11-03 13:00:01 is 24332993.435114615 s in the future
 1227 13:41:30.995339  tar: ./net/forwarding/vxlan_bridge_1d_ipv6.sh: time stamp 2024-11-03 13:00:01 is 24332993.277585906 s in the future
 1228 13:41:31.129019  tar: ./net/forwarding/sch_tbf_etsprio.sh: time stamp 2024-11-03 13:00:01 is 24332993.144319531 s in the future
 1229 13:41:31.278568  tar: ./net/forwarding/mirror_gre_bridge_1d_vlan.sh: time stamp 2024-11-03 13:00:01 is 24332992.995031781 s in the future
 1230 13:41:31.407102  tar: ./net/forwarding/ipip_hier_gre_keys.sh: time stamp 2024-11-03 13:00:01 is 24332992.865477698 s in the future
 1231 13:41:31.544861  tar: ./net/forwarding/mirror_gre_lag_lacp.sh: time stamp 2024-11-03 13:00:01 is 24332992.727329656 s in the future
 1232 13:41:31.753468  tar: ./net/forwarding/lib_sh_test.sh: time stamp 2024-11-03 13:00:01 is 24332992.518811323 s in the future
 1233 13:41:31.898418  tar: ./net/forwarding/vxlan_bridge_1d.sh: time stamp 2024-11-03 13:00:01 is 24332992.373535489 s in the future
 1234 13:41:32.046674  tar: ./net/forwarding/router_vid_1.sh: time stamp 2024-11-03 13:00:01 is 24332992.225737031 s in the future
 1235 13:41:32.179278  tar: ./net/forwarding/ipip_flat_gre_keys.sh: time stamp 2024-11-03 13:00:01 is 24332992.093444198 s in the future
 1236 13:41:32.312961  tar: ./net/forwarding/ip6gre_inner_v4_multipath.sh: time stamp 2024-11-03 13:00:01 is 24332991.960054198 s in the future
 1237 13:41:32.436317  tar: ./net/forwarding/mirror_gre_topo_lib.sh: time stamp 2024-11-03 13:00:01 is 24332991.836169614 s in the future
 1238 13:41:32.614988  tar: ./net/forwarding/tc_police.sh: time stamp 2024-11-03 13:00:01 is 24332991.656120614 s in the future
 1239 13:41:32.754052  tar: ./net/forwarding/gre_inner_v4_multipath.sh: time stamp 2024-11-03 13:00:01 is 24332991.518045531 s in the future
 1240 13:41:32.871852  tar: ./net/forwarding/router_bridge_1d_lag.sh: time stamp 2024-11-03 13:00:01 is 24332991.401065281 s in the future
 1241 13:41:32.995109  tar: ./net/forwarding/sch_tbf_prio.sh: time stamp 2024-11-03 13:00:01 is 24332991.277421156 s in the future
 1242 13:41:33.137312  tar: ./net/forwarding/router_bridge_vlan.sh: time stamp 2024-11-03 13:00:01 is 24332991.135435406 s in the future
 1243 13:41:33.262562  tar: ./net/forwarding/tc_flower_cfm.sh: time stamp 2024-11-03 13:00:01 is 24332991.009131864 s in the future
 1244 13:41:33.387652  tar: ./net/forwarding/ipip_lib.sh: time stamp 2024-11-03 13:00:01 is 24332990.884049198 s in the future
 1245 13:41:33.512822  tar: ./net/forwarding/router_multipath.sh: time stamp 2024-11-03 13:00:01 is 24332990.760329698 s in the future
 1246 13:41:33.635672  tar: ./net/forwarding/config: time stamp 2024-11-03 13:00:01 is 24332990.635512281 s in the future
 1247 13:41:33.771446  tar: ./net/forwarding/router_mpath_nh.sh: time stamp 2024-11-03 13:00:01 is 24332990.500558364 s in the future
 1248 13:41:33.905003  tar: ./net/forwarding/mirror_gre_bound.sh: time stamp 2024-11-03 13:00:01 is 24332990.366805698 s in the future
 1249 13:41:34.020611  tar: ./net/forwarding/router_bridge.sh: time stamp 2024-11-03 13:00:01 is 24332990.251547073 s in the future
 1250 13:41:34.153194  tar: ./net/forwarding/tc_shblocks.sh: time stamp 2024-11-03 13:00:01 is 24332990.118222073 s in the future
 1251 13:41:34.280415  tar: ./net/forwarding/ipip_hier_gre_key.sh: time stamp 2024-11-03 13:00:01 is 24332989.991507614 s in the future
 1252 13:41:34.388668  tar: ./net/forwarding/ipip_hier_gre.sh: time stamp 2024-11-03 13:00:01 is 24332989.883107114 s in the future
 1253 13:41:34.504323  tar: ./net/forwarding/sch_tbf_root.sh: time stamp 2024-11-03 13:00:01 is 24332989.767697656 s in the future
 1254 13:41:34.635821  tar: ./net/forwarding/ipip_flat_gre_key.sh: time stamp 2024-11-03 13:00:01 is 24332989.637058489 s in the future
 1255 13:41:34.763415  tar: ./net/forwarding/pedit_dsfield.sh: time stamp 2024-11-03 13:00:01 is 24332989.507703489 s in the future
 1256 13:41:34.880537  tar: ./net/forwarding/router_mpath_seed.sh: time stamp 2024-11-03 13:00:01 is 24332989.390901614 s in the future
 1257 13:41:35.004298  tar: ./net/forwarding/q_in_vni.sh: time stamp 2024-11-03 13:00:01 is 24332989.267217531 s in the future
 1258 13:41:35.137832  tar: ./net/forwarding/mirror_topo_lib.sh: time stamp 2024-11-03 13:00:01 is 24332989.134320697 s in the future
 1259 13:41:35.257241  tar: ./net/forwarding/vxlan_bridge_1d_port_8472.sh: time stamp 2024-11-03 13:00:01 is 24332989.015397406 s in the future
 1260 13:41:35.382570  tar: ./net/forwarding/bridge_mdb_port_down.sh: time stamp 2024-11-03 13:00:01 is 24332988.890271406 s in the future
 1261 13:41:35.505012  tar: ./net/forwarding/tc_flower_l2_miss.sh: time stamp 2024-11-03 13:00:01 is 24332988.766681364 s in the future
 1262 13:41:35.629203  tar: ./net/forwarding/tc_tunnel_key.sh: time stamp 2024-11-03 13:00:01 is 24332988.642316489 s in the future
 1263 13:41:35.757719  tar: ./net/forwarding/bridge_sticky_fdb.sh: time stamp 2024-11-03 13:00:01 is 24332988.515033697 s in the future
 1264 13:41:35.884136  tar: ./net/forwarding/bridge_fdb_learning_limit.sh: time stamp 2024-11-03 13:00:01 is 24332988.389907572 s in the future
 1265 13:41:36.006272  tar: ./net/forwarding/ip6_forward_instats_vrf.sh: time stamp 2024-11-03 13:00:01 is 24332988.266283656 s in the future
 1266 13:41:36.154866  tar: ./net/forwarding/router_multicast.sh: time stamp 2024-11-03 13:00:01 is 24332988.116783906 s in the future
 1267 13:41:36.282000  tar: ./net/forwarding/ip6gre_hier.sh: time stamp 2024-11-03 13:00:01 is 24332987.989309989 s in the future
 1268 13:41:36.400016  tar: ./net/forwarding/local_termination.sh: time stamp 2024-11-03 13:00:01 is 24332987.872501656 s in the future
 1269 13:41:36.523071  tar: ./net/forwarding/tc_flower_router.sh: time stamp 2024-11-03 13:00:01 is 24332987.749061656 s in the future
 1270 13:41:36.664304  tar: ./net/forwarding/router_bridge_vlan_upper.sh: time stamp 2024-11-03 13:00:01 is 24332987.608160447 s in the future
 1271 13:41:36.792196  tar: ./net/forwarding/mirror_gre_bridge_1q.sh: time stamp 2024-11-03 13:00:01 is 24332987.480455989 s in the future
 1272 13:41:36.908310  tar: ./net/forwarding/router_broadcast.sh: time stamp 2024-11-03 13:00:01 is 24332987.363733739 s in the future
 1273 13:41:37.023973  tar: ./net/forwarding/mirror_gre_vlan.sh: time stamp 2024-11-03 13:00:01 is 24332987.248548864 s in the future
 1274 13:41:37.164142  tar: ./net/forwarding/vxlan_bridge_1q_ipv6.sh: time stamp 2024-11-03 13:00:01 is 24332987.107775197 s in the future
 1275 13:41:37.291232  tar: ./net/forwarding/router_nh.sh: time stamp 2024-11-03 13:00:01 is 24332986.980216905 s in the future
 1276 13:41:37.425945  tar: ./net/forwarding/tc_chains.sh: time stamp 2024-11-03 13:00:01 is 24332986.846501239 s in the future
 1277 13:41:37.558433  tar: ./net/forwarding/router_bridge_pvid_vlan_upper.sh: time stamp 2024-11-03 13:00:01 is 24332986.714819947 s in the future
 1278 13:41:37.716297  tar: ./net/forwarding/bridge_igmp.sh: time stamp 2024-11-03 13:00:01 is 24332986.553817822 s in the future
 1279 13:41:37.850624  tar: ./net/forwarding/ip6gre_lib.sh: time stamp 2024-11-03 13:00:01 is 24332986.421348655 s in the future
 1280 13:41:37.975658  tar: ./net/forwarding/bridge_vlan_aware.sh: time stamp 2024-11-03 13:00:01 is 24332986.296116989 s in the future
 1281 13:41:38.242698  tar: ./net/forwarding/devlink_lib.sh: time stamp 2024-11-03 13:00:01 is 24332986.028023197 s in the future
 1282 13:41:38.418501  tar: ./net/forwarding/bridge_locked_port.sh: time stamp 2024-11-03 13:00:01 is 24332985.85340453 s in the future
 1283 13:41:38.558138  tar: ./net/forwarding/router_bridge_lag.sh: time stamp 2024-11-03 13:00:01 is 24332985.713749655 s in the future
 1284 13:41:38.694849  tar: ./net/forwarding/mirror_gre_bridge_1d.sh: time stamp 2024-11-03 13:00:01 is 24332985.578048697 s in the future
 1285 13:41:38.827591  tar: ./net/forwarding/router_mpath_nh_lib.sh: time stamp 2024-11-03 13:00:01 is 24332985.444743614 s in the future
 1286 13:41:38.960044  tar: ./net/forwarding/vxlan_bridge_1q.sh: time stamp 2024-11-03 13:00:01 is 24332985.311202322 s in the future
 1287 13:41:39.116831  tar: ./net/forwarding/tc_mpls_l2vpn.sh: time stamp 2024-11-03 13:00:01 is 24332985.154772697 s in the future
 1288 13:41:39.352859  tar: ./net/forwarding/sch_ets_tests.sh: time stamp 2024-11-03 13:00:01 is 24332984.919155322 s in the future
 1289 13:41:39.518983  tar: ./net/forwarding/bridge_mdb_max.sh: time stamp 2024-11-03 13:00:01 is 24332984.752008072 s in the future
 1290 13:41:39.685225  tar: ./net/forwarding/router_mpath_nh_res.sh: time stamp 2024-11-03 13:00:01 is 24332984.586691739 s in the future
 1291 13:41:39.810087  tar: ./net/forwarding/tc_actions.sh: time stamp 2024-11-03 13:00:01 is 24332984.461338572 s in the future
 1292 13:41:39.991200  tar: ./net/forwarding/gre_multipath.sh: time stamp 2024-11-03 13:00:01 is 24332984.28019403 s in the future
 1293 13:41:40.152112  tar: ./net/forwarding/router_bridge_1d.sh: time stamp 2024-11-03 13:00:01 is 24332984.119307905 s in the future
 1294 13:41:40.286876  tar: ./net/forwarding/gre_inner_v6_multipath.sh: time stamp 2024-11-03 13:00:01 is 24332983.985900905 s in the future
 1295 13:41:40.408883  tar: ./net/forwarding/no_forwarding.sh: time stamp 2024-11-03 13:00:01 is 24332983.862118197 s in the future
 1296 13:41:40.537032  tar: ./net/forwarding/gre_multipath_nh_res.sh: time stamp 2024-11-03 13:00:01 is 24332983.734648738 s in the future
 1297 13:41:40.727625  tar: ./net/forwarding/bridge_mld.sh: time stamp 2024-11-03 13:00:01 is 24332983.543846155 s in the future
 1298 13:41:40.853209  tar: ./net/forwarding/dual_vxlan_bridge.sh: time stamp 2024-11-03 13:00:01 is 24332983.41773503 s in the future
 1299 13:41:40.963058  tar: ./net/forwarding/ipip_flat_gre.sh: time stamp 2024-11-03 13:00:01 is 24332983.309373322 s in the future
 1300 13:41:41.087110  tar: ./net/forwarding/mirror_gre.sh: time stamp 2024-11-03 13:00:01 is 24332983.184129988 s in the future
 1301 13:41:41.372905  tar: ./net/forwarding/router_bridge_vlan_upper_pvid.sh: time stamp 2024-11-03 13:00:01 is 24332982.900562363 s in the future
 1302 13:41:41.510954  tar: ./net/forwarding/mirror_gre_vlan_bridge_1q.sh: time stamp 2024-11-03 13:00:01 is 24332982.761892613 s in the future
 1303 13:41:41.654172  tar: ./net/forwarding/vxlan_asymmetric.sh: time stamp 2024-11-03 13:00:01 is 24332982.617759947 s in the future
 1304 13:41:41.797425  tar: ./net/forwarding/mirror_gre_bridge_1q_lag.sh: time stamp 2024-11-03 13:00:01 is 24332982.474923947 s in the future
 1305 13:41:41.929871  tar: ./net/forwarding/gre_multipath_nh.sh: time stamp 2024-11-03 13:00:01 is 24332982.34167328 s in the future
 1306 13:41:42.064390  tar: ./net/forwarding/forwarding.config.sample: time stamp 2024-11-03 13:00:01 is 24332982.208295905 s in the future
 1307 13:41:42.226663  tar: ./net/forwarding/sch_red.sh: time stamp 2024-11-03 13:00:01 is 24332982.044549155 s in the future
 1308 13:41:42.355909  tar: ./net/forwarding/mirror_gre_lib.sh: time stamp 2024-11-03 13:00:01 is 24332981.916409988 s in the future
 1309 13:41:42.464564  tar: ./net/forwarding/bridge_mdb_host.sh: time stamp 2024-11-03 13:00:01 is 24332981.807864613 s in the future
 1310 13:41:42.630855  tar: ./net/forwarding/router.sh: time stamp 2024-11-03 13:00:01 is 24332981.641075613 s in the future
 1311 13:41:42.850835  tar: ./net/forwarding/settings: time stamp 2024-11-03 13:00:01 is 24332981.420675905 s in the future
 1312 13:41:42.978224  tar: ./net/forwarding/pedit_l4port.sh: time stamp 2024-11-03 13:00:01 is 24332981.293139113 s in the future
 1313 13:41:43.113885  tar: ./net/forwarding/vxlan_asymmetric_ipv6.sh: time stamp 2024-11-03 13:00:01 is 24332981.15744878 s in the future
 1314 13:41:43.233742  tar: ./net/forwarding/pedit_ip.sh: time stamp 2024-11-03 13:00:01 is 24332981.036882488 s in the future
 1315 13:41:43.388344  tar: ./net/forwarding/mirror_lib.sh: time stamp 2024-11-03 13:00:01 is 24332980.883042321 s in the future
 1316 13:41:43.547145  tar: ./net/forwarding/tc_flower_port_range.sh: time stamp 2024-11-03 13:00:01 is 24332980.724501446 s in the future
 1317 13:41:43.681945  tar: ./net/forwarding/ip6gre_custom_multipath_hash.sh: time stamp 2024-11-03 13:00:01 is 24332980.590252863 s in the future
 1318 13:41:43.821888  tar: ./net/forwarding/mirror_vlan.sh: time stamp 2024-11-03 13:00:01 is 24332980.44927053 s in the future
 1319 13:41:43.955134  tar: ./net/forwarding/sch_tbf_core.sh: time stamp 2024-11-03 13:00:01 is 24332980.31588778 s in the future
 1320 13:41:44.138564  tar: ./net/forwarding/q_in_vni_ipv6.sh: time stamp 2024-11-03 13:00:01 is 24332980.133670321 s in the future
 1321 13:41:44.273160  tar: ./net/forwarding/tc_flower.sh: time stamp 2024-11-03 13:00:01 is 24332979.998006655 s in the future
 1322 13:41:44.439317  tar: ./net/forwarding/mirror_gre_neigh.sh: time stamp 2024-11-03 13:00:01 is 24332979.832161238 s in the future
 1323 13:41:44.605965  tar: ./net/forwarding/vxlan_symmetric_ipv6.sh: time stamp 2024-11-03 13:00:01 is 24332979.666593363 s in the future
 1324 13:41:44.773183  tar: ./net/forwarding/mirror_gre_nh.sh: time stamp 2024-11-03 13:00:01 is 24332979.49773978 s in the future
 1325 13:41:44.899370  tar: ./net/forwarding/tc_vlan_modify.sh: time stamp 2024-11-03 13:00:01 is 24332979.372648696 s in the future
 1326 13:41:45.046614  tar: ./net/forwarding/sch_ets_core.sh: time stamp 2024-11-03 13:00:01 is 24332979.225420613 s in the future
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 2003 13:43:35.367030  tar: ./efivarfs/open-unlink: time stamp 2024-11-03 13:25:58 is 24334425.898533933 s in the future
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 2009 13:43:36.051266  tar: ./filesystems/fat/config: time stamp 2024-11-03 13:00:01 is 24332868.213974766 s in the future
 2010 13:43:36.186048  tar: ./filesystems/fat/rename_exchange: time stamp 2024-11-03 13:26:00 is 24334427.080656975 s in the future
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 2013 13:43:36.490488  tar: ./filesystems/dnotify_test: time stamp 2024-11-03 13:25:59 is 24334425.7749871 s in the future
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 2016 13:43:36.903465  tar: ./filesystems/binderfs/config: time stamp 2024-11-03 13:00:01 is 24332867.362354558 s in the future
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 2019 13:43:37.254167  tar: ./filesystems/devpts_pts: time stamp 2024-11-03 13:25:59 is 24334425.011730766 s in the future
 2020 13:43:37.421477  tar: ./filesystems/overlayfs/dev_in_maps: time stamp 2024-11-03 13:26:01 is 24334426.845839183 s in the future
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 2022 13:43:37.638819  tar: ./filesystems/statmount/statmount_test: time stamp 2024-11-03 13:26:01 is 24334426.627805516 s in the future
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 2026 13:43:38.070118  tar: ./firmware/fw_upload.sh: time stamp 2024-11-03 13:00:01 is 24332866.195429683 s in the future
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 2064 13:43:44.343820  tar: ./vDSO/vdso_test_correctness: time stamp 2024-11-03 13:27:10 is 24334488.922788057 s in the future
 2065 13:43:44.489474  tar: ./vDSO/vdso_test_abi: time stamp 2024-11-03 13:27:10 is 24334488.775344682 s in the future
 2066 13:43:44.632345  tar: ./vDSO/vdso_test_getrandom: time stamp 2024-11-03 13:27:11 is 24334489.63350589 s in the future
 2067 13:43:44.760427  tar: ./vDSO/vdso_test_chacha: time stamp 2024-11-03 13:27:11 is 24334489.505271765 s in the future
 2068 13:43:44.823937  tar: ./vDSO: time stamp 2024-11-03 13:27:35 is 24334513.439113182 s in the future
 2069 13:43:44.981441  tar: ./mqueue/mq_open_tests: time stamp 2024-11-03 13:26:25 is 24334443.283366015 s in the future
 2070 13:43:45.139146  tar: ./mqueue/mq_perf_tests: time stamp 2024-11-03 13:26:25 is 24334443.125806224 s in the future
 2071 13:43:45.208866  tar: ./mqueue: time stamp 2024-11-03 13:27:29 is 24334507.054848349 s in the future
 2072 13:43:45.375739  tar: ./sync/sync_test: time stamp 2024-11-03 13:27:04 is 24334481.888258807 s in the future
 2073 13:43:45.501741  tar: ./sync/config: time stamp 2024-11-03 13:00:01 is 24332858.762906515 s in the future
 2074 13:43:45.558875  tar: ./sync: time stamp 2024-11-03 13:27:33 is 24334510.704149432 s in the future
 2075 13:43:45.734440  tar: ./ipc/msgque: time stamp 2024-11-03 13:26:08 is 24334425.529665474 s in the future
 2076 13:43:45.871506  tar: ./ipc/config: time stamp 2024-11-03 13:00:01 is 24332858.391663057 s in the future
 2077 13:43:45.929985  tar: ./ipc: time stamp 2024-11-03 13:27:27 is 24334504.33350764 s in the future
 2078 13:43:46.852539  tar: ./tdx/tdx_guest_test: time stamp 2024-11-03 13:27:05 is 24334481.412774182 s in the future
 2079 13:43:46.984923  tar: ./tdx/config: time stamp 2024-11-03 13:00:01 is 24332857.279057098 s in the future
 2080 13:43:47.048543  tar: ./tdx: time stamp 2024-11-03 13:27:34 is 24334510.21594164 s in the future
 2081 13:43:47.199771  tar: ./tpm2/test_async.sh: time stamp 2024-11-03 13:00:01 is 24332857.06494014 s in the future
 2082 13:43:47.331997  tar: ./tpm2/tpm2.py: time stamp 2024-11-03 13:00:01 is 24332856.932446848 s in the future
 2083 13:43:47.482026  tar: ./tpm2/tpm2_tests.py: time stamp 2024-11-03 13:00:01 is 24332856.78235814 s in the future
 2084 13:43:47.622632  tar: ./tpm2/test_smoke.sh: time stamp 2024-11-03 13:00:01 is 24332856.641755598 s in the future
 2085 13:43:47.757072  tar: ./tpm2/settings: time stamp 2024-11-03 13:00:01 is 24332856.507318723 s in the future
 2086 13:43:47.877496  tar: ./tpm2/test_space.sh: time stamp 2024-11-03 13:00:01 is 24332856.386517348 s in the future
 2087 13:43:47.939832  tar: ./tpm2: time stamp 2024-11-03 13:27:34 is 24334509.323508307 s in the future
 2088 13:43:48.117722  tar: ./ptrace/vmaccess: time stamp 2024-11-03 13:26:53 is 24334468.147539848 s in the future
 2089 13:43:48.279542  tar: ./ptrace/get_set_sud: time stamp 2024-11-03 13:26:53 is 24334467.986013265 s in the future
 2090 13:43:48.417996  tar: ./ptrace/peeksiginfo: time stamp 2024-11-03 13:26:53 is 24334467.84705114 s in the future
 2091 13:43:48.565966  tar: ./ptrace/get_syscall_info: time stamp 2024-11-03 13:26:53 is 24334467.698544681 s in the future
 2092 13:43:48.619912  tar: ./ptrace: time stamp 2024-11-03 13:27:32 is 24334506.64343289 s in the future
 2093 13:43:48.770262  tar: ./syscall_user_dispatch/sud_benchmark: time stamp 2024-11-03 13:27:05 is 24334479.496532681 s in the future
 2094 13:43:48.881549  tar: ./syscall_user_dispatch/config: time stamp 2024-11-03 13:00:01 is 24332855.384991515 s in the future
 2095 13:43:49.056617  tar: ./syscall_user_dispatch/sud_test: time stamp 2024-11-03 13:27:05 is 24334479.209972931 s in the future
 2096 13:43:49.108841  tar: ./syscall_user_dispatch: time stamp 2024-11-03 13:27:33 is 24334507.156238431 s in the future
 2097 13:43:49.318167  tar: ./resctrl/resctrl_tests: time stamp 2024-11-03 13:26:58 is 24334471.94640989 s in the future
 2098 13:43:49.447032  tar: ./resctrl/config: time stamp 2024-11-03 13:00:01 is 24332854.817620015 s in the future
 2099 13:43:49.568849  tar: ./resctrl/settings: time stamp 2024-11-03 13:00:01 is 24332854.695892431 s in the future
 2100 13:43:49.628935  tar: ./resctrl: time stamp 2024-11-03 13:27:32 is 24334505.634284515 s in the future
 2101 13:43:49.768717  tar: ./proc/setns-sysvipc: time stamp 2024-11-03 13:26:52 is 24334465.495373306 s in the future
 2102 13:43:49.900856  tar: ./proc/read: time stamp 2024-11-03 13:26:52 is 24334465.363139681 s in the future
 2103 13:43:50.052229  tar: ./proc/proc-subset-pid: time stamp 2024-11-03 13:26:52 is 24334465.212740473 s in the future
 2104 13:43:50.203501  tar: ./proc/proc-loadavg-001: time stamp 2024-11-03 13:26:51 is 24334464.061388056 s in the future
 2105 13:43:50.324405  tar: ./proc/proc-self-map-files-002: time stamp 2024-11-03 13:26:51 is 24334463.941572556 s in the future
 2106 13:43:50.448103  tar: ./proc/proc-empty-vm: time stamp 2024-11-03 13:26:51 is 24334463.816897556 s in the future
 2107 13:43:50.572853  tar: ./proc/proc-tid0: time stamp 2024-11-03 13:26:52 is 24334464.69132189 s in the future
 2108 13:43:50.697645  tar: ./proc/proc-pid-vm: time stamp 2024-11-03 13:26:51 is 24334463.566149181 s in the future
 2109 13:43:50.836482  tar: ./proc/proc-self-isnt-kthread: time stamp 2024-11-03 13:26:51 is 24334463.428820765 s in the future
 2110 13:43:50.965822  tar: ./proc/proc-2-is-kthread: time stamp 2024-11-03 13:26:51 is 24334463.299310056 s in the future
 2111 13:43:51.099472  tar: ./proc/proc-uptime-001: time stamp 2024-11-03 13:26:52 is 24334464.165756723 s in the future
 2112 13:43:51.234539  tar: ./proc/proc-uptime-002: time stamp 2024-11-03 13:26:52 is 24334464.02942864 s in the future
 2113 13:43:51.379728  tar: ./proc/proc-self-syscall: time stamp 2024-11-03 13:26:51 is 24334462.884956514 s in the future
 2114 13:43:51.506528  tar: ./proc/proc-multiple-procfs: time stamp 2024-11-03 13:26:52 is 24334463.759937348 s in the future
 2115 13:43:51.632547  tar: ./proc/config: time stamp 2024-11-03 13:00:01 is 24332852.631618806 s in the future
 2116 13:43:51.765782  tar: ./proc/thread-self: time stamp 2024-11-03 13:26:52 is 24334463.498122181 s in the future
 2117 13:43:53.631432  tar: ./proc/setns-dcache: time stamp 2024-11-03 13:26:52 is 24334461.634432973 s in the future
 2118 13:43:53.775243  tar: ./proc/proc-self-map-files-001: time stamp 2024-11-03 13:26:51 is 24334460.490020139 s in the future
 2119 13:43:53.925551  tar: ./proc/proc-self-wchan: time stamp 2024-11-03 13:26:52 is 24334461.339361056 s in the future
 2120 13:43:54.242814  tar: ./proc/proc-fsconfig-hidepid: time stamp 2024-11-03 13:26:52 is 24334461.022387181 s in the future
 2121 13:43:54.533657  tar: ./proc/fd-002-posix-eq: time stamp 2024-11-03 13:26:51 is 24334459.731019764 s in the future
 2122 13:43:54.775998  tar: ./proc/fd-001-lookup: time stamp 2024-11-03 13:26:51 is 24334459.488559056 s in the future
 2123 13:43:54.952731  tar: ./proc/fd-003-kthread: time stamp 2024-11-03 13:26:51 is 24334459.310912972 s in the future
 2124 13:43:55.096562  tar: ./proc/self: time stamp 2024-11-03 13:26:52 is 24334460.167497181 s in the future
 2125 13:43:55.162299  tar: ./proc: time stamp 2024-11-03 13:27:32 is 24334500.101305681 s in the future
 2126 13:43:55.343257  tar: ./core/close_range_test: time stamp 2024-11-03 13:25:28 is 24334375.921991306 s in the future
 2127 13:43:55.521997  tar: ./core/unshare_test: time stamp 2024-11-03 13:25:28 is 24334375.742259097 s in the future
 2128 13:43:55.579167  tar: ./core: time stamp 2024-11-03 13:27:23 is 24334490.684307847 s in the future
 2129 13:43:55.732510  tar: ./run_kselftest.sh: time stamp 2024-11-03 13:27:22 is 24334489.530803264 s in the future
 2130 13:43:56.043487  tar: ./futex/functional/futex_wait: time stamp 2024-11-03 13:26:03 is 24334410.221448139 s in the future
 2131 13:43:56.168477  tar: ./futex/functional/run.sh: time stamp 2024-11-03 13:00:01 is 24332848.096328764 s in the future
 2132 13:43:56.437481  tar: ./futex/functional/futex_wait_private_mapped_file: time stamp 2024-11-03 13:26:03 is 24334409.829029472 s in the future
 2133 13:43:56.583937  tar: ./futex/functional/futex_wait_wouldblock: time stamp 2024-11-03 13:26:02 is 24334408.682033097 s in the future
 2134 13:43:56.836889  tar: ./futex/functional/futex_wait_timeout: time stamp 2024-11-03 13:26:01 is 24334407.428968097 s in the future
 2135 13:43:56.977083  tar: ./futex/functional/futex_wait_uninitialized_heap: time stamp 2024-11-03 13:26:02 is 24334408.290215347 s in the future
 2136 13:43:57.137050  tar: ./futex/functional/futex_requeue: time stamp 2024-11-03 13:26:03 is 24334409.128648639 s in the future
 2137 13:43:57.334220  tar: ./futex/functional/futex_requeue_pi_signal_restart: time stamp 2024-11-03 13:26:02 is 24334407.932710805 s in the future
 2138 13:43:57.646143  tar: ./futex/functional/futex_waitv: time stamp 2024-11-03 13:26:03 is 24334408.61947243 s in the future
 2139 13:43:57.835645  tar: ./futex/functional/futex_requeue_pi_mismatched_ops: time stamp 2024-11-03 13:26:02 is 24334407.431391014 s in the future
 2140 13:43:58.030506  tar: ./futex/functional/futex_requeue_pi: time stamp 2024-11-03 13:26:02 is 24334407.234422889 s in the future
 2141 13:43:58.139571  tar: ./futex/functional: time stamp 2024-11-03 13:27:26 is 24334491.124177139 s in the future
 2142 13:43:58.265496  tar: ./futex/run.sh: time stamp 2024-11-03 13:27:26 is 24334490.997583264 s in the future
 2143 13:43:58.316547  tar: ./futex: time stamp 2024-11-03 13:27:26 is 24334490.947579014 s in the future
 2144 13:43:58.370502  tar: .: time stamp 2024-11-03 13:27:37 is 24334501.892263805 s in the future
 2145 13:43:58.626955  skiplist:
 2146 13:43:58.627109  ========================================
 2147 13:43:58.632736  ========================================
 2148 13:43:58.946705  dt:test_unprobed_devices.sh
 2149 13:43:59.068834  ============== Tests to run ===============
 2150 13:43:59.087988  dt:test_unprobed_devices.sh
 2151 13:43:59.091264  ===========End Tests to run ===============
 2152 13:43:59.118165  shardfile-dt pass
 2153 13:43:59.435669  <12>[  255.375149] kselftest: Running tests in dt
 2154 13:43:59.465548  TAP version 13
 2155 13:43:59.487014  1..1
 2156 13:43:59.541909  # timeout set to 45
 2157 13:43:59.542062  # selftests: dt: test_unprobed_devices.sh
 2158 13:44:00.337127  # TAP version 13
 2159 13:44:25.340134  # 1..257
 2160 13:44:25.507228  # ok 1 / # SKIP
 2161 13:44:25.534539  # ok 2 /clk_mcasp0
 2162 13:44:25.601865  # ok 3 /clk_mcasp0_fixed # SKIP
 2163 13:44:25.671236  # ok 4 /cpus/cpu@0 # SKIP
 2164 13:44:25.742948  # ok 5 /cpus/idle-states/mpu_gate # SKIP
 2165 13:44:25.768233  # ok 6 /fixedregulator0
 2166 13:44:25.782474  # ok 7 /leds
 2167 13:44:25.808124  # ok 8 /ocp
 2168 13:44:25.831141  # ok 9 /ocp/interconnect@44c00000
 2169 13:44:25.852323  # ok 10 /ocp/interconnect@44c00000/segment@0
 2170 13:44:25.875247  # ok 11 /ocp/interconnect@44c00000/segment@100000
 2171 13:44:25.903321  # ok 12 /ocp/interconnect@44c00000/segment@100000/target-module@0
 2172 13:44:25.974334  # not ok 13 /ocp/interconnect@44c00000/segment@100000/target-module@0/cpu@0
 2173 13:44:25.992186  # ok 14 /ocp/interconnect@44c00000/segment@200000
 2174 13:44:26.015658  # ok 15 /ocp/interconnect@44c00000/segment@200000/target-module@0
 2175 13:44:26.122876  # not ok 16 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0
 2176 13:44:26.200310  # ok 17 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0 # SKIP
 2177 13:44:26.270510  # ok 18 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@0 # SKIP
 2178 13:44:26.343086  # ok 19 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@120 # SKIP
 2179 13:44:26.414177  # ok 20 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@14c # SKIP
 2180 13:44:26.489570  # ok 21 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@18 # SKIP
 2181 13:44:26.564064  # ok 22 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@1c # SKIP
 2182 13:44:26.638721  # ok 23 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@24 # SKIP
 2183 13:44:26.716325  # ok 24 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@38 # SKIP
 2184 13:44:26.788078  # ok 25 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@e8 # SKIP
 2185 13:44:26.859126  # ok 26 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400 # SKIP
 2186 13:44:26.933605  # ok 27 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@0 # SKIP
 2187 13:44:27.009407  # ok 28 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@14 # SKIP
 2188 13:44:27.080561  # ok 29 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@b0 # SKIP
 2189 13:44:27.155143  # ok 30 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600 # SKIP
 2190 13:44:27.231892  # ok 31 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600/clock@0 # SKIP
 2191 13:44:27.305335  # ok 32 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800 # SKIP
 2192 13:44:27.450040  # ok 33 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800/clock@0 # SKIP
 2193 13:44:27.458001  # ok 34 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900 # SKIP
 2194 13:44:27.532418  # ok 35 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900/clock@0 # SKIP
 2195 13:44:27.605915  # ok 36 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00 # SKIP
 2196 13:44:27.685515  # ok 37 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00/clock@0 # SKIP
 2197 13:44:27.762217  # ok 38 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-24mhz # SKIP
 2198 13:44:27.836999  # ok 39 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-32768 # SKIP
 2199 13:44:27.907437  # ok 40 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-rc32k # SKIP
 2200 13:44:27.987508  # ok 41 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clkdiv32k # SKIP
 2201 13:44:28.062238  # ok 42 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-125mhz-gclk # SKIP
 2202 13:44:28.138162  # ok 43 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-cpts-rft@520 # SKIP
 2203 13:44:28.212814  # ok 44 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4-div2 # SKIP
 2204 13:44:28.283186  # ok 45 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4@480 # SKIP
 2205 13:44:28.363362  # ok 46 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m5@484 # SKIP
 2206 13:44:28.434984  # ok 47 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m6@4d8 # SKIP
 2207 13:44:28.515150  # ok 48 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-x2 # SKIP
 2208 13:44:28.588896  # ok 49 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2-div2 # SKIP
 2209 13:44:28.660172  # ok 50 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2@4a0 # SKIP
 2210 13:44:28.736201  # ok 51 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-disp-m2@4a4 # SKIP
 2211 13:44:28.810605  # ok 52 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-mpu-m2@4a8 # SKIP
 2212 13:44:28.885261  # ok 53 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4 # SKIP
 2213 13:44:28.966443  # ok 54 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4-wkupdm # SKIP
 2214 13:44:29.036901  # ok 55 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2@4ac # SKIP
 2215 13:44:29.112460  # ok 56 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-gpio0-dbclk-mux@53c # SKIP
 2216 13:44:29.188338  # ok 57 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-ieee5000-fck-1@e4 # SKIP
 2217 13:44:29.260847  # ok 58 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3-gclk # SKIP
 2218 13:44:29.342099  # ok 59 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3s-gclk # SKIP
 2219 13:44:29.413377  # ok 60 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4-rtc-gclk # SKIP
 2220 13:44:29.489930  # ok 61 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4fw-gclk # SKIP
 2221 13:44:29.564656  # ok 62 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4hs-gclk # SKIP
 2222 13:44:29.643393  # ok 63 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4ls-gclk # SKIP
 2223 13:44:29.717937  # ok 64 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-lcd-gclk@534 # SKIP
 2224 13:44:29.790094  # ok 65 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmc # SKIP
 2225 13:44:29.865068  # ok 66 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmu-fck-1@914 # SKIP
 2226 13:44:29.945218  # ok 67 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-pruss-ocp-gclk@530 # SKIP
 2227 13:44:30.017660  # ok 68 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-sysclk-div # SKIP
 2228 13:44:30.091362  # ok 69 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-tclkin # SKIP
 2229 13:44:30.167044  # ok 70 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer1-fck@528 # SKIP
 2230 13:44:30.242759  # ok 71 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer2-fck@508 # SKIP
 2231 13:44:30.317469  # ok 72 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer3-fck@50c # SKIP
 2232 13:44:30.392185  # ok 73 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer4-fck@510 # SKIP
 2233 13:44:30.466790  # ok 74 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer5-fck@518 # SKIP
 2234 13:44:30.542521  # ok 75 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer6-fck@51c # SKIP
 2235 13:44:30.617243  # ok 76 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer7-fck@504 # SKIP
 2236 13:44:30.697135  # ok 77 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-usbotg-fck-8@47c # SKIP
 2237 13:44:30.767469  # ok 78 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-19200000 # SKIP
 2238 13:44:30.843174  # ok 79 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-24000000 # SKIP
 2239 13:44:30.917873  # ok 80 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-25000000 # SKIP
 2240 13:44:30.992390  # ok 81 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-26000000 # SKIP
 2241 13:44:31.069153  # ok 82 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-wdt1-fck@538 # SKIP
 2242 13:44:31.143692  # ok 83 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@488 # SKIP
 2243 13:44:31.225542  # ok 84 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@48c # SKIP
 2244 13:44:31.296885  # ok 85 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@490 # SKIP
 2245 13:44:31.375633  # ok 86 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@494 # SKIP
 2246 13:44:31.447097  # ok 87 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@498 # SKIP
 2247 13:44:31.521485  # ok 88 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c # SKIP
 2248 13:44:31.602989  # ok 89 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fck-div@0 # SKIP
 2249 13:44:31.675754  # ok 90 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fclk-clksel@1 # SKIP
 2250 13:44:31.749906  # ok 91 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700 # SKIP
 2251 13:44:31.826035  # ok 92 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2-div@3 # SKIP
 2252 13:44:31.905085  # ok 93 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2@7 # SKIP
 2253 13:44:31.978863  # ok 94 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-sysclkout-pre@0 # SKIP
 2254 13:44:31.998327  # ok 95 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1000
 2255 13:44:32.022980  # ok 96 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100
 2256 13:44:32.052272  # ok 97 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1200
 2257 13:44:32.075891  # ok 98 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00
 2258 13:44:32.097456  # ok 99 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00
 2259 13:44:32.121235  # ok 100 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@e00
 2260 13:44:32.152392  # ok 101 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00
 2261 13:44:32.175005  # ok 102 /ocp/interconnect@44c00000/segment@200000/target-module@10000
 2262 13:44:32.281979  # not ok 103 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0
 2263 13:44:32.307996  # ok 104 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620
 2264 13:44:32.337119  # ok 105 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90
 2265 13:44:32.357488  # ok 106 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800
 2266 13:44:32.468655  # not ok 107 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0
 2267 13:44:32.545606  # ok 108 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-adc-tsc-fck # SKIP
 2268 13:44:32.621249  # ok 109 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-aes0-fck # SKIP
 2269 13:44:32.697347  # ok 110 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan0-fck # SKIP
 2270 13:44:32.773298  # ok 111 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan1-fck # SKIP
 2271 13:44:32.849346  # ok 112 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp0-fck # SKIP
 2272 13:44:32.928474  # ok 113 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp1-fck # SKIP
 2273 13:44:33.003236  # ok 114 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-rng-fck # SKIP
 2274 13:44:33.073879  # ok 115 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sha0-fck # SKIP
 2275 13:44:33.150965  # ok 116 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex0-fck # SKIP
 2276 13:44:33.226969  # ok 117 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex1-fck # SKIP
 2277 13:44:33.301345  # ok 118 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sys-clkin-22@40 # SKIP
 2278 13:44:33.376157  # ok 119 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664 # SKIP
 2279 13:44:33.454410  # ok 120 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm0-tbclk@0 # SKIP
 2280 13:44:33.533842  # ok 121 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm1-tbclk@1 # SKIP
 2281 13:44:33.608889  # ok 122 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm2-tbclk@2 # SKIP
 2282 13:44:33.634085  # ok 123 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel
 2283 13:44:33.706422  # not ok 124 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324
 2284 13:44:33.783415  # not ok 125 /ocp/interconnect@44c00000/segment@200000/target-module@31000
 2285 13:44:33.852603  # ok 126 /ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0 # SKIP
 2286 13:44:33.876277  # ok 127 /ocp/interconnect@44c00000/segment@200000/target-module@35000
 2287 13:44:33.954846  # not ok 128 /ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0
 2288 13:44:33.974401  # ok 129 /ocp/interconnect@44c00000/segment@200000/target-module@3e000
 2289 13:44:34.048529  # not ok 130 /ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0
 2290 13:44:34.075353  # ok 131 /ocp/interconnect@44c00000/segment@200000/target-module@7000
 2291 13:44:34.097690  # ok 132 /ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0
 2292 13:44:34.121200  # ok 133 /ocp/interconnect@44c00000/segment@200000/target-module@9000
 2293 13:44:34.150513  # ok 134 /ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0
 2294 13:44:34.173980  # ok 135 /ocp/interconnect@44c00000/segment@200000/target-module@b000
 2295 13:44:34.194421  # ok 136 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0
 2296 13:44:34.225494  # ok 137 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50
 2297 13:44:34.299251  # ok 138 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50/nvmem-layout # SKIP
 2298 13:44:34.320980  # ok 139 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
 2299 13:44:34.343266  # ok 140 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24
 2300 13:44:34.422309  # not ok 141 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/charger
 2301 13:44:34.493093  # not ok 142 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/pwrbutton
 2302 13:44:34.514993  # ok 143 /ocp/interconnect@44c00000/segment@200000/target-module@d000
 2303 13:44:34.617545  # not ok 144 /ocp/interconnect@47c00000
 2304 13:44:34.692581  # not ok 145 /ocp/interconnect@47c00000/segment@0
 2305 13:44:34.710192  # ok 146 /ocp/interconnect@48000000
 2306 13:44:34.739195  # ok 147 /ocp/interconnect@48000000/segment@0
 2307 13:44:34.759232  # ok 148 /ocp/interconnect@48000000/segment@0/target-module@22000
 2308 13:44:34.784084  # ok 149 /ocp/interconnect@48000000/segment@0/target-module@24000
 2309 13:44:34.806391  # ok 150 /ocp/interconnect@48000000/segment@0/target-module@2a000
 2310 13:44:34.833986  # ok 151 /ocp/interconnect@48000000/segment@0/target-module@30000
 2311 13:44:34.856427  # ok 152 /ocp/interconnect@48000000/segment@0/target-module@38000
 2312 13:44:34.879007  # ok 153 /ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0
 2313 13:44:34.901460  # ok 154 /ocp/interconnect@48000000/segment@0/target-module@3c000
 2314 13:44:34.973707  # not ok 155 /ocp/interconnect@48000000/segment@0/target-module@40000
 2315 13:44:35.047413  # ok 156 /ocp/interconnect@48000000/segment@0/target-module@40000/timer@0 # SKIP
 2316 13:44:35.074209  # ok 157 /ocp/interconnect@48000000/segment@0/target-module@42000
 2317 13:44:35.101051  # ok 158 /ocp/interconnect@48000000/segment@0/target-module@42000/timer@0
 2318 13:44:35.123213  # ok 159 /ocp/interconnect@48000000/segment@0/target-module@44000
 2319 13:44:35.144512  # ok 160 /ocp/interconnect@48000000/segment@0/target-module@44000/timer@0
 2320 13:44:35.167221  # ok 161 /ocp/interconnect@48000000/segment@0/target-module@46000
 2321 13:44:35.191492  # ok 162 /ocp/interconnect@48000000/segment@0/target-module@46000/timer@0
 2322 13:44:35.215177  # ok 163 /ocp/interconnect@48000000/segment@0/target-module@48000
 2323 13:44:35.243816  # ok 164 /ocp/interconnect@48000000/segment@0/target-module@48000/timer@0
 2324 13:44:35.263296  # ok 165 /ocp/interconnect@48000000/segment@0/target-module@4a000
 2325 13:44:35.287425  # ok 166 /ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0
 2326 13:44:35.310025  # ok 167 /ocp/interconnect@48000000/segment@0/target-module@4c000
 2327 13:44:35.338764  # ok 168 /ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0
 2328 13:44:35.357571  # ok 169 /ocp/interconnect@48000000/segment@0/target-module@60000
 2329 13:44:35.383293  # ok 170 /ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0
 2330 13:44:35.405800  # ok 171 /ocp/interconnect@48000000/segment@0/target-module@c8000
 2331 13:44:35.430215  # ok 172 /ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0
 2332 13:44:35.453542  # ok 173 /ocp/interconnect@48000000/segment@0/target-module@ca000
 2333 13:44:35.482214  # ok 174 /ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0
 2334 13:44:35.502805  # ok 175 /ocp/interconnect@48000000/segment@100000
 2335 13:44:35.525452  # ok 176 /ocp/interconnect@48000000/segment@100000/target-module@9c000
 2336 13:44:35.555226  # ok 177 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0
 2337 13:44:35.627664  # not ok 178 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54
 2338 13:44:35.703126  # ok 179 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54/nvmem-layout # SKIP
 2339 13:44:35.774535  # not ok 180 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55
 2340 13:44:35.851360  # ok 181 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55/nvmem-layout # SKIP
 2341 13:44:35.923843  # not ok 182 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56
 2342 13:44:35.999497  # ok 183 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56/nvmem-layout # SKIP
 2343 13:44:36.069411  # not ok 184 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57
 2344 13:44:36.143045  # ok 185 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57/nvmem-layout # SKIP
 2345 13:44:36.163317  # ok 186 /ocp/interconnect@48000000/segment@100000/target-module@a0000
 2346 13:44:36.188093  # ok 187 /ocp/interconnect@48000000/segment@100000/target-module@a6000
 2347 13:44:36.211519  # ok 188 /ocp/interconnect@48000000/segment@100000/target-module@a8000
 2348 13:44:36.239205  # ok 189 /ocp/interconnect@48000000/segment@100000/target-module@aa000
 2349 13:44:36.264000  # ok 190 /ocp/interconnect@48000000/segment@100000/target-module@ac000
 2350 13:44:36.284507  # ok 191 /ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0
 2351 13:44:36.308078  # ok 192 /ocp/interconnect@48000000/segment@100000/target-module@ae000
 2352 13:44:36.334951  # ok 193 /ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0
 2353 13:44:36.356167  # ok 194 /ocp/interconnect@48000000/segment@100000/target-module@cc000
 2354 13:44:36.378534  # ok 195 /ocp/interconnect@48000000/segment@100000/target-module@d0000
 2355 13:44:36.407796  # ok 196 /ocp/interconnect@48000000/segment@100000/target-module@d8000
 2356 13:44:36.430184  # ok 197 /ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0
 2357 13:44:36.451546  # ok 198 /ocp/interconnect@48000000/segment@200000
 2358 13:44:36.478292  # ok 199 /ocp/interconnect@48000000/segment@200000/target-module@0
 2359 13:44:36.552288  # ok 200 /ocp/interconnect@48000000/segment@200000/target-module@0/mpu@0 # SKIP
 2360 13:44:36.573210  # ok 201 /ocp/interconnect@48000000/segment@300000
 2361 13:44:36.603150  # ok 202 /ocp/interconnect@48000000/segment@300000/target-module@0
 2362 13:44:36.628963  # ok 203 /ocp/interconnect@48000000/segment@300000/target-module@10000
 2363 13:44:36.654696  # ok 204 /ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0
 2364 13:44:36.674152  # ok 205 /ocp/interconnect@48000000/segment@300000/target-module@2000
 2365 13:44:36.703061  # ok 206 /ocp/interconnect@48000000/segment@300000/target-module@4000
 2366 13:44:36.724557  # ok 207 /ocp/interconnect@48000000/segment@300000/target-module@e000
 2367 13:44:36.797381  # not ok 208 /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
 2368 13:44:36.816165  # ok 209 /ocp/interconnect@4a000000
 2369 13:44:36.842598  # ok 210 /ocp/interconnect@4a000000/segment@0
 2370 13:44:36.867163  # ok 211 /ocp/interconnect@4a000000/segment@0/target-module@100000
 2371 13:44:36.892845  # ok 212 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0
 2372 13:44:36.918515  # ok 213 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000
 2373 13:44:36.940953  # ok 214 /ocp/interconnect@4a000000/segment@0/target-module@300000
 2374 13:44:37.019412  # not ok 215 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0
 2375 13:44:37.130245  # ok 216 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000 # SKIP
 2376 13:44:37.208034  # not ok 217 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000
 2377 13:44:37.312111  # ok 218 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000 # SKIP
 2378 13:44:37.385676  # not ok 219 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000
 2379 13:44:37.459795  # not ok 220 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000
 2380 13:44:37.590327  # not ok 221 /ocp/interconnect@4b140000
 2381 13:44:37.637780  # not ok 222 /ocp/interconnect@4b140000/segment@0
 2382 13:44:37.711802  # ok 223 /ocp/interrupt-controller@48200000 # SKIP
 2383 13:44:37.733550  # ok 224 /ocp/target-module@40300000
 2384 13:44:37.762028  # ok 225 /ocp/target-module@40300000/sram@0
 2385 13:44:37.834387  # ok 226 /ocp/target-module@40300000/sram@0/pm-code-sram@0 # SKIP
 2386 13:44:37.908464  # ok 227 /ocp/target-module@40300000/sram@0/pm-data-sram@1000 # SKIP
 2387 13:44:37.931467  # ok 228 /ocp/target-module@47400000
 2388 13:44:37.954801  # ok 229 /ocp/target-module@47400000/dma-controller@2000
 2389 13:44:37.977958  # ok 230 /ocp/target-module@47400000/usb-phy@1300
 2390 13:44:38.001268  # ok 231 /ocp/target-module@47400000/usb-phy@1b00
 2391 13:44:38.028762  # ok 232 /ocp/target-module@47400000/usb@1400
 2392 13:44:38.046351  # ok 233 /ocp/target-module@47400000/usb@1800
 2393 13:44:38.071790  # ok 234 /ocp/target-module@47810000
 2394 13:44:38.095935  # ok 235 /ocp/target-module@49000000
 2395 13:44:38.120385  # ok 236 /ocp/target-module@49000000/dma@0
 2396 13:44:38.141461  # ok 237 /ocp/target-module@49800000
 2397 13:44:38.168078  # ok 238 /ocp/target-module@49800000/dma@0
 2398 13:44:38.183548  # ok 239 /ocp/target-module@49900000
 2399 13:44:38.208477  # ok 240 /ocp/target-module@49900000/dma@0
 2400 13:44:38.235851  # ok 241 /ocp/target-module@49a00000
 2401 13:44:38.260246  # ok 242 /ocp/target-module@49a00000/dma@0
 2402 13:44:38.277270  # ok 243 /ocp/target-module@4c000000
 2403 13:44:38.353086  # not ok 244 /ocp/target-module@4c000000/emif@0
 2404 13:44:38.378286  # ok 245 /ocp/target-module@50000000
 2405 13:44:38.399578  # ok 246 /ocp/target-module@53100000
 2406 13:44:38.473120  # not ok 247 /ocp/target-module@53100000/sham@0
 2407 13:44:38.498518  # ok 248 /ocp/target-module@53500000
 2408 13:44:38.572535  # not ok 249 /ocp/target-module@53500000/aes@0
 2409 13:44:38.590078  # ok 250 /ocp/target-module@56000000
 2410 13:44:38.703035  # ok 251 /ocp/target-module@56000000/gpu@0 # SKIP
 2411 13:44:38.770303  # ok 252 /opp-table # SKIP
 2412 13:44:38.841247  # ok 253 /soc # SKIP
 2413 13:44:38.864150  # ok 254 /sound
 2414 13:44:38.891570  # ok 255 /target-module@4b000000
 2415 13:44:38.913794  # ok 256 /target-module@4b000000/target-module@140000
 2416 13:44:38.935264  # ok 257 /target-module@4b000000/target-module@140000/pmu@0
 2417 13:44:38.943291  # # Totals: pass:117 fail:27 xfail:0 xpass:0 skip:113 error:0
 2418 13:44:38.951529  not ok 1 selftests: dt: test_unprobed_devices.sh # exit=1
 2419 13:44:41.407708  dt_test_unprobed_devices_sh_ skip
 2420 13:44:41.413511  dt_test_unprobed_devices_sh_clk_mcasp0 pass
 2421 13:44:41.419800  dt_test_unprobed_devices_sh_clk_mcasp0_fixed skip
 2422 13:44:41.419982  dt_test_unprobed_devices_sh_cpus_cpu_0 skip
 2423 13:44:41.427046  dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate skip
 2424 13:44:41.427350  dt_test_unprobed_devices_sh_fixedregulator0 pass
 2425 13:44:41.433092  dt_test_unprobed_devices_sh_leds pass
 2426 13:44:41.438093  dt_test_unprobed_devices_sh_ocp pass
 2427 13:44:41.442853  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 pass
 2428 13:44:41.447948  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 pass
 2429 13:44:41.454021  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 pass
 2430 13:44:41.463650  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 pass
 2431 13:44:41.468635  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 fail
 2432 13:44:41.479581  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 pass
 2433 13:44:41.484476  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 pass
 2434 13:44:41.495612  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 fail
 2435 13:44:41.505257  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 skip
 2436 13:44:41.516434  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 skip
 2437 13:44:41.521272  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 skip
 2438 13:44:41.537072  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c skip
 2439 13:44:41.542099  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 skip
 2440 13:44:41.551770  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c skip
 2441 13:44:41.562798  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 skip
 2442 13:44:41.572513  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 skip
 2443 13:44:41.583538  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 skip
 2444 13:44:41.593281  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 skip
 2445 13:44:41.604249  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 skip
 2446 13:44:41.614152  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 skip
 2447 13:44:41.623720  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 skip
 2448 13:44:41.634953  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 skip
 2449 13:44:41.645861  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 skip
 2450 13:44:41.655530  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 skip
 2451 13:44:41.661780  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 skip
 2452 13:44:41.671482  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 skip
 2453 13:44:41.682666  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 skip
 2454 13:44:41.692373  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 skip
 2455 13:44:41.703502  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 skip
 2456 13:44:41.713350  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz skip
 2457 13:44:41.724518  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 skip
 2458 13:44:41.734282  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k skip
 2459 13:44:41.745380  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k skip
 2460 13:44:41.755217  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk skip
 2461 13:44:41.766255  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 skip
 2462 13:44:41.779935  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 skip
 2463 13:44:41.792167  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 skip
 2464 13:44:41.802004  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 skip
 2465 13:44:41.812017  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 skip
 2466 13:44:41.821975  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 skip
 2467 13:44:41.833203  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 skip
 2468 13:44:41.844153  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 skip
 2469 13:44:41.855165  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 skip
 2470 13:44:41.865218  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 skip
 2471 13:44:41.876083  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 skip
 2472 13:44:41.892013  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm skip
 2473 13:44:41.901630  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac skip
 2474 13:44:41.912948  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c skip
 2475 13:44:41.927753  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 skip
 2476 13:44:41.933873  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk skip
 2477 13:44:41.948727  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk skip
 2478 13:44:41.953896  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk skip
 2479 13:44:41.969877  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk skip
 2480 13:44:41.976038  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk skip
 2481 13:44:41.990930  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk skip
 2482 13:44:42.001731  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 skip
 2483 13:44:42.011681  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc skip
 2484 13:44:42.022680  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 skip
 2485 13:44:42.032461  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 skip
 2486 13:44:42.043447  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div skip
 2487 13:44:42.053169  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin skip
 2488 13:44:42.064220  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 skip
 2489 13:44:42.074069  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 skip
 2490 13:44:42.084957  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c skip
 2491 13:44:42.094974  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 skip
 2492 13:44:42.105943  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 skip
 2493 13:44:42.121890  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c skip
 2494 13:44:42.131534  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 skip
 2495 13:44:42.142692  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c skip
 2496 13:44:42.152447  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 skip
 2497 13:44:42.163534  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 skip
 2498 13:44:42.173187  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 skip
 2499 13:44:42.184349  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 skip
 2500 13:44:42.194002  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 skip
 2501 13:44:42.205189  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 skip
 2502 13:44:42.214769  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c skip
 2503 13:44:42.225917  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 skip
 2504 13:44:42.235494  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 skip
 2505 13:44:42.246659  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 skip
 2506 13:44:42.256294  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c skip
 2507 13:44:42.267469  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 skip
 2508 13:44:42.282222  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 skip
 2509 13:44:42.288210  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 skip
 2510 13:44:42.302966  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 skip
 2511 13:44:42.313845  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 skip
 2512 13:44:42.323766  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 skip
 2513 13:44:42.334783  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 pass
 2514 13:44:42.344585  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 pass
 2515 13:44:42.355536  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 pass
 2516 13:44:42.360318  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 pass
 2517 13:44:42.371460  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 pass
 2518 13:44:42.381092  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 pass
 2519 13:44:42.392211  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 pass
 2520 13:44:42.397238  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 pass
 2521 13:44:42.407206  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 fail
 2522 13:44:42.417836  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 pass
 2523 13:44:42.427793  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 pass
 2524 13:44:42.438767  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 pass
 2525 13:44:42.448563  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 fail
 2526 13:44:42.459537  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck skip
 2527 13:44:42.469289  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck skip
 2528 13:44:42.480399  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck skip
 2529 13:44:42.496337  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck skip
 2530 13:44:42.505971  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck skip
 2531 13:44:42.517131  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck skip
 2532 13:44:42.531908  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck skip
 2533 13:44:42.542908  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck skip
 2534 13:44:42.552707  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck skip
 2535 13:44:42.563715  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck skip
 2536 13:44:42.579549  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 skip
 2537 13:44:42.589237  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 skip
 2538 13:44:42.605201  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 skip
 2539 13:44:42.615083  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 skip
 2540 13:44:42.630774  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 skip
 2541 13:44:42.641928  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel pass
 2542 13:44:42.651533  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 fail
 2543 13:44:42.656548  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 fail
 2544 13:44:42.667642  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 skip
 2545 13:44:42.677412  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 pass
 2546 13:44:42.683575  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 fail
 2547 13:44:42.693254  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 pass
 2548 13:44:42.704439  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 fail
 2549 13:44:42.709291  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 pass
 2550 13:44:42.719217  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 pass
 2551 13:44:42.729113  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 pass
 2552 13:44:42.735025  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 pass
 2553 13:44:42.746184  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 pass
 2554 13:44:42.755775  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 pass
 2555 13:44:42.766822  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 pass
 2556 13:44:42.776648  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout skip
 2557 13:44:42.787839  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 pass
 2558 13:44:42.792662  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 pass
 2559 13:44:42.802695  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger fail
 2560 13:44:42.813629  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton fail
 2561 13:44:42.823452  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 pass
 2562 13:44:42.829572  dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 fail
 2563 13:44:42.834407  dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 fail
 2564 13:44:42.839328  dt_test_unprobed_devices_sh_ocp_interconnect_48000000 pass
 2565 13:44:42.844310  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 pass
 2566 13:44:42.855283  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 pass
 2567 13:44:42.865054  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 pass
 2568 13:44:42.871197  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 pass
 2569 13:44:42.876094  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 pass
 2570 13:44:42.885897  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 pass
 2571 13:44:42.896841  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 pass
 2572 13:44:42.901742  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 pass
 2573 13:44:42.912906  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 fail
 2574 13:44:42.917830  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 skip
 2575 13:44:42.927545  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 pass
 2576 13:44:42.933622  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 pass
 2577 13:44:42.943315  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 pass
 2578 13:44:42.948309  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 pass
 2579 13:44:42.959338  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 pass
 2580 13:44:42.969272  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 pass
 2581 13:44:42.975442  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 pass
 2582 13:44:42.985067  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 pass
 2583 13:44:42.990130  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 pass
 2584 13:44:43.001127  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 pass
 2585 13:44:43.010901  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 pass
 2586 13:44:43.017090  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 pass
 2587 13:44:43.026646  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 pass
 2588 13:44:43.031663  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 pass
 2589 13:44:43.042708  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 pass
 2590 13:44:43.047551  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 pass
 2591 13:44:43.058711  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 pass
 2592 13:44:43.063537  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 pass
 2593 13:44:43.073289  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 pass
 2594 13:44:43.079457  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 pass
 2595 13:44:43.089139  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 pass
 2596 13:44:43.099126  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 fail
 2597 13:44:43.110023  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout skip
 2598 13:44:43.120200  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 fail
 2599 13:44:43.131431  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout skip
 2600 13:44:43.142406  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 fail
 2601 13:44:43.153566  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout skip
 2602 13:44:43.164434  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 fail
 2603 13:44:43.176913  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout skip
 2604 13:44:43.187003  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 pass
 2605 13:44:43.193219  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 pass
 2606 13:44:43.204118  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 pass
 2607 13:44:43.210188  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 pass
 2608 13:44:43.215200  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 pass
 2609 13:44:43.226207  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 pass
 2610 13:44:43.237101  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 pass
 2611 13:44:43.243232  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 pass
 2612 13:44:43.254206  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 pass
 2613 13:44:43.260345  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 pass
 2614 13:44:43.271270  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 pass
 2615 13:44:43.276340  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 pass
 2616 13:44:43.282596  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 pass
 2617 13:44:43.291258  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 pass
 2618 13:44:43.302444  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 skip
 2619 13:44:43.308428  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 pass
 2620 13:44:43.313690  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 pass
 2621 13:44:43.324770  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 pass
 2622 13:44:43.334571  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 pass
 2623 13:44:43.340837  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 pass
 2624 13:44:43.350669  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 pass
 2625 13:44:43.355657  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 pass
 2626 13:44:43.366665  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 fail
 2627 13:44:43.371392  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 pass
 2628 13:44:43.376415  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 pass
 2629 13:44:43.387370  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 pass
 2630 13:44:43.392307  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 pass
 2631 13:44:43.403456  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 pass
 2632 13:44:43.413115  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 pass
 2633 13:44:43.418091  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 fail
 2634 13:44:43.429206  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 skip
 2635 13:44:43.438906  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 fail
 2636 13:44:43.449860  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 skip
 2637 13:44:43.459594  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 fail
 2638 13:44:43.470694  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 fail
 2639 13:44:43.475496  dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 fail
 2640 13:44:43.480564  dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 fail
 2641 13:44:43.486703  dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 skip
 2642 13:44:43.491488  dt_test_unprobed_devices_sh_ocp_target-module_40300000 pass
 2643 13:44:43.496050  dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 pass
 2644 13:44:43.507581  dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 skip
 2645 13:44:43.512388  dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 skip
 2646 13:44:43.517252  dt_test_unprobed_devices_sh_ocp_target-module_47400000 pass
 2647 13:44:43.528422  dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 pass
 2648 13:44:43.533281  dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 pass
 2649 13:44:43.537807  dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 pass
 2650 13:44:43.543148  dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 pass
 2651 13:44:43.549206  dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 pass
 2652 13:44:43.552979  dt_test_unprobed_devices_sh_ocp_target-module_47810000 pass
 2653 13:44:43.564065  dt_test_unprobed_devices_sh_ocp_target-module_49000000 pass
 2654 13:44:43.570080  dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 pass
 2655 13:44:43.575040  dt_test_unprobed_devices_sh_ocp_target-module_49800000 pass
 2656 13:44:43.579836  dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 pass
 2657 13:44:43.584719  dt_test_unprobed_devices_sh_ocp_target-module_49900000 pass
 2658 13:44:43.590882  dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 pass
 2659 13:44:43.595820  dt_test_unprobed_devices_sh_ocp_target-module_49a00000 pass
 2660 13:44:43.600475  dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 pass
 2661 13:44:43.605518  dt_test_unprobed_devices_sh_ocp_target-module_4c000000 pass
 2662 13:44:43.611619  dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 fail
 2663 13:44:43.616521  dt_test_unprobed_devices_sh_ocp_target-module_50000000 pass
 2664 13:44:43.621265  dt_test_unprobed_devices_sh_ocp_target-module_53100000 pass
 2665 13:44:43.626427  dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 fail
 2666 13:44:43.632550  dt_test_unprobed_devices_sh_ocp_target-module_53500000 pass
 2667 13:44:43.637355  dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 fail
 2668 13:44:43.647318  dt_test_unprobed_devices_sh_ocp_target-module_56000000 pass
 2669 13:44:43.653560  dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 skip
 2670 13:44:43.653944  dt_test_unprobed_devices_sh_opp-table skip
 2671 13:44:43.658317  dt_test_unprobed_devices_sh_soc skip
 2672 13:44:43.663093  dt_test_unprobed_devices_sh_sound pass
 2673 13:44:43.668154  dt_test_unprobed_devices_sh_target-module_4b000000 pass
 2674 13:44:43.674138  dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 pass
 2675 13:44:43.678018  dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 pass
 2676 13:44:43.683921  dt_test_unprobed_devices_sh fail
 2677 13:44:43.688389  + ../../utils/send-to-lava.sh ./output/result.txt
 2678 13:44:43.837093  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-dt RESULT=pass>
 2679 13:44:43.838315  Received signal: <TESTCASE> TEST_CASE_ID=shardfile-dt RESULT=pass
 2681 13:44:44.026138  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip>
 2682 13:44:44.026755  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip
 2684 13:44:44.218248  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass>
 2685 13:44:44.218869  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass
 2687 13:44:44.410015  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip>
 2688 13:44:44.410626  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip
 2690 13:44:44.604093  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip>
 2691 13:44:44.604706  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip
 2693 13:44:44.788169  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip>
 2694 13:44:44.788802  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip
 2696 13:44:44.992208  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass>
 2697 13:44:44.992842  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass
 2699 13:44:45.168502  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass>
 2700 13:44:45.169140  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass
 2702 13:44:45.351328  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass>
 2703 13:44:45.351938  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass
 2705 13:44:45.543759  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass>
 2706 13:44:45.544374  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass
 2708 13:44:45.728959  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass>
 2709 13:44:45.729572  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass
 2711 13:44:45.919756  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass>
 2712 13:44:45.920371  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass
 2714 13:44:46.123264  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass>
 2715 13:44:46.123879  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass
 2717 13:44:46.305711  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail>
 2718 13:44:46.306329  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail
 2720 13:44:46.489034  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass>
 2721 13:44:46.489649  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass
 2723 13:44:46.690374  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass>
 2724 13:44:46.690986  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass
 2726 13:44:46.883391  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail>
 2727 13:44:46.884005  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail
 2729 13:44:47.091139  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip>
 2730 13:44:47.091760  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip
 2732 13:44:47.285424  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip>
 2733 13:44:47.286045  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip
 2735 13:44:47.484971  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip>
 2736 13:44:47.485587  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip
 2738 13:44:47.715119  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip>
 2739 13:44:47.715736  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip
 2741 13:44:47.903094  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip>
 2742 13:44:47.903711  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip
 2744 13:44:48.085473  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip>
 2745 13:44:48.086092  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip
 2747 13:44:48.287065  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip>
 2748 13:44:48.287699  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip
 2750 13:44:48.467927  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip>
 2751 13:44:48.468541  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip
 2753 13:44:48.666182  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip>
 2754 13:44:48.666798  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip
 2756 13:44:48.858259  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip>
 2757 13:44:48.858876  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip
 2759 13:44:49.079340  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip>
 2760 13:44:49.079971  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip
 2762 13:44:49.283782  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip>
 2763 13:44:49.284405  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip
 2765 13:44:49.475053  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip>
 2766 13:44:49.475674  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip
 2768 13:44:49.661902  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip>
 2769 13:44:49.662521  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip
 2771 13:44:49.846670  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip>
 2772 13:44:49.847291  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip
 2774 13:44:50.054438  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip>
 2775 13:44:50.055064  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip
 2777 13:44:50.277147  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip>
 2778 13:44:50.277770  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip
 2780 13:44:50.503942  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip>
 2781 13:44:50.504563  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip
 2783 13:44:50.686559  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip>
 2784 13:44:50.687178  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip
 2786 13:44:50.884972  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip>
 2787 13:44:50.885594  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip
 2789 13:44:51.075294  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip>
 2790 13:44:51.075916  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip
 2792 13:44:51.261997  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip>
 2793 13:44:51.262613  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip
 2795 13:44:51.462838  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip>
 2796 13:44:51.463457  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip
 2798 13:44:51.645594  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip>
 2799 13:44:51.646215  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip
 2801 13:44:52.176570  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip>
 2802 13:44:52.177348  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip
 2804 13:44:52.372154  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip>
 2805 13:44:52.372777  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip
 2807 13:44:52.562267  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip>
 2808 13:44:52.562887  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip
 2810 13:44:52.799085  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip>
 2811 13:44:52.799710  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip
 2813 13:44:52.990479  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip>
 2814 13:44:52.991101  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip
 2816 13:44:53.182282  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip>
 2817 13:44:53.182911  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip
 2819 13:44:53.374024  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip>
 2820 13:44:53.374647  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip
 2822 13:44:53.572526  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip>
 2823 13:44:53.573169  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip
 2825 13:44:53.774339  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip>
 2826 13:44:53.774966  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip
 2828 13:44:53.952917  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip>
 2829 13:44:53.953538  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip
 2831 13:44:54.119821  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip>
 2832 13:44:54.120443  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip
 2834 13:44:54.313613  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip>
 2835 13:44:54.314233  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip
 2837 13:44:54.483441  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip>
 2838 13:44:54.484058  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip
 2840 13:44:54.690611  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip>
 2841 13:44:54.691230  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip
 2843 13:44:54.872466  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip>
 2844 13:44:54.873107  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip
 2846 13:44:55.057236  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip>
 2847 13:44:55.057858  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip
 2849 13:44:55.240038  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip>
 2850 13:44:55.240656  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip
 2852 13:44:55.415366  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip>
 2853 13:44:55.415985  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip
 2855 13:44:55.589942  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip>
 2856 13:44:55.590565  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip
 2858 13:44:55.787837  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip>
 2859 13:44:55.788453  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip
 2861 13:44:55.985764  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip>
 2862 13:44:55.986381  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip
 2864 13:44:56.166142  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip>
 2865 13:44:56.166762  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip
 2867 13:44:56.342075  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip>
 2868 13:44:56.342697  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip
 2870 13:44:56.524052  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip>
 2871 13:44:56.524671  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip
 2873 13:44:56.740422  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip>
 2874 13:44:56.741060  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip
 2876 13:44:58.326949  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip>
 2877 13:44:58.327703  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip
 2879 13:44:58.542490  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip>
 2880 13:44:58.543111  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip
 2882 13:44:58.752116  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip>
 2883 13:44:58.752734  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip
 2885 13:44:58.946374  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip>
 2886 13:44:58.946999  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip
 2888 13:44:59.126075  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip>
 2889 13:44:59.126706  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip
 2891 13:44:59.342970  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip>
 2892 13:44:59.343598  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip
 2894 13:44:59.543102  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip>
 2895 13:44:59.543724  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip
 2897 13:44:59.731183  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip>
 2898 13:44:59.731803  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip
 2900 13:44:59.939265  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip>
 2901 13:44:59.939889  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip
 2903 13:45:00.158411  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip>
 2904 13:45:00.159032  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip
 2906 13:45:00.350610  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip>
 2907 13:45:00.351231  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip
 2909 13:45:00.534522  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip>
 2910 13:45:00.535141  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip
 2912 13:45:00.723411  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip>
 2913 13:45:00.724027  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip
 2915 13:45:00.933475  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip>
 2916 13:45:00.934099  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip
 2918 13:45:01.125870  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip>
 2919 13:45:01.126487  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip
 2921 13:45:01.360281  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip>
 2922 13:45:01.360876  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip
 2924 13:45:01.527239  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip>
 2925 13:45:01.527860  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip
 2927 13:45:01.709931  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip>
 2928 13:45:01.710642  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip
 2930 13:45:01.896774  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip>
 2931 13:45:01.897498  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip
 2933 13:45:02.079241  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip>
 2934 13:45:02.079858  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip
 2936 13:45:02.266111  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip>
 2937 13:45:02.266731  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip
 2939 13:45:02.442200  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip>
 2940 13:45:02.442897  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip
 2942 13:45:02.630166  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip>
 2943 13:45:02.630872  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip
 2945 13:45:02.803620  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip>
 2946 13:45:02.804318  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip
 2948 13:45:02.971945  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip>
 2949 13:45:02.972650  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip
 2951 13:45:03.152366  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip>
 2952 13:45:03.153093  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip
 2954 13:45:03.342031  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip>
 2955 13:45:03.342721  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip
 2957 13:45:03.553964  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip>
 2958 13:45:03.554648  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip
 2960 13:45:03.761073  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip>
 2961 13:45:03.761783  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip
 2963 13:45:03.933958  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass>
 2964 13:45:03.934662  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass
 2966 13:45:04.092166  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass>
 2967 13:45:04.092878  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass
 2969 13:45:04.264173  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass>
 2970 13:45:04.264875  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass
 2972 13:45:04.464903  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass>
 2973 13:45:04.465526  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass
 2975 13:45:04.651893  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass>
 2976 13:45:04.652513  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass
 2978 13:45:04.827060  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass>
 2979 13:45:04.827681  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass
 2981 13:45:05.001499  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass>
 2982 13:45:05.002119  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass
 2984 13:45:05.193299  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass>
 2985 13:45:05.193914  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass
 2987 13:45:05.376554  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail>
 2988 13:45:05.377021  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail
 2990 13:45:05.587078  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass>
 2991 13:45:05.587512  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass
 2993 13:45:05.761707  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass>
 2994 13:45:05.762147  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass
 2996 13:45:05.933826  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass>
 2997 13:45:05.934243  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass
 2999 13:45:06.187257  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail>
 3000 13:45:06.187719  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail
 3002 13:45:06.372837  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip>
 3003 13:45:06.373369  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip
 3005 13:45:06.596177  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip>
 3006 13:45:06.596636  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip
 3008 13:45:06.789787  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip>
 3009 13:45:06.790210  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip
 3011 13:45:06.989751  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip>
 3012 13:45:06.990431  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip
 3014 13:45:07.165441  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip>
 3015 13:45:07.166035  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip
 3017 13:45:07.340563  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip>
 3018 13:45:07.341221  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip
 3020 13:45:07.512034  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip>
 3021 13:45:07.512666  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip
 3023 13:45:07.688580  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip>
 3024 13:45:07.689242  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip
 3026 13:45:07.872737  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip>
 3027 13:45:07.873392  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip
 3029 13:45:08.066501  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip>
 3030 13:45:08.067126  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip
 3032 13:45:08.238922  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip>
 3033 13:45:08.239562  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip
 3035 13:45:08.415291  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip>
 3036 13:45:08.415917  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip
 3038 13:45:08.637428  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip
 3040 13:45:08.640475  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip>
 3041 13:45:08.814564  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip
 3043 13:45:08.817550  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip>
 3044 13:45:09.005992  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip
 3046 13:45:09.008993  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip>
 3047 13:45:09.203403  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass>
 3048 13:45:09.204032  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass
 3050 13:45:09.387172  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail>
 3051 13:45:09.387795  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail
 3053 13:45:09.560841  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail>
 3054 13:45:09.561469  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail
 3056 13:45:09.739001  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip>
 3057 13:45:09.739623  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip
 3059 13:45:09.935287  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass>
 3060 13:45:09.935913  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass
 3062 13:45:10.121794  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail>
 3063 13:45:10.122420  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail
 3065 13:45:10.332525  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass>
 3066 13:45:10.333175  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass
 3068 13:45:10.502284  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail>
 3069 13:45:10.502905  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail
 3071 13:45:10.681446  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass>
 3072 13:45:10.682066  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass
 3074 13:45:10.871231  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass>
 3075 13:45:10.871849  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass
 3077 13:45:11.053677  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass>
 3078 13:45:11.054299  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass
 3080 13:45:11.244821  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass>
 3081 13:45:11.245444  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass
 3083 13:45:11.428972  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass>
 3084 13:45:11.429593  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass
 3086 13:45:11.614470  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass>
 3087 13:45:11.615089  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass
 3089 13:45:11.798096  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass>
 3090 13:45:11.798758  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass
 3092 13:45:11.984115  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout RESULT=skip>
 3093 13:45:11.984741  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout RESULT=skip
 3095 13:45:12.182488  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass>
 3096 13:45:12.183113  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass
 3098 13:45:12.371207  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass>
 3099 13:45:12.371829  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass
 3101 13:45:12.563360  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail>
 3102 13:45:12.563977  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail
 3104 13:45:12.756729  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail>
 3105 13:45:12.757374  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail
 3107 13:45:12.935912  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass>
 3108 13:45:12.936534  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass
 3110 13:45:13.126896  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail>
 3111 13:45:13.127517  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail
 3113 13:45:13.303759  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail>
 3114 13:45:13.304376  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail
 3116 13:45:13.477112  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass>
 3117 13:45:13.477736  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass
 3119 13:45:13.679112  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass>
 3120 13:45:13.679735  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass
 3122 13:45:13.863911  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass>
 3123 13:45:13.864532  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass
 3125 13:45:14.054379  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass>
 3126 13:45:14.054999  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass
 3128 13:45:14.253670  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass>
 3129 13:45:14.254293  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass
 3131 13:45:14.444600  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass>
 3132 13:45:14.445248  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass
 3134 13:45:14.639392  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass>
 3135 13:45:14.640011  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass
 3137 13:45:14.838721  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass>
 3138 13:45:14.839344  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass
 3140 13:45:15.027296  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass>
 3141 13:45:15.027920  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass
 3143 13:45:15.209780  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail>
 3144 13:45:15.210405  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail
 3146 13:45:15.391252  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip>
 3147 13:45:15.391880  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip
 3149 13:45:15.580116  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass>
 3150 13:45:15.580737  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass
 3152 13:45:15.782441  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass>
 3153 13:45:15.783062  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass
 3155 13:45:15.964923  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass>
 3156 13:45:15.965545  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass
 3158 13:45:16.148005  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass>
 3159 13:45:16.148627  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass
 3161 13:45:16.341045  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass>
 3162 13:45:16.341669  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass
 3164 13:45:16.525207  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass>
 3165 13:45:16.525831  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass
 3167 13:45:16.717092  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass>
 3168 13:45:16.717712  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass
 3170 13:45:16.906372  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass>
 3171 13:45:16.906993  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass
 3173 13:45:17.098765  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass>
 3174 13:45:17.099387  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass
 3176 13:45:17.282102  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass>
 3177 13:45:17.282721  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass
 3179 13:45:17.480690  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass>
 3180 13:45:17.481346  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass
 3182 13:45:17.674659  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass>
 3183 13:45:17.675278  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass
 3185 13:45:17.875299  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass>
 3186 13:45:17.875920  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass
 3188 13:45:18.066968  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass>
 3189 13:45:18.067592  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass
 3191 13:45:18.257739  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass>
 3192 13:45:18.258364  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass
 3194 13:45:18.482251  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass>
 3195 13:45:18.482874  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass
 3197 13:45:18.682779  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass>
 3198 13:45:18.683400  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass
 3200 13:45:18.913592  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass>
 3201 13:45:18.914220  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass
 3203 13:45:19.103858  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass>
 3204 13:45:19.104484  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass
 3206 13:45:19.302086  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass>
 3207 13:45:19.302708  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass
 3209 13:45:19.491537  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass>
 3210 13:45:19.492158  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass
 3212 13:45:19.685871  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail>
 3213 13:45:19.686495  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail
 3215 13:45:19.885554  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout RESULT=skip>
 3216 13:45:19.886179  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout RESULT=skip
 3218 13:45:20.067315  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail>
 3219 13:45:20.067936  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail
 3221 13:45:20.250106  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout RESULT=skip>
 3222 13:45:20.250737  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout RESULT=skip
 3224 13:45:20.435901  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail>
 3225 13:45:20.436525  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail
 3227 13:45:20.637712  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout RESULT=skip>
 3228 13:45:20.638332  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout RESULT=skip
 3230 13:45:20.834191  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail>
 3231 13:45:20.834816  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail
 3233 13:45:21.020543  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout RESULT=skip>
 3234 13:45:21.021199  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout RESULT=skip
 3236 13:45:21.198110  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass>
 3237 13:45:21.198731  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass
 3239 13:45:21.374175  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass>
 3240 13:45:21.374794  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass
 3242 13:45:21.567253  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass>
 3243 13:45:21.567873  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass
 3245 13:45:21.764419  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass>
 3246 13:45:21.765066  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass
 3248 13:45:21.966074  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass>
 3249 13:45:21.966692  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass
 3251 13:45:22.167585  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass>
 3252 13:45:22.168210  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass
 3254 13:45:22.368554  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass>
 3255 13:45:22.369206  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass
 3257 13:45:22.567552  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass>
 3258 13:45:22.568171  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass
 3260 13:45:22.753822  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass>
 3261 13:45:22.754445  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass
 3263 13:45:22.934697  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass>
 3264 13:45:22.935317  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass
 3266 13:45:23.171057  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass>
 3267 13:45:23.171678  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass
 3269 13:45:23.363303  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass>
 3270 13:45:23.363925  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass
 3272 13:45:23.754637  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass>
 3273 13:45:23.755281  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass
 3275 13:45:23.936136  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass>
 3276 13:45:23.936764  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass
 3278 13:45:24.136626  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip>
 3279 13:45:24.137278  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip
 3281 13:45:24.311509  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass>
 3282 13:45:24.312135  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass
 3284 13:45:24.513014  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass>
 3285 13:45:24.513640  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass
 3287 13:45:24.697446  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass>
 3288 13:45:24.698065  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass
 3290 13:45:24.935670  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass>
 3291 13:45:24.936297  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass
 3293 13:45:25.133009  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass>
 3294 13:45:25.133636  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass
 3296 13:45:25.322565  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass>
 3297 13:45:25.323187  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass
 3299 13:45:25.507072  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass>
 3300 13:45:25.507695  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass
 3302 13:45:25.693948  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail>
 3303 13:45:25.694572  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail
 3305 13:45:25.882145  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass>
 3306 13:45:25.882773  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass
 3308 13:45:26.065031  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass>
 3309 13:45:26.065655  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass
 3311 13:45:26.254136  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass>
 3312 13:45:26.254759  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass
 3314 13:45:26.433177  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass>
 3315 13:45:26.433801  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass
 3317 13:45:26.633802  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass>
 3318 13:45:26.634433  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass
 3320 13:45:26.811175  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass>
 3321 13:45:26.811794  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass
 3323 13:45:27.010336  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail>
 3324 13:45:27.010962  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail
 3326 13:45:27.187837  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip>
 3327 13:45:27.188457  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip
 3329 13:45:27.368722  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail>
 3330 13:45:27.369377  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail
 3332 13:45:27.600254  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip>
 3333 13:45:27.600879  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip
 3335 13:45:27.776193  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail>
 3336 13:45:27.776831  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail
 3338 13:45:27.971123  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail>
 3339 13:45:27.971744  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail
 3341 13:45:28.159203  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail>
 3342 13:45:28.159824  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail
 3344 13:45:28.334310  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail>
 3345 13:45:28.334935  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail
 3347 13:45:28.531320  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip>
 3348 13:45:28.531940  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip
 3350 13:45:28.739968  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass>
 3351 13:45:28.740592  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass
 3353 13:45:28.963780  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass>
 3354 13:45:28.964402  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass
 3356 13:45:29.164685  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip>
 3357 13:45:29.165333  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip
 3359 13:45:29.347375  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip
 3361 13:45:29.350400  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip>
 3362 13:45:29.522746  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass>
 3363 13:45:29.523370  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass
 3365 13:45:29.694816  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass>
 3366 13:45:29.695445  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass
 3368 13:45:29.875776  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass>
 3369 13:45:29.876406  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass
 3371 13:45:30.049202  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass>
 3372 13:45:30.049824  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass
 3374 13:45:30.277896  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass>
 3375 13:45:30.278517  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass
 3377 13:45:30.468772  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass>
 3378 13:45:30.469417  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass
 3380 13:45:30.665180  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass>
 3381 13:45:30.665798  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass
 3383 13:45:30.859518  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass>
 3384 13:45:30.860138  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass
 3386 13:45:31.046974  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass>
 3387 13:45:31.047593  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass
 3389 13:45:31.223813  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass>
 3390 13:45:31.224433  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass
 3392 13:45:31.410262  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass>
 3393 13:45:31.410885  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass
 3395 13:45:31.583992  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass>
 3396 13:45:31.584615  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass
 3398 13:45:31.752500  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass>
 3399 13:45:31.753138  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass
 3401 13:45:31.931758  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass>
 3402 13:45:31.932375  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass
 3404 13:45:32.111109  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass>
 3405 13:45:32.111726  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass
 3407 13:45:32.293531  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass>
 3408 13:45:32.294150  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass
 3410 13:45:32.486527  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail>
 3411 13:45:32.487146  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail
 3413 13:45:32.677906  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass>
 3414 13:45:32.678520  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass
 3416 13:45:32.860861  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass>
 3417 13:45:32.861478  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass
 3419 13:45:33.077620  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail>
 3420 13:45:33.078238  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail
 3422 13:45:33.293326  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass>
 3423 13:45:33.293945  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass
 3425 13:45:33.484855  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail>
 3426 13:45:33.485476  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail
 3428 13:45:33.699547  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass>
 3429 13:45:33.700165  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass
 3431 13:45:33.914380  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip>
 3432 13:45:33.915002  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip
 3434 13:45:34.105611  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip>
 3435 13:45:34.106246  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip
 3437 13:45:34.299877  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip>
 3438 13:45:34.300500  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip
 3440 13:45:34.487842  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass>
 3441 13:45:34.488460  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass
 3443 13:45:34.668774  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass>
 3444 13:45:34.669423  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass
 3446 13:45:34.855124  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass>
 3447 13:45:34.855745  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass
 3449 13:45:35.039505  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass>
 3450 13:45:35.040126  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass
 3452 13:45:35.224154  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail>
 3453 13:45:35.224772  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail
 3455 13:45:35.229500  + set +x
 3456 13:45:35.230121  Received signal: <ENDRUN> 1_kselftest-dt 1215563_1.6.2.4.5
 3457 13:45:35.230473  Ending use of test pattern.
 3458 13:45:35.230780  Ending test lava.1_kselftest-dt (1215563_1.6.2.4.5), duration 294.88
 3460 13:45:35.232769  <LAVA_SIGNAL_ENDRUN 1_kselftest-dt 1215563_1.6.2.4.5>
 3461 13:45:35.287956  <LAVA_TEST_RUNNER EXIT>
 3462 13:45:35.288571  ok: lava_test_shell seems to have completed
 3463 13:45:35.296044  dt_test_unprobed_devices_sh: fail
dt_test_unprobed_devices_sh_: skip
dt_test_unprobed_devices_sh_clk_mcasp0: pass
dt_test_unprobed_devices_sh_clk_mcasp0_fixed: skip
dt_test_unprobed_devices_sh_cpus_cpu_0: skip
dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate: skip
dt_test_unprobed_devices_sh_fixedregulator0: pass
dt_test_unprobed_devices_sh_leds: pass
dt_test_unprobed_devices_sh_ocp: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0: fail
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000: skip
dt_test_unprobed_devices_sh_ocp_target-module_47400000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800: pass
dt_test_unprobed_devices_sh_ocp_target-module_47810000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_50000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_53500000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_56000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0: skip
dt_test_unprobed_devices_sh_opp-table: skip
dt_test_unprobed_devices_sh_soc: skip
dt_test_unprobed_devices_sh_sound: pass
dt_test_unprobed_devices_sh_target-module_4b000000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0: pass
shardfile-dt: pass

 3464 13:45:35.297501  end: 3.1 lava-test-shell (duration 00:04:57) [common]
 3465 13:45:35.297915  end: 3 lava-test-retry (duration 00:04:57) [common]
 3466 13:45:35.298331  start: 4 finalize (timeout 00:01:53) [common]
 3467 13:45:35.298771  start: 4.1 power-off (timeout 00:00:30) [common]
 3468 13:45:35.299255  Calling: 'drpm' 'lf-bbb' 'off'
 3469 13:45:35.594297  >> OFF

 3470 13:45:35.595546  Returned 0 in 0 seconds
 3471 13:45:35.696451  end: 4.1 power-off (duration 00:00:00) [common]
 3473 13:45:35.697345  start: 4.2 read-feedback (timeout 00:01:52) [common]
 3474 13:45:35.698213  Listened to connection for namespace 'common' for up to 1s
 3475 13:45:35.698883  Listened to connection for namespace 'common' for up to 1s
 3476 13:45:36.698355  Finalising connection for namespace 'common'
 3477 13:45:36.698843  Disconnecting from shell: Finalise
 3478 13:45:36.699224  / # 
 3479 13:45:36.799996  end: 4.2 read-feedback (duration 00:00:01) [common]
 3480 13:45:36.800501  end: 4 finalize (duration 00:00:02) [common]
 3481 13:45:36.801034  Cleaning after the job
 3482 13:45:36.801505  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/ramdisk
 3483 13:45:36.807241  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/kernel
 3484 13:45:36.811805  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/dtb
 3485 13:45:36.812528  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/nfsrootfs
 3486 13:45:36.914735  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1215563/tftp-deploy-gg85_63o/modules
 3487 13:45:36.920031  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/1215563
 3488 13:45:38.051863  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/1215563
 3489 13:45:38.052121  Job finished correctly